ARM GAS /tmp/ccJrAs6S.s page 1 1 .cpu cortex-m4 2 .eabi_attribute 27, 1 3 .eabi_attribute 28, 1 4 .eabi_attribute 23, 1 5 .eabi_attribute 24, 1 6 .eabi_attribute 25, 1 7 .eabi_attribute 26, 1 8 .eabi_attribute 30, 2 9 .eabi_attribute 34, 1 10 .eabi_attribute 18, 4 11 .file "FilteringFunctions.c" 12 .text 13 .Ltext0: 14 .cfi_sections .debug_frame 15 .section .text.arm_biquad_cas_df1_32x64_init_q31,"ax",%progbits 16 .align 1 17 .p2align 2,,3 18 .global arm_biquad_cas_df1_32x64_init_q31 19 .syntax unified 20 .thumb 21 .thumb_func 22 .fpu fpv4-sp-d16 24 arm_biquad_cas_df1_32x64_init_q31: 25 .LFB148: 26 .file 1 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * Title: arm_biquad_cascade_df1_32x64_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * Description: High precision Q31 Biquad cascade filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** @ingroup groupFilters ARM GAS /tmp/ccJrAs6S.s page 2 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** @addtogroup BiquadCascadeDF1_32x64 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** @brief Initialization function for the Q31 Biquad cascade 32x64 filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** @param[in,out] S points to an instance of the high precision Q31 Biquad cascade filter 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** @param[in] numStages number of 2nd order stages in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** @param[in] pCoeffs points to the filter coefficients 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** @param[in] pState points to the state buffer 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** @param[in] postShift Shift to be applied after the accumulator. Varies according to the c 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** @par Coefficient and State Ordering 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** The coefficients are stored in the array pCoeffs in the following o 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c ****       {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** where b1x and a1x are the coefficients for the first s 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** b2x and a2x are the coefficients for the second stage, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** and so on. The pCoeffs array contains a total of 5*numStages 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** The pState points to state variables array and size of each state v 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** The state variables are arranged in the state array as: 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 
  62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c ****       {x[n-1], x[n-2], y[n-1], y[n-2]}
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c ****
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** The 4 state variables for stage 1 are first, then the 4 state variables for stag 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** The state array has a total length of 4*numStages values. 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** The state variables are updated after each block of data is processed; the coeff 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** void arm_biquad_cas_df1_32x64_init_q31( 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** arm_biquad_cas_df1_32x64_ins_q31 * S, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** uint8_t numStages, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** const q31_t * pCoeffs, 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** q63_t * pState, 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** uint8_t postShift) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** { 27 .loc 1 75 0 28 .cfi_startproc 29 @ args = 4, pretend = 0, frame = 0 30 @ frame_needed = 0, uses_anonymous_args = 0 31 .LVL0: 32 0000 10B5 push {r4, lr} 33 .LCFI0: 34 .cfi_def_cfa_offset 8 35 .cfi_offset 4, -8 36 .cfi_offset 14, -4 37 .loc 1 75 0 38 0002 0446 mov r4, r0 39 0004 9DF80800 ldrb r0, [sp, #8] @ zero_extendqisi2 40 .LVL1: ARM GAS /tmp/ccJrAs6S.s page 3 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** /* Assign filter stages */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** S->numStages = numStages; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** /* Assign postShift to be applied to the output */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** S->postShift = postShift; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** /* Assign coefficient pointer */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** S->pCoeffs = pCoeffs; 41 .loc 1 83 0 42 0008 A260 str r2, [r4, #8] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 43 .loc 1 77 0 44 000a 2170 strb r1, [r4] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** /* Clear state buffer and size is always 4 * numStages */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q63_t)); 45 .loc 1 86 0 46 000c 4A01 lsls r2, r1, #5 47 .LVL2: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 48 .loc 1 80 0 49 000e 2073 strb r0, [r4, #12] 50 .loc 1 86 0 51 0010 0021 movs r1, #0 52 .LVL3: 53 0012 1846 mov r0, r3 54 0014 FFF7FEFF bl memset 55 .LVL4: 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** /* Assign state pointer */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** S->pState = pState; 56 .loc 1 89 0 57 0018 6060 str r0, [r4, #4] 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c **** } 58 .loc 1 90 0 59 001a 10BD pop {r4, pc} 60 .cfi_endproc 61 .LFE148: 63 .section .text.arm_biquad_cas_df1_32x64_q31,"ax",%progbits 64 .align 1 65 .p2align 2,,3 66 .global arm_biquad_cas_df1_32x64_q31 67 .syntax unified 68 .thumb 69 .thumb_func 70 .fpu fpv4-sp-d16 72 arm_biquad_cas_df1_32x64_q31: 73 .LFB149: 74 .file 2 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Title: arm_biquad_cascade_df1_32x64_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Description: High precision Q31 Biquad cascade filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * ARM GAS /tmp/ccJrAs6S.s page 4 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** This function implements a high precision Biquad cascade filter which operates on 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Q31 data values. The filter coefficients are in 1.31 format and the state variables 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** are in 1.63 format. The double precision state variables reduce quantization noise 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** in the filter and provide a cleaner output. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** These filters are particularly useful when implementing filters in which the 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** singularities are close to the unit circle. This is common for low pass or high 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pass filters with very low cutoff frequencies. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The function operates on blocks of input and output data 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** and each call to the function processes blockSize samples through 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** the filter. pSrc and pDst points to input and output arrays 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** containing blockSize Q31 values. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par Algorithm 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Each Biquad stage implements a second order filter using the difference equation 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c ****       y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** A Direct Form I algorithm is used with 5 coefficients and 4 state variables per 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** \image html Biquad.gif "Single Biquad filter stage" 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Coefficients b0, b1 and b2 multiply the input signal x[n]a1 and a2 multiply the output signal 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2] 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** In this case the feedback coefficients a1 and a2 must ARM GAS /tmp/ccJrAs6S.s page 5 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Higher order filters are realized as a cascade of second order sections. 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** numStages refers to the number of second order stages used. 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** For example, an 8th order filter would be realized with numStages=4 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** A 9th order filter would be realized with numStages=5 second order 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** with the coefficients for one of the stages configured as a first order filter 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** (b2=0 and a2=0). 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The pState points to state variables array. 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The state variables are arranged in the array as: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c ****       {x[n-1], x[n-2], y[n-1], y[n-2]}
  80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c ****
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The 4 state variables for stage 1 are first, then the 4 state variables for stag 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The state array has a total length of 4*numStages values of data in 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The state variables are updated after each block of data is processed, the coeff 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par Instance Structure 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The coefficients and state variables for a filter are stored together in an inst 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** A separate instance structure must be defined for each filter. 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Coefficient arrays may be shared among several instances while state variable ar 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par Init Function 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** There is also an associated initialization function which performs the following 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** - Sets the values of the internal structure fields. 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** - Zeros out the values in the state buffer. 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** To do this manually without calling the init function, assign the follow subfiel 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** numStages, pCoeffs, postShift, pState. Also set all of the values in pState to z 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Use of the initialization function is optional. 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** However, if the initialization function is used, then the instance structure can 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** To place an instance structure into a const data section, the instance structure 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Set the values in the state buffer to zeros before static initialization. 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** For example, to statically initialize the filter instance structure use 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 
 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c ****       arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};
 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** where numStages is the number of Biquad stages in the filter; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pState is the address of the state buffer; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pCoeffs is the address of the coefficient buffer; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** postShift shift to be applied which is described in detail below. 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par Fixed-Point Behavior 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Care must be taken while using Biquad Cascade 32x64 filter function. 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Following issues must be considered: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** - Scaling of coefficients 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** - Filter gain 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** - Overflow and saturation 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Filter coefficients are represented as fractional values and 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** restricted to lie in the range [-1 +1). 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The processing function has an additional scaling parameter postShift[+1 -1). ARM GAS /tmp/ccJrAs6S.s page 6 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** At the output of the filter's accumulator is a shift register which shifts the r 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** This essentially scales the filter coefficients by 2^postShift. 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** For example, to realize the coefficients 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 
 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c ****      {1.5, -0.8, 1.2, 1.6, -0.9}
 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c ****
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** set the Coefficient array to: 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 
 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c ****      {0.75, -0.4, 0.6, 0.8, -0.45}
 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c ****
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** and set postShift=1 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The second thing to keep in mind is the gain through the filter. 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The frequency response of a Biquad filter is a function of its coefficients. 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** It is possible for the gain through the filter to exceed 1.0 meaning that the 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** filter increases the amplitude of certain frequencies. 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** This means that an input signal with amplitude < 1.0 may result in an output > 1 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** and these are saturated or overflowed based on the implementation of the filter. 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** To avoid this behavior the filter needs to be scaled down such that its peak gai 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** or the input signal must be scaled down so that the combination of input and fil 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The third item to consider is the overflow and saturation behavior of the fixed- 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** This is described in the function specific documentation below. 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @addtogroup BiquadCascadeDF1_32x64 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @{ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @brief Processing function for the Q31 Biquad cascade 32x64 filter. 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @param[in] S points to an instance of the high precision Q31 Biquad cascade filter 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @param[in] pSrc points to the block of input data 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @param[out] pDst points to the block of output data 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @param[in] blockSize number of samples to process 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @return none 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par Details 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The function is implemented using an internal 64-bit accumulator. 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** The accumulator has a 2.62 format and maintains full precision of the intermedia 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Thus, if the accumulator result overflows it wraps around rather than clip. 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** In order to avoid overflows completely the input signal must be scaled down by 2 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 1.31 format by discarding the low 32 bits. 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** @par 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Two related functions are provided in the CMSIS DSP library. 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** - \ref arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coef 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** - \ref arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** #if defined(ARM_MATH_MVEI) 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** #include "arm_helium_utils.h" 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** void arm_biquad_cas_df1_32x64_q31( 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** const arm_biquad_cas_df1_32x64_ins_q31 * S, ARM GAS /tmp/ccJrAs6S.s page 7 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** const q31_t * pSrc, 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31_t * pDst, 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** uint32_t blockSize) 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** const q31_t *pIn = pSrc; /* input pointer initialization */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31_t *pOut = pDst; /* output pointer initialization */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q63_t *pState = S->pState; /* state pointer initialization */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31_t Xn1, Xn2; /* Input Filter state variables */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q63_t Yn1, Yn2; /* Output Filter state variables */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** uint32_t sample, stage = S->numStages; /* loop counters */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31x4_t vecCoef, vecIn; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q63_t acc; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** do 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** uint32_t i; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Reading the coefficients 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** b0 = *pCoeffs++; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** b1 = *pCoeffs++; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** b2 = *pCoeffs++; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** a1 = *pCoeffs++; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** a2 = *pCoeffs++; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** vecCoef[0] = 0; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** vecCoef[1] = b2; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** vecCoef[2] = b1; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** vecCoef[3] = b0; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Reading the state values 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn1 = pState[0]; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn2 = pState[1]; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = pState[2]; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = pState[3]; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * append history with initial samples 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31_t hist[6]; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** hist[0] = 0; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** hist[1] = Xn2; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** hist[2] = Xn1; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** hist[3] = pIn[0]; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** hist[4] = pIn[1]; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** hist[5] = pIn[2]; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** const q31_t *pIn1 = hist; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31x4_t vecIn0 = *(q31x4_t *) & pIn[0]; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31x4_t vecIn1 = *(q31x4_t *) & pIn[1]; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31x4_t vecIn2 = *(q31x4_t *) & pIn[2]; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** i = 3; ARM GAS /tmp/ccJrAs6S.s page 8 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** do 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = mult32x64(Yn1, a1); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** vecIn = vld1q(pIn1); 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pIn1 += 1; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = vmlaldavaq(Yn1, vecIn, vecCoef); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = asrl(Yn1, -shift); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Store the output in the destination buffer in 1.31 format. 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut++ = (q31_t) (Yn1 >> 32); 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** } 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** while (--i); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** sample = blockSize - 3; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pIn1 = pIn + 3; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** i = sample / 4; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** while (i > 0U) 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = mult32x64(Yn1, a1); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = vmlaldavaq(Yn1, vecIn0, vecCoef); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** vecIn = vld1q(pIn1); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pIn1 += 1; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = asrl(Yn1, -shift); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Store the output in the destination buffer in 1.31 format. 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut++ = (q31_t) (Yn1 >> 32); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = mult32x64(Yn1, a1); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = vmlaldavaq(Yn1, vecIn1, vecCoef); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** vecIn0 = vld1q(pIn1); 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pIn1 += 1; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = asrl(Yn1, -shift); 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut++ = (q31_t) (Yn1 >> 32); 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = mult32x64(Yn1, a1); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = vmlaldavaq(Yn1, vecIn2, vecCoef); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** vecIn1 = vld1q(pIn1); 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pIn1 += 1; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = asrl(Yn1, -shift); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut++ = (q31_t) (Yn1 >> 32); 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 9 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = mult32x64(Yn1, a1); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = vmlaldavaq(Yn1, vecIn, vecCoef); 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** vecIn2 = vld1q(pIn1); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pIn1 += 1; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = asrl(Yn1, -shift); 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut++ = (q31_t) (Yn1 >> 32); 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Decrement the loop counter 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** i--; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** } 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * save input state 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn2 = vecIn[2]; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn1 = vecIn[3]; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** int loopRemainder = blockSize - 3 - 4 * ((blockSize - 3) / 4); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** if (loopRemainder == 1) 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * remainder 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = mult32x64(Yn1, a1); 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = vmlaldavaq(Yn1, vecIn0, vecCoef); 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = asrl(Yn1, -shift); 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut++ = (q31_t) (Yn1 >> 32); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * save input state 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn2 = vecIn0[2]; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn1 = vecIn0[3]; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** } 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** else if (loopRemainder == 2) 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = mult32x64(Yn1, a1); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = vmlaldavaq(Yn1, vecIn0, vecCoef); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = asrl(Yn1, -shift); 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut++ = (q31_t) (Yn1 >> 32); 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = mult32x64(Yn1, a1); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = vmlaldavaq(Yn1, vecIn1, vecCoef); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = asrl(Yn1, -shift); 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut++ = (q31_t) (Yn1 >> 32); ARM GAS /tmp/ccJrAs6S.s page 10 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * save input state 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn2 = vecIn1[2]; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn1 = vecIn1[3]; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** } 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** else if (loopRemainder == 3) 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = mult32x64(Yn1, a1); 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = vmlaldavaq(Yn1, vecIn0, vecCoef); 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = asrl(Yn1, -shift); 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut++ = (q31_t) (Yn1 >> 32); 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = mult32x64(Yn1, a1); 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc; 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = vmlaldavaq(Yn1, vecIn1, vecCoef); 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = asrl(Yn1, -shift); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut++ = (q31_t) (Yn1 >> 32); 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = mult32x64(Yn1, a1); 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = vmlaldavaq(Yn1, vecIn2, vecCoef); 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = asrl(Yn1, -shift); 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut++ = (q31_t) (Yn1 >> 32); 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * save input state 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn2 = vecIn2[2]; 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn1 = vecIn2[3]; 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** } 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * The first stage output is given as input to the second stage. 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pIn = pDst; 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Reset to destination buffer working pointer 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pOut = pDst; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * Store the updated state variables back into the pState array 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pState++ = (q63_t) Xn1; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pState++ = (q63_t) Xn2; 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pState++ = Yn1; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pState++ = Yn2; 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** } 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** while (--stage); ARM GAS /tmp/ccJrAs6S.s page 11 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** } 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** #else 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** void arm_biquad_cas_df1_32x64_q31( 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** const arm_biquad_cas_df1_32x64_ins_q31 * S, 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** const q31_t * pSrc, 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31_t * pDst, 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** uint32_t blockSize) 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 75 .loc 2 415 0 76 .cfi_startproc 77 @ args = 0, pretend = 0, frame = 104 78 @ frame_needed = 0, uses_anonymous_args = 0 79 .LVL5: 80 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 81 .LCFI1: 82 .cfi_def_cfa_offset 36 83 .cfi_offset 4, -36 84 .cfi_offset 5, -32 85 .cfi_offset 6, -28 86 .cfi_offset 7, -24 87 .cfi_offset 8, -20 88 .cfi_offset 9, -16 89 .cfi_offset 10, -12 90 .cfi_offset 11, -8 91 .cfi_offset 14, -4 92 0004 9BB0 sub sp, sp, #108 93 .LCFI2: 94 .cfi_def_cfa_offset 144 95 0006 D0E90145 ldrd r4, r5, [r0, #4] 96 .loc 2 415 0 97 000a 0B91 str r1, [sp, #44] 98 .LVL6: 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** const q31_t *pIn = pSrc; /* input pointer initialization */ 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31_t *pOut = pDst; /* output pointer initialization */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q63_t *pState = S->pState; /* state pointer initialization */ 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q63_t acc; /* accumulator */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31_t Xn1, Xn2; /* Input Filter state variables */ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q63_t Yn1, Yn2; /* Output Filter state variables */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31_t Xn; /* temporary input */ 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ 99 .loc 2 425 0 100 000c 017B ldrb r1, [r0, #12] @ zero_extendqisi2 101 .LVL7: 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** uint32_t sample, stage = S->numStages; /* loop counters */ 102 .loc 2 426 0 103 000e 0078 ldrb r0, [r0] @ zero_extendqisi2 104 .LVL8: 105 0010 1690 str r0, [sp, #88] 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** const q31_t *pIn = pSrc; /* input pointer initialization */ 106 .loc 2 415 0 107 0012 CDE91723 strd r2, r3, [sp, #92] 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** uint32_t sample, stage = S->numStages; /* loop counters */ 108 .loc 2 425 0 109 0016 481C adds r0, r1, #1 110 0018 A1F11F03 sub r3, r1, #31 ARM GAS /tmp/ccJrAs6S.s page 12 111 .LVL9: 112 001c 1393 str r3, [sp, #76] 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** q31_t acc_l, acc_h; /* temporary output */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** uint32_t uShift = ((uint32_t) S->postShift + 1U); 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ 113 .loc 2 429 0 114 001e C0F12003 rsb r3, r0, #32 115 0022 1293 str r3, [sp, #72] 116 .LVL10: 117 0024 05F11403 add r3, r5, #20 118 .LVL11: 119 0028 1593 str r3, [sp, #84] 120 002a 04F12003 add r3, r4, #32 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** uint32_t sample, stage = S->numStages; /* loop counters */ 121 .loc 2 425 0 122 002e 1990 str r0, [sp, #100] 123 0030 1493 str r3, [sp, #80] 124 .LVL12: 125 .L8: 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** do 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Reading the coefficients */ 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** b0 = *pCoeffs++; 126 .loc 2 434 0 127 0032 159B ldr r3, [sp, #84] 128 0034 53F8142C ldr r2, [r3, #-20] 129 0038 0F92 str r2, [sp, #60] 130 .LVL13: 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** b1 = *pCoeffs++; 131 .loc 2 435 0 132 003a 53F8102C ldr r2, [r3, #-16] 133 .LVL14: 134 003e 1092 str r2, [sp, #64] 135 .LVL15: 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** b2 = *pCoeffs++; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** a1 = *pCoeffs++; 136 .loc 2 437 0 137 0040 53F8086C ldr r6, [r3, #-8] 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** b2 = *pCoeffs++; 138 .loc 2 436 0 139 0044 53F80C2C ldr r2, [r3, #-12] 140 .LVL16: 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** a2 = *pCoeffs++; 141 .loc 2 438 0 142 0048 53F8041C ldr r1, [r3, #-4] 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Reading the state values */ 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn1 = (q31_t) (pState[0]); 143 .loc 2 441 0 144 004c 149B ldr r3, [sp, #80] 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** a1 = *pCoeffs++; 145 .loc 2 436 0 146 004e 1192 str r2, [sp, #68] 147 .LVL17: 148 .loc 2 441 0 149 0050 53F820EC ldr lr, [r3, #-32] ARM GAS /tmp/ccJrAs6S.s page 13 150 .LVL18: 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn2 = (q31_t) (pState[1]); 151 .loc 2 442 0 152 0054 53F8182C ldr r2, [r3, #-24] 153 .LVL19: 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = pState[2]; 154 .loc 2 443 0 155 0058 53E904AB ldrd r10, [r3, #-16] 156 .LVL20: 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = pState[3]; 157 .loc 2 444 0 158 005c 53E90234 ldrd r3, [r3, #-8] 159 0060 CDE90634 strd r3, [sp, #24] 160 .LVL21: 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Apply loop unrolling and compute 4 output values simultaneously. */ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Variable acc hold output value that is being computed and stored in destination buffer 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** */ 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** sample = blockSize >> 2U; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** while (sample > 0U) 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Read the input */ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn = *pIn++; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc = b0 * x[n] */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = (q63_t) Xn * b0; 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b1 * x[n-1] */ 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += (q63_t) Xn1 * b1; 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b[2] * x[n-2] */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += (q63_t) Xn2 * b2; 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += a1 * y[n-1] */ 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn1, a1); 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += a2 * y[n-2] */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* The result is converted to 1.63 , Yn2 variable is reused */ 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = acc << shift; 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Calc lower part of acc */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_l = acc & 0xffffffff; 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Calc upper part of acc */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_h = (acc >> 32) & 0xffffffff; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Apply shift for lower part of acc and upper part of acc */ ARM GAS /tmp/ccJrAs6S.s page 14 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Store the output in the destination buffer in 1.31 format. */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut = acc_h; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Read the second input into Xn2, to reuse the value */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn2 = *pIn++; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b1 * x[n-1] */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = (q63_t) Xn * b1; 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc = b0 * x[n] */ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += (q63_t) Xn2 * b0; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b[2] * x[n-2] */ 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += (q63_t) Xn1 * b2; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += a1 * y[n-1] */ 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a1); 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += a2 * y[n-2] */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn1, a2); 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* The result is converted to 1.63, Yn1 variable is reused */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc << shift; 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Calc lower part of acc */ 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_l = acc & 0xffffffff; 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Calc upper part of acc */ 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_h = (acc >> 32) & 0xffffffff; 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Apply shift for lower part of acc and upper part of acc */ 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Read the third input into Xn1, to reuse the value */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn1 = *pIn++; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* The result is converted to 1.31 */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Store the output in the destination buffer. */ 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *(pOut + 1U) = acc_h; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc = b0 * x[n] */ 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = (q63_t) Xn1 * b0; 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b1 * x[n-1] */ 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += (q63_t) Xn2 * b1; 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b[2] * x[n-2] */ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += (q63_t) Xn * b2; 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += a1 * y[n-1] */ 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn1, a1); ARM GAS /tmp/ccJrAs6S.s page 15 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += a2 * y[n-2] */ 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* The result is converted to 1.63, Yn2 variable is reused */ 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = acc << shift; 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Calc lower part of acc */ 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_l = acc & 0xffffffff; 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Calc upper part of acc */ 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_h = (acc >> 32) & 0xffffffff; 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Apply shift for lower part of acc and upper part of acc */ 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Store the output in the destination buffer in 1.31 format. */ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *(pOut + 2U) = acc_h; 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Read the fourth input into Xn, to reuse the value */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn = *pIn++; 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc = b0 * x[n] */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = (q63_t) Xn * b0; 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b1 * x[n-1] */ 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += (q63_t) Xn1 * b1; 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b[2] * x[n-2] */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += (q63_t) Xn2 * b2; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += a1 * y[n-1] */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a1); 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += a2 * y[n-2] */ 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn1, a2); 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* The result is converted to 1.63, Yn1 variable is reused */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc << shift; 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Calc lower part of acc */ 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_l = acc & 0xffffffff; 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Calc upper part of acc */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_h = (acc >> 32) & 0xffffffff; 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Apply shift for lower part of acc and upper part of acc */ 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Store the output in the destination buffer in 1.31 format. */ 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *(pOut + 3U) = acc_h; 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Every time after the output is computed state should be updated. */ 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* The states should be updated as: */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Xn2 = Xn1 */ 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Xn1 = Xn */ ARM GAS /tmp/ccJrAs6S.s page 16 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Yn2 = Yn1 */ 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Yn1 = acc */ 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn2 = Xn1; 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn1 = Xn; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* update output pointer */ 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pOut += 4U; 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* decrement loop counter */ 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** sample--; 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** } 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Loop unrolling: Compute remaining outputs */ 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** sample = blockSize & 0x3U; 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** #else 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Initialize blkCnt with number of samples */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** sample = blockSize; 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** while (sample > 0U) 161 .loc 2 624 0 162 0064 189B ldr r3, [sp, #96] 163 .LVL22: 164 0066 002B cmp r3, #0 165 0068 00F0AF80 beq .L5 166 006c 0C46 mov r4, r1 167 006e CD17 asrs r5, r1, #31 168 0070 F717 asrs r7, r6, #31 169 0072 0D93 str r3, [sp, #52] 170 0074 179B ldr r3, [sp, #92] 171 0076 0C93 str r3, [sp, #48] 172 0078 CDE90045 strd r4, [sp] 173 007c DDF864C0 ldr ip, [sp, #100] 174 0080 0E92 str r2, [sp, #56] 175 0082 CDE90867 strd r6, [sp, #32] 176 0086 04E0 b .L6 177 .LVL23: 178 .L9: 179 0088 DDE90867 ldrd r6, [sp, #32] 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Read the input */ 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn = *pIn++; 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc = b0 * x[n] */ 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc = (q63_t) Xn * b0; 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b1 * x[n-1] */ 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += (q63_t) Xn1 * b1; 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b[2] * x[n-2] */ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += (q63_t) Xn2 * b2; 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += a1 * y[n-1] */ 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn1, a1); 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += a2 * y[n-2] */ ARM GAS /tmp/ccJrAs6S.s page 17 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc += mult32x64(Yn2, a2); 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Every time after the output is computed state should be updated. */ 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* The states should be updated as: */ 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Xn2 = Xn1 */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Xn1 = Xn */ 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Yn2 = Yn1 */ 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Yn1 = acc */ 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn2 = Xn1; 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Xn1 = Xn; 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* The result is converted to 1.63, Yn1 variable is reused */ 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn1 = acc << shift; 180 .loc 2 653 0 181 008c A246 mov r10, r4 182 .LVL24: 183 008e CB46 mov fp, r9 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = Yn1; 184 .loc 2 649 0 185 0090 9E46 mov lr, r3 186 .LVL25: 187 .L6: 188 .LBB1006: 189 .LBB1007: 190 .file 3 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /****************************************************************************** 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @file arm_math.h 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Public header file for CMSIS DSP Library 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @version V1.7.0 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @date 18. March 2019 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ******************************************************************************/ 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved. 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * SPDX-License-Identifier: Apache-2.0 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * not use this file except in compliance with the License. 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * You may obtain a copy of the License at 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * www.apache.org/licenses/LICENSE-2.0 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Unless required by applicable law or agreed to in writing, software 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * See the License for the specific language governing permissions and 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * limitations under the License. 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \mainpage CMSIS DSP Software Library 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Introduction 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This user manual describes the CMSIS DSP software library, ARM GAS /tmp/ccJrAs6S.s page 18 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * a suite of common signal processing functions for use on Cortex-M and Cortex-A processor 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * based devices. 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is divided into a number of functions each covering a specific category: 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Basic math functions 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Fast math functions 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Complex math functions 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Filtering functions 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Matrix functions 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Transform functions 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Motor control functions 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Statistical functions 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support functions 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Interpolation functions 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support Vector Machine functions (SVM) 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Bayes classifier functions 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Distance functions 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library has generally separate functions for operating on 8-bit integers, 16-bit integers, 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 32-bit integer and 32-bit floating-point values. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Using the Library 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains prebuilt versions of the libraries in the Lib fold 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Here is the list of pre-built libraries : 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfdp_math.lib (Cortex-M7, Little endian, Double Precision Floating Point Unit) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfdp_math.lib (Cortex-M7, Big endian, Double Precision Floating Point Unit) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfsp_math.lib (Cortex-M7, Little endian, Single Precision Floating Point Unit) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfsp_math.lib (Cortex-M7, Big endian and Single Precision Floating Point Unit on 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7l_math.lib (Cortex-M7, Little endian) 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7b_math.lib (Cortex-M7, Big endian) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4lf_math.lib (Cortex-M4, Little endian, Floating Point Unit) 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4bf_math.lib (Cortex-M4, Big endian, Floating Point Unit) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4l_math.lib (Cortex-M4, Little endian) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4b_math.lib (Cortex-M4, Big endian) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3l_math.lib (Cortex-M3, Little endian) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3b_math.lib (Cortex-M3, Big endian) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0l_math.lib (Cortex-M0 / Cortex-M0+, Little endian) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0b_math.lib (Cortex-M0 / Cortex-M0+, Big endian) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MBLl_math.lib (Armv8-M Baseline, Little endian) 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLl_math.lib (Armv8-M Mainline, Little endian) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLlfsp_math.lib (Armv8-M Mainline, Little endian, Single Precision Floating Point 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLld_math.lib (Armv8-M Mainline, Little endian, DSP instructions) 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precis 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library functions are declared in the public file arm_math.h which is placed 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Simply include this file and link the appropriate library in the application and begin calling 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * public header file arm_math.h for Cortex-M cores with little endian and big endi 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Examples 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * -------- 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library ships with a number of examples which demonstrate how to use the library functions 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM GAS /tmp/ccJrAs6S.s page 19 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Toolchain Support 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is now tested on Fast Models building with cmake. 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Core M0, M7, A5 are tested. 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Building the Library 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains a project file to rebuild libraries on MDK toolchain in the 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * CMSIS-DSP in ARM::CMSIS Pack 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ----------------------------- 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directorie 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |File/Folder |Content 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |---------------------------------|----------------------------------------------------------- 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\Documentation\\DSP | This documentation 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\DSP_Lib_TestSuite | DSP_Lib test suite 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Examples | Example projects demonstrating the usage of the library fu 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Include | DSP_Lib include files 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Lib | DSP_Lib binaries 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Projects | Projects to rebuild DSP_Lib binaries 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Source | DSP_Lib source files 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Revision History of CMSIS-DSP 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Please refer to \ref ChangeLog_pg. 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMath Basic Math Functions 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFastMath Fast Math Functions 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides a fast approximation to sine, cosine, and square root. 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * As compared to most of the other functions in the CMSIS math library, the fast math functions 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * operate on individual values and not arrays. 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are separate functions for Q15, Q31, and floating-point data. 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupCmplxMath Complex Math Functions 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions operates on complex data vectors. 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The data in the complex arrays is stored in an interleaved fashion 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * (real, imag, real, imag, ...). 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In the API functions, the number of samples in a complex array refers 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the number of complex values; the array contains twice this number of 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * real values. 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 21 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFilters Filtering Functions 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMatrix Matrix Functions 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides basic matrix math operations. 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The functions operate on matrix data structures. For example, 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the type 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * definition for the floating-point matrix structure is shown 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * below: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     typedef struct
 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     {
 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *       uint16_t numRows;     // number of rows of the matrix.
 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *       uint16_t numCols;     // number of columns of the matrix.
 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *       float32_t *pData;     // points to the data of the matrix.
 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     } arm_matrix_instance_f32;
 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are similar definitions for Q15 and Q31 data types. 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The structure specifies the size of the matrix and then points to 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * an array of data. The array is of size numRows X numCols 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and the values are arranged in row order. That is, the 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * matrix element (i, j) is stored at: 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     pData[i*numCols + j]
 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Init Functions 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is an associated initialization function for each type of matrix 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data structure. 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The initialization function sets the values of the internal structure fields. 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15() 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * for floating-point, Q31 and Q15 types, respectively. 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Use of the initialization function is optional. However, if initialization function is used 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * then the instance structure cannot be placed into a const data section. 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * To place the instance structure in a const data 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * section, manually initialize the data structure. For example: 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  * arm_matrix_instance_f32 S = {nRows, nColumns, pData};
 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  * arm_matrix_instance_q31 S = {nRows, nColumns, pData};
 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  * arm_matrix_instance_q15 S = {nRows, nColumns, pData};
 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where nRows specifies the number of rows, nColumns 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * specifies the number of columns, and pData points to the 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data array. 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Size Checking 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * By default all of the matrix functions perform size checking on the input and 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * output matrices. For example, the matrix addition function verifies that the 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * two input matrices and the output matrix all have the same number of rows and 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * columns. If the size check fails the functions return: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
ARM GAS  /tmp/ccJrAs6S.s 			page 22


 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     ARM_MATH_SIZE_MISMATCH
 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Otherwise the functions return 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     ARM_MATH_SUCCESS
 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is some overhead associated with this matrix size checking. 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The matrix size checking is enabled via the \#define 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     ARM_MATH_MATRIX_CHECK
 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * within the library project settings. By default this macro is defined 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and size checking is enabled. By changing the project settings and 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * undefining this macro size checking is eliminated and the functions 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * run a bit faster. With size checking disabled the functions always 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * return ARM_MATH_SUCCESS. 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupTransforms Transform Functions 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupController Controller Functions 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupStats Statistics Functions 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSupport Support Functions 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupInterpolation Interpolation Functions 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * These functions perform 1- and 2-dimensional interpolation of data. 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Linear interpolation is used for 1-dimensional data and 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * bilinear interpolation is used for 2-dimensional data. 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupExamples Examples 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSVM SVM Functions 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions is implementing SVM classification on 2 classes. 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn. The parameters can be easily 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/SVM.py 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If more than 2 classes are needed, the functions in this folder 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * will have to be used, as building blocks, to do multi-class classification. 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * No multi-class classification is provided in this SVM folder. 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM GAS /tmp/ccJrAs6S.s page 23 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupBayes Bayesian estimators 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Implement the naive gaussian Bayes estimator. 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn. 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The parameters can be easily 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/Bayes.py 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupDistance Distance functions 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Distance functions for use with clustering algorithms. 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are distance functions for float vectors and boolean vectors. 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef _ARM_MATH_H 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _ARM_MATH_H 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __cplusplus 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** extern "C" 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Compiler specific diagnostic adjustment */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM ) 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 ) 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ ) 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic push 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wconversion" 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ ) 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ ) 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ ) 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ ) 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( _MSC_VER ) 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 24 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Included for instrinsics definitions */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (_MSC_VER ) 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __forceinline 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __inline 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __declspec(align(x)) 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined (__GNUC_PYTHON__) 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __attribute__((inline)) 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __attribute__((inline)) 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-function" 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wattributes" 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include "cmsis_compiler.h" 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MAX ((float64_t)DBL_MAX) 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MAX ((float32_t)FLT_MAX) 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MAX ((float16_t)FLT_MAX) 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MIN (-DBL_MAX) 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MIN (-FLT_MAX) 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MIN (-(float16_t)FLT_MAX) 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMAX ((float64_t)DBL_MAX) 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMAX ((float32_t)FLT_MAX) 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMAX ((float16_t)FLT_MAX) 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMIN ((float64_t)0.0) 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMIN ((float32_t)0.0) 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMIN ((float16_t)0.0) 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MAX ((q31_t)(0x7FFFFFFFL)) 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MAX ((q15_t)(0x7FFF)) ARM GAS /tmp/ccJrAs6S.s page 25 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MAX ((q7_t)(0x7F)) 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MIN ((q31_t)(0x80000000L)) 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MIN ((q15_t)(0x8000)) 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MIN ((q7_t)(0x80)) 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMAX ((q31_t)(0x7FFFFFFFL)) 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMAX ((q15_t)(0x7FFF)) 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMAX ((q7_t)(0x7F)) 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMIN ((q31_t)0) 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMIN ((q15_t)0) 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMIN ((q7_t)0) 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* evaluate ARM DSP feature */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_DSP 1 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM) 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEF 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_MVEF) 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEI 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI) 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for reciprocal calculation in Normalized LMS 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q31 ((q31_t)(0x100)) 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q15 ((q15_t)0x5) 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INDEX_MASK 0x0000003F 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef PI 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define PI 3.14159265358979f 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Fast math approximations 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_TABLE_SIZE 512 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q31_SHIFT (32 - 10) 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q15_SHIFT (16 - 10) 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CONTROLLER_Q31_SHIFT (32 - 9) 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q31 0x400000 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q15 0x80 ARM GAS /tmp/ccJrAs6S.s page 26 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Controller functions 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31(q31) Fixed value of 2/360 */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* -1 to +1 is divided into 360 values so total spacing is (2/360) */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INPUT_SPACING 0xB60B61 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros for complex numbers 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Dimension C vector space */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CMPLX_DIM 2 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Error status returned by some functions in the library. 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SUCCESS = 0, /**< No error */ 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SINGULAR = -5, /**< Input matrix is singular and cannot be inverted */ 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_status; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional data type in 1.7 format. 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8_t q7_t; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional data type in 1.15 format. 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16_t q15_t; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 1.31 format. 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q31_t; 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional data type in 1.63 format. 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64_t q63_t; 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point type definition. 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float float32_t; 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit floating-point type definition. ARM GAS /tmp/ccJrAs6S.s page 27 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef double float64_t; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief vector types 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined (ARM_MATH_MVEI) 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional 128-bit vector data type in 1.63 format 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t q63x2_t; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 1.31 format. 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q31x4_t; 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector data type with 16-bit alignement in 1.15 format. 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x8_t q15x8_t; 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector data type with 8-bit alignement in 1.7 format. 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x16_t q7x16_t; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector pair data type in 1.31 format. 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x2_t q31x4x2_t; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector quadruplet data type in 1.31 format. 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x4_t q31x4x4_t; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector pair data type in 1.15 format. 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x2_t q15x8x2_t; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector quadruplet data type in 1.15 format. 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x4_t q15x8x4_t; 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector pair data type in 1.7 format. 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x2_t q7x16x2_t; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector quadruplet data type in 1.7 format. 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x4_t q7x16x4_t; 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 28 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 9.23 format. 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q23_t; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 9.23 format. 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q23x4_t; 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit status 128-bit vector data type. 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t status64x2_t; 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 128-bit vector data type. 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x4_t; 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 128-bit vector data type. 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x8_t; 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 128-bit vector data type. 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x16_t; 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF) /* floating point vector*/ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector type 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4_t f32x4_t; 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector data type 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x8_t f16x8_t; 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector pair data type 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x2_t f32x4x2_t; 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector quadruplet data type 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x4_t f32x4x4_t; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) ARM GAS /tmp/ccJrAs6S.s page 29 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector pair data type 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x2_t f16x8x2_t; 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector quadruplet data type 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x4_t f16x8x4_t; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 128-bit vector data type 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x4_t 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x4_t f; 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x4_t i; 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x4_t; 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 128-bit vector data type 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x8_t 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x8_t f; 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x8_t i; 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x8_t; 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector data type in 1.31 format. 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2_t q31x2_t; 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector data type in 1.15 format. 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x4_t q15x4_t; 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector data type in 1.7 format. 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x8_t q7x8_t; 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit float 64-bit vector data type. 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2_t f32x2_t; 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit float 64-bit vector data type. ARM GAS /tmp/ccJrAs6S.s page 30 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x4_t f16x4_t; 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector triplet data type 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x3_t f32x4x3_t; 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector triplet data type 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x3_t f16x8x3_t; 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector triplet data type in 1.31 format 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x4x3_t; 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector triplet data type in 1.15 format 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x3_t q15x8x3_t; 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector triplet data type in 1.7 format 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x3_t q7x16x3_t; 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector pair data type 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x2_t f32x2x2_t; 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector triplet data type 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x3_t f32x2x3_t; 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector quadruplet data type 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x4_t f32x2x4_t; 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector pair data type 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x2_t f16x4x2_t; 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector triplet data type 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x3_t f16x4x3_t; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 31 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector quadruplet data type 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x4_t f16x4x4_t; 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector pair data type in 1.31 format 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x2_t q31x2x2_t; 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector triplet data type in 1.31 format 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x3_t q31x2x3_t; 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector quadruplet data type in 1.31 format 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x2x4_t; 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector pair data type in 1.15 format 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x2_t; 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector triplet data type in 1.15 format 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x3_t; 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector quadruplet data type in 1.15 format 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x3_t q15x4x4_t; 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector pair data type in 1.7 format 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x2_t q7x8x2_t; 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector triplet data type in 1.7 format 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x3_t q7x8x3_t; 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector quadruplet data type in 1.7 format 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x4_t q7x8x4_t; 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 64-bit vector data type 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x2_t 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x2_t f; ARM GAS /tmp/ccJrAs6S.s page 32 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x2_t i; 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x2_t; 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 64-bit vector data type 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x4_t 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x4_t f; 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x4_t i; 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x4_t; 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 64-bit vector data type. 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x2_t; 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 64-bit vector data type. 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x4_t; 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 64-bit vector data type. 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x8_t; 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief definition to read/write two 16 bit values. 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @deprecated 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM ) 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 ) 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ ) 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ ) 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ ) 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ ) 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ ) 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE __un(aligned) int32_t 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined(_MSC_VER ) 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 33 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr)) 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_CONST(addr) ( (__SIMD32_TYPE * ) (addr)) 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE * ) (addr)) 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD64(addr) (*( int64_t **) & (addr)) 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define STEP(x) (x) <= 0 ? 0 : 1 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define SQ(x) ((x) * (x)) 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* SIMD replacement */ 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer. 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2 ( 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15) 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, pQ15, 4); 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = (pQ15[1] << 16) | (pQ15[0] & 0x0FFFF) ; 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and increment pointer afterwards. 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_ia ( 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15) 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4); 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF); 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2; 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and decrement pointer afterwards. 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_da ( 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15) ARM GAS /tmp/ccJrAs6S.s page 34 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4); 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF); 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 -= 2; 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer and increment pointer afterwards. 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2_ia ( 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15, 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value) 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value; 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ15, &val, 4); 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[0] = (val & 0x0FFFF); 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[1] = (val >> 16) & 0x0FFFF; 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2; 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer. 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2 ( 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15, 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value) 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value; 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (pQ15, &val, 4); 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** pQ15[0] = val & 0x0FFFF; 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** pQ15[1] = val >> 16; 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 4 Q7 from Q7 pointer and increment pointer afterwards. ARM GAS /tmp/ccJrAs6S.s page 35 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q7x4_ia ( 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7) 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ7, 4); 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val =(((*pQ7)[3] & 0x0FF) << 24) | (((*pQ7)[2] & 0x0FF) << 16) | (((*pQ7)[1] & 0x0FF) << 8) | 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 += 4; 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 4 Q7 from Q7 pointer and decrement pointer afterwards. 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q7x4_da ( 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7) 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ7, 4); 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((((*pQ7)[3]) & 0x0FF) << 24) | ((((*pQ7)[2]) & 0x0FF) << 16) | ((((*pQ7)[1]) & 0x0FF) << 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 -= 4; 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 4 Q7 to Q7 pointer and increment pointer afterwards. 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q7x4_ia ( 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7, 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value) 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value; 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ7, &val, 4); 1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[0] = val & 0x0FF; 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[1] = (val >> 8) & 0x0FF; 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[2] = (val >> 16) & 0x0FF; 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[3] = (val >> 24) & 0x0FF; ARM GAS /tmp/ccJrAs6S.s page 36 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 += 4; 1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** Normally those kind of definitions are in a compiler file 1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** in Core or Core_A. 1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** But for MSVC compiler it is a bit special. The goal is very specific 1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** to CMSIS-DSP and only to allow the use of this library from other 1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** systems like Python or Matlab. 1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** MSVC is not going to be used to cross-compile to ARM. So, having a MSVC 1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** compiler file in Core or Core_A would not make sense. 1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( _MSC_VER ) || defined(__GNUC_PYTHON__) 1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data) 1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (data == 0U) { return 32U; } 1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t count = 0U; 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t mask = 0x80000000U; 1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while ((data & mask) == 0U) 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** count += 1U; 1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** mask = mask >> 1U; 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return count; 1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) 1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if ((sat >= 1U) && (sat <= 32U)) 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); 1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t min = -1 - max ; 1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (val > max) 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return max; 1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (val < min) 1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return min; 1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return val; 1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) 1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (sat <= 31U) 1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t max = ((1U << sat) - 1U); ARM GAS /tmp/ccJrAs6S.s page 37 1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (val > (int32_t)max) 1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return max; 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (val < 0) 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return 0U; 1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (uint32_t)val; 1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef ARM_MATH_DSP 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief definition to pack two 16 bit values. 1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \ 1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) ) 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \ 1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) ) 1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief definition to pack four 8 bit values. 1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef ARM_MATH_BIG_ENDIAN 1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \ 1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \ 1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \ 1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v3) << 24) & (int32_t)0xFF000000) ) 1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \ 1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \ 1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \ 1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v0) << 24) & (int32_t)0xFF000000) ) 1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q63 to Q31 values. 1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t clip_q63_to_q31( 1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t x) 1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x; 1162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q63 to Q15 values. 1166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q15_t clip_q63_to_q15( 1168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t x) 1169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? 1171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15); ARM GAS /tmp/ccJrAs6S.s page 38 1172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q31 to Q7 values. 1176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q7_t clip_q31_to_q7( 1178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x) 1179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ? 1181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x; 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q31 to Q15 values. 1186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q15_t clip_q31_to_q15( 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x) 1189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ? 1191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x; 1192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format. 1196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q63_t mult32x64( 1198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t x, 1199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t y) 1200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) + 191 .loc 3 1201 0 192 0092 DDE90645 ldrd r4, [sp, #24] 193 0096 0025 movs r5, #0 194 0098 CDE90445 strd r4, [sp, #16] 195 .LBE1007: 196 .LBE1006: 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 197 .loc 2 627 0 198 009c 0B9A ldr r2, [sp, #44] 199 .LBB1019: 200 .LBB1008: 201 .loc 3 1201 0 202 009e 0498 ldr r0, [sp, #16] 203 00a0 DDE90045 ldrd r4, [sp] 204 .LBE1008: 205 .LBE1019: 206 .LBB1020: 207 .LBB1021: 208 00a4 0021 movs r1, #0 209 00a6 0AFB07F8 mul r8, r10, r7 210 00aa 3346 mov r3, r6 211 00ac 06FB0188 mla r8, r6, r1, r8 212 00b0 AAFB0367 umull r6, r7, r10, r3 213 .LBE1021: 214 .LBE1020: 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 215 .loc 2 627 0 ARM GAS /tmp/ccJrAs6S.s page 39 216 00b4 52F8043B ldr r3, [r2], #4 217 00b8 0B92 str r2, [sp, #44] 218 .LVL26: 219 .LBB1029: 220 .LBB1022: 221 .loc 3 1201 0 222 00ba 08EB0702 add r2, r8, r7 223 .LVL27: 224 .LBE1022: 225 .LBE1029: 226 .LBB1030: 227 .LBB1009: 228 00be 00FB05F8 mul r8, r0, r5 229 00c2 0598 ldr r0, [sp, #20] 230 00c4 0099 ldr r1, [sp] 231 .LBE1009: 232 .LBE1030: 233 .LBB1031: 234 .LBB1023: 235 00c6 0292 str r2, [sp, #8] 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((q63_t) (x >> 32) * y) ) ); 236 .loc 3 1202 0 237 00c8 DDE90867 ldrd r6, [sp, #32] 238 .LBE1023: 239 .LBE1031: 240 .LBB1032: 241 .LBB1010: 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((q63_t) (x >> 32) * y) ) ); 242 .loc 3 1201 0 243 00cc 04FB0085 mla r5, r4, r0, r8 244 00d0 0498 ldr r0, [sp, #16] 245 .LBE1010: 246 .LBE1032: 247 .LBB1033: 248 .LBB1024: 249 00d2 D217 asrs r2, r2, #31 250 .LBE1024: 251 .LBE1033: 252 .LBB1034: 253 .LBB1011: 254 00d4 A0FB0189 umull r8, r9, r0, r1 255 .LBE1011: 256 .LBE1034: 257 .LBB1035: 258 .LBB1025: 259 .loc 3 1202 0 260 00d8 0BFB07F1 mul r1, fp, r7 261 00dc 4FEAEB70 asr r0, fp, #31 262 .LBE1025: 263 .LBE1035: 264 .LBB1036: 265 .LBB1012: 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((q63_t) (x >> 32) * y) ) ); 266 .loc 3 1201 0 267 00e0 05EB0904 add r4, r5, r9 268 .LBE1012: 269 .LBE1036: ARM GAS /tmp/ccJrAs6S.s page 40 270 .LBB1037: 271 .LBB1026: 272 00e4 0392 str r2, [sp, #12] 273 .loc 3 1202 0 274 00e6 00FB0615 mla r5, r0, r6, r1 275 00ea ABFB0601 umull r0, r1, fp, r6 276 00ee 2944 add r1, r1, r5 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((q63_t) (x >> 32) * y) ) ); 277 .loc 3 1201 0 278 00f0 DDE90256 ldrd r5, [sp, #8] 279 .LBE1026: 280 .LBE1037: 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b1 * x[n-1] */ 281 .loc 2 632 0 282 00f4 0F9A ldr r2, [sp, #60] 283 .LBB1038: 284 .LBB1013: 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((q63_t) (x >> 32) * y) ) ); 285 .loc 3 1201 0 286 00f6 0294 str r4, [sp, #8] 287 .LBE1013: 288 .LBE1038: 289 .LBB1039: 290 .LBB1027: 291 00f8 2D18 adds r5, r5, r0 292 00fa 4E41 adcs r6, r6, r1 293 .LBE1027: 294 .LBE1039: 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b1 * x[n-1] */ 295 .loc 2 632 0 296 00fc 83FB0201 smull r0, r1, r3, r2 297 .LVL28: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b[2] * x[n-2] */ 298 .loc 2 634 0 299 0100 109A ldr r2, [sp, #64] 300 .LBB1040: 301 .LBB1014: 302 .loc 3 1202 0 303 0102 DDE90089 ldrd r8, [sp] 304 .LBE1014: 305 .LBE1040: 306 .LBB1041: 307 .LBB1028: 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((q63_t) (x >> 32) * y) ) ); 308 .loc 3 1201 0 309 0106 CDE90456 strd r5, [sp, #16] 310 .LBE1028: 311 .LBE1041: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b[2] * x[n-2] */ 312 .loc 2 634 0 313 010a C2FB0E01 smlal r0, r1, r2, lr 314 .LVL29: 315 .LBB1042: 316 .LBB1015: 317 .loc 3 1202 0 318 010e DDE90667 ldrd r6, [sp, #24] 319 .LBE1015: ARM GAS /tmp/ccJrAs6S.s page 41 320 .LBE1042: 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += a1 * y[n-1] */ 321 .loc 2 636 0 322 0112 0E9A ldr r2, [sp, #56] 323 0114 119D ldr r5, [sp, #68] 324 0116 CDF838E0 str lr, [sp, #56] 325 .LVL30: 326 011a C5FB0201 smlal r0, r1, r5, r2 327 .LVL31: 328 .LBB1043: 329 .LBB1016: 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((q63_t) (x >> 32) * y) ) ); 330 .loc 3 1201 0 331 011e E217 asrs r2, r4, #31 332 .LVL32: 333 0120 0392 str r2, [sp, #12] 334 .loc 3 1202 0 335 0122 4D46 mov r5, r9 336 0124 3A46 mov r2, r7 337 0126 FC17 asrs r4, r7, #31 338 0128 02FB05F2 mul r2, r2, r5 339 012c 04FB0822 mla r2, r4, r8, r2 340 0130 A7FB0845 umull r4, r5, r7, r8 341 .LBE1016: 342 .LBE1043: 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += a2 * y[n-2] */ 343 .loc 2 638 0 344 0134 DDE90467 ldrd r6, [sp, #16] 345 0138 3618 adds r6, r6, r0 346 013a 4F41 adcs r7, r7, r1 347 013c 3046 mov r0, r6 348 .LVL33: 349 013e 3946 mov r1, r7 350 .LVL34: 351 .LBB1044: 352 .LBB1017: 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((q63_t) (x >> 32) * y) ) ); 353 .loc 3 1201 0 354 0140 DDE90267 ldrd r6, [sp, #8] 355 .loc 3 1202 0 356 0144 1544 add r5, r5, r2 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((q63_t) (x >> 32) * y) ) ); 357 .loc 3 1201 0 358 0146 3619 adds r6, r6, r4 359 .LBE1017: 360 .LBE1044: 361 .loc 2 653 0 362 0148 139A ldr r2, [sp, #76] 363 .LBB1045: 364 .LBB1018: 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((q63_t) (x >> 32) * y) ) ); 365 .loc 3 1201 0 366 014a 6F41 adcs r7, r7, r5 367 .LBE1018: 368 .LBE1045: 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 369 .loc 2 640 0 ARM GAS /tmp/ccJrAs6S.s page 42 370 014c 3618 adds r6, r6, r0 371 014e 4F41 adcs r7, r7, r1 372 .LVL35: 373 .loc 2 653 0 374 0150 06FA02F1 lsl r1, r6, r2 375 0154 129A ldr r2, [sp, #72] 376 0156 07FA0CF9 lsl r9, r7, ip 377 015a 26FA02F2 lsr r2, r6, r2 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Calc lower part of acc */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_l = acc & 0xffffffff; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Calc upper part of acc */ 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_h = (acc >> 32) & 0xffffffff; 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Apply shift for lower part of acc and upper part of acc */ 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; 378 .loc 2 662 0 379 015e 4846 mov r0, r9 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 380 .loc 2 653 0 381 0160 49EA0109 orr r9, r9, r1 382 .loc 2 662 0 383 0164 1043 orrs r0, r0, r2 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 384 .loc 2 653 0 385 0166 49EA0209 orr r9, r9, r2 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Store the output in the destination buffer in 1.31 format. */ 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pOut++ = acc_h; 386 .loc 2 665 0 387 016a 0C9A ldr r2, [sp, #48] 388 016c 42F8040B str r0, [r2], #4 389 0170 CDE906AB strd r10, [sp, #24] 390 0174 0C92 str r2, [sp, #48] 391 .LVL36: 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 392 .loc 2 624 0 393 0176 0D9A ldr r2, [sp, #52] 394 .LVL37: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b[2] * x[n-2] */ 395 .loc 2 634 0 396 0178 7546 mov r5, lr 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 397 .loc 2 624 0 398 017a 013A subs r2, r2, #1 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 399 .loc 2 653 0 400 017c 06FA0CF4 lsl r4, r6, ip 401 .LVL38: 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b1 * x[n-1] */ 402 .loc 2 632 0 403 0180 1846 mov r0, r3 404 .LVL39: 405 0182 4FEAE371 asr r1, r3, #31 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* acc += b[2] * x[n-2] */ 406 .loc 2 634 0 ARM GAS /tmp/ccJrAs6S.s page 43 407 0186 4FEAE576 asr r6, r5, #31 408 .LVL40: 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** { 409 .loc 2 624 0 410 018a 0D92 str r2, [sp, #52] 411 018c 7FF47CAF bne .L9 412 .LVL41: 413 0190 4B46 mov r3, r9 414 .LVL42: 415 0192 F046 mov r8, lr 416 0194 B146 mov r9, r6 417 .LVL43: 418 .L7: 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Yn1 = acc << shift; */ 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Store the output in the destination buffer in 1.31 format. */ 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* *pOut++ = (q31_t) (acc >> (32 - shift)); */ 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* decrement loop counter */ 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** sample--; 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** } 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* The first stage output is given as input to the second stage. */ 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pIn = pDst; 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Reset to destination buffer working pointer */ 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** pOut = pDst; 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** /* Store the updated state variables back into the pState array */ 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pState++ = (q63_t) Xn1; 419 .loc 2 682 0 420 0196 149A ldr r2, [sp, #80] 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pState++ = (q63_t) Xn2; 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pState++ = Yn1; 421 .loc 2 684 0 422 0198 42E90443 strd r4, r3, [r2, #-16] 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pState++ = Yn2; 423 .loc 2 685 0 424 019c 1346 mov r3, r2 425 019e 2033 adds r3, r3, #32 426 01a0 1493 str r3, [sp, #80] 427 .LVL44: 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 428 .loc 2 676 0 429 01a2 179B ldr r3, [sp, #92] 430 01a4 0B93 str r3, [sp, #44] 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pState++ = (q63_t) Xn2; 431 .loc 2 682 0 432 01a6 42E90801 strd r0, [r2, #-32] 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** } while (--stage); 433 .loc 2 687 0 434 01aa 169B ldr r3, [sp, #88] 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** *pState++ = Yn1; 435 .loc 2 683 0 436 01ac 42E90689 strd r8, [r2, #-24] 437 .LVL45: ARM GAS /tmp/ccJrAs6S.s page 44 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 438 .loc 2 685 0 439 01b0 42E902AB strd r10, [r2, #-8] 440 01b4 159A ldr r2, [sp, #84] 441 .LVL46: 442 .loc 2 687 0 443 01b6 013B subs r3, r3, #1 444 .LVL47: 445 01b8 02F11402 add r2, r2, #20 446 01bc 1592 str r2, [sp, #84] 447 01be 1693 str r3, [sp, #88] 448 01c0 7FF437AF bne .L8 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** } 449 .loc 2 689 0 450 01c4 1BB0 add sp, sp, #108 451 .LCFI3: 452 .cfi_remember_state 453 .cfi_def_cfa_offset 36 454 @ sp needed 455 01c6 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 456 .LVL48: 457 .L5: 458 .LCFI4: 459 .cfi_restore_state 460 01ca 7046 mov r0, lr 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** Yn2 = pState[3]; 461 .loc 2 443 0 462 01cc 5446 mov r4, r10 463 01ce 5B46 mov r3, fp 464 .LVL49: 465 01d0 C117 asrs r1, r0, #31 466 .LVL50: 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c **** 467 .loc 2 444 0 468 01d2 DDE906AB ldrd r10, [sp, #24] 469 .LVL51: 470 01d6 9046 mov r8, r2 471 01d8 4FEAE279 asr r9, r2, #31 472 01dc DBE7 b .L7 473 .cfi_endproc 474 .LFE149: 476 01de 00BF .section .text.arm_biquad_cascade_df1_f32,"ax",%progbits 477 .align 1 478 .p2align 2,,3 479 .global arm_biquad_cascade_df1_f32 480 .syntax unified 481 .thumb 482 .thumb_func 483 .fpu fpv4-sp-d16 485 arm_biquad_cascade_df1_f32: 486 .LFB150: 487 .file 4 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * Title: arm_biquad_cascade_df1_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * Description: Processing function for the floating-point Biquad cascade DirectFormI(DF1) filter ARM GAS /tmp/ccJrAs6S.s page 45 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** This set of functions implements arbitrary order recursive (IIR) filters. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The filters are implemented as a cascade of second order Biquad sections. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The functions support Q15, Q31 and floating-point data types. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Fast version of Q15 and Q31 also available. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The functions operate on blocks of input and output data and each call to the function 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** processes blockSize samples through the filter. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pSrc points to the array of input data and 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pDst points to the array of output data. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Both arrays contain blockSize values. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @par Algorithm 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Each Biquad stage implements a second order filter using the difference equation 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c ****       y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** A Direct Form I algorithm is used with 5 coefficients and 4 state variables per s 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** \image html Biquad.gif "Single Biquad filter stage" 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Coefficients b0, b1 and b2 multiply the input signal x[n]a1 and a2 multiply the output signal 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2] ARM GAS /tmp/ccJrAs6S.s page 46 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** In this case the feedback coefficients a1 and a2 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** must be negated when used with the CMSIS DSP Library. 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @par 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Higher order filters are realized as a cascade of second order sections. 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** numStages refers to the number of second order stages used. 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** For example, an 8th order filter would be realized with numStages=4 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** A 9th order filter would be realized with numStages=5 second order 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @par 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The pState points to state variables array. 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The state variables are arranged in the pState array as: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 
  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c ****       {x[n-1], x[n-2], y[n-1], y[n-2]}
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c ****
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @par 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The 4 state variables for stage 1 are first, then the 4 state variables for stag 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The state array has a total length of 4*numStages values. 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The state variables are updated after each block of data is processed, the coeff 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @par Instance Structure 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The coefficients and state variables for a filter are stored together in an inst 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** A separate instance structure must be defined for each filter. 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Coefficient arrays may be shared among several instances while state variable ar 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** There are separate instance structure declarations for each of the 3 supported d 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @par Init Function 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** There is also an associated initialization function for each data type. 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The initialization function performs following operations: 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** - Sets the values of the internal structure fields. 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** - Zeros out the values in the state buffer. 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** To do this manually without calling the init function, assign the follow subfiel 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** numStages, pCoeffs, pState. Also set all of the values in pState to zero. 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @par 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Use of the initialization function is optional. 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** However, if the initialization function is used, then the instance structure can 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** To place an instance structure into a const data section, the instance structure 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Set the values in the state buffer to zeros before static initialization. 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The code below statically initializes each of the 3 different data type filter i 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 
 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c ****       arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c ****       arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c ****       arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** where numStages is the number of Biquad stages in the filter; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pState is the address of the state buffer; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pCoeffs is the address of the coefficient buffer; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** postShift shift to be applied. 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @par Fixed-Point Behavior 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade fil 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Following issues must be considered: ARM GAS /tmp/ccJrAs6S.s page 47 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** - Scaling of coefficients 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** - Filter gain 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** - Overflow and saturation 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @par Scaling of coefficients 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Filter coefficients are represented as fractional values and 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coefficients are restricted to lie in the range [-1 +1). 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The fixed-point functions have an additional scaling parameter postShift[+1 -1). 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** At the output of the filter's accumulator is a shift register which shifts the r 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** This essentially scales the filter coefficients by 2^postShift. 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** For example, to realize the coefficients 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 
 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c ****      {1.5, -0.8, 1.2, 1.6, -0.9}
 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c ****
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** set the pCoeffs array to: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 
 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c ****      {0.75, -0.4, 0.6, 0.8, -0.45}
 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c ****
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** and set postShift=1 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @par Filter gain 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** The frequency response of a Biquad filter is a function of its coefficients. 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** It is possible for the gain through the filter to exceed 1.0 meaning that the fi 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** This means that an input signal with amplitude < 1.0 may result in an output > 1 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** To avoid this behavior the filter needs to be scaled down such that its peak gai 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @par Overflow and saturation 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** For Q15 and Q31 versions, it is described separately as part of the function spe 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @addtogroup BiquadCascadeDF1 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @{ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @brief Processing function for the floating-point Biquad cascade filter. 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @param[in] S points to an instance of the floating-point Biquad cascade structure 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @param[in] pSrc points to the block of input data 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @param[out] pDst points to the block of output data 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @param[in] blockSize number of samples to process 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** @return none 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** #include "arm_helium_utils.h" 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** void arm_biquad_cascade_df1_f32( 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** const arm_biquad_casd_df1_inst_f32 * S, 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** const float32_t * pSrc, 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t * pDst, 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** uint32_t blockSize) 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** const float32_t *pIn = pSrc; /* source pointer */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t *pOut = pDst; /* destination pointer */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t *pState = S->pState; /* pState pointer */ ARM GAS /tmp/ccJrAs6S.s page 48 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t lastX, lastY; /* X,Y history for tail handling */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t X0, X1, X2, X3; /* temporary input */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** f32x4_t coeffs; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** f32x4_t accVec; /* accumultor vector */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** uint32_t sample, stage = S->numStages; /* loop counters */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** do 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * Reading the pState values 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn1 = pState[0]; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn2 = pState[1]; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn1 = pState[2]; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn2 = pState[3]; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** sample = blockSize >> 2U; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * First part of the processing with loop unrolling. Compute 4 outputs at a time. 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * second loop below computes the remaining 1 to 3 samples. 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** while (sample > 0U) 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** X0 = *pIn++; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** X1 = *pIn++; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** X2 = *pIn++; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** X3 = *pIn++; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(pCoeffs); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vmulq(coeffs, X3); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[4]); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, X2); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[8]); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, X1); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[12]); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, X0); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[16]); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, Xn1); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[20]); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, Xn2); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[24]); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, Yn1); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[28]); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, Yn2); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * Store the result in the accumulator in the destination buffer. 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ ARM GAS /tmp/ccJrAs6S.s page 49 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** vst1q(pOut, accVec); 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pOut += 4; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * update recurrence 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn1 = X3; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn2 = X2; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn1 = vgetq_lane(accVec, 3); 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn2 = vgetq_lane(accVec, 2); 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * decrement the loop counter 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** sample--; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * If the blockSize is not a multiple of 4, 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * compute any remaining output samples here. 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** sample = blockSize & 0x3U; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** if (sample) 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* save previous X, Y for modulo 1 length case */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** lastX = X3; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** lastY = Yn1; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** X0 = *pIn++; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** X1 = *pIn++; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** X2 = *pIn++; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** X3 = *pIn++; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(pCoeffs); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vmulq(coeffs, X3); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[4]); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, X2); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[8]); 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, X1); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[12]); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, X0); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[16]); 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, Xn1); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[20]); 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, Xn2); 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[24]); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, Yn1); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** coeffs = vld1q(&pCoeffs[28]); 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** accVec = vfmaq(accVec, coeffs, Yn2); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** if (sample == 1) ARM GAS /tmp/ccJrAs6S.s page 50 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pOut++ = vgetq_lane(accVec, 0); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn1 = X0; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn2 = lastX; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn1 = vgetq_lane(accVec, 0); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn2 = lastY; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** else if (sample == 2) 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pOut++ = vgetq_lane(accVec, 0); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pOut++ = vgetq_lane(accVec, 1); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn1 = X1; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn2 = X0; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn1 = vgetq_lane(accVec, 1); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn2 = vgetq_lane(accVec, 0); 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** else 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pOut++ = vgetq_lane(accVec, 0); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pOut++ = vgetq_lane(accVec, 1); 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pOut++ = vgetq_lane(accVec, 2); 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn1 = X2; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn2 = X1; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn1 = vgetq_lane(accVec, 2); 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn2 = vgetq_lane(accVec, 1); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * Store the updated state variables back into the pState array 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pState++ = Xn1; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pState++ = Xn2; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pState++ = Yn1; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pState++ = Yn2; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pCoeffs += sizeof(arm_biquad_mod_coef_f32) / sizeof(float32_t); 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * The first stage goes from the input buffer to the output buffer. 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * Subsequent numStages occur in-place in the output buffer 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pIn = pDst; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * Reset the output pointer 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pOut = pDst; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * decrement the loop counter 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** stage--; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** while (stage > 0U); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** #else 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** void arm_biquad_cascade_df1_f32( 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** const arm_biquad_casd_df1_inst_f32 * S, 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** const float32_t * pSrc, ARM GAS /tmp/ccJrAs6S.s page 51 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t * pDst, 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** uint32_t blockSize) 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** const float32_t *pIn = pSrc; /* source pointer */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t *pOut = pDst; /* destination pointer */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t *pState = S->pState; /* pState pointer */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t acc; /* Simulates the accumulator */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** uint32_t sample, stage = S->numStages; /* loop counters */ 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32x4_t Xn; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32x2_t Yn; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32x2_t a; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32x4_t b; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32x4_t x,tmp; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32x2_t t; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32x2x2_t y; 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t Xns; 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** while (stage > 0U) 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Reading the coefficients */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn = vdupq_n_f32(0.0f); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn = vsetq_lane_f32(pState[0],Xn,2); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn = vsetq_lane_f32(pState[1],Xn,3); 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn = vset_lane_f32(pState[2],Yn,0); 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn = vset_lane_f32(pState[3],Yn,1); 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** b = vld1q_f32(pCoeffs); 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** b = vrev64q_f32(b); 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** b = vcombine_f32(vget_high_f32(b), vget_low_f32(b)); 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** a = vld1_f32(pCoeffs + 3); 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** a = vrev64_f32(a); 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** b = vsetq_lane_f32(0.0f,b,0); 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pCoeffs += 5; 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Reading the pState values */ 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Apply loop unrolling and compute 4 output values simultaneously. */ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* The variable acc hold output values that are being computed: 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** sample = blockSize >> 2U; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 52 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** while (sample > 0U) 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Read the first 4 inputs */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** x = vld1q_f32(pIn); 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pIn += 4; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** tmp = vextq_f32(Xn, x, 1); 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp)); 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp)); 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vmla_f32(t, a, Yn); 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vpadd_f32(t, t); 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn = vext_f32(Yn, t, 1); 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** tmp = vextq_f32(Xn, x, 2); 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp)); 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp)); 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vmla_f32(t, a, Yn); 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vpadd_f32(t, t); 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn = vext_f32(Yn, t, 1); 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** y.val[0] = Yn; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** tmp = vextq_f32(Xn, x, 3); 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp)); 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp)); 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vmla_f32(t, a, Yn); 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vpadd_f32(t, t); 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn = vext_f32(Yn, t, 1); 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn = x; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vmul_f32(vget_high_f32(b), vget_high_f32(Xn)); 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vmla_f32(t, vget_low_f32(b), vget_low_f32(Xn)); 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vmla_f32(t, a, Yn); 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** t = vpadd_f32(t, t); 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn = vext_f32(Yn, t, 1); 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** y.val[1] = Yn; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** tmp = vcombine_f32(y.val[0], y.val[1]); 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Store the 4 outputs and increment the pointer */ 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** vst1q_f32(pOut, tmp); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pOut += 4; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Decrement the loop counter */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** sample--; 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* If the block size is not a multiple of 4, compute any remaining output samples here. 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** ** No loop unrolling is used. */ 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** sample = blockSize & 0x3U; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** while (sample > 0U) 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Read the input */ ARM GAS /tmp/ccJrAs6S.s page 53 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xns = *pIn++; 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** acc = (vgetq_lane_f32(b, 1) * vgetq_lane_f32(Xn, 2)) 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** + (vgetq_lane_f32(b, 2) * vgetq_lane_f32(Xn, 3)) 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** + (vgetq_lane_f32(b, 3) * Xns) 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** + (vget_lane_f32(a, 0) * vget_lane_f32(Yn, 0)) 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** + (vget_lane_f32(a, 1) * vget_lane_f32(Yn, 1)); 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pOut++ = acc; 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Every time after the output is computed state should be updated. */ 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* The states should be updated as: */ 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Xn2 = Xn1 */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Xn1 = Xn */ 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Yn2 = Yn1 */ 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Yn1 = acc */ 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn = vsetq_lane_f32(vgetq_lane_f32(Xn, 3),Xn,2); 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn = vsetq_lane_f32(Xns,Xn,3); 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn = vset_lane_f32(vget_lane_f32(Yn, 1),Yn,0); 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn = vset_lane_f32(acc,Yn,1); 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Decrement the loop counter */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** sample--; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** vst1q_f32(pState,vcombine_f32((vget_high_f32(Xn)),(Yn))); 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pState += 4; 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Store the updated state variables back into the pState array */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* The first stage goes from the input buffer to the output buffer. */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Subsequent numStages occur in-place in the output buffer */ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pIn = pDst; 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Reset the output pointer */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pOut = pDst; 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Decrement the loop counter */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** stage--; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** #else 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** void arm_biquad_cascade_df1_f32( 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** const arm_biquad_casd_df1_inst_f32 * S, 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** const float32_t * pSrc, 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t * pDst, 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** uint32_t blockSize) 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 488 .loc 4 511 0 489 .cfi_startproc 490 @ args = 0, pretend = 0, frame = 0 491 @ frame_needed = 0, uses_anonymous_args = 0 492 @ link register save eliminated. 493 .LVL52: ARM GAS /tmp/ccJrAs6S.s page 54 494 0000 F0B4 push {r4, r5, r6, r7} 495 .LCFI5: 496 .cfi_def_cfa_offset 16 497 .cfi_offset 4, -16 498 .cfi_offset 5, -12 499 .cfi_offset 6, -8 500 .cfi_offset 7, -4 501 0002 D0E90156 ldrd r5, r6, [r0, #4] 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** const float32_t *pIn = pSrc; /* Source pointer */ 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t *pOut = pDst; /* Destination pointer */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t *pState = S->pState; /* pState pointer */ 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t acc; /* Accumulator */ 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** float32_t Xn; /* Temporary input */ 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** uint32_t sample, stage = S->numStages; /* Loop counters */ 502 .loc 4 520 0 503 0006 0768 ldr r7, [r0] 504 .LVL53: 505 0008 1436 adds r6, r6, #20 506 000a 1035 adds r5, r5, #16 507 .LVL54: 508 .L15: 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** do 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Reading the coefficients */ 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** b0 = *pCoeffs++; 509 .loc 4 525 0 510 000c 56ED054A vldr.32 s9, [r6, #-20] 511 .LVL55: 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** b1 = *pCoeffs++; 512 .loc 4 526 0 513 0010 16ED044A vldr.32 s8, [r6, #-16] 514 .LVL56: 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** b2 = *pCoeffs++; 515 .loc 4 527 0 516 0014 56ED033A vldr.32 s7, [r6, #-12] 517 .LVL57: 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** a1 = *pCoeffs++; 518 .loc 4 528 0 519 0018 16ED023A vldr.32 s6, [r6, #-8] 520 .LVL58: 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** a2 = *pCoeffs++; 521 .loc 4 529 0 522 001c 56ED012A vldr.32 s5, [r6, #-4] 523 .LVL59: 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Reading the pState values */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn1 = pState[0]; 524 .loc 4 532 0 525 0020 55ED046A vldr.32 s13, [r5, #-16] 526 .LVL60: 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn2 = pState[1]; 527 .loc 4 533 0 528 0024 55ED035A vldr.32 s11, [r5, #-12] ARM GAS /tmp/ccJrAs6S.s page 55 529 .LVL61: 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn1 = pState[2]; 530 .loc 4 534 0 531 0028 15ED027A vldr.32 s14, [r5, #-8] 532 .LVL62: 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn2 = pState[3]; 533 .loc 4 535 0 534 002c 15ED015A vldr.32 s10, [r5, #-4] 535 .LVL63: 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Apply loop unrolling and compute 4 output values simultaneously. */ 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Variable acc hold output values that are being computed: 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** */ 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** sample = blockSize >> 2U; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** while (sample > 0U) 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Read the first input */ 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn = *pIn++; 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2); 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Store output in destination buffer. */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pOut++ = Yn2; 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Every time after the output is computed state should be updated. */ 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* The states should be updated as: */ 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Xn2 = Xn1 */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Xn1 = Xn */ 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Yn2 = Yn1 */ 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Yn1 = acc */ 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Read the second input */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn2 = *pIn++; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1); 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Store output in destination buffer. */ 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pOut++ = Yn1; 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Every time after the output is computed state should be updated. */ 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* The states should be updated as: */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Xn2 = Xn1 */ 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Xn1 = Xn */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Yn2 = Yn1 */ 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Yn1 = acc */ ARM GAS /tmp/ccJrAs6S.s page 56 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Read the third input */ 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn1 = *pIn++; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2); 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Store output in destination buffer. */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pOut++ = Yn2; 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Every time after the output is computed state should be updated. */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* The states should be updated as: */ 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Xn2 = Xn1 */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Xn1 = Xn */ 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Yn2 = Yn1 */ 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Yn1 = acc */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Read the forth input */ 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn = *pIn++; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1); 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Store output in destination buffer. */ 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pOut++ = Yn1; 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Every time after the output is computed state should be updated. */ 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* The states should be updated as: */ 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Xn2 = Xn1 */ 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Xn1 = Xn */ 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Yn2 = Yn1 */ 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Yn1 = acc */ 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn2 = Xn1; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn1 = Xn; 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* decrement loop counter */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** sample--; 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Loop unrolling: Compute remaining outputs */ 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** sample = blockSize & 0x3U; 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** #else 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Initialize blkCnt with number of samples */ 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** sample = blockSize; 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** while (sample > 0U) 536 .loc 4 633 0 537 0030 5BB3 cbz r3, .L16 538 0032 1846 mov r0, r3 539 0034 1446 mov r4, r2 540 0036 03E0 b .L14 541 .LVL64: 542 .L17: ARM GAS /tmp/ccJrAs6S.s page 57 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Read the input */ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn = *pIn++; 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2); 543 .loc 4 639 0 544 0038 B0EE677A vmov.f32 s14, s15 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 545 .loc 4 636 0 546 003c F0EE466A vmov.f32 s13, s12 547 .LVL65: 548 .L14: 549 .loc 4 639 0 550 0040 63EEA57A vmul.f32 s15, s7, s11 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 551 .loc 4 636 0 552 0044 B1EC016A vldmia.32 r1!, {s12} 553 .LVL66: 554 .loc 4 639 0 555 0048 E4EE867A vfma.f32 s15, s9, s12 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 556 .loc 4 633 0 557 004c 0138 subs r0, r0, #1 558 .LVL67: 559 004e F0EE665A vmov.f32 s11, s13 560 .LVL68: 561 .loc 4 639 0 562 0052 E2EE857A vfma.f32 s15, s5, s10 563 0056 B0EE475A vmov.f32 s10, s14 564 .LVL69: 565 005a E4EE267A vfma.f32 s15, s8, s13 566 005e E3EE077A vfma.f32 s15, s6, s14 567 .LVL70: 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Store output in destination buffer. */ 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pOut++ = acc; 568 .loc 4 642 0 569 0062 E4EC017A vstmia.32 r4!, {s15} 570 .LVL71: 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** { 571 .loc 4 633 0 572 0066 E7D1 bne .L17 573 .LVL72: 574 .L13: 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Every time after the output is computed state should be updated. */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* The states should be updated as: */ 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Xn2 = Xn1 */ 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Xn1 = Xn */ 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Yn2 = Yn1 */ 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Yn1 = acc */ 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn2 = Xn1; 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn1 = Xn; 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn2 = Yn1; 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn1 = acc; 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 58 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* decrement loop counter */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** sample--; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Store the updated state variables back into the pState array */ 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pState++ = Xn1; 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pState++ = Xn2; 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pState++ = Yn1; 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pState++ = Yn2; 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* The first stage goes from the input buffer to the output buffer. */ 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Subsequent numStages occur in-place in the output buffer */ 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pIn = pDst; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* Reset output pointer */ 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** pOut = pDst; 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** /* decrement loop counter */ 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** stage--; 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } while (stage > 0U); 575 .loc 4 675 0 576 0068 013F subs r7, r7, #1 577 .LVL73: 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pState++ = Xn2; 578 .loc 4 660 0 579 006a 05ED046A vstr.32 s12, [r5, #-16] 580 .LVL74: 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pState++ = Yn1; 581 .loc 4 661 0 582 006e 45ED036A vstr.32 s13, [r5, #-12] 583 .LVL75: 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** *pState++ = Yn2; 584 .loc 4 662 0 585 0072 45ED027A vstr.32 s15, [r5, #-8] 586 .LVL76: 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 587 .loc 4 663 0 588 0076 05ED017A vstr.32 s14, [r5, #-4] 589 .LVL77: 590 007a 06F11406 add r6, r6, #20 591 .LVL78: 592 007e 05F11005 add r5, r5, #16 593 .LVL79: 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 594 .loc 4 667 0 595 0082 1146 mov r1, r2 596 .loc 4 675 0 597 0084 C2D1 bne .L15 598 .LVL80: 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** } 599 .loc 4 677 0 600 0086 F0BC pop {r4, r5, r6, r7} 601 .LCFI6: 602 .cfi_remember_state 603 .cfi_restore 7 ARM GAS /tmp/ccJrAs6S.s page 59 604 .cfi_restore 6 605 .cfi_restore 5 606 .cfi_restore 4 607 .cfi_def_cfa_offset 0 608 .LVL81: 609 0088 7047 bx lr 610 .LVL82: 611 .L16: 612 .LCFI7: 613 .cfi_restore_state 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn2 = pState[3]; 614 .loc 4 534 0 615 008a F0EE477A vmov.f32 s15, s14 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Xn2 = pState[1]; 616 .loc 4 532 0 617 008e B0EE666A vmov.f32 s12, s13 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** 618 .loc 4 535 0 619 0092 B0EE457A vmov.f32 s14, s10 620 .LVL83: 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c **** Yn1 = pState[2]; 621 .loc 4 533 0 622 0096 F0EE656A vmov.f32 s13, s11 623 .LVL84: 624 009a E5E7 b .L13 625 .cfi_endproc 626 .LFE150: 628 .section .text.arm_biquad_cascade_df1_fast_q15,"ax",%progbits 629 .align 1 630 .p2align 2,,3 631 .global arm_biquad_cascade_df1_fast_q15 632 .syntax unified 633 .thumb 634 .thumb_func 635 .fpu fpv4-sp-d16 637 arm_biquad_cascade_df1_fast_q15: 638 .LFB151: 639 .file 5 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * Title: arm_biquad_cascade_df1_fast_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * Description: Fast processing function for the Q15 Biquad cascade filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * ARM GAS /tmp/ccJrAs6S.s page 60 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** @addtogroup BiquadCascadeDF1 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** @brief Processing function for the Q15 Biquad cascade filter (fast variant). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** @param[in] S points to an instance of the Q15 Biquad cascade structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** @param[in] blockSize number of samples to process per call 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** This fast version uses a 32-bit accumulator with 2.30 format. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** The accumulator maintains full precision of the intermediate multiplication resu 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** Thus, if the accumulator result overflows it wraps around and distorts the resul 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** In order to avoid overflows completely the input signal must be scaled down by t 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** The 2.30 accumulator is then shifted by postShift bits and the resu 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** @remark 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** Refer to \ref arm_biquad_cascade_df1_q15() for a slower implementation of this f 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** which uses 64-bit accumulation to avoid wrap around distortion. Both the slow an 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** Use the function \ref arm_biquad_cascade_df1_init_q15() to initialize the filter 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** void arm_biquad_cascade_df1_fast_q15( 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** const arm_biquad_casd_df1_inst_q15 * S, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** const q15_t * pSrc, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** q15_t * pDst, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** uint32_t blockSize) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** { 640 .loc 5 65 0 641 .cfi_startproc 642 @ args = 0, pretend = 0, frame = 16 643 @ frame_needed = 0, uses_anonymous_args = 0 644 .LVL85: 645 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 646 .LCFI8: 647 .cfi_def_cfa_offset 36 648 .cfi_offset 4, -36 649 .cfi_offset 5, -32 650 .cfi_offset 6, -28 ARM GAS /tmp/ccJrAs6S.s page 61 651 .cfi_offset 7, -24 652 .cfi_offset 8, -20 653 .cfi_offset 9, -16 654 .cfi_offset 10, -12 655 .cfi_offset 11, -8 656 .cfi_offset 14, -4 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** const q15_t *pIn = pSrc; /* Source pointer */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** q15_t *pOut = pDst; /* Destination pointer */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** q15_t *pState = S->pState; /* State pointer */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 657 .loc 5 69 0 658 0004 D0E90189 ldrd r8, r9, [r0, #4] 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** q31_t acc; /* Accumulator */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** q31_t in; /* Temporary variable to hold input value */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** q31_t out; /* Temporary variable to hold output value * 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** q31_t b0; /* Temporary variable to hold bo value */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** q31_t b1, a1; /* Filter coefficients */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** q31_t state_in, state_out; /* Filter state variables */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** int32_t shift = (int32_t) (15 - S->postShift); /* Post shift */ 659 .loc 5 76 0 660 0008 90F90CB0 ldrsb fp, [r0, #12] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** uint32_t sample, stage = S->numStages; /* Loop counters */ 661 .loc 5 77 0 662 000c 90F90000 ldrsb r0, [r0] 663 .LVL86: 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** const q15_t *pIn = pSrc; /* Source pointer */ 664 .loc 5 65 0 665 0010 85B0 sub sp, sp, #20 666 .LCFI9: 667 .cfi_def_cfa_offset 56 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** const q15_t *pIn = pSrc; /* Source pointer */ 668 .loc 5 65 0 669 0012 CDE90102 strd r0, r2, [sp, #4] 670 .LVL87: 671 0016 0393 str r3, [sp, #12] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** uint32_t sample, stage = S->numStages; /* Loop counters */ 672 .loc 5 76 0 673 0018 CBF10F0B rsb fp, fp, #15 674 .LVL88: 675 .L23: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** do 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Read the b0 and 0 coefficients using SIMD */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** b0 = read_q15x2_ia ((q15_t **) &pCoeffs); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Read the b1 and b2 coefficients using SIMD */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** b1 = read_q15x2_ia ((q15_t **) &pCoeffs); 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Read the a1 and a2 coefficients using SIMD */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** a1 = read_q15x2_ia ((q15_t **) &pCoeffs); 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Read the input state values from the state buffer: x[n-1], x[n-2] */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_in = read_q15x2_ia (&pState); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Read the output state values from the state buffer: y[n-1], y[n-2] */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_out = read_q15x2_da (&pState); ARM GAS /tmp/ccJrAs6S.s page 62 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Apply loop unrolling and compute 2 output values simultaneously. */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Variable acc hold output values that are being computed: 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Loop unrolling: Compute 2 outputs at a time */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** sample = blockSize >> 1U; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** while (sample > 0U) 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** { 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Read the input */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** in = read_q15x2_ia ((q15_t **) &pIn); 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* out = b0 * x[n] + 0 * 0 */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** out = __SMUAD(b0, in); 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* acc = b1 * x[n-1] + acc += b2 * x[n-2] + out */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** acc = __SMLAD(b1, state_in, out); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** acc = __SMLAD(a1, state_out, acc); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* The result is converted from 3.29 to 1.31 and then saturation is applied */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** out = __SSAT((acc >> shift), 16); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Every time after the output is computed state should be updated. */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* The states should be updated as: */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Xn2 = Xn1 */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Xn1 = Xn */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Yn2 = Yn1 */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Yn1 = acc */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_in = __PKHBT(in, state_in, 16); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_out = __PKHBT(out, state_out, 16); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #else 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_in = __PKHBT(state_in >> 16, (in >> 16), 16); 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_out = __PKHBT(state_out >> 16, (out), 16); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* out = b0 * x[n] + 0 * 0 */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** out = __SMUADX(b0, in); 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* acc0 = b1 * x[n-1] , acc0 += b2 * x[n-2] + out */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** acc = __SMLAD(b1, state_in, out); 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** acc = __SMLAD(a1, state_out, acc); 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* The result is converted from 3.29 to 1.31 and then saturation is applied */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** out = __SSAT((acc >> shift), 16); 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Store the output in the destination buffer. */ ARM GAS /tmp/ccJrAs6S.s page 63 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16)); 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #else 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16)); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Every time after the output is computed state should be updated. */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* The states should be updated as: */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Xn2 = Xn1 */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Xn1 = Xn */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Yn2 = Yn1 */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Yn1 = acc */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_in = __PKHBT(in >> 16, state_in, 16); 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_out = __PKHBT(out, state_out, 16); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #else 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_in = __PKHBT(state_in >> 16, in, 16); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_out = __PKHBT(state_out >> 16, out, 16); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Decrement loop counter */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** sample--; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** } 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Loop unrolling: Compute remaining outputs */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** sample = (blockSize & 0x1U); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #else 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Initialize blkCnt with number of samples */ 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** sample = blockSize; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** while (sample > 0U) 676 .loc 5 188 0 677 001c 039B ldr r3, [sp, #12] 678 .LBB1046: 679 .LBB1047: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 680 .loc 3 928 0 681 001e D9F800A0 ldr r10, [r9] @ unaligned 682 .LVL89: 683 .LBE1047: 684 .LBE1046: 685 .LBB1048: 686 .LBB1049: 687 0022 D9F804E0 ldr lr, [r9, #4] @ unaligned 688 .LVL90: 689 .LBE1049: 690 .LBE1048: 691 .LBB1050: 692 .LBB1051: 693 0026 D9F808C0 ldr ip, [r9, #8] @ unaligned 694 .LVL91: ARM GAS /tmp/ccJrAs6S.s page 64 695 .LBE1051: 696 .LBE1050: 697 .LBB1052: 698 .LBB1053: 699 002a D8F80040 ldr r4, [r8] @ unaligned 700 .LBE1053: 701 .LBE1052: 702 .LBB1054: 703 .LBB1055: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 704 .loc 3 948 0 705 002e D8F80400 ldr r0, [r8, #4] @ unaligned 706 0032 09F10C09 add r9, r9, #12 707 .LVL92: 708 .LBE1055: 709 .LBE1054: 710 .loc 5 188 0 711 0036 BBB1 cbz r3, .L21 712 0038 029E ldr r6, [sp, #8] 713 003a 1D46 mov r5, r3 714 .LVL93: 715 .L22: 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** { 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Read the input */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** in = *pIn++; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* out = b0 * x[n] + 0 * 0 */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** out = __SMUAD(b0, in); 716 .loc 5 195 0 717 003c 31F9022B ldrsh r2, [r1], #2 718 .LVL94: 719 .LBB1056: 720 .LBB1057: 721 .file 6 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. ARM GAS /tmp/ccJrAs6S.s page 65 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push ARM GAS /tmp/ccJrAs6S.s page 66 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER 117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory") 118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 119:Drivers/CMSIS/Include/cmsis_gcc.h **** 120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */ 121:Drivers/CMSIS/Include/cmsis_gcc.h **** 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss 127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly 128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script. 129:Drivers/CMSIS/Include/cmsis_gcc.h **** 130:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) 132:Drivers/CMSIS/Include/cmsis_gcc.h **** { 133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN; 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src; ARM GAS /tmp/ccJrAs6S.s page 67 137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t; 140:Drivers/CMSIS/Include/cmsis_gcc.h **** 141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t; 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__; 147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__; 148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__; 149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__; 150:Drivers/CMSIS/Include/cmsis_gcc.h **** 151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable 152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i]; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** } 155:Drivers/CMSIS/Include/cmsis_gcc.h **** } 156:Drivers/CMSIS/Include/cmsis_gcc.h **** 157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable 158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u; 160:Drivers/CMSIS/Include/cmsis_gcc.h **** } 161:Drivers/CMSIS/Include/cmsis_gcc.h **** } 162:Drivers/CMSIS/Include/cmsis_gcc.h **** 163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start(); 164:Drivers/CMSIS/Include/cmsis_gcc.h **** } 165:Drivers/CMSIS/Include/cmsis_gcc.h **** 166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start 167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 168:Drivers/CMSIS/Include/cmsis_gcc.h **** 169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP 170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop 171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 172:Drivers/CMSIS/Include/cmsis_gcc.h **** 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT 174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit 175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE 178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE 182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors"))) 183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 184:Drivers/CMSIS/Include/cmsis_gcc.h **** 185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 189:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 190:Drivers/CMSIS/Include/cmsis_gcc.h **** 191:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. ARM GAS /tmp/ccJrAs6S.s page 68 194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 195:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 197:Drivers/CMSIS/Include/cmsis_gcc.h **** { 198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 199:Drivers/CMSIS/Include/cmsis_gcc.h **** } 200:Drivers/CMSIS/Include/cmsis_gcc.h **** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** 202:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 206:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 208:Drivers/CMSIS/Include/cmsis_gcc.h **** { 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** } 211:Drivers/CMSIS/Include/cmsis_gcc.h **** 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 217:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 219:Drivers/CMSIS/Include/cmsis_gcc.h **** { 220:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 221:Drivers/CMSIS/Include/cmsis_gcc.h **** 222:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 223:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** } 225:Drivers/CMSIS/Include/cmsis_gcc.h **** 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 246:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 247:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 249:Drivers/CMSIS/Include/cmsis_gcc.h **** { 250:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); ARM GAS /tmp/ccJrAs6S.s page 69 251:Drivers/CMSIS/Include/cmsis_gcc.h **** } 252:Drivers/CMSIS/Include/cmsis_gcc.h **** 253:Drivers/CMSIS/Include/cmsis_gcc.h **** 254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 255:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 259:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 261:Drivers/CMSIS/Include/cmsis_gcc.h **** { 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 263:Drivers/CMSIS/Include/cmsis_gcc.h **** } 264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** 267:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 268:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 269:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 270:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 271:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 273:Drivers/CMSIS/Include/cmsis_gcc.h **** { 274:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 275:Drivers/CMSIS/Include/cmsis_gcc.h **** 276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 277:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 278:Drivers/CMSIS/Include/cmsis_gcc.h **** } 279:Drivers/CMSIS/Include/cmsis_gcc.h **** 280:Drivers/CMSIS/Include/cmsis_gcc.h **** 281:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 283:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 284:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 285:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 287:Drivers/CMSIS/Include/cmsis_gcc.h **** { 288:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 289:Drivers/CMSIS/Include/cmsis_gcc.h **** 290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 299:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 301:Drivers/CMSIS/Include/cmsis_gcc.h **** { 302:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 303:Drivers/CMSIS/Include/cmsis_gcc.h **** 304:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 305:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** } 307:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccJrAs6S.s page 70 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 313:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 315:Drivers/CMSIS/Include/cmsis_gcc.h **** { 316:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 317:Drivers/CMSIS/Include/cmsis_gcc.h **** 318:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 319:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 320:Drivers/CMSIS/Include/cmsis_gcc.h **** } 321:Drivers/CMSIS/Include/cmsis_gcc.h **** 322:Drivers/CMSIS/Include/cmsis_gcc.h **** 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 324:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 326:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 328:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 330:Drivers/CMSIS/Include/cmsis_gcc.h **** { 331:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 332:Drivers/CMSIS/Include/cmsis_gcc.h **** 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 335:Drivers/CMSIS/Include/cmsis_gcc.h **** } 336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 337:Drivers/CMSIS/Include/cmsis_gcc.h **** 338:Drivers/CMSIS/Include/cmsis_gcc.h **** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 342:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 343:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 345:Drivers/CMSIS/Include/cmsis_gcc.h **** { 346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 347:Drivers/CMSIS/Include/cmsis_gcc.h **** } 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 359:Drivers/CMSIS/Include/cmsis_gcc.h **** } 360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 361:Drivers/CMSIS/Include/cmsis_gcc.h **** 362:Drivers/CMSIS/Include/cmsis_gcc.h **** 363:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer ARM GAS /tmp/ccJrAs6S.s page 71 365:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 367:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 369:Drivers/CMSIS/Include/cmsis_gcc.h **** { 370:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 371:Drivers/CMSIS/Include/cmsis_gcc.h **** 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 374:Drivers/CMSIS/Include/cmsis_gcc.h **** } 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 378:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 381:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 382:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 384:Drivers/CMSIS/Include/cmsis_gcc.h **** { 385:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 386:Drivers/CMSIS/Include/cmsis_gcc.h **** 387:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 389:Drivers/CMSIS/Include/cmsis_gcc.h **** } 390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 391:Drivers/CMSIS/Include/cmsis_gcc.h **** 392:Drivers/CMSIS/Include/cmsis_gcc.h **** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 396:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 397:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 399:Drivers/CMSIS/Include/cmsis_gcc.h **** { 400:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 401:Drivers/CMSIS/Include/cmsis_gcc.h **** } 402:Drivers/CMSIS/Include/cmsis_gcc.h **** 403:Drivers/CMSIS/Include/cmsis_gcc.h **** 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 405:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 407:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 409:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 411:Drivers/CMSIS/Include/cmsis_gcc.h **** { 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 413:Drivers/CMSIS/Include/cmsis_gcc.h **** } 414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 415:Drivers/CMSIS/Include/cmsis_gcc.h **** 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 418:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 419:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value ARM GAS /tmp/ccJrAs6S.s page 72 422:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 424:Drivers/CMSIS/Include/cmsis_gcc.h **** { 425:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 426:Drivers/CMSIS/Include/cmsis_gcc.h **** 427:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 428:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 429:Drivers/CMSIS/Include/cmsis_gcc.h **** } 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** 432:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 433:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 436:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 438:Drivers/CMSIS/Include/cmsis_gcc.h **** { 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 440:Drivers/CMSIS/Include/cmsis_gcc.h **** } 441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 442:Drivers/CMSIS/Include/cmsis_gcc.h **** 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 448:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 450:Drivers/CMSIS/Include/cmsis_gcc.h **** { 451:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 452:Drivers/CMSIS/Include/cmsis_gcc.h **** 453:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 454:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 455:Drivers/CMSIS/Include/cmsis_gcc.h **** } 456:Drivers/CMSIS/Include/cmsis_gcc.h **** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** 458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 459:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 463:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 465:Drivers/CMSIS/Include/cmsis_gcc.h **** { 466:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 467:Drivers/CMSIS/Include/cmsis_gcc.h **** 468:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 469:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 470:Drivers/CMSIS/Include/cmsis_gcc.h **** } 471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 472:Drivers/CMSIS/Include/cmsis_gcc.h **** 473:Drivers/CMSIS/Include/cmsis_gcc.h **** 474:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 475:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 476:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 477:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 478:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/ccJrAs6S.s page 73 479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 480:Drivers/CMSIS/Include/cmsis_gcc.h **** { 481:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** 498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 499:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 500:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 501:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 502:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 504:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 505:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 507:Drivers/CMSIS/Include/cmsis_gcc.h **** { 508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 509:Drivers/CMSIS/Include/cmsis_gcc.h **** } 510:Drivers/CMSIS/Include/cmsis_gcc.h **** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** 512:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 515:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 516:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 518:Drivers/CMSIS/Include/cmsis_gcc.h **** { 519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 520:Drivers/CMSIS/Include/cmsis_gcc.h **** } 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 526:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 527:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 529:Drivers/CMSIS/Include/cmsis_gcc.h **** { 530:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 531:Drivers/CMSIS/Include/cmsis_gcc.h **** 532:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 534:Drivers/CMSIS/Include/cmsis_gcc.h **** } 535:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccJrAs6S.s page 74 536:Drivers/CMSIS/Include/cmsis_gcc.h **** 537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 538:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 541:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 542:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 544:Drivers/CMSIS/Include/cmsis_gcc.h **** { 545:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 546:Drivers/CMSIS/Include/cmsis_gcc.h **** 547:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 549:Drivers/CMSIS/Include/cmsis_gcc.h **** } 550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 556:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 557:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 559:Drivers/CMSIS/Include/cmsis_gcc.h **** { 560:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 561:Drivers/CMSIS/Include/cmsis_gcc.h **** } 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** 564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 565:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 568:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 569:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 571:Drivers/CMSIS/Include/cmsis_gcc.h **** { 572:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 573:Drivers/CMSIS/Include/cmsis_gcc.h **** } 574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 575:Drivers/CMSIS/Include/cmsis_gcc.h **** 576:Drivers/CMSIS/Include/cmsis_gcc.h **** 577:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 578:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 579:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 580:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 581:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 582:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 584:Drivers/CMSIS/Include/cmsis_gcc.h **** { 585:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 586:Drivers/CMSIS/Include/cmsis_gcc.h **** } 587:Drivers/CMSIS/Include/cmsis_gcc.h **** 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 591:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 592:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value ARM GAS /tmp/ccJrAs6S.s page 75 593:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 595:Drivers/CMSIS/Include/cmsis_gcc.h **** { 596:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 597:Drivers/CMSIS/Include/cmsis_gcc.h **** 598:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 599:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 600:Drivers/CMSIS/Include/cmsis_gcc.h **** } 601:Drivers/CMSIS/Include/cmsis_gcc.h **** 602:Drivers/CMSIS/Include/cmsis_gcc.h **** 603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 604:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 608:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 610:Drivers/CMSIS/Include/cmsis_gcc.h **** { 611:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 612:Drivers/CMSIS/Include/cmsis_gcc.h **** 613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 614:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 615:Drivers/CMSIS/Include/cmsis_gcc.h **** } 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 617:Drivers/CMSIS/Include/cmsis_gcc.h **** 618:Drivers/CMSIS/Include/cmsis_gcc.h **** 619:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 620:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 621:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 622:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 623:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 625:Drivers/CMSIS/Include/cmsis_gcc.h **** { 626:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 627:Drivers/CMSIS/Include/cmsis_gcc.h **** } 628:Drivers/CMSIS/Include/cmsis_gcc.h **** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** 630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 631:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 635:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 637:Drivers/CMSIS/Include/cmsis_gcc.h **** { 638:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 639:Drivers/CMSIS/Include/cmsis_gcc.h **** } 640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 641:Drivers/CMSIS/Include/cmsis_gcc.h **** 642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 643:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 644:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 645:Drivers/CMSIS/Include/cmsis_gcc.h **** 646:Drivers/CMSIS/Include/cmsis_gcc.h **** 647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 648:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 649:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccJrAs6S.s page 76 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 654:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 655:Drivers/CMSIS/Include/cmsis_gcc.h **** 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 657:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 658:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 660:Drivers/CMSIS/Include/cmsis_gcc.h **** { 661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 663:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 664:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 666:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 667:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 668:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 670:Drivers/CMSIS/Include/cmsis_gcc.h **** } 671:Drivers/CMSIS/Include/cmsis_gcc.h **** 672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 673:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 675:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 676:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 677:Drivers/CMSIS/Include/cmsis_gcc.h **** 678:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 679:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 680:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 682:Drivers/CMSIS/Include/cmsis_gcc.h **** { 683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 684:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 685:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 687:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 691:Drivers/CMSIS/Include/cmsis_gcc.h **** } 692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 693:Drivers/CMSIS/Include/cmsis_gcc.h **** 694:Drivers/CMSIS/Include/cmsis_gcc.h **** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 696:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 698:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 699:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 700:Drivers/CMSIS/Include/cmsis_gcc.h **** 701:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 702:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 703:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** { 706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ ARM GAS /tmp/ccJrAs6S.s page 77 707:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 708:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 709:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 711:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 713:Drivers/CMSIS/Include/cmsis_gcc.h **** } 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 717:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 718:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 728:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 729:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 733:Drivers/CMSIS/Include/cmsis_gcc.h **** } 734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 738:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 739:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 749:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 750:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 751:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 754:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 755:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 757:Drivers/CMSIS/Include/cmsis_gcc.h **** } 758:Drivers/CMSIS/Include/cmsis_gcc.h **** 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 763:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure ARM GAS /tmp/ccJrAs6S.s page 78 764:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 765:Drivers/CMSIS/Include/cmsis_gcc.h **** 766:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 767:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 768:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** { 771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 773:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 775:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 776:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 777:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 779:Drivers/CMSIS/Include/cmsis_gcc.h **** } 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** 782:Drivers/CMSIS/Include/cmsis_gcc.h **** 783:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 784:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 785:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 786:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 787:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 788:Drivers/CMSIS/Include/cmsis_gcc.h **** 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 797:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 799:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 801:Drivers/CMSIS/Include/cmsis_gcc.h **** } 802:Drivers/CMSIS/Include/cmsis_gcc.h **** 803:Drivers/CMSIS/Include/cmsis_gcc.h **** 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 805:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 806:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 807:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 808:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 811:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 812:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 814:Drivers/CMSIS/Include/cmsis_gcc.h **** { 815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 816:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 817:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccJrAs6S.s page 79 821:Drivers/CMSIS/Include/cmsis_gcc.h **** } 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 823:Drivers/CMSIS/Include/cmsis_gcc.h **** 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 825:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 826:Drivers/CMSIS/Include/cmsis_gcc.h **** 827:Drivers/CMSIS/Include/cmsis_gcc.h **** 828:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 829:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 830:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 831:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 832:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 834:Drivers/CMSIS/Include/cmsis_gcc.h **** { 835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 840:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 841:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 843:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 846:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 849:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 851:Drivers/CMSIS/Include/cmsis_gcc.h **** } 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 856:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 857:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 858:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 860:Drivers/CMSIS/Include/cmsis_gcc.h **** { 861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 866:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 867:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 869:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 872:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 874:Drivers/CMSIS/Include/cmsis_gcc.h **** } 875:Drivers/CMSIS/Include/cmsis_gcc.h **** 876:Drivers/CMSIS/Include/cmsis_gcc.h **** 877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ ARM GAS /tmp/ccJrAs6S.s page 80 878:Drivers/CMSIS/Include/cmsis_gcc.h **** 879:Drivers/CMSIS/Include/cmsis_gcc.h **** 880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 882:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 883:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 884:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 885:Drivers/CMSIS/Include/cmsis_gcc.h **** 886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 888:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 898:Drivers/CMSIS/Include/cmsis_gcc.h **** 899:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 902:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 904:Drivers/CMSIS/Include/cmsis_gcc.h **** 905:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 906:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 907:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 908:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 910:Drivers/CMSIS/Include/cmsis_gcc.h **** 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 915:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 916:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 918:Drivers/CMSIS/Include/cmsis_gcc.h **** 919:Drivers/CMSIS/Include/cmsis_gcc.h **** 920:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 921:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 922:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 923:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 925:Drivers/CMSIS/Include/cmsis_gcc.h **** 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 930:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 931:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 932:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 934:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS /tmp/ccJrAs6S.s page 81 935:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 936:Drivers/CMSIS/Include/cmsis_gcc.h **** } 937:Drivers/CMSIS/Include/cmsis_gcc.h **** 938:Drivers/CMSIS/Include/cmsis_gcc.h **** 939:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 940:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 941:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 942:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 943:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 945:Drivers/CMSIS/Include/cmsis_gcc.h **** { 946:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 947:Drivers/CMSIS/Include/cmsis_gcc.h **** } 948:Drivers/CMSIS/Include/cmsis_gcc.h **** 949:Drivers/CMSIS/Include/cmsis_gcc.h **** 950:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 954:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 956:Drivers/CMSIS/Include/cmsis_gcc.h **** { 957:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 958:Drivers/CMSIS/Include/cmsis_gcc.h **** } 959:Drivers/CMSIS/Include/cmsis_gcc.h **** 960:Drivers/CMSIS/Include/cmsis_gcc.h **** 961:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 962:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 963:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 964:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 965:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 966:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 968:Drivers/CMSIS/Include/cmsis_gcc.h **** { 969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 970:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 972:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 975:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 977:Drivers/CMSIS/Include/cmsis_gcc.h **** } 978:Drivers/CMSIS/Include/cmsis_gcc.h **** 979:Drivers/CMSIS/Include/cmsis_gcc.h **** 980:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 981:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 983:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 984:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 985:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 987:Drivers/CMSIS/Include/cmsis_gcc.h **** { 988:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 989:Drivers/CMSIS/Include/cmsis_gcc.h **** 990:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 991:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; ARM GAS /tmp/ccJrAs6S.s page 82 992:Drivers/CMSIS/Include/cmsis_gcc.h **** } 993:Drivers/CMSIS/Include/cmsis_gcc.h **** 994:Drivers/CMSIS/Include/cmsis_gcc.h **** 995:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 996:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 997:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 998:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 999:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 1002:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1004:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1011:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1012:Drivers/CMSIS/Include/cmsis_gcc.h **** 1013:Drivers/CMSIS/Include/cmsis_gcc.h **** 1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1015:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 1016:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 1017:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 1018:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 1020:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 1022:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1023:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1026:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 1027:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1028:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 1029:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1030:Drivers/CMSIS/Include/cmsis_gcc.h **** 1031:Drivers/CMSIS/Include/cmsis_gcc.h **** 1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1033:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 1034:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 1035:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 1036:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 1040:Drivers/CMSIS/Include/cmsis_gcc.h **** 1041:Drivers/CMSIS/Include/cmsis_gcc.h **** 1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 1045:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 1046:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1047:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) ARM GAS /tmp/ccJrAs6S.s page 83 1049:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1051:Drivers/CMSIS/Include/cmsis_gcc.h **** 1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1053:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1054:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 1058:Drivers/CMSIS/Include/cmsis_gcc.h **** 1059:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 1060:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 1061:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1062:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value 1077:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) 1079:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1080:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally 1081:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially. 1082:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM 1083:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any 1084:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it 1085:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero". 1086:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a 1087:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction. 1088:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** if (value == 0U) 1090:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** return 32U; 1092:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_clz(value); 1094:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1095:Drivers/CMSIS/Include/cmsis_gcc.h **** 1096:Drivers/CMSIS/Include/cmsis_gcc.h **** 1097:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1098:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1099:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1100:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 1101:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1102:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (8 bit) 1103:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value. 1104:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1105:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) ARM GAS /tmp/ccJrAs6S.s page 84 1106:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1107:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) 1108:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1109:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1110:Drivers/CMSIS/Include/cmsis_gcc.h **** 1111:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1112:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); 1113:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1114:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1115:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1116:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit) 1125:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 16 bit values. 1126:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1127:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) 1130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1131:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1132:Drivers/CMSIS/Include/cmsis_gcc.h **** 1133:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1134:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); 1135:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1136:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1137:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1138:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1139:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1140:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1141:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ 1142:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1143:Drivers/CMSIS/Include/cmsis_gcc.h **** 1144:Drivers/CMSIS/Include/cmsis_gcc.h **** 1145:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1146:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit) 1147:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values. 1148:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) 1152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1154:Drivers/CMSIS/Include/cmsis_gcc.h **** 1155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 1156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1157:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1158:Drivers/CMSIS/Include/cmsis_gcc.h **** 1159:Drivers/CMSIS/Include/cmsis_gcc.h **** 1160:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1161:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit) 1162:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values. ARM GAS /tmp/ccJrAs6S.s page 85 1163:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1164:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1165:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1166:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1167:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1168:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) 1169:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1170:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1171:Drivers/CMSIS/Include/cmsis_gcc.h **** 1172:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); 1173:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1174:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1175:Drivers/CMSIS/Include/cmsis_gcc.h **** 1176:Drivers/CMSIS/Include/cmsis_gcc.h **** 1177:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1178:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit) 1179:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values. 1180:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1181:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1182:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1183:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1184:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1185:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) 1186:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1187:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1188:Drivers/CMSIS/Include/cmsis_gcc.h **** 1189:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); 1190:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1191:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1192:Drivers/CMSIS/Include/cmsis_gcc.h **** 1193:Drivers/CMSIS/Include/cmsis_gcc.h **** 1194:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1195:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit) 1196:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values. 1197:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1198:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1199:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1200:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1201:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1202:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) 1203:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1204:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1205:Drivers/CMSIS/Include/cmsis_gcc.h **** 1206:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 1207:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1208:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1209:Drivers/CMSIS/Include/cmsis_gcc.h **** 1210:Drivers/CMSIS/Include/cmsis_gcc.h **** 1211:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1212:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Remove the exclusive lock 1213:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Removes the exclusive lock which is created by LDREX. 1214:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1215:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __CLREX(void) 1216:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1217:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("clrex" ::: "memory"); 1218:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1219:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccJrAs6S.s page 86 1220:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1221:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1222:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1223:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 1224:Drivers/CMSIS/Include/cmsis_gcc.h **** 1225:Drivers/CMSIS/Include/cmsis_gcc.h **** 1226:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1227:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1228:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 1229:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1230:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate 1231:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value. 1232:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated 1233:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (1..32) 1234:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1235:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1236:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SSAT(ARG1,ARG2) \ 1237:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \ 1238:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1239:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t __RES, __ARG1 = (ARG1); \ 1240:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1241:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1242:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1243:Drivers/CMSIS/Include/cmsis_gcc.h **** 1244:Drivers/CMSIS/Include/cmsis_gcc.h **** 1245:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1246:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate 1247:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value. 1248:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated 1249:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (0..31) 1250:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1251:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1252:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT(ARG1,ARG2) \ 1253:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \ 1254:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1255:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \ 1256:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1257:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1258:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1259:Drivers/CMSIS/Include/cmsis_gcc.h **** 1260:Drivers/CMSIS/Include/cmsis_gcc.h **** 1261:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1262:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right with Extend (32 bit) 1263:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Moves each bit of a bitstring right by one bit. 1264:Drivers/CMSIS/Include/cmsis_gcc.h **** The carry input is shifted in at the left end of the bitstring. 1265:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to rotate 1266:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 1267:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1268:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) 1269:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1270:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1271:Drivers/CMSIS/Include/cmsis_gcc.h **** 1272:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 1273:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1274:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1275:Drivers/CMSIS/Include/cmsis_gcc.h **** 1276:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccJrAs6S.s page 87 1277:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1278:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (8 bit) 1279:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 8 bit value. 1280:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1281:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1282:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1283:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) 1284:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1285:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1286:Drivers/CMSIS/Include/cmsis_gcc.h **** 1287:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1288:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); 1289:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1290:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1291:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1292:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1293:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); 1294:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1295:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 1296:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1297:Drivers/CMSIS/Include/cmsis_gcc.h **** 1298:Drivers/CMSIS/Include/cmsis_gcc.h **** 1299:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1300:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (16 bit) 1301:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 16 bit values. 1302:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1303:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1304:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1305:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) 1306:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1307:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1308:Drivers/CMSIS/Include/cmsis_gcc.h **** 1309:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1310:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); 1311:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1312:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1313:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1314:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1315:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); 1316:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1317:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ 1318:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1319:Drivers/CMSIS/Include/cmsis_gcc.h **** 1320:Drivers/CMSIS/Include/cmsis_gcc.h **** 1321:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1322:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (32 bit) 1323:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 32 bit values. 1324:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1325:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1326:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1327:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) 1328:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1329:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1330:Drivers/CMSIS/Include/cmsis_gcc.h **** 1331:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); 1332:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1333:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS /tmp/ccJrAs6S.s page 88 1334:Drivers/CMSIS/Include/cmsis_gcc.h **** 1335:Drivers/CMSIS/Include/cmsis_gcc.h **** 1336:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1337:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (8 bit) 1338:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 8 bit values. 1339:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1340:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1341:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1342:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) 1343:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1344:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1345:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1346:Drivers/CMSIS/Include/cmsis_gcc.h **** 1347:Drivers/CMSIS/Include/cmsis_gcc.h **** 1348:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1349:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (16 bit) 1350:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 16 bit values. 1351:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1352:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1353:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1354:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) 1355:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1356:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1357:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1358:Drivers/CMSIS/Include/cmsis_gcc.h **** 1359:Drivers/CMSIS/Include/cmsis_gcc.h **** 1360:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1361:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (32 bit) 1362:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 32 bit values. 1363:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1364:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1365:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1366:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) 1367:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1368:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); 1369:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1370:Drivers/CMSIS/Include/cmsis_gcc.h **** 1371:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1372:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1373:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 1374:Drivers/CMSIS/Include/cmsis_gcc.h **** 1375:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1376:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate 1377:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value. 1378:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated 1379:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (1..32) 1380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) 1383:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1384:Drivers/CMSIS/Include/cmsis_gcc.h **** if ((sat >= 1U) && (sat <= 32U)) 1385:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1386:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); 1387:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t min = -1 - max ; 1388:Drivers/CMSIS/Include/cmsis_gcc.h **** if (val > max) 1389:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1390:Drivers/CMSIS/Include/cmsis_gcc.h **** return max; ARM GAS /tmp/ccJrAs6S.s page 89 1391:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1392:Drivers/CMSIS/Include/cmsis_gcc.h **** else if (val < min) 1393:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1394:Drivers/CMSIS/Include/cmsis_gcc.h **** return min; 1395:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1396:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1397:Drivers/CMSIS/Include/cmsis_gcc.h **** return val; 1398:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1399:Drivers/CMSIS/Include/cmsis_gcc.h **** 1400:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1401:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate 1402:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value. 1403:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated 1404:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (0..31) 1405:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1406:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1407:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) 1408:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1409:Drivers/CMSIS/Include/cmsis_gcc.h **** if (sat <= 31U) 1410:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1411:Drivers/CMSIS/Include/cmsis_gcc.h **** const uint32_t max = ((1U << sat) - 1U); 1412:Drivers/CMSIS/Include/cmsis_gcc.h **** if (val > (int32_t)max) 1413:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1414:Drivers/CMSIS/Include/cmsis_gcc.h **** return max; 1415:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1416:Drivers/CMSIS/Include/cmsis_gcc.h **** else if (val < 0) 1417:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1418:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 1419:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1420:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1421:Drivers/CMSIS/Include/cmsis_gcc.h **** return (uint32_t)val; 1422:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1423:Drivers/CMSIS/Include/cmsis_gcc.h **** 1424:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1425:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1426:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 1427:Drivers/CMSIS/Include/cmsis_gcc.h **** 1428:Drivers/CMSIS/Include/cmsis_gcc.h **** 1429:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1430:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 1431:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1432:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (8 bit) 1433:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB instruction for 8 bit value. 1434:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1435:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1436:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) 1438:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1439:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1440:Drivers/CMSIS/Include/cmsis_gcc.h **** 1441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) ); 1442:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); 1443:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1444:Drivers/CMSIS/Include/cmsis_gcc.h **** 1445:Drivers/CMSIS/Include/cmsis_gcc.h **** 1446:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1447:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (16 bit) ARM GAS /tmp/ccJrAs6S.s page 90 1448:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAH instruction for 16 bit values. 1449:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1450:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1451:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1452:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) 1453:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1454:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1455:Drivers/CMSIS/Include/cmsis_gcc.h **** 1456:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) ); 1457:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); 1458:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1459:Drivers/CMSIS/Include/cmsis_gcc.h **** 1460:Drivers/CMSIS/Include/cmsis_gcc.h **** 1461:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1462:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (32 bit) 1463:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA instruction for 32 bit values. 1464:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1465:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1466:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1467:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) 1468:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1469:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1470:Drivers/CMSIS/Include/cmsis_gcc.h **** 1471:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) ); 1472:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1473:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1474:Drivers/CMSIS/Include/cmsis_gcc.h **** 1475:Drivers/CMSIS/Include/cmsis_gcc.h **** 1476:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1477:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (8 bit) 1478:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB instruction for 8 bit values. 1479:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1480:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1481:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1482:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) 1483:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1484:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1485:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1486:Drivers/CMSIS/Include/cmsis_gcc.h **** 1487:Drivers/CMSIS/Include/cmsis_gcc.h **** 1488:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1489:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (16 bit) 1490:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH instruction for 16 bit values. 1491:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1492:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1493:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1494:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) 1495:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1496:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1497:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1498:Drivers/CMSIS/Include/cmsis_gcc.h **** 1499:Drivers/CMSIS/Include/cmsis_gcc.h **** 1500:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1501:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (32 bit) 1502:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL instruction for 32 bit values. 1503:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1504:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location ARM GAS /tmp/ccJrAs6S.s page 91 1505:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) 1507:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1509:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1510:Drivers/CMSIS/Include/cmsis_gcc.h **** 1511:Drivers/CMSIS/Include/cmsis_gcc.h **** 1512:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (8 bit) 1514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB exclusive instruction for 8 bit value. 1515:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1516:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1517:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1518:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr) 1519:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1520:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1521:Drivers/CMSIS/Include/cmsis_gcc.h **** 1522:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) ); 1523:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); 1524:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1525:Drivers/CMSIS/Include/cmsis_gcc.h **** 1526:Drivers/CMSIS/Include/cmsis_gcc.h **** 1527:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1528:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (16 bit) 1529:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAH exclusive instruction for 16 bit values. 1530:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1531:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1532:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1533:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr) 1534:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1535:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1536:Drivers/CMSIS/Include/cmsis_gcc.h **** 1537:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) ); 1538:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); 1539:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1540:Drivers/CMSIS/Include/cmsis_gcc.h **** 1541:Drivers/CMSIS/Include/cmsis_gcc.h **** 1542:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1543:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (32 bit) 1544:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA exclusive instruction for 32 bit values. 1545:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1546:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1547:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1548:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr) 1549:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1550:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1551:Drivers/CMSIS/Include/cmsis_gcc.h **** 1552:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) ); 1553:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1554:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1555:Drivers/CMSIS/Include/cmsis_gcc.h **** 1556:Drivers/CMSIS/Include/cmsis_gcc.h **** 1557:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1558:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (8 bit) 1559:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB exclusive instruction for 8 bit values. 1560:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1561:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location ARM GAS /tmp/ccJrAs6S.s page 92 1562:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1563:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1564:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1565:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) 1566:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1567:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1568:Drivers/CMSIS/Include/cmsis_gcc.h **** 1569:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); 1570:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1571:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1572:Drivers/CMSIS/Include/cmsis_gcc.h **** 1573:Drivers/CMSIS/Include/cmsis_gcc.h **** 1574:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1575:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (16 bit) 1576:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH exclusive instruction for 16 bit values. 1577:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1578:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1579:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1580:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1581:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1582:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) 1583:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1584:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1585:Drivers/CMSIS/Include/cmsis_gcc.h **** 1586:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); 1587:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1588:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1589:Drivers/CMSIS/Include/cmsis_gcc.h **** 1590:Drivers/CMSIS/Include/cmsis_gcc.h **** 1591:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1592:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (32 bit) 1593:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL exclusive instruction for 32 bit values. 1594:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1595:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1596:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1597:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1598:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1599:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) 1600:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1601:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1602:Drivers/CMSIS/Include/cmsis_gcc.h **** 1603:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); 1604:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1605:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1606:Drivers/CMSIS/Include/cmsis_gcc.h **** 1607:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1608:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 1609:Drivers/CMSIS/Include/cmsis_gcc.h **** 1610:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ 1611:Drivers/CMSIS/Include/cmsis_gcc.h **** 1612:Drivers/CMSIS/Include/cmsis_gcc.h **** 1613:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ################### Compiler specific Intrinsics ########################### */ 1614:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics 1615:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated SIMD instructions 1616:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 1617:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1618:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccJrAs6S.s page 93 1619:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) 1620:Drivers/CMSIS/Include/cmsis_gcc.h **** 1621:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) 1622:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1623:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1624:Drivers/CMSIS/Include/cmsis_gcc.h **** 1625:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1626:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1627:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1628:Drivers/CMSIS/Include/cmsis_gcc.h **** 1629:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) 1630:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1631:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1632:Drivers/CMSIS/Include/cmsis_gcc.h **** 1633:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1634:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1635:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1636:Drivers/CMSIS/Include/cmsis_gcc.h **** 1637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) 1638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1639:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1640:Drivers/CMSIS/Include/cmsis_gcc.h **** 1641:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1642:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1643:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1644:Drivers/CMSIS/Include/cmsis_gcc.h **** 1645:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) 1646:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1647:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1648:Drivers/CMSIS/Include/cmsis_gcc.h **** 1649:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1650:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1651:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1652:Drivers/CMSIS/Include/cmsis_gcc.h **** 1653:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) 1654:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1655:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1656:Drivers/CMSIS/Include/cmsis_gcc.h **** 1657:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1658:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1659:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1660:Drivers/CMSIS/Include/cmsis_gcc.h **** 1661:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) 1662:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1663:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1664:Drivers/CMSIS/Include/cmsis_gcc.h **** 1665:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1666:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1667:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1668:Drivers/CMSIS/Include/cmsis_gcc.h **** 1669:Drivers/CMSIS/Include/cmsis_gcc.h **** 1670:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) 1671:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1672:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1673:Drivers/CMSIS/Include/cmsis_gcc.h **** 1674:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1675:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS /tmp/ccJrAs6S.s page 94 1676:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1677:Drivers/CMSIS/Include/cmsis_gcc.h **** 1678:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) 1679:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1680:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1681:Drivers/CMSIS/Include/cmsis_gcc.h **** 1682:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1683:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1684:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1685:Drivers/CMSIS/Include/cmsis_gcc.h **** 1686:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) 1687:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1688:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1689:Drivers/CMSIS/Include/cmsis_gcc.h **** 1690:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1691:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1692:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1693:Drivers/CMSIS/Include/cmsis_gcc.h **** 1694:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) 1695:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1696:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1697:Drivers/CMSIS/Include/cmsis_gcc.h **** 1698:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1699:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1700:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1701:Drivers/CMSIS/Include/cmsis_gcc.h **** 1702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) 1703:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1704:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1705:Drivers/CMSIS/Include/cmsis_gcc.h **** 1706:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1707:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1708:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1709:Drivers/CMSIS/Include/cmsis_gcc.h **** 1710:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) 1711:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1712:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1713:Drivers/CMSIS/Include/cmsis_gcc.h **** 1714:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1715:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1716:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1717:Drivers/CMSIS/Include/cmsis_gcc.h **** 1718:Drivers/CMSIS/Include/cmsis_gcc.h **** 1719:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) 1720:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1721:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1722:Drivers/CMSIS/Include/cmsis_gcc.h **** 1723:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1724:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1725:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1726:Drivers/CMSIS/Include/cmsis_gcc.h **** 1727:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) 1728:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1729:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1730:Drivers/CMSIS/Include/cmsis_gcc.h **** 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1732:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS /tmp/ccJrAs6S.s page 95 1733:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1734:Drivers/CMSIS/Include/cmsis_gcc.h **** 1735:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) 1736:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1737:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1738:Drivers/CMSIS/Include/cmsis_gcc.h **** 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1740:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1741:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1742:Drivers/CMSIS/Include/cmsis_gcc.h **** 1743:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) 1744:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1745:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1746:Drivers/CMSIS/Include/cmsis_gcc.h **** 1747:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1748:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1749:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1750:Drivers/CMSIS/Include/cmsis_gcc.h **** 1751:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) 1752:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1754:Drivers/CMSIS/Include/cmsis_gcc.h **** 1755:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1756:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1757:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1758:Drivers/CMSIS/Include/cmsis_gcc.h **** 1759:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) 1760:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1761:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1762:Drivers/CMSIS/Include/cmsis_gcc.h **** 1763:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1764:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1765:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1766:Drivers/CMSIS/Include/cmsis_gcc.h **** 1767:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) 1768:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1769:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1770:Drivers/CMSIS/Include/cmsis_gcc.h **** 1771:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1772:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1773:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1774:Drivers/CMSIS/Include/cmsis_gcc.h **** 1775:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) 1776:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1777:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1778:Drivers/CMSIS/Include/cmsis_gcc.h **** 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1780:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1781:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1782:Drivers/CMSIS/Include/cmsis_gcc.h **** 1783:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) 1784:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1785:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1786:Drivers/CMSIS/Include/cmsis_gcc.h **** 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1788:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1789:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS /tmp/ccJrAs6S.s page 96 1790:Drivers/CMSIS/Include/cmsis_gcc.h **** 1791:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) 1792:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1793:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1794:Drivers/CMSIS/Include/cmsis_gcc.h **** 1795:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1796:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1797:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1798:Drivers/CMSIS/Include/cmsis_gcc.h **** 1799:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) 1800:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1801:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1802:Drivers/CMSIS/Include/cmsis_gcc.h **** 1803:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1804:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1805:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1806:Drivers/CMSIS/Include/cmsis_gcc.h **** 1807:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) 1808:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1809:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1810:Drivers/CMSIS/Include/cmsis_gcc.h **** 1811:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1812:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1813:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1814:Drivers/CMSIS/Include/cmsis_gcc.h **** 1815:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2) 1816:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1817:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1818:Drivers/CMSIS/Include/cmsis_gcc.h **** 1819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1820:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1821:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1822:Drivers/CMSIS/Include/cmsis_gcc.h **** 1823:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2) 1824:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1825:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1826:Drivers/CMSIS/Include/cmsis_gcc.h **** 1827:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1828:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1829:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1830:Drivers/CMSIS/Include/cmsis_gcc.h **** 1831:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) 1832:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1833:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1834:Drivers/CMSIS/Include/cmsis_gcc.h **** 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1836:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1837:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1838:Drivers/CMSIS/Include/cmsis_gcc.h **** 1839:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2) 1840:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1841:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1842:Drivers/CMSIS/Include/cmsis_gcc.h **** 1843:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1844:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1845:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1846:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccJrAs6S.s page 97 1847:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) 1848:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1849:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1850:Drivers/CMSIS/Include/cmsis_gcc.h **** 1851:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1852:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1853:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1854:Drivers/CMSIS/Include/cmsis_gcc.h **** 1855:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) 1856:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1857:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1858:Drivers/CMSIS/Include/cmsis_gcc.h **** 1859:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1860:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1861:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1862:Drivers/CMSIS/Include/cmsis_gcc.h **** 1863:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) 1864:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1865:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1866:Drivers/CMSIS/Include/cmsis_gcc.h **** 1867:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1868:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1869:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1870:Drivers/CMSIS/Include/cmsis_gcc.h **** 1871:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) 1872:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1873:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1874:Drivers/CMSIS/Include/cmsis_gcc.h **** 1875:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1876:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1877:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1878:Drivers/CMSIS/Include/cmsis_gcc.h **** 1879:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) 1880:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1881:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1882:Drivers/CMSIS/Include/cmsis_gcc.h **** 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1884:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1885:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1886:Drivers/CMSIS/Include/cmsis_gcc.h **** 1887:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2) 1888:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1889:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1890:Drivers/CMSIS/Include/cmsis_gcc.h **** 1891:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1892:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1893:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1894:Drivers/CMSIS/Include/cmsis_gcc.h **** 1895:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) 1896:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1897:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1898:Drivers/CMSIS/Include/cmsis_gcc.h **** 1899:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1900:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1901:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1902:Drivers/CMSIS/Include/cmsis_gcc.h **** 1903:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) ARM GAS /tmp/ccJrAs6S.s page 98 1904:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1906:Drivers/CMSIS/Include/cmsis_gcc.h **** 1907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1908:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1909:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1910:Drivers/CMSIS/Include/cmsis_gcc.h **** 1911:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) 1912:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1913:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1914:Drivers/CMSIS/Include/cmsis_gcc.h **** 1915:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1916:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1917:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1918:Drivers/CMSIS/Include/cmsis_gcc.h **** 1919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) 1920:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1922:Drivers/CMSIS/Include/cmsis_gcc.h **** 1923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 1924:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1925:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1926:Drivers/CMSIS/Include/cmsis_gcc.h **** 1927:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SSAT16(ARG1,ARG2) \ 1928:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1929:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t __RES, __ARG1 = (ARG1); \ 1930:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1931:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1932:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1933:Drivers/CMSIS/Include/cmsis_gcc.h **** 1934:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT16(ARG1,ARG2) \ 1935:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1936:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \ 1937:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1938:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1939:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1940:Drivers/CMSIS/Include/cmsis_gcc.h **** 1941:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1) 1942:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1943:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1944:Drivers/CMSIS/Include/cmsis_gcc.h **** 1945:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); 1946:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1947:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1948:Drivers/CMSIS/Include/cmsis_gcc.h **** 1949:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) 1950:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1951:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1952:Drivers/CMSIS/Include/cmsis_gcc.h **** 1953:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1954:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1955:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1956:Drivers/CMSIS/Include/cmsis_gcc.h **** 1957:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) 1958:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1959:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1960:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccJrAs6S.s page 99 1961:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); 1962:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1963:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1964:Drivers/CMSIS/Include/cmsis_gcc.h **** 1965:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) 1966:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1967:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1968:Drivers/CMSIS/Include/cmsis_gcc.h **** 1969:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1970:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1971:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1972:Drivers/CMSIS/Include/cmsis_gcc.h **** 1973:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) 1974:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1975:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1976:Drivers/CMSIS/Include/cmsis_gcc.h **** 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 722 .loc 6 1977 0 723 .syntax unified 724 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 725 0040 2AFB02F3 smuad r3, r10, r2 726 @ 0 "" 2 727 .LVL95: 728 .thumb 729 .syntax unified 730 .LBE1057: 731 .LBE1056: 732 .LBB1058: 733 .LBB1059: 1978:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1979:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1980:Drivers/CMSIS/Include/cmsis_gcc.h **** 1981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) 1982:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1984:Drivers/CMSIS/Include/cmsis_gcc.h **** 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1986:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1987:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1988:Drivers/CMSIS/Include/cmsis_gcc.h **** 1989:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) 1990:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1991:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1992:Drivers/CMSIS/Include/cmsis_gcc.h **** 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 734 .loc 6 1993 0 735 .syntax unified 736 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 737 0044 2EFB0433 smlad r3, lr, r4, r3 738 @ 0 "" 2 739 .LVL96: 740 .thumb 741 .syntax unified 742 .LBE1059: 743 .LBE1058: 744 .LBB1060: 745 .LBB1061: ARM GAS /tmp/ccJrAs6S.s page 100 746 .syntax unified 747 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 748 0048 2CFB0033 smlad r3, ip, r0, r3 749 @ 0 "" 2 750 .LVL97: 751 .thumb 752 .syntax unified 753 .LBE1061: 754 .LBE1060: 755 .LBB1062: 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #else 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** out = __SMUADX(b0, in); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* acc = b1 * x[n-1], acc += b2 * x[n-2] + out */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** acc = __SMLAD(b1, state_in, out); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** acc = __SMLAD(a1, state_out, acc); 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* The result is converted from 3.29 to 1.31 and then saturation is applied */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** out = __SSAT((acc >> shift), 16); 756 .loc 5 206 0 757 004c 43FA0BF3 asr r3, r3, fp 758 .LVL98: 759 .LBE1062: 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Store the output in the destination buffer. */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** *pOut++ = (q15_t) out; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Every time after the output is computed state should be updated. */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* The states should be updated as: */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Xn2 = Xn1 */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Xn1 = Xn */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Yn2 = Yn1 */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Yn1 = acc */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_in = __PKHBT(in, state_in, 16); 760 .loc 5 220 0 761 0050 92B2 uxth r2, r2 762 .LBB1063: 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 763 .loc 5 206 0 764 .syntax unified 765 @ 206 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1 766 0052 03F30F03 ssat r3, #16, r3 767 @ 0 "" 2 768 .LVL99: 769 .thumb 770 .syntax unified 771 .LBE1063: 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** { 772 .loc 5 188 0 773 0056 013D subs r5, r5, #1 774 .LVL100: 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_out = __PKHBT(out, state_out, 16); ARM GAS /tmp/ccJrAs6S.s page 101 775 .loc 5 221 0 776 0058 9FB2 uxth r7, r3 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 777 .loc 5 209 0 778 005a 26F8023B strh r3, [r6], #2 @ movhi 779 .LVL101: 780 .loc 5 221 0 781 005e 47EA0040 orr r0, r7, r0, lsl #16 782 .LVL102: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_out = __PKHBT(out, state_out, 16); 783 .loc 5 220 0 784 0062 42EA0444 orr r4, r2, r4, lsl #16 785 .LVL103: 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** { 786 .loc 5 188 0 787 0066 E9D1 bne .L22 788 .LVL104: 789 .L21: 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #else 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_in = __PKHBT(state_in >> 16, in, 16); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** state_out = __PKHBT(state_out >> 16, out, 16); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* decrement loop counter */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** sample--; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** } 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* The first stage goes from the input buffer to the output buffer. */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Subsequent (numStages - 1) occur in-place in the output buffer */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** pIn = pDst; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Reset the output pointer */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** pOut = pDst; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Store the updated state variables back into the state array */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** write_q15x2_ia(&pState, state_in); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** write_q15x2_ia(&pState, state_out); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** /* Decrement loop counter */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** stage--; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** } while (stage > 0U); 790 .loc 5 245 0 791 0068 019B ldr r3, [sp, #4] 792 .LBB1064: 793 .LBB1065: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 794 .loc 3 969 0 795 006a C8F80040 str r4, [r8] @ unaligned 796 .LVL105: 797 .LBE1065: 798 .LBE1064: 799 .loc 5 245 0 800 006e 013B subs r3, r3, #1 801 .LBB1066: 802 .LBB1067: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else ARM GAS /tmp/ccJrAs6S.s page 102 803 .loc 3 969 0 804 0070 C8F80400 str r0, [r8, #4] @ unaligned 805 .LBE1067: 806 .LBE1066: 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** 807 .loc 5 233 0 808 0074 0299 ldr r1, [sp, #8] 809 .loc 5 245 0 810 0076 0193 str r3, [sp, #4] 811 .LVL106: 812 0078 08F10808 add r8, r8, #8 813 .LVL107: 814 007c CED1 bne .L23 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c **** } 815 .loc 5 246 0 816 007e 05B0 add sp, sp, #20 817 .LCFI10: 818 .cfi_def_cfa_offset 36 819 @ sp needed 820 0080 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 821 .cfi_endproc 822 .LFE151: 824 .section .text.arm_biquad_cascade_df1_fast_q31,"ax",%progbits 825 .align 1 826 .p2align 2,,3 827 .global arm_biquad_cascade_df1_fast_q31 828 .syntax unified 829 .thumb 830 .thumb_func 831 .fpu fpv4-sp-d16 833 arm_biquad_cascade_df1_fast_q31: 834 .LFB152: 835 .file 7 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * Title: arm_biquad_cascade_df1_fast_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * Description: Processing function for the Q31 Fast Biquad cascade DirectFormI(DF1) filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. ARM GAS /tmp/ccJrAs6S.s page 103 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** @addtogroup BiquadCascadeDF1 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** @brief Processing function for the Q31 Biquad cascade filter (fast variant). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** @param[in] S points to an instance of the Q31 Biquad cascade structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** @param[in] blockSize number of samples to process per call 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** This function is optimized for speed at the expense of fixed-point precision and 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** These intermediate results are added to a 2.30 accumulator. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Finally, the accumulator is saturated and converted to a 1.31 result. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** The fast version has the same overflow behavior as the standard version and prov 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** In order to avoid overflows completely the input signal must be scaled down by t 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** arm_biquad_cascade_df1_init_q31() to initialize filter structure. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** @remark 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Refer to \ref arm_biquad_cascade_df1_q31() for a slower implementation of this f 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** which uses 64-bit accumulation to provide higher precision. Both the slow and th 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Use the function \ref arm_biquad_cascade_df1_init_q31() to initialize the filter 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** void arm_biquad_cascade_df1_fast_q31( 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** const arm_biquad_casd_df1_inst_q31 * S, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** const q31_t * pSrc, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** q31_t * pDst, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** uint32_t blockSize) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** { 836 .loc 7 67 0 837 .cfi_startproc 838 @ args = 0, pretend = 0, frame = 40 839 @ frame_needed = 0, uses_anonymous_args = 0 840 .LVL108: 841 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 842 .LCFI11: 843 .cfi_def_cfa_offset 36 844 .cfi_offset 4, -36 845 .cfi_offset 5, -32 846 .cfi_offset 6, -28 847 .cfi_offset 7, -24 848 .cfi_offset 8, -20 849 .cfi_offset 9, -16 ARM GAS /tmp/ccJrAs6S.s page 104 850 .cfi_offset 10, -12 851 .cfi_offset 11, -8 852 .cfi_offset 14, -4 853 0004 8B46 mov fp, r1 854 .LVL109: 855 0006 8BB0 sub sp, sp, #44 856 .LCFI12: 857 .cfi_def_cfa_offset 80 858 0008 D0E90114 ldrd r1, r4, [r0, #4] 859 .LVL110: 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** const q31_t *pIn = pSrc; /* Source pointer */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** q31_t *pOut = pDst; /* Destination pointer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** q31_t *pState = S->pState; /* pState pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** q31_t acc = 0; /* Accumulator */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** q31_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** q31_t Xn; /* Temporary input */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ 860 .loc 7 76 0 861 000c 057B ldrb r5, [r0, #12] @ zero_extendqisi2 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** uint32_t sample, stage = S->numStages; /* Loop counters */ 862 .loc 7 77 0 863 000e 0068 ldr r0, [r0] 864 .LVL111: 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** const q31_t *pIn = pSrc; /* Source pointer */ 865 .loc 7 67 0 866 0010 0993 str r3, [sp, #36] 867 0012 CDE90602 strd r0, r2, [sp, #24] 868 .LVL112: 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** uint32_t sample, stage = S->numStages; /* Loop counters */ 869 .loc 7 76 0 870 0016 6B1C adds r3, r5, #1 871 .LVL113: 872 0018 0493 str r3, [sp, #16] 873 .LVL114: 874 001a 04F11403 add r3, r4, #20 875 .LVL115: 876 001e 0593 str r3, [sp, #20] 877 0020 01F1100A add r10, r1, #16 878 .LVL116: 879 .L33: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** do 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Reading the coefficients */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** b0 = *pCoeffs++; 880 .loc 7 82 0 881 0024 059B ldr r3, [sp, #20] 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** b1 = *pCoeffs++; 882 .loc 7 83 0 883 0026 53E90592 ldrd r9, r2, [r3, #-20] 884 002a 0192 str r2, [sp, #4] 885 .LVL117: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** b2 = *pCoeffs++; 886 .loc 7 84 0 887 002c 53F80C2C ldr r2, [r3, #-12] ARM GAS /tmp/ccJrAs6S.s page 105 888 .LVL118: 889 0030 0292 str r2, [sp, #8] 890 .LVL119: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** a1 = *pCoeffs++; 891 .loc 7 85 0 892 0032 53F8082C ldr r2, [r3, #-8] 893 .LVL120: 894 0036 0392 str r2, [sp, #12] 895 .LVL121: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** a2 = *pCoeffs++; 896 .loc 7 86 0 897 0038 53F8042C ldr r2, [r3, #-4] 898 .LVL122: 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Reading the pState values */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Xn1 = pState[0]; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Xn2 = pState[1]; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Yn1 = pState[2]; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Yn2 = pState[3]; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Apply loop unrolling and compute 4 output values simultaneously. */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Variables acc ... acc3 hold output values that are being computed: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** sample = blockSize >> 2U; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** while (sample > 0U) 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** { 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Read the input */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Xn = *pIn; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = b0 * x[n] */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);*/ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** mult_32x32_keep32_R(acc, b1, Xn1); 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b1 * x[n-1] */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);*/ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, b0, Xn); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b[2] * x[n-2] */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, b2, Xn2); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += a1 * y[n-1] */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, a1, Yn1); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += a2 * y[n-2] */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, a2, Yn2); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* The result is converted to 1.31 , Yn2 variable is reused */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Yn2 = acc << shift; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Read the second input */ ARM GAS /tmp/ccJrAs6S.s page 106 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Xn2 = *(pIn + 1U); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Store the output in the destination buffer. */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** *pOut = Yn2; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = b0 * x[n] */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);*/ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** mult_32x32_keep32_R(acc, b0, Xn2); 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b1 * x[n-1] */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);*/ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, b1, Xn); 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b[2] * x[n-2] */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);*/ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, b2, Xn1); 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += a1 * y[n-1] */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, a1, Yn2); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += a2 * y[n-2] */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, a2, Yn1); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* The result is converted to 1.31, Yn1 variable is reused */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Yn1 = acc << shift; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Read the third input */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Xn1 = *(pIn + 2U); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Store the output in the destination buffer. */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** *(pOut + 1U) = Yn1; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = b0 * x[n] */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);*/ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** mult_32x32_keep32_R(acc, b0, Xn1); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b1 * x[n-1] */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);*/ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, b1, Xn2); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b[2] * x[n-2] */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);*/ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, b2, Xn); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += a1 * y[n-1] */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, a1, Yn1); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += a2 * y[n-2] */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, a2, Yn2); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* The result is converted to 1.31, Yn2 variable is reused */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Yn2 = acc << shift; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Read the forth input */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Xn = *(pIn + 3U); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Store the output in the destination buffer. */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** *(pOut + 2U) = Yn2; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** pIn += 4U; ARM GAS /tmp/ccJrAs6S.s page 107 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = b0 * x[n] */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** mult_32x32_keep32_R(acc, b0, Xn); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b1 * x[n-1] */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, b1, Xn1); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b[2] * x[n-2] */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, b2, Xn2); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += a1 * y[n-1] */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, a1, Yn2); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += a2 * y[n-2] */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, a2, Yn1); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Every time after the output is computed state should be updated. */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* The states should be updated as: */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Xn2 = Xn1 */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Xn2 = Xn1; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* The result is converted to 1.31, Yn1 variable is reused */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Yn1 = acc << shift; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Xn1 = Xn */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Xn1 = Xn; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Store the output in the destination buffer. */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** *(pOut + 3U) = Yn1; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** pOut += 4U; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* decrement loop counter */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** sample--; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** } 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Loop unrolling: Compute remaining outputs */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** sample = (blockSize & 0x3U); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** #else 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Initialize blkCnt with number of samples */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** sample = blockSize; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** while (sample > 0U) 899 .loc 7 235 0 900 003c 099B ldr r3, [sp, #36] 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Yn1 = pState[2]; 901 .loc 7 90 0 902 003e 5AE90457 ldrd r5, r7, [r10, #-16] 903 .LVL123: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 904 .loc 7 92 0 905 0042 5AE9024C ldrd r4, ip, [r10, #-8] ARM GAS /tmp/ccJrAs6S.s page 108 906 .LVL124: 907 .loc 7 235 0 908 0046 002B cmp r3, #0 909 0048 4FD0 beq .L34 910 004a CDF820A0 str r10, [sp, #32] 911 004e 9E46 mov lr, r3 912 0050 DDF81C80 ldr r8, [sp, #28] 913 0054 9246 mov r10, r2 914 .LVL125: 915 0056 01E0 b .L32 916 .LVL126: 917 .L35: 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** { 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Read the input */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Xn = *pIn++; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = b0 * x[n] */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** mult_32x32_keep32_R(acc, b0, Xn); 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b1 * x[n-1] */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, b1, Xn1); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b[2] * x[n-2] */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, b2, Xn2); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += a1 * y[n-1] */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, a1, Yn1); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += a2 * y[n-2] */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** multAcc_32x32_keep32_R(acc, a2, Yn2); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* The result is converted to 1.31 */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** acc = acc << shift; 918 .loc 7 258 0 919 0058 1C46 mov r4, r3 920 .LVL127: 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 921 .loc 7 238 0 922 005a 3546 mov r5, r6 923 .LVL128: 924 .L32: 925 005c 5BF8046B ldr r6, [fp], #4 926 .LVL129: 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b[2] * x[n-2] */ 927 .loc 7 246 0 928 0060 019B ldr r3, [sp, #4] 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b1 * x[n-1] */ 929 .loc 7 243 0 930 0062 4FF00040 mov r0, #-2147483648 931 0066 0021 movs r1, #0 932 0068 C9FB0601 smlal r0, r1, r9, r6 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += b[2] * x[n-2] */ 933 .loc 7 246 0 934 006c 0020 movs r0, #0 935 006e C3FB0501 smlal r0, r1, r3, r5 ARM GAS /tmp/ccJrAs6S.s page 109 936 0072 0246 mov r2, r0 937 0074 12F10040 adds r0, r2, #-2147483648 938 0078 41F10001 adc r1, r1, #0 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += a1 * y[n-1] */ 939 .loc 7 249 0 940 007c 0B46 mov r3, r1 941 007e 0299 ldr r1, [sp, #8] 942 0080 0022 movs r2, #0 943 0082 C1FB0723 smlal r2, r3, r1, r7 944 0086 12F10040 adds r0, r2, #-2147483648 945 008a 43F10001 adc r1, r3, #0 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* acc += a2 * y[n-2] */ 946 .loc 7 252 0 947 008e 0B46 mov r3, r1 948 0090 0399 ldr r1, [sp, #12] 949 0092 0022 movs r2, #0 950 0094 C1FB0423 smlal r2, r3, r1, r4 951 0098 12F10040 adds r0, r2, #-2147483648 952 009c 43F10001 adc r1, r3, #0 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 953 .loc 7 255 0 954 00a0 0B46 mov r3, r1 955 00a2 0022 movs r2, #0 956 00a4 CAFB0C23 smlal r2, r3, r10, ip 957 00a8 1046 mov r0, r2 958 00aa 10F10042 adds r2, r0, #-2147483648 959 .loc 7 258 0 960 00ae 0499 ldr r1, [sp, #16] 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 961 .loc 7 255 0 962 00b0 43F10003 adc r3, r3, #0 963 .LVL130: 964 .loc 7 258 0 965 00b4 8B40 lsls r3, r3, r1 966 .LVL131: 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** { 967 .loc 7 235 0 968 00b6 BEF1010E subs lr, lr, #1 969 .LVL132: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Every time after the output is computed state should be updated. */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* The states should be updated as: */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Xn2 = Xn1 */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Xn1 = Xn */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Yn2 = Yn1 */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Yn1 = acc */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Xn2 = Xn1; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Xn1 = Xn; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Yn2 = Yn1; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Yn1 = acc; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Store the output in the destination buffer. */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** *pOut++ = acc; 970 .loc 7 272 0 971 00ba 48F8043B str r3, [r8], #4 972 .LVL133: 973 00be 2F46 mov r7, r5 ARM GAS /tmp/ccJrAs6S.s page 110 974 00c0 A446 mov ip, r4 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** { 975 .loc 7 235 0 976 00c2 C9D1 bne .L35 977 00c4 DDF820A0 ldr r10, [sp, #32] 978 .LVL134: 979 .L31: 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* decrement loop counter */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** sample--; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** } 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* The first stage goes from the input buffer to the output buffer. */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Subsequent stages occur in-place in the output buffer */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** pIn = pDst; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Reset to destination pointer */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** pOut = pDst; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** /* Store the updated state variables back into the pState array */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** *pState++ = Xn1; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** *pState++ = Xn2; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** *pState++ = Yn1; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** *pState++ = Yn2; 980 .loc 7 289 0 981 00c8 4AE90234 strd r3, r4, [r10, #-8] 982 00cc 059B ldr r3, [sp, #20] 983 .LVL135: 984 00ce 1433 adds r3, r3, #20 985 00d0 0593 str r3, [sp, #20] 986 .LVL136: 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** } while (--stage); 987 .loc 7 291 0 988 00d2 DDE9063B ldrd r3, fp, [sp, #24] 989 00d6 013B subs r3, r3, #1 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** *pState++ = Yn1; 990 .loc 7 287 0 991 00d8 4AE90465 strd r6, r5, [r10, #-16] 992 .loc 7 291 0 993 00dc 0693 str r3, [sp, #24] 994 .LVL137: 995 00de 0AF1100A add r10, r10, #16 996 .LVL138: 997 00e2 9FD1 bne .L33 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** } 998 .loc 7 292 0 999 00e4 0BB0 add sp, sp, #44 1000 .LCFI13: 1001 .cfi_remember_state 1002 .cfi_def_cfa_offset 36 1003 @ sp needed 1004 00e6 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 1005 .LVL139: 1006 .L34: 1007 .LCFI14: 1008 .cfi_restore_state ARM GAS /tmp/ccJrAs6S.s page 111 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Yn2 = pState[3]; 1009 .loc 7 91 0 1010 00ea 2346 mov r3, r4 1011 .LVL140: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Xn2 = pState[1]; 1012 .loc 7 89 0 1013 00ec 2E46 mov r6, r5 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** 1014 .loc 7 92 0 1015 00ee 6446 mov r4, ip 1016 .LVL141: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c **** Yn1 = pState[2]; 1017 .loc 7 90 0 1018 00f0 3D46 mov r5, r7 1019 .LVL142: 1020 00f2 E9E7 b .L31 1021 .cfi_endproc 1022 .LFE152: 1024 .section .text.arm_biquad_cascade_df1_init_f32,"ax",%progbits 1025 .align 1 1026 .p2align 2,,3 1027 .global arm_biquad_cascade_df1_init_f32 1028 .syntax unified 1029 .thumb 1030 .thumb_func 1031 .fpu fpv4-sp-d16 1033 arm_biquad_cascade_df1_init_f32: 1034 .LFB153: 1035 .file 8 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * Title: arm_biquad_cascade_df1_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * Description: Floating-point Biquad cascade DirectFormI(DF1) filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 112 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @addtogroup BiquadCascadeDF1 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @brief Initialization function for the floating-point Biquad cascade filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @param[in,out] S points to an instance of the floating-point Biquad cascade structure. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @param[in] numStages number of 2nd order stages in the filter. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @param[in] pCoeffs points to the filter coefficients. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @param[in] pState points to the state buffer. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @par Coefficient and State Ordering 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** The coefficients are stored in the array pCoeffs in the following o 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c ****       {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @par 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** where b1x and a1x are the coefficients for the first s 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** b2x and a2x are the coefficients for the second stage, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** and so on. The pCoeffs array contains a total of 5*numStages< 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @par 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** The pState is a pointer to state array. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** The state variables are arranged in the pState array as: 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c ****       {x[n-1], x[n-2], y[n-1], y[n-2]}
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** The 4 state variables for stage 1 are first, then the 4 state variables for stag 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** The state array has a total length of 4*numStages values. 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** The state variables are updated after each block of data is processed; the coeff 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** @par For MVE code, an additional buffer of modified coefficients is required. 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** Its size is numStages and each element of this buffer has type arm_biquad_mod_co 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** So, its total size is 32*numStages float32_t elements. 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** The initialization function which must be used is arm_biquad_cascade_df1_mve_ini 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** void arm_biquad_cascade_df1_init_f32( 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** arm_biquad_casd_df1_inst_f32 * S, 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** uint8_t numStages, 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** const float32_t * pCoeffs, 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** float32_t * pState) 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** { 1036 .loc 8 82 0 1037 .cfi_startproc 1038 @ args = 0, pretend = 0, frame = 0 ARM GAS /tmp/ccJrAs6S.s page 113 1039 @ frame_needed = 0, uses_anonymous_args = 0 1040 .LVL143: 1041 0000 10B5 push {r4, lr} 1042 .LCFI15: 1043 .cfi_def_cfa_offset 8 1044 .cfi_offset 4, -8 1045 .cfi_offset 14, -4 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** /* Assign filter stages */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** S->numStages = numStages; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** /* Assign coefficient pointer */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** S->pCoeffs = pCoeffs; 1046 .loc 8 87 0 1047 0002 8260 str r2, [r0, #8] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 1048 .loc 8 84 0 1049 0004 0160 str r1, [r0] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** /* Assign filter stages */ 1050 .loc 8 82 0 1051 0006 0446 mov r4, r0 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** /* Clear state buffer and size is always 4 * numStages */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float32_t)); 1052 .loc 8 90 0 1053 0008 0A01 lsls r2, r1, #4 1054 .LVL144: 1055 000a 1846 mov r0, r3 1056 .LVL145: 1057 000c 0021 movs r1, #0 1058 .LVL146: 1059 000e FFF7FEFF bl memset 1060 .LVL147: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** /* Assign state pointer */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** S->pState = pState; 1061 .loc 8 93 0 1062 0012 6060 str r0, [r4, #4] 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c **** } 1063 .loc 8 94 0 1064 0014 10BD pop {r4, pc} 1065 .cfi_endproc 1066 .LFE153: 1068 0016 00BF .section .text.arm_biquad_cascade_df1_init_q15,"ax",%progbits 1069 .align 1 1070 .p2align 2,,3 1071 .global arm_biquad_cascade_df1_init_q15 1072 .syntax unified 1073 .thumb 1074 .thumb_func 1075 .fpu fpv4-sp-d16 1077 arm_biquad_cascade_df1_init_q15: 1078 .LFB154: 1079 .file 9 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * Title: arm_biquad_cascade_df1_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * Description: Q15 Biquad cascade DirectFormI(DF1) filter initialization function ARM GAS /tmp/ccJrAs6S.s page 114 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @addtogroup BiquadCascadeDF1 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @brief Initialization function for the Q15 Biquad cascade filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @param[in,out] S points to an instance of the Q15 Biquad cascade structure. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @param[in] numStages number of 2nd order stages in the filter. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @param[in] pCoeffs points to the filter coefficients. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @param[in] pState points to the state buffer. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @param[in] postShift Shift to be applied to the accumulator result. Varies according to the 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @par Coefficient and State Ordering 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** The coefficients are stored in the array pCoeffs in the following o 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c ****       {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @par 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** where b1x and a1x are the coefficients for the first s 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** b2x and a2x are the coefficients for the second stage, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** and so on. The pCoeffs array contains a total of 6*numStages 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** The zero coefficient between b1 and b2 facilities use 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** @par 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** The state variables are stored in the array pState. 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and ARM GAS /tmp/ccJrAs6S.s page 115 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** The state variables are arranged in the pState array as: 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c ****       {x[n-1], x[n-2], y[n-1], y[n-2]}
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c ****
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** The 4 state variables for stage 1 are first, then the 4 state variables for stag 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** The state array has a total length of 4*numStages values. 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** The state variables are updated after each block of data is processed; the coeff 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** void arm_biquad_cascade_df1_init_q15( 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** arm_biquad_casd_df1_inst_q15 * S, 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** uint8_t numStages, 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** const q15_t * pCoeffs, 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** q15_t * pState, 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** int8_t postShift) 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** { 1080 .loc 9 77 0 1081 .cfi_startproc 1082 @ args = 4, pretend = 0, frame = 0 1083 @ frame_needed = 0, uses_anonymous_args = 0 1084 .LVL148: 1085 0000 10B5 push {r4, lr} 1086 .LCFI16: 1087 .cfi_def_cfa_offset 8 1088 .cfi_offset 4, -8 1089 .cfi_offset 14, -4 1090 .loc 9 77 0 1091 0002 0446 mov r4, r0 1092 0004 9DF90800 ldrsb r0, [sp, #8] 1093 .LVL149: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** /* Assign filter stages */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** S->numStages = numStages; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** /* Assign postShift to be applied to the output */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** S->postShift = postShift; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** /* Assign coefficient pointer */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** S->pCoeffs = pCoeffs; 1094 .loc 9 85 0 1095 0008 A260 str r2, [r4, #8] 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 1096 .loc 9 79 0 1097 000a 2170 strb r1, [r4] 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** /* Clear state buffer and size is always 4 * numStages */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q15_t)); 1098 .loc 9 88 0 1099 000c CA00 lsls r2, r1, #3 1100 .LVL150: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 1101 .loc 9 82 0 1102 000e 2073 strb r0, [r4, #12] 1103 .loc 9 88 0 1104 0010 0021 movs r1, #0 1105 .LVL151: 1106 0012 1846 mov r0, r3 1107 0014 FFF7FEFF bl memset ARM GAS /tmp/ccJrAs6S.s page 116 1108 .LVL152: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** /* Assign state pointer */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** S->pState = pState; 1109 .loc 9 91 0 1110 0018 6060 str r0, [r4, #4] 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c **** } 1111 .loc 9 92 0 1112 001a 10BD pop {r4, pc} 1113 .cfi_endproc 1114 .LFE154: 1116 .section .text.arm_biquad_cascade_df1_init_q31,"ax",%progbits 1117 .align 1 1118 .p2align 2,,3 1119 .global arm_biquad_cascade_df1_init_q31 1120 .syntax unified 1121 .thumb 1122 .thumb_func 1123 .fpu fpv4-sp-d16 1125 arm_biquad_cascade_df1_init_q31: 1126 .LFB155: 1127 .file 10 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * Title: arm_biquad_cascade_df1_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * Description: Q31 Biquad cascade DirectFormI(DF1) filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** /** ARM GAS /tmp/ccJrAs6S.s page 117 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @addtogroup BiquadCascadeDF1 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @brief Initialization function for the Q31 Biquad cascade filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @param[in,out] S points to an instance of the Q31 Biquad cascade structure. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @param[in] numStages number of 2nd order stages in the filter. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @param[in] pCoeffs points to the filter coefficients. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @param[in] pState points to the state buffer. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @param[in] postShift Shift to be applied after the accumulator. Varies according to the co 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @par Coefficient and State Ordering 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** The coefficients are stored in the array pCoeffs in the following o 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c ****       {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @par 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** where b1x and a1x are the coefficients for the first s 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** b2x and a2x are the coefficients for the second stage, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** and so on. The pCoeffs array contains a total of 5*numStages 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** @par 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** The pState points to state variables array. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** The state variables are arranged in the pState array as: 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c ****       {x[n-1], x[n-2], y[n-1], y[n-2]}
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** The 4 state variables for stage 1 are first, then the 4 state variables for stag 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** The state array has a total length of 4*numStages values. 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** The state variables are updated after each block of data is processed; the coeff 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** void arm_biquad_cascade_df1_init_q31( 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** arm_biquad_casd_df1_inst_q31 * S, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** uint8_t numStages, 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** const q31_t * pCoeffs, 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** q31_t * pState, 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** int8_t postShift) 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** { 1128 .loc 10 76 0 1129 .cfi_startproc 1130 @ args = 4, pretend = 0, frame = 0 1131 @ frame_needed = 0, uses_anonymous_args = 0 1132 .LVL153: 1133 0000 10B5 push {r4, lr} 1134 .LCFI17: 1135 .cfi_def_cfa_offset 8 1136 .cfi_offset 4, -8 1137 .cfi_offset 14, -4 1138 .loc 10 76 0 1139 0002 0446 mov r4, r0 1140 0004 9DF90800 ldrsb r0, [sp, #8] 1141 .LVL154: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** /* Assign filter stages */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** S->numStages = numStages; ARM GAS /tmp/ccJrAs6S.s page 118 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** /* Assign postShift to be applied to the output */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** S->postShift = postShift; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** /* Assign coefficient pointer */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** S->pCoeffs = pCoeffs; 1142 .loc 10 84 0 1143 0008 A260 str r2, [r4, #8] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 1144 .loc 10 78 0 1145 000a 2160 str r1, [r4] 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** /* Clear state buffer and size is always 4 * numStages */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q31_t)); 1146 .loc 10 87 0 1147 000c 0A01 lsls r2, r1, #4 1148 .LVL155: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 1149 .loc 10 81 0 1150 000e 2073 strb r0, [r4, #12] 1151 .loc 10 87 0 1152 0010 0021 movs r1, #0 1153 .LVL156: 1154 0012 1846 mov r0, r3 1155 0014 FFF7FEFF bl memset 1156 .LVL157: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** /* Assign state pointer */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** S->pState = pState; 1157 .loc 10 90 0 1158 0018 6060 str r0, [r4, #4] 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c **** } 1159 .loc 10 91 0 1160 001a 10BD pop {r4, pc} 1161 .cfi_endproc 1162 .LFE155: 1164 .section .text.arm_biquad_cascade_df1_q15,"ax",%progbits 1165 .align 1 1166 .p2align 2,,3 1167 .global arm_biquad_cascade_df1_q15 1168 .syntax unified 1169 .thumb 1170 .thumb_func 1171 .fpu fpv4-sp-d16 1173 arm_biquad_cascade_df1_q15: 1174 .LFB156: 1175 .file 11 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * Title: arm_biquad_cascade_df1_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * Description: Processing function for the Q15 Biquad cascade DirectFormI(DF1) filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * -------------------------------------------------------------------- */ ARM GAS /tmp/ccJrAs6S.s page 119 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** @addtogroup BiquadCascadeDF1 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** @brief Processing function for the Q15 Biquad cascade filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** @param[in] S points to an instance of the Q15 Biquad cascade structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** @param[out] pDst points to the location where the output result is written 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** The function is implemented using a 64-bit internal accumulator. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** Both coefficients and state variables are represented in 1.15 format and multipl 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 f 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** There is no risk of internal overflow with this approach and the full precision 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** The accumulator is then shifted by postShift bits to truncate the r 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** Finally, the result is saturated to 1.15 format. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** @remark 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** Refer to \ref arm_biquad_cascade_df1_fast_q15() for a faster but less precise im 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #if defined(ARM_MATH_MVEI) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** void arm_biquad_cascade_df1_q15( 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** const arm_biquad_casd_df1_inst_q15 * S, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** const q15_t * pSrc, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t * pDst, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** uint32_t blockSize) 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** { 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** const q15_t *pIn = pSrc; /* input pointer initialization */ ARM GAS /tmp/ccJrAs6S.s page 120 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t *pOut = pDst; /* output pointer initialization */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** int shift; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** uint32_t sample, stages = S->numStages; /* loop counters */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** int postShift = S->postShift; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15x8_t bCoeffs0, bCoeffs1, bCoeffs2, bCoeffs3; /* Coefficients vector * 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t *pState = S->pState; /* pState pointer initialization */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15x8_t inVec0; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** int64_t acc; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q31_t out, out1; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** shift = (15 - postShift) - 32; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** do { 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t a2 = pCoeffs[5]; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t a1 = pCoeffs[4]; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs0 = vdupq_n_s16(0); 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs0[0] = pCoeffs[3]; // b2 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs0[1] = pCoeffs[2]; // b1 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs0[2] = pCoeffs[0]; // b0 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** uint32_t zero = 0; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs1 = bCoeffs0; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs1 = vshlcq_s16(bCoeffs1, &zero, 16); 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs2 = bCoeffs1; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs2 = vshlcq_s16(bCoeffs2, &zero, 16); 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs3 = bCoeffs2; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs3 = vshlcq_s16(bCoeffs3, &zero, 16); 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs0[6] = a2; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs0[7] = a1; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs1[7] = a2; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs1[6] = a1; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs2 = 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** vsetq_lane_s32(vgetq_lane_s32((q31x4_t) bCoeffs0, 3), (q31x4_t) bCoeffs2, 3); 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** bCoeffs3 = 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** vsetq_lane_s32(vgetq_lane_s32((q31x4_t) bCoeffs1, 3), (q31x4_t) bCoeffs3, 3); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* 2 first elements are garbage, will be updated with history */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0 = vld1q(pIn - 2); 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pIn += 2; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[0] = pState[1]; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[1] = pState[0]; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[6] = pState[3]; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[7] = pState[2]; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs0, inVec0); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[6] = out1; ARM GAS /tmp/ccJrAs6S.s page 121 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs1, inVec0); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[7] = out; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out1; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs2, inVec0); 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[6] = out1; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs3, inVec0); 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * main loop 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** sample = (blockSize - 4) >> 2U; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* preload (efficient scheduling) */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0 = vld1q(pIn); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pIn += 4; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * Compute 4 outputs at a time. 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** while (sample > 0U) { 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[6] = out1; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[7] = out; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* store */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out1; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * in { x0 x1 x2 x3 x4 x5 yn2 yn1 } 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * x 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * bCoeffs0 { b2 b1 b0 0 0 0 a2 a1 } 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs0, inVec0); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* shift + saturate to 16 bit */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[6] = out1; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * in { x0 x1 x2 x3 x4 x5 y0 yn1 } 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * x 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * bCoeffs1 { 0 b2 b1 b0 0 0 a1 a2 } 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs1, inVec0); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); ARM GAS /tmp/ccJrAs6S.s page 122 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out1; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[7] = out; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * in { x0 x1 x2 x3 x4 x5 y0 yp1 } 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * x 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * bCoeffs2 { 0 0 b2 b1 b0 0 a2 a1 } 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs2, inVec0); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[6] = out1; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * in { x0 x1 x2 x3 x4 x5 y0 yp1 } 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * x 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * bCoeffs2 { 0 0 0 b2 b1 b0 a1 a2 } 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs3, inVec0); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0 = vld1q(pIn); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pIn += 4; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* decrement the loop counter */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** sample--; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out1; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * Tail handling 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** int32_t loopRemainder = blockSize & 3; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** if (loopRemainder == 3) { 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[6] = out1; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[7] = out; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs0, inVec0); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[6] = out1; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs1, inVec0); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out1; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 123 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[7] = out; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs2, inVec0); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out1; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Store the updated state variables back into the pState array */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[0] = vgetq_lane_s16(inVec0, 4); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[1] = vgetq_lane_s16(inVec0, 3); 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[3] = out; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[2] = out1; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } else if (loopRemainder == 2) { 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[6] = out1; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[7] = out; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs0, inVec0); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[6] = out1; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs1, inVec0); 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out1; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Store the updated state variables back into the pState array */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[0] = vgetq_lane_s16(inVec0, 3); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[1] = vgetq_lane_s16(inVec0, 2); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[3] = out1; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[2] = out; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } else if (loopRemainder == 1) { 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[6] = out1; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** inVec0[7] = out; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = vmlaldavq(bCoeffs0, inVec0); 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = sqrshrl_sat48(acc, shift); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out1; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Store the updated state variables back into the pState array */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[0] = vgetq_lane_s16(inVec0, 2); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[1] = vgetq_lane_s16(inVec0, 1); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[3] = out; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[2] = out1; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } else { 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Store the updated state variables back into the pState array */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[0] = vgetq_lane_s16(inVec0, 1); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[1] = vgetq_lane_s16(inVec0, 0); 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[3] = out1; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState[2] = out; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } ARM GAS /tmp/ccJrAs6S.s page 124 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pState += 4; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pCoeffs += 6; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * The first stage goes from the input buffer to the output buffer. 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * Subsequent stages occur in-place in the output buffer 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pIn = pDst; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * Reset to destination pointer 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pOut = pDst; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** while (--stages); 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #else 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** void arm_biquad_cascade_df1_q15( 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** const arm_biquad_casd_df1_inst_q15 * S, 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** const q15_t * pSrc, 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t * pDst, 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** uint32_t blockSize) 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** { 1176 .loc 11 318 0 1177 .cfi_startproc 1178 @ args = 0, pretend = 0, frame = 40 1179 @ frame_needed = 0, uses_anonymous_args = 0 1180 .LVL158: 1181 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 1182 .LCFI18: 1183 .cfi_def_cfa_offset 36 1184 .cfi_offset 4, -36 1185 .cfi_offset 5, -32 1186 .cfi_offset 6, -28 1187 .cfi_offset 7, -24 1188 .cfi_offset 8, -20 1189 .cfi_offset 9, -16 1190 .cfi_offset 10, -12 1191 .cfi_offset 11, -8 1192 .cfi_offset 14, -4 1193 0004 8BB0 sub sp, sp, #44 1194 .LCFI19: 1195 .cfi_def_cfa_offset 80 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #if defined (ARM_MATH_DSP) 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** const q15_t *pIn = pSrc; /* Source pointer */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t *pOut = pDst; /* Destination pointer */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q31_t in; /* Temporary variable to hold input value */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q31_t out; /* Temporary variable to hold output value * 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q31_t b0; /* Temporary variable to hold bo value */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q31_t b1, a1; /* Filter coefficients */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q31_t state_in, state_out; /* Filter state variables */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q31_t acc_l, acc_h; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q63_t acc; /* Accumulator */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t *pState = S->pState; /* State pointer */ ARM GAS /tmp/ccJrAs6S.s page 125 1196 .loc 11 332 0 1197 0006 4568 ldr r5, [r0, #4] 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */ 1198 .loc 11 334 0 1199 0008 90F90CA0 ldrsb r10, [r0, #12] 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 1200 .loc 11 332 0 1201 000c 0295 str r5, [sp, #8] 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** int32_t uShift = (32 - lShift); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** do 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** { 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Read the b0 and 0 coefficients using SIMD */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** b0 = read_q15x2_ia ((q15_t **) &pCoeffs); 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Read the b1 and b2 coefficients using SIMD */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** b1 = read_q15x2_ia ((q15_t **) &pCoeffs); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Read the a1 and a2 coefficients using SIMD */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** a1 = read_q15x2_ia ((q15_t **) &pCoeffs); 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Read the input state values from the state buffer: x[n-1], x[n-2] */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_in = read_q15x2_ia (&pState); 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Read the output state values from the state buffer: y[n-1], y[n-2] */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_out = read_q15x2_da (&pState); 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Apply loop unrolling and compute 2 output values simultaneously. */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* The variable acc hold output values that are being computed: 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** sample = blockSize >> 1U; 1202 .loc 11 361 0 1203 000e 5C08 lsrs r4, r3, #1 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */ 1204 .loc 11 333 0 1205 0010 8568 ldr r5, [r0, #8] 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ 1206 .loc 11 335 0 1207 0012 90F90000 ldrsb r0, [r0] 1208 .LVL159: 1209 0016 0390 str r0, [sp, #12] 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* First part of the processing with loop unrolling. Compute 2 outputs at a time. 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** ** a second loop below computes the remaining 1 sample. */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** while (sample > 0U) 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** { 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Read the input */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** in = read_q15x2_ia ((q15_t **) &pIn); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* out = b0 * x[n] + 0 * 0 */ 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = __SMUAD(b0, in); ARM GAS /tmp/ccJrAs6S.s page 126 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc += b1 * x[n-1] + b2 * x[n-2] + out */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = __SMLALD(b1, state_in, out); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc += a1 * y[n-1] + a2 * y[n-2] */ 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = __SMLALD(a1, state_out, acc); 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Calc lower part of acc */ 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc_l = acc & 0xffffffff; 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Calc upper part of acc */ 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc_h = (acc >> 32) & 0xffffffff; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Apply shift for lower part of acc and upper part of acc */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = (uint32_t) acc_l >> lShift | acc_h << uShift; 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = __SSAT(out, 16); 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Every time after the output is computed state should be updated. */ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* The states should be updated as: */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Xn2 = Xn1 */ 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Xn1 = Xn */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Yn2 = Yn1 */ 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Yn1 = acc */ 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_in = __PKHBT(in, state_in, 16); 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_out = __PKHBT(out, state_out, 16); 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #else 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_in = __PKHBT(state_in >> 16, (in >> 16), 16); 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_out = __PKHBT(state_out >> 16, (out), 16); 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* out = b0 * x[n] + 0 * 0 */ 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = __SMUADX(b0, in); 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc += b1 * x[n-1] + b2 * x[n-2] + out */ 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = __SMLALD(b1, state_in, out); 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc += a1 * y[n-1] + a2 * y[n-2] */ 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = __SMLALD(a1, state_out, acc); 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Calc lower part of acc */ 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc_l = acc & 0xffffffff; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Calc upper part of acc */ 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc_h = (acc >> 32) & 0xffffffff; 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Apply shift for lower part of acc and upper part of acc */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = (uint32_t) acc_l >> lShift | acc_h << uShift; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = __SSAT(out, 16); 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Store the output in the destination buffer. */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16)); ARM GAS /tmp/ccJrAs6S.s page 127 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #else 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16)); 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Every time after the output is computed state should be updated. */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* The states should be updated as: */ 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Xn2 = Xn1 */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Xn1 = Xn */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Yn2 = Yn1 */ 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Yn1 = acc */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_in = __PKHBT(in >> 16, state_in, 16); 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_out = __PKHBT(out, state_out, 16); 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #else 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_in = __PKHBT(state_in >> 16, in, 16); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_out = __PKHBT(state_out >> 16, out, 16); 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Decrement loop counter */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** sample--; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* If the blockSize is not a multiple of 2, compute any remaining output samples here. 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** ** No loop unrolling is used. */ 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** if ((blockSize & 0x1U) != 0U) 1210 .loc 11 457 0 1211 0018 03F00103 and r3, r3, #1 1212 .LVL160: 1213 001c A000 lsls r0, r4, #2 1214 001e 0693 str r3, [sp, #24] 1215 0020 1346 mov r3, r2 1216 0022 0344 add r3, r3, r0 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 1217 .loc 11 318 0 1218 0024 0191 str r1, [sp, #4] 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ 1219 .loc 11 334 0 1220 0026 CAF10F09 rsb r9, r10, #15 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 1221 .loc 11 361 0 1222 002a 0794 str r4, [sp, #28] 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */ 1223 .loc 11 333 0 1224 002c 0495 str r5, [sp, #16] 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 1225 .loc 11 318 0 1226 002e 0592 str r2, [sp, #20] 1227 .LVL161: 1228 0030 0890 str r0, [sp, #32] 1229 0032 0993 str r3, [sp, #36] 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 1230 .loc 11 336 0 1231 0034 0AF1110A add r10, r10, #17 1232 .LVL162: ARM GAS /tmp/ccJrAs6S.s page 128 1233 0038 2946 mov r1, r5 1234 .LVL163: 1235 .L45: 1236 .LBB1068: 1237 .LBB1069: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1238 .loc 3 928 0 1239 003a 0D68 ldr r5, [r1] @ unaligned 1240 .LVL164: 1241 .LBE1069: 1242 .LBE1068: 1243 .LBB1070: 1244 .LBB1071: 1245 003c 4C68 ldr r4, [r1, #4] @ unaligned 1246 .LVL165: 1247 .LBE1071: 1248 .LBE1070: 1249 .LBB1072: 1250 .LBB1073: 1251 003e 8868 ldr r0, [r1, #8] @ unaligned 1252 .LVL166: 1253 .LBE1073: 1254 .LBE1072: 1255 .LBB1074: 1256 .LBB1075: 1257 0040 029B ldr r3, [sp, #8] 1258 0042 0C31 adds r1, r1, #12 1259 .LVL167: 1260 0044 0491 str r1, [sp, #16] 1261 .LVL168: 1262 .LBE1075: 1263 .LBE1074: 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** { 1264 .loc 11 365 0 1265 0046 0799 ldr r1, [sp, #28] 1266 .LVL169: 1267 .LBB1077: 1268 .LBB1076: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1269 .loc 3 928 0 1270 0048 1A68 ldr r2, [r3] @ unaligned 1271 .LBE1076: 1272 .LBE1077: 1273 .LBB1078: 1274 .LBB1079: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1275 .loc 3 948 0 1276 004a 5B68 ldr r3, [r3, #4] @ unaligned 1277 .LBE1079: 1278 .LBE1078: 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** { 1279 .loc 11 365 0 1280 004c 0029 cmp r1, #0 1281 004e 79D0 beq .L51 1282 0050 DDF814E0 ldr lr, [sp, #20] 1283 0054 DDF80480 ldr r8, [sp, #4] 1284 0058 8C46 mov ip, r1 ARM GAS /tmp/ccJrAs6S.s page 129 1285 .LVL170: 1286 .L47: 1287 .LBB1080: 1288 .LBB1081: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1289 .loc 3 928 0 1290 005a 58F8041B ldr r1, [r8], #4 @ unaligned 1291 .LVL171: 1292 .LBE1081: 1293 .LBE1080: 1294 .LBB1082: 1295 .LBB1083: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1296 .loc 6 1977 0 1297 .syntax unified 1298 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1299 005e 25FB01FB smuad fp, r5, r1 1300 @ 0 "" 2 1301 .LVL172: 1302 .thumb 1303 .syntax unified 1304 .LBE1083: 1305 .LBE1082: 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc += a1 * y[n-1] + a2 * y[n-2] */ 1306 .loc 11 375 0 1307 0062 5E46 mov r6, fp 1308 0064 F717 asrs r7, r6, #31 1309 .LVL173: 1310 .LBB1084: 1311 .LBB1085: 1994:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1995:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1996:Drivers/CMSIS/Include/cmsis_gcc.h **** 1997:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) 1998:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1999:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2000:Drivers/CMSIS/Include/cmsis_gcc.h **** 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 2002:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2003:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2004:Drivers/CMSIS/Include/cmsis_gcc.h **** 2005:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) 2006:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2007:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{ 2008:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2]; 2009:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64; 2010:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr; 2011:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc; 2012:Drivers/CMSIS/Include/cmsis_gcc.h **** 2013:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */ 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (o 1312 .loc 6 2014 0 1313 0066 3E46 mov r6, r7 1314 0068 5F46 mov r7, fp 1315 .syntax unified 1316 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1317 006a C4FBC276 smlald r7, r6, r4, r2 ARM GAS /tmp/ccJrAs6S.s page 130 1318 @ 0 "" 2 1319 .LVL174: 1320 .thumb 1321 .syntax unified 1322 .LBE1085: 1323 .LBE1084: 1324 .LBB1086: 1325 .LBB1087: 1326 .syntax unified 1327 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1328 006e C0FBC376 smlald r7, r6, r0, r3 1329 @ 0 "" 2 1330 .LVL175: 1331 .thumb 1332 .syntax unified 1333 .LBE1087: 1334 .LBE1086: 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 1335 .loc 11 387 0 1336 0072 27FA09F7 lsr r7, r7, r9 1337 .LVL176: 1338 0076 06FA0AF6 lsl r6, r6, r10 1339 .LVL177: 1340 007a 3E43 orrs r6, r6, r7 1341 .LVL178: 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_out = __PKHBT(out, state_out, 16); 1342 .loc 11 401 0 1343 007c 8FB2 uxth r7, r1 1344 .LBB1088: 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 1345 .loc 11 389 0 1346 .syntax unified 1347 @ 389 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1 1348 007e 06F30F06 ssat r6, #16, r6 1349 @ 0 "" 2 1350 .LVL179: 1351 .thumb 1352 .syntax unified 1353 .LBE1088: 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #else 1354 .loc 11 402 0 1355 0082 B6B2 uxth r6, r6 1356 .LVL180: 1357 0084 46EA0343 orr r3, r6, r3, lsl #16 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_out = __PKHBT(out, state_out, 16); 1358 .loc 11 401 0 1359 0088 47EA0242 orr r2, r7, r2, lsl #16 1360 .LVL181: 1361 .LBB1089: 1362 .LBB1090: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1363 .loc 6 1985 0 1364 .syntax unified 1365 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1366 008c 25FB11FB smuadx fp, r5, r1 1367 @ 0 "" 2 1368 .LVL182: ARM GAS /tmp/ccJrAs6S.s page 131 1369 .thumb 1370 .syntax unified 1371 .LBE1090: 1372 .LBE1089: 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc += a1 * y[n-1] + a2 * y[n-2] */ 1373 .loc 11 411 0 1374 0090 5E46 mov r6, fp 1375 0092 F717 asrs r7, r6, #31 1376 .LVL183: 1377 .LBB1091: 1378 .LBB1092: 1379 .loc 6 2014 0 1380 0094 3E46 mov r6, r7 1381 .syntax unified 1382 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1383 0096 C4FBC2B6 smlald fp, r6, r4, r2 1384 @ 0 "" 2 1385 .LVL184: 1386 .thumb 1387 .syntax unified 1388 .LBE1092: 1389 .LBE1091: 1390 .LBB1093: 1391 .LBB1094: 1392 .syntax unified 1393 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1394 009a C0FBC3B6 smlald fp, r6, r0, r3 1395 @ 0 "" 2 1396 .LVL185: 1397 .thumb 1398 .syntax unified 1399 .LBE1094: 1400 .LBE1093: 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 1401 .loc 11 423 0 1402 009e 2BFA09F7 lsr r7, fp, r9 1403 00a2 06FA0AF6 lsl r6, r6, r10 1404 .LVL186: 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #else 1405 .loc 11 429 0 1406 00a6 1FFA83FB uxth fp, r3 1407 .LVL187: 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 1408 .loc 11 423 0 1409 00aa 3E43 orrs r6, r6, r7 1410 .LVL188: 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_out = __PKHBT(out, state_out, 16); 1411 .loc 11 443 0 1412 00ac 1204 lsls r2, r2, #16 1413 .LVL189: 1414 .LBB1095: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 1415 .loc 11 425 0 1416 .syntax unified 1417 @ 425 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1 1418 00ae 06F30F06 ssat r6, #16, r6 1419 @ 0 "" 2 ARM GAS /tmp/ccJrAs6S.s page 132 1420 .LVL190: 1421 .thumb 1422 .syntax unified 1423 .LBE1095: 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** { 1424 .loc 11 365 0 1425 00b2 BCF1010C subs ip, ip, #1 1426 .LVL191: 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #else 1427 .loc 11 429 0 1428 00b6 4BEA064B orr fp, fp, r6, lsl #16 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #else 1429 .loc 11 444 0 1430 00ba B6B2 uxth r6, r6 1431 .LVL192: 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_out = __PKHBT(out, state_out, 16); 1432 .loc 11 443 0 1433 00bc 42EA1142 orr r2, r2, r1, lsr #16 1434 .LBB1096: 1435 .LBB1097: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1436 .loc 3 969 0 1437 00c0 4EF804BB str fp, [lr], #4 @ unaligned 1438 .LVL193: 1439 .LBE1097: 1440 .LBE1096: 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #else 1441 .loc 11 444 0 1442 00c4 46EA0343 orr r3, r6, r3, lsl #16 1443 .LVL194: 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** { 1444 .loc 11 365 0 1445 00c8 C7D1 bne .L47 1446 00ca 0199 ldr r1, [sp, #4] 1447 00cc 089E ldr r6, [sp, #32] 1448 00ce 3144 add r1, r1, r6 1449 00d0 0191 str r1, [sp, #4] 1450 .LBB1099: 1451 .LBB1098: 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1452 .loc 3 975 0 1453 00d2 0999 ldr r1, [sp, #36] 1454 .LVL195: 1455 .L46: 1456 .LBE1098: 1457 .LBE1099: 1458 .loc 11 457 0 1459 00d4 069E ldr r6, [sp, #24] 1460 00d6 46B3 cbz r6, .L48 1461 .LVL196: 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** { 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Read the input */ 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** in = *pIn++; 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* out = b0 * x[n] + 0 * 0 */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = __SMUAD(b0, in); ARM GAS /tmp/ccJrAs6S.s page 133 1462 .loc 11 464 0 1463 00d8 019E ldr r6, [sp, #4] 1464 00da B6F900C0 ldrsh ip, [r6] 1465 .LVL197: 1466 .LBB1100: 1467 .LBB1101: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1468 .loc 6 1977 0 1469 .syntax unified 1470 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1471 00de 25FB0CF5 smuad r5, r5, ip 1472 @ 0 "" 2 1473 .LVL198: 1474 .thumb 1475 .syntax unified 1476 .LBE1101: 1477 .LBE1100: 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #else 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = __SMUADX(b0, in); 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc = b1 * x[n-1] + b2 * x[n-2] + out */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = __SMLALD(b1, state_in, out); 1478 .loc 11 470 0 1479 00e2 EF17 asrs r7, r5, #31 1480 .LVL199: 1481 .LBB1102: 1482 .LBB1103: 1483 .loc 6 2014 0 1484 00e4 3E46 mov r6, r7 1485 .syntax unified 1486 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1487 00e6 C4FBC256 smlald r5, r6, r4, r2 1488 @ 0 "" 2 1489 .LVL200: 1490 .thumb 1491 .syntax unified 1492 .LBE1103: 1493 .LBE1102: 1494 .LBB1104: 1495 .LBB1105: 1496 .syntax unified 1497 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1498 00ea C0FBC356 smlald r5, r6, r0, r3 1499 @ 0 "" 2 1500 .LVL201: 1501 .thumb 1502 .syntax unified 1503 .LBE1105: 1504 .LBE1104: 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc += a1 * y[n-1] + a2 * y[n-2] */ 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = __SMLALD(a1, state_out, acc); 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Calc lower part of acc */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc_l = acc & 0xffffffff; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 134 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Calc upper part of acc */ 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc_h = (acc >> 32) & 0xffffffff; 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Apply shift for lower part of acc and upper part of acc */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = (uint32_t) acc_l >> lShift | acc_h << uShift; 1505 .loc 11 482 0 1506 00ee 06FA0AF6 lsl r6, r6, r10 1507 .LVL202: 1508 00f2 25FA09F5 lsr r5, r5, r9 1509 .LVL203: 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** out = __SSAT(out, 16); 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Store the output in the destination buffer. */ 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) out; 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Every time after the output is computed state should be updated. */ 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* The states should be updated as: */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Xn2 = Xn1 */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Xn1 = Xn */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Yn2 = Yn1 */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Yn1 = acc */ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_in = __PKHBT(in, state_in, 16); 1510 .loc 11 498 0 1511 00f6 1FFA8CFC uxth ip, ip 1512 .LVL204: 1513 00fa 4CEA024C orr ip, ip, r2, lsl #16 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 1514 .loc 11 482 0 1515 00fe 3543 orrs r5, r5, r6 1516 .LVL205: 1517 .LBB1106: 1518 .LBB1107: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1519 .loc 3 969 0 1520 0100 029A ldr r2, [sp, #8] 1521 .LBE1107: 1522 .LBE1106: 1523 .LBB1110: 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 1524 .loc 11 484 0 1525 .syntax unified 1526 @ 484 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1 1527 0102 05F30F05 ssat r5, #16, r5 1528 @ 0 "" 2 1529 .LVL206: 1530 .thumb 1531 .syntax unified 1532 .LBE1110: 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_out = __PKHBT(out, state_out, 16); 1533 .loc 11 499 0 1534 0106 A8B2 uxth r0, r5 1535 0108 40EA0343 orr r3, r0, r3, lsl #16 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 135 1536 .loc 11 487 0 1537 010c 0D80 strh r5, [r1] @ movhi 1538 .LVL207: 1539 .LBB1111: 1540 .LBB1108: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1541 .loc 3 969 0 1542 010e 5360 str r3, [r2, #4] @ unaligned 1543 .LBE1108: 1544 .LBE1111: 1545 .LBB1112: 1546 .LBB1113: 1547 0110 1346 mov r3, r2 1548 0112 0833 adds r3, r3, #8 1549 0114 0293 str r3, [sp, #8] 1550 .LVL208: 1551 .LBE1113: 1552 .LBE1112: 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #else 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_in = __PKHBT(state_in >> 16, in, 16); 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** state_out = __PKHBT(state_out >> 16, out, 16); 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* The first stage goes from the input wire to the output wire. */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Subsequent numStages occur in-place in the output wire */ 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pIn = pDst; 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Reset the output pointer */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pOut = pDst; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Store the updated state variables back into the state array */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** write_q15x2_ia (&pState, state_in); 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** write_q15x2_ia (&pState, state_out); 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Decrement loop counter */ 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** stage--; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } while (stage > 0U); 1553 .loc 11 520 0 1554 0116 039B ldr r3, [sp, #12] 1555 .LBB1117: 1556 .LBB1114: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1557 .loc 3 969 0 1558 0118 C2F800C0 str ip, [r2] @ unaligned 1559 .LVL209: 1560 .LBE1114: 1561 .LBE1117: 1562 .loc 11 520 0 1563 011c 013B subs r3, r3, #1 1564 .LVL210: 1565 011e 0393 str r3, [sp, #12] 1566 0120 0DD0 beq .L55 1567 .LVL211: 1568 .L49: 1569 0122 059B ldr r3, [sp, #20] ARM GAS /tmp/ccJrAs6S.s page 136 1570 .LVL212: 1571 0124 0193 str r3, [sp, #4] 1572 0126 0499 ldr r1, [sp, #16] 1573 0128 87E7 b .L45 1574 .L48: 1575 .LVL213: 1576 .LBB1118: 1577 .LBB1115: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1578 .loc 3 969 0 1579 012a 0299 ldr r1, [sp, #8] 1580 .LBE1115: 1581 .LBE1118: 1582 .LBB1119: 1583 .LBB1109: 1584 012c 4B60 str r3, [r1, #4] @ unaligned 1585 012e 01F10803 add r3, r1, #8 1586 0132 0293 str r3, [sp, #8] 1587 .LVL214: 1588 .LBE1109: 1589 .LBE1119: 1590 .loc 11 520 0 1591 0134 039B ldr r3, [sp, #12] 1592 .LBB1120: 1593 .LBB1116: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1594 .loc 3 969 0 1595 0136 0A60 str r2, [r1] @ unaligned 1596 .LVL215: 1597 .LBE1116: 1598 .LBE1120: 1599 .loc 11 520 0 1600 0138 013B subs r3, r3, #1 1601 .LVL216: 1602 013a 0393 str r3, [sp, #12] 1603 013c F1D1 bne .L49 1604 .L55: 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #else 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** const q15_t *pIn = pSrc; /* Source pointer */ 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t *pOut = pDst; /* Destination pointer */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t b0, b1, b2, a1, a2; /* Filter coefficients */ 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t Xn; /* temporary input */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q63_t acc; /* Accumulator */ 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** q15_t *pState = S->pState; /* State pointer */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** do 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** { 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Reading the coefficients */ 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** b0 = *pCoeffs++; 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pCoeffs++; // skip the 0 coefficient 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** b1 = *pCoeffs++; ARM GAS /tmp/ccJrAs6S.s page 137 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** b2 = *pCoeffs++; 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** a1 = *pCoeffs++; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** a2 = *pCoeffs++; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Reading the state values */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** Xn1 = pState[0]; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** Xn2 = pState[1]; 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** Yn1 = pState[2]; 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** Yn2 = pState[3]; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* The variables acc holds the output value that is computed: 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** */ 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** sample = blockSize; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** while (sample > 0U) 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** { 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Read the input */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** Xn = *pIn++; 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc = b0 * x[n] */ 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = (q31_t) b0 *Xn; 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc += b1 * x[n-1] */ 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc += (q31_t) b1 *Xn1; 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc += b[2] * x[n-2] */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc += (q31_t) b2 *Xn2; 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc += a1 * y[n-1] */ 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc += (q31_t) a1 *Yn1; 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* acc += a2 * y[n-2] */ 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc += (q31_t) a2 *Yn2; 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* The result is converted to 1.31 */ 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** acc = __SSAT((acc >> shift), 16); 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Every time after the output is computed state should be updated. */ 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* The states should be updated as: */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Xn2 = Xn1 */ 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Xn1 = Xn */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Yn2 = Yn1 */ 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Yn1 = acc */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** Xn2 = Xn1; 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** Xn1 = Xn; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** Yn2 = Yn1; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** Yn1 = (q15_t) acc; 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Store the output in the destination buffer. */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pOut++ = (q15_t) acc; 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* decrement the loop counter */ 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** sample--; 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* The first stage goes from the input buffer to the output buffer. */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Subsequent stages occur in-place in the output buffer */ ARM GAS /tmp/ccJrAs6S.s page 138 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pIn = pDst; 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Reset to destination pointer */ 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** pOut = pDst; 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** /* Store the updated state variables back into the pState array */ 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pState++ = Xn1; 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pState++ = Xn2; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pState++ = Yn1; 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** *pState++ = Yn2; 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } while (--stage); 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** } 1605 .loc 11 613 0 1606 013e 0BB0 add sp, sp, #44 1607 .LCFI20: 1608 .cfi_remember_state 1609 .cfi_def_cfa_offset 36 1610 @ sp needed 1611 0140 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 1612 .LVL217: 1613 .L51: 1614 .LCFI21: 1615 .cfi_restore_state 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c **** { 1616 .loc 11 365 0 1617 0144 0599 ldr r1, [sp, #20] 1618 0146 C5E7 b .L46 1619 .cfi_endproc 1620 .LFE156: 1622 .section .text.arm_biquad_cascade_df1_q31,"ax",%progbits 1623 .align 1 1624 .p2align 2,,3 1625 .global arm_biquad_cascade_df1_q31 1626 .syntax unified 1627 .thumb 1628 .thumb_func 1629 .fpu fpv4-sp-d16 1631 arm_biquad_cascade_df1_q31: 1632 .LFB157: 1633 .file 12 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Title: arm_biquad_cascade_df1_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Description: Processing function for the Q31 Biquad cascade filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * ARM GAS /tmp/ccJrAs6S.s page 139 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** @addtogroup BiquadCascadeDF1 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** @brief Processing function for the Q31 Biquad cascade filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** @param[in] S points to an instance of the Q31 Biquad cascade structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** The function is implemented using an internal 64-bit accumulator. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** The accumulator has a 2.62 format and maintains full precision of the intermedia 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Thus, if the accumulator result overflows it wraps around rather than clip. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** In order to avoid overflows completely the input signal must be scaled down by 2 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 1.31 format by discarding the low 32 bits. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** @remark 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Refer to \ref arm_biquad_cascade_df1_fast_q31() for a faster but less precise im 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** #if defined(ARM_MATH_MVEI) 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** void arm_biquad_cascade_df1_q31( 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** const arm_biquad_casd_df1_inst_q31 * S, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** const q31_t * pSrc, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31_t * pDst, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** uint32_t blockSize) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** { 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** const q31_t *pIn = pSrc; /* input pointer initialization */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31_t *pOut = pDst; /* output pointer initialization */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** int shift; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** uint32_t stages = S->numStages; /* loop counters */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** int postShift = S->postShift; ARM GAS /tmp/ccJrAs6S.s page 140 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31x4_t b0Coeffs, b1Coeffs, a0Coeffs, a1Coeffs; /* Coefficients vector * 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31x4_t stateVec; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31_t *pState = S->pState; /* pState pointer initialization */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31x4_t inVec0; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** int64_t acc; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31_t out, out1; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** shift = (postShift + 1 + 8); 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** do { 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Reading the coefficients 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * generates : 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Fwd0 { b2 b1 b0 0 } 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Fwd1 { 0 b2 b1 b0 } 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Bwd0 { 0 0 a2 a1 } 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Bwd0 { 0 0 a1 a2 } 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * (can be moved in init) 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** b0Coeffs = vdupq_n_s32(0); 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** a0Coeffs = vdupq_n_s32(0); 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** b0Coeffs[0] = pCoeffs[2]; // b2 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** b0Coeffs[1] = pCoeffs[1]; // b1 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** b0Coeffs[2] = pCoeffs[0]; // b0 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** b1Coeffs = b0Coeffs; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** uint32_t zero = 0; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** b1Coeffs = vshlcq_s32(b1Coeffs, &zero, 32); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** a0Coeffs[2] = pCoeffs[4]; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** a0Coeffs[3] = pCoeffs[3]; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** a1Coeffs = vrev64q_s32(a0Coeffs); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * prologue consumes history samples 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 2 first elements are garbage, will be updated with history */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** inVec0 = vld1q(pIn - 2); 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** inVec0[0] = pState[1]; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** inVec0[1] = pState[0]; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[2] = pState[3]; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[3] = pState[2]; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhq(b0Coeffs, inVec0); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = lsll(acc, shift); 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[2] = out; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhq(b1Coeffs, inVec0); ARM GAS /tmp/ccJrAs6S.s page 141 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhaq(acc, a1Coeffs, stateVec); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = lsll(acc, shift); 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** inVec0 = vld1q(pIn); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pIn += 2; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * main loop 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** uint32_t sample = (blockSize - 2) >> 2U; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * First part of the processing with loop unrolling. 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Compute 4 outputs at a time. 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** while (sample > 0U) { 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[3] = out1; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = out; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = out1; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * in { x0 x1 x2 x3 } 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * x 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * b0Coeffs { b2 b1 b0 0 } 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhq(b0Coeffs, inVec0); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * out { 0 0 yn2 yn1 } 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * x 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * a0Coeffs { 0 0 a2 a1 } 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = lsll(acc, shift); 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[2] = out; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * in { x0 x1 x2 x3 } 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * x 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * b0Coeffs { 0 b2 b1 b0 } 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhq(b1Coeffs, inVec0); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * out { 0 0 y0 yn1 } 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * x 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * a0Coeffs { 0 0 a1 a2 } 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhaq(acc, a1Coeffs, stateVec); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = lsll(acc, shift); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[3] = out1; ARM GAS /tmp/ccJrAs6S.s page 142 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** inVec0 = vld1q(pIn); 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pIn += 2; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* unrolled part */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = out; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = out1; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhq(b0Coeffs, inVec0); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = lsll(acc, shift); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[2] = out; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhq(b1Coeffs, inVec0); 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhaq(acc, a1Coeffs, stateVec); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = lsll(acc, shift); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** inVec0 = vld1q(pIn); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pIn += 2; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** sample--; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** } 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = out; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = out1; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Tail handling 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** int32_t loopRemainder = blockSize & 3; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** if (loopRemainder == 2) { 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Store the updated state variables back into the pState array 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[0] = inVec0[1]; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[1] = inVec0[0]; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[3] = out; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[2] = out1; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** } else if (loopRemainder == 1) { 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[3] = out1; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhq(b0Coeffs, inVec0); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = lsll(acc, shift); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[2] = out; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhq(b1Coeffs, inVec0); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhaq(acc, a1Coeffs, stateVec); 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = lsll(acc, shift); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[3] = out1; ARM GAS /tmp/ccJrAs6S.s page 143 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** inVec0 = vld1q(pIn); 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pIn += 2; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = out; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = out1; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhq(b0Coeffs, inVec0); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = lsll(acc, shift); 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = out; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Store the updated state variables back into the pState array 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[0] = inVec0[2]; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[1] = inVec0[1]; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[3] = out1; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[2] = out; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** } else if (loopRemainder == 0) { 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[3] = out1; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhq(b0Coeffs, inVec0); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = lsll(acc, shift); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[2] = out; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhq(b1Coeffs, inVec0); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhaq(acc, a1Coeffs, stateVec); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = lsll(acc, shift); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** out1 = (q31_t) ((acc >> 32) & 0xffffffff); 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = out; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = out1; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Store the updated state variables back into the pState array 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[0] = inVec0[3]; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[1] = inVec0[2]; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[3] = out; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[2] = out1; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** } else { 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stateVec[3] = out1; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhq(b0Coeffs, inVec0); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = lsll(acc, shift); 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** out = (q31_t) ((acc >> 32) & 0xffffffff); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = out; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* ARM GAS /tmp/ccJrAs6S.s page 144 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * Store the updated state variables back into the pState array 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[0] = inVec0[2]; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[1] = inVec0[1]; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[3] = out1; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState[2] = out; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** } 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pCoeffs += 5; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pState += 4; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* The first stage goes from the input buffer to the output buffer. */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Subsequent stages occur in-place in the output buffer */ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pIn = pDst; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Reset to destination pointer */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pOut = pDst; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** } 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** while (--stages); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** } 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** #else 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** void arm_biquad_cascade_df1_q31( 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** const arm_biquad_casd_df1_inst_q31 * S, 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** const q31_t * pSrc, 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31_t * pDst, 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** uint32_t blockSize) 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** { 1634 .loc 12 326 0 1635 .cfi_startproc 1636 @ args = 0, pretend = 0, frame = 48 1637 @ frame_needed = 0, uses_anonymous_args = 0 1638 .LVL218: 1639 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 1640 .LCFI22: 1641 .cfi_def_cfa_offset 36 1642 .cfi_offset 4, -36 1643 .cfi_offset 5, -32 1644 .cfi_offset 6, -28 1645 .cfi_offset 7, -24 1646 .cfi_offset 8, -20 1647 .cfi_offset 9, -16 1648 .cfi_offset 10, -12 1649 .cfi_offset 11, -8 1650 .cfi_offset 14, -4 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** const q31_t *pIn = pSrc; /* Source pointer */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31_t *pOut = pDst; /* Destination pointer */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31_t *pState = S->pState; /* pState pointer */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q63_t acc; /* Accumulator */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31_t Xn; /* Temporary input */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** uint32_t uShift = ((uint32_t) S->postShift + 1U); 1651 .loc 12 335 0 1652 0004 057B ldrb r5, [r0, #12] @ zero_extendqisi2 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** const q31_t *pIn = pSrc; /* Source pointer */ ARM GAS /tmp/ccJrAs6S.s page 145 1653 .loc 12 326 0 1654 0006 8C46 mov ip, r1 1655 .LVL219: 1656 0008 D0E90114 ldrd r1, r4, [r0, #4] 1657 .LVL220: 1658 000c 8DB0 sub sp, sp, #52 1659 .LCFI23: 1660 .cfi_def_cfa_offset 88 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ 1661 .loc 12 336 0 1662 000e C5F11F08 rsb r8, r5, #31 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** const q31_t *pIn = pSrc; /* Source pointer */ 1663 .loc 12 326 0 1664 0012 CDE90A23 strd r2, r3, [sp, #40] 1665 0016 C8F12003 rsb r3, r8, #32 1666 .LVL221: 1667 001a 0693 str r3, [sp, #24] 1668 001c 04F11403 add r3, r4, #20 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** uint32_t sample, stage = S->numStages; /* Loop counters */ 1669 .loc 12 337 0 1670 0020 0068 ldr r0, [r0] 1671 .LVL222: 1672 0022 0893 str r3, [sp, #32] 1673 0024 01F11003 add r3, r1, #16 1674 0028 0990 str r0, [sp, #36] 1675 002a 0793 str r3, [sp, #28] 1676 002c E646 mov lr, ip 1677 .LVL223: 1678 .L60: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** q31_t acc_l, acc_h; /* temporary output variables */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** #endif 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** do 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** { 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Reading the coefficients */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** b0 = *pCoeffs++; 1679 .loc 12 346 0 1680 002e 089B ldr r3, [sp, #32] 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** b1 = *pCoeffs++; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** b2 = *pCoeffs++; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** a1 = *pCoeffs++; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** a2 = *pCoeffs++; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Reading the pState values */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn1 = pState[0]; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn2 = pState[1]; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Yn1 = pState[2]; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Yn2 = pState[3]; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Apply loop unrolling and compute 4 output values simultaneously. */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Variable acc hold output values that are being computed: 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] ARM GAS /tmp/ccJrAs6S.s page 146 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** sample = blockSize >> 2U; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** while (sample > 0U) 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** { 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Read the first input */ 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn = *pIn++; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q6 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* The result is converted to 1.31 , Yn2 variable is reused */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */ 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */ 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Apply shift for lower part of acc and upper part of acc */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift; 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Store output in destination buffer. */ 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = Yn2; 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Read the second input */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn2 = *pIn++; 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = ((q63_t) b0 * Xn2) + ((q63_t) b1 * Xn) + ((q63_t) b2 * Xn1) + ((q63_t) a1 * Yn2) + ((q6 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* The result is converted to 1.31, Yn1 variable is reused */ 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */ 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Apply shift for lower part of acc and upper part of acc */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Store output in destination buffer. */ 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = Yn1; 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Read the third input */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn1 = *pIn++; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = ((q63_t) b0 * Xn1) + ((q63_t) b1 * Xn2) + ((q63_t) b2 * Xn) + ((q63_t) a1 * Yn1) + ((q6 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* The result is converted to 1.31, Yn2 variable is reused */ 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */ 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Apply shift for lower part of acc and upper part of acc */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift; 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Store output in destination buffer. */ 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = Yn2; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Read the forth input */ 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn = *pIn++; ARM GAS /tmp/ccJrAs6S.s page 147 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn2) + ((q6 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* The result is converted to 1.31, Yn1 variable is reused */ 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */ 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Apply shift for lower part of acc and upper part of acc */ 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Store output in destination buffer. */ 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = Yn1; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Every time after the output is computed state should be updated. */ 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* The states should be updated as: */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Xn2 = Xn1 */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Xn1 = Xn */ 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Yn2 = Yn1 */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Yn1 = acc */ 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn2 = Xn1; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn1 = Xn; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* decrement loop counter */ 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** sample--; 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** } 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Loop unrolling: Compute remaining outputs */ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** sample = blockSize & 0x3U; 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** #else 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Initialize blkCnt with number of samples */ 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** sample = blockSize; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** while (sample > 0U) 1681 .loc 12 458 0 1682 0030 0B9F ldr r7, [sp, #44] 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** b1 = *pCoeffs++; 1683 .loc 12 346 0 1684 0032 53F8142C ldr r2, [r3, #-20] 1685 0036 0192 str r2, [sp, #4] 1686 .LVL224: 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** b1 = *pCoeffs++; 1687 .loc 12 347 0 1688 0038 53F8102C ldr r2, [r3, #-16] 1689 .LVL225: 1690 003c 0292 str r2, [sp, #8] 1691 .LVL226: 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** a1 = *pCoeffs++; 1692 .loc 12 348 0 1693 003e 53F80C2C ldr r2, [r3, #-12] 1694 .LVL227: 1695 0042 0392 str r2, [sp, #12] 1696 .LVL228: ARM GAS /tmp/ccJrAs6S.s page 148 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** a2 = *pCoeffs++; 1697 .loc 12 349 0 1698 0044 53F8082C ldr r2, [r3, #-8] 1699 .LVL229: 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 1700 .loc 12 350 0 1701 0048 53F8043C ldr r3, [r3, #-4] 1702 004c 0593 str r3, [sp, #20] 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn2 = pState[1]; 1703 .loc 12 353 0 1704 004e 079B ldr r3, [sp, #28] 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** a2 = *pCoeffs++; 1705 .loc 12 349 0 1706 0050 0492 str r2, [sp, #16] 1707 .LVL230: 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Yn1 = pState[2]; 1708 .loc 12 354 0 1709 0052 53E9040C ldrd r0, ip, [r3, #-16] 1710 .LVL231: 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Yn2 = pState[3]; 1711 .loc 12 355 0 1712 0056 53F8081C ldr r1, [r3, #-8] 1713 .LVL232: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 1714 .loc 12 356 0 1715 005a 53F8046C ldr r6, [r3, #-4] 1716 .LVL233: 1717 .loc 12 458 0 1718 005e 002F cmp r7, #0 1719 0060 45D0 beq .L61 1720 0062 0A9C ldr r4, [sp, #40] 1721 0064 0097 str r7, [sp] 1722 0066 01E0 b .L59 1723 .LVL234: 1724 .L62: 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** { 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Read the input */ 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn = *pIn++; 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q6 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* The result is converted to 1.31 */ 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** acc = acc >> lShift; 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Store output in destination buffer. */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pOut++ = (q31_t) acc; 1725 .loc 12 470 0 1726 0068 4946 mov r1, r9 1727 .LVL235: 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 1728 .loc 12 461 0 1729 006a 2846 mov r0, r5 1730 .LVL236: 1731 .L59: 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 1732 .loc 12 464 0 ARM GAS /tmp/ccJrAs6S.s page 149 1733 006c 029B ldr r3, [sp, #8] 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 1734 .loc 12 461 0 1735 006e 5EF8045B ldr r5, [lr], #4 1736 .LVL237: 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 1737 .loc 12 464 0 1738 0072 019F ldr r7, [sp, #4] 1739 0074 80FB0323 smull r2, r3, r0, r3 1740 0078 C7FB0523 smlal r2, r3, r7, r5 1741 007c 039F ldr r7, [sp, #12] 1742 007e C7FB0C23 smlal r2, r3, r7, ip 1743 0082 049F ldr r7, [sp, #16] 1744 0084 C7FB0123 smlal r2, r3, r7, r1 1745 0088 059F ldr r7, [sp, #20] 1746 008a C7FB0623 smlal r2, r3, r7, r6 1747 .LVL238: 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 1748 .loc 12 467 0 1749 008e 069E ldr r6, [sp, #24] 1750 .LVL239: 1751 0090 B8F1200A subs r10, r8, #32 1752 0094 03FA06FB lsl fp, r3, r6 1753 0098 22FA08F9 lsr r9, r2, r8 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** { 1754 .loc 12 458 0 1755 009c 009A ldr r2, [sp] 1756 .LVL240: 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 1757 .loc 12 467 0 1758 009e 49EA0B09 orr r9, r9, fp 1759 00a2 58BF it pl 1760 00a4 43FA0AFA asrpl r10, r3, r10 1761 .loc 12 470 0 1762 00a8 04F10404 add r4, r4, #4 1763 .LVL241: 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 1764 .loc 12 467 0 1765 00ac 58BF it pl 1766 00ae 49EA0A09 orrpl r9, r9, r10 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** { 1767 .loc 12 458 0 1768 00b2 013A subs r2, r2, #1 1769 00b4 8446 mov ip, r0 1770 .LVL242: 1771 00b6 0E46 mov r6, r1 1772 .loc 12 470 0 1773 00b8 44F8049C str r9, [r4, #-4] 1774 .LVL243: 1775 00bc 4B46 mov r3, r9 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** { 1776 .loc 12 458 0 1777 00be 0092 str r2, [sp] 1778 00c0 D2D1 bne .L62 1779 .LVL244: 1780 .L57: 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 150 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Every time after the output is computed state should be updated. */ 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* The states should be updated as: */ 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Xn2 = Xn1 */ 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Xn1 = Xn */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Yn2 = Yn1 */ 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Yn1 = acc */ 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn2 = Xn1; 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn1 = Xn; 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Yn2 = Yn1; 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Yn1 = (q31_t) acc; 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* decrement loop counter */ 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** sample--; 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** } 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Store the updated state variables back into the pState array */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pState++ = Xn1; 1781 .loc 12 488 0 1782 00c2 079A ldr r2, [sp, #28] 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pState++ = Xn2; 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pState++ = Yn1; 1783 .loc 12 490 0 1784 00c4 42F8083C str r3, [r2, #-8] 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pState++ = Yn2; 1785 .loc 12 491 0 1786 00c8 1346 mov r3, r2 1787 .LVL245: 1788 00ca 1033 adds r3, r3, #16 1789 00cc 0793 str r3, [sp, #28] 1790 .LVL246: 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* The first stage goes from the input buffer to the output buffer. */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Subsequent numStages occur in-place in the output buffer */ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pIn = pDst; 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* Reset output pointer */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** pOut = pDst; 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** /* decrement loop counter */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** stage--; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** } while (stage > 0U); 1791 .loc 12 503 0 1792 00ce DDE9093E ldrd r3, lr, [sp, #36] 1793 .LVL247: 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pState++ = Yn1; 1794 .loc 12 489 0 1795 00d2 42E90450 strd r5, r0, [r2, #-16] 1796 .LVL248: 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** *pState++ = Yn2; 1797 .loc 12 491 0 1798 00d6 42F8041C str r1, [r2, #-4] 1799 .LVL249: 1800 00da 089A ldr r2, [sp, #32] 1801 .LVL250: 1802 .loc 12 503 0 1803 00dc 013B subs r3, r3, #1 ARM GAS /tmp/ccJrAs6S.s page 151 1804 .LVL251: 1805 00de 02F11402 add r2, r2, #20 1806 00e2 0892 str r2, [sp, #32] 1807 00e4 0993 str r3, [sp, #36] 1808 00e6 A2D1 bne .L60 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** } 1809 .loc 12 505 0 1810 00e8 0DB0 add sp, sp, #52 1811 .LCFI24: 1812 .cfi_remember_state 1813 .cfi_def_cfa_offset 36 1814 @ sp needed 1815 00ea BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 1816 .LVL252: 1817 .L61: 1818 .LCFI25: 1819 .cfi_restore_state 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Yn2 = pState[3]; 1820 .loc 12 355 0 1821 00ee 0B46 mov r3, r1 1822 .LVL253: 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Xn2 = pState[1]; 1823 .loc 12 353 0 1824 00f0 0546 mov r5, r0 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** 1825 .loc 12 356 0 1826 00f2 3146 mov r1, r6 1827 .LVL254: 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c **** Yn1 = pState[2]; 1828 .loc 12 354 0 1829 00f4 6046 mov r0, ip 1830 .LVL255: 1831 00f6 E4E7 b .L57 1832 .cfi_endproc 1833 .LFE157: 1835 .section .text.arm_biquad_cascade_df2T_f32,"ax",%progbits 1836 .align 1 1837 .p2align 2 1838 .global arm_biquad_cascade_df2T_f32 1839 .syntax unified 1840 .thumb 1841 .thumb_func 1842 .fpu fpv4-sp-d16 1844 arm_biquad_cascade_df2T_f32: 1845 .LFB158: 1846 .file 13 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * Title: arm_biquad_cascade_df2T_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * Description: Processing function for floating-point transposed direct form II Biquad cascade fi 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * -------------------------------------------------------------------- */ ARM GAS /tmp/ccJrAs6S.s page 152 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** @addtogroup BiquadCascadeDF2T 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** @brief Processing function for the floating-point transposed direct form II Biquad cascad 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** @param[in] S points to an instance of the filter data structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** #include "arm_helium_utils.h" 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** void arm_biquad_cascade_df2T_f32( 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** const arm_biquad_cascade_df2T_instance_f32 * S, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** const float32_t * pSrc, 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t * pDst, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** uint32_t blockSize) 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** { 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** const float32_t *pIn = pSrc; /* source pointer */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t Xn0, Xn1; 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t acc0, acc1; 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t *pOut = pDst; /* destination pointer */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t *pState = S->pState; /* State pointer */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** uint32_t sample, stage = S->numStages; /* loop counters */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t const *pCurCoeffs = /* coefficient pointer */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** (float32_t const *) S->pCoeffs; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** f32x4_t b0Coeffs, a0Coeffs; /* Coefficients vector */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** f32x4_t b1Coeffs, a1Coeffs; /* Modified coef. vector */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** f32x4_t state; /* State vector */ ARM GAS /tmp/ccJrAs6S.s page 153 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** do 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** { 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * temporary carry variable for feeding the 128-bit vector shifter 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** uint32_t tmp = 0; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * Reading the coefficients 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * b0Coeffs = {b0, b1, b2, x} 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * a0Coeffs = { x, a1, a2, x} 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** b0Coeffs = vld1q(pCurCoeffs); pCurCoeffs+= 2; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** a0Coeffs = vld1q(pCurCoeffs); pCurCoeffs+= 3; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * Reading the state values 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * state = {d1, d2, 0, 0} 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = *(f32x4_t *) pState; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = vsetq_lane(0.0f, state, 2); 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = vsetq_lane(0.0f, state, 3); 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* b1Coeffs = {b0, b1, b2, x} */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* b1Coeffs = { x, x, a1, a2} */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** b1Coeffs = vshlcq_s32(b0Coeffs, &tmp, 32); 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** a1Coeffs = vshlcq_s32(a0Coeffs, &tmp, 32); 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** sample = blockSize / 2; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* unrolled 2 x */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** while (sample > 0U) 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * Read 2 inputs 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn0 = *pIn++; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * 1st half: 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * / acc0 \ / b0 \ / d1 \ / 0 \ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * | d1 | = | b1 | * Xn0 + | d2 | + | a1 | x acc0 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * | d2 | | b2 | | 0 | | a2 | 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * \ x / \ x / \ x / \ x / 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = vfmaq(state, b0Coeffs, Xn0); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc0 = vgetq_lane(state, 0); 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = vfmaq(state, a0Coeffs, acc0); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = vsetq_lane(0.0f, state, 3); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * 2nd half: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * same as 1st half, but all vector elements shifted down. 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * / x \ / x \ / x \ / x \ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * | acc1 | = | b0 | * Xn1 + | d1 | + | 0 | x acc1 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * | d1 | | b1 | | d2 | | a1 | ARM GAS /tmp/ccJrAs6S.s page 154 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * \ d2 / \ b2 / \ 0 / \ a2 / 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = vfmaq(state, b1Coeffs, Xn1); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = vgetq_lane(state, 1); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = vfmaq(state, a1Coeffs, acc1); 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* move d1, d2 up + clearing */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* expect dual move or long move */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = vsetq_lane(vgetq_lane(state, 2), state, 0); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = vsetq_lane(vgetq_lane(state, 3), state, 1); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = vsetq_lane(0.0f, state, 2); 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * Store the results in the destination buffer. 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc0; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * decrement the loop counter 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** sample--; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * tail handling 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** if (blockSize & 1) 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** { 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn0 = *pIn++; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = vfmaq(state, b0Coeffs, Xn0); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc0 = vgetq_lane(state, 0); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** state = vfmaq(state, a0Coeffs, acc0); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc0; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pState++ = vgetq_lane(state, 1); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pState++ = vgetq_lane(state, 2); 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** else 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** { 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pState++ = vgetq_lane(state, 0); 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pState++ = vgetq_lane(state, 1); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * The current stage output is given as the input to the next stage 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pIn = pDst; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * Reset the output working pointer 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pOut = pDst; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** * decrement the loop counter 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** stage--; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** while (stage > 0U); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } ARM GAS /tmp/ccJrAs6S.s page 155 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** #else 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** #if defined(ARM_MATH_NEON) 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** void arm_biquad_cascade_df2T_f32( 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** const arm_biquad_cascade_df2T_instance_f32 * S, 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** const float32_t * pSrc, 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t * pDst, 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** uint32_t blockSize) 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** { 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** const float32_t *pIn = pSrc; /* source pointer */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t *pOut = pDst; /* destination pointer */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t *pState = S->pState; /* State pointer */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t acc1; /* accumulator */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t Xn1; /* temporary input */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t d1, d2; /* state variables */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** uint32_t sample, stageCnt,stage = S->numStages; /* loop counters */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32x4_t XnV, YnV; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32x4x2_t dV; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32x4_t zeroV = vdupq_n_f32(0.0); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32x4_t t1,t2,t3,t4,b1V,b2V,a1V,a2V,s; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Loop unrolling. Compute 4 outputs at a time */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** stageCnt = stage >> 2; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** while (stageCnt > 0U) 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** { 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Reading the coefficients */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** t1 = vld1q_f32(pCoeffs); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pCoeffs += 4; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** t2 = vld1q_f32(pCoeffs); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pCoeffs += 4; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** t3 = vld1q_f32(pCoeffs); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pCoeffs += 4; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** t4 = vld1q_f32(pCoeffs); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pCoeffs += 4; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** b1V = vld1q_f32(pCoeffs); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pCoeffs += 4; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** b2V = vld1q_f32(pCoeffs); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pCoeffs += 4; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** a1V = vld1q_f32(pCoeffs); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pCoeffs += 4; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** a2V = vld1q_f32(pCoeffs); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pCoeffs += 4; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Reading the state values */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** dV = vld2q_f32(pState); ARM GAS /tmp/ccJrAs6S.s page 156 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** sample = blockSize; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** while (sample > 0U) { 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* y[n] = b0 * x[n] + d1 */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* d1 = b1 * x[n] + a1 * y[n] + d2 */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* d2 = b2 * x[n] + a2 * y[n] */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** XnV = vdupq_n_f32(*pIn++); 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** s = dV.val[0]; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** YnV = s; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** s = vextq_f32(zeroV,dV.val[0],3); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** YnV = vmlaq_f32(YnV, t1, s); 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** s = vextq_f32(zeroV,dV.val[0],2); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** YnV = vmlaq_f32(YnV, t2, s); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** s = vextq_f32(zeroV,dV.val[0],1); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** YnV = vmlaq_f32(YnV, t3, s); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** YnV = vmlaq_f32(YnV, t4, XnV); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** s = vextq_f32(XnV,YnV,3); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** dV.val[0] = vmlaq_f32(dV.val[1], s, b1V); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** dV.val[0] = vmlaq_f32(dV.val[0], YnV, a1V); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** dV.val[1] = vmulq_f32(s, b2V); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** dV.val[1] = vmlaq_f32(dV.val[1], YnV, a2V); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = vgetq_lane_f32(YnV, 3) ; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** sample--; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Store the updated state variables back into the state array */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** vst2q_f32(pState,dV); 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pState += 8; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* The current stage output is given as the input to the next stage */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pIn = pDst; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /*Reset the output working pointer */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pOut = pDst; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* decrement the loop counter */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** stageCnt--; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Tail */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** stageCnt = stage & 3; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** while (stageCnt > 0U) 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** { ARM GAS /tmp/ccJrAs6S.s page 157 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Reading the coefficients */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** b0 = *pCoeffs++; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** b1 = *pCoeffs++; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** b2 = *pCoeffs++; 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** a1 = *pCoeffs++; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** a2 = *pCoeffs++; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /*Reading the state values */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = pState[0]; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = pState[1]; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** sample = blockSize; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** while (sample > 0U) 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** { 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Read the input */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* y[n] = b0 * x[n] + d1 */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = (b0 * Xn1) + d1; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Every time after the output is computed state should be updated. */ 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* d1 = b1 * x[n] + a1 * y[n] + d2 */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = ((b1 * Xn1) + (a1 * acc1)) + d2; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* d2 = b2 * x[n] + a2 * y[n] */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = (b2 * Xn1) + (a2 * acc1); 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* decrement the loop counter */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** sample--; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Store the updated state variables back into the state array */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pState++ = d1; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pState++ = d2; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* The current stage output is given as the input to the next stage */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pIn = pDst; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /*Reset the output working pointer */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pOut = pDst; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* decrement the loop counter */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** stageCnt--; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** #else 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** LOW_OPTIMIZATION_ENTER 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** void arm_biquad_cascade_df2T_f32( 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** const arm_biquad_cascade_df2T_instance_f32 * S, 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** const float32_t * pSrc, 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t * pDst, 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** uint32_t blockSize) 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** { ARM GAS /tmp/ccJrAs6S.s page 158 1847 .loc 13 352 0 1848 .cfi_startproc 1849 @ args = 0, pretend = 0, frame = 0 1850 @ frame_needed = 0, uses_anonymous_args = 0 1851 @ link register save eliminated. 1852 .LVL256: 1853 0000 F0B4 push {r4, r5, r6, r7} 1854 .LCFI26: 1855 .cfi_def_cfa_offset 16 1856 .cfi_offset 4, -16 1857 .cfi_offset 5, -12 1858 .cfi_offset 6, -8 1859 .cfi_offset 7, -4 1860 .LVL257: 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** const float32_t *pIn = pSrc; /* Source pointer */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t *pOut = pDst; /* Destination pointer */ 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t *pState = S->pState; /* State pointer */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t acc1; /* Accumulator */ 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t Xn1; /* Temporary input */ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** float32_t d1, d2; /* State variables */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** uint32_t sample, stage = S->numStages; /* Loop counters */ 1861 .loc 13 361 0 1862 0002 0778 ldrb r7, [r0] @ zero_extendqisi2 1863 .LVL258: 1864 0004 8568 ldr r5, [r0, #8] 1865 0006 1435 adds r5, r5, #20 1866 0008 4668 ldr r6, [r0, #4] 1867 000a 0836 adds r6, r6, #8 1868 .LVL259: 1869 .L68: 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** do 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** { 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Reading the coefficients */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** b0 = pCoeffs[0]; 1870 .loc 13 366 0 1871 000c 55ED055A vldr.32 s11, [r5, #-20] 1872 .LVL260: 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** b1 = pCoeffs[1]; 1873 .loc 13 367 0 1874 0010 15ED045A vldr.32 s10, [r5, #-16] 1875 .LVL261: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** b2 = pCoeffs[2]; 1876 .loc 13 368 0 1877 0014 55ED034A vldr.32 s9, [r5, #-12] 1878 .LVL262: 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** a1 = pCoeffs[3]; 1879 .loc 13 369 0 1880 0018 15ED024A vldr.32 s8, [r5, #-8] 1881 .LVL263: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** a2 = pCoeffs[4]; 1882 .loc 13 370 0 1883 001c 55ED013A vldr.32 s7, [r5, #-4] 1884 .LVL264: 1885 0020 B446 mov ip, r6 ARM GAS /tmp/ccJrAs6S.s page 159 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Reading the state values */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = pState[0]; 1886 .loc 13 373 0 1887 0022 16ED026A vldr.32 s12, [r6, #-8] 1888 .LVL265: 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = pState[1]; 1889 .loc 13 374 0 1890 0026 56ED016A vldr.32 s13, [r6, #-4] 1891 .LVL266: 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pCoeffs += 5U; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Loop unrolling: Compute 16 outputs at a time */ 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** sample = blockSize >> 4U; 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** while (sample > 0U) { 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* y[n] = b0 * x[n] + d1 */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* d1 = b1 * x[n] + a1 * y[n] + d2 */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* d2 = b2 * x[n] + a2 * y[n] */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 1 */ 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 2 */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 3 */ 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; ARM GAS /tmp/ccJrAs6S.s page 160 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 4 */ 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 5 */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 6 */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 7 */ 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; ARM GAS /tmp/ccJrAs6S.s page 161 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 8 */ 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 9 */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 10 */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 11 */ 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 12 */ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; ARM GAS /tmp/ccJrAs6S.s page 162 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 13 */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 14 */ 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 15 */ 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* 16 */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; ARM GAS /tmp/ccJrAs6S.s page 163 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* decrement loop counter */ 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** sample--; 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Loop unrolling: Compute remaining outputs */ 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** sample = blockSize & 0xFU; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** #else 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Initialize blkCnt with number of samples */ 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** sample = blockSize; 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** while (sample > 0U) { 1892 .loc 13 611 0 1893 002a CBB1 cbz r3, .L66 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 1894 .loc 13 607 0 1895 002c 1846 mov r0, r3 1896 .loc 13 611 0 1897 002e 1446 mov r4, r2 1898 .LVL267: 1899 .L67: 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 1900 .loc 13 612 0 1901 0030 B1EC017A vldmia.32 r1!, {s14} 1902 .LVL268: 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** acc1 = b0 * Xn1 + d1; 1903 .loc 13 614 0 1904 0034 65EE877A vmul.f32 s15, s11, s14 1905 0038 77EE867A vadd.f32 s15, s15, s12 1906 .LVL269: 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 = b1 * Xn1 + d2; 1907 .loc 13 616 0 1908 003c 25EE076A vmul.f32 s12, s10, s14 1909 .LVL270: 1910 0040 76EE266A vadd.f32 s13, s12, s13 1911 .LVL271: 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d1 += a1 * acc1; 1912 .loc 13 617 0 1913 0044 24EE276A vmul.f32 s12, s8, s15 1914 0048 36EE266A vadd.f32 s12, s12, s13 1915 .LVL272: 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 = b2 * Xn1; 1916 .loc 13 619 0 1917 004c 24EE877A vmul.f32 s14, s9, s14 1918 .LVL273: 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** d2 += a2 * acc1; 1919 .loc 13 620 0 ARM GAS /tmp/ccJrAs6S.s page 164 1920 0050 63EEA76A vmul.f32 s13, s7, s15 1921 0054 76EE876A vadd.f32 s13, s13, s14 1922 .LVL274: 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** *pOut++ = acc1; 1923 .loc 13 622 0 1924 0058 E4EC017A vstmia.32 r4!, {s15} 1925 .LVL275: 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** Xn1 = *pIn++; 1926 .loc 13 611 0 1927 005c 0138 subs r0, r0, #1 1928 .LVL276: 1929 005e E7D1 bne .L67 1930 .LVL277: 1931 .L66: 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* decrement loop counter */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** sample--; 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Store the updated state variables back into the state array */ 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pState[0] = d1; 1932 .loc 13 629 0 1933 0060 0CED026A vstr.32 s12, [ip, #-8] 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pState[1] = d2; 1934 .loc 13 630 0 1935 0064 4CED016A vstr.32 s13, [ip, #-4] 1936 .LVL278: 1937 0068 1435 adds r5, r5, #20 1938 .LVL279: 1939 006a 0836 adds r6, r6, #8 1940 .LVL280: 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pState += 2U; 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* The current stage output is given as the input to the next stage */ 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pIn = pDst; 1941 .loc 13 635 0 1942 006c 1146 mov r1, r2 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* Reset the output working pointer */ 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** pOut = pDst; 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** /* decrement loop counter */ 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** stage--; 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } while (stage > 0U); 1943 .loc 13 643 0 1944 006e 013F subs r7, r7, #1 1945 .LVL281: 1946 0070 CCD1 bne .L68 1947 .LVL282: 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c **** } 1948 .loc 13 645 0 1949 0072 F0BC pop {r4, r5, r6, r7} 1950 .LCFI27: ARM GAS /tmp/ccJrAs6S.s page 165 1951 .cfi_restore 7 1952 .cfi_restore 6 1953 .cfi_restore 5 1954 .cfi_restore 4 1955 .cfi_def_cfa_offset 0 1956 .LVL283: 1957 0074 7047 bx lr 1958 .cfi_endproc 1959 .LFE158: 1961 .global __aeabi_dmul 1962 .global __aeabi_dadd 1963 0076 00BF .section .text.arm_biquad_cascade_df2T_f64,"ax",%progbits 1964 .align 1 1965 .p2align 2 1966 .global arm_biquad_cascade_df2T_f64 1967 .syntax unified 1968 .thumb 1969 .thumb_func 1970 .fpu fpv4-sp-d16 1972 arm_biquad_cascade_df2T_f64: 1973 .LFB159: 1974 .file 14 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * Title: arm_biquad_cascade_df2T_f64.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * Description: Processing function for floating-point transposed direct form II Biquad cascade fi 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /** ARM GAS /tmp/ccJrAs6S.s page 166 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structur 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** This set of functions implements arbitrary order recursive (IIR) filters using a transposed direc 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** The filters are implemented as a cascade of second order Biquad sections. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** These functions provide a slight memory savings as compared to the direct form I Biquad filter fu 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Only floating-point data is supported. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** This function operate on blocks of input and output data and each call to the function 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** processes blockSize samples through the filter. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** pSrc points to the array of input data and 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** pDst points to the array of output data. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Both arrays contain blockSize values. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @par Algorithm 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Each Biquad stage implements a second order filter using the difference equation 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c ****      y[n] = b0 * x[n] + d1
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c ****      d1 = b1 * x[n] + a1 * y[n] + d2
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c ****      d2 = b2 * x[n] + a2 * y[n]
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** where d1 and d2 represent the two state values. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** A Biquad filter using a transposed Direct Form II structure is shown below. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad" 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Coefficients b0, b1, and b2 multiply the input signal x[n]a1 and a2 multiply the output signal 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** y[n] = b0 * x[n] + d1; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * x[n] - a1 * y[n] + d2; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * x[n] - a2 * y[n]; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** In this case the feedback coefficients a1 and a2 must 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @par 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Higher order filters are realized as a cascade of second order sections. 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** numStages refers to the number of second order stages used. 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** For example, an 8th order filter would be realized with numStages=4 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** A 9th order filter would be realized with numStages=5 second order 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** coefficients for one of the stages configured as a first order filter (b2= 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @par 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** pState points to the state variable array. 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Each Biquad stage has 2 state variables d1 and d2. 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** The state variables are arranged in the pState array as: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 
  81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c ****       {d11, d12, d21, d22, ...}
  82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c ****
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** where d1x refers to the state variables for the first Biquad and 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2x refers to the state variables for the second Biquad. 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** The state array has a total length of 2*numStages values. 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** The state variables are updated after each block of data is processed; the coeff 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @par 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** The CMSIS library contains Biquad filters in both Direct Form I and transposed D 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** The advantage of the Direct Form I structure is that it is numerically more robu 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** That is why the Direct Form I structure supports Q15 and Q31 data types. 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** The transposed Direct Form II structure, on the other hand, requires a wide dyna 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Because of this, the CMSIS library only has a floating-point version of the Dire ARM GAS /tmp/ccJrAs6S.s page 167 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** The advantage of the Direct Form II Biquad is that it requires half the number o 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @par Instance Structure 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** The coefficients and state variables for a filter are stored together in an inst 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** A separate instance structure must be defined for each filter. 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Coefficient arrays may be shared among several instances while state variable ar 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @par Init Functions 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** There is also an associated initialization function. 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** The initialization function performs following operations: 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** - Sets the values of the internal structure fields. 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** - Zeros out the values in the state buffer. 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** To do this manually without calling the init function, assign the follow subfiel 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** numStages, pCoeffs, pState. Also set all of the values in pState to zero. 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @par 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Use of the initialization function is optional. 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** However, if the initialization function is used, then the instance structure can 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** To place an instance structure into a const data section, the instance structure 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Set the values in the state buffer to zeros before static initialization. 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** For example, to statically initialize the instance structure use 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 
 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c ****       arm_biquad_cascade_df2T_instance_f64 S1 = {numStages, pState, pCoeffs};
 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c ****       arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c ****
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** where numStages is the number of Biquad stages in the filter; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** pState is the address of the state buffer. 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** pCoeffs is the address of the coefficient buffer; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @addtogroup BiquadCascadeDF2T 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @{ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @brief Processing function for the floating-point transposed direct form II Biquad cascad 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @param[in] S points to an instance of the filter data structure 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @param[in] pSrc points to the block of input data 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @param[out] pDst points to the block of output data 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @param[in] blockSize number of samples to process 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** @return none 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** LOW_OPTIMIZATION_ENTER 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** void arm_biquad_cascade_df2T_f64( 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** const arm_biquad_cascade_df2T_instance_f64 * S, 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** const float64_t * pSrc, 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** float64_t * pDst, 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** uint32_t blockSize) 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** { 1975 .loc 14 142 0 1976 .cfi_startproc 1977 @ args = 0, pretend = 0, frame = 32 1978 @ frame_needed = 0, uses_anonymous_args = 0 1979 .LVL284: 1980 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 1981 .LCFI28: ARM GAS /tmp/ccJrAs6S.s page 168 1982 .cfi_def_cfa_offset 36 1983 .cfi_offset 4, -36 1984 .cfi_offset 5, -32 1985 .cfi_offset 6, -28 1986 .cfi_offset 7, -24 1987 .cfi_offset 8, -20 1988 .cfi_offset 9, -16 1989 .cfi_offset 10, -12 1990 .cfi_offset 11, -8 1991 .cfi_offset 14, -4 1992 0004 2DED068B vpush.64 {d8, d9, d10} 1993 .LCFI29: 1994 .cfi_def_cfa_offset 60 1995 .cfi_offset 80, -60 1996 .cfi_offset 81, -56 1997 .cfi_offset 82, -52 1998 .cfi_offset 83, -48 1999 .cfi_offset 84, -44 2000 .cfi_offset 85, -40 2001 0008 2DED08CB vpush.64 {d12, d13, d14, d15} 2002 .LCFI30: 2003 .cfi_def_cfa_offset 92 2004 .cfi_offset 88, -92 2005 .cfi_offset 89, -88 2006 .cfi_offset 90, -84 2007 .cfi_offset 91, -80 2008 .cfi_offset 92, -76 2009 .cfi_offset 93, -72 2010 .cfi_offset 94, -68 2011 .cfi_offset 95, -64 2012 000c 89B0 sub sp, sp, #36 2013 .LCFI31: 2014 .cfi_def_cfa_offset 128 2015 000e 8A46 mov r10, r1 2016 0010 0392 str r2, [sp, #12] 2017 0012 0793 str r3, [sp, #28] 2018 .LVL285: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** const float64_t *pIn = pSrc; /* Source pointer */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** float64_t *pOut = pDst; /* Destination pointer */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** float64_t *pState = S->pState; /* State pointer */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** const float64_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** float64_t acc1; /* Accumulator */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** float64_t b0, b1, b2, a1, a2; /* Filter coefficients */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** float64_t Xn1; /* Temporary input */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** float64_t d1, d2; /* State variables */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** uint32_t sample, stage = S->numStages; /* Loop counters */ 2019 .loc 14 152 0 2020 0014 0378 ldrb r3, [r0] @ zero_extendqisi2 2021 .LVL286: 2022 0016 0293 str r3, [sp, #8] 2023 .LVL287: 2024 0018 8368 ldr r3, [r0, #8] 2025 .LVL288: 2026 001a 03F12809 add r9, r3, #40 2027 001e 4368 ldr r3, [r0, #4] 2028 0020 03F11008 add r8, r3, #16 ARM GAS /tmp/ccJrAs6S.s page 169 2029 .LVL289: 2030 .L75: 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** do 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** { 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* Reading the coefficients */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** b0 = pCoeffs[0]; 2031 .loc 14 158 0 2032 0024 19ED0AFB vldr.64 d15, [r9, #-40] 2033 .LVL290: 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** b1 = pCoeffs[1]; 2034 .loc 14 159 0 2035 0028 19ED08EB vldr.64 d14, [r9, #-32] 2036 .LVL291: 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** b2 = pCoeffs[2]; 2037 .loc 14 160 0 2038 002c 19ED06DB vldr.64 d13, [r9, #-24] 2039 .LVL292: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** a1 = pCoeffs[3]; 2040 .loc 14 161 0 2041 0030 19ED04CB vldr.64 d12, [r9, #-16] 2042 .LVL293: 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** a2 = pCoeffs[4]; 2043 .loc 14 162 0 2044 0034 19ED029B vldr.64 d9, [r9, #-8] 2045 .LVL294: 2046 0038 C346 mov fp, r8 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* Reading the state values */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = pState[0]; 2047 .loc 14 165 0 2048 003a 18ED048B vldr.64 d8, [r8, #-16] 2049 .LVL295: 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = pState[1]; 2050 .loc 14 166 0 2051 003e 58E90267 ldrd r6, [r8, #-8] 2052 .LVL296: 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** pCoeffs += 5U; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** #if defined (ARM_MATH_LOOPUNROLL) 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* Loop unrolling: Compute 16 outputs at a time */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** sample = blockSize >> 4U; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** while (sample > 0U) { 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* y[n] = b0 * x[n] + d1 */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* d1 = b1 * x[n] + a1 * y[n] + d2 */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* d2 = b2 * x[n] + a2 * y[n] */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 1 */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** ARM GAS /tmp/ccJrAs6S.s page 170 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 2 */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 3 */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 4 */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 5 */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; ARM GAS /tmp/ccJrAs6S.s page 171 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 6 */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 7 */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 8 */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 9 */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 10 */ ARM GAS /tmp/ccJrAs6S.s page 172 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 11 */ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 12 */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 13 */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 14 */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; ARM GAS /tmp/ccJrAs6S.s page 173 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 15 */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* 16 */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* decrement loop counter */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** sample--; 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** } 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* Loop unrolling: Compute remaining outputs */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** sample = blockSize & 0xFU; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** #else 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* Initialize blkCnt with number of samples */ 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** sample = blockSize; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** while (sample > 0U) { 2053 .loc 14 404 0 2054 0042 079B ldr r3, [sp, #28] 2055 0044 002B cmp r3, #0 2056 0046 50D0 beq .L73 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 2057 .loc 14 400 0 2058 0048 1C46 mov r4, r3 2059 .loc 14 404 0 2060 004a 039D ldr r5, [sp, #12] ARM GAS /tmp/ccJrAs6S.s page 174 2061 004c CDF81090 str r9, [sp, #16] 2062 0050 47EC1A6B vmov d10, r6, r7 2063 0054 CDF81480 str r8, [sp, #20] 2064 0058 CDF81880 str r8, [sp, #24] 2065 005c 5746 mov r7, r10 2066 .LVL297: 2067 .L74: 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 2068 .loc 14 405 0 2069 005e F7E802AB ldrd r10, [r7], #8 2070 .LVL298: 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** acc1 = b0 * Xn1 + d1; 2071 .loc 14 407 0 2072 0062 5246 mov r2, r10 2073 0064 5B46 mov r3, fp 2074 0066 51EC1F0B vmov r0, r1, d15 2075 006a FFF7FEFF bl __aeabi_dmul 2076 .LVL299: 2077 006e 53EC182B vmov r2, r3, d8 2078 0072 FFF7FEFF bl __aeabi_dadd 2079 .LVL300: 2080 0076 8046 mov r8, r0 2081 0078 8946 mov r9, r1 2082 .LVL301: 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 = b1 * Xn1 + d2; 2083 .loc 14 409 0 2084 007a 5246 mov r2, r10 2085 007c 5B46 mov r3, fp 2086 007e 51EC1E0B vmov r0, r1, d14 2087 0082 FFF7FEFF bl __aeabi_dmul 2088 .LVL302: 2089 0086 53EC1A2B vmov r2, r3, d10 2090 008a FFF7FEFF bl __aeabi_dadd 2091 .LVL303: 2092 008e CDE90001 strd r0, [sp] 2093 .LVL304: 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d1 += a1 * acc1; 2094 .loc 14 410 0 2095 0092 4246 mov r2, r8 2096 0094 4B46 mov r3, r9 2097 0096 51EC1C0B vmov r0, r1, d12 2098 .LVL305: 2099 009a FFF7FEFF bl __aeabi_dmul 2100 .LVL306: 2101 009e DDE90023 ldrd r2, [sp] 2102 00a2 FFF7FEFF bl __aeabi_dadd 2103 .LVL307: 2104 00a6 41EC180B vmov d8, r0, r1 2105 .LVL308: 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 = b2 * Xn1; 2106 .loc 14 412 0 2107 00aa 5246 mov r2, r10 2108 00ac 5B46 mov r3, fp 2109 00ae 51EC1D0B vmov r0, r1, d13 ARM GAS /tmp/ccJrAs6S.s page 175 2110 .LVL309: 2111 00b2 FFF7FEFF bl __aeabi_dmul 2112 .LVL310: 2113 00b6 8246 mov r10, r0 2114 .LVL311: 2115 00b8 8B46 mov fp, r1 2116 .LVL312: 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** d2 += a2 * acc1; 2117 .loc 14 413 0 2118 00ba 4246 mov r2, r8 2119 00bc 4B46 mov r3, r9 2120 00be 51EC190B vmov r0, r1, d9 2121 00c2 FFF7FEFF bl __aeabi_dmul 2122 .LVL313: 2123 00c6 5246 mov r2, r10 2124 00c8 5B46 mov r3, fp 2125 00ca FFF7FEFF bl __aeabi_dadd 2126 .LVL314: 2127 00ce 41EC1A0B vmov d10, r0, r1 2128 .LVL315: 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** *pOut++ = acc1; 2129 .loc 14 415 0 2130 00d2 E5E80289 strd r8, [r5], #8 2131 .LVL316: 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** Xn1 = *pIn++; 2132 .loc 14 404 0 2133 00d6 013C subs r4, r4, #1 2134 .LVL317: 2135 00d8 C1D1 bne .L74 2136 00da DDF81090 ldr r9, [sp, #16] 2137 00de 0646 mov r6, r0 2138 00e0 0F46 mov r7, r1 2139 00e2 DDF81480 ldr r8, [sp, #20] 2140 .LVL318: 2141 00e6 DDF818B0 ldr fp, [sp, #24] 2142 .LVL319: 2143 .L73: 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* decrement loop counter */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** sample--; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** } 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* Store the updated state variables back into the state array */ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** pState[0] = d1; 2144 .loc 14 422 0 2145 00ea 0BED048B vstr.64 d8, [fp, #-16] 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** pState[1] = d2; 2146 .loc 14 423 0 2147 00ee 4BE90267 strd r6, [fp, #-8] 2148 .LVL320: 2149 00f2 09F12809 add r9, r9, #40 2150 00f6 08F11008 add r8, r8, #16 2151 .LVL321: 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** pState += 2U; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** ARM GAS /tmp/ccJrAs6S.s page 176 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* The current stage output is given as the input to the next stage */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** pIn = pDst; 2152 .loc 14 428 0 2153 00fa DDF80CA0 ldr r10, [sp, #12] 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* Reset the output working pointer */ 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** pOut = pDst; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** /* decrement loop counter */ 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** stage--; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** } while (stage > 0U); 2154 .loc 14 436 0 2155 00fe 029B ldr r3, [sp, #8] 2156 0100 013B subs r3, r3, #1 2157 .LVL322: 2158 0102 0293 str r3, [sp, #8] 2159 0104 8ED1 bne .L75 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c **** } 2160 .loc 14 438 0 2161 0106 09B0 add sp, sp, #36 2162 .LCFI32: 2163 .cfi_def_cfa_offset 92 2164 @ sp needed 2165 0108 BDEC08CB vldm sp!, {d12-d15} 2166 .LCFI33: 2167 .cfi_restore 94 2168 .cfi_restore 95 2169 .cfi_restore 92 2170 .cfi_restore 93 2171 .cfi_restore 90 2172 .cfi_restore 91 2173 .cfi_restore 88 2174 .cfi_restore 89 2175 .cfi_def_cfa_offset 60 2176 .LVL323: 2177 010c BDEC068B vldm sp!, {d8-d10} 2178 .LCFI34: 2179 .cfi_restore 84 2180 .cfi_restore 85 2181 .cfi_restore 82 2182 .cfi_restore 83 2183 .cfi_restore 80 2184 .cfi_restore 81 2185 .cfi_def_cfa_offset 36 2186 .LVL324: 2187 0110 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 2188 .cfi_endproc 2189 .LFE159: 2191 .section .text.arm_biquad_cascade_df2T_init_f32,"ax",%progbits 2192 .align 1 2193 .p2align 2,,3 2194 .global arm_biquad_cascade_df2T_init_f32 2195 .syntax unified 2196 .thumb 2197 .thumb_func ARM GAS /tmp/ccJrAs6S.s page 177 2198 .fpu fpv4-sp-d16 2200 arm_biquad_cascade_df2T_init_f32: 2201 .LFB160: 2202 .file 15 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * Title: arm_biquad_cascade_df2T_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * Description: Initialization function for floating-point transposed direct form II Biquad cascad 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @addtogroup BiquadCascadeDF2T 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @brief Initialization function for the floating-point transposed direct form II Biquad ca 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @param[in,out] S points to an instance of the filter data structure. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @param[in] numStages number of 2nd order stages in the filter. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @param[in] pCoeffs points to the filter coefficients. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @param[in] pState points to the state buffer. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @par Coefficient and State Ordering 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** The coefficients are stored in the array pCoeffs in the following o 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** in the not Neon version. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c ****       {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c ****
ARM GAS /tmp/ccJrAs6S.s page 178 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @par 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** where b1x and a1x are the coefficients for the first s 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** b2x and a2x are the coefficients for the second stage, 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** and so on. The pCoeffs array contains a total of 5*numStages 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** For Neon version, this array is bigger. If numstages = 4x + y, then the array ha 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 32*x + 5*y 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** and it must be initialized using the function 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** arm_biquad_cascade_df2T_compute_coefs_f32 which is taking the 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** standard array coefficient as parameters. 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** But, an array of 8*numstages is a good approximation. 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** Then, the initialization can be done with: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c ****                    arm_biquad_cascade_df2T_init_f32(&SNeon, nbCascade, neonCoefs, stateNeon);
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c ****                    arm_biquad_cascade_df2T_compute_coefs_f32(&SNeon,nbCascade,coefs);
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c ****
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @par In this example, neonCoefs is a bigger array of size 8 * numStages. 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** coefs is the standard array: 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 
  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c ****       {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c ****
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** @par 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** The pState is a pointer to state array. 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** Each Biquad stage has 2 state variables d1, and d2. 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** The 2 state variables for stage 1 are first, then the 2 state variables for stag 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** The state array has a total length of 2*numStages values. 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** The state variables are updated after each block of data is processed; the coeff 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** #if defined(ARM_MATH_NEON) 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** Must be called after initializing the biquad instance. 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** pCoeffs has size 5 * nbCascade 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** Whereas the pCoeffs for the init has size (4*4 + 4*4)* nbCascade 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** So this pCoeffs is the one which would be used for the not Neon version. 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** The pCoeffs passed in init is bigger than the one for the not Neon version. 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** void arm_biquad_cascade_df2T_compute_coefs_f32( 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** arm_biquad_cascade_df2T_instance_f32 * S, 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** uint8_t numStages, 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** float32_t * pCoeffs) 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** { 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** uint8_t cnt; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** float32_t *pDstCoeffs; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** float32_t b0[4],b1[4],b2[4],a1[4],a2[4]; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** pDstCoeffs = (float32_t*)S->pCoeffs; ARM GAS /tmp/ccJrAs6S.s page 179 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** cnt = numStages >> 2; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** while(cnt > 0) 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** { 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** for(int i=0;i<4;i++) 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** { 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** b0[i] = pCoeffs[0]; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** b1[i] = pCoeffs[1]; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** b2[i] = pCoeffs[2]; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** a1[i] = pCoeffs[3]; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** a2[i] = pCoeffs[4]; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** pCoeffs += 5; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** } 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Vec 1 */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = 0; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b0[1]; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b0[2]; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b0[3]; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Vec 2 */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = 0; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = 0; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b0[1] * b0[2]; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b0[2] * b0[3]; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Vec 3 */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = 0; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = 0; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = 0; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b0[1] * b0[2] * b0[3]; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Vec 4 */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b0[0]; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b0[0] * b0[1]; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b0[0] * b0[1] * b0[2]; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b0[0] * b0[1] * b0[2] * b0[3]; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Vec 5 */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b1[0]; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b1[1]; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b1[2]; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b1[3]; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Vec 6 */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b2[0]; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b2[1]; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b2[2]; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = b2[3]; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Vec 7 */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = a1[0]; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = a1[1]; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = a1[2]; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = a1[3]; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Vec 8 */ ARM GAS /tmp/ccJrAs6S.s page 180 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = a2[0]; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = a2[1]; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = a2[2]; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = a2[3]; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** cnt--; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** } 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** cnt = numStages & 0x3; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** while(cnt > 0) 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** { 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = *pCoeffs++; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = *pCoeffs++; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = *pCoeffs++; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = *pCoeffs++; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** *pDstCoeffs++ = *pCoeffs++; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** cnt--; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** } 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** } 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** #endif 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** void arm_biquad_cascade_df2T_init_f32( 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** arm_biquad_cascade_df2T_instance_f32 * S, 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** uint8_t numStages, 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** const float32_t * pCoeffs, 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** float32_t * pState) 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** { 2203 .loc 15 195 0 2204 .cfi_startproc 2205 @ args = 0, pretend = 0, frame = 0 2206 @ frame_needed = 0, uses_anonymous_args = 0 2207 .LVL325: 2208 0000 10B5 push {r4, lr} 2209 .LCFI35: 2210 .cfi_def_cfa_offset 8 2211 .cfi_offset 4, -8 2212 .cfi_offset 14, -4 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Assign filter stages */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** S->numStages = numStages; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Assign coefficient pointer */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** S->pCoeffs = pCoeffs; 2213 .loc 15 200 0 2214 0002 8260 str r2, [r0, #8] 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 2215 .loc 15 197 0 2216 0004 0170 strb r1, [r0] 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Assign filter stages */ 2217 .loc 15 195 0 2218 0006 0446 mov r4, r0 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Clear state buffer and size is always 2 * numStages */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** memset(pState, 0, (2U * (uint32_t) numStages) * sizeof(float32_t)); 2219 .loc 15 203 0 2220 0008 CA00 lsls r2, r1, #3 2221 .LVL326: ARM GAS /tmp/ccJrAs6S.s page 181 2222 000a 1846 mov r0, r3 2223 .LVL327: 2224 000c 0021 movs r1, #0 2225 .LVL328: 2226 000e FFF7FEFF bl memset 2227 .LVL329: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** /* Assign state pointer */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** S->pState = pState; 2228 .loc 15 206 0 2229 0012 6060 str r0, [r4, #4] 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c **** } 2230 .loc 15 207 0 2231 0014 10BD pop {r4, pc} 2232 .cfi_endproc 2233 .LFE160: 2235 0016 00BF .section .text.arm_biquad_cascade_df2T_init_f64,"ax",%progbits 2236 .align 1 2237 .p2align 2,,3 2238 .global arm_biquad_cascade_df2T_init_f64 2239 .syntax unified 2240 .thumb 2241 .thumb_func 2242 .fpu fpv4-sp-d16 2244 arm_biquad_cascade_df2T_init_f64: 2245 .LFB161: 2246 .file 16 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * Title: arm_biquad_cascade_df2T_init_f64.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * Description: Initialization function for floating-point transposed direct form II Biquad cascad 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** ARM GAS /tmp/ccJrAs6S.s page 182 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** @addtogroup BiquadCascadeDF2T 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** @brief Initialization function for the floating-point transposed direct form II Biquad ca 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** @param[in,out] S points to an instance of the filter data structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** @param[in] numStages number of 2nd order stages in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** @param[in] pCoeffs points to the filter coefficients 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** @param[in] pState points to the state buffer 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** @par Coefficient and State Ordering 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** The coefficients are stored in the array pCoeffs in the following o 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** 
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c ****       {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** @par 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** where b1x and a1x are the coefficients for the first s 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** b2x and a2x are the coefficients for the second stage, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** and so on. The pCoeffs array contains a total of 5*numStages 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** The pState is a pointer to state array. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** Each Biquad stage has 2 state variables d1, and d2. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** The 2 state variables for stage 1 are first, then the 2 state variables for stag 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** The state array has a total length of 2*numStages values. 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** The state variables are updated after each block of data is processed; the coeff 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** void arm_biquad_cascade_df2T_init_f64( 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** arm_biquad_cascade_df2T_instance_f64 * S, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** uint8_t numStages, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** const float64_t * pCoeffs, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** float64_t * pState) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** { 2247 .loc 16 70 0 2248 .cfi_startproc 2249 @ args = 0, pretend = 0, frame = 0 2250 @ frame_needed = 0, uses_anonymous_args = 0 2251 .LVL330: 2252 0000 10B5 push {r4, lr} 2253 .LCFI36: 2254 .cfi_def_cfa_offset 8 2255 .cfi_offset 4, -8 2256 .cfi_offset 14, -4 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** /* Assign filter stages */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** S->numStages = numStages; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** /* Assign coefficient pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** S->pCoeffs = pCoeffs; 2257 .loc 16 75 0 2258 0002 8260 str r2, [r0, #8] ARM GAS /tmp/ccJrAs6S.s page 183 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** 2259 .loc 16 72 0 2260 0004 0170 strb r1, [r0] 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** /* Assign filter stages */ 2261 .loc 16 70 0 2262 0006 0446 mov r4, r0 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** /* Clear state buffer and size is always 2 * numStages */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** memset(pState, 0, (2U * (uint32_t) numStages) * sizeof(float64_t)); 2263 .loc 16 78 0 2264 0008 0A01 lsls r2, r1, #4 2265 .LVL331: 2266 000a 1846 mov r0, r3 2267 .LVL332: 2268 000c 0021 movs r1, #0 2269 .LVL333: 2270 000e FFF7FEFF bl memset 2271 .LVL334: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** /* Assign state pointer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** S->pState = pState; 2272 .loc 16 81 0 2273 0012 6060 str r0, [r4, #4] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c **** } 2274 .loc 16 82 0 2275 0014 10BD pop {r4, pc} 2276 .cfi_endproc 2277 .LFE161: 2279 0016 00BF .section .text.arm_biquad_cascade_stereo_df2T_f32,"ax",%progbits 2280 .align 1 2281 .p2align 2 2282 .global arm_biquad_cascade_stereo_df2T_f32 2283 .syntax unified 2284 .thumb 2285 .thumb_func 2286 .fpu fpv4-sp-d16 2288 arm_biquad_cascade_stereo_df2T_f32: 2289 .LFB162: 2290 .file 17 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * Title: arm_biquad_cascade_stereo_df2T_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * Description: Processing function for floating-point transposed direct form II Biquad cascade fi 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * You may obtain a copy of the License at ARM GAS /tmp/ccJrAs6S.s page 184 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** @addtogroup BiquadCascadeDF2T 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** @brief Processing function for the floating-point transposed direct form II Biquad cascad 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** @param[in] S points to an instance of the filter data structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** #include "arm_helium_utils.h" 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** void arm_biquad_cascade_stereo_df2T_f32( 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** const arm_biquad_cascade_stereo_df2T_instance_f32 * S, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** const float32_t * pSrc, 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** float32_t * pDst, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** uint32_t blockSize) 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** { 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** const float32_t *pIn = pSrc; /* source pointer */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** float32_t *pOut = pDst; /* destination pointer */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** float32_t *pState = S->pState; /* State pointer */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** uint32_t sample, stage = S->numStages; /* loop counters */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** float32_t scratch[6]; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** uint32x4_t loadIdxVec; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** f32x4_t aCoeffs, bCoeffs; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** f32x4_t stateVec0, stateVec1; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** f32x4_t inVec; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** uint32_t startIdx = 0; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * {0, 1, 0, 1} generator 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** loadIdxVec = viwdupq_u32(&startIdx, 2, 1); 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* ARM GAS /tmp/ccJrAs6S.s page 185 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * scratch top clearing 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * layout : [d1a d1b d2a d2b 0 0] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** scratch[4] = 0.0f; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** scratch[5] = 0.0f; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** do 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** { 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * Reading the coefficients 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** b0 = *pCoeffs++; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** b1 = *pCoeffs++; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** b2 = *pCoeffs++; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** a1 = *pCoeffs++; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** a2 = *pCoeffs++; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * aCoeffs = {a1 a1 a2 a2} 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** aCoeffs = vdupq_n_f32(a1); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** aCoeffs = vsetq_lane(a2, aCoeffs, 2); 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** aCoeffs = vsetq_lane(a2, aCoeffs, 3); 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * bCoeffs = {b1 b1 b2 b2} 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** bCoeffs = vdupq_n_f32(b1); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** bCoeffs = vsetq_lane(b2, bCoeffs, 2); 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** bCoeffs = vsetq_lane(b2, bCoeffs, 3); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * Reading the state values 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * Save into scratch 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *(f32x4_t *) scratch = *(f32x4_t *) pState; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** sample = blockSize; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** while (sample > 0U) 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** { 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * step 1 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 0 | acc1a = xn1a * b0 + d1a 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 1 | acc1b = xn1b * b0 + d1b 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 2 | acc1a = xn1a * b0 + d1a 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 3 | acc1b = xn1b * b0 + d1b 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * load {d1a, d1b, d1a, d1b} 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** stateVec0 = vldrwq_gather_shifted_offset((uint32_t const *) scratch, loadIdxVec); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * load {in0 in1 in0 in1} 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** inVec = vldrwq_gather_shifted_offset((uint32_t const *) pIn, loadIdxVec); ARM GAS /tmp/ccJrAs6S.s page 186 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** stateVec0 = vfmaq(stateVec0, inVec, b0); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = vgetq_lane(stateVec0, 0); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = vgetq_lane(stateVec0, 1); 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * step 2 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 0 | d1a = b1 * xn1a + a1 * acc1a + d2a 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 1 | d1b = b1 * xn1b + a1 * acc1b + d2b 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 2 | d2a = b2 * xn1a + a2 * acc1a + 0 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * 3 | d2b = b2 * xn1b + a2 * acc1b + 0 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * load {d2a, d2b, 0, 0} 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** stateVec1 = *(f32x4_t *) & scratch[2]; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** stateVec1 = vfmaq(stateVec1, stateVec0, aCoeffs); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** stateVec1 = vfmaq(stateVec1, inVec, bCoeffs); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *(f32x4_t *) scratch = stateVec1; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pIn = pIn + 2; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** sample--; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** } 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * Store the updated state variables back into the state array 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** vst1q(pState, stateVec1); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pState += 4; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * The current stage output is given as the input to the next stage 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pIn = pDst; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * Reset the output working pointer 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pOut = pDst; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** * decrement the loop counter 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** stage--; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** } 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** while (stage > 0U); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** } 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** #else 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** LOW_OPTIMIZATION_ENTER 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** void arm_biquad_cascade_stereo_df2T_f32( 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** const arm_biquad_cascade_stereo_df2T_instance_f32 * S, 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** const float32_t * pSrc, 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** float32_t * pDst, 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** uint32_t blockSize) 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** { 2291 .loc 17 188 0 ARM GAS /tmp/ccJrAs6S.s page 187 2292 .cfi_startproc 2293 @ args = 0, pretend = 0, frame = 0 2294 @ frame_needed = 0, uses_anonymous_args = 0 2295 .LVL335: 2296 0000 F0B5 push {r4, r5, r6, r7, lr} 2297 .LCFI37: 2298 .cfi_def_cfa_offset 20 2299 .cfi_offset 4, -20 2300 .cfi_offset 5, -16 2301 .cfi_offset 6, -12 2302 .cfi_offset 7, -8 2303 .cfi_offset 14, -4 2304 .LVL336: 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** const float32_t *pIn = pSrc; /* Source pointer */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** float32_t *pOut = pDst; /* Destination pointer */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** float32_t *pState = S->pState; /* State pointer */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** float32_t acc1a, acc1b; /* Accumulator */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** float32_t Xn1a, Xn1b; /* Temporary input */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** float32_t d1a, d2a, d1b, d2b; /* State variables */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** uint32_t sample, stage = S->numStages; /* Loop counters */ 2305 .loc 17 197 0 2306 0002 90F800C0 ldrb ip, [r0] @ zero_extendqisi2 2307 .LVL337: 2308 0006 8668 ldr r6, [r0, #8] 2309 0008 1436 adds r6, r6, #20 2310 000a 4568 ldr r5, [r0, #4] 2311 000c 1035 adds r5, r5, #16 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** do 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** { 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Reading the coefficients */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** b0 = pCoeffs[0]; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** b1 = pCoeffs[1]; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** b2 = pCoeffs[2]; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** a1 = pCoeffs[3]; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** a2 = pCoeffs[4]; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Reading the state values */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1a = pState[0]; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2a = pState[1]; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1b = pState[2]; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2b = pState[3]; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pCoeffs += 5U; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Loop unrolling: Compute 8 outputs at a time */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** sample = blockSize >> 3U; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** while (sample > 0U) { 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* y[n] = b0 * x[n] + d1 */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* d1 = b1 * x[n] + a1 * y[n] + d2 */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* d2 = b2 * x[n] + a2 * y[n] */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 188 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 1 */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1a = *pIn++; /* Channel a */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1b = *pIn++; /* Channel b */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1a = (b0 * Xn1a) + d1a; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1b = (b0 * Xn1b) + d1b; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1a; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1b; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2a = (b2 * Xn1a) + (a2 * acc1a); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2b = (b2 * Xn1b) + (a2 * acc1b); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 2 */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1a = *pIn++; /* Channel a */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1b = *pIn++; /* Channel b */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1a = (b0 * Xn1a) + d1a; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1b = (b0 * Xn1b) + d1b; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1a; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1b; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2a = (b2 * Xn1a) + (a2 * acc1a); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2b = (b2 * Xn1b) + (a2 * acc1b); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 3 */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1a = *pIn++; /* Channel a */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1b = *pIn++; /* Channel b */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1a = (b0 * Xn1a) + d1a; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1b = (b0 * Xn1b) + d1b; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1a; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1b; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2a = (b2 * Xn1a) + (a2 * acc1a); 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2b = (b2 * Xn1b) + (a2 * acc1b); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 4 */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1a = *pIn++; /* Channel a */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1b = *pIn++; /* Channel b */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1a = (b0 * Xn1a) + d1a; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1b = (b0 * Xn1b) + d1b; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1a; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1b; ARM GAS /tmp/ccJrAs6S.s page 189 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2a = (b2 * Xn1a) + (a2 * acc1a); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2b = (b2 * Xn1b) + (a2 * acc1b); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 5 */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1a = *pIn++; /* Channel a */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1b = *pIn++; /* Channel b */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1a = (b0 * Xn1a) + d1a; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1b = (b0 * Xn1b) + d1b; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1a; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1b; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2a = (b2 * Xn1a) + (a2 * acc1a); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2b = (b2 * Xn1b) + (a2 * acc1b); 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 6 */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1a = *pIn++; /* Channel a */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1b = *pIn++; /* Channel b */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1a = (b0 * Xn1a) + d1a; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1b = (b0 * Xn1b) + d1b; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1a; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1b; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2a = (b2 * Xn1a) + (a2 * acc1a); 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2b = (b2 * Xn1b) + (a2 * acc1b); 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 7 */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1a = *pIn++; /* Channel a */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1b = *pIn++; /* Channel b */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1a = (b0 * Xn1a) + d1a; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1b = (b0 * Xn1b) + d1b; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1a; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1b; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2a = (b2 * Xn1a) + (a2 * acc1a); 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2b = (b2 * Xn1b) + (a2 * acc1b); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* 8 */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1a = *pIn++; /* Channel a */ ARM GAS /tmp/ccJrAs6S.s page 190 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1b = *pIn++; /* Channel b */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1a = (b0 * Xn1a) + d1a; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1b = (b0 * Xn1b) + d1b; 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1a; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1b; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2a = (b2 * Xn1a) + (a2 * acc1a); 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2b = (b2 * Xn1b) + (a2 * acc1b); 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* decrement loop counter */ 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** sample--; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** } 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Loop unrolling: Compute remaining outputs */ 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** sample = blockSize & 0x7U; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** #else 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Initialize blkCnt with number of samples */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** sample = blockSize; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** while (sample > 0U) { 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Read the input */ 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1a = *pIn++; /* Channel a */ 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1b = *pIn++; /* Channel b */ 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* y[n] = b0 * x[n] + d1 */ 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1a = (b0 * Xn1a) + d1a; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1b = (b0 * Xn1b) + d1b; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1a; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1b; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Every time after the output is computed state should be updated. */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* d1 = b1 * x[n] + a1 * y[n] + d2 */ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* d2 = b2 * x[n] + a2 * y[n] */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2a = (b2 * Xn1a) + (a2 * acc1a); 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2b = (b2 * Xn1b) + (a2 * acc1b); 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* decrement loop counter */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** sample--; 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** } 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Store the updated state variables back into the state array */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pState[0] = d1a; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pState[1] = d2a; ARM GAS /tmp/ccJrAs6S.s page 191 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pState[2] = d1b; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pState[3] = d2b; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pState += 4U; 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* The current stage output is given as the input to the next stage */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pIn = pDst; 2312 .loc 17 404 0 2313 000e 9646 mov lr, r2 2314 .LVL338: 2315 .L86: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** b1 = pCoeffs[1]; 2316 .loc 17 202 0 2317 0010 56ED053A vldr.32 s7, [r6, #-20] 2318 .LVL339: 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** b2 = pCoeffs[2]; 2319 .loc 17 203 0 2320 0014 16ED043A vldr.32 s6, [r6, #-16] 2321 .LVL340: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** a1 = pCoeffs[3]; 2322 .loc 17 204 0 2323 0018 56ED032A vldr.32 s5, [r6, #-12] 2324 .LVL341: 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** a2 = pCoeffs[4]; 2325 .loc 17 205 0 2326 001c 16ED022A vldr.32 s4, [r6, #-8] 2327 .LVL342: 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 2328 .loc 17 206 0 2329 0020 56ED011A vldr.32 s3, [r6, #-4] 2330 .LVL343: 2331 0024 2F46 mov r7, r5 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2a = pState[1]; 2332 .loc 17 209 0 2333 0026 15ED046A vldr.32 s12, [r5, #-16] 2334 .LVL344: 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1b = pState[2]; 2335 .loc 17 210 0 2336 002a 15ED034A vldr.32 s8, [r5, #-12] 2337 .LVL345: 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2b = pState[3]; 2338 .loc 17 211 0 2339 002e 55ED026A vldr.32 s13, [r5, #-8] 2340 .LVL346: 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 2341 .loc 17 212 0 2342 0032 55ED014A vldr.32 s9, [r5, #-4] 2343 .LVL347: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Read the input */ 2344 .loc 17 368 0 2345 0036 9BB3 cbz r3, .L84 2346 0038 0831 adds r1, r1, #8 2347 003a 02F10800 add r0, r2, #8 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 2348 .loc 17 364 0 2349 003e 1C46 mov r4, r3 ARM GAS /tmp/ccJrAs6S.s page 192 2350 .LVL348: 2351 .L85: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** Xn1b = *pIn++; /* Channel b */ 2352 .loc 17 370 0 2353 0040 11ED025A vldr.32 s10, [r1, #-8] 2354 .LVL349: 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 2355 .loc 17 371 0 2356 0044 51ED015A vldr.32 s11, [r1, #-4] 2357 .LVL350: 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** acc1b = (b0 * Xn1b) + d1b; 2358 .loc 17 374 0 2359 0048 23EE857A vmul.f32 s14, s7, s10 2360 004c 37EE067A vadd.f32 s14, s14, s12 2361 .LVL351: 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 2362 .loc 17 375 0 2363 0050 63EEA57A vmul.f32 s15, s7, s11 2364 0054 77EEA67A vadd.f32 s15, s15, s13 2365 .LVL352: 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** *pOut++ = acc1b; 2366 .loc 17 378 0 2367 0058 00ED027A vstr.32 s14, [r0, #-8] 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 2368 .loc 17 379 0 2369 005c 40ED017A vstr.32 s15, [r0, #-4] 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; 2370 .loc 17 383 0 2371 0060 23EE056A vmul.f32 s12, s6, s10 2372 .LVL353: 2373 0064 62EE076A vmul.f32 s13, s4, s14 2374 .LVL354: 2375 0068 36EE266A vadd.f32 s12, s12, s13 2376 006c 36EE046A vadd.f32 s12, s12, s8 2377 .LVL355: 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 2378 .loc 17 384 0 2379 0070 63EE256A vmul.f32 s13, s6, s11 2380 0074 22EE274A vmul.f32 s8, s4, s15 2381 .LVL356: 2382 0078 76EE846A vadd.f32 s13, s13, s8 2383 007c 76EEA46A vadd.f32 s13, s13, s9 2384 .LVL357: 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** d2b = (b2 * Xn1b) + (a2 * acc1b); 2385 .loc 17 387 0 2386 0080 22EE855A vmul.f32 s10, s5, s10 2387 .LVL358: 2388 0084 21EE877A vmul.f32 s14, s3, s14 2389 .LVL359: 2390 0088 35EE074A vadd.f32 s8, s10, s14 2391 .LVL360: 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 2392 .loc 17 388 0 2393 008c 62EEA55A vmul.f32 s11, s5, s11 2394 .LVL361: 2395 0090 61EEA77A vmul.f32 s15, s3, s15 2396 .LVL362: ARM GAS /tmp/ccJrAs6S.s page 193 2397 0094 75EEA74A vadd.f32 s9, s11, s15 2398 .LVL363: 2399 0098 0831 adds r1, r1, #8 2400 .LVL364: 2401 009a 0830 adds r0, r0, #8 2402 .LVL365: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Read the input */ 2403 .loc 17 368 0 2404 009c 013C subs r4, r4, #1 2405 .LVL366: 2406 009e CFD1 bne .L85 2407 .LVL367: 2408 .L84: 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pState[1] = d2a; 2409 .loc 17 395 0 2410 00a0 07ED046A vstr.32 s12, [r7, #-16] 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 2411 .loc 17 396 0 2412 00a4 07ED034A vstr.32 s8, [r7, #-12] 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pState[3] = d2b; 2413 .loc 17 398 0 2414 00a8 47ED026A vstr.32 s13, [r7, #-8] 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 2415 .loc 17 399 0 2416 00ac 47ED014A vstr.32 s9, [r7, #-4] 2417 .LVL368: 2418 00b0 1436 adds r6, r6, #20 2419 .LVL369: 2420 00b2 1035 adds r5, r5, #16 2421 .LVL370: 2422 .loc 17 404 0 2423 00b4 7146 mov r1, lr 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Reset the output working pointer */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** pOut = pDst; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** /* Decrement the loop counter */ 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** stage--; 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** } while (stage > 0U); 2424 .loc 17 412 0 2425 00b6 BCF1010C subs ip, ip, #1 2426 .LVL371: 2427 00ba A9D1 bne .L86 2428 .LVL372: 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c **** } 2429 .loc 17 414 0 2430 00bc F0BD pop {r4, r5, r6, r7, pc} 2431 .cfi_endproc 2432 .LFE162: 2434 00be 00BF .section .text.arm_biquad_cascade_stereo_df2T_init_f32,"ax",%progbits 2435 .align 1 2436 .p2align 2,,3 2437 .global arm_biquad_cascade_stereo_df2T_init_f32 2438 .syntax unified 2439 .thumb ARM GAS /tmp/ccJrAs6S.s page 194 2440 .thumb_func 2441 .fpu fpv4-sp-d16 2443 arm_biquad_cascade_stereo_df2T_init_f32: 2444 .LFB163: 2445 .file 18 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * Title: arm_biquad_cascade_stereo_df2T_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * Description: Initialization function for floating-point transposed direct form II Biquad cascad 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** @addtogroup BiquadCascadeDF2T 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** @brief Initialization function for the floating-point transposed direct form II Biquad ca 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** @param[in,out] S points to an instance of the filter data structure. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** @param[in] numStages number of 2nd order stages in the filter. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** @param[in] pCoeffs points to the filter coefficients. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** @param[in] pState points to the state buffer. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** @par Coefficient and State Ordering 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** The coefficients are stored in the array pCoeffs in the following o 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** 
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c ****       {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c ****
ARM GAS /tmp/ccJrAs6S.s page 195 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** @par 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** where b1x and a1x are the coefficients for the first s 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** b2x and a2x are the coefficients for the second stage, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** and so on. The pCoeffs array contains a total of 5*numStages 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** The pState is a pointer to state array. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** Each Biquad stage has 2 state variables d1, and d2 for 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** The 2 state variables for stage 1 are first, then the 2 state variables for stag 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** The state array has a total length of 2*numStages values. 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** The state variables are updated after each block of data is processed; the coeff 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** void arm_biquad_cascade_stereo_df2T_init_f32( 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** arm_biquad_cascade_stereo_df2T_instance_f32 * S, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** uint8_t numStages, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** const float32_t * pCoeffs, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** float32_t * pState) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** { 2446 .loc 18 70 0 2447 .cfi_startproc 2448 @ args = 0, pretend = 0, frame = 0 2449 @ frame_needed = 0, uses_anonymous_args = 0 2450 .LVL373: 2451 0000 10B5 push {r4, lr} 2452 .LCFI38: 2453 .cfi_def_cfa_offset 8 2454 .cfi_offset 4, -8 2455 .cfi_offset 14, -4 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** /* Assign filter stages */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** S->numStages = numStages; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** /* Assign coefficient pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** S->pCoeffs = pCoeffs; 2456 .loc 18 75 0 2457 0002 8260 str r2, [r0, #8] 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** 2458 .loc 18 72 0 2459 0004 0170 strb r1, [r0] 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** /* Assign filter stages */ 2460 .loc 18 70 0 2461 0006 0446 mov r4, r0 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** /* Clear state buffer and size is always 4 * numStages */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float32_t)); 2462 .loc 18 78 0 2463 0008 0A01 lsls r2, r1, #4 2464 .LVL374: 2465 000a 1846 mov r0, r3 2466 .LVL375: 2467 000c 0021 movs r1, #0 2468 .LVL376: 2469 000e FFF7FEFF bl memset 2470 .LVL377: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** /* Assign state pointer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** S->pState = pState; 2471 .loc 18 81 0 ARM GAS /tmp/ccJrAs6S.s page 196 2472 0012 6060 str r0, [r4, #4] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c **** } 2473 .loc 18 82 0 2474 0014 10BD pop {r4, pc} 2475 .cfi_endproc 2476 .LFE163: 2478 0016 00BF .section .text.arm_conv_f32,"ax",%progbits 2479 .align 1 2480 .p2align 2,,3 2481 .global arm_conv_f32 2482 .syntax unified 2483 .thumb 2484 .thumb_func 2485 .fpu fpv4-sp-d16 2487 arm_conv_f32: 2488 .LFB164: 2489 .file 19 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Title: arm_conv_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Description: Convolution of floating-point sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @defgroup Conv Convolution 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** Convolution is a mathematical operation that operates on two finite length vectors to generate a 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** Convolution is similar to correlation and is frequently used in filtering and data analysis. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data typ ARM GAS /tmp/ccJrAs6S.s page 197 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** The library also provides fast versions of the Q15 and Q31 functions. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @par Algorithm 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** Let a[n] and b[n] be sequences of length srcALen 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** srcBLen samples respectively. Then the convolution 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 
  47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c ****      c[n] = a[n] * b[n]
  48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @par 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** is defined as 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** \image html ConvolutionEquation.gif 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @par 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** Note that c[n] is of length srcALen + srcBLen - 1 and 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pSrcA points to the first input vector of length srcALenpSrcB points to the second input vector of length srcBLenpDst and the calling function must 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** Conceptually, when two signals a[n] and b[n] are convo 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** the signal b[n] slides over a[n]. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied a 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @par 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** Note that convolution is a commutative operation: 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c ****      a[n] * b[n] = b[n] * a[n].
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c ****
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @par 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** This means that switching the A and B arguments to the convolution functions has 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @par Fixed-Point Behavior 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** Convolution requires summing up a large number of intermediate products. 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** Refer to the function specific documentation below for further details of the pa 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @par Fast Versions 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less c 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** the input signals should be scaled down to avoid intermediate overflows. 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @par Opt Versions 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer f 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** These versions are optimised in cycles and consumes more memory (Scratch memory) 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @addtogroup Conv 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @{ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @brief Convolution of floating-point sequences. 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @param[in] pSrcA points to the first input sequence 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @param[in] srcALen length of the first input sequence 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @param[in] pSrcB points to the second input sequence 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @param[in] srcBLen length of the second input sequence 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @param[out] pDst points to the location where the output result is written. Length srcA 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** @return none 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) ARM GAS /tmp/ccJrAs6S.s page 198 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #include "arm_helium_utils.h" 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #include "arm_vec_filtering.h" 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** void arm_conv_f32( 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t * pSrcA, 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32_t srcALen, 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t * pSrcB, 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32_t srcBLen, 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t * pDst) 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *pIn1 = pSrcA; /* inputA pointer */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *pIn2 = pSrcB; /* inputB pointer */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Loop to perform MAC operations according to correlation equation 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *pX; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *pY; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *pA; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *pB; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** int32_t i = 0U, j = 0; /* loop counters */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** int32_t block1, block2, block3; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32_t vddupStartIdx = 3; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32x4_t decrIdxVec = vddupq_u32(vddupStartIdx, 1); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** if (srcALen < srcBLen) 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Initialization to inputB pointer 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pIn1 = pSrcB; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Initialization to the end of inputA pointer 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pIn2 = pSrcA; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Swapping the lengths 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** j = srcALen; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** srcALen = srcBLen; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** srcBLen = j; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** block1 = srcBLen - 1; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** block2 = srcALen - srcBLen + 1; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** block3 = srcBLen - 1; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pA = pIn1; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pB = pIn2 - 3; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** for (i = 0; i <= block1 - 2; i += 2) 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32_t count = i + 1; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t acc0; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t acc1; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 199 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pX = pA; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pY = pB; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * compute 2 accumulators per loop 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * size is incrementing for successive accumulators 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Y pointer is incrementing for successive accumulators 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_F32(acc0, acc1, pX, pY, count); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pDst++ = acc0; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pDst++ = acc1; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pB += 2; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** for (; i < block1; i++) 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32_t count = i + 1; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t acc; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pX = pA; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pY = pB; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** MVE_INTR_CONV_SINGLE_F32(acc, pX, pY, count); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pDst++ = acc; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pB++; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** for (i = 0; i <= block2 - 2; i += 2) 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32_t count = srcBLen; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t acc0 = 0; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t acc1 = 0; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pX = pA; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pY = pB; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * compute 2 accumulators per loop 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * size is fixed for all accumulators 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * X pointer is incrementing for successive accumulators 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_F32(acc0, acc1, pX, pY, count); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pDst++ = acc0; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pDst++ = acc1; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pA += 2; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** if (block2 & 1) 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32_t count = srcBLen; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t acc = 0; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pX = pA; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pY = pB; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** MVE_INTR_CONV_SINGLE_F32(acc, pX, pY, count); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pDst++ = acc; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pA++; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } ARM GAS /tmp/ccJrAs6S.s page 200 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** for (i = block3; i >= 2; i -= 2) 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** int32_t count = i; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t acc0; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t acc1; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pX = pA; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pY = pB; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * compute 2 accumulators per loop 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * size is decrementing for successive accumulators 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * X pointer is incrementing for successive accumulators 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_F32(acc0, acc1, pX, pY, count); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pDst++ = acc0; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pDst++ = acc1; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pA += 2; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** for (; i >= 1; i--) 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** int32_t count = i; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t acc; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pX = pA; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pY = pB; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** MVE_INTR_CONV_SINGLE_F32(acc, pX, pY, count); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pDst++ = acc; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pA++; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #else 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** void arm_conv_f32( 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t * pSrcA, 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32_t srcALen, 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t * pSrcB, 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32_t srcBLen, 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t * pDst) 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2490 .loc 19 252 0 2491 .cfi_startproc 2492 @ args = 4, pretend = 0, frame = 0 2493 @ frame_needed = 0, uses_anonymous_args = 0 2494 .LVL378: 2495 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} 2496 .LCFI39: 2497 .cfi_def_cfa_offset 40 2498 .cfi_offset 3, -40 2499 .cfi_offset 4, -36 2500 .cfi_offset 5, -32 2501 .cfi_offset 6, -28 2502 .cfi_offset 7, -24 2503 .cfi_offset 8, -20 2504 .cfi_offset 9, -16 2505 .cfi_offset 10, -12 ARM GAS /tmp/ccJrAs6S.s page 201 2506 .cfi_offset 11, -8 2507 .cfi_offset 14, -4 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined(ARM_MATH_DSP) 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *pIn1; /* InputA pointer */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *pIn2; /* InputB pointer */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t *pOut = pDst; /* Output pointer */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *px; /* Intermediate inputA pointer */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *py; /* Intermediate inputB pointer */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *pSrc1, *pSrc2; /* Intermediate pointers */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t sum; /* Accumulators */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32_t j, k, count, blkCnt; /* Loop counters */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t acc0, acc1, acc2, acc3, c0; /* Accumulators */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if !defined(ARM_MATH_NEON) 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t x0, x1, x2, x3; /* Temporary variables to hold state and coeffic 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* srcB is always made to slide across srcA. */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** if (srcALen >= srcBLen) 2508 .loc 19 277 0 2509 0004 9942 cmp r1, r3 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 2510 .loc 19 252 0 2511 0006 8046 mov r8, r0 2512 0008 0A9F ldr r7, [sp, #40] 2513 .LVL379: 2514 .loc 19 277 0 2515 000a 05D2 bcs .L93 2516 000c 0446 mov r4, r0 2517 000e 0846 mov r0, r1 2518 .LVL380: 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Initialization of inputA pointer */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pIn1 = pSrcA; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Initialization of inputB pointer */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pIn2 = pSrcB; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** else 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Initialization of inputA pointer */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pIn1 = pSrcB; 2519 .loc 19 288 0 2520 0010 9046 mov r8, r2 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2521 .loc 19 277 0 2522 0012 1946 mov r1, r3 2523 .LVL381: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 202 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Initialization of inputB pointer */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pIn2 = pSrcA; 2524 .loc 19 291 0 2525 0014 2246 mov r2, r4 2526 .LVL382: 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2527 .loc 19 277 0 2528 0016 0346 mov r3, r0 2529 .LVL383: 2530 .L93: 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** j = srcBLen; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** srcBLen = srcALen; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** srcALen = j; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* The function is internally 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * divided into three stages according to the number of multiplications that has to be 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * taken place between inputA samples and inputB samples. In the first stage of the 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * algorithm, the multiplications increase by one for every iteration. 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * In the third stage of the algorithm, the multiplications decrease by one 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * for every iteration. */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* The algorithm is implemented in three stages. 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** The loop counters of each stage is initiated here. */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blockSize1 = srcBLen - 1U; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blockSize2 = srcALen - (srcBLen - 1U); 2531 .loc 19 311 0 2532 0018 4D1C adds r5, r1, #1 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blockSize3 = blockSize1; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* -------------------------- 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Initializations of stage1 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * -------------------------*/ 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* sum = x[0] * y[0] 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * sum = x[0] * y[1] + x[1] * y[0] 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * .... 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** The count variable holds the number of MAC operations performed */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** count = 1U; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Working pointer of inputA */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px = pIn1; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Working pointer of inputB */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py = pIn2; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* ------------------------ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Stage1 process ARM GAS /tmp/ccJrAs6S.s page 203 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * ----------------------*/ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined(ARM_MATH_NEON) 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t vec1; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t vec2; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t res = vdupq_n_f32(0) ; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x2_t accum = vdup_n_f32(0); 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* The first stage starts here */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (blockSize1 > 0U) 2533 .loc 19 346 0 2534 001a 5E1E subs r6, r3, #1 2535 .LVL384: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blockSize3 = blockSize1; 2536 .loc 19 311 0 2537 001c A5EB030A sub r10, r5, r3 2538 .LVL385: 2539 .loc 19 346 0 2540 0020 5BD0 beq .L94 2541 0022 4FEA830B lsl fp, r3, #2 2542 0026 08EB0B0E add lr, r8, fp 2543 002a 111D adds r1, r2, #4 2544 .LVL386: 2545 002c BC46 mov ip, r7 2546 002e 08F10405 add r5, r8, #4 2547 .LVL387: 2548 .L96: 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Accumulator is made zero for every iteration */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum = 0.0f; 2549 .loc 19 349 0 2550 0032 DFED557A vldr.32 s15, .L128 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2551 .loc 19 277 0 2552 0036 0C46 mov r4, r1 2553 0038 4046 mov r0, r8 2554 .LVL388: 2555 .L95: 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = count >> 2U; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined(ARM_MATH_NEON) 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** res = vdupq_n_f32(0) ; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** accum = vdup_n_f32(0); 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Compute 4 MACs simultaneously. */ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = count >> 2U; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* First part of the processing. Compute 4 MACs at a time. 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (k > 0U) 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** vec1 = vld1q_f32(px); 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** vec2 = vld1q_f32(py-3); ARM GAS /tmp/ccJrAs6S.s page 204 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** vec2 = vrev64q_f32(vec2); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** vec2 = vcombine_f32(vget_high_f32(vec2), vget_low_f32(vec2)); 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** res = vmlaq_f32(res,vec1, vec2); 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Increment pointers */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px += 4; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py -= 4; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement the loop counter */ 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k--; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res)); 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += accum[0] + accum[1]; 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** ** No loop unrolling is used. */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = count & 3; 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #else 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (k > 0U) 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* x[0] * y[srcBLen - 1] */ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* x[1] * y[srcBLen - 2] */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* x[2] * y[srcBLen - 3] */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* x[3] * y[srcBLen - 4] */ 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement loop counter */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k--; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Loop unrolling: Compute remaining outputs */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = count % 0x4U; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */ 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #else /* defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Initialize k with number of samples */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = count; 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (k > 0U) 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Perform the multiply-accumulate */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 2556 .loc 19 421 0 2557 003a F0EC016A vldmia.32 r0!, {s13} 2558 .LVL389: 2559 003e 34ED017A vldmdb.32 r4!, {s14} ARM GAS /tmp/ccJrAs6S.s page 205 2560 .LVL390: 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2561 .loc 19 418 0 2562 0042 8542 cmp r5, r0 2563 .loc 19 421 0 2564 0044 E6EE877A vfma.f32 s15, s13, s14 2565 .LVL391: 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2566 .loc 19 418 0 2567 0048 F7D1 bne .L95 2568 .LVL392: 2569 004a 0435 adds r5, r5, #4 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2570 .loc 19 346 0 2571 004c 7545 cmp r5, lr 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement loop counter */ 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k--; 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pOut++ = sum; 2572 .loc 19 428 0 2573 004e ECEC017A vstmia.32 ip!, {s15} 2574 .LVL393: 2575 0052 01F10401 add r1, r1, #4 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2576 .loc 19 346 0 2577 0056 ECD1 bne .L96 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py = pIn2 + count; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px = pIn1; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Increment MAC count */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** count++; 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement loop counter */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blockSize1--; 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* -------------------------- 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Initializations of stage2 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * ------------------------*/ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * .... 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Working pointer of inputA */ 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px = pIn1; 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Working pointer of inputB */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pSrc2 = pIn2 + (srcBLen - 1U); 2578 .loc 19 455 0 ARM GAS /tmp/ccJrAs6S.s page 206 2579 0058 03F18049 add r9, r3, #1073741824 2580 005c ABF1040B sub fp, fp, #4 2581 0060 09F1FF39 add r9, r9, #-1 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py = pSrc2; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* count is index by which the pointer pIn1 to be incremented */ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** count = 0U; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* ------------------- 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Stage2 process 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * ------------------*/ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * So, to loop unroll over blockSize2, 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * srcBLen should be greater than or equal to 4 */ 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** if (srcBLen >= 4U) 2582 .loc 19 468 0 2583 0064 032B cmp r3, #3 2584 0066 5F44 add r7, r7, fp 2585 .LVL394: 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py = pSrc2; 2586 .loc 19 455 0 2587 0068 02EB8909 add r9, r2, r9, lsl #2 2588 .LVL395: 2589 .loc 19 468 0 2590 006c 3BD9 bls .L112 2591 .LVL396: 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined(ARM_MATH_NEON) 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t c; 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t x1v; 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t x2v; 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t x; 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t res = vdupq_n_f32(0) ; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */ 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blkCnt = blockSize2 >> 2U; 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (blkCnt > 0U) 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Set all accumulators to zero */ 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc0 = 0.0f; 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc1 = 0.0f; 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc2 = 0.0f; 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc3 = 0.0f; 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = srcBLen >> 2U; 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined(ARM_MATH_NEON) 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** res = vdupq_n_f32(0) ; 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x1v = vld1q_f32(px); ARM GAS /tmp/ccJrAs6S.s page 207 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x2v = vld1q_f32(px+4); 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** do 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** c = vld1q_f32(py-3); 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px += 4; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x = x1v; 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** res = vmlaq_n_f32(res,x,c[3]); 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x = vextq_f32(x1v,x2v,1); 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** res = vmlaq_n_f32(res,x,c[2]); 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x = vextq_f32(x1v,x2v,2); 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** res = vmlaq_n_f32(res,x,c[1]); 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x = vextq_f32(x1v,x2v,3); 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** res = vmlaq_n_f32(res,x,c[0]); 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py -= 4; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x1v = x2v ; 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x2v = vld1q_f32(px+4); 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } while (--k); 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** ** No loop unrolling is used. */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = srcBLen & 0x3; 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x1v = vld1q_f32(px); 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px += 4; 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (k > 0U) 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Read y[srcBLen - 5] sample */ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** c0 = *(py--); 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** res = vmlaq_n_f32(res,x1v,c0); 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Reuse the present samples for the next MAC */ 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x1v[0] = x1v[1]; 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x1v[1] = x1v[2]; 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x1v[2] = x1v[3]; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x1v[3] = *(px++); 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement the loop counter */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k--; 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc0 = res[0]; 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc1 = res[1]; ARM GAS /tmp/ccJrAs6S.s page 208 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc2 = res[2]; 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc3 = res[3]; 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #else 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* read x[0], x[1], x[2] samples */ 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x0 = *px++; 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x1 = *px++; 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x2 = *px++; 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** do 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Read y[srcBLen - 1] sample */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** c0 = *py--; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Read x[3] sample */ 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x3 = *(px); 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Perform the multiply-accumulate */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc0 += x[0] * y[srcBLen - 1] */ 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc0 += x0 * c0; 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc1 += x[1] * y[srcBLen - 1] */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc1 += x1 * c0; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc2 += x[2] * y[srcBLen - 1] */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc2 += x2 * c0; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc3 += x[3] * y[srcBLen - 1] */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc3 += x3 * c0; 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Read y[srcBLen - 2] sample */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** c0 = *py--; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Read x[4] sample */ 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x0 = *(px + 1U); 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Perform the multiply-accumulate */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc0 += x[1] * y[srcBLen - 2] */ 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc0 += x1 * c0; 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc1 += x[2] * y[srcBLen - 2] */ 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc1 += x2 * c0; 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc2 += x[3] * y[srcBLen - 2] */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc2 += x3 * c0; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc3 += x[4] * y[srcBLen - 2] */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc3 += x0 * c0; 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Read y[srcBLen - 3] sample */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** c0 = *py--; 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Read x[5] sample */ 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x1 = *(px + 2U); 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Perform the multiply-accumulate */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc0 += x[2] * y[srcBLen - 3] */ 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc0 += x2 * c0; 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc1 += x[3] * y[srcBLen - 2] */ 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc1 += x3 * c0; 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc2 += x[4] * y[srcBLen - 2] */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc2 += x0 * c0; 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc3 += x[5] * y[srcBLen - 2] */ 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc3 += x1 * c0; ARM GAS /tmp/ccJrAs6S.s page 209 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Read y[srcBLen - 4] sample */ 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** c0 = *py--; 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Read x[6] sample */ 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x2 = *(px + 3U); 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px += 4U; 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Perform the multiply-accumulate */ 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc0 += x[3] * y[srcBLen - 4] */ 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc0 += x3 * c0; 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc1 += x[4] * y[srcBLen - 4] */ 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc1 += x0 * c0; 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc2 += x[5] * y[srcBLen - 4] */ 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc2 += x1 * c0; 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc3 += x[6] * y[srcBLen - 4] */ 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc3 += x2 * c0; 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } while (--k); 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** ** No loop unrolling is used. */ 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = srcBLen % 0x4U; 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (k > 0U) 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Read y[srcBLen - 5] sample */ 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** c0 = *py--; 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Read x[7] sample */ 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x3 = *px++; 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Perform the multiply-accumulate */ 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc0 += x[4] * y[srcBLen - 5] */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc0 += x0 * c0; 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc1 += x1 * c0; 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc2 += x2 * c0; 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** acc3 += x3 * c0; 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Reuse the present samples for the next MAC */ 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x0 = x1; 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x1 = x2; 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x2 = x3; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement the loop counter */ 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k--; 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */ 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pOut++ = acc0; 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pOut++ = acc1; 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pOut++ = acc2; 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pOut++ = acc3; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Increment the pointer pIn1 index, count by 4 */ ARM GAS /tmp/ccJrAs6S.s page 210 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** count += 4U; 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px = pIn1 + count; 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py = pSrc2; 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement the loop counter */ 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blkCnt--; 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** ** No loop unrolling is used. */ 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blkCnt = blockSize2 % 0x4U; 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #else 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Initialize blkCnt with number of samples */ 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blkCnt = blockSize2; 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined (ARM_MATH_NEON)*/ 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (blkCnt > 0U) 2592 .loc 19 691 0 2593 006e BAF1000F cmp r10, #0 2594 0072 6FD0 beq .L114 2595 0074 4FEA8A0A lsl r10, r10, #2 2596 .LVL397: 2597 0078 07EB0A0C add ip, r7, r10 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 2598 .loc 19 452 0 2599 007c 4146 mov r1, r8 2600 007e 09F1040E add lr, r9, #4 2601 .LVL398: 2602 .L108: 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Accumulator is made zero for every iteration */ 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum = 0.0f; 2603 .loc 19 694 0 2604 0082 DFED417A vldr.32 s15, .L128 2605 .LVL399: 2606 0086 7446 mov r4, lr 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 2607 .loc 19 452 0 2608 0088 1A46 mov r2, r3 2609 008a 0846 mov r0, r1 2610 .LVL400: 2611 .L107: 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined(ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL) 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = srcBLen >> 2U; 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined (ARM_MATH_NEON) 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t res = vdupq_n_f32(0) ; 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t x = vdupq_n_f32(0) ; 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t y = vdupq_n_f32(0) ; 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x2_t accum = vdup_n_f32(0) ; ARM GAS /tmp/ccJrAs6S.s page 211 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* First part of the processing. Compute 4 MACs at a time. 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (k > 0U) 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x = vld1q_f32(px); 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** y = vld1q_f32(py-3); 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** y = vrev64q_f32(y); 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** y = vcombine_f32(vget_high_f32(y), vget_low_f32(y)); 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** res = vmlaq_f32(res,x,y); 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px += 4 ; 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py -= 4 ; 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement the loop counter */ 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k--; 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res)); 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += accum[0] + accum[1]; 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** ** No loop unrolling is used. */ 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = srcBLen & 0x3U; 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #else 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (k > 0U) 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Perform the multiply-accumulate */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement loop counter */ 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k--; 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Loop unrolling: Compute remaining outputs */ 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = srcBLen % 0x4U; 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif /* if defined (ARM_MATH_NEON) */ 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #else 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Initialize blkCnt with number of samples */ 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = srcBLen; 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif /* #if defined(ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL) */ 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (k > 0U) 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Perform the multiply-accumulate */ 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 2612 .loc 19 758 0 2613 008c F0EC016A vldmia.32 r0!, {s13} 2614 .LVL401: ARM GAS /tmp/ccJrAs6S.s page 212 2615 0090 34ED017A vldmdb.32 r4!, {s14} 2616 .LVL402: 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2617 .loc 19 755 0 2618 0094 013A subs r2, r2, #1 2619 .LVL403: 2620 .loc 19 758 0 2621 0096 E6EE877A vfma.f32 s15, s13, s14 2622 .LVL404: 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2623 .loc 19 755 0 2624 009a F7D1 bne .L107 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement the loop counter */ 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k--; 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pOut++ = sum; 2625 .loc 19 765 0 2626 009c E7EC017A vstmia.32 r7!, {s15} 2627 .LVL405: 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2628 .loc 19 691 0 2629 00a0 6745 cmp r7, ip 2630 00a2 01F10401 add r1, r1, #4 2631 .LVL406: 2632 00a6 ECD1 bne .L108 2633 .LVL407: 2634 .L98: 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Increment the MAC count */ 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** count++; 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px = pIn1 + count; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py = pSrc2; 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement the loop counter */ 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blkCnt--; 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** else 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* If the srcBLen is not a multiple of 4, 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * the blockSize2 loop cannot be unrolled by 4 */ 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blkCnt = blockSize2; 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (blkCnt > 0U) 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Accumulator is made zero for every iteration */ 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum = 0.0f; 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* srcBLen number of MACS should be performed */ 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = srcBLen; 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (k > 0U) ARM GAS /tmp/ccJrAs6S.s page 213 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Perform the multiply-accumulate */ 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement the loop counter */ 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k--; 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pOut++ = sum; 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Increment the MAC count */ 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** count++; 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px = pIn1 + count; 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py = pSrc2; 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement the loop counter */ 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blkCnt--; 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* -------------------------- 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Initializations of stage3 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * -------------------------*/ 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcAL 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcAL 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * .... 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * sum += x[srcALen-1] * y[srcBLen-1] 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** */ 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** The blockSize3 variable holds the number of MAC operations performed */ 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Working pointer of inputA */ 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pSrc1 = pIn1 + (srcALen - (srcBLen - 1U)); 2635 .loc 19 832 0 2636 00a8 D044 add r8, r8, r10 2637 .LVL408: 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px = pSrc1; 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Working pointer of inputB */ 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pSrc2 = pIn2 + (srcBLen - 1U); 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py = pSrc2; 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* ------------------- 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * Stage3 process 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** * ------------------*/ 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (blockSize3 > 0U) 2638 .loc 19 842 0 2639 00aa A6B1 cbz r6, .L92 2640 .L111: 2641 00ac 09F1040E add lr, r9, #4 ARM GAS /tmp/ccJrAs6S.s page 214 2642 .LVL409: 2643 .L110: 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Accumulator is made zero for every iteration */ 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum = 0.0f; 2644 .loc 19 845 0 2645 00b0 DFED357A vldr.32 s15, .L128 2646 00b4 7146 mov r1, lr 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 2647 .loc 19 428 0 2648 00b6 3346 mov r3, r6 2649 00b8 4246 mov r2, r8 2650 .LVL410: 2651 .L109: 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = blockSize3 >> 2U; 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #if defined(ARM_MATH_NEON) 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t res = vdupq_n_f32(0) ; 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t x = vdupq_n_f32(0) ; 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x4_t y = vdupq_n_f32(0) ; 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32x2_t accum = vdup_n_f32(0) ; 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (k > 0U) 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** x = vld1q_f32(px); 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** y = vld1q_f32(py-3); 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** y = vrev64q_f32(y); 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** y = vcombine_f32(vget_high_f32(y), vget_low_f32(y)); 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** res = vmlaq_f32(res,x,y); 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px += 4 ; 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py -= 4 ; 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement the loop counter */ 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k--; 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res)); 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += accum[0] + accum[1]; 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #else 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (k > 0U) 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Perform the multiply-accumulate */ 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; ARM GAS /tmp/ccJrAs6S.s page 215 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement loop counter */ 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k--; 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif /* #if defined (ARM_MATH_NEON) */ 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Loop unrolling: Compute remaining outputs */ 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = blockSize3 % 0x4U; 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #else 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Initialize blkCnt with number of samples */ 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k = blockSize3; 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif /* #if defined (ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL)*/ 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** while (k > 0U) 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Perform the multiply-accumulate */ 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* sum += x[srcALen-1] * y[srcBLen-1] */ 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += *px++ * *py--; 2652 .loc 19 911 0 2653 00ba F2EC016A vldmia.32 r2!, {s13} 2654 .LVL411: 2655 00be 31ED017A vldmdb.32 r1!, {s14} 2656 .LVL412: 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2657 .loc 19 907 0 2658 00c2 013B subs r3, r3, #1 2659 .LVL413: 2660 .loc 19 911 0 2661 00c4 E6EE877A vfma.f32 s15, s13, s14 2662 .LVL414: 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2663 .loc 19 907 0 2664 00c8 F7D1 bne .L109 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2665 .loc 19 842 0 2666 00ca 013E subs r6, r6, #1 2667 .LVL415: 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement loop counter */ 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** k--; 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** *pOut++ = sum; 2668 .loc 19 918 0 2669 00cc ECEC017A vstmia.32 ip!, {s15} 2670 .LVL416: 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px = ++pSrc1; 2671 .loc 19 921 0 2672 00d0 08F10408 add r8, r8, #4 ARM GAS /tmp/ccJrAs6S.s page 216 2673 .LVL417: 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2674 .loc 19 842 0 2675 00d4 ECD1 bne .L110 2676 .LVL418: 2677 .L92: 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py = pSrc2; 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Decrement the loop counter */ 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** blockSize3--; 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #else 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* alternate version for CM0_FAMILY */ 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *pIn1 = pSrcA; /* InputA pointer */ 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** const float32_t *pIn2 = pSrcB; /* InputB pointer */ 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** float32_t sum; /* Accumulator */ 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** uint32_t i, j; /* Loop counters */ 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Loop to calculate convolution for output length number of times */ 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** for (i = 0U; i < (srcALen + srcBLen - 1U); i++) 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Initialize sum with zero to carry out MAC operations */ 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum = 0.0f; 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Loop to perform MAC operations according to convolution equation */ 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** for (j = 0U; j <= i; j++) 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Check the array limitations */ 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** if (((i - j) < srcBLen) && (j < srcALen)) 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* z[i] += x[i-j] * y[j] */ 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** sum += ( pIn1[j] * pIn2[i - j]); 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** /* Store the output in the destination buffer */ 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** pDst[i] = sum; 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** } 2678 .loc 19 959 0 2679 00d6 BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} 2680 .LVL419: 2681 .L94: 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** py = pSrc2; 2682 .loc 19 455 0 2683 00da 03F18049 add r9, r3, #1073741824 2684 00de 09F1FF39 add r9, r9, #-1 2685 00e2 02EB8909 add r9, r2, r9, lsl #2 2686 .LVL420: 2687 .L112: 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2688 .loc 19 784 0 ARM GAS /tmp/ccJrAs6S.s page 217 2689 00e6 BAF1000F cmp r10, #0 2690 00ea 33D0 beq .L114 2691 00ec A3B3 cbz r3, .L99 2692 00ee F6B3 cbz r6, .L100 2693 00f0 4FEA8A0A lsl r10, r10, #2 2694 .LVL421: 2695 00f4 022B cmp r3, #2 2696 00f6 07EB0A02 add r2, r7, r10 2697 .LVL422: 2698 00fa BC46 mov ip, r7 2699 00fc 4346 mov r3, r8 2700 00fe 17D0 beq .L103 2701 .LVL423: 2702 .L102: 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 2703 .loc 19 795 0 2704 0100 F3EC016A vldmia.32 r3!, {s13} 2705 .LVL424: 2706 0104 19ED025A vldr.32 s10, [r9, #-8] 2707 0108 D3ED017A vldr.32 s15, [r3, #4] 2708 010c D3ED005A vldr.32 s11, [r3] 2709 0110 19ED016A vldr.32 s12, [r9, #-4] 2710 0114 99ED007A vldr.32 s14, [r9] 2711 0118 67EE857A vmul.f32 s15, s15, s10 2712 011c E5EE867A vfma.f32 s15, s11, s12 2713 0120 E6EE877A vfma.f32 s15, s13, s14 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 2714 .loc 19 802 0 2715 0124 ECEC017A vstmia.32 ip!, {s15} 2716 .LVL425: 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2717 .loc 19 784 0 2718 0128 6245 cmp r2, ip 2719 012a E9D1 bne .L102 2720 .LVL426: 2721 .L104: 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px = pSrc1; 2722 .loc 19 832 0 2723 012c D044 add r8, r8, r10 2724 .LVL427: 2725 012e BDE7 b .L111 2726 .LVL428: 2727 .L103: 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 2728 .loc 19 795 0 2729 0130 93ED007A vldr.32 s14, [r3] 2730 .LVL429: 2731 0134 59ED017A vldr.32 s15, [r9, #-4] 2732 0138 93ED016A vldr.32 s12, [r3, #4] 2733 013c D9ED006A vldr.32 s13, [r9] 2734 0140 0433 adds r3, r3, #4 2735 .LVL430: 2736 0142 67EE867A vmul.f32 s15, s15, s12 2737 0146 E6EE877A vfma.f32 s15, s13, s14 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 2738 .loc 19 802 0 2739 014a ECEC017A vstmia.32 ip!, {s15} ARM GAS /tmp/ccJrAs6S.s page 218 2740 .LVL431: 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2741 .loc 19 784 0 2742 014e 6245 cmp r2, ip 2743 0150 EED1 bne .L103 2744 0152 EBE7 b .L104 2745 .LVL432: 2746 .L114: 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 2747 .loc 19 428 0 2748 0154 BC46 mov ip, r7 2749 0156 A7E7 b .L98 2750 .L99: 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 2751 .loc 19 802 0 2752 0158 4FEA8A0A lsl r10, r10, #2 2753 .LVL433: 2754 015c 1946 mov r1, r3 2755 015e 5246 mov r2, r10 2756 .LVL434: 2757 0160 3846 mov r0, r7 2758 0162 FFF7FEFF bl memset 2759 .LVL435: 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** px = pSrc1; 2760 .loc 19 832 0 2761 0166 D044 add r8, r8, r10 2762 .LVL436: 2763 0168 07EB0A0C add ip, r7, r10 2764 .LVL437: 2765 016c 9EE7 b .L111 2766 .LVL438: 2767 .L100: 2768 016e 07EB8A05 add r5, r7, r10, lsl #2 2769 .LVL439: 2770 .L105: 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 2771 .loc 19 795 0 2772 0172 B8EC017A vldmia.32 r8!, {s14} 2773 .LVL440: 2774 0176 D9ED007A vldr.32 s15, [r9] 2775 017a 67EE877A vmul.f32 s15, s15, s14 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** 2776 .loc 19 802 0 2777 017e E7EC017A vstmia.32 r7!, {s15} 2778 .LVL441: 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c **** { 2779 .loc 19 784 0 2780 0182 AF42 cmp r7, r5 2781 0184 F5D1 bne .L105 2782 0186 A6E7 b .L92 2783 .L129: 2784 .align 2 2785 .L128: 2786 0188 00000000 .word 0 2787 .cfi_endproc 2788 .LFE164: 2790 .section .text.arm_conv_fast_opt_q15,"ax",%progbits ARM GAS /tmp/ccJrAs6S.s page 219 2791 .align 1 2792 .p2align 2,,3 2793 .global arm_conv_fast_opt_q15 2794 .syntax unified 2795 .thumb 2796 .thumb_func 2797 .fpu fpv4-sp-d16 2799 arm_conv_fast_opt_q15: 2800 .LFB165: 2801 .file 20 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * Title: arm_conv_fast_opt_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * Description: Fast Q15 Convolution 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @addtogroup Conv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @brief Convolution of Q15 sequences (fast version). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @param[out] pDst points to the location where the output result is written. Length srcA 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, ARM GAS /tmp/ccJrAs6S.s page 220 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @return none 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @par Scaling and Overflow Behavior 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** This fast version uses a 32-bit accumulator with 2.30 format. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** The accumulator maintains full precision of the intermediate multiplication resu 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** but provides only a single guard bit. There is no saturation on intermediate add 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** Thus, if the accumulator overflows it wraps around and distorts the result. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** The input signals should be scaled down to avoid intermediate overflows. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** as maximum of min(srcALen, srcBLen) number of additions are carried internally. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 form 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** @remark 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** Refer to \ref arm_conv_q15() for a slower implementation of this function which 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** void arm_conv_fast_opt_q15( 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** const q15_t * pSrcA, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** uint32_t srcALen, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** const q15_t * pSrcB, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** uint32_t srcBLen, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** q15_t * pDst, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** q15_t * pScratch1, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** q15_t * pScratch2) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 2802 .loc 20 73 0 2803 .cfi_startproc 2804 @ args = 12, pretend = 0, frame = 8 2805 @ frame_needed = 0, uses_anonymous_args = 0 2806 .LVL442: 2807 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 2808 .LCFI40: 2809 .cfi_def_cfa_offset 36 2810 .cfi_offset 4, -36 2811 .cfi_offset 5, -32 2812 .cfi_offset 6, -28 2813 .cfi_offset 7, -24 2814 .cfi_offset 8, -20 2815 .cfi_offset 9, -16 2816 .cfi_offset 10, -12 2817 .cfi_offset 11, -8 2818 .cfi_offset 14, -4 2819 0004 83B0 sub sp, sp, #12 2820 .LCFI41: 2821 .cfi_def_cfa_offset 48 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** q31_t acc0; /* Accumulators */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** const q15_t *pIn1; /* InputA pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** const q15_t *pIn2; /* InputB pointer */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** const q15_t *px; /* Intermediate inputA pointer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** q15_t *py; /* Intermediate inputB pointer */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** uint32_t j, k, blkCnt; /* Loop counter */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** uint32_t tapCnt; /* Loop count */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 221 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** q31_t acc1, acc2, acc3; /* Accumulators */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** q31_t x1, x2, x3; /* Temporary variables to hold state and coe 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** q31_t y1, y2; /* State variables */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #endif 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* srcB is always made to slide across srcA. */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** if (srcALen >= srcBLen) 2822 .loc 20 95 0 2823 0006 9942 cmp r1, r3 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** q31_t acc0; /* Accumulators */ 2824 .loc 20 73 0 2825 0008 0D46 mov r5, r1 2826 000a 1C46 mov r4, r3 2827 000c 8146 mov r9, r0 2828 000e DDE90C76 ldrd r7, r6, [sp, #48] 2829 .LVL443: 2830 0012 DDF83880 ldr r8, [sp, #56] 2831 .LVL444: 2832 .loc 20 95 0 2833 0016 04D2 bcs .L131 2834 0018 2B46 mov r3, r5 2835 .LVL445: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Initialization of inputA pointer */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pIn1 = pSrcA; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Initialization of inputB pointer */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pIn2 = pSrcB; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** } 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** else 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Initialization of inputA pointer */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pIn1 = pSrcB; 2836 .loc 20 106 0 2837 001a 9146 mov r9, r2 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 2838 .loc 20 95 0 2839 001c 2546 mov r5, r4 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Initialization of inputB pointer */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pIn2 = pSrcA; 2840 .loc 20 109 0 2841 001e 0246 mov r2, r0 2842 .LVL446: 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 2843 .loc 20 95 0 2844 0020 1C46 mov r4, r3 2845 .LVL447: 2846 .L131: 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** j = srcBLen; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** srcBLen = srcALen; ARM GAS /tmp/ccJrAs6S.s page 222 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** srcALen = j; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** } 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Pointer to take end of scratch2 buffer */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pScr2 = pScratch2 + srcBLen - 1; 2847 .loc 20 118 0 2848 0022 04F10043 add r3, r4, #-2147483648 2849 0026 013B subs r3, r3, #1 2850 0028 4FEA430A lsl r10, r3, #1 2851 .LVL448: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* points to smaller length sequence */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** px = pIn2; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** k = srcBLen >> 2U; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Copy smaller length input sequence in reverse order into second scratch buffer */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** while (k > 0U) 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* copy second buffer in reversal manner */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** *pScr2-- = *px++; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** *pScr2-- = *px++; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** *pScr2-- = *px++; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** *pScr2-- = *px++; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Decrement loop counter */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** k--; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** } 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Loop unrolling: Compute remaining outputs */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** k = srcBLen % 0x4U; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #else 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Initialize k with number of samples */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** k = srcBLen; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** while (k > 0U) 2852 .loc 20 151 0 2853 002c 4CB1 cbz r4, .L132 2854 002e 0AF10200 add r0, r10, #2 2855 .LVL449: 2856 0032 4044 add r0, r0, r8 2857 0034 2146 mov r1, r4 2858 .LVL450: 2859 .L133: 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* copy second buffer in reversal manner for remaining samples */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** *pScr2-- = *px++; 2860 .loc 20 154 0 2861 0036 32F9023B ldrsh r3, [r2], #2 2862 .LVL451: ARM GAS /tmp/ccJrAs6S.s page 223 2863 003a 20F8023D strh r3, [r0, #-2]! @ movhi 2864 .LVL452: 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 2865 .loc 20 151 0 2866 003e 0139 subs r1, r1, #1 2867 .LVL453: 2868 0040 F9D1 bne .L133 2869 .LVL454: 2870 .L132: 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Decrement loop counter */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** k--; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** } 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Initialze temporary scratch pointer */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pScr1 = pScratch1; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Assuming scratch1 buffer is aligned by 32-bit */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Fill (srcBLen - 1U) zeros in scratch1 buffer */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 2871 .loc 20 165 0 2872 0042 04F1FF3B add fp, r4, #-1 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Update temporary scratch pointer */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pScr1 += (srcBLen - 1U); 2873 .loc 20 168 0 2874 0046 B244 add r10, r10, r6 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 2875 .loc 20 165 0 2876 0048 5A46 mov r2, fp 2877 .LVL455: 2878 004a 3146 mov r1, r6 2879 004c 0020 movs r0, #0 2880 004e FFF7FEFF bl arm_fill_q15 2881 .LVL456: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Copy (srcALen) samples in scratch buffer */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** arm_copy_q15(pIn1, pScr1, srcALen); 2882 .loc 20 173 0 2883 0052 4846 mov r0, r9 2884 0054 5146 mov r1, r10 2885 0056 2A46 mov r2, r5 2886 0058 FFF7FEFF bl arm_copy_q15 2887 .LVL457: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Update pointers */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pScr1 += srcALen; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 2888 .loc 20 180 0 2889 005c 5A46 mov r2, fp 2890 005e 0AEB4501 add r1, r10, r5, lsl #1 2891 .LVL458: ARM GAS /tmp/ccJrAs6S.s page 224 2892 0062 0020 movs r0, #0 2893 0064 FFF7FEFF bl arm_fill_q15 2894 .LVL459: 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Update pointer */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pScr1 += (srcBLen - 1U); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Temporary pointer for scratch2 */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** py = pScratch2; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Initialization of pIn2 pointer */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pIn2 = py; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** blkCnt = (srcALen + srcBLen - 1U) >> 2; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** while (blkCnt > 0) 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Initialze temporary scratch pointer as scratch1 */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pScr1 = pScratch1; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Clear Accumlators */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc0 = 0; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc1 = 0; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc2 = 0; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc3 = 0; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Read two samples from scratch1 buffer */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** x2 = read_q15x2_ia (&pScr1); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** tapCnt = (srcBLen) >> 2U; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** while (tapCnt > 0U) 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Read four samples from smaller buffer */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** y1 = read_q15x2_ia ((q15_t **) &pIn2); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** y2 = read_q15x2_ia ((q15_t **) &pIn2); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* multiply and accumlate */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc0 = __SMLAD(x1, y1, acc0); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc2 = __SMLAD(x2, y1, acc2); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* pack input data */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #else 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #endif 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* multiply and accumlate */ ARM GAS /tmp/ccJrAs6S.s page 225 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc1 = __SMLADX(x3, y1, acc1); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* multiply and accumlate */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc0 = __SMLAD(x2, y2, acc0); 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc2 = __SMLAD(x1, y2, acc2); 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* pack input data */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #else 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #endif 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc3 = __SMLADX(x3, y1, acc3); 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc1 = __SMLADX(x3, y2, acc1); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** x2 = read_q15x2_ia (&pScr1); 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #else 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #endif 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc3 = __SMLADX(x3, y2, acc3); 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Decrement loop counter */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** tapCnt--; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** } 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Update scratch pointer for remaining samples of smaller length sequence */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pScr1 -= 4U; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* apply same above for remaining samples of smaller length sequence */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** tapCnt = (srcBLen) & 3U; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** while (tapCnt > 0U) 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* accumlate the results */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2); 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc1 += (*pScr1++ * *pIn2); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc2 += (*pScr1++ * *pIn2); 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc3 += (*pScr1++ * *pIn2++); 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pScr1 -= 3U; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Decrement loop counter */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** tapCnt--; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** } 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** blkCnt--; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Store the results in the accumulators in the destination buffer. */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN ARM GAS /tmp/ccJrAs6S.s page 226 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #else 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Initialization of inputB pointer */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pIn2 = py; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pScratch1 += 4U; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** } 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Loop unrolling: Compute remaining outputs */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** blkCnt = (srcALen + srcBLen - 1U) & 0x3; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #else 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Initialize blkCnt with number of samples */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** blkCnt = (srcALen + srcBLen - 1U); 2895 .loc 20 311 0 2896 0068 05EB040E add lr, r5, r4 2897 .LVL460: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Calculate convolution for remaining samples of Bigger length sequence */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** while (blkCnt > 0) 2898 .loc 20 316 0 2899 006c BEF1010E subs lr, lr, #1 2900 .LVL461: 2901 0070 36D0 beq .L130 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Initialze temporary scratch pointer as scratch1 */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pScr1 = pScratch1; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Clear Accumlators */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc0 = 0; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** tapCnt = (srcBLen) >> 1U; 2902 .loc 20 324 0 2903 0072 4FEA540A lsr r10, r4, #1 2904 .LVL462: 2905 0076 4FEA8A0B lsl fp, r10, #2 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** while (tapCnt > 0U) 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Decrement loop counter */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** tapCnt--; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** } 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** tapCnt = (srcBLen) & 1U; ARM GAS /tmp/ccJrAs6S.s page 227 2906 .loc 20 337 0 2907 007a 04F00103 and r3, r4, #1 2908 007e 0193 str r3, [sp, #4] 2909 0080 08EB0B09 add r9, r8, fp 2910 .LVL463: 2911 .L135: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 2912 .loc 20 326 0 2913 0084 BAF1000F cmp r10, #0 2914 0088 2DD0 beq .L140 2915 008a 341D adds r4, r6, #4 2916 008c 08F10400 add r0, r8, #4 2917 0090 5546 mov r5, r10 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 2918 .loc 20 322 0 2919 0092 0023 movs r3, #0 2920 .LVL464: 2921 .L137: 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 2922 .loc 20 330 0 2923 0094 34F8042C ldrh r2, [r4, #-4] 2924 0098 30F804CC ldrh ip, [r0, #-4] 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 2925 .loc 20 331 0 2926 009c 34F8021C ldrh r1, [r4, #-2] 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 2927 .loc 20 330 0 2928 00a0 12FB0C33 smlabb r3, r2, ip, r3 2929 .LVL465: 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 2930 .loc 20 331 0 2931 00a4 30F8022C ldrh r2, [r0, #-2] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 2932 .loc 20 326 0 2933 00a8 013D subs r5, r5, #1 2934 .LVL466: 2935 00aa 04F10404 add r4, r4, #4 2936 .LVL467: 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 2937 .loc 20 331 0 2938 00ae 11FB0233 smlabb r3, r1, r2, r3 2939 .LVL468: 2940 00b2 00F10400 add r0, r0, #4 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 2941 .loc 20 326 0 2942 00b6 EDD1 bne .L137 2943 00b8 06EB0B02 add r2, r6, fp 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 2944 .loc 20 331 0 2945 00bc 4946 mov r1, r9 2946 .LVL469: 2947 .L136: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* apply same above for remaining samples of smaller length sequence */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** while (tapCnt > 0U) 2948 .loc 20 340 0 2949 00be 0198 ldr r0, [sp, #4] ARM GAS /tmp/ccJrAs6S.s page 228 2950 00c0 18B1 cbz r0, .L138 2951 .LVL470: 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* accumlate the results */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 2952 .loc 20 344 0 2953 00c2 1288 ldrh r2, [r2] 2954 .LVL471: 2955 00c4 0988 ldrh r1, [r1] 2956 .LVL472: 2957 00c6 12FB0133 smlabb r3, r2, r1, r3 2958 .LVL473: 2959 .L138: 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 2960 .loc 20 316 0 2961 00ca BEF1010E subs lr, lr, #1 2962 .LVL474: 2963 .LBB1121: 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Decrement loop counter */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** tapCnt--; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** } 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** blkCnt--; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* The result is in 2.30 format. Convert to 1.15 with saturation. 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** Then store the output in the destination buffer. */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); 2964 .loc 20 354 0 2965 00ce 4FEAE333 asr r3, r3, #15 2966 .LVL475: 2967 .LBE1121: 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** /* Initialization of inputB pointer */ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pIn2 = py; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** pScratch1 += 1U; 2968 .loc 20 359 0 2969 00d2 06F10206 add r6, r6, #2 2970 .LVL476: 2971 .LBB1122: 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 2972 .loc 20 354 0 2973 .syntax unified 2974 @ 354 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15. 2975 00d6 03F30F03 ssat r3, #16, r3 2976 @ 0 "" 2 2977 .LVL477: 2978 .thumb 2979 .syntax unified 2980 .LBE1122: 2981 00da 27F8023B strh r3, [r7], #2 @ movhi 2982 .LVL478: 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 2983 .loc 20 316 0 2984 00de D1D1 bne .L135 ARM GAS /tmp/ccJrAs6S.s page 229 2985 .LVL479: 2986 .L130: 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** } 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** } 2987 .loc 20 362 0 2988 00e0 03B0 add sp, sp, #12 2989 .LCFI42: 2990 .cfi_remember_state 2991 .cfi_def_cfa_offset 36 2992 @ sp needed 2993 00e2 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 2994 .LVL480: 2995 .L140: 2996 .LCFI43: 2997 .cfi_restore_state 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** { 2998 .loc 20 326 0 2999 00e6 3246 mov r2, r6 3000 00e8 4146 mov r1, r8 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c **** 3001 .loc 20 322 0 3002 00ea 5346 mov r3, r10 3003 00ec E7E7 b .L136 3004 .cfi_endproc 3005 .LFE165: 3007 00ee 00BF .section .text.arm_conv_fast_q15,"ax",%progbits 3008 .align 1 3009 .p2align 2,,3 3010 .global arm_conv_fast_q15 3011 .syntax unified 3012 .thumb 3013 .thumb_func 3014 .fpu fpv4-sp-d16 3016 arm_conv_fast_q15: 3017 .LFB166: 3018 .file 21 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Title: arm_conv_fast_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Description: Fast Q15 Convolution 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * www.apache.org/licenses/LICENSE-2.0 ARM GAS /tmp/ccJrAs6S.s page 230 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** @addtogroup Conv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** @brief Convolution of Q15 sequences (fast version). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** @param[out] pDst points to the location where the output result is written. Length srcA 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** This fast version uses a 32-bit accumulator with 2.30 format. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** The accumulator maintains full precision of the intermediate multiplication resu 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** but provides only a single guard bit. There is no saturation on intermediate add 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** Thus, if the accumulator overflows it wraps around and distorts the result. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** The input signals should be scaled down to avoid intermediate overflows. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** as maximum of min(srcALen, srcBLen) number of additions are carried internally. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 form 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** @remark 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** Refer to \ref arm_conv_q15() for a slower implementation of this function which 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** void arm_conv_fast_q15( 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** const q15_t * pSrcA, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** uint32_t srcALen, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** const q15_t * pSrcB, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** uint32_t srcBLen, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** q15_t * pDst) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3019 .loc 21 69 0 3020 .cfi_startproc 3021 @ args = 4, pretend = 0, frame = 48 3022 @ frame_needed = 0, uses_anonymous_args = 0 3023 .LVL481: 3024 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 3025 .LCFI44: 3026 .cfi_def_cfa_offset 36 ARM GAS /tmp/ccJrAs6S.s page 231 3027 .cfi_offset 4, -36 3028 .cfi_offset 5, -32 3029 .cfi_offset 6, -28 3030 .cfi_offset 7, -24 3031 .cfi_offset 8, -20 3032 .cfi_offset 9, -16 3033 .cfi_offset 10, -12 3034 .cfi_offset 11, -8 3035 .cfi_offset 14, -4 3036 0004 8DB0 sub sp, sp, #52 3037 .LCFI45: 3038 .cfi_def_cfa_offset 88 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** const q15_t *pIn1; /* InputA pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** const q15_t *pIn2; /* InputB pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** const q15_t *px; /* Intermediate inputA pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** const q15_t *py; /* Intermediate inputB pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coe 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** uint32_t j, k, count, blkCnt; /* Loop counters */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* srcB is always made to slide across srcA. */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** if (srcALen >= srcBLen) 3039 .loc 21 84 0 3040 0006 9942 cmp r1, r3 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** const q15_t *pIn1; /* InputA pointer */ 3041 .loc 21 69 0 3042 0008 9246 mov r10, r2 3043 000a 0291 str r1, [sp, #8] 3044 000c 169A ldr r2, [sp, #88] 3045 .LVL482: 3046 .loc 21 84 0 3047 000e 06D3 bcc .L151 3048 0010 0D46 mov r5, r1 3049 0012 5446 mov r4, r10 3050 0014 1946 mov r1, r3 3051 .LVL483: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Initialization of inputA pointer */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** pIn1 = pSrcA; 3052 .loc 21 87 0 3053 0016 8246 mov r10, r0 3054 .LVL484: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3055 .loc 21 84 0 3056 0018 2B46 mov r3, r5 3057 .LVL485: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Initialization of inputB pointer */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** pIn2 = pSrcB; 3058 .loc 21 90 0 3059 001a 2046 mov r0, r4 3060 .LVL486: ARM GAS /tmp/ccJrAs6S.s page 232 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3061 .loc 21 84 0 3062 001c 0291 str r1, [sp, #8] 3063 .LVL487: 3064 .L151: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** else 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Initialization of inputA pointer */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** pIn1 = pSrcB; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Initialization of inputB pointer */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** pIn2 = pSrcA; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** j = srcBLen; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** srcBLen = srcALen; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** srcALen = j; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* The function is internally 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * divided into three stages according to the number of multiplications that has to be 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * taken place between inputA samples and inputB samples. In the first stage of the 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * algorithm, the multiplications increase by one for every iteration. 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * In the third stage of the algorithm, the multiplications decrease by one 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * for every iteration. */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* The algorithm is implemented in three stages. 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** The loop counters of each stage is initiated here. */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blockSize1 = srcBLen - 1U; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blockSize2 = srcALen - (srcBLen - 1U); 3065 .loc 21 118 0 3066 001e 029F ldr r7, [sp, #8] 3067 0020 0133 adds r3, r3, #1 3068 .LVL488: 3069 0022 DB1B subs r3, r3, r7 3070 .LVL489: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blockSize3 = blockSize1; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* -------------------------- 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Initializations of stage1 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * -------------------------*/ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* sum = x[0] * y[0] 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * sum = x[0] * y[1] + x[1] * y[0] 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * .... 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** The count variable holds the number of MAC operations performed */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** count = 1U; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Working pointer of inputA */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pIn1; ARM GAS /tmp/ccJrAs6S.s page 233 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Working pointer of inputB */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = pIn2; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* ------------------------ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Stage1 process 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * ----------------------*/ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* For loop unrolling by 4, this stage is divided into two. */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* First part of this stage computes the MAC operations less than 4 */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Second part of this stage computes the MAC operations greater than or equal to 4 */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* The first part of the stage starts here */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while ((count < 4U) && (blockSize1 > 0U)) 3071 .loc 21 151 0 3072 0024 7E1E subs r6, r7, #1 3073 .LVL490: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blockSize3 = blockSize1; 3074 .loc 21 118 0 3075 0026 0793 str r3, [sp, #28] 3076 .LVL491: 3077 .loc 21 151 0 3078 0028 00F0D381 beq .L152 3079 .LVL492: 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Accumulator is made zero for every iteration */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = 0; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Loop over number of MAC operations between 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * inputA samples and inputB samples */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k = count; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (k > 0U) 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Perform the multiply-accumulates */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = __SMLAD(*px++, *py--, sum); 3080 .loc 21 163 0 3081 002c BAF90030 ldrsh r3, [r10] 3082 .LVL493: 3083 0030 B0F90040 ldrsh r4, [r0] 3084 .LVL494: 3085 .LBB1123: 3086 .LBB1124: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3087 .loc 6 1993 0 3088 0034 0021 movs r1, #0 3089 .syntax unified 3090 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3091 0036 23FB0413 smlad r3, r3, r4, r1 3092 @ 0 "" 2 3093 .LVL495: 3094 .thumb 3095 .syntax unified 3096 .LBE1124: 3097 .LBE1123: 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 234 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement the loop counter */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k--; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** *pOut++ = (q15_t) (sum >> 15); 3098 .loc 21 170 0 3099 003a DB13 asrs r3, r3, #15 3100 .LVL496: 3101 003c 1380 strh r3, [r2] @ movhi 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3102 .loc 21 151 0 3103 003e 022F cmp r7, #2 3104 .loc 21 170 0 3105 0040 02F10203 add r3, r2, #2 3106 0044 0093 str r3, [sp] 3107 .LVL497: 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3108 .loc 21 151 0 3109 0046 76D0 beq .L153 3110 .LVL498: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3111 .loc 21 163 0 3112 0048 BAF90030 ldrsh r3, [r10] 3113 .LVL499: 3114 004c B0F90240 ldrsh r4, [r0, #2] 3115 .LVL500: 3116 .LBB1130: 3117 .LBB1125: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3118 .loc 6 1993 0 3119 .syntax unified 3120 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3121 0050 23FB0414 smlad r4, r3, r4, r1 3122 @ 0 "" 2 3123 .LVL501: 3124 .thumb 3125 .syntax unified 3126 .LBE1125: 3127 .LBE1130: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3128 .loc 21 163 0 3129 0054 BAF90230 ldrsh r3, [r10, #2] 3130 .LVL502: 3131 0058 B0F90050 ldrsh r5, [r0] 3132 .LVL503: 3133 .LBB1131: 3134 .LBB1126: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3135 .loc 6 1993 0 3136 .syntax unified 3137 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3138 005c 23FB0543 smlad r3, r3, r5, r4 3139 @ 0 "" 2 3140 .LVL504: 3141 .thumb 3142 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 235 3143 .LBE1126: 3144 .LBE1131: 3145 .loc 21 170 0 3146 0060 DB13 asrs r3, r3, #15 3147 .LVL505: 3148 0062 5380 strh r3, [r2, #2] @ movhi 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3149 .loc 21 151 0 3150 0064 032F cmp r7, #3 3151 .loc 21 170 0 3152 0066 02F10403 add r3, r2, #4 3153 .LVL506: 3154 006a 0093 str r3, [sp] 3155 .LVL507: 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3156 .loc 21 151 0 3157 006c 63D0 beq .L153 3158 .LVL508: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3159 .loc 21 163 0 3160 006e BAF90030 ldrsh r3, [r10] 3161 .LVL509: 3162 0072 B0F90440 ldrsh r4, [r0, #4] 3163 .LVL510: 3164 .LBB1132: 3165 .LBB1127: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3166 .loc 6 1993 0 3167 .syntax unified 3168 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3169 0076 23FB0411 smlad r1, r3, r4, r1 3170 @ 0 "" 2 3171 .LVL511: 3172 .thumb 3173 .syntax unified 3174 .LBE1127: 3175 .LBE1132: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3176 .loc 21 163 0 3177 007a BAF90230 ldrsh r3, [r10, #2] 3178 .LVL512: 3179 007e B0F90240 ldrsh r4, [r0, #2] 3180 .LVL513: 3181 .LBB1133: 3182 .LBB1128: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3183 .loc 6 1993 0 3184 .syntax unified 3185 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3186 0082 23FB0411 smlad r1, r3, r4, r1 3187 @ 0 "" 2 3188 .LVL514: 3189 .thumb 3190 .syntax unified 3191 .LBE1128: 3192 .LBE1133: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 236 3193 .loc 21 163 0 3194 0086 8146 mov r9, r0 3195 0088 BAF90430 ldrsh r3, [r10, #4] 3196 .LVL515: 3197 008c 39F9064B ldrsh r4, [r9], #6 3198 .LVL516: 3199 .LBB1134: 3200 .LBB1129: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3201 .loc 6 1993 0 3202 .syntax unified 3203 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3204 0090 23FB0413 smlad r3, r3, r4, r1 3205 @ 0 "" 2 3206 .LVL517: 3207 .thumb 3208 .syntax unified 3209 .LBE1129: 3210 .LBE1134: 3211 .loc 21 170 0 3212 0094 DB13 asrs r3, r3, #15 3213 .LVL518: 3214 0096 9380 strh r3, [r2, #4] @ movhi 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = pIn2 + count; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pIn1; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Increment MAC count */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** count++; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blockSize1--; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* The second part of the stage starts here */ 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* The internal loop, over count, is unrolled by 4 */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* To, read the last two inputB samples using SIMD: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = py - 1; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (blockSize1 > 0U) 3215 .loc 21 189 0 3216 0098 391F subs r1, r7, #4 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3217 .loc 21 170 0 3218 009a 02F10602 add r2, r2, #6 3219 .LVL519: 3220 009e 0092 str r2, [sp] 3221 .LVL520: 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3222 .loc 21 187 0 3223 00a0 00F1040C add ip, r0, #4 3224 .LVL521: 3225 .loc 21 189 0 3226 00a4 0191 str r1, [sp, #4] 3227 00a6 46D0 beq .L153 ARM GAS /tmp/ccJrAs6S.s page 237 3228 00a8 0390 str r0, [sp, #12] 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3229 .loc 21 170 0 3230 00aa 9346 mov fp, r2 3231 .loc 21 189 0 3232 00ac 4FF0040E mov lr, #4 3233 00b0 3846 mov r0, r7 3234 .LVL522: 3235 .L158: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Accumulator is made zero for every iteration */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = 0; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k = count >> 2U; 3236 .loc 21 195 0 3237 00b2 4FEA9E08 lsr r8, lr, #2 3238 .LVL523: 3239 00b6 4746 mov r7, r8 3240 00b8 6546 mov r5, ip 3241 00ba 5446 mov r4, r10 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3242 .loc 21 192 0 3243 00bc 0023 movs r3, #0 3244 .LVL524: 3245 .L154: 3246 .LBB1135: 3247 .LBB1136: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3248 .loc 3 928 0 3249 00be 2268 ldr r2, [r4] @ unaligned 3250 .LBE1136: 3251 .LBE1135: 3252 .LBB1137: 3253 .LBB1138: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3254 .loc 3 948 0 3255 00c0 2968 ldr r1, [r5] @ unaligned 3256 .LBE1138: 3257 .LBE1137: 3258 .LBB1139: 3259 .LBB1140: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3260 .loc 6 2001 0 3261 .syntax unified 3262 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3263 00c2 22FB1133 smladx r3, r2, r1, r3 3264 @ 0 "" 2 3265 .LVL525: 3266 .thumb 3267 .syntax unified 3268 .LBE1140: 3269 .LBE1139: 3270 .LBB1141: 3271 .LBB1142: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3272 .loc 3 928 0 ARM GAS /tmp/ccJrAs6S.s page 238 3273 00c6 6268 ldr r2, [r4, #4] @ unaligned 3274 .LVL526: 3275 .LBE1142: 3276 .LBE1141: 3277 .LBB1143: 3278 .LBB1144: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3279 .loc 3 948 0 3280 00c8 55F8041C ldr r1, [r5, #-4] @ unaligned 3281 00cc 0834 adds r4, r4, #8 3282 .LVL527: 3283 00ce 083D subs r5, r5, #8 3284 .LVL528: 3285 .LBE1144: 3286 .LBE1143: 3287 .LBB1145: 3288 .LBB1146: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3289 .loc 6 2001 0 3290 .syntax unified 3291 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3292 00d0 22FB1133 smladx r3, r2, r1, r3 3293 @ 0 "" 2 3294 .LVL529: 3295 .thumb 3296 .syntax unified 3297 .LBE1146: 3298 .LBE1145: 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (k > 0U) 3299 .loc 21 199 0 3300 00d4 013F subs r7, r7, #1 3301 .LVL530: 3302 00d6 F2D1 bne .L154 3303 00d8 C8EB4872 rsb r2, r8, r8, lsl #29 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Perform the multiply-accumulates */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k--; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* For the next MAC operations, the pointer py is used without SIMD 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * So, py is incremented by 1 */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = py + 1U; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** ** No loop unrolling is used. */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k = count % 0x4U; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (k > 0U) ARM GAS /tmp/ccJrAs6S.s page 239 3304 .loc 21 219 0 3305 00dc 1EF00301 ands r1, lr, #3 3306 00e0 0CEBC20C add ip, ip, r2, lsl #3 3307 .LVL531: 3308 00e4 0AEBC804 add r4, r10, r8, lsl #3 3309 .LVL532: 3310 00e8 15D0 beq .L155 3311 .LVL533: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Perform the multiply-accumulates */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = __SMLAD(*px++, *py--, sum); 3312 .loc 21 222 0 3313 00ea 3AF93820 ldrsh r2, [r10, r8, lsl #3] 3314 .LVL534: 3315 00ee BCF90250 ldrsh r5, [ip, #2] 3316 .LVL535: 3317 .LBB1147: 3318 .LBB1148: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3319 .loc 6 1993 0 3320 .syntax unified 3321 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3322 00f2 22FB0533 smlad r3, r2, r5, r3 3323 @ 0 "" 2 3324 .LVL536: 3325 .thumb 3326 .syntax unified 3327 .LBE1148: 3328 .LBE1147: 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3329 .loc 21 219 0 3330 00f6 0129 cmp r1, #1 3331 00f8 0DD0 beq .L155 3332 .LVL537: 3333 .loc 21 222 0 3334 00fa B4F90220 ldrsh r2, [r4, #2] 3335 .LVL538: 3336 00fe BCF90050 ldrsh r5, [ip] 3337 .LVL539: 3338 .LBB1151: 3339 .LBB1149: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3340 .loc 6 1993 0 3341 .syntax unified 3342 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3343 0102 22FB0533 smlad r3, r2, r5, r3 3344 @ 0 "" 2 3345 .LVL540: 3346 .thumb 3347 .syntax unified 3348 .LBE1149: 3349 .LBE1151: 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3350 .loc 21 219 0 3351 0106 0229 cmp r1, #2 3352 0108 05D0 beq .L155 3353 .LVL541: ARM GAS /tmp/ccJrAs6S.s page 240 3354 .loc 21 222 0 3355 010a B4F90420 ldrsh r2, [r4, #4] 3356 .LVL542: 3357 010e 3CF9021C ldrsh r1, [ip, #-2] 3358 .LVL543: 3359 .LBB1152: 3360 .LBB1150: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3361 .loc 6 1993 0 3362 .syntax unified 3363 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3364 0112 22FB0133 smlad r3, r2, r1, r3 3365 @ 0 "" 2 3366 .LVL544: 3367 .thumb 3368 .syntax unified 3369 .L155: 3370 .LBE1150: 3371 .LBE1152: 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement the loop counter */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k--; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** *pOut++ = (q15_t) (sum >> 15); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = pIn2 + (count - 1U); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pIn1; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Increment MAC count */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** count++; 3372 .loc 21 236 0 3373 0116 0EF1010E add lr, lr, #1 3374 .LVL545: 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3375 .loc 21 229 0 3376 011a DB13 asrs r3, r3, #15 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3377 .loc 21 189 0 3378 011c 7045 cmp r0, lr 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pIn1; 3379 .loc 21 232 0 3380 011e CC46 mov ip, r9 3381 .LVL546: 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3382 .loc 21 229 0 3383 0120 2BF8023B strh r3, [fp], #2 @ movhi 3384 .LVL547: 3385 0124 09F10209 add r9, r9, #2 3386 .LVL548: 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3387 .loc 21 189 0 3388 0128 C3D1 bne .L158 3389 012a DDE90032 ldrd r3, r2, [sp] 3390 012e 0398 ldr r0, [sp, #12] ARM GAS /tmp/ccJrAs6S.s page 241 3391 0130 03EB4203 add r3, r3, r2, lsl #1 3392 0134 0093 str r3, [sp] 3393 .LVL549: 3394 .L153: 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blockSize1--; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* -------------------------- 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Initializations of stage2 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * ------------------------*/ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * .... 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Working pointer of inputA */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pIn1; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Working pointer of inputB */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** pSrc2 = pIn2 + (srcBLen - 1U); 3395 .loc 21 256 0 3396 0136 029B ldr r3, [sp, #8] 3397 0138 03F1004B add fp, r3, #-2147483648 3398 013c 0BF1FF3B add fp, fp, #-1 3399 0140 00EB4B0B add fp, r0, fp, lsl #1 3400 .LVL550: 3401 0144 ABF10202 sub r2, fp, #2 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = pSrc2; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* count is the index by which the pointer pIn1 to be incremented */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** count = 0U; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* -------------------- 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Stage2 process 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * -------------------*/ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * So, to loop unroll over blockSize2, 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * srcBLen should be greater than or equal to 4 */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** if (srcBLen >= 4U) 3402 .loc 21 269 0 3403 0148 032B cmp r3, #3 3404 014a 0192 str r2, [sp, #4] 3405 014c 40F24B81 bls .L189 3406 .LVL551: 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Loop unroll over blockSize2, by 4 */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blkCnt = blockSize2 >> 2U; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (blkCnt > 0U) 3407 .loc 21 274 0 3408 0150 079B ldr r3, [sp, #28] 3409 0152 9908 lsrs r1, r3, #2 ARM GAS /tmp/ccJrAs6S.s page 242 3410 .LVL552: 3411 0154 0891 str r1, [sp, #32] 3412 0156 00F0BB81 beq .L191 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = py - 1U; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Set all accumulators to zero */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc0 = 0; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc1 = 0; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc2 = 0; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc3 = 0; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* read x[0], x[1] samples */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** x0 = read_q15x2 ((q15_t *) px); 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* read x[1], x[2] samples */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** x1 = read_q15x2 ((q15_t *) px + 1); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px += 2U; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k = srcBLen >> 2U; 3413 .loc 21 291 0 3414 015a 0298 ldr r0, [sp, #8] 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** do 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read the last two inputB samples using SIMD: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * y[srcBLen - 1] and y[srcBLen - 2] */ 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** c0 = read_q15x2_da ((q15_t **) &py); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc0 = __SMLADX(x0, c0, acc0); 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc1 = __SMLADX(x1, c0, acc1); 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read x[2], x[3] */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** x2 = read_q15x2 ((q15_t *) px); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read x[3], x[4] */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px + 1); 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc2 = __SMLADX(x2, c0, acc2); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc3 = __SMLADX(x3, c0, acc3); 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read y[srcBLen - 3] and y[srcBLen - 4] */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** c0 = read_q15x2_da ((q15_t **) &py); 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc0 = __SMLADX(x2, c0, acc0); 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc1 = __SMLADX(x3, c0, acc1); ARM GAS /tmp/ccJrAs6S.s page 243 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read x[4], x[5] */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** x0 = read_q15x2 ((q15_t *) px + 2); 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read x[5], x[6] */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** x1 = read_q15x2 ((q15_t *) px + 3); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px += 4U; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc2 = __SMLADX(x0, c0, acc2); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc3 = __SMLADX(x1, c0, acc3); 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } while (--k); 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* For the next MAC operations, SIMD is not used 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * So, the 16 bit pointer if inputB, py is updated */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** ** No loop unrolling is used. */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k = srcBLen % 0x4U; 3415 .loc 21 348 0 3416 015c CDF828B0 str fp, [sp, #40] 3417 0160 1446 mov r4, r2 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3418 .loc 21 291 0 3419 0162 8208 lsrs r2, r0, #2 3420 0164 C2EB4273 rsb r3, r2, r2, lsl #29 3421 0168 04EBC303 add r3, r4, r3, lsl #3 3422 016c 0833 adds r3, r3, #8 3423 016e 0492 str r2, [sp, #16] 3424 0170 D200 lsls r2, r2, #3 3425 0172 0393 str r3, [sp, #12] 3426 0174 131D adds r3, r2, #4 3427 0176 0693 str r3, [sp, #24] 3428 0178 131F subs r3, r2, #4 3429 .loc 21 348 0 3430 017a 009A ldr r2, [sp] 3431 017c 0593 str r3, [sp, #20] 3432 017e 00F00303 and r3, r0, #3 3433 0182 D146 mov r9, r10 3434 0184 CDF82CA0 str r10, [sp, #44] 3435 0188 0996 str r6, [sp, #36] 3436 018a 9046 mov r8, r2 3437 018c 9B46 mov fp, r3 3438 .LVL553: 3439 018e 8A46 mov r10, r1 3440 .LVL554: 3441 .L174: 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3442 .loc 21 282 0 3443 0190 0023 movs r3, #0 3444 .LBB1153: 3445 .LBB1154: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3446 .loc 3 909 0 ARM GAS /tmp/ccJrAs6S.s page 244 3447 0192 D9F80060 ldr r6, [r9] @ unaligned 3448 .LVL555: 3449 .LBE1154: 3450 .LBE1153: 3451 .LBB1155: 3452 .LBB1156: 3453 0196 D9F80240 ldr r4, [r9, #2] @ unaligned 3454 .LVL556: 3455 019a DDF804C0 ldr ip, [sp, #4] 3456 .LBE1156: 3457 .LBE1155: 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3458 .loc 21 291 0 3459 019e DDF810E0 ldr lr, [sp, #16] 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc3 = 0; 3460 .loc 21 281 0 3461 01a2 1F46 mov r7, r3 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc2 = 0; 3462 .loc 21 280 0 3463 01a4 1846 mov r0, r3 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc1 = 0; 3464 .loc 21 279 0 3465 01a6 1D46 mov r5, r3 3466 01a8 09F10401 add r1, r9, #4 3467 .LVL557: 3468 .L170: 3469 .LBB1157: 3470 .LBB1158: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3471 .loc 3 948 0 discriminator 1 3472 01ac DCF80020 ldr r2, [ip] @ unaligned 3473 .LVL558: 3474 .LBE1158: 3475 .LBE1157: 3476 .LBB1159: 3477 .LBB1160: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3478 .loc 6 2001 0 discriminator 1 3479 .syntax unified 3480 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3481 01b0 26FB1255 smladx r5, r6, r2, r5 3482 @ 0 "" 2 3483 .LVL559: 3484 .thumb 3485 .syntax unified 3486 .LBE1160: 3487 .LBE1159: 3488 .LBB1161: 3489 .LBB1162: 3490 .syntax unified 3491 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3492 01b4 24FB1200 smladx r0, r4, r2, r0 3493 @ 0 "" 2 3494 .LVL560: 3495 .thumb 3496 .syntax unified 3497 .LBE1162: ARM GAS /tmp/ccJrAs6S.s page 245 3498 .LBE1161: 3499 .LBB1163: 3500 .LBB1164: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3501 .loc 3 909 0 discriminator 1 3502 01b8 0C68 ldr r4, [r1] @ unaligned 3503 .LVL561: 3504 .LBE1164: 3505 .LBE1163: 3506 .LBB1165: 3507 .LBB1166: 3508 01ba D1F80260 ldr r6, [r1, #2] @ unaligned 3509 .LVL562: 3510 .LBE1166: 3511 .LBE1165: 3512 .LBB1167: 3513 .LBB1168: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3514 .loc 6 2001 0 discriminator 1 3515 .syntax unified 3516 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3517 01be 24FB1277 smladx r7, r4, r2, r7 3518 @ 0 "" 2 3519 .LVL563: 3520 .thumb 3521 .syntax unified 3522 .LBE1168: 3523 .LBE1167: 3524 .LBB1169: 3525 .LBB1170: 3526 .syntax unified 3527 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3528 01c2 26FB1233 smladx r3, r6, r2, r3 3529 @ 0 "" 2 3530 .LVL564: 3531 .thumb 3532 .syntax unified 3533 .LBE1170: 3534 .LBE1169: 3535 .LBB1171: 3536 .LBB1172: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3537 .loc 3 948 0 discriminator 1 3538 01c6 5CF8042C ldr r2, [ip, #-4] @ unaligned 3539 .LVL565: 3540 01ca ACF1080C sub ip, ip, #8 3541 .LVL566: 3542 .LBE1172: 3543 .LBE1171: 3544 .LBB1173: 3545 .LBB1174: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3546 .loc 6 2001 0 discriminator 1 3547 .syntax unified 3548 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3549 01ce 24FB1255 smladx r5, r4, r2, r5 3550 @ 0 "" 2 ARM GAS /tmp/ccJrAs6S.s page 246 3551 .LVL567: 3552 .thumb 3553 .syntax unified 3554 .LBE1174: 3555 .LBE1173: 3556 .LBB1175: 3557 .LBB1176: 3558 .syntax unified 3559 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3560 01d2 26FB1200 smladx r0, r6, r2, r0 3561 @ 0 "" 2 3562 .LVL568: 3563 .thumb 3564 .syntax unified 3565 .LBE1176: 3566 .LBE1175: 3567 .LBB1177: 3568 .LBB1178: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3569 .loc 3 909 0 discriminator 1 3570 01d6 4E68 ldr r6, [r1, #4] @ unaligned 3571 .LVL569: 3572 .LBE1178: 3573 .LBE1177: 3574 .LBB1179: 3575 .LBB1180: 3576 01d8 D1F80640 ldr r4, [r1, #6] @ unaligned 3577 .LVL570: 3578 .LBE1180: 3579 .LBE1179: 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3580 .loc 21 333 0 discriminator 1 3581 01dc 0831 adds r1, r1, #8 3582 .LVL571: 3583 .LBB1181: 3584 .LBB1182: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3585 .loc 6 2001 0 discriminator 1 3586 .syntax unified 3587 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3588 01de 26FB1277 smladx r7, r6, r2, r7 3589 @ 0 "" 2 3590 .LVL572: 3591 .thumb 3592 .syntax unified 3593 .LBE1182: 3594 .LBE1181: 3595 .LBB1183: 3596 .LBB1184: 3597 .syntax unified 3598 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3599 01e2 24FB1233 smladx r3, r4, r2, r3 3600 @ 0 "" 2 3601 .LVL573: 3602 .thumb 3603 .syntax unified 3604 .LBE1184: ARM GAS /tmp/ccJrAs6S.s page 247 3605 .LBE1183: 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3606 .loc 21 341 0 discriminator 1 3607 01e6 BEF1010E subs lr, lr, #1 3608 .LVL574: 3609 01ea DFD1 bne .L170 3610 01ec 069A ldr r2, [sp, #24] 3611 01ee 0599 ldr r1, [sp, #20] 3612 .LVL575: 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** if (k == 1U) 3613 .loc 21 350 0 3614 01f0 BBF1010F cmp fp, #1 3615 01f4 4A44 add r2, r9, r2 3616 01f6 4944 add r1, r9, r1 3617 .LVL576: 3618 01f8 00F03C81 beq .L235 3619 .LVL577: 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read y[srcBLen - 5] */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** c0 = *(py+1); 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** c0 = c0 << 16U; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #else 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** c0 = c0 & 0x0000FFFF; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read x[7] */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px); 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px++; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Perform the multiply-accumulates */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc0 = __SMLAD(x0, c0, acc0); 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc1 = __SMLAD(x1, c0, acc1); 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc2 = __SMLADX(x1, c0, acc2); 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc3 = __SMLADX(x3, c0, acc3); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** if (k == 2U) 3620 .loc 21 372 0 3621 01fc BBF1020F cmp fp, #2 3622 0200 40F04681 bne .L173 3623 .LVL578: 3624 .LBB1185: 3625 .LBB1186: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3626 .loc 3 909 0 3627 0204 0399 ldr r1, [sp, #12] 3628 0206 51F8081C ldr r1, [r1, #-8] @ unaligned 3629 .LVL579: 3630 .LBE1186: 3631 .LBE1185: 3632 .LBB1187: 3633 .LBB1188: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3634 .loc 6 2001 0 ARM GAS /tmp/ccJrAs6S.s page 248 3635 .syntax unified 3636 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3637 020a 26FB1155 smladx r5, r6, r1, r5 3638 @ 0 "" 2 3639 .LVL580: 3640 .thumb 3641 .syntax unified 3642 .LBE1188: 3643 .LBE1187: 3644 .LBB1189: 3645 .LBB1190: 3646 .syntax unified 3647 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3648 020e 24FB1100 smladx r0, r4, r1, r0 3649 @ 0 "" 2 3650 .LVL581: 3651 .thumb 3652 .syntax unified 3653 .LBE1190: 3654 .LBE1189: 3655 .LBB1191: 3656 .LBB1192: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3657 .loc 3 909 0 3658 0212 1468 ldr r4, [r2] @ unaligned 3659 .LBE1192: 3660 .LBE1191: 3661 .LBB1193: 3662 .LBB1194: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3663 .loc 6 2001 0 3664 .syntax unified 3665 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3666 0214 24FB1177 smladx r7, r4, r1, r7 3667 @ 0 "" 2 3668 .LVL582: 3669 .thumb 3670 .syntax unified 3671 .LBE1194: 3672 .LBE1193: 3673 .LBB1195: 3674 .LBB1196: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3675 .loc 3 909 0 3676 0218 D2F80220 ldr r2, [r2, #2] @ unaligned 3677 .LVL583: 3678 .LBE1196: 3679 .LBE1195: 3680 .LBB1197: 3681 .LBB1198: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3682 .loc 6 2001 0 3683 .syntax unified 3684 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3685 021c 22FB1133 smladx r3, r2, r1, r3 3686 @ 0 "" 2 3687 .LVL584: ARM GAS /tmp/ccJrAs6S.s page 249 3688 .thumb 3689 .syntax unified 3690 .L172: 3691 .LBE1198: 3692 .LBE1197: 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read y[srcBLen - 5], y[srcBLen - 6] */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** c0 = read_q15x2 ((q15_t *) py); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read x[7], x[8] */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px); 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read x[9] */ 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** x2 = read_q15x2 ((q15_t *) px + 1); 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px += 2U; 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Perform the multiply-accumulates */ 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc0 = __SMLADX(x0, c0, acc0); 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc1 = __SMLADX(x1, c0, acc1); 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc2 = __SMLADX(x3, c0, acc2); 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc3 = __SMLADX(x2, c0, acc3); 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** if (k == 3U) 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read y[srcBLen - 5], y[srcBLen - 6] */ 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** c0 = read_q15x2 ((q15_t *) py); 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read x[7], x[8] */ 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px); 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read x[9] */ 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** x2 = read_q15x2 ((q15_t *) px + 1); 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Perform the multiply-accumulates */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc0 = __SMLADX(x0, c0, acc0); 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc1 = __SMLADX(x1, c0, acc1); 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc2 = __SMLADX(x3, c0, acc2); 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc3 = __SMLADX(x2, c0, acc3); 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read y[srcBLen - 7] */ 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** c0 = *(py-1); 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** c0 = c0 << 16U; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #else 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** c0 = c0 & 0x0000FFFF; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Read x[10] */ 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px + 2); 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px += 3U; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Perform the multiply-accumulates */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc0 = __SMLADX(x1, c0, acc0); 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc1 = __SMLAD(x2, c0, acc1); 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc2 = __SMLADX(x2, c0, acc2); 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** acc3 = __SMLADX(x3, c0, acc3); ARM GAS /tmp/ccJrAs6S.s page 250 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** write_q15x2_ia (&pOut, __PKHBT((acc0 >> 15), (acc1 >> 15), 16)); 3693 .loc 21 429 0 3694 0220 C5F3CF35 ubfx r5, r5, #15, #16 3695 .LVL585: 3696 0224 C013 asrs r0, r0, #15 3697 .LVL586: 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** write_q15x2_ia (&pOut, __PKHBT((acc2 >> 15), (acc3 >> 15), 16)); 3698 .loc 21 430 0 3699 0226 C7F3CF37 ubfx r7, r7, #15, #16 3700 .LVL587: 3701 022a DB13 asrs r3, r3, #15 3702 .LVL588: 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** write_q15x2_ia (&pOut, __PKHBT((acc2 >> 15), (acc3 >> 15), 16)); 3703 .loc 21 429 0 3704 022c 45EA0045 orr r5, r5, r0, lsl #16 3705 .loc 21 430 0 3706 0230 47EA0343 orr r3, r7, r3, lsl #16 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3707 .loc 21 274 0 3708 0234 BAF1010A subs r10, r10, #1 3709 .LVL589: 3710 .LBB1199: 3711 .LBB1200: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3712 .loc 3 969 0 3713 0238 C8F80050 str r5, [r8] @ unaligned 3714 .LVL590: 3715 .LBE1200: 3716 .LBE1199: 3717 .LBB1201: 3718 .LBB1202: 3719 023c C8F80430 str r3, [r8, #4] @ unaligned 3720 .LBE1202: 3721 .LBE1201: 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #else 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** write_q15x2_ia (&pOut, __PKHBT((acc1 >> 15), (acc0 >> 15), 16)); 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** write_q15x2_ia (&pOut, __PKHBT((acc3 >> 15), (acc2 >> 15), 16)); 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #endif /*#ifndef ARM_MATH_BIG_ENDIAN*/ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Increment the pointer pIn1 index, count by 4 */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** count += 4U; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pIn1 + count; 3722 .loc 21 440 0 3723 0240 09F10809 add r9, r9, #8 3724 0244 08F10808 add r8, r8, #8 3725 .LVL591: 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3726 .loc 21 274 0 3727 0248 A2D1 bne .L174 3728 024a 089B ldr r3, [sp, #32] 3729 024c 009A ldr r2, [sp] ARM GAS /tmp/ccJrAs6S.s page 251 3730 024e DDF82CA0 ldr r10, [sp, #44] 3731 0252 4FEAC30C lsl ip, r3, #3 3732 0256 6244 add r2, r2, ip 3733 0258 DDE9096B ldrd r6, fp, [sp, #36] 3734 025c 0092 str r2, [sp] 3735 025e 9A00 lsls r2, r3, #2 3736 0260 079B ldr r3, [sp, #28] 3737 0262 D444 add ip, ip, r10 3738 .LVL592: 3739 .L169: 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = pSrc2; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blkCnt--; 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** ** No loop unrolling is used. */ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blkCnt = blockSize2 % 0x4U; 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (blkCnt > 0U) 3740 .loc 21 451 0 3741 0264 13F00305 ands r5, r3, #3 3742 0268 00F00281 beq .L192 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Accumulator is made zero for every iteration */ 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = 0; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k = srcBLen >> 2U; 3743 .loc 21 457 0 3744 026c 0299 ldr r1, [sp, #8] 3745 026e CDF810B0 str fp, [sp, #16] 3746 0272 8808 lsrs r0, r1, #2 3747 0274 0132 adds r2, r2, #1 3748 .LVL593: 3749 0276 ABF10804 sub r4, fp, #8 3750 027a 00F10053 add r3, r0, #536870912 3751 027e 0AEB420E add lr, r10, r2, lsl #1 3752 0282 C0EB4078 rsb r8, r0, r0, lsl #29 3753 0286 009A ldr r2, [sp] 3754 .LVL594: 3755 0288 CDF814A0 str r10, [sp, #20] 3756 028c 013B subs r3, r3, #1 3757 028e CDE90246 strd r4, r6, [sp, #8] 3758 .LVL595: 3759 0292 0BEBC808 add r8, fp, r8, lsl #3 3760 0296 DB00 lsls r3, r3, #3 3761 0298 02EB4505 add r5, r2, r5, lsl #1 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (k > 0U) 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Perform the multiply-accumulates */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); ARM GAS /tmp/ccJrAs6S.s page 252 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k--; 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** ** No loop unrolling is used. */ 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k = srcBLen % 0x4U; 3762 .loc 21 475 0 3763 029c 01F00301 and r1, r1, #3 3764 02a0 08F10808 add r8, r8, #8 3765 02a4 9146 mov r9, r2 3766 02a6 9B46 mov fp, r3 3767 .LVL596: 3768 02a8 8246 mov r10, r0 3769 .LVL597: 3770 .L177: 3771 02aa 029C ldr r4, [sp, #8] 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3772 .loc 21 454 0 3773 02ac 0091 str r1, [sp] 3774 02ae 0CF10806 add r6, ip, #8 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3775 .loc 21 457 0 3776 02b2 5746 mov r7, r10 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3777 .loc 21 454 0 3778 02b4 0023 movs r3, #0 3779 .LVL598: 3780 .L175: 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 3781 .loc 21 464 0 3782 02b6 36F8082C ldrh r2, [r6, #-8] 3783 02ba 2089 ldrh r0, [r4, #8] 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 3784 .loc 21 465 0 3785 02bc E188 ldrh r1, [r4, #6] 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 3786 .loc 21 464 0 3787 02be 12FB0033 smlabb r3, r2, r0, r3 3788 .LVL599: 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 3789 .loc 21 465 0 3790 02c2 36F8062C ldrh r2, [r6, #-6] 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 3791 .loc 21 466 0 3792 02c6 A088 ldrh r0, [r4, #4] 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 3793 .loc 21 465 0 3794 02c8 12FB0133 smlabb r3, r2, r1, r3 3795 .LVL600: 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 3796 .loc 21 466 0 3797 02cc 36F8041C ldrh r1, [r6, #-4] 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 253 3798 .loc 21 467 0 3799 02d0 36F8022C ldrh r2, [r6, #-2] 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 3800 .loc 21 466 0 3801 02d4 11FB0033 smlabb r3, r1, r0, r3 3802 .LVL601: 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3803 .loc 21 467 0 3804 02d8 6188 ldrh r1, [r4, #2] 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3805 .loc 21 461 0 3806 02da 013F subs r7, r7, #1 3807 .LVL602: 3808 02dc 06F10806 add r6, r6, #8 3809 .LVL603: 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3810 .loc 21 467 0 3811 02e0 12FB0133 smlabb r3, r2, r1, r3 3812 .LVL604: 3813 02e4 A4F10804 sub r4, r4, #8 3814 .LVL605: 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3815 .loc 21 461 0 3816 02e8 E5D1 bne .L175 3817 02ea 0099 ldr r1, [sp] 3818 02ec DC44 add ip, ip, fp 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (k > 0U) 3819 .loc 21 477 0 3820 02ee A9B1 cbz r1, .L176 3821 .LVL606: 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Perform the multiply-accumulates */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 3822 .loc 21 480 0 3823 02f0 BCF80800 ldrh r0, [ip, #8] 3824 02f4 38F8082C ldrh r2, [r8, #-8] 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3825 .loc 21 477 0 3826 02f8 0129 cmp r1, #1 3827 .loc 21 480 0 3828 02fa 10FB0233 smlabb r3, r0, r2, r3 3829 .LVL607: 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3830 .loc 21 477 0 3831 02fe 0DD0 beq .L176 3832 .LVL608: 3833 .loc 21 480 0 3834 0300 BCF80A00 ldrh r0, [ip, #10] 3835 0304 38F80A2C ldrh r2, [r8, #-10] 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3836 .loc 21 477 0 3837 0308 0229 cmp r1, #2 3838 .loc 21 480 0 3839 030a 10FB0233 smlabb r3, r0, r2, r3 3840 .LVL609: 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 254 3841 .loc 21 477 0 3842 030e 05D0 beq .L176 3843 .LVL610: 3844 .loc 21 480 0 3845 0310 BCF80C00 ldrh r0, [ip, #12] 3846 0314 38F80C2C ldrh r2, [r8, #-12] 3847 0318 10FB0233 smlabb r3, r0, r2, r3 3848 .LVL611: 3849 .L176: 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k--; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** *pOut++ = (q15_t) (sum >> 15); 3850 .loc 21 487 0 3851 031c DB13 asrs r3, r3, #15 3852 .LVL612: 3853 031e 29F8023B strh r3, [r9], #2 @ movhi 3854 .LVL613: 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3855 .loc 21 451 0 3856 0322 A945 cmp r9, r5 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Increment the pointer pIn1 index, count by 1 */ 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** count++; 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pIn1 + count; 3857 .loc 21 493 0 3858 0324 F446 mov ip, lr 3859 .LVL614: 3860 0326 0EF1020E add lr, lr, #2 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3861 .loc 21 451 0 3862 032a BED1 bne .L177 3863 032c DDE9036B ldrd r6, fp, [sp, #12] 3864 0330 DDF814A0 ldr r10, [sp, #20] 3865 0334 079B ldr r3, [sp, #28] 3866 .LVL615: 3867 .L160: 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = pSrc2; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blkCnt--; 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** else 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* If the srcBLen is not a multiple of 4, 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * the blockSize2 loop cannot be unrolled by 4 */ 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blkCnt = blockSize2; 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (blkCnt > 0U) 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Accumulator is made zero for every iteration */ ARM GAS /tmp/ccJrAs6S.s page 255 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = 0; 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* srcBLen number of MACS should be performed */ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k = srcBLen; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (k > 0U) 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Perform the multiply-accumulate */ 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k--; 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** *pOut++ = (q15_t) (sum >> 15); 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Increment MAC count */ 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** count++; 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pIn1 + count; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = pSrc2; 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blkCnt--; 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* -------------------------- 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Initializations of stage3 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * -------------------------*/ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcAL 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcAL 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * .... 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * sum += x[srcALen-1] * y[srcBLen-1] 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** */ 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** The blockSize3 variable holds the number of MAC operations performed */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Working pointer of inputA */ 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pSrc1; 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Working pointer of inputB */ 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** pSrc2 = pIn2 + (srcBLen - 1U); 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** pIn2 = pSrc2 - 1U; 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = pIn2; 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* ------------------- 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * Stage3 process 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * ------------------*/ 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* For loop unrolling by 4, this stage is divided into two. */ ARM GAS /tmp/ccJrAs6S.s page 256 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* First part of this stage computes the MAC operations greater than 4 */ 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Second part of this stage computes the MAC operations less than or equal to 4 */ 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* The first part of the stage starts here */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** j = blockSize3 >> 2U; 3868 .loc 21 570 0 3869 0336 B408 lsrs r4, r6, #2 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pSrc1; 3870 .loc 21 553 0 3871 0338 0AEB430A add r10, r10, r3, lsl #1 3872 .LVL616: 3873 .loc 21 570 0 3874 033c 2746 mov r7, r4 3875 .LVL617: 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while ((j > 0U) && (blockSize3 > 0U)) 3876 .loc 21 572 0 3877 033e 002C cmp r4, #0 3878 0340 7ED0 beq .L193 3879 .LVL618: 3880 .L168: 3881 0342 F71B subs r7, r6, r7 3882 0344 DDF804E0 ldr lr, [sp, #4] 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Accumulator is made zero for every iteration */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = 0; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k = blockSize3 >> 2U; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (k > 0U) 3883 .loc 21 582 0 3884 0348 002C cmp r4, #0 3885 034a 3ED0 beq .L194 3886 .L236: 3887 034c 7046 mov r0, lr 3888 034e 5146 mov r1, r10 3889 0350 A446 mov ip, r4 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 3890 .loc 21 575 0 3891 0352 0023 movs r3, #0 3892 .LVL619: 3893 .L180: 3894 .LBB1203: 3895 .LBB1204: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3896 .loc 3 928 0 3897 0354 0A68 ldr r2, [r1] @ unaligned 3898 .LBE1204: 3899 .LBE1203: 3900 .LBB1205: 3901 .LBB1206: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3902 .loc 3 948 0 3903 0356 D0F80080 ldr r8, [r0] @ unaligned ARM GAS /tmp/ccJrAs6S.s page 257 3904 .LBE1206: 3905 .LBE1205: 3906 .LBB1207: 3907 .LBB1208: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3908 .loc 6 2001 0 3909 .syntax unified 3910 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3911 035a 22FB1833 smladx r3, r2, r8, r3 3912 @ 0 "" 2 3913 .LVL620: 3914 .thumb 3915 .syntax unified 3916 .LBE1208: 3917 .LBE1207: 3918 .LBB1209: 3919 .LBB1210: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3920 .loc 3 928 0 3921 035e 4A68 ldr r2, [r1, #4] @ unaligned 3922 .LVL621: 3923 .LBE1210: 3924 .LBE1209: 3925 .LBB1211: 3926 .LBB1212: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3927 .loc 3 948 0 3928 0360 50F8048C ldr r8, [r0, #-4] @ unaligned 3929 0364 0831 adds r1, r1, #8 3930 .LVL622: 3931 0366 0838 subs r0, r0, #8 3932 .LVL623: 3933 .LBE1212: 3934 .LBE1211: 3935 .LBB1213: 3936 .LBB1214: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3937 .loc 6 2001 0 3938 .syntax unified 3939 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3940 0368 22FB1833 smladx r3, r2, r8, r3 3941 @ 0 "" 2 3942 .LVL624: 3943 .thumb 3944 .syntax unified 3945 .LBE1214: 3946 .LBE1213: 3947 .loc 21 582 0 3948 036c BCF1010C subs ip, ip, #1 3949 .LVL625: 3950 0370 F0D1 bne .L180 3951 0372 C4EB4472 rsb r2, r4, r4, lsl #29 3952 0376 0EEBC202 add r2, lr, r2, lsl #3 3953 037a 0AEBC404 add r4, r10, r4, lsl #3 3954 .LVL626: 3955 .L179: 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 258 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * with y[srcBLen - 1], y[srcBLen - 2] respectively */ 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * with y[srcBLen - 3], y[srcBLen - 4] respectively */ 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k--; 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* For the next MAC operations, the pointer py is used without SIMD 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * So, py is incremented by 1 */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = py + 1U; 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** ** No loop unrolling is used. */ 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k = blockSize3 % 0x4U; 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (k > 0U) 3956 .loc 21 603 0 3957 037e 16F00300 ands r0, r6, #3 3958 .LVL627: 3959 0382 15D0 beq .L181 3960 .LVL628: 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = __SMLAD(*px++, *py--, sum); 3961 .loc 21 606 0 3962 0384 B4F90010 ldrsh r1, [r4] 3963 .LVL629: 3964 0388 B2F902C0 ldrsh ip, [r2, #2] 3965 .LVL630: 3966 .LBB1215: 3967 .LBB1216: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3968 .loc 6 1993 0 3969 .syntax unified 3970 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3971 038c 21FB0C33 smlad r3, r1, ip, r3 3972 @ 0 "" 2 3973 .LVL631: 3974 .thumb 3975 .syntax unified 3976 .LBE1216: 3977 .LBE1215: 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3978 .loc 21 603 0 3979 0390 0128 cmp r0, #1 3980 0392 0DD0 beq .L181 3981 .LVL632: 3982 .loc 21 606 0 3983 0394 B4F90210 ldrsh r1, [r4, #2] 3984 .LVL633: 3985 0398 B2F900C0 ldrsh ip, [r2] 3986 .LVL634: 3987 .LBB1219: ARM GAS /tmp/ccJrAs6S.s page 259 3988 .LBB1217: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3989 .loc 6 1993 0 3990 .syntax unified 3991 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3992 039c 21FB0C33 smlad r3, r1, ip, r3 3993 @ 0 "" 2 3994 .LVL635: 3995 .thumb 3996 .syntax unified 3997 .LBE1217: 3998 .LBE1219: 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 3999 .loc 21 603 0 4000 03a0 0228 cmp r0, #2 4001 03a2 05D0 beq .L181 4002 .LVL636: 4003 .loc 21 606 0 4004 03a4 B4F90410 ldrsh r1, [r4, #4] 4005 .LVL637: 4006 03a8 32F9022C ldrsh r2, [r2, #-2] 4007 .LVL638: 4008 .LBB1220: 4009 .LBB1218: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4010 .loc 6 1993 0 4011 .syntax unified 4012 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4013 03ac 21FB0233 smlad r3, r1, r2, r3 4014 @ 0 "" 2 4015 .LVL639: 4016 .thumb 4017 .syntax unified 4018 .L181: 4019 .LBE1218: 4020 .LBE1220: 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k--; 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** *pOut++ = (q15_t) (sum >> 15); 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = ++pSrc1; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = pIn2; 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blockSize3--; 4021 .loc 21 620 0 4022 03b0 013E subs r6, r6, #1 4023 .LVL640: 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4024 .loc 21 613 0 4025 03b2 DB13 asrs r3, r3, #15 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 260 4026 .loc 21 572 0 4027 03b4 BE42 cmp r6, r7 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4028 .loc 21 613 0 4029 03b6 25F8023B strh r3, [r5], #2 @ movhi 4030 .LVL641: 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = pIn2; 4031 .loc 21 616 0 4032 03ba 0AF1020A add r10, r10, #2 4033 .LVL642: 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4034 .loc 21 572 0 4035 03be 40D0 beq .L178 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4036 .loc 21 572 0 is_stmt 0 discriminator 1 4037 03c0 002E cmp r6, #0 4038 03c2 52D0 beq .L150 4039 03c4 B408 lsrs r4, r6, #2 4040 .LVL643: 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4041 .loc 21 582 0 is_stmt 1 4042 03c6 002C cmp r4, #0 4043 03c8 C0D1 bne .L236 4044 .L194: 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4045 .loc 21 575 0 4046 03ca 2346 mov r3, r4 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4047 .loc 21 582 0 4048 03cc 7246 mov r2, lr 4049 03ce 5446 mov r4, r10 4050 .LVL644: 4051 03d0 D5E7 b .L179 4052 .LVL645: 4053 .L152: 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = pSrc2; 4054 .loc 21 256 0 4055 03d2 07F1004B add fp, r7, #-2147483648 4056 03d6 0BF1FF3B add fp, fp, #-1 4057 03da 00EB4B0B add fp, r0, fp, lsl #1 4058 .LVL646: 4059 03de ABF10203 sub r3, fp, #2 4060 .LVL647: 4061 03e2 0092 str r2, [sp] 4062 03e4 0193 str r3, [sp, #4] 4063 .LVL648: 4064 .L189: 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4065 .loc 21 506 0 4066 03e6 079B ldr r3, [sp, #28] 4067 03e8 002B cmp r3, #0 4068 03ea 41D0 beq .L192 4069 03ec 029A ldr r2, [sp, #8] 4070 03ee 002A cmp r2, #0 4071 03f0 00F08380 beq .L161 4072 03f4 022A cmp r2, #2 4073 03f6 4FEA4307 lsl r7, r3, #1 ARM GAS /tmp/ccJrAs6S.s page 261 4074 03fa 00F08D80 beq .L162 4075 03fe 002E cmp r6, #0 4076 0400 69D0 beq .L163 4077 0402 0098 ldr r0, [sp] 4078 0404 D446 mov ip, r10 4079 0406 C519 adds r5, r0, r7 4080 .LVL649: 4081 .L164: 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4082 .loc 21 517 0 4083 0408 BCF90020 ldrsh r2, [ip] 4084 .LVL650: 4085 040c 3BF8023C ldrh r3, [fp, #-2] 4086 0410 3CF8021F ldrh r1, [ip, #2]! 4087 .LVL651: 4088 0414 BBF800E0 ldrh lr, [fp] 4089 0418 3BF8044C ldrh r4, [fp, #-4] 4090 041c 11FB03F1 smulbb r1, r1, r3 4091 0420 BCF80230 ldrh r3, [ip, #2] 4092 0424 12FB0E12 smlabb r2, r2, lr, r1 4093 .LVL652: 4094 0428 13FB0423 smlabb r3, r3, r4, r2 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4095 .loc 21 524 0 4096 042c DB13 asrs r3, r3, #15 4097 042e 20F8023B strh r3, [r0], #2 @ movhi 4098 .LVL653: 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4099 .loc 21 506 0 4100 0432 A842 cmp r0, r5 4101 0434 E8D1 bne .L164 4102 .LVL654: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4103 .loc 21 570 0 4104 0436 B408 lsrs r4, r6, #2 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pSrc1; 4105 .loc 21 553 0 4106 0438 BA44 add r10, r10, r7 4107 .LVL655: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4108 .loc 21 570 0 4109 043a 2746 mov r7, r4 4110 .LVL656: 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4111 .loc 21 572 0 4112 043c 002C cmp r4, #0 4113 043e 80D1 bne .L168 4114 .LVL657: 4115 .L193: 4116 0440 3746 mov r7, r6 4117 .LVL658: 4118 .L178: 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** j--; 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* The second part of the stage starts here */ ARM GAS /tmp/ccJrAs6S.s page 262 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* SIMD is not used for the next MAC operations, 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** * so pointer py is updated to read only one sample at a time */ 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = py + 1U; 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (blockSize3 > 0U) 4119 .loc 21 630 0 4120 0442 97B1 cbz r7, .L150 4121 .LVL659: 4122 .L185: 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4123 .loc 21 572 0 4124 0444 5846 mov r0, fp 4125 0446 5146 mov r1, r10 4126 0448 3B46 mov r3, r7 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Accumulator is made zero for every iteration */ 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = 0; 4127 .loc 21 633 0 4128 044a 0022 movs r2, #0 4129 .LVL660: 4130 .L188: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k = blockSize3; 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** while (k > 0U) 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Perform the multiply-accumulates */ 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* sum += x[srcALen-1] * y[srcBLen-1] */ 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** sum = __SMLAD(*px++, *py--, sum); 4131 .loc 21 642 0 4132 044c 31F9024B ldrsh r4, [r1], #2 4133 .LVL661: 4134 0450 30F90269 ldrsh r6, [r0], #-2 4135 .LVL662: 4136 .LBB1221: 4137 .LBB1222: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4138 .loc 6 1993 0 4139 .syntax unified 4140 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4141 0454 24FB0622 smlad r2, r4, r6, r2 4142 @ 0 "" 2 4143 .LVL663: 4144 .thumb 4145 .syntax unified 4146 .LBE1222: 4147 .LBE1221: 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4148 .loc 21 638 0 4149 0458 013B subs r3, r3, #1 4150 .LVL664: 4151 045a F7D1 bne .L188 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement loop counter */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** k--; 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } ARM GAS /tmp/ccJrAs6S.s page 263 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** *pOut++ = (q15_t) (sum >> 15); 4152 .loc 21 649 0 4153 045c D213 asrs r2, r2, #15 4154 .LVL665: 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4155 .loc 21 630 0 4156 045e 013F subs r7, r7, #1 4157 .LVL666: 4158 .loc 21 649 0 4159 0460 25F8022B strh r2, [r5], #2 @ movhi 4160 .LVL667: 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = ++pSrc1; 4161 .loc 21 652 0 4162 0464 0AF1020A add r10, r10, #2 4163 .LVL668: 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4164 .loc 21 630 0 4165 0468 ECD1 bne .L185 4166 .LVL669: 4167 .L150: 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** py = pSrc2; 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** /* Decrement the loop counter */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** blockSize3--; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** } 4168 .loc 21 659 0 4169 046a 0DB0 add sp, sp, #52 4170 .LCFI46: 4171 .cfi_remember_state 4172 .cfi_def_cfa_offset 36 4173 @ sp needed 4174 046c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 4175 .LVL670: 4176 .L192: 4177 .LCFI47: 4178 .cfi_restore_state 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4179 .loc 21 451 0 4180 0470 009D ldr r5, [sp] 4181 0472 60E7 b .L160 4182 .LVL671: 4183 .L235: 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4184 .loc 21 353 0 4185 0474 039A ldr r2, [sp, #12] 4186 0476 32F9062C ldrsh r2, [r2, #-6] 4187 .LVL672: 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 4188 .loc 21 358 0 4189 047a 92B2 uxth r2, r2 4190 .LVL673: ARM GAS /tmp/ccJrAs6S.s page 264 4191 .LBB1223: 4192 .LBB1224: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4193 .loc 6 1993 0 4194 .syntax unified 4195 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4196 047c 26FB0255 smlad r5, r6, r2, r5 4197 @ 0 "" 2 4198 .LVL674: 4199 .thumb 4200 .syntax unified 4201 .LBE1224: 4202 .LBE1223: 4203 .LBB1225: 4204 .LBB1226: 4205 .syntax unified 4206 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4207 0480 24FB0200 smlad r0, r4, r2, r0 4208 @ 0 "" 2 4209 .LVL675: 4210 .thumb 4211 .syntax unified 4212 .LBE1226: 4213 .LBE1225: 4214 .LBB1227: 4215 .LBB1228: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4216 .loc 6 2001 0 4217 .syntax unified 4218 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4219 0484 24FB1277 smladx r7, r4, r2, r7 4220 @ 0 "" 2 4221 .LVL676: 4222 .thumb 4223 .syntax unified 4224 .LBE1228: 4225 .LBE1227: 4226 .LBB1229: 4227 .LBB1230: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 4228 .loc 3 909 0 4229 0488 8968 ldr r1, [r1, #8] @ unaligned 4230 .LVL677: 4231 .LBE1230: 4232 .LBE1229: 4233 .LBB1231: 4234 .LBB1232: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4235 .loc 6 2001 0 4236 .syntax unified 4237 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4238 048a 21FB1233 smladx r3, r1, r2, r3 4239 @ 0 "" 2 4240 .LVL678: 4241 .thumb 4242 .syntax unified 4243 048e C7E6 b .L172 ARM GAS /tmp/ccJrAs6S.s page 265 4244 .LVL679: 4245 .L173: 4246 .LBE1232: 4247 .LBE1231: 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4248 .loc 21 391 0 4249 0490 BBF1030F cmp fp, #3 4250 0494 7FF4C4AE bne .L172 4251 .LVL680: 4252 .LBB1233: 4253 .LBB1234: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 4254 .loc 3 909 0 4255 0498 0399 ldr r1, [sp, #12] 4256 .LBE1234: 4257 .LBE1233: 4258 .LBB1236: 4259 .LBB1237: 4260 049a D2F802C0 ldr ip, [r2, #2] @ unaligned 4261 .LVL681: 4262 .LBE1237: 4263 .LBE1236: 4264 .LBB1238: 4265 .LBB1235: 4266 049e 51F8081C ldr r1, [r1, #-8] @ unaligned 4267 .LVL682: 4268 .LBE1235: 4269 .LBE1238: 4270 .LBB1239: 4271 .LBB1240: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4272 .loc 6 2001 0 4273 .syntax unified 4274 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4275 04a2 26FB1156 smladx r6, r6, r1, r5 4276 @ 0 "" 2 4277 .LVL683: 4278 .thumb 4279 .syntax unified 4280 .LBE1240: 4281 .LBE1239: 4282 .LBB1241: 4283 .LBB1242: 4284 .syntax unified 4285 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4286 04a6 24FB1100 smladx r0, r4, r1, r0 4287 @ 0 "" 2 4288 .LVL684: 4289 .thumb 4290 .syntax unified 4291 .LBE1242: 4292 .LBE1241: 4293 .LBB1243: 4294 .LBB1244: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 4295 .loc 3 909 0 4296 04aa 1568 ldr r5, [r2] @ unaligned ARM GAS /tmp/ccJrAs6S.s page 266 4297 .LBE1244: 4298 .LBE1243: 4299 .LBB1245: 4300 .LBB1246: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4301 .loc 6 2001 0 4302 .syntax unified 4303 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4304 04ac 25FB1177 smladx r7, r5, r1, r7 4305 @ 0 "" 2 4306 .LVL685: 4307 .thumb 4308 .syntax unified 4309 .LBE1246: 4310 .LBE1245: 4311 .LBB1247: 4312 .LBB1248: 4313 .syntax unified 4314 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4315 04b0 2CFB1133 smladx r3, ip, r1, r3 4316 @ 0 "" 2 4317 .LVL686: 4318 .thumb 4319 .syntax unified 4320 .LBE1248: 4321 .LBE1247: 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 4322 .loc 21 409 0 4323 04b4 0399 ldr r1, [sp, #12] 4324 04b6 31F90A1C ldrsh r1, [r1, #-10] 4325 .LVL687: 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 4326 .loc 21 413 0 4327 04ba 89B2 uxth r1, r1 4328 .LVL688: 4329 .LBB1249: 4330 .LBB1250: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4331 .loc 6 2001 0 4332 .syntax unified 4333 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4334 04bc 24FB1165 smladx r5, r4, r1, r6 4335 @ 0 "" 2 4336 .LVL689: 4337 .thumb 4338 .syntax unified 4339 .LBE1250: 4340 .LBE1249: 4341 .LBB1251: 4342 .LBB1252: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4343 .loc 6 1993 0 4344 .syntax unified 4345 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4346 04c0 2CFB0100 smlad r0, ip, r1, r0 4347 @ 0 "" 2 4348 .LVL690: ARM GAS /tmp/ccJrAs6S.s page 267 4349 .thumb 4350 .syntax unified 4351 .LBE1252: 4352 .LBE1251: 4353 .LBB1253: 4354 .LBB1254: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4355 .loc 6 2001 0 4356 .syntax unified 4357 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4358 04c4 2CFB1177 smladx r7, ip, r1, r7 4359 @ 0 "" 2 4360 .LVL691: 4361 .thumb 4362 .syntax unified 4363 .LBE1254: 4364 .LBE1253: 4365 .LBB1255: 4366 .LBB1256: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 4367 .loc 3 909 0 4368 04c8 5268 ldr r2, [r2, #4] @ unaligned 4369 .LVL692: 4370 .LBE1256: 4371 .LBE1255: 4372 .LBB1257: 4373 .LBB1258: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4374 .loc 6 2001 0 4375 .syntax unified 4376 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4377 04ca 22FB1133 smladx r3, r2, r1, r3 4378 @ 0 "" 2 4379 .LVL693: 4380 .thumb 4381 .syntax unified 4382 04ce A7E6 b .L172 4383 .LVL694: 4384 .L191: 4385 04d0 0A46 mov r2, r1 4386 .LBE1258: 4387 .LBE1257: 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4388 .loc 21 274 0 4389 04d2 D446 mov ip, r10 4390 04d4 C6E6 b .L169 4391 .LVL695: 4392 .L163: 4393 04d6 009D ldr r5, [sp] 4394 04d8 AAF10201 sub r1, r10, #2 4395 04dc E819 adds r0, r5, r7 4396 .LVL696: 4397 .L165: 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4398 .loc 21 517 0 4399 04de BBF80030 ldrh r3, [fp] 4400 04e2 31F8022F ldrh r2, [r1, #2]! ARM GAS /tmp/ccJrAs6S.s page 268 4401 .LVL697: 4402 04e6 13FB02F3 smulbb r3, r3, r2 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4403 .loc 21 524 0 4404 04ea DB13 asrs r3, r3, #15 4405 04ec 25F8023B strh r3, [r5], #2 @ movhi 4406 .LVL698: 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4407 .loc 21 506 0 4408 04f0 A842 cmp r0, r5 4409 04f2 F4D1 bne .L165 4410 .LVL699: 4411 .L166: 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pSrc1; 4412 .loc 21 553 0 4413 04f4 BA44 add r10, r10, r7 4414 .LVL700: 4415 04f6 3746 mov r7, r6 4416 04f8 A3E7 b .L178 4417 .LVL701: 4418 .L161: 4419 04fa 009D ldr r5, [sp] 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4420 .loc 21 524 0 4421 04fc 5C00 lsls r4, r3, #1 4422 04fe 1146 mov r1, r2 4423 0500 2846 mov r0, r5 4424 0502 2246 mov r2, r4 4425 0504 FFF7FEFF bl memset 4426 .LVL702: 4427 0508 2B46 mov r3, r5 4428 050a 2344 add r3, r3, r4 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** px = pSrc1; 4429 .loc 21 553 0 4430 050c A244 add r10, r10, r4 4431 .LVL703: 4432 050e 1D46 mov r5, r3 4433 .LVL704: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4434 .loc 21 570 0 4435 0510 6FF04047 mvn r7, #-1073741824 4436 0514 B408 lsrs r4, r6, #2 4437 0516 14E7 b .L168 4438 .LVL705: 4439 .L162: 4440 0518 009D ldr r5, [sp] 4441 051a D446 mov ip, r10 4442 051c EC19 adds r4, r5, r7 4443 .LVL706: 4444 .L167: 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4445 .loc 21 517 0 4446 051e BCF90000 ldrsh r0, [ip] 4447 .LVL707: 4448 0522 BBF80020 ldrh r2, [fp] 4449 0526 3BF8023C ldrh r3, [fp, #-2] 4450 052a 3CF8021F ldrh r1, [ip, #2]! ARM GAS /tmp/ccJrAs6S.s page 269 4451 .LVL708: 4452 052e 12FB00F2 smulbb r2, r2, r0 4453 0532 13FB0123 smlabb r3, r3, r1, r2 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** 4454 .loc 21 524 0 4455 0536 DB13 asrs r3, r3, #15 4456 0538 25F8023B strh r3, [r5], #2 @ movhi 4457 .LVL709: 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c **** { 4458 .loc 21 506 0 4459 053c AC42 cmp r4, r5 4460 053e EED1 bne .L167 4461 0540 D8E7 b .L166 4462 .cfi_endproc 4463 .LFE166: 4465 0542 00BF .section .text.arm_conv_fast_q31,"ax",%progbits 4466 .align 1 4467 .p2align 2,,3 4468 .global arm_conv_fast_q31 4469 .syntax unified 4470 .thumb 4471 .thumb_func 4472 .fpu fpv4-sp-d16 4474 arm_conv_fast_q31: 4475 .LFB167: 4476 .file 22 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Title: arm_conv_fast_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Description: Fast Q31 Convolution 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /** ARM GAS /tmp/ccJrAs6S.s page 270 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @addtogroup Conv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @brief Convolution of Q31 sequences (fast version). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @param[in] pSrcA points to the first input sequence. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @param[in] srcALen length of the first input sequence. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @param[in] pSrcB points to the second input sequence. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @param[in] srcBLen length of the second input sequence. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @param[out] pDst points to the location where the output result is written. Length srcA 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** This function is optimized for speed at the expense of fixed-point precision and 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** These intermediate results are accumulated in a 32-bit register in 2.30 format. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** Finally, the accumulator is saturated and converted to a 1.31 result. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @par 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** The fast version has the same overflow behavior as the standard version but prov 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** In order to avoid overflows completely the input signals must be scaled down. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** as maximum of min(srcALen, srcBLen) number of additions are carried internally. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** @remark 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** Refer to \ref arm_conv_q31() for a slower implementation of this function which 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** void arm_conv_fast_q31( 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** const q31_t * pSrcA, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** uint32_t srcALen, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** const q31_t * pSrcB, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** uint32_t srcBLen, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** q31_t * pDst) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 4477 .loc 22 69 0 4478 .cfi_startproc 4479 @ args = 4, pretend = 0, frame = 104 4480 @ frame_needed = 0, uses_anonymous_args = 0 4481 .LVL710: 4482 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 4483 .LCFI48: 4484 .cfi_def_cfa_offset 36 4485 .cfi_offset 4, -36 4486 .cfi_offset 5, -32 4487 .cfi_offset 6, -28 4488 .cfi_offset 7, -24 4489 .cfi_offset 8, -20 4490 .cfi_offset 9, -16 4491 .cfi_offset 10, -12 4492 .cfi_offset 11, -8 4493 .cfi_offset 14, -4 4494 0004 9BB0 sub sp, sp, #108 4495 .LCFI49: ARM GAS /tmp/ccJrAs6S.s page 271 4496 .cfi_def_cfa_offset 144 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** const q31_t *pIn1; /* InputA pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** const q31_t *pIn2; /* InputB pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** q31_t *pOut = pDst; /* Output pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** const q31_t *px; /* Intermediate inputA pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** const q31_t *py; /* Intermediate inputB pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coe 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** uint32_t j, k, count, blkCnt; /* Loop counters */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* srcB is always made to slide across srcA. */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** if (srcALen >= srcBLen) 4497 .loc 22 84 0 4498 0006 9942 cmp r1, r3 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** const q31_t *pIn1; /* InputA pointer */ 4499 .loc 22 69 0 4500 0008 1191 str r1, [sp, #68] 4501 000a 8246 mov r10, r0 4502 .LVL711: 4503 000c 1292 str r2, [sp, #72] 4504 .loc 22 84 0 4505 000e 08D3 bcc .L238 4506 0010 0846 mov r0, r1 4507 .LVL712: 4508 0012 1146 mov r1, r2 4509 .LVL713: 4510 0014 1A46 mov r2, r3 4511 .LVL714: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Initialization of inputA pointer */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** pIn1 = pSrcA; 4512 .loc 22 87 0 4513 0016 CDF848A0 str r10, [sp, #72] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 4514 .loc 22 84 0 4515 001a 0346 mov r3, r0 4516 .LVL715: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Initialization of inputB pointer */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** pIn2 = pSrcB; 4517 .loc 22 90 0 4518 001c 8A46 mov r10, r1 4519 .LVL716: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 4520 .loc 22 84 0 4521 001e 1192 str r2, [sp, #68] 4522 0020 1146 mov r1, r2 4523 .LVL717: 4524 .L238: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** else 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Initialization of inputA pointer */ ARM GAS /tmp/ccJrAs6S.s page 272 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** pIn1 = pSrcB; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Initialization of inputB pointer */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** pIn2 = pSrcA; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** j = srcBLen; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** srcBLen = srcALen; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** srcALen = j; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* The function is internally 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * divided into three stages according to the number of multiplications that has to be 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * taken place between inputA samples and inputB samples. In the first stage of the 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * algorithm, the multiplications increase by one for every iteration. 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * In the third stage of the algorithm, the multiplications decrease by one 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * for every iteration. */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* The algorithm is implemented in three stages. 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** The loop counters of each stage is initiated here. */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** blockSize1 = srcBLen - 1U; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** blockSize2 = srcALen - (srcBLen - 1U); 4525 .loc 22 118 0 4526 0022 03F10108 add r8, r3, #1 4527 0026 A8EB0103 sub r3, r8, r1 4528 .LVL718: 4529 002a 1593 str r3, [sp, #84] 4530 .LVL719: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** blockSize3 = blockSize1; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* -------------------------- 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Initializations of stage1 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * -------------------------*/ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* sum = x[0] * y[0] 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * sum = x[0] * y[1] + x[1] * y[0] 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * .... 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** The count variable holds the number of MAC operations performed */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** count = 1U; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Working pointer of inputA */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** px = pIn1; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Working pointer of inputB */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** py = pIn2; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* ------------------------ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Stage1 process 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * ----------------------*/ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 273 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* The first stage starts here */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (blockSize1 > 0U) 4531 .loc 22 147 0 4532 002c 4B1E subs r3, r1, #1 4533 .LVL720: 4534 002e 1793 str r3, [sp, #92] 4535 0030 00F0B382 beq .L239 4536 0034 1298 ldr r0, [sp, #72] 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** const q31_t *px; /* Intermediate inputA pointer */ 4537 .loc 22 72 0 4538 0036 DDF89090 ldr r9, [sp, #144] 4539 003a CDF808A0 str r10, [sp, #8] 4540 003e 0AF10408 add r8, r10, #4 4541 .LVL721: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4542 .loc 22 139 0 4543 0042 5246 mov r2, r10 4544 .loc 22 147 0 4545 0044 8646 mov lr, r0 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4546 .loc 22 133 0 4547 0046 0123 movs r3, #1 4548 .LVL722: 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Accumulator is made zero for every iteration */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = 0; 4549 .loc 22 150 0 4550 0048 0024 movs r4, #0 4551 004a 8B46 mov fp, r1 4552 004c 8246 mov r10, r0 4553 .LVL723: 4554 .L240: 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k = count >> 2U; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (k > 0U) 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* x[0] * y[srcBLen - 1] */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* x[1] * y[srcBLen - 2] */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* x[2] * y[srcBLen - 3] */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* x[3] * y[srcBLen - 4] */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ ARM GAS /tmp/ccJrAs6S.s page 274 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k--; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ** No loop unrolling is used. */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k = count % 0x4U; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (k > 0U) 4555 .loc 22 183 0 4556 004e 13F00306 ands r6, r3, #3 4557 .LVL724: 4558 0052 1AD0 beq .L243 4559 .LVL725: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Perform the multiply-accumulate */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 4560 .loc 22 186 0 4561 0054 2146 mov r1, r4 4562 0056 DEF80050 ldr r5, [lr] 4563 005a 1468 ldr r4, [r2] 4564 .LVL726: 4565 005c 0020 movs r0, #0 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 4566 .loc 22 183 0 4567 005e 012E cmp r6, #1 4568 .loc 22 186 0 4569 0060 C4FB0501 smlal r0, r1, r4, r5 4570 .LVL727: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 4571 .loc 22 183 0 4572 0064 10D0 beq .L308 4573 .LVL728: 4574 .loc 22 186 0 4575 0066 52F8044C ldr r4, [r2, #-4] 4576 006a DEF80450 ldr r5, [lr, #4] 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 4577 .loc 22 183 0 4578 006e 022E cmp r6, #2 4579 .loc 22 186 0 4580 0070 4FF00000 mov r0, #0 4581 0074 C4FB0501 smlal r0, r1, r4, r5 4582 .LVL729: 4583 0078 1FBF itttt ne 4584 007a 52F8082C ldrne r2, [r2, #-8] 4585 .LVL730: 4586 007e DEF80840 ldrne r4, [lr, #8] 4587 0082 0020 movne r0, #0 4588 0084 C2FB0401 smlalne r0, r1, r2, r4 4589 .LVL731: 4590 .L308: 4591 0088 0C46 mov r4, r1 4592 .LVL732: 4593 .L243: 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k--; ARM GAS /tmp/ccJrAs6S.s page 275 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = sum << 1; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** py = pIn2 + count; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** px = pIn1; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Increment MAC count */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** count++; 4594 .loc 22 201 0 4595 008a 5F1C adds r7, r3, #1 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4596 .loc 22 194 0 4597 008c 6400 lsls r4, r4, #1 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 4598 .loc 22 147 0 4599 008e BB45 cmp fp, r7 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4600 .loc 22 194 0 4601 0090 49F8044B str r4, [r9], #4 4602 .LVL733: 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** px = pIn1; 4603 .loc 22 197 0 4604 0094 4246 mov r2, r8 4605 .LVL734: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 4606 .loc 22 147 0 4607 0096 36D0 beq .L310 4608 .LVL735: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 4609 .loc 22 157 0 4610 0098 5FEA970C lsrs ip, r7, #2 4611 .LVL736: 4612 009c 00F00E83 beq .L277 4613 00a0 0AF11001 add r1, r10, #16 4614 00a4 4FEA0C1E lsl lr, ip, #4 4615 00a8 01EB0E06 add r6, r1, lr 4616 00ac A8F11000 sub r0, r8, #16 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4617 .loc 22 150 0 4618 00b0 0024 movs r4, #0 4619 00b2 0097 str r7, [sp] 4620 .LVL737: 4621 .L242: 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 4622 .loc 22 160 0 4623 00b4 51F8105C ldr r5, [r1, #-16] 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 4624 .loc 22 168 0 4625 00b8 51F8087C ldr r7, [r1, #-8] 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 4626 .loc 22 160 0 4627 00bc 2346 mov r3, r4 4628 00be 0469 ldr r4, [r0, #16] 4629 .LVL738: ARM GAS /tmp/ccJrAs6S.s page 276 4630 00c0 0022 movs r2, #0 4631 00c2 C4FB0523 smlal r2, r3, r4, r5 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 4632 .loc 22 164 0 4633 00c6 51F80C5C ldr r5, [r1, #-12] 4634 00ca C468 ldr r4, [r0, #12] 4635 00cc 0022 movs r2, #0 4636 00ce C4FB0523 smlal r2, r3, r4, r5 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 4637 .loc 22 168 0 4638 00d2 8468 ldr r4, [r0, #8] 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 4639 .loc 22 172 0 4640 00d4 51F8045C ldr r5, [r1, #-4] 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 4641 .loc 22 168 0 4642 00d8 0022 movs r2, #0 4643 00da C4FB0723 smlal r2, r3, r4, r7 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 4644 .loc 22 172 0 4645 00de 4468 ldr r4, [r0, #4] 4646 00e0 0022 movs r2, #0 4647 00e2 1031 adds r1, r1, #16 4648 .LVL739: 4649 00e4 C4FB0523 smlal r2, r3, r4, r5 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 4650 .loc 22 157 0 4651 00e8 8E42 cmp r6, r1 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 4652 .loc 22 172 0 4653 00ea 1C46 mov r4, r3 4654 .LVL740: 4655 00ec A0F11000 sub r0, r0, #16 4656 .LVL741: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 4657 .loc 22 157 0 4658 00f0 E0D1 bne .L242 4659 00f2 CCEB0C7C rsb ip, ip, ip, lsl #28 4660 00f6 009F ldr r7, [sp] 4661 00f8 08EB0C12 add r2, r8, ip, lsl #4 4662 00fc D644 add lr, lr, r10 4663 .LVL742: 4664 .L241: 4665 00fe 08F10408 add r8, r8, #4 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4666 .loc 22 150 0 4667 0102 3B46 mov r3, r7 4668 0104 A3E7 b .L240 4669 .LVL743: 4670 .L310: 4671 0106 249A ldr r2, [sp, #144] 4672 .LVL744: 4673 0108 DDF808A0 ldr r10, [sp, #8] 4674 .LVL745: 4675 010c 9B00 lsls r3, r3, #2 4676 010e 1A44 add r2, r2, r3 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 277 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** blockSize1--; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* -------------------------- 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Initializations of stage2 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * ------------------------*/ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * .... 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Working pointer of inputA */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** px = pIn1; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Working pointer of inputB */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** pSrc2 = pIn2 + (srcBLen - 1U); 4677 .loc 22 221 0 4678 0110 5344 add r3, r10, r3 4679 0112 1693 str r3, [sp, #88] 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** py = pSrc2; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* count is index by which the pointer pIn1 to be incremented */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** count = 0U; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* ------------------- 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Stage2 process 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * ------------------*/ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * So, to loop unroll over blockSize2, 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * srcBLen should be greater than or equal to 4 */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** if (srcBLen >= 4U) 4680 .loc 22 234 0 4681 0114 119B ldr r3, [sp, #68] 4682 0116 2492 str r2, [sp, #144] 4683 .LVL746: 4684 0118 032B cmp r3, #3 4685 011a 40F24482 bls .L276 4686 .LVL747: 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Loop unroll over blockSize2, by 4 */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** blkCnt = blockSize2 >> 2U; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (blkCnt > 0U) 4687 .loc 22 239 0 4688 011e 159B ldr r3, [sp, #84] 4689 0120 9A08 lsrs r2, r3, #2 4690 .LVL748: 4691 0122 1892 str r2, [sp, #96] 4692 0124 00F08A82 beq .L279 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Set all accumulators to zero */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc0 = 0; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc1 = 0; ARM GAS /tmp/ccJrAs6S.s page 278 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc2 = 0; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc3 = 0; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* read x[0], x[1], x[2] samples */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x0 = *px++; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x1 = *px++; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x2 = *px++; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k = srcBLen >> 2U; 4693 .loc 22 253 0 4694 0128 1198 ldr r0, [sp, #68] 4695 012a 169C ldr r4, [sp, #88] 4696 012c 8108 lsrs r1, r0, #2 4697 012e C1EB0173 rsb r3, r1, r1, lsl #28 4698 0132 04EB0313 add r3, r4, r3, lsl #4 4699 0136 1033 adds r3, r3, #16 4700 0138 1201 lsls r2, r2, #4 4701 .LVL749: 4702 013a 0F93 str r3, [sp, #60] 4703 013c 249B ldr r3, [sp, #144] 4704 013e 1992 str r2, [sp, #100] 4705 0140 1032 adds r2, r2, #16 4706 0142 1344 add r3, r3, r2 4707 0144 1493 str r3, [sp, #80] 4708 0146 129B ldr r3, [sp, #72] 4709 0148 1391 str r1, [sp, #76] 4710 014a 03EB0112 add r2, r3, r1, lsl #4 4711 014e 0B92 str r2, [sp, #44] 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** do 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read y[srcBLen - 1] sample */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** c0 = *py--; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[3] sample */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x3 = *px++; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Perform the multiply-accumulate */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc0 += x[0] * y[srcBLen - 1] */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[1] * y[srcBLen - 1] */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[2] * y[srcBLen - 1] */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[3] * y[srcBLen - 1] */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read y[srcBLen - 2] sample */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** c0 = *py--; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[4] sample */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x0 = *px++; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Perform the multiply-accumulate */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc0 += x[1] * y[srcBLen - 2] */ ARM GAS /tmp/ccJrAs6S.s page 279 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32); 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[2] * y[srcBLen - 2] */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[3] * y[srcBLen - 2] */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32); 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[4] * y[srcBLen - 2] */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read y[srcBLen - 3] sample */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** c0 = *py--; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[5] sample */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x1 = *px++; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Perform the multiply-accumulates */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc0 += x[2] * y[srcBLen - 3] */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32); 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[3] * y[srcBLen - 3] */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[4] * y[srcBLen - 3] */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32); 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[5] * y[srcBLen - 3] */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32); 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read y[srcBLen - 4] sample */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** c0 = *py--; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[6] sample */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x2 = *px++; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Perform the multiply-accumulates */ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc0 += x[3] * y[srcBLen - 4] */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[4] * y[srcBLen - 4] */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32); 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[5] * y[srcBLen - 4] */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[6] * y[srcBLen - 4] */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32); 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } while (--k); 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ** No loop unrolling is used. */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k = srcBLen % 0x4U; 4712 .loc 22 327 0 4713 0150 00F00302 and r2, r0, #3 4714 0154 0D92 str r2, [sp, #52] 4715 0156 249A ldr r2, [sp, #144] 4716 0158 0C33 adds r3, r3, #12 4717 015a 1032 adds r2, r2, #16 4718 015c 0C93 str r3, [sp, #48] 4719 015e A4F11003 sub r3, r4, #16 4720 0162 0E92 str r2, [sp, #56] 4721 0164 1093 str r3, [sp, #64] 4722 .LVL750: ARM GAS /tmp/ccJrAs6S.s page 280 4723 .L263: 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x1 = *px++; 4724 .loc 22 248 0 4725 0166 0C9B ldr r3, [sp, #48] 4726 0168 DDF840E0 ldr lr, [sp, #64] 4727 016c 53F80C2C ldr r2, [r3, #-12] 4728 0170 0292 str r2, [sp, #8] 4729 .LVL751: 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x2 = *px++; 4730 .loc 22 249 0 4731 0172 53F8082C ldr r2, [r3, #-8] 4732 .LVL752: 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4733 .loc 22 250 0 4734 0176 D3F800A0 ldr r10, [r3] 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x2 = *px++; 4735 .loc 22 249 0 4736 017a 0892 str r2, [sp, #32] 4737 .LVL753: 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4738 .loc 22 245 0 4739 017c 4FF0000C mov ip, #0 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4740 .loc 22 250 0 4741 0180 53F8042C ldr r2, [r3, #-4] 4742 .LVL754: 4743 0184 0092 str r2, [sp] 4744 .LVL755: 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc2 = 0; 4745 .loc 22 243 0 4746 0186 6146 mov r1, ip 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4747 .loc 22 250 0 4748 0188 1A46 mov r2, r3 4749 .LVL756: 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4750 .loc 22 253 0 4751 018a 139B ldr r3, [sp, #76] 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc3 = 0; 4752 .loc 22 244 0 4753 018c CDF818C0 str ip, [sp, #24] 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4754 .loc 22 253 0 4755 0190 5646 mov r6, r10 4756 0192 E346 mov fp, ip 4757 0194 E246 mov r10, ip 4758 0196 0993 str r3, [sp, #36] 4759 0198 0F46 mov r7, r1 4760 019a 9446 mov ip, r2 4761 019c 03E0 b .L259 4762 .LVL757: 4763 .L311: 4764 019e 6346 mov r3, ip 4765 01a0 0CF1100C add ip, ip, #16 4766 .LVL758: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4767 .loc 22 310 0 ARM GAS /tmp/ccJrAs6S.s page 281 4768 01a4 1E69 ldr r6, [r3, #16] 4769 .LVL759: 4770 .L259: 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[2] * y[srcBLen - 1] */ 4771 .loc 22 268 0 discriminator 1 4772 01a6 CDF814A0 str r10, [sp, #20] 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[1] * y[srcBLen - 1] */ 4773 .loc 22 266 0 discriminator 1 4774 01aa 0024 movs r4, #0 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[2] * y[srcBLen - 1] */ 4775 .loc 22 268 0 discriminator 1 4776 01ac 0494 str r4, [sp, #16] 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[4] sample */ 4777 .loc 22 276 0 discriminator 1 4778 01ae DEE90323 ldrd r2, r3, [lr, #12] 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4779 .loc 22 272 0 discriminator 1 4780 01b2 5946 mov r1, fp 4781 .LVL760: 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[2] * y[srcBLen - 1] */ 4782 .loc 22 268 0 discriminator 1 4783 01b4 DDE904AB ldrd r10, [sp, #16] 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[1] * y[srcBLen - 1] */ 4784 .loc 22 266 0 discriminator 1 4785 01b8 3D46 mov r5, r7 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[2] * y[srcBLen - 1] */ 4786 .loc 22 268 0 discriminator 1 4787 01ba 089F ldr r7, [sp, #32] 4788 .LVL761: 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[3] * y[srcBLen - 1] */ 4789 .loc 22 270 0 discriminator 1 4790 01bc DDF81890 ldr r9, [sp, #24] 4791 .LVL762: 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[2] * y[srcBLen - 1] */ 4792 .loc 22 268 0 discriminator 1 4793 01c0 C7FB03AB smlal r10, fp, r7, r3 4794 .LVL763: 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[1] * y[srcBLen - 1] */ 4795 .loc 22 266 0 discriminator 1 4796 01c4 029F ldr r7, [sp, #8] 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[3] * y[srcBLen - 1] */ 4797 .loc 22 270 0 discriminator 1 4798 01c6 A046 mov r8, r4 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4799 .loc 22 272 0 discriminator 1 4800 01c8 2046 mov r0, r4 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[1] * y[srcBLen - 1] */ 4801 .loc 22 266 0 discriminator 1 4802 01ca C3FB0745 smlal r4, r5, r3, r7 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[3] * y[srcBLen - 1] */ 4803 .loc 22 270 0 discriminator 1 4804 01ce 009F ldr r7, [sp] 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4805 .loc 22 272 0 discriminator 1 4806 01d0 C6FB0301 smlal r0, r1, r6, r3 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[3] * y[srcBLen - 1] */ 4807 .loc 22 270 0 discriminator 1 ARM GAS /tmp/ccJrAs6S.s page 282 4808 01d4 C7FB0389 smlal r8, r9, r7, r3 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[2] * y[srcBLen - 1] */ 4809 .loc 22 268 0 discriminator 1 4810 01d8 CDE906AB strd r10, [sp, #24] 4811 .LVL764: 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4812 .loc 22 278 0 discriminator 1 4813 01dc DCF80430 ldr r3, [ip, #4] 4814 .LVL765: 4815 01e0 0293 str r3, [sp, #8] 4816 .LVL766: 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4817 .loc 22 272 0 discriminator 1 4818 01e2 CDE90001 strd r0, [sp] 4819 .LVL767: 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[3] * y[srcBLen - 2] */ 4820 .loc 22 284 0 discriminator 1 4821 01e6 DDE906AB ldrd r10, [sp, #24] 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[6] sample */ 4822 .loc 22 308 0 discriminator 1 4823 01ea DEE90103 ldrd r0, r3, [lr, #4] 4824 .LVL768: 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[1] * y[srcBLen - 1] */ 4825 .loc 22 266 0 discriminator 1 4826 01ee CDE90445 strd r4, [sp, #16] 4827 .LVL769: 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[2] * y[srcBLen - 2] */ 4828 .loc 22 282 0 discriminator 1 4829 01f2 DDE90445 ldrd r4, [sp, #16] 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[3] * y[srcBLen - 2] */ 4830 .loc 22 284 0 discriminator 1 4831 01f6 4FF0000A mov r10, #0 4832 .LVL770: 4833 01fa C2FB07AB smlal r10, fp, r2, r7 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[6] sample */ 4834 .loc 22 308 0 discriminator 1 4835 01fe 0A90 str r0, [sp, #40] 4836 .LVL771: 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4837 .loc 22 288 0 discriminator 1 4838 0200 DDE90001 ldrd r0, [sp] 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[3] * y[srcBLen - 2] */ 4839 .loc 22 284 0 discriminator 1 4840 0204 0097 str r7, [sp] 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[2] * y[srcBLen - 2] */ 4841 .loc 22 282 0 discriminator 1 4842 0206 089F ldr r7, [sp, #32] 4843 .LVL772: 4844 0208 0024 movs r4, #0 4845 020a C2FB0745 smlal r4, r5, r2, r7 4846 020e CDE90445 strd r4, [sp, #16] 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[4] * y[srcBLen - 2] */ 4847 .loc 22 286 0 discriminator 1 4848 0212 4FF00008 mov r8, #0 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4849 .loc 22 288 0 discriminator 1 4850 0216 029C ldr r4, [sp, #8] ARM GAS /tmp/ccJrAs6S.s page 283 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[4] * y[srcBLen - 2] */ 4851 .loc 22 286 0 discriminator 1 4852 0218 4746 mov r7, r8 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4853 .loc 22 288 0 discriminator 1 4854 021a 0020 movs r0, #0 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[4] * y[srcBLen - 2] */ 4855 .loc 22 286 0 discriminator 1 4856 021c C846 mov r8, r9 4857 021e C2FB0678 smlal r7, r8, r2, r6 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4858 .loc 22 288 0 discriminator 1 4859 0222 C4FB0201 smlal r0, r1, r4, r2 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[5] * y[srcBLen - 3] */ 4860 .loc 22 302 0 discriminator 1 4861 0226 0027 movs r7, #0 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[3] * y[srcBLen - 3] */ 4862 .loc 22 298 0 discriminator 1 4863 0228 DDE90445 ldrd r4, [sp, #16] 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[5] * y[srcBLen - 3] */ 4864 .loc 22 302 0 discriminator 1 4865 022c C146 mov r9, r8 4866 022e B846 mov r8, r7 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[3] * y[srcBLen - 3] */ 4867 .loc 22 298 0 discriminator 1 4868 0230 009F ldr r7, [sp] 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4869 .loc 22 294 0 discriminator 1 4870 0232 DCF80820 ldr r2, [ip, #8] 4871 0236 0892 str r2, [sp, #32] 4872 .LVL773: 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[3] * y[srcBLen - 2] */ 4873 .loc 22 284 0 discriminator 1 4874 0238 CDE906AB strd r10, [sp, #24] 4875 .LVL774: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[3] * y[srcBLen - 3] */ 4876 .loc 22 298 0 discriminator 1 4877 023c 0024 movs r4, #0 4878 023e C3FB0745 smlal r4, r5, r3, r7 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[4] * y[srcBLen - 3] */ 4879 .loc 22 300 0 discriminator 1 4880 0242 DDE906AB ldrd r10, [sp, #24] 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[3] * y[srcBLen - 3] */ 4881 .loc 22 298 0 discriminator 1 4882 0246 CDE90445 strd r4, [sp, #16] 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[5] * y[srcBLen - 3] */ 4883 .loc 22 302 0 discriminator 1 4884 024a 029A ldr r2, [sp, #8] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4885 .loc 22 304 0 discriminator 1 4886 024c 089F ldr r7, [sp, #32] 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[4] * y[srcBLen - 3] */ 4887 .loc 22 300 0 discriminator 1 4888 024e 4FF0000A mov r10, #0 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4889 .loc 22 304 0 discriminator 1 4890 0252 0020 movs r0, #0 ARM GAS /tmp/ccJrAs6S.s page 284 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[4] * y[srcBLen - 3] */ 4891 .loc 22 300 0 discriminator 1 4892 0254 C3FB06AB smlal r10, fp, r3, r6 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4893 .loc 22 304 0 discriminator 1 4894 0258 C7FB0301 smlal r0, r1, r7, r3 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[5] * y[srcBLen - 3] */ 4895 .loc 22 302 0 discriminator 1 4896 025c C3FB0289 smlal r8, r9, r3, r2 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4897 .loc 22 310 0 discriminator 1 4898 0260 DCF80C30 ldr r3, [ip, #12] 4899 0264 0093 str r3, [sp] 4900 .LVL775: 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[4] * y[srcBLen - 4] */ 4901 .loc 22 314 0 discriminator 1 4902 0266 DDE90423 ldrd r2, [sp, #16] 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[5] * y[srcBLen - 4] */ 4903 .loc 22 316 0 discriminator 1 4904 026a 5D46 mov r5, fp 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4905 .loc 22 320 0 discriminator 1 4906 026c 8B46 mov fp, r1 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[4] * y[srcBLen - 4] */ 4907 .loc 22 314 0 discriminator 1 4908 026e 0A99 ldr r1, [sp, #40] 4909 0270 CDF810C0 str ip, [sp, #16] 4910 0274 0022 movs r2, #0 4911 0276 C1FB0623 smlal r2, r3, r1, r6 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[5] * y[srcBLen - 4] */ 4912 .loc 22 316 0 discriminator 1 4913 027a 029E ldr r6, [sp, #8] 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4914 .loc 22 320 0 discriminator 1 4915 027c 0020 movs r0, #0 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[5] * y[srcBLen - 4] */ 4916 .loc 22 316 0 discriminator 1 4917 027e 0024 movs r4, #0 4918 0280 C1FB0645 smlal r4, r5, r1, r6 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4919 .loc 22 320 0 discriminator 1 4920 0284 8246 mov r10, r0 4921 0286 009E ldr r6, [sp] 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[6] * y[srcBLen - 4] */ 4922 .loc 22 318 0 discriminator 1 4923 0288 4FF00008 mov r8, #0 4924 028c C1FB0789 smlal r8, r9, r1, r7 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4925 .loc 22 320 0 discriminator 1 4926 0290 5046 mov r0, r10 4927 0292 0F46 mov r7, r1 4928 0294 5946 mov r1, fp 4929 0296 C6FB0701 smlal r0, r1, r6, r7 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4930 .loc 22 323 0 discriminator 1 4931 029a 099E ldr r6, [sp, #36] 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[6] * y[srcBLen - 4] */ ARM GAS /tmp/ccJrAs6S.s page 285 4932 .loc 22 318 0 discriminator 1 4933 029c CDF81890 str r9, [sp, #24] 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4934 .loc 22 323 0 discriminator 1 4935 02a0 013E subs r6, r6, #1 4936 02a2 AEF1100E sub lr, lr, #16 4937 .LVL776: 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[5] * y[srcBLen - 4] */ 4938 .loc 22 316 0 discriminator 1 4939 02a6 AA46 mov r10, r5 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4940 .loc 22 320 0 discriminator 1 4941 02a8 8B46 mov fp, r1 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[4] * y[srcBLen - 4] */ 4942 .loc 22 314 0 discriminator 1 4943 02aa 1F46 mov r7, r3 4944 .LVL777: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 4945 .loc 22 323 0 discriminator 1 4946 02ac 0996 str r6, [sp, #36] 4947 02ae 7FF476AF bne .L311 4948 .LVL778: 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (k > 0U) 4949 .loc 22 329 0 4950 02b2 0D9E ldr r6, [sp, #52] 4951 02b4 CDE90401 strd r0, [sp, #16] 4952 02b8 8C46 mov ip, r1 4953 .LVL779: 4954 02ba 1846 mov r0, r3 4955 02bc 2946 mov r1, r5 4956 02be 002E cmp r6, #0 4957 02c0 62D0 beq .L260 4958 .LVL780: 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read y[srcBLen - 5] sample */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** c0 = *py--; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[7] sample */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x3 = *px++; 4959 .loc 22 334 0 4960 02c2 0B98 ldr r0, [sp, #44] 4961 .LVL781: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[7] sample */ 4962 .loc 22 332 0 4963 02c4 0F9A ldr r2, [sp, #60] 4964 .loc 22 334 0 4965 02c6 D0F80CC0 ldr ip, [r0, #12] 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Perform the multiply-accumulates */ 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc0 += x[4] * y[srcBLen - 5] */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 4966 .loc 22 338 0 4967 02ca 0998 ldr r0, [sp, #36] 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[7] sample */ 4968 .loc 22 332 0 4969 02cc 52F8101C ldr r1, [r2, #-16] 4970 .LVL782: ARM GAS /tmp/ccJrAs6S.s page 286 4971 .loc 22 338 0 4972 02d0 9B46 mov fp, r3 4973 02d2 8246 mov r10, r0 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); 4974 .loc 22 340 0 4975 02d4 0646 mov r6, r0 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); 4976 .loc 22 342 0 4977 02d6 0446 mov r4, r0 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); 4978 .loc 22 344 0 4979 02d8 0246 mov r2, r0 4980 02da 059B ldr r3, [sp, #20] 4981 .LVL783: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 4982 .loc 22 338 0 4983 02dc 0298 ldr r0, [sp, #8] 4984 .loc 22 344 0 4985 02de CCFB0123 smlal r2, r3, ip, r1 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 4986 .loc 22 338 0 4987 02e2 C1FB00AB smlal r10, fp, r1, r0 4988 .LVL784: 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 4989 .loc 22 340 0 4990 02e6 0898 ldr r0, [sp, #32] 4991 02e8 2F46 mov r7, r5 4992 .LVL785: 4993 .loc 22 344 0 4994 02ea CDE90223 strd r2, [sp, #8] 4995 .LVL786: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 4996 .loc 22 329 0 4997 02ee 0D9B ldr r3, [sp, #52] 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 4998 .loc 22 340 0 4999 02f0 C1FB0067 smlal r6, r7, r1, r0 5000 .LVL787: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 5001 .loc 22 342 0 5002 02f4 0098 ldr r0, [sp] 5003 02f6 4D46 mov r5, r9 5004 .LVL788: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5005 .loc 22 329 0 5006 02f8 012B cmp r3, #1 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 5007 .loc 22 342 0 5008 02fa C1FB0045 smlal r4, r5, r1, r0 5009 .LVL789: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5010 .loc 22 329 0 5011 02fe 00F09081 beq .L312 5012 .LVL790: ARM GAS /tmp/ccJrAs6S.s page 287 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[7] sample */ 5013 .loc 22 332 0 5014 0302 0F9B ldr r3, [sp, #60] 5015 .LVL791: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 5016 .loc 22 338 0 5017 0304 089C ldr r4, [sp, #32] 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[7] sample */ 5018 .loc 22 332 0 5019 0306 53F8148C ldr r8, [r3, #-20] 5020 .LVL792: 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5021 .loc 22 334 0 5022 030a 0B9B ldr r3, [sp, #44] 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 5023 .loc 22 338 0 5024 030c 0022 movs r2, #0 5025 .LVL793: 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5026 .loc 22 334 0 5027 030e D3F810E0 ldr lr, [r3, #16] 5028 .LVL794: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 5029 .loc 22 338 0 5030 0312 5B46 mov r3, fp 5031 0314 CDE90423 strd r2, [sp, #16] 5032 .loc 22 344 0 5033 0318 DDE90223 ldrd r2, [sp, #8] 5034 031c 0022 movs r2, #0 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 5035 .loc 22 340 0 5036 031e 3946 mov r1, r7 5037 .loc 22 344 0 5038 0320 CEFB0823 smlal r2, r3, lr, r8 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 5039 .loc 22 338 0 5040 0324 DDE90467 ldrd r6, [sp, #16] 5041 .loc 22 344 0 5042 0328 CDE90223 strd r2, [sp, #8] 5043 .LVL795: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5044 .loc 22 329 0 5045 032c 0D9B ldr r3, [sp, #52] 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 5046 .loc 22 342 0 5047 032e AB46 mov fp, r5 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 5048 .loc 22 340 0 5049 0330 0020 movs r0, #0 5050 .LVL796: 5051 0332 0D46 mov r5, r1 5052 0334 0099 ldr r1, [sp] 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 5053 .loc 22 342 0 5054 0336 4FF0000A mov r10, #0 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 5055 .loc 22 338 0 ARM GAS /tmp/ccJrAs6S.s page 288 5056 033a C8FB0467 smlal r6, r7, r8, r4 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5057 .loc 22 329 0 5058 033e 022B cmp r3, #2 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 5059 .loc 22 340 0 5060 0340 0446 mov r4, r0 5061 0342 C8FB0145 smlal r4, r5, r8, r1 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 5062 .loc 22 342 0 5063 0346 C8FB0CAB smlal r10, fp, r8, ip 5064 .LVL797: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5065 .loc 22 329 0 5066 034a 00F07081 beq .L313 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Read x[7] sample */ 5067 .loc 22 332 0 5068 034e 0F9B ldr r3, [sp, #60] 5069 0350 53F8180C ldr r0, [r3, #-24] 5070 .LVL798: 5071 .loc 22 344 0 5072 0354 0B9B ldr r3, [sp, #44] 5073 0356 5969 ldr r1, [r3, #20] 5074 0358 0891 str r1, [sp, #32] 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 5075 .loc 22 338 0 5076 035a 0099 ldr r1, [sp] 5077 .loc 22 344 0 5078 035c DDE90223 ldrd r2, [sp, #8] 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 5079 .loc 22 338 0 5080 0360 0026 movs r6, #0 5081 0362 C0FB0167 smlal r6, r7, r0, r1 5082 .loc 22 344 0 5083 0366 0899 ldr r1, [sp, #32] 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 5084 .loc 22 340 0 5085 0368 0024 movs r4, #0 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 5086 .loc 22 342 0 5087 036a 4FF00008 mov r8, #0 5088 036e D946 mov r9, fp 5089 .loc 22 344 0 5090 0370 0022 movs r2, #0 5091 .LVL799: 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 5092 .loc 22 340 0 5093 0372 C0FB0C45 smlal r4, r5, r0, ip 5094 .loc 22 344 0 5095 0376 C1FB0023 smlal r2, r3, r1, r0 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 5096 .loc 22 342 0 5097 037a C0FB0E89 smlal r8, r9, r0, lr 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 5098 .loc 22 340 0 5099 037e 2946 mov r1, r5 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ ARM GAS /tmp/ccJrAs6S.s page 289 5100 .loc 22 338 0 5101 0380 3846 mov r0, r7 5102 .LVL800: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 5103 .loc 22 342 0 5104 0382 CDF81890 str r9, [sp, #24] 5105 .loc 22 344 0 5106 0386 9C46 mov ip, r3 5107 .LVL801: 5108 .L260: 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Reuse the present samples for the next MAC */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x0 = x1; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x1 = x2; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** x2 = x3; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k--; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = (q31_t) (acc0 << 1); 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = (q31_t) (acc1 << 1); 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = (q31_t) (acc2 << 1); 5109 .loc 22 358 0 5110 0388 069B ldr r3, [sp, #24] 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = (q31_t) (acc1 << 1); 5111 .loc 22 356 0 5112 038a 0E9C ldr r4, [sp, #56] 5113 .loc 22 358 0 5114 038c 5A00 lsls r2, r3, #1 5115 038e 44F8082C str r2, [r4, #-8] 5116 0392 0B9A ldr r2, [sp, #44] 5117 0394 1032 adds r2, r2, #16 5118 0396 0B92 str r2, [sp, #44] 5119 0398 0C9A ldr r2, [sp, #48] 5120 039a 1032 adds r2, r2, #16 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = (q31_t) (acc3 << 1); 5121 .loc 22 359 0 5122 039c 4FEA4C03 lsl r3, ip, #1 5123 03a0 0C92 str r2, [sp, #48] 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5124 .loc 22 239 0 5125 03a2 149A ldr r2, [sp, #80] 5126 .loc 22 359 0 5127 03a4 44F8043C str r3, [r4, #-4] 5128 03a8 04F11003 add r3, r4, #16 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = (q31_t) (acc1 << 1); 5129 .loc 22 356 0 5130 03ac 4000 lsls r0, r0, #1 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = (q31_t) (acc2 << 1); 5131 .loc 22 357 0 5132 03ae 4900 lsls r1, r1, #1 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5133 .loc 22 239 0 5134 03b0 9342 cmp r3, r2 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = (q31_t) (acc1 << 1); ARM GAS /tmp/ccJrAs6S.s page 290 5135 .loc 22 356 0 5136 03b2 44F8100C str r0, [r4, #-16] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = (q31_t) (acc2 << 1); 5137 .loc 22 357 0 5138 03b6 44F80C1C str r1, [r4, #-12] 5139 03ba 0E93 str r3, [sp, #56] 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5140 .loc 22 239 0 5141 03bc 7FF4D3AE bne .L263 5142 03c0 249A ldr r2, [sp, #144] 5143 03c2 199B ldr r3, [sp, #100] 5144 03c4 1146 mov r1, r2 5145 03c6 129A ldr r2, [sp, #72] 5146 03c8 1944 add r1, r1, r3 5147 03ca D718 adds r7, r2, r3 5148 03cc 189B ldr r3, [sp, #96] 5149 03ce 2491 str r1, [sp, #144] 5150 03d0 9B00 lsls r3, r3, #2 5151 03d2 1893 str r3, [sp, #96] 5152 03d4 159B ldr r3, [sp, #84] 5153 .L257: 5154 .LVL802: 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Increment the pointer pIn1 index, count by 4 */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** count += 4U; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** px = pIn1 + count; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** py = pSrc2; 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** blkCnt--; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ** No loop unrolling is used. */ 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** blkCnt = blockSize2 % 0x4U; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (blkCnt > 0U) 5155 .loc 22 376 0 5156 03d6 13F00309 ands r9, r3, #3 5157 03da 00F01C81 beq .L280 5158 03de 189A ldr r2, [sp, #96] 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Accumulator is made zero for every iteration */ 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = 0; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k = srcBLen >> 2U; 5159 .loc 22 382 0 5160 03e0 119B ldr r3, [sp, #68] 5161 03e2 1299 ldr r1, [sp, #72] 5162 03e4 02F1010E add lr, r2, #1 5163 03e8 4FEA930A lsr r10, r3, #2 5164 03ec 169A ldr r2, [sp, #88] 5165 03ee 01EB8E0E add lr, r1, lr, lsl #2 5166 03f2 2499 ldr r1, [sp, #144] ARM GAS /tmp/ccJrAs6S.s page 291 5167 03f4 CAEB0A7C rsb ip, r10, r10, lsl #28 5168 03f8 0AF1805B add fp, r10, #268435456 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (k > 0U) 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Perform the multiply-accumulates */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k--; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ** No loop unrolling is used. */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k = srcBLen % 0x4U; 5169 .loc 22 404 0 5170 03fc 03F00306 and r6, r3, #3 5171 0400 01EB8909 add r9, r1, r9, lsl #2 5172 0404 02EB0C1C add ip, r2, ip, lsl #4 5173 0408 0BF1FF3B add fp, fp, #-1 5174 040c A2F11003 sub r3, r2, #16 5175 0410 B046 mov r8, r6 5176 0412 0CF1100C add ip, ip, #16 5177 0416 5646 mov r6, r10 5178 0418 4FEA0B1B lsl fp, fp, #4 5179 041c CA46 mov r10, r9 5180 041e 1093 str r3, [sp, #64] 5181 0420 8946 mov r9, r1 5182 .LVL803: 5183 .L268: 5184 0422 1099 ldr r1, [sp, #64] 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5185 .loc 22 379 0 5186 0424 CDF800C0 str ip, [sp] 5187 0428 07F11000 add r0, r7, #16 5188 042c BC46 mov ip, r7 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5189 .loc 22 382 0 5190 042e 3446 mov r4, r6 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5191 .loc 22 379 0 5192 0430 0025 movs r5, #0 5193 0432 3746 mov r7, r6 5194 .LVL804: 5195 .L264: 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5196 .loc 22 389 0 5197 0434 50F8106C ldr r6, [r0, #-16] ARM GAS /tmp/ccJrAs6S.s page 292 5198 0438 2B46 mov r3, r5 5199 043a 0D69 ldr r5, [r1, #16] 5200 .LVL805: 5201 043c 0022 movs r2, #0 5202 043e C5FB0623 smlal r2, r3, r5, r6 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5203 .loc 22 391 0 5204 0442 CD68 ldr r5, [r1, #12] 5205 0444 50F80C6C ldr r6, [r0, #-12] 5206 0448 0022 movs r2, #0 5207 044a C5FB0623 smlal r2, r3, r5, r6 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5208 .loc 22 393 0 5209 044e 8D68 ldr r5, [r1, #8] 5210 0450 50F8086C ldr r6, [r0, #-8] 5211 0454 0022 movs r2, #0 5212 0456 C5FB0623 smlal r2, r3, r5, r6 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5213 .loc 22 395 0 5214 045a 4D68 ldr r5, [r1, #4] 5215 045c 50F8046C ldr r6, [r0, #-4] 5216 0460 0022 movs r2, #0 5217 0462 C5FB0623 smlal r2, r3, r5, r6 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5218 .loc 22 386 0 5219 0466 013C subs r4, r4, #1 5220 .LVL806: 5221 0468 00F11000 add r0, r0, #16 5222 .LVL807: 5223 046c A1F11001 sub r1, r1, #16 5224 .LVL808: 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5225 .loc 22 395 0 5226 0470 1D46 mov r5, r3 5227 .LVL809: 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5228 .loc 22 386 0 5229 0472 DFD1 bne .L264 5230 0474 3E46 mov r6, r7 5231 0476 6746 mov r7, ip 5232 0478 5F44 add r7, r7, fp 5233 .LVL810: 5234 047a DDF800C0 ldr ip, [sp] 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (k > 0U) 5235 .loc 22 406 0 5236 047e B8F1000F cmp r8, #0 5237 0482 1BD0 beq .L265 5238 .LVL811: 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Perform the multiply-accumulate */ 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 5239 .loc 22 409 0 5240 0484 1946 mov r1, r3 5241 .LVL812: 5242 0486 3A69 ldr r2, [r7, #16] 5243 0488 5CF8103C ldr r3, [ip, #-16] ARM GAS /tmp/ccJrAs6S.s page 293 5244 .LVL813: 5245 048c 2046 mov r0, r4 5246 .LVL814: 5247 048e C3FB0201 smlal r0, r1, r3, r2 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5248 .loc 22 406 0 5249 0492 B8F1010F cmp r8, #1 5250 .loc 22 409 0 5251 0496 0D46 mov r5, r1 5252 .LVL815: 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5253 .loc 22 406 0 5254 0498 10D0 beq .L265 5255 .loc 22 409 0 5256 049a 7A69 ldr r2, [r7, #20] 5257 049c 5CF8143C ldr r3, [ip, #-20] 5258 04a0 0020 movs r0, #0 5259 04a2 C3FB0201 smlal r0, r1, r3, r2 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5260 .loc 22 406 0 5261 04a6 B8F1020F cmp r8, #2 5262 .loc 22 409 0 5263 04aa 0D46 mov r5, r1 5264 .LVL816: 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5265 .loc 22 406 0 5266 04ac 06D0 beq .L265 5267 .loc 22 409 0 5268 04ae BA69 ldr r2, [r7, #24] 5269 04b0 5CF8183C ldr r3, [ip, #-24] 5270 04b4 0020 movs r0, #0 5271 04b6 C3FB0201 smlal r0, r1, r3, r2 5272 04ba 0D46 mov r5, r1 5273 .LVL817: 5274 .L265: 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k--; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = sum << 1; 5275 .loc 22 417 0 5276 04bc 6D00 lsls r5, r5, #1 5277 04be 49F8045B str r5, [r9], #4 5278 .LVL818: 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5279 .loc 22 376 0 5280 04c2 D145 cmp r9, r10 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Increment MAC count */ 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** count++; 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** px = pIn1 + count; 5281 .loc 22 423 0 ARM GAS /tmp/ccJrAs6S.s page 294 5282 04c4 7746 mov r7, lr 5283 .LVL819: 5284 04c6 0EF1040E add lr, lr, #4 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5285 .loc 22 376 0 5286 04ca AAD1 bne .L268 5287 04cc 159A ldr r2, [sp, #84] 5288 04ce D146 mov r9, r10 5289 .LVL820: 5290 .L248: 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** py = pSrc2; 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** blkCnt--; 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** else 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* If the srcBLen is not a multiple of 4, 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * the blockSize2 loop cannot be unrolled by 4 */ 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** blkCnt = blockSize2; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (blkCnt > 0U) 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Accumulator is made zero for every iteration */ 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = 0; 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* srcBLen number of MACS should be performed */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k = srcBLen; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (k > 0U) 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Perform the multiply-accumulate */ 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k--; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = sum << 1; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Increment MAC count */ 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** count++; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** px = pIn1 + count; 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** py = pSrc2; 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** blkCnt--; 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* -------------------------- ARM GAS /tmp/ccJrAs6S.s page 295 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Initializations of stage3 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * -------------------------*/ 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcAL 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcAL 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * .... 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * sum += x[srcALen-1] * y[srcBLen-1] 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** The blockSize3 variable holds the number of MAC operations performed */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Working pointer of inputA */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); 5291 .loc 22 485 0 5292 04d0 129B ldr r3, [sp, #72] 5293 04d2 03EB8208 add r8, r3, r2, lsl #2 5294 .LVL821: 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** px = pSrc1; 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Working pointer of inputB */ 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** pSrc2 = pIn2 + (srcBLen - 1U); 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** py = pSrc2; 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* ------------------- 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * Stage3 process 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** * ------------------*/ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (blockSize3 > 0U) 5295 .loc 22 496 0 5296 04d6 179B ldr r3, [sp, #92] 5297 04d8 002B cmp r3, #0 5298 04da 5BD0 beq .L237 5299 04dc DDF858B0 ldr fp, [sp, #88] 5300 04e0 CA46 mov r10, r9 5301 04e2 9946 mov r9, r3 5302 .LVL822: 5303 .L274: 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Accumulator is made zero for every iteration */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = 0; 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k = blockSize3 >> 2U; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (k > 0U) 5304 .loc 22 506 0 5305 04e4 5FEA990E lsrs lr, r9, #2 5306 .LVL823: 5307 04e8 00F09180 beq .L281 5308 .L314: 5309 04ec 08F11007 add r7, r8, #16 5310 04f0 ABF11006 sub r6, fp, #16 5311 04f4 F446 mov ip, lr ARM GAS /tmp/ccJrAs6S.s page 296 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5312 .loc 22 499 0 5313 04f6 0021 movs r1, #0 5314 .LVL824: 5315 .L270: 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Perform the multiply-accumulate */ 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 5316 .loc 22 510 0 5317 04f8 57F8105C ldr r5, [r7, #-16] 5318 04fc 3469 ldr r4, [r6, #16] 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 5319 .loc 22 514 0 5320 04fe 57F80C0C ldr r0, [r7, #-12] 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5321 .loc 22 510 0 5322 0502 0B46 mov r3, r1 5323 0504 0022 movs r2, #0 5324 .loc 22 514 0 5325 0506 F168 ldr r1, [r6, #12] 5326 .LVL825: 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5327 .loc 22 510 0 5328 0508 C4FB0523 smlal r2, r3, r4, r5 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 5329 .loc 22 518 0 5330 050c 57F8085C ldr r5, [r7, #-8] 5331 0510 B468 ldr r4, [r6, #8] 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5332 .loc 22 514 0 5333 0512 0022 movs r2, #0 5334 0514 C1FB0023 smlal r2, r3, r1, r0 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 5335 .loc 22 522 0 5336 0518 7168 ldr r1, [r6, #4] 5337 051a 57F8040C ldr r0, [r7, #-4] 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5338 .loc 22 518 0 5339 051e 0022 movs r2, #0 5340 0520 C4FB0523 smlal r2, r3, r4, r5 5341 .loc 22 522 0 5342 0524 0022 movs r2, #0 5343 0526 C1FB0023 smlal r2, r3, r1, r0 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5344 .loc 22 506 0 5345 052a BCF1010C subs ip, ip, #1 5346 .LVL826: ARM GAS /tmp/ccJrAs6S.s page 297 5347 052e 07F11007 add r7, r7, #16 5348 .LVL827: 5349 .loc 22 522 0 5350 0532 1946 mov r1, r3 5351 .LVL828: 5352 0534 A6F11006 sub r6, r6, #16 5353 .LVL829: 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5354 .loc 22 506 0 5355 0538 DED1 bne .L270 5356 053a CEEB0E74 rsb r4, lr, lr, lsl #28 5357 053e 0BEB0414 add r4, fp, r4, lsl #4 5358 0542 08EB0E1E add lr, r8, lr, lsl #4 5359 .LVL830: 5360 .L269: 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k--; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ** No loop unrolling is used. */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k = blockSize3 % 0x4U; 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** while (k > 0U) 5361 .loc 22 533 0 5362 0546 19F00305 ands r5, r9, #3 5363 .LVL831: 5364 054a 1BD0 beq .L271 5365 .LVL832: 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Perform the multiply-accumulate */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 5366 .loc 22 536 0 5367 054c 0B46 mov r3, r1 5368 054e DEF80000 ldr r0, [lr] 5369 0552 2168 ldr r1, [r4] 5370 .LVL833: 5371 0554 0022 movs r2, #0 5372 0556 C1FB0023 smlal r2, r3, r1, r0 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5373 .loc 22 533 0 5374 055a 012D cmp r5, #1 5375 .loc 22 536 0 5376 055c 1F46 mov r7, r3 5377 .LVL834: 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5378 .loc 22 533 0 5379 055e 5ED0 beq .L309 5380 .LVL835: 5381 .loc 22 536 0 5382 0560 DEF80400 ldr r0, [lr, #4] 5383 0564 54F8041C ldr r1, [r4, #-4] 5384 0568 0022 movs r2, #0 5385 056a C1FB0023 smlal r2, r3, r1, r0 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { ARM GAS /tmp/ccJrAs6S.s page 298 5386 .loc 22 533 0 5387 056e 022D cmp r5, #2 5388 .loc 22 536 0 5389 0570 1F46 mov r7, r3 5390 .LVL836: 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5391 .loc 22 533 0 5392 0572 54D0 beq .L309 5393 .LVL837: 5394 .loc 22 536 0 5395 0574 54F8081C ldr r1, [r4, #-8] 5396 0578 DEF80800 ldr r0, [lr, #8] 5397 057c 0022 movs r2, #0 5398 057e C1FB0023 smlal r2, r3, r1, r0 5399 0582 1946 mov r1, r3 5400 .LVL838: 5401 .L271: 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** k--; 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** *pOut++ = sum << 1; 5402 .loc 22 544 0 5403 0584 4900 lsls r1, r1, #1 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5404 .loc 22 496 0 5405 0586 B9F10109 subs r9, r9, #1 5406 .LVL839: 5407 .loc 22 544 0 5408 058a 4AF8041B str r1, [r10], #4 5409 .LVL840: 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** px = ++pSrc1; 5410 .loc 22 547 0 5411 058e 08F10408 add r8, r8, #4 5412 .LVL841: 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5413 .loc 22 496 0 5414 0592 A7D1 bne .L274 5415 .LVL842: 5416 .L237: 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** py = pSrc2; 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* Decrement loop counter */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** blockSize3--; 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** } 5417 .loc 22 554 0 5418 0594 1BB0 add sp, sp, #108 5419 .LCFI50: 5420 .cfi_remember_state 5421 .cfi_def_cfa_offset 36 ARM GAS /tmp/ccJrAs6S.s page 299 5422 @ sp needed 5423 0596 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 5424 .LVL843: 5425 .L239: 5426 .LCFI51: 5427 .cfi_restore_state 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** py = pSrc2; 5428 .loc 22 221 0 5429 059a 01F18043 add r3, r1, #1073741824 5430 .LVL844: 5431 059e 013B subs r3, r3, #1 5432 05a0 0AEB8303 add r3, r10, r3, lsl #2 5433 05a4 1693 str r3, [sp, #88] 5434 .LVL845: 5435 .L276: 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5436 .loc 22 436 0 5437 05a6 159B ldr r3, [sp, #84] 5438 05a8 002B cmp r3, #0 5439 05aa 34D0 beq .L280 5440 05ac 119A ldr r2, [sp, #68] 5441 05ae 002A cmp r2, #0 5442 05b0 5AD0 beq .L249 5443 05b2 022A cmp r2, #2 5444 05b4 69D0 beq .L250 5445 05b6 179A ldr r2, [sp, #92] 5446 05b8 002A cmp r2, #0 5447 05ba 41D0 beq .L251 5448 05bc 4FEA8308 lsl r8, r3, #2 5449 05c0 249B ldr r3, [sp, #144] 5450 05c2 1298 ldr r0, [sp, #72] 5451 05c4 1699 ldr r1, [sp, #88] 5452 05c6 03EB0809 add r9, r3, r8 5453 05ca 1C46 mov r4, r3 5454 .LVL846: 5455 .L252: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5456 .loc 22 448 0 5457 05cc 0268 ldr r2, [r0] 5458 .LVL847: 5459 05ce 0B68 ldr r3, [r1] 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5460 .loc 22 447 0 5461 05d0 50F8047F ldr r7, [r0, #4]! 5462 .LVL848: 5463 05d4 51F8045C ldr r5, [r1, #-4] 5464 05d8 4668 ldr r6, [r0, #4] 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5465 .loc 22 448 0 5466 05da 82FB03AB smull r10, fp, r2, r3 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5467 .loc 22 447 0 5468 05de 5B46 mov r3, fp 5469 05e0 0022 movs r2, #0 5470 .LVL849: 5471 05e2 C5FB0723 smlal r2, r3, r5, r7 5472 05e6 51F8085C ldr r5, [r1, #-8] ARM GAS /tmp/ccJrAs6S.s page 300 5473 05ea 0022 movs r2, #0 5474 05ec C5FB0623 smlal r2, r3, r5, r6 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5475 .loc 22 455 0 5476 05f0 5B00 lsls r3, r3, #1 5477 05f2 44F8043B str r3, [r4], #4 5478 .LVL850: 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5479 .loc 22 436 0 5480 05f6 4C45 cmp r4, r9 5481 05f8 E8D1 bne .L252 5482 .LVL851: 5483 .L256: 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** px = pSrc1; 5484 .loc 22 485 0 5485 05fa 129B ldr r3, [sp, #72] 5486 05fc CA46 mov r10, r9 5487 05fe DDE916B9 ldrd fp, r9, [sp, #88] 5488 .LVL852: 5489 0602 4344 add r3, r3, r8 5490 0604 9846 mov r8, r3 5491 .LVL853: 5492 .L315: 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5493 .loc 22 506 0 5494 0606 5FEA990E lsrs lr, r9, #2 5495 .LVL854: 5496 060a 7FF46FAF bne .L314 5497 .LVL855: 5498 .L281: 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5499 .loc 22 499 0 5500 060e 7146 mov r1, lr 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5501 .loc 22 506 0 5502 0610 5C46 mov r4, fp 5503 0612 C646 mov lr, r8 5504 .LVL856: 5505 0614 97E7 b .L269 5506 .LVL857: 5507 .L280: 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5508 .loc 22 376 0 5509 0616 DDF89090 ldr r9, [sp, #144] 5510 061a 1A46 mov r2, r3 5511 061c 58E7 b .L248 5512 .LVL858: 5513 .L309: 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5514 .loc 22 536 0 5515 061e 3946 mov r1, r7 5516 0620 B0E7 b .L271 5517 .LVL859: 5518 .L312: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 5519 .loc 22 338 0 5520 0622 5846 mov r0, fp ARM GAS /tmp/ccJrAs6S.s page 301 5521 .LVL860: 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 5522 .loc 22 340 0 5523 0624 3946 mov r1, r7 5524 .LVL861: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 5525 .loc 22 342 0 5526 0626 0695 str r5, [sp, #24] 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5527 .loc 22 344 0 5528 0628 DDF80CC0 ldr ip, [sp, #12] 5529 .LVL862: 5530 062c ACE6 b .L260 5531 .LVL863: 5532 .L313: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 5533 .loc 22 338 0 5534 062e 3846 mov r0, r7 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 5535 .loc 22 340 0 5536 0630 2946 mov r1, r5 5537 .LVL864: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 5538 .loc 22 342 0 5539 0632 CDF818B0 str fp, [sp, #24] 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5540 .loc 22 344 0 5541 0636 DDF80CC0 ldr ip, [sp, #12] 5542 .LVL865: 5543 063a A5E6 b .L260 5544 .LVL866: 5545 .L279: 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5546 .loc 22 218 0 5547 063c 129F ldr r7, [sp, #72] 5548 063e CAE6 b .L257 5549 .LVL867: 5550 .L251: 5551 0640 1A46 mov r2, r3 5552 0642 129B ldr r3, [sp, #72] 5553 .LVL868: 5554 0644 169C ldr r4, [sp, #88] 5555 0646 A3F10408 sub r8, r3, #4 5556 064a 249B ldr r3, [sp, #144] 5557 064c 03EB8201 add r1, r3, r2, lsl #2 5558 0650 1846 mov r0, r3 5559 .LVL869: 5560 .L253: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5561 .loc 22 448 0 5562 0652 2268 ldr r2, [r4] 5563 0654 58F8043F ldr r3, [r8, #4]! 5564 .LVL870: 5565 0658 82FB0323 smull r2, r3, r2, r3 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5566 .loc 22 455 0 5567 065c 5B00 lsls r3, r3, #1 ARM GAS /tmp/ccJrAs6S.s page 302 5568 065e 40F8043B str r3, [r0], #4 5569 .LVL871: 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5570 .loc 22 436 0 5571 0662 8142 cmp r1, r0 5572 0664 F5D1 bne .L253 5573 0666 95E7 b .L237 5574 .LVL872: 5575 .L249: 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5576 .loc 22 455 0 5577 0668 4FEA8308 lsl r8, r3, #2 5578 066c 1146 mov r1, r2 5579 066e 2498 ldr r0, [sp, #144] 5580 0670 4246 mov r2, r8 5581 0672 FFF7FEFF bl memset 5582 .LVL873: 5583 0676 249B ldr r3, [sp, #144] 5584 0678 03EB0809 add r9, r3, r8 5585 .LVL874: 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** px = pSrc1; 5586 .loc 22 485 0 5587 067c 129B ldr r3, [sp, #72] 5588 067e 4344 add r3, r3, r8 5589 0680 CA46 mov r10, r9 5590 0682 9846 mov r8, r3 5591 .LVL875: 5592 0684 DDE916B9 ldrd fp, r9, [sp, #88] 5593 .LVL876: 5594 0688 BDE7 b .L315 5595 .LVL877: 5596 .L250: 5597 068a 4FEA8308 lsl r8, r3, #2 5598 068e 249B ldr r3, [sp, #144] 5599 .LVL878: 5600 0690 1298 ldr r0, [sp, #72] 5601 0692 1699 ldr r1, [sp, #88] 5602 0694 03EB0804 add r4, r3, r8 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5603 .loc 22 436 0 5604 0698 9946 mov r9, r3 5605 .LVL879: 5606 .L255: 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5607 .loc 22 447 0 5608 069a 51E90153 ldrd r5, r3, [r1, #-4] 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5609 .loc 22 448 0 5610 069e 0268 ldr r2, [r0] 5611 .LVL880: 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5612 .loc 22 447 0 5613 06a0 50F8046F ldr r6, [r0, #4]! 5614 .LVL881: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5615 .loc 22 448 0 5616 06a4 82FB03AB smull r10, fp, r2, r3 ARM GAS /tmp/ccJrAs6S.s page 303 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 5617 .loc 22 447 0 5618 06a8 5B46 mov r3, fp 5619 .LVL882: 5620 06aa 0022 movs r2, #0 5621 .LVL883: 5622 06ac C6FB0523 smlal r2, r3, r6, r5 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5623 .loc 22 455 0 5624 06b0 5B00 lsls r3, r3, #1 5625 06b2 49F8043B str r3, [r9], #4 5626 .LVL884: 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5627 .loc 22 436 0 5628 06b6 4C45 cmp r4, r9 5629 06b8 EFD1 bne .L255 5630 06ba 9EE7 b .L256 5631 .LVL885: 5632 .L277: 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** 5633 .loc 22 150 0 5634 06bc 6446 mov r4, ip 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c **** { 5635 .loc 22 157 0 5636 06be D646 mov lr, r10 5637 06c0 1DE5 b .L241 5638 .cfi_endproc 5639 .LFE167: 5641 06c2 00BF .section .text.arm_conv_opt_q15,"ax",%progbits 5642 .align 1 5643 .p2align 2,,3 5644 .global arm_conv_opt_q15 5645 .syntax unified 5646 .thumb 5647 .thumb_func 5648 .fpu fpv4-sp-d16 5650 arm_conv_opt_q15: 5651 .LFB168: 5652 .file 23 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * Title: arm_conv_opt_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * Description: Convolution of Q15 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * You may obtain a copy of the License at ARM GAS /tmp/ccJrAs6S.s page 304 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @addtogroup Conv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @brief Convolution of Q15 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @param[out] pDst points to the location where the output result is written. Length srcA 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @return none 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @par Scaling and Overflow Behavior 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** The function is implemented using a 64-bit internal accumulator. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** Both inputs are in 1.15 format and multiplications yield a 2.30 result. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 f 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** This approach provides 33 guard bits and there is no risk of overflow. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** @remark 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** void arm_conv_opt_q15( 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** const q15_t * pSrcA, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** uint32_t srcALen, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** const q15_t * pSrcB, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** uint32_t srcBLen, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** q15_t * pDst, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** q15_t * pScratch1, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** q15_t * pScratch2) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 5653 .loc 23 69 0 5654 .cfi_startproc 5655 @ args = 12, pretend = 0, frame = 0 5656 @ frame_needed = 0, uses_anonymous_args = 0 5657 .LVL886: 5658 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} ARM GAS /tmp/ccJrAs6S.s page 305 5659 .LCFI52: 5660 .cfi_def_cfa_offset 40 5661 .cfi_offset 3, -40 5662 .cfi_offset 4, -36 5663 .cfi_offset 5, -32 5664 .cfi_offset 6, -28 5665 .cfi_offset 7, -24 5666 .cfi_offset 8, -20 5667 .cfi_offset 9, -16 5668 .cfi_offset 10, -12 5669 .cfi_offset 11, -8 5670 .cfi_offset 14, -4 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** q63_t acc0; /* Accumulators */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** const q15_t *pIn1; /* InputA pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** const q15_t *pIn2; /* InputB pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** const q15_t *px; /* Intermediate inputA pointer */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** q15_t *py; /* Intermediate inputB pointer */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** uint32_t j, k, blkCnt; /* Loop counter */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** uint32_t tapCnt; /* Loop count */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** q63_t acc1, acc2, acc3; /* Accumulators */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** q31_t x1, x2, x3; /* Temporary variables to hold state and coe 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** q31_t y1, y2; /* State variables */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #endif 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* srcB is always made to slide across srcA. */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** if (srcALen >= srcBLen) 5671 .loc 23 91 0 5672 0004 9942 cmp r1, r3 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** q63_t acc0; /* Accumulators */ 5673 .loc 23 69 0 5674 0006 0C46 mov r4, r1 5675 0008 1F46 mov r7, r3 5676 000a 8046 mov r8, r0 5677 000c DDE90A65 ldrd r6, r5, [sp, #40] 5678 .LVL887: 5679 0010 DDF830B0 ldr fp, [sp, #48] 5680 .LVL888: 5681 .loc 23 91 0 5682 0014 04D2 bcs .L317 5683 0016 2346 mov r3, r4 5684 .LVL889: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Initialization of inputA pointer */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pIn1 = pSrcA; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Initialization of inputB pointer */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pIn2 = pSrcB; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** } 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** else ARM GAS /tmp/ccJrAs6S.s page 306 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Initialization of inputA pointer */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pIn1 = pSrcB; 5685 .loc 23 102 0 5686 0018 9046 mov r8, r2 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 5687 .loc 23 91 0 5688 001a 3C46 mov r4, r7 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Initialization of inputB pointer */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pIn2 = pSrcA; 5689 .loc 23 105 0 5690 001c 0246 mov r2, r0 5691 .LVL890: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 5692 .loc 23 91 0 5693 001e 1F46 mov r7, r3 5694 .LVL891: 5695 .L317: 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** j = srcBLen; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** srcBLen = srcALen; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** srcALen = j; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** } 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Pointer to take end of scratch2 buffer */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pScr2 = pScratch2 + srcBLen - 1; 5696 .loc 23 114 0 5697 0020 07F10043 add r3, r7, #-2147483648 5698 0024 013B subs r3, r3, #1 5699 0026 4FEA4309 lsl r9, r3, #1 5700 .LVL892: 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* points to smaller length sequence */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** px = pIn2; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** k = srcBLen >> 2U; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Copy smaller length input sequence in reverse order into second scratch buffer */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** while (k > 0U) 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* copy second buffer in reversal manner */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** *pScr2-- = *px++; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** *pScr2-- = *px++; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** *pScr2-- = *px++; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** *pScr2-- = *px++; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Decrement loop counter */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** k--; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** } 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Loop unrolling: Compute remaining outputs */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** k = srcBLen % 0x4U; ARM GAS /tmp/ccJrAs6S.s page 307 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #else 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Initialize k with number of samples */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** k = srcBLen; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** while (k > 0U) 5701 .loc 23 147 0 5702 002a 4FB1 cbz r7, .L318 5703 002c 09F10200 add r0, r9, #2 5704 .LVL893: 5705 0030 5844 add r0, r0, fp 5706 0032 3946 mov r1, r7 5707 .LVL894: 5708 .L319: 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* copy second buffer in reversal manner for remaining samples */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** *pScr2-- = *px++; 5709 .loc 23 150 0 5710 0034 32F9023B ldrsh r3, [r2], #2 5711 .LVL895: 5712 0038 20F8023D strh r3, [r0, #-2]! @ movhi 5713 .LVL896: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 5714 .loc 23 147 0 5715 003c 0139 subs r1, r1, #1 5716 .LVL897: 5717 003e F9D1 bne .L319 5718 .LVL898: 5719 .L318: 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Decrement loop counter */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** k--; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** } 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Initialze temporary scratch pointer */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pScr1 = pScratch1; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Assuming scratch1 buffer is aligned by 32-bit */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Fill (srcBLen - 1U) zeros in scratch1 buffer */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 5720 .loc 23 161 0 5721 0040 07F1FF3A add r10, r7, #-1 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Update temporary scratch pointer */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pScr1 += (srcBLen - 1U); 5722 .loc 23 164 0 5723 0044 A944 add r9, r9, r5 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 5724 .loc 23 161 0 5725 0046 5246 mov r2, r10 5726 .LVL899: 5727 0048 2946 mov r1, r5 5728 004a 0020 movs r0, #0 5729 004c FFF7FEFF bl arm_fill_q15 ARM GAS /tmp/ccJrAs6S.s page 308 5730 .LVL900: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Copy (srcALen) samples in scratch buffer */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** arm_copy_q15(pIn1, pScr1, srcALen); 5731 .loc 23 169 0 5732 0050 2246 mov r2, r4 5733 0052 4046 mov r0, r8 5734 0054 4946 mov r1, r9 5735 0056 FFF7FEFF bl arm_copy_q15 5736 .LVL901: 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Update pointers */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pScr1 += srcALen; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 5737 .loc 23 176 0 5738 005a 09EB4401 add r1, r9, r4, lsl #1 5739 .LVL902: 5740 005e 5246 mov r2, r10 5741 0060 0020 movs r0, #0 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Update pointer */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pScr1 += (srcBLen - 1U); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Temporary pointer for scratch2 */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** py = pScratch2; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Initialization of pIn2 pointer */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pIn2 = py; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** blkCnt = (srcALen + srcBLen - 1U) >> 2; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** while (blkCnt > 0) 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Initialze temporary scratch pointer as scratch1 */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pScr1 = pScratch1; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Clear Accumlators */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc0 = 0; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc1 = 0; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc2 = 0; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc3 = 0; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Read two samples from scratch1 buffer */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** x2 = read_q15x2_ia (&pScr1); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 309 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** tapCnt = (srcBLen) >> 2U; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** while (tapCnt > 0U) 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Read four samples from smaller buffer */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** y1 = read_q15x2_ia ((q15_t **) &pIn2); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** y2 = read_q15x2_ia ((q15_t **) &pIn2); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* multiply and accumlate */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc0 = __SMLALD(x1, y1, acc0); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc2 = __SMLALD(x2, y1, acc2); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* pack input data */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #else 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #endif 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* multiply and accumlate */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc1 = __SMLALDX(x3, y1, acc1); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* multiply and accumlate */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc0 = __SMLALD(x2, y2, acc0); 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc2 = __SMLALD(x1, y2, acc2); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* pack input data */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #else 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #endif 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc3 = __SMLALDX(x3, y1, acc3); 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc1 = __SMLALDX(x3, y2, acc1); 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** x2 = read_q15x2_ia (&pScr1); 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #else 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #endif 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc3 = __SMLALDX(x3, y2, acc3); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Decrement loop counter */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** tapCnt--; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** } 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Update scratch pointer for remaining samples of smaller length sequence */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pScr1 -= 4U; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 310 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* apply same above for remaining samples of smaller length sequence */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** tapCnt = (srcBLen) & 3U; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** while (tapCnt > 0U) 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* accumlate the results */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc0 += (*pScr1++ * *pIn2); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc1 += (*pScr1++ * *pIn2); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc2 += (*pScr1++ * *pIn2); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc3 += (*pScr1++ * *pIn2++); 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pScr1 -= 3U; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Decrement loop counter */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** tapCnt--; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** } 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** blkCnt--; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Store the results in the accumulators in the destination buffer. */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #else 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Initialization of inputB pointer */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pIn2 = py; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pScratch1 += 4U; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** } 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Loop unrolling: Compute remaining outputs */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** blkCnt = (srcALen + srcBLen - 1U) & 0x3; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #else 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Initialize blkCnt with number of samples */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** blkCnt = (srcALen + srcBLen - 1U); 5742 .loc 23 307 0 5743 0062 3C44 add r4, r4, r7 5744 .LVL903: 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 5745 .loc 23 176 0 5746 0064 FFF7FEFF bl arm_fill_q15 5747 .LVL904: 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Calculate convolution for remaining samples of Bigger length sequence */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** while (blkCnt > 0) 5748 .loc 23 312 0 5749 0068 013C subs r4, r4, #1 5750 .LVL905: 5751 006a 3ED0 beq .L316 ARM GAS /tmp/ccJrAs6S.s page 311 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Initialze temporary scratch pointer as scratch1 */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pScr1 = pScratch1; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Clear Accumlators */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc0 = 0; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** tapCnt = (srcBLen) >> 1U; 5752 .loc 23 320 0 5753 006c 4FEA570C lsr ip, r7, #1 5754 0070 4FEA8C0E lsl lr, ip, #2 5755 0074 0BEB0E0A add r10, fp, lr 5756 0078 D146 mov r9, r10 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** while (tapCnt > 0U) 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Decrement loop counter */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** tapCnt--; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** } 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** tapCnt = (srcBLen) & 1U; 5757 .loc 23 333 0 5758 007a 07F00107 and r7, r7, #1 5759 007e F246 mov r10, lr 5760 .LVL906: 5761 .L321: 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 5762 .loc 23 322 0 5763 0080 BCF1000F cmp ip, #0 5764 0084 33D0 beq .L326 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 5765 .loc 23 318 0 5766 0086 CDE90A65 strd r6, r5, [sp, #40] 5767 008a 2A1D adds r2, r5, #4 5768 008c 0BF10403 add r3, fp, #4 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 5769 .loc 23 322 0 5770 0090 E646 mov lr, ip 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 5771 .loc 23 318 0 5772 0092 0020 movs r0, #0 5773 0094 0021 movs r1, #0 5774 0096 A046 mov r8, r4 5775 .LVL907: 5776 .L323: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 5777 .loc 23 326 0 5778 0098 32F8045C ldrh r5, [r2, #-4] 5779 009c 33F8046C ldrh r6, [r3, #-4] 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 5780 .loc 23 327 0 5781 00a0 32F8024C ldrh r4, [r2, #-2] ARM GAS /tmp/ccJrAs6S.s page 312 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 5782 .loc 23 326 0 5783 00a4 C5FB8601 smlalbb r0, r1, r5, r6 5784 .LVL908: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 5785 .loc 23 327 0 5786 00a8 33F8025C ldrh r5, [r3, #-2] 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 5787 .loc 23 322 0 5788 00ac BEF1010E subs lr, lr, #1 5789 .LVL909: 5790 00b0 02F10402 add r2, r2, #4 5791 .LVL910: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 5792 .loc 23 327 0 5793 00b4 C4FB8501 smlalbb r0, r1, r4, r5 5794 .LVL911: 5795 00b8 03F10403 add r3, r3, #4 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 5796 .loc 23 322 0 5797 00bc ECD1 bne .L323 5798 00be DDE90A65 ldrd r6, r5, [sp, #40] 5799 00c2 4446 mov r4, r8 5800 00c4 05EB0A02 add r2, r5, r10 5801 .LVL912: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 5802 .loc 23 327 0 5803 00c8 4B46 mov r3, r9 5804 .LVL913: 5805 .L322: 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* apply same above for remaining samples of smaller length sequence */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** while (tapCnt > 0U) 5806 .loc 23 336 0 5807 00ca 1FB1 cbz r7, .L324 5808 .LVL914: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* accumlate the results */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 5809 .loc 23 340 0 5810 00cc 1288 ldrh r2, [r2] 5811 .LVL915: 5812 00ce 1B88 ldrh r3, [r3] 5813 .LVL916: 5814 00d0 C2FB8301 smlalbb r0, r1, r2, r3 5815 .LVL917: 5816 .L324: 5817 .LBB1259: 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Decrement loop counter */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** tapCnt--; 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** } 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** blkCnt--; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* The result is in 2.30 format. Convert to 1.15 with saturation. ARM GAS /tmp/ccJrAs6S.s page 313 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** Then store the output in the destination buffer. */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); 5818 .loc 23 350 0 5819 00d4 C30B lsrs r3, r0, #15 5820 .LBE1259: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 5821 .loc 23 312 0 5822 00d6 013C subs r4, r4, #1 5823 .LVL918: 5824 .LBB1260: 5825 .loc 23 350 0 5826 00d8 43EA4143 orr r3, r3, r1, lsl #17 5827 .LBE1260: 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** /* Initialization of inputB pointer */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pIn2 = py; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** pScratch1 += 1U; 5828 .loc 23 355 0 5829 00dc 05F10205 add r5, r5, #2 5830 .LBB1261: 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 5831 .loc 23 350 0 5832 .syntax unified 5833 @ 350 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c" 1 5834 00e0 03F30F03 ssat r3, #16, r3 5835 @ 0 "" 2 5836 .LVL919: 5837 .thumb 5838 .syntax unified 5839 .LBE1261: 5840 00e4 26F8023B strh r3, [r6], #2 @ movhi 5841 .LVL920: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 5842 .loc 23 312 0 5843 00e8 CAD1 bne .L321 5844 .LVL921: 5845 .L316: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** } 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** } 5846 .loc 23 358 0 5847 00ea BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} 5848 .LVL922: 5849 .L326: 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** { 5850 .loc 23 322 0 5851 00ee 2A46 mov r2, r5 5852 00f0 5B46 mov r3, fp 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c **** 5853 .loc 23 318 0 5854 00f2 0020 movs r0, #0 5855 00f4 0021 movs r1, #0 5856 00f6 E8E7 b .L322 5857 .cfi_endproc 5858 .LFE168: 5860 .section .text.arm_conv_opt_q7,"ax",%progbits ARM GAS /tmp/ccJrAs6S.s page 314 5861 .align 1 5862 .p2align 2,,3 5863 .global arm_conv_opt_q7 5864 .syntax unified 5865 .thumb 5866 .thumb_func 5867 .fpu fpv4-sp-d16 5869 arm_conv_opt_q7: 5870 .LFB169: 5871 .file 24 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * Title: arm_conv_opt_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * Description: Convolution of Q7 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @addtogroup Conv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @brief Convolution of Q7 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @param[out] pDst points to the location where the output result is written. Length srcA 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + ARM GAS /tmp/ccJrAs6S.s page 315 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @return none 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** @par Scaling and Overflow Behavior 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** The function is implemented using a 32-bit internal accumulator. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** Both the inputs are represented in 1.7 format and multiplications yield a 2.14 r 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 f 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** This approach provides 17 guard bits and there is no risk of overflow as long as 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits a 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** void arm_conv_opt_q7( 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** const q7_t * pSrcA, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** uint32_t srcALen, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** const q7_t * pSrcB, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** uint32_t srcBLen, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q7_t * pDst, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q15_t * pScratch1, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q15_t * pScratch2) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 5872 .loc 24 67 0 5873 .cfi_startproc 5874 @ args = 12, pretend = 0, frame = 40 5875 @ frame_needed = 0, uses_anonymous_args = 0 5876 .LVL923: 5877 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 5878 .LCFI53: 5879 .cfi_def_cfa_offset 36 5880 .cfi_offset 4, -36 5881 .cfi_offset 5, -32 5882 .cfi_offset 6, -28 5883 .cfi_offset 7, -24 5884 .cfi_offset 8, -20 5885 .cfi_offset 9, -16 5886 .cfi_offset 10, -12 5887 .cfi_offset 11, -8 5888 .cfi_offset 14, -4 5889 0004 8BB0 sub sp, sp, #44 5890 .LCFI54: 5891 .cfi_def_cfa_offset 80 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q15_t x4; /* Temporary input variable */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q15_t *py; /* Temporary input2 pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q31_t acc0, acc1, acc2, acc3; /* Accumulators */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** const q7_t *pIn1, *pIn2; /* InputA and inputB pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** uint32_t j, k, blkCnt, tapCnt; /* Loop counter */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q31_t x1, x2, x3, y1; /* Temporary input variables */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** const q7_t *px; /* Temporary input1 pointer */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q7_t *pOut = pDst; /* Output pointer */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q7_t out0, out1, out2, out3; /* Temporary variables */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* srcB is always made to slide across srcA. */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** if (srcALen >= srcBLen) 5892 .loc 24 83 0 ARM GAS /tmp/ccJrAs6S.s page 316 5893 0006 9942 cmp r1, r3 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch */ 5894 .loc 24 67 0 5895 0008 0C46 mov r4, r1 5896 000a 0593 str r3, [sp, #20] 5897 000c 0546 mov r5, r0 5898 .LVL924: 5899 .loc 24 83 0 5900 000e 06D2 bcs .L337 5901 0010 1846 mov r0, r3 5902 .LVL925: 5903 0012 2946 mov r1, r5 5904 .LVL926: 5905 0014 2346 mov r3, r4 5906 .LVL927: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Initialization of inputA pointer */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pIn1 = pSrcA; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Initialization of inputB pointer */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pIn2 = pSrcB; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** else 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Initialization of inputA pointer */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pIn1 = pSrcB; 5907 .loc 24 94 0 5908 0016 1546 mov r5, r2 5909 .LVL928: 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 5910 .loc 24 83 0 5911 0018 0446 mov r4, r0 5912 .LVL929: 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Initialization of inputB pointer */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pIn2 = pSrcA; 5913 .loc 24 97 0 5914 001a 0A46 mov r2, r1 5915 .LVL930: 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 5916 .loc 24 83 0 5917 001c 0593 str r3, [sp, #20] 5918 .LVL931: 5919 .L337: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** j = srcBLen; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** srcBLen = srcALen; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** srcALen = j; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* points to smaller length sequence */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** px = pIn2 + srcBLen - 1; 5920 .loc 24 106 0 5921 001e 059B ldr r3, [sp, #20] 5922 0020 5E1E subs r6, r3, #1 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 317 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Apply loop unrolling and do 4 Copies simultaneously. */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** k = srcBLen >> 2U; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* First part of the processing with loop unrolling copies 4 data points at a time. 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** ** a second loop below copies for the remaining 1 to 3 samples. */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** while (k > 0U) 5923 .loc 24 113 0 5924 0022 9B08 lsrs r3, r3, #2 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 5925 .loc 24 106 0 5926 0024 3244 add r2, r2, r6 5927 .LVL932: 5928 .loc 24 113 0 5929 0026 0393 str r3, [sp, #12] 5930 0028 00F07F81 beq .L356 5931 002c A2EB8307 sub r7, r2, r3, lsl #2 5932 0030 169B ldr r3, [sp, #88] 5933 0032 043F subs r7, r7, #4 5934 0034 03F10801 add r1, r3, #8 5935 0038 131F subs r3, r2, #4 5936 .LVL933: 5937 .L339: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* copy second buffer in reversal manner */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x4 = (q15_t) *px--; 5938 .loc 24 116 0 5939 003a 93F90400 ldrsb r0, [r3, #4] 5940 003e 21F8080C strh r0, [r1, #-8] @ movhi 5941 .LVL934: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** *pScr2++ = x4; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x4 = (q15_t) *px--; 5942 .loc 24 118 0 5943 0042 93F90300 ldrsb r0, [r3, #3] 5944 0046 21F8060C strh r0, [r1, #-6] @ movhi 5945 .LVL935: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** *pScr2++ = x4; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x4 = (q15_t) *px--; 5946 .loc 24 120 0 5947 004a 93F90200 ldrsb r0, [r3, #2] 5948 004e 21F8040C strh r0, [r1, #-4] @ movhi 5949 .LVL936: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** *pScr2++ = x4; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x4 = (q15_t) *px--; 5950 .loc 24 122 0 5951 0052 93F90100 ldrsb r0, [r3, #1] 5952 0056 21F8020C strh r0, [r1, #-2] @ movhi 5953 .LVL937: 5954 005a 043B subs r3, r3, #4 5955 .LVL938: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 5956 .loc 24 113 0 5957 005c 9F42 cmp r7, r3 5958 005e 01F10801 add r1, r1, #8 5959 .LVL939: 5960 0062 EAD1 bne .L339 5961 0064 0399 ldr r1, [sp, #12] 5962 .LVL940: ARM GAS /tmp/ccJrAs6S.s page 318 5963 0066 C1EB8173 rsb r3, r1, r1, lsl #30 5964 .LVL941: 5965 006a 02EB8302 add r2, r2, r3, lsl #2 5966 006e 169B ldr r3, [sp, #88] 5967 0070 03EBC103 add r3, r3, r1, lsl #3 5968 .LVL942: 5969 .L338: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** *pScr2++ = x4; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Decrement loop counter */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** k--; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* If the count is not a multiple of 4, copy remaining samples here. 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** ** No loop unrolling is used. */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** k = srcBLen % 0x4U; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** while (k > 0U) 5970 .loc 24 133 0 5971 0074 0599 ldr r1, [sp, #20] 5972 0076 11F00300 ands r0, r1, #3 5973 .LVL943: 5974 007a 0190 str r0, [sp, #4] 5975 007c 0CD0 beq .L340 5976 .LVL944: 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* copy second buffer in reversal manner for remaining samples */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x4 = (q15_t) *px--; 5977 .loc 24 136 0 5978 007e 92F90010 ldrsb r1, [r2] 5979 0082 1980 strh r1, [r3] @ movhi 5980 .LVL945: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 5981 .loc 24 133 0 5982 0084 0128 cmp r0, #1 5983 0086 07D0 beq .L340 5984 .LVL946: 5985 .loc 24 136 0 5986 0088 12F9011C ldrsb r1, [r2, #-1] 5987 008c 5980 strh r1, [r3, #2] @ movhi 5988 .LVL947: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 5989 .loc 24 133 0 5990 008e 0228 cmp r0, #2 5991 .LVL948: 5992 .loc 24 136 0 5993 0090 1CBF itt ne 5994 0092 12F9022C ldrsbne r2, [r2, #-2] 5995 .LVL949: 5996 0096 9A80 strhne r2, [r3, #4] @ movhi 5997 .LVL950: 5998 .L340: 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** *pScr2++ = x4; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Decrement loop counter */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** k--; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } ARM GAS /tmp/ccJrAs6S.s page 319 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Fill (srcBLen - 1U) zeros in scratch buffer */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 5999 .loc 24 144 0 6000 0098 1599 ldr r1, [sp, #84] 6001 009a 3246 mov r2, r6 6002 009c 0020 movs r0, #0 6003 009e FFF7FEFF bl arm_fill_q15 6004 .LVL951: 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Update temporary scratch pointer */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pScr1 += (srcBLen - 1U); 6005 .loc 24 147 0 6006 00a2 059B ldr r3, [sp, #20] 6007 00a4 03F10041 add r1, r3, #-2147483648 6008 00a8 159B ldr r3, [sp, #84] 6009 00aa 0139 subs r1, r1, #1 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Copy (srcALen) samples in scratch buffer */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Apply loop unrolling and do 4 Copies simultaneously. */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** k = srcALen >> 2U; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* First part of the processing with loop unrolling copies 4 data points at a time. 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** ** a second loop below copies for the remaining 1 to 3 samples. */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** while (k > 0U) 6010 .loc 24 155 0 6011 00ac 5FEA940C lsrs ip, r4, #2 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6012 .loc 24 147 0 6013 00b0 03EB4101 add r1, r3, r1, lsl #1 6014 .LVL952: 6015 .loc 24 155 0 6016 00b4 1ED0 beq .L341 6017 00b6 2B1D adds r3, r5, #4 6018 00b8 4FEA8C0E lsl lr, ip, #2 6019 00bc 03EB0E07 add r7, r3, lr 6020 00c0 01F10802 add r2, r1, #8 6021 .LVL953: 6022 .L342: 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* copy second buffer in reversal manner */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x4 = (q15_t) *pIn1++; 6023 .loc 24 158 0 6024 00c4 13F9040C ldrsb r0, [r3, #-4] 6025 00c8 22F8080C strh r0, [r2, #-8] @ movhi 6026 .LVL954: 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** *pScr1++ = x4; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x4 = (q15_t) *pIn1++; 6027 .loc 24 160 0 6028 00cc 13F9030C ldrsb r0, [r3, #-3] 6029 00d0 22F8060C strh r0, [r2, #-6] @ movhi 6030 .LVL955: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** *pScr1++ = x4; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x4 = (q15_t) *pIn1++; 6031 .loc 24 162 0 6032 00d4 13F9020C ldrsb r0, [r3, #-2] 6033 00d8 22F8040C strh r0, [r2, #-4] @ movhi ARM GAS /tmp/ccJrAs6S.s page 320 6034 .LVL956: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** *pScr1++ = x4; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x4 = (q15_t) *pIn1++; 6035 .loc 24 164 0 6036 00dc 13F9010C ldrsb r0, [r3, #-1] 6037 00e0 22F8020C strh r0, [r2, #-2] @ movhi 6038 .LVL957: 6039 00e4 0433 adds r3, r3, #4 6040 .LVL958: 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6041 .loc 24 155 0 6042 00e6 9F42 cmp r7, r3 6043 00e8 02F10802 add r2, r2, #8 6044 .LVL959: 6045 00ec EAD1 bne .L342 6046 00ee 7544 add r5, r5, lr 6047 00f0 01EBCC01 add r1, r1, ip, lsl #3 6048 .LVL960: 6049 .L341: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** *pScr1++ = x4; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Decrement loop counter */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** k--; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* If the count is not a multiple of 4, copy remaining samples here. 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** ** No loop unrolling is used. */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** k = srcALen % 0x4U; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** while (k > 0U) 6050 .loc 24 175 0 6051 00f4 14F00303 ands r3, r4, #3 6052 .LVL961: 6053 00f8 0ED0 beq .L343 6054 .LVL962: 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* copy second buffer in reversal manner for remaining samples */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x4 = (q15_t) * pIn1++; 6055 .loc 24 178 0 6056 00fa 95F90020 ldrsb r2, [r5] 6057 00fe 0A80 strh r2, [r1] @ movhi 6058 .LVL963: 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6059 .loc 24 175 0 6060 0100 012B cmp r3, #1 6061 0102 07D0 beq .L344 6062 .LVL964: 6063 .loc 24 178 0 6064 0104 95F90120 ldrsb r2, [r5, #1] 6065 0108 4A80 strh r2, [r1, #2] @ movhi 6066 .LVL965: 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6067 .loc 24 175 0 6068 010a 022B cmp r3, #2 6069 .LVL966: 6070 .loc 24 178 0 6071 010c 1CBF itt ne ARM GAS /tmp/ccJrAs6S.s page 321 6072 010e 95F90220 ldrsbne r2, [r5, #2] 6073 0112 8A80 strhne r2, [r1, #4] @ movhi 6074 .LVL967: 6075 .L344: 6076 0114 01EB4301 add r1, r1, r3, lsl #1 6077 .L343: 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** *pScr1++ = x4; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Decrement the loop counter */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** k--; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 6078 .loc 24 186 0 6079 0118 3246 mov r2, r6 6080 011a 0020 movs r0, #0 6081 011c FFF7FEFF bl arm_fill_q15 6082 .LVL968: 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Update pointer */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pScr1 += (srcBLen - 1U); 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Temporary pointer for scratch2 */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** py = pScratch2; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Initialization of pIn2 pointer */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pIn2 = (q7_t *) py; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pScr2 = py; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Actual convolution process starts here */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** blkCnt = (srcALen + srcBLen - 1U) >> 2U; 6083 .loc 24 200 0 6084 0120 059B ldr r3, [sp, #20] 6085 0122 1C44 add r4, r4, r3 6086 .LVL969: 6087 0124 631E subs r3, r4, #1 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** while (blkCnt > 0) 6088 .loc 24 202 0 6089 0126 9A08 lsrs r2, r3, #2 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6090 .loc 24 200 0 6091 0128 0893 str r3, [sp, #32] 6092 .LVL970: 6093 .loc 24 202 0 6094 012a 0992 str r2, [sp, #36] 6095 012c 00F0FA80 beq .L357 6096 0130 039B ldr r3, [sp, #12] 6097 0132 1699 ldr r1, [sp, #88] 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Initialze temporary scratch pointer as scratch1 */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pScr1 = pScratch1; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Clear Accumlators */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc0 = 0; ARM GAS /tmp/ccJrAs6S.s page 322 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc1 = 0; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc2 = 0; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc3 = 0; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Read two samples from scratch1 buffer */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x1 = read_q15x2_ia (&pScr1); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Read next two samples from scratch1 buffer */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x2 = read_q15x2_ia (&pScr1); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** tapCnt = (srcBLen) >> 2U; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** while (tapCnt > 0U) 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Read four samples from smaller buffer */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** y1 = read_q15x2_ia (&pScr2); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* multiply and accumlate */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc0 = __SMLAD(x1, y1, acc0); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc2 = __SMLAD(x2, y1, acc2); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* pack input data */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** #ifndef ARM_MATH_BIG_ENDIAN 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x3 = __PKHBT(x2, x1, 0); 6098 .loc 24 232 0 6099 0134 DFF8F8A1 ldr r10, .L399 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6100 .loc 24 202 0 6101 0138 DDF85490 ldr r9, [sp, #84] 6102 013c DB00 lsls r3, r3, #3 6103 013e 1944 add r1, r1, r3 6104 0140 0833 adds r3, r3, #8 6105 0142 0793 str r3, [sp, #28] 6106 0144 149B ldr r3, [sp, #80] 6107 0146 0691 str r1, [sp, #24] 6108 0148 03EB8203 add r3, r3, r2, lsl #2 6109 014c 0493 str r3, [sp, #16] 6110 .LVL971: 6111 .L349: 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6112 .loc 24 221 0 6113 014e 039A ldr r2, [sp, #12] 6114 .LBB1262: 6115 .LBB1263: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6116 .loc 3 928 0 6117 0150 D9F80010 ldr r1, [r9] @ unaligned 6118 .LVL972: 6119 .LBE1263: 6120 .LBE1262: 6121 .LBB1264: 6122 .LBB1265: 6123 0154 D9F80450 ldr r5, [r9, #4] @ unaligned 6124 .LVL973: 6125 0158 09F10803 add r3, r9, #8 6126 .LVL974: 6127 015c 0293 str r3, [sp, #8] ARM GAS /tmp/ccJrAs6S.s page 323 6128 015e 1F46 mov r7, r3 6129 .LBE1265: 6130 .LBE1264: 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6131 .loc 24 221 0 6132 0160 002A cmp r2, #0 6133 0162 00F0D580 beq .L358 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6134 .loc 24 211 0 6135 0166 0023 movs r3, #0 6136 .LVL975: 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6137 .loc 24 221 0 6138 0168 DDF858C0 ldr ip, [sp, #88] 6139 016c CB46 mov fp, r9 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc3 = 0; 6140 .loc 24 210 0 6141 016e 9846 mov r8, r3 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc2 = 0; 6142 .loc 24 209 0 6143 0170 1846 mov r0, r3 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc1 = 0; 6144 .loc 24 208 0 6145 0172 1E46 mov r6, r3 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6146 .loc 24 221 0 6147 0174 9146 mov r9, r2 6148 .LVL976: 6149 .L347: 6150 .LBB1266: 6151 .LBB1267: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6152 .loc 3 928 0 6153 0176 DCF80020 ldr r2, [ip] @ unaligned 6154 .LVL977: 6155 .LBE1267: 6156 .LBE1266: 6157 .LBB1268: 6158 .LBB1269: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6159 .loc 6 1993 0 6160 .syntax unified 6161 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6162 017a 21FB0266 smlad r6, r1, r2, r6 6163 @ 0 "" 2 6164 .LVL978: 6165 .thumb 6166 .syntax unified 6167 .LBE1269: 6168 .LBE1268: 6169 .LBB1270: 6170 .LBB1271: 6171 .syntax unified 6172 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6173 017e 25FB0288 smlad r8, r5, r2, r8 6174 @ 0 "" 2 6175 .LVL979: ARM GAS /tmp/ccJrAs6S.s page 324 6176 .thumb 6177 .syntax unified 6178 .LBE1271: 6179 .LBE1270: 6180 .loc 24 232 0 6181 0182 01EA0A01 and r1, r1, r10 6182 .LVL980: 6183 0186 1FFA85FE uxth lr, r5 6184 018a 4EEA0101 orr r1, lr, r1 6185 .LBB1272: 6186 .LBB1273: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6187 .loc 6 2001 0 6188 .syntax unified 6189 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6190 018e 21FB1200 smladx r0, r1, r2, r0 6191 @ 0 "" 2 6192 .LVL981: 6193 .thumb 6194 .syntax unified 6195 .LBE1273: 6196 .LBE1272: 6197 .LBB1274: 6198 .LBB1275: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6199 .loc 3 928 0 6200 0192 3968 ldr r1, [r7] @ unaligned 6201 .LVL982: 6202 .LBE1275: 6203 .LBE1274: 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** #else 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x3 = __PKHBT(x1, x2, 0); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** #endif 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* multiply and accumlate */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc1 = __SMLADX(x3, y1, acc1); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Read next two samples from scratch1 buffer */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x1 = read_q15x2_ia (&pScr1); 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* pack input data */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** #ifndef ARM_MATH_BIG_ENDIAN 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x3 = __PKHBT(x1, x2, 0); 6204 .loc 24 245 0 6205 0194 05EA0A04 and r4, r5, r10 6206 0198 1FFA81FE uxth lr, r1 6207 019c 4EEA040E orr lr, lr, r4 6208 .LVL983: 6209 .LBB1276: 6210 .LBB1277: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6211 .loc 6 2001 0 6212 .syntax unified 6213 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6214 01a0 2EFB1232 smladx r2, lr, r2, r3 6215 @ 0 "" 2 6216 .LVL984: ARM GAS /tmp/ccJrAs6S.s page 325 6217 .thumb 6218 .syntax unified 6219 .LBE1277: 6220 .LBE1276: 6221 .LBB1278: 6222 .LBB1279: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6223 .loc 3 928 0 6224 01a4 DCF80440 ldr r4, [ip, #4] @ unaligned 6225 .LVL985: 6226 01a8 0CF1080C add ip, ip, #8 6227 .LVL986: 6228 .LBE1279: 6229 .LBE1278: 6230 .LBB1281: 6231 .LBB1282: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6232 .loc 6 1993 0 6233 .syntax unified 6234 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6235 01ac 25FB0466 smlad r6, r5, r4, r6 6236 @ 0 "" 2 6237 .LVL987: 6238 .thumb 6239 .syntax unified 6240 .LBE1282: 6241 .LBE1281: 6242 .LBB1283: 6243 .LBB1284: 6244 .syntax unified 6245 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6246 01b0 21FB0488 smlad r8, r1, r4, r8 6247 @ 0 "" 2 6248 .LVL988: 6249 .thumb 6250 .syntax unified 6251 .LBE1284: 6252 .LBE1283: 6253 .LBB1285: 6254 .LBB1286: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6255 .loc 6 2001 0 6256 .syntax unified 6257 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6258 01b4 2EFB1400 smladx r0, lr, r4, r0 6259 @ 0 "" 2 6260 .LVL989: 6261 .thumb 6262 .syntax unified 6263 .LBE1286: 6264 .LBE1285: 6265 .LBB1287: 6266 .LBB1288: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6267 .loc 3 928 0 6268 01b8 7D68 ldr r5, [r7, #4] @ unaligned 6269 .LVL990: ARM GAS /tmp/ccJrAs6S.s page 326 6270 .LBE1288: 6271 .LBE1287: 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** #else 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x3 = __PKHBT(x2, x1, 0); 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** #endif 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc3 = __SMLADX(x3, y1, acc3); 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Read four samples from smaller buffer */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** y1 = read_q15x2_ia (&pScr2); 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc0 = __SMLAD(x2, y1, acc0); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc2 = __SMLAD(x1, y1, acc2); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc1 = __SMLADX(x3, y1, acc1); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x2 = read_q15x2_ia (&pScr1); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** #ifndef ARM_MATH_BIG_ENDIAN 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x3 = __PKHBT(x2, x1, 0); 6272 .loc 24 264 0 6273 01ba 01EA0A0E and lr, r1, r10 6274 .LVL991: 6275 01be ABB2 uxth r3, r5 6276 01c0 0837 adds r7, r7, #8 6277 .LVL992: 6278 01c2 43EA0E03 orr r3, r3, lr 6279 .LBB1289: 6280 .LBB1290: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6281 .loc 6 2001 0 6282 .syntax unified 6283 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6284 01c6 23FB1423 smladx r3, r3, r4, r2 6285 @ 0 "" 2 6286 .LVL993: 6287 .thumb 6288 .syntax unified 6289 .LBE1290: 6290 .LBE1289: 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6291 .loc 24 221 0 6292 01ca B9F10109 subs r9, r9, #1 6293 .LVL994: 6294 01ce D2D1 bne .L347 6295 01d0 079A ldr r2, [sp, #28] 6296 .LBB1291: 6297 .LBB1280: 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 6298 .loc 3 933 0 6299 01d2 0699 ldr r1, [sp, #24] 6300 .LVL995: 6301 01d4 0BEB0207 add r7, fp, r2 6302 .LVL996: 6303 .L346: 6304 .LBE1280: ARM GAS /tmp/ccJrAs6S.s page 327 6305 .LBE1291: 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** #else 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** x3 = __PKHBT(x1, x2, 0); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** #endif 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc3 = __SMLADX(x3, y1, acc3); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Decrement loop counter */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** tapCnt--; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Update scratch pointer for remaining samples of smaller length sequence */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pScr1 -= 4U; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* apply same above for remaining samples of smaller length sequence */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** tapCnt = (srcBLen) & 3U; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** while (tapCnt > 0U) 6306 .loc 24 281 0 6307 01d8 019A ldr r2, [sp, #4] 6308 01da 72B3 cbz r2, .L348 6309 .LVL997: 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* accumlate the results */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc0 += (*pScr1++ * *pScr2); 6310 .loc 24 284 0 6311 01dc B1F90020 ldrsh r2, [r1] 6312 01e0 37F808EC ldrh lr, [r7, #-8] 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 6313 .loc 24 285 0 6314 01e4 37F906CC ldrsh ip, [r7, #-6] 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc2 += (*pScr1++ * *pScr2); 6315 .loc 24 286 0 6316 01e8 37F9045C ldrsh r5, [r7, #-4] 6317 .LVL998: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc3 += (*pScr1++ * *pScr2++); 6318 .loc 24 287 0 6319 01ec 37F9024C ldrsh r4, [r7, #-2] 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 6320 .loc 24 284 0 6321 01f0 1EFB0266 smlabb r6, lr, r2, r6 6322 .LVL999: 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc2 += (*pScr1++ * *pScr2); 6323 .loc 24 285 0 6324 01f4 02FB0C00 mla r0, r2, ip, r0 6325 .LVL1000: 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc3 += (*pScr1++ * *pScr2++); 6326 .loc 24 286 0 6327 01f8 02FB0588 mla r8, r2, r5, r8 6328 .LVL1001: 6329 .loc 24 287 0 6330 01fc 02FB0433 mla r3, r2, r4, r3 6331 .LVL1002: 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6332 .loc 24 281 0 6333 0200 019A ldr r2, [sp, #4] 6334 0202 012A cmp r2, #1 ARM GAS /tmp/ccJrAs6S.s page 328 6335 0204 19D0 beq .L348 6336 .LVL1003: 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 6337 .loc 24 284 0 6338 0206 B1F90220 ldrsh r2, [r1, #2] 6339 .loc 24 287 0 6340 020a B7F900E0 ldrsh lr, [r7] 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 6341 .loc 24 284 0 6342 020e 0CFB0266 mla r6, ip, r2, r6 6343 .LVL1004: 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc2 += (*pScr1++ * *pScr2); 6344 .loc 24 285 0 6345 0212 05FB0200 mla r0, r5, r2, r0 6346 .LVL1005: 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc3 += (*pScr1++ * *pScr2++); 6347 .loc 24 286 0 6348 0216 04FB0288 mla r8, r4, r2, r8 6349 .LVL1006: 6350 .loc 24 287 0 6351 021a 02FB0E33 mla r3, r2, lr, r3 6352 .LVL1007: 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6353 .loc 24 281 0 6354 021e 019A ldr r2, [sp, #4] 6355 0220 022A cmp r2, #2 6356 0222 0AD0 beq .L348 6357 .LVL1008: 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 6358 .loc 24 284 0 6359 0224 B1F90420 ldrsh r2, [r1, #4] 6360 .loc 24 287 0 6361 0228 7988 ldrh r1, [r7, #2] 6362 .LVL1009: 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 6363 .loc 24 284 0 6364 022a 05FB0266 mla r6, r5, r2, r6 6365 .LVL1010: 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc2 += (*pScr1++ * *pScr2); 6366 .loc 24 285 0 6367 022e 04FB0200 mla r0, r4, r2, r0 6368 .LVL1011: 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc3 += (*pScr1++ * *pScr2++); 6369 .loc 24 286 0 6370 0232 0EFB0288 mla r8, lr, r2, r8 6371 .LVL1012: 6372 .loc 24 287 0 6373 0236 12FB0133 smlabb r3, r2, r1, r3 6374 .LVL1013: 6375 .L348: 6376 .LBB1292: 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pScr1 -= 3U; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Decrement loop counter */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** tapCnt--; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } ARM GAS /tmp/ccJrAs6S.s page 329 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** blkCnt--; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** out0 = (q7_t) (__SSAT(acc0 >> 7U, 8)); 6377 .loc 24 298 0 6378 023a F611 asrs r6, r6, #7 6379 .LVL1014: 6380 .LBE1292: 6381 .LBB1293: 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** out1 = (q7_t) (__SSAT(acc1 >> 7U, 8)); 6382 .loc 24 299 0 6383 023c C111 asrs r1, r0, #7 6384 .LBE1293: 6385 .LBB1294: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** out1 = (q7_t) (__SSAT(acc1 >> 7U, 8)); 6386 .loc 24 298 0 6387 .syntax unified 6388 @ 298 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c" 1 6389 023e 06F30706 ssat r6, #8, r6 6390 @ 0 "" 2 6391 .LVL1015: 6392 .thumb 6393 .syntax unified 6394 .LBE1294: 6395 .LBB1295: 6396 .loc 24 299 0 6397 .syntax unified 6398 @ 299 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c" 1 6399 0242 01F30701 ssat r1, #8, r1 6400 @ 0 "" 2 6401 .LVL1016: 6402 .thumb 6403 .syntax unified 6404 .LBE1295: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** out2 = (q7_t) (__SSAT(acc2 >> 7U, 8)); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** out3 = (q7_t) (__SSAT(acc3 >> 7U, 8)); 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3)); 6405 .loc 24 303 0 6406 0246 F6B2 uxtb r6, r6 6407 .LVL1017: 6408 0248 0902 lsls r1, r1, #8 6409 .LVL1018: 6410 .LBB1296: 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6411 .loc 24 301 0 6412 024a DB11 asrs r3, r3, #7 6413 .LVL1019: 6414 .LBE1296: 6415 .loc 24 303 0 6416 024c 01F47F41 and r1, r1, #65280 6417 .LBB1297: 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6418 .loc 24 301 0 6419 .syntax unified 6420 @ 301 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c" 1 ARM GAS /tmp/ccJrAs6S.s page 330 6421 0250 03F30702 ssat r2, #8, r3 6422 @ 0 "" 2 6423 .thumb 6424 .syntax unified 6425 .LBE1297: 6426 .LBB1298: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** out2 = (q7_t) (__SSAT(acc2 >> 7U, 8)); 6427 .loc 24 300 0 6428 0254 4FEAE818 asr r8, r8, #7 6429 .LVL1020: 6430 .LBE1298: 6431 .loc 24 303 0 6432 0258 46EA0266 orr r6, r6, r2, lsl #24 6433 .LVL1021: 6434 .LBB1299: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** out2 = (q7_t) (__SSAT(acc2 >> 7U, 8)); 6435 .loc 24 300 0 6436 .syntax unified 6437 @ 300 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c" 1 6438 025c 08F30708 ssat r8, #8, r8 6439 @ 0 "" 2 6440 .LVL1022: 6441 .thumb 6442 .syntax unified 6443 .LBE1299: 6444 .loc 24 303 0 6445 0260 4FEA0843 lsl r3, r8, #16 6446 .LBB1300: 6447 .LBB1301: 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6448 .loc 3 1052 0 6449 0264 149A ldr r2, [sp, #80] 6450 .LVL1023: 6451 .LBE1301: 6452 .LBE1300: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Initialization of inputB pointer */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pScr2 = py; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pScratch1 += 4U; 6453 .loc 24 308 0 6454 0266 DDF80890 ldr r9, [sp, #8] 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6455 .loc 24 303 0 6456 026a 03F47F03 and r3, r3, #16711680 6457 026e 3143 orrs r1, r1, r6 6458 0270 0B43 orrs r3, r3, r1 6459 .LBB1303: 6460 .LBB1302: 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6461 .loc 3 1052 0 6462 0272 42F8043B str r3, [r2], #4 @ unaligned 6463 0276 1346 mov r3, r2 6464 0278 1492 str r2, [sp, #80] 6465 .LVL1024: 6466 .LBE1302: 6467 .LBE1303: ARM GAS /tmp/ccJrAs6S.s page 331 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6468 .loc 24 202 0 6469 027a 049A ldr r2, [sp, #16] 6470 .LVL1025: 6471 027c 9342 cmp r3, r2 6472 027e 7FF466AF bne .L349 6473 0282 159B ldr r3, [sp, #84] 6474 .LVL1026: 6475 0284 099A ldr r2, [sp, #36] 6476 0286 03EBC203 add r3, r3, r2, lsl #3 6477 028a 1593 str r3, [sp, #84] 6478 .LVL1027: 6479 .L345: 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** blkCnt = (srcALen + srcBLen - 1U) & 0x3; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Calculate convolution for remaining samples of Bigger length sequence */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** while (blkCnt > 0) 6480 .loc 24 314 0 6481 028c 089B ldr r3, [sp, #32] 6482 028e 13F0030C ands ip, r3, #3 6483 .LVL1028: 6484 0292 3AD0 beq .L336 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Initialze temporary scratch pointer as scratch1 */ 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pScr1 = pScratch1; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Clear Accumlators */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc0 = 0; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** tapCnt = (srcBLen) >> 1U; 6485 .loc 24 322 0 6486 0294 059B ldr r3, [sp, #20] 6487 0296 049A ldr r2, [sp, #16] 6488 0298 DDF854A0 ldr r10, [sp, #84] 6489 029c 4FEA530E lsr lr, r3, #1 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** while (tapCnt > 0U) 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc0 += (*pScr1++ * *pScr2++); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc0 += (*pScr1++ * *pScr2++); 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Decrement loop counter */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** tapCnt--; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** tapCnt = (srcBLen) & 1U; 6490 .loc 24 333 0 6491 02a0 03F00107 and r7, r3, #1 6492 02a4 169B ldr r3, [sp, #88] 6493 02a6 4FEA8E08 lsl r8, lr, #2 6494 02aa 9444 add ip, ip, r2 6495 .LVL1029: 6496 02ac 03EB0809 add r9, r3, r8 6497 02b0 9346 mov fp, r2 6498 .LVL1030: ARM GAS /tmp/ccJrAs6S.s page 332 6499 .L351: 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6500 .loc 24 324 0 6501 02b2 BEF1000F cmp lr, #0 6502 02b6 31D0 beq .L359 6503 02b8 169B ldr r3, [sp, #88] 6504 02ba 0AF10404 add r4, r10, #4 6505 02be 181D adds r0, r3, #4 6506 02c0 7546 mov r5, lr 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6507 .loc 24 320 0 6508 02c2 0023 movs r3, #0 6509 .LVL1031: 6510 .L353: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc0 += (*pScr1++ * *pScr2++); 6511 .loc 24 326 0 6512 02c4 34F8042C ldrh r2, [r4, #-4] 6513 02c8 30F8046C ldrh r6, [r0, #-4] 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6514 .loc 24 327 0 6515 02cc 34F8021C ldrh r1, [r4, #-2] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc0 += (*pScr1++ * *pScr2++); 6516 .loc 24 326 0 6517 02d0 12FB0633 smlabb r3, r2, r6, r3 6518 .LVL1032: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6519 .loc 24 327 0 6520 02d4 30F8022C ldrh r2, [r0, #-2] 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6521 .loc 24 324 0 6522 02d8 013D subs r5, r5, #1 6523 .LVL1033: 6524 02da 04F10404 add r4, r4, #4 6525 .LVL1034: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6526 .loc 24 327 0 6527 02de 11FB0233 smlabb r3, r1, r2, r3 6528 .LVL1035: 6529 02e2 00F10400 add r0, r0, #4 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6530 .loc 24 324 0 6531 02e6 EDD1 bne .L353 6532 02e8 0AEB0802 add r2, r10, r8 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6533 .loc 24 327 0 6534 02ec 4946 mov r1, r9 6535 .LVL1036: 6536 .L352: 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* apply same above for remaining samples of smaller length sequence */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** while (tapCnt > 0U) 6537 .loc 24 336 0 6538 02ee 1FB1 cbz r7, .L354 6539 .LVL1037: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* accumlate the results */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc0 += (*pScr1++ * *pScr2++); ARM GAS /tmp/ccJrAs6S.s page 333 6540 .loc 24 339 0 6541 02f0 1288 ldrh r2, [r2] 6542 .LVL1038: 6543 02f2 0988 ldrh r1, [r1] 6544 .LVL1039: 6545 02f4 12FB0133 smlabb r3, r2, r1, r3 6546 .LVL1040: 6547 .L354: 6548 .LBB1304: 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Decrement loop counter */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** tapCnt--; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** blkCnt--; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8)); 6549 .loc 24 348 0 6550 02f8 DB11 asrs r3, r3, #7 6551 .LVL1041: 6552 .syntax unified 6553 @ 348 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c" 1 6554 02fa 03F30703 ssat r3, #8, r3 6555 @ 0 "" 2 6556 .LVL1042: 6557 .thumb 6558 .syntax unified 6559 .LBE1304: 6560 02fe 0BF8013B strb r3, [fp], #1 6561 .LVL1043: 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6562 .loc 24 314 0 6563 0302 E345 cmp fp, ip 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** /* Initialization of inputB pointer */ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pScr2 = py; 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** pScratch1 += 1U; 6564 .loc 24 353 0 6565 0304 0AF1020A add r10, r10, #2 6566 .LVL1044: 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6567 .loc 24 314 0 6568 0308 D3D1 bne .L351 6569 .LVL1045: 6570 .L336: 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** } 6571 .loc 24 356 0 6572 030a 0BB0 add sp, sp, #44 6573 .LCFI55: 6574 .cfi_remember_state 6575 .cfi_def_cfa_offset 36 6576 @ sp needed 6577 030c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} ARM GAS /tmp/ccJrAs6S.s page 334 6578 .LVL1046: 6579 .L358: 6580 .LCFI56: 6581 .cfi_restore_state 6582 0310 1646 mov r6, r2 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6583 .loc 24 221 0 6584 0312 1699 ldr r1, [sp, #88] 6585 .LVL1047: 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6586 .loc 24 211 0 6587 0314 1346 mov r3, r2 6588 .LVL1048: 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc3 = 0; 6589 .loc 24 210 0 6590 0316 9046 mov r8, r2 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** acc2 = 0; 6591 .loc 24 209 0 6592 0318 1046 mov r0, r2 6593 031a 5DE7 b .L346 6594 .LVL1049: 6595 .L359: 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** { 6596 .loc 24 324 0 6597 031c 1699 ldr r1, [sp, #88] 6598 031e 5246 mov r2, r10 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** 6599 .loc 24 320 0 6600 0320 7346 mov r3, lr 6601 0322 E4E7 b .L352 6602 .LVL1050: 6603 .L357: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q7_t out0, out1, out2, out3; /* Temporary variables */ 6604 .loc 24 77 0 6605 0324 149B ldr r3, [sp, #80] 6606 0326 0493 str r3, [sp, #16] 6607 0328 B0E7 b .L345 6608 .LVL1051: 6609 .L356: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c **** q15_t x4; /* Temporary input variable */ 6610 .loc 24 69 0 6611 032a 169B ldr r3, [sp, #88] 6612 032c A2E6 b .L338 6613 .L400: 6614 032e 00BF .align 2 6615 .L399: 6616 0330 0000FFFF .word -65536 6617 .cfi_endproc 6618 .LFE169: 6620 .section .text.arm_conv_partial_f32,"ax",%progbits 6621 .align 1 6622 .p2align 2,,3 6623 .global arm_conv_partial_f32 6624 .syntax unified 6625 .thumb 6626 .thumb_func 6627 .fpu fpv4-sp-d16 ARM GAS /tmp/ccJrAs6S.s page 335 6629 arm_conv_partial_f32: 6630 .LFB170: 6631 .file 25 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Title: arm_conv_partial_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Description: Partial convolution of floating-point sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @defgroup PartialConv Partial Convolution 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** Partial Convolution is equivalent to Convolution except that a subset of the output samples is ge 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** Each function has two additional arguments. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** firstIndex specifies the starting index of the subset of output samples. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** numPoints is the number of output samples to compute. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** The function computes the output in the range 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** [firstIndex, ..., firstIndex+numPoints-1]. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** The output array pDst contains numPoints values. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** The allowable range of output indices is [0 srcALen+srcBLen-2]. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_E 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** Otherwise the functions return ARM_MATH_SUCCESS. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** \note Refer to \ref arm_conv_f32() for details on fixed point behavior. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @par Fast Versions 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** Fast versions are supported for Q31 and Q15 of partial convolution. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and th 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** the input signals should be scaled down to avoid intermediate overflows. ARM GAS /tmp/ccJrAs6S.s page 336 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @par Opt Versions 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer f 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** These versions are optimised in cycles and consumes more memory (Scratch memory) 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @addtogroup PartialConv 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @{ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @brief Partial convolution of floating-point sequences. 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @param[in] pSrcA points to the first input sequence 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @param[in] srcALen length of the first input sequence 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @param[in] pSrcB points to the second input sequence 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @param[in] srcBLen length of the second input sequence 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @param[out] pDst points to the location where the output result is written 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @param[in] firstIndex is the first output sample to start with 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @param[in] numPoints is the number of output points to be computed 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** @return execution status 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** arm_status arm_conv_partial_f32( 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** const float32_t * pSrcA, 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** uint32_t srcALen, 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** const float32_t * pSrcB, 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** uint32_t srcBLen, 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** float32_t * pDst, 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** uint32_t firstIndex, 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** uint32_t numPoints) 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6632 .loc 25 88 0 6633 .cfi_startproc 6634 @ args = 12, pretend = 0, frame = 8 6635 @ frame_needed = 0, uses_anonymous_args = 0 6636 .LVL1052: 6637 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 6638 .LCFI57: 6639 .cfi_def_cfa_offset 36 6640 .cfi_offset 4, -36 6641 .cfi_offset 5, -32 6642 .cfi_offset 6, -28 6643 .cfi_offset 7, -24 6644 .cfi_offset 8, -20 6645 .cfi_offset 9, -16 6646 .cfi_offset 10, -12 6647 .cfi_offset 11, -8 6648 .cfi_offset 14, -4 6649 0004 83B0 sub sp, sp, #12 6650 .LCFI58: 6651 .cfi_def_cfa_offset 48 6652 0006 4C1E subs r4, r1, #1 6653 .loc 25 88 0 6654 0008 0E46 mov r6, r1 ARM GAS /tmp/ccJrAs6S.s page 337 6655 000a DDF834E0 ldr lr, [sp, #52] 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #if defined (ARM_MATH_DSP) 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** const float32_t *pIn1 = pSrcA; /* InputA pointer */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** const float32_t *pIn2 = pSrcB; /* InputB pointer */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** float32_t *pOut = pDst; /* Output pointer */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** const float32_t *px; /* Intermediate inputA pointer */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** const float32_t *py; /* Intermediate inputB pointer */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** const float32_t *pSrc1, *pSrc2; /* Intermediate pointers */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** float32_t sum; /* Accumulator */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** uint32_t j, k, count, blkCnt, check; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** arm_status status; /* Status of Partial convolution */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** float32_t acc0, acc1, acc2, acc3; /* Accumulator */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** float32_t x0, x1, x2, x3, c0; /* Temporary variables */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #endif 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Check for range of output samples to be calculated */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) 6656 .loc 25 107 0 6657 000e 0E99 ldr r1, [sp, #56] 6658 .LVL1053: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #if defined (ARM_MATH_DSP) 6659 .loc 25 88 0 6660 0010 0090 str r0, [sp] 6661 .loc 25 107 0 6662 0012 E518 adds r5, r4, r3 6663 0014 7144 add r1, lr, r1 6664 .LVL1054: 6665 0016 A942 cmp r1, r5 6666 0018 00F2F280 bhi .L430 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** status = ARM_MATH_ARGUMENT_ERROR; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** else 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* srcB is always made to slide across srcA. */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** if (srcALen >= srcBLen) 6667 .loc 25 117 0 6668 001c B342 cmp r3, r6 6669 001e 9046 mov r8, r2 6670 0020 07D8 bhi .L403 6671 0022 0746 mov r7, r0 6672 0024 1046 mov r0, r2 6673 .LVL1055: 6674 0026 1A46 mov r2, r3 6675 .LVL1056: 6676 0028 5C1E subs r4, r3, #1 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Initialization of inputA pointer */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** pIn1 = pSrcA; 6677 .loc 25 120 0 6678 002a B846 mov r8, r7 ARM GAS /tmp/ccJrAs6S.s page 338 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6679 .loc 25 117 0 6680 002c 3346 mov r3, r6 6681 .LVL1057: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Initialization of inputB pointer */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** pIn2 = pSrcB; 6682 .loc 25 123 0 6683 002e 0090 str r0, [sp] 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6684 .loc 25 117 0 6685 0030 1646 mov r6, r2 6686 .LVL1058: 6687 .L403: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** else 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Initialization of inputA pointer */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** pIn1 = pSrcB; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Initialization of inputB pointer */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** pIn2 = pSrcA; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** j = srcBLen; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** srcBLen = srcALen; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** srcALen = j; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Conditions to check which loopCounter holds 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * the first and last indices of the output samples to be calculated. */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** check = firstIndex + numPoints; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0; 6688 .loc 25 142 0 6689 0032 9942 cmp r1, r3 6690 0034 D4BF ite le 6691 0036 0027 movle r7, #0 6692 0038 CF1A subgt r7, r1, r3 6693 .LVL1059: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + 6694 .loc 25 143 0 6695 003a 7345 cmp r3, lr 6696 003c DCBF itt le 6697 003e A3EB0E02 suble r2, r3, lr 6698 .LVL1060: 6699 0042 BF18 addle r7, r7, r2 6700 .LVL1061: 6701 0044 0C9D ldr r5, [sp, #48] 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; 6702 .loc 25 144 0 6703 0046 6FEA0E02 mvn r2, lr 6704 .LVL1062: 6705 004a 4FEA8E00 lsl r0, lr, #2 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : numPoints) : 0; 6706 .loc 25 145 0 6707 004e 9219 adds r2, r2, r6 6708 .LVL1063: ARM GAS /tmp/ccJrAs6S.s page 339 6709 0050 0544 add r5, r5, r0 6710 0052 A1EB0709 sub r9, r1, r7 6711 0056 2DD0 beq .L449 6712 .loc 25 145 0 is_stmt 0 discriminator 1 6713 0058 A142 cmp r1, r4 6714 005a 0EF1010C add ip, lr, #1 6715 005e 00F2B980 bhi .L408 6716 .LVL1064: 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blockSize2 = ((int32_t) check - blockSize3) - (blockSize1 + (int32_t) firstIndex); 6717 .loc 25 146 0 is_stmt 1 discriminator 8 6718 0062 7A42 negs r2, r7 6719 0064 0192 str r2, [sp, #4] 6720 .LVL1065: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* The function is internally 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * divided into three stages according to the number of multiplications that has to be 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * taken place between inputA samples and inputB samples. In the first stage of the 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * algorithm, the multiplications increase by one for every iteration. 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * In the third stage of the algorithm, the multiplications decrease by one 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * for every iteration. */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Set the output pointer to point to the firstIndex 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * of the output sample to be calculated. */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** pOut = pDst + firstIndex; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* -------------------------- 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Initializations of stage1 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * -------------------------*/ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* sum = x[0] * y[0] 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * sum = x[0] * y[1] + x[1] * y[0] 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * .... 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** The count variable holds the number of MAC operations performed. 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** Since the partial convolution starts from firstIndex 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** Number of Macs to be performed is firstIndex + 1 */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** count = 1U + firstIndex; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Working pointer of inputA */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** px = pIn1; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Working pointer of inputB */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** pSrc1 = pIn2 + firstIndex; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** py = pSrc1; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* ------------------------ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Stage1 process 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * ----------------------*/ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* The first stage starts here */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (blockSize1 > 0U) ARM GAS /tmp/ccJrAs6S.s page 340 6721 .loc 25 190 0 discriminator 8 6722 0066 0E9A ldr r2, [sp, #56] 6723 .LVL1066: 6724 0068 3AB3 cbz r2, .L407 6725 .LVL1067: 6726 .L409: 6727 006a 009A ldr r2, [sp] 6728 .LVL1068: 6729 006c 0430 adds r0, r0, #4 6730 006e 02EB0009 add r9, r2, r0 6731 0072 0E9A ldr r2, [sp, #56] 6732 0074 02EB0C0B add fp, r2, ip 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blockSize2 = ((int32_t) check - blockSize3) - (blockSize1 + (int32_t) firstIndex); 6733 .loc 25 146 0 6734 0078 1A46 mov r2, r3 6735 007a AA46 mov r10, r5 6736 007c 6346 mov r3, ip 6737 .LVL1069: 6738 007e 9446 mov ip, r2 6739 .LVL1070: 6740 .L411: 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Accumulator is made zero for every iteration */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum = 0.0f; 6741 .loc 25 193 0 6742 0080 DFED617A vldr.32 s15, .L450 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k = count >> 2U; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (k > 0U) 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* x[0] * y[srcBLen - 1] */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* x[1] * y[srcBLen - 2] */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* x[2] * y[srcBLen - 3] */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* x[3] * y[srcBLen - 4] */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement loop counter */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k--; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Loop unrolling: Compute remaining outputs */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k = count % 0x4U; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #else 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Initialize k with number of samples */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k = count; ARM GAS /tmp/ccJrAs6S.s page 341 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (k > 0U) 6743 .loc 25 228 0 6744 0084 53B1 cbz r3, .L412 6745 0086 4846 mov r0, r9 6746 0088 1A46 mov r2, r3 6747 008a 4146 mov r1, r8 6748 .LVL1071: 6749 .L410: 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Perform the multiply-accumulate */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 6750 .loc 25 231 0 6751 008c F1EC016A vldmia.32 r1!, {s13} 6752 .LVL1072: 6753 0090 30ED017A vldmdb.32 r0!, {s14} 6754 .LVL1073: 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6755 .loc 25 228 0 6756 0094 013A subs r2, r2, #1 6757 .LVL1074: 6758 .loc 25 231 0 6759 0096 E6EE877A vfma.f32 s15, s13, s14 6760 .LVL1075: 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6761 .loc 25 228 0 6762 009a F7D1 bne .L410 6763 .LVL1076: 6764 .L412: 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement loop counter */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k--; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** *pOut++ = sum; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** py = ++pSrc1; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** px = pIn1; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Increment MAC count */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** count++; 6765 .loc 25 245 0 6766 009c 0133 adds r3, r3, #1 6767 .LVL1077: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6768 .loc 25 190 0 6769 009e 5B45 cmp r3, fp 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 6770 .loc 25 238 0 6771 00a0 EAEC017A vstmia.32 r10!, {s15} 6772 .LVL1078: 6773 00a4 09F10409 add r9, r9, #4 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { ARM GAS /tmp/ccJrAs6S.s page 342 6774 .loc 25 190 0 6775 00a8 EAD1 bne .L411 6776 00aa 0E9A ldr r2, [sp, #56] 6777 00ac 6346 mov r3, ip 6778 .LVL1079: 6779 00ae 05EB8205 add r5, r5, r2, lsl #2 6780 00b2 02E0 b .L407 6781 .LVL1080: 6782 .L449: 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 6783 .loc 25 146 0 6784 00b4 A9EB0E02 sub r2, r9, lr 6785 00b8 0192 str r2, [sp, #4] 6786 .LVL1081: 6787 .L407: 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement loop counter */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blockSize1--; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* -------------------------- 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Initializations of stage2 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * ------------------------*/ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * .... 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Working pointer of inputA */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) 6788 .loc 25 262 0 6789 00ba AEEB0602 sub r2, lr, r6 6790 00be 002A cmp r2, #0 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** pSrc1 = pIn1 + firstIndex - srcBLen + 1; 6791 .loc 25 264 0 6792 00c0 A4BF itt ge 6793 00c2 0EF1010E addge lr, lr, #1 6794 00c6 AEEB060E subge lr, lr, r6 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** else 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** pSrc1 = pIn1; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** px = pSrc1; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Working pointer of inputB */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** pSrc2 = pIn2 + (srcBLen - 1U); 6795 .loc 25 273 0 6796 00ca 009A ldr r2, [sp] 6797 00cc 06F18049 add r9, r6, #1073741824 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 6798 .loc 25 264 0 6799 00d0 ACBF ite ge 6800 00d2 08EB8E0E addge lr, r8, lr, lsl #2 ARM GAS /tmp/ccJrAs6S.s page 343 6801 .LVL1082: 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 6802 .loc 25 268 0 6803 00d6 C646 movlt lr, r8 6804 .LVL1083: 6805 .loc 25 273 0 6806 00d8 09F1FF39 add r9, r9, #-1 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** py = pSrc2; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* count is index by which the pointer pIn1 to be incremented */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** count = 0U; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* ------------------- 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Stage2 process 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * ------------------*/ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * So, to loop unroll over blockSize2, 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * srcBLen should be greater than or equal to 4 */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** if (srcBLen >= 4U) 6807 .loc 25 286 0 6808 00dc 032E cmp r6, #3 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** py = pSrc2; 6809 .loc 25 273 0 6810 00de 02EB8909 add r9, r2, r9, lsl #2 6811 .LVL1084: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blkCnt = ((uint32_t) blockSize2 >> 2U); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (blkCnt > 0U) 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Set all accumulators to zero */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc0 = 0.0f; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc1 = 0.0f; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc2 = 0.0f; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc3 = 0.0f; 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* read x[0], x[1], x[2] samples */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** x0 = *px++; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** x1 = *px++; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** x2 = *px++; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k = srcBLen >> 2U; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** do 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Read y[srcBLen - 1] sample */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** c0 = *py--; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Read x[3] sample */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** x3 = *px++; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 344 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Perform the multiply-accumulate */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc0 += x[0] * y[srcBLen - 1] */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc0 += x0 * c0; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc1 += x[1] * y[srcBLen - 1] */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc1 += x1 * c0; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc2 += x[2] * y[srcBLen - 1] */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc2 += x2 * c0; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc3 += x[3] * y[srcBLen - 1] */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc3 += x3 * c0; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Read y[srcBLen - 2] sample */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** c0 = *py--; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Read x[4] sample */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** x0 = *px++; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Perform the multiply-accumulate */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc0 += x[1] * y[srcBLen - 2] */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc0 += x1 * c0; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc1 += x[2] * y[srcBLen - 2] */ 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc1 += x2 * c0; 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc2 += x[3] * y[srcBLen - 2] */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc2 += x3 * c0; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc3 += x[4] * y[srcBLen - 2] */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc3 += x0 * c0; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Read y[srcBLen - 3] sample */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** c0 = *py--; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Read x[5] sample */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** x1 = *px++; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Perform the multiply-accumulate */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc0 += x[2] * y[srcBLen - 3] */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc0 += x2 * c0; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc1 += x[3] * y[srcBLen - 2] */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc1 += x3 * c0; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc2 += x[4] * y[srcBLen - 2] */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc2 += x0 * c0; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc3 += x[5] * y[srcBLen - 2] */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc3 += x1 * c0; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Read y[srcBLen - 4] sample */ 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** c0 = *py--; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Read x[6] sample */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** x2 = *px++; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Perform the multiply-accumulate */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc0 += x[3] * y[srcBLen - 4] */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc0 += x3 * c0; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc1 += x[4] * y[srcBLen - 4] */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc1 += x0 * c0; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc2 += x[5] * y[srcBLen - 4] */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc2 += x1 * c0; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc3 += x[6] * y[srcBLen - 4] */ 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc3 += x2 * c0; 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } while (--k); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 345 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** ** No loop unrolling is used. */ 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k = srcBLen % 0x4U; 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (k > 0U) 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Read y[srcBLen - 5] sample */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** c0 = *py--; 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Read x[7] sample */ 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** x3 = *px++; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Perform the multiply-accumulates */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc0 += x[4] * y[srcBLen - 5] */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc0 += x0 * c0; 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc1 += x1 * c0; 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc2 += x2 * c0; 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** acc3 += x3 * c0; 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Reuse the present samples for the next MAC */ 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** x0 = x1; 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** x1 = x2; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** x2 = x3; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement the loop counter */ 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k--; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** *pOut++ = acc0; 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** *pOut++ = acc1; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** *pOut++ = acc2; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** *pOut++ = acc3; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Increment the pointer pIn1 index, count by 4 */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** count += 4U; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** px = pSrc1 + count; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** py = pSrc2; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement loop counter */ 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blkCnt--; 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Loop unrolling: Compute remaining outputs */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blkCnt = (uint32_t) blockSize2 % 0x4U; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #else 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Initialize blkCnt with number of samples */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blkCnt = blockSize2; 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 346 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (blkCnt > 0U) 6812 .loc 25 432 0 6813 00e2 019A ldr r2, [sp, #4] 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6814 .loc 25 286 0 6815 00e4 5DD8 bhi .L414 6816 .LVL1085: 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Accumulator is made zero for every iteration */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum = 0.0f; 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k = srcBLen >> 2U; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (k > 0U) 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Perform the multiply-accumulates */ 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement loop counter */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k--; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Loop unrolling: Compute remaining outputs */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k = srcBLen % 0x4U; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #else 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Initialize blkCnt with number of samples */ 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k = srcBLen; 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (k > 0U) 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Perform the multiply-accumulate */ 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement loop counter */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k--; 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** *pOut++ = sum; 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Increment MAC count */ 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** count++; 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** px = pSrc1 + count; 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** py = pSrc2; 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 347 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement loop counter */ 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blkCnt--; 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** else 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* If the srcBLen is not a multiple of 4, 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * the blockSize2 loop cannot be unrolled by 4 */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blkCnt = (uint32_t) blockSize2; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (blkCnt > 0U) 6817 .loc 25 493 0 6818 00e6 002A cmp r2, #0 6819 00e8 7BD0 beq .L435 6820 00ea 002E cmp r6, #0 6821 00ec 7BD0 beq .L416 6822 00ee 022E cmp r6, #2 6823 00f0 05EB820C add ip, r5, r2, lsl #2 6824 00f4 42D0 beq .L422 6825 00f6 012E cmp r6, #1 6826 00f8 35D0 beq .L420 6827 .LVL1086: 6828 .L419: 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Accumulator is made zero for every iteration */ 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum = 0.0f; 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* srcBLen number of MACS should be performed */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k = srcBLen; 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (k > 0U) 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Perform the multiply-accumulate */ 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 6829 .loc 25 504 0 6830 00fa BEEC016A vldmia.32 lr!, {s12} 6831 .LVL1087: 6832 00fe 59ED027A vldr.32 s15, [r9, #-8] 6833 0102 9EED017A vldr.32 s14, [lr, #4] 6834 0106 9EED005A vldr.32 s10, [lr] 6835 010a 59ED015A vldr.32 s11, [r9, #-4] 6836 010e D9ED006A vldr.32 s13, [r9] 6837 0112 67EE277A vmul.f32 s15, s14, s15 6838 0116 E5EE257A vfma.f32 s15, s10, s11 6839 011a E6EE267A vfma.f32 s15, s12, s13 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement loop counter */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k--; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** *pOut++ = sum; 6840 .loc 25 511 0 6841 011e E5EC017A vstmia.32 r5!, {s15} 6842 .LVL1088: 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6843 .loc 25 493 0 ARM GAS /tmp/ccJrAs6S.s page 348 6844 0122 6545 cmp r5, ip 6845 0124 E9D1 bne .L419 6846 .LVL1089: 6847 .L415: 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Increment the MAC count */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** count++; 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** px = pSrc1 + count; 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** py = pSrc2; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement the loop counter */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blkCnt--; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* -------------------------- 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Initializations of stage3 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * -------------------------*/ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[src 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[src 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * .... 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * sum += x[srcALen-1] * y[srcBLen-1] 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** The blockSize3 variable holds the number of MAC operations performed */ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** count = srcBLen - 1U; 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Working pointer of inputA */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); 6848 .loc 25 542 0 6849 0126 0133 adds r3, r3, #1 6850 0128 9E1B subs r6, r3, r6 6851 .LVL1090: 6852 012a 08EB8608 add r8, r8, r6, lsl #2 6853 .LVL1091: 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** px = pSrc1; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Working pointer of inputB */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** pSrc2 = pIn2 + (srcBLen - 1U); 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** py = pSrc2; 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* ------------------- 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * Stage3 process 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** * ------------------*/ 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (blockSize3 > 0U) 6854 .loc 25 553 0 6855 012e B7B1 cbz r7, .L425 6856 0130 E71B subs r7, r4, r7 6857 .LVL1092: 6858 .L426: ARM GAS /tmp/ccJrAs6S.s page 349 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Accumulator is made zero for every iteration */ 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum = 0.0f; 6859 .loc 25 556 0 6860 0132 DFED357A vldr.32 s15, .L450 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k = count >> 2U; 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (k > 0U) 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement loop counter */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k--; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Loop unrolling: Compute remaining outputs */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k = count % 0x4U; 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #else 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Initialize blkCnt with number of samples */ 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k = count; 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** while (k > 0U) 6861 .loc 25 591 0 6862 0136 5CB1 cbz r4, .L429 6863 0138 09F10401 add r1, r9, #4 6864 013c 2346 mov r3, r4 6865 013e 4246 mov r2, r8 6866 .LVL1093: 6867 .L427: 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Perform the multiply-accumulate */ 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* sum += x[srcALen-1] * y[srcBLen-1] */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += *px++ * *py--; 6868 .loc 25 595 0 6869 0140 F2EC016A vldmia.32 r2!, {s13} 6870 .LVL1094: 6871 0144 31ED017A vldmdb.32 r1!, {s14} 6872 .LVL1095: 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { ARM GAS /tmp/ccJrAs6S.s page 350 6873 .loc 25 591 0 6874 0148 013B subs r3, r3, #1 6875 .LVL1096: 6876 .loc 25 595 0 6877 014a E6EE877A vfma.f32 s15, s13, s14 6878 .LVL1097: 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6879 .loc 25 591 0 6880 014e F7D1 bne .L427 6881 .LVL1098: 6882 .L429: 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement loop counter */ 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** k--; 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** *pOut++ = sum; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** px = ++pSrc1; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** py = pSrc2; 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement MAC count */ 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** count--; 6883 .loc 25 609 0 6884 0150 013C subs r4, r4, #1 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6885 .loc 25 553 0 6886 0152 BC42 cmp r4, r7 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 6887 .loc 25 602 0 6888 0154 ECEC017A vstmia.32 ip!, {s15} 6889 .LVL1099: 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** py = pSrc2; 6890 .loc 25 605 0 6891 0158 08F10408 add r8, r8, #4 6892 .LVL1100: 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6893 .loc 25 553 0 6894 015c E9D1 bne .L426 6895 .LVL1101: 6896 .L425: 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Decrement the loop counter */ 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blockSize3--; 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** status = ARM_MATH_SUCCESS; 6897 .loc 25 616 0 6898 015e 0020 movs r0, #0 6899 .LVL1102: 6900 .L447: 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Return to application */ ARM GAS /tmp/ccJrAs6S.s page 351 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** return (status); 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #else 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* alternate version for CM0_FAMILY */ 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** const float32_t *pIn1 = pSrcA; /* InputA pointer */ 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** const float32_t *pIn2 = pSrcB; /* InputB pointer */ 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** float32_t sum; /* Accumulator */ 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** uint32_t i, j; /* Loop counters */ 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** arm_status status; /* Status of Partial convolution */ 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Check for range of output samples to be calculated */ 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** status = ARM_MATH_ARGUMENT_ERROR; 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** else 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Loop to calculate convolution for output length number of values */ 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Initialize sum with zero to carry on MAC operations */ 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum = 0.0f; 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Loop to perform MAC operations according to convolution equation */ 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** for (j = 0U; j <= i; j++) 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Check the array limitations */ 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** if (((i - j) < srcBLen) && (j < srcALen)) 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* z[i] += x[i-j] * y[j] */ 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** sum += ( pIn1[j] * pIn2[i - j]); 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Store the output in the destination buffer */ 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** pDst[i] = sum; 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Set status as ARM_SUCCESS */ 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** status = ARM_MATH_SUCCESS; 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** /* Return to application */ 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** return (status); 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** #endif /* defined(ARM_MATH_DSP) */ 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 6901 .loc 25 668 0 6902 0160 03B0 add sp, sp, #12 6903 .LCFI59: 6904 .cfi_remember_state 6905 .cfi_def_cfa_offset 36 6906 @ sp needed 6907 0162 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 6908 .LVL1103: ARM GAS /tmp/ccJrAs6S.s page 352 6909 .L420: 6910 .LCFI60: 6911 .cfi_restore_state 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 6912 .loc 25 504 0 6913 0166 FEEC017A vldmia.32 lr!, {s15} 6914 .LVL1104: 6915 016a 99ED007A vldr.32 s14, [r9] 6916 016e 67EE277A vmul.f32 s15, s14, s15 6917 .LVL1105: 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 6918 .loc 25 511 0 6919 0172 E5EC017A vstmia.32 r5!, {s15} 6920 .LVL1106: 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6921 .loc 25 493 0 6922 0176 6545 cmp r5, ip 6923 0178 F5D1 bne .L420 6924 017a D4E7 b .L415 6925 .LVL1107: 6926 .L422: 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 6927 .loc 25 504 0 6928 017c DEED006A vldr.32 s13, [lr] 6929 .LVL1108: 6930 0180 19ED017A vldr.32 s14, [r9, #-4] 6931 0184 DEED017A vldr.32 s15, [lr, #4] 6932 0188 99ED006A vldr.32 s12, [r9] 6933 018c 0EF1040E add lr, lr, #4 6934 .LVL1109: 6935 0190 67EE277A vmul.f32 s15, s14, s15 6936 0194 E6EE267A vfma.f32 s15, s12, s13 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 6937 .loc 25 511 0 6938 0198 E5EC017A vstmia.32 r5!, {s15} 6939 .LVL1110: 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6940 .loc 25 493 0 6941 019c 6545 cmp r5, ip 6942 019e EDD1 bne .L422 6943 01a0 C1E7 b .L415 6944 .LVL1111: 6945 .L414: 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6946 .loc 25 432 0 6947 01a2 F2B1 cbz r2, .L435 6948 01a4 05EB820C add ip, r5, r2, lsl #2 6949 01a8 09F1040A add r10, r9, #4 6950 .LVL1112: 6951 .L424: 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 6952 .loc 25 435 0 6953 01ac DFED167A vldr.32 s15, .L450 6954 01b0 5046 mov r0, r10 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 6955 .loc 25 268 0 6956 01b2 3246 mov r2, r6 ARM GAS /tmp/ccJrAs6S.s page 353 6957 01b4 7146 mov r1, lr 6958 .LVL1113: 6959 .L423: 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 6960 .loc 25 467 0 6961 01b6 F1EC016A vldmia.32 r1!, {s13} 6962 .LVL1114: 6963 01ba 30ED017A vldmdb.32 r0!, {s14} 6964 .LVL1115: 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6965 .loc 25 464 0 6966 01be 013A subs r2, r2, #1 6967 .LVL1116: 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 6968 .loc 25 467 0 6969 01c0 E6EE877A vfma.f32 s15, s13, s14 6970 .LVL1117: 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6971 .loc 25 464 0 6972 01c4 F7D1 bne .L423 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 6973 .loc 25 474 0 6974 01c6 E5EC017A vstmia.32 r5!, {s15} 6975 .LVL1118: 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6976 .loc 25 432 0 6977 01ca 6545 cmp r5, ip 6978 01cc 0EF1040E add lr, lr, #4 6979 .LVL1119: 6980 01d0 ECD1 bne .L424 6981 01d2 A8E7 b .L415 6982 .LVL1120: 6983 .L408: 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 6984 .loc 25 146 0 6985 01d4 0EEB0201 add r1, lr, r2 6986 .LVL1121: 6987 01d8 A9EB0101 sub r1, r9, r1 6988 01dc 0191 str r1, [sp, #4] 6989 .LVL1122: 6990 01de 0E92 str r2, [sp, #56] 6991 .LVL1123: 6992 01e0 43E7 b .L409 6993 .LVL1124: 6994 .L435: 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** { 6995 .loc 25 432 0 6996 01e2 AC46 mov ip, r5 6997 01e4 9FE7 b .L415 6998 .LVL1125: 6999 .L416: 7000 01e6 0093 str r3, [sp] 7001 .LVL1126: 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 7002 .loc 25 511 0 7003 01e8 019B ldr r3, [sp, #4] 7004 .LVL1127: ARM GAS /tmp/ccJrAs6S.s page 354 7005 01ea 4FEA830A lsl r10, r3, #2 7006 01ee 5246 mov r2, r10 7007 .LVL1128: 7008 01f0 3146 mov r1, r6 7009 01f2 2846 mov r0, r5 7010 01f4 FFF7FEFF bl memset 7011 .LVL1129: 7012 01f8 05EB0A0C add ip, r5, r10 7013 01fc 009B ldr r3, [sp] 7014 01fe 92E7 b .L415 7015 .LVL1130: 7016 .L430: 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** } 7017 .loc 25 110 0 7018 0200 4FF0FF30 mov r0, #-1 7019 .LVL1131: 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c **** 7020 .loc 25 620 0 7021 0204 ACE7 b .L447 7022 .L451: 7023 0206 00BF .align 2 7024 .L450: 7025 0208 00000000 .word 0 7026 .cfi_endproc 7027 .LFE170: 7029 .section .text.arm_conv_partial_fast_opt_q15,"ax",%progbits 7030 .align 1 7031 .p2align 2,,3 7032 .global arm_conv_partial_fast_opt_q15 7033 .syntax unified 7034 .thumb 7035 .thumb_func 7036 .fpu fpv4-sp-d16 7038 arm_conv_partial_fast_opt_q15: 7039 .LFB171: 7040 .file 26 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * Title: arm_conv_partial_fast_opt_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * Description: Fast Q15 Partial convolution 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * ARM GAS /tmp/ccJrAs6S.s page 355 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @addtogroup PartialConv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @brief Partial convolution of Q15 sequences (fast version). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @param[out] pDst points to the location where the output result is written 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @param[in] firstIndex is the first output sample to start with 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @param[in] numPoints is the number of output points to be computed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen) 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @return execution status 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** @remark 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** Refer to \ref arm_conv_partial_q15() for a slower implementation of this functio 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** arm_status arm_conv_partial_fast_opt_q15( 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** const q15_t * pSrcA, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** uint32_t srcALen, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** const q15_t * pSrcB, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** uint32_t srcBLen, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q15_t * pDst, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** uint32_t firstIndex, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** uint32_t numPoints, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q15_t * pScratch1, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q15_t * pScratch2) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 7041 .loc 26 69 0 7042 .cfi_startproc 7043 @ args = 20, pretend = 0, frame = 0 7044 @ frame_needed = 0, uses_anonymous_args = 0 7045 .LVL1132: 7046 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} 7047 .LCFI61: 7048 .cfi_def_cfa_offset 40 7049 .cfi_offset 3, -40 ARM GAS /tmp/ccJrAs6S.s page 356 7050 .cfi_offset 4, -36 7051 .cfi_offset 5, -32 7052 .cfi_offset 6, -28 7053 .cfi_offset 7, -24 7054 .cfi_offset 8, -20 7055 .cfi_offset 9, -16 7056 .cfi_offset 10, -12 7057 .cfi_offset 11, -8 7058 .cfi_offset 14, -4 7059 0004 01F1FF3A add r10, r1, #-1 7060 .loc 26 69 0 7061 0008 DDE90C4B ldrd r4, fp, [sp, #48] 7062 000c 0F46 mov r7, r1 7063 000e 9946 mov r9, r3 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q31_t acc0; /* Accumulator */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** const q15_t *pIn1; /* InputA pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** const q15_t *pIn2; /* InputB pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** const q15_t *px; /* Intermediate inputA pointer */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q15_t *py; /* Intermediate inputB pointer */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** uint32_t j, k, blkCnt; /* Loop counter */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** uint32_t tapCnt; /* Loop count */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** arm_status status; /* Status variable */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q31_t x1; /* Temporary variables to hold state and coe 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q31_t y1; /* State variables */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q31_t acc1, acc2, acc3; /* Accumulator */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q31_t x2, x3; /* Temporary variables to hold state and coe 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q31_t y2; /* State variables */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #endif 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Check for range of output samples to be calculated */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) 7064 .loc 26 91 0 7065 0010 03EB0A01 add r1, r3, r10 7066 .LVL1133: 7067 0014 0B9B ldr r3, [sp, #44] 7068 .LVL1134: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 7069 .loc 26 69 0 7070 0016 0E9D ldr r5, [sp, #56] 7071 .loc 26 91 0 7072 0018 03EB040C add ip, r3, r4 7073 .LVL1135: 7074 001c 8C45 cmp ip, r1 7075 001e 65D8 bhi .L464 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** status = ARM_MATH_ARGUMENT_ERROR; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** else 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* srcB is always made to slide across srcA. */ ARM GAS /tmp/ccJrAs6S.s page 357 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** if (srcALen >= srcBLen) 7076 .loc 26 101 0 7077 0020 B945 cmp r9, r7 7078 0022 1646 mov r6, r2 7079 0024 59D9 bls .L473 7080 .LVL1136: 7081 .L454: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Initialization of inputA pointer */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pIn1 = pSrcA; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Initialization of inputB pointer */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pIn2 = pSrcB; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** else 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Initialization of inputA pointer */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pIn1 = pSrcB; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Initialization of inputB pointer */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pIn2 = pSrcA; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** j = srcBLen; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** srcBLen = srcALen; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** srcALen = j; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Temporary pointer for scratch2 */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** py = pScratch2; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* pointer to take end of scratch2 buffer */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pScr2 = pScratch2 + srcBLen - 1; 7082 .loc 26 127 0 7083 0026 07F10048 add r8, r7, #-2147483648 7084 002a 08F1FF38 add r8, r8, #-1 7085 002e 4FEA4808 lsl r8, r8, #1 7086 .LVL1137: 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* points to smaller length sequence */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** px = pIn2; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** k = srcBLen >> 2U; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Copy smaller length input sequence in reverse order into second scratch buffer */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** while (k > 0U) 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* copy second buffer in reversal manner */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** *pScr2-- = *px++; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** *pScr2-- = *px++; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** *pScr2-- = *px++; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** *pScr2-- = *px++; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 358 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Decrement loop counter */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** k--; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Loop unrolling: Compute remaining outputs */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** k = srcBLen % 0x4U; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #else 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Initialize k with number of samples */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** k = srcBLen; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** while (k > 0U) 7087 .loc 26 160 0 7088 0032 4FB1 cbz r7, .L455 7089 0034 08F10201 add r1, r8, #2 7090 0038 2944 add r1, r1, r5 7091 003a 3A46 mov r2, r7 7092 .LVL1138: 7093 .L456: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* copy second buffer in reversal manner for remaining samples */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** *pScr2-- = *px++; 7094 .loc 26 163 0 7095 003c 30F902CB ldrsh ip, [r0], #2 7096 .LVL1139: 7097 0040 21F802CD strh ip, [r1, #-2]! @ movhi 7098 .LVL1140: 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 7099 .loc 26 160 0 7100 0044 013A subs r2, r2, #1 7101 .LVL1141: 7102 0046 F9D1 bne .L456 7103 .LVL1142: 7104 .L455: 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Decrement loop counter */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** k--; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Initialze temporary scratch pointer */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pScr1 = pScratch1; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Assuming scratch1 buffer is aligned by 32-bit */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Fill (srcBLen - 1U) zeros in scratch buffer */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Update temporary scratch pointer */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pScr1 += (srcBLen - 1U); 7105 .loc 26 177 0 7106 0048 D844 add r8, r8, fp 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 7107 .loc 26 174 0 7108 004a 5246 mov r2, r10 7109 004c 5946 mov r1, fp ARM GAS /tmp/ccJrAs6S.s page 359 7110 004e 0020 movs r0, #0 7111 .LVL1143: 7112 0050 FFF7FEFF bl arm_fill_q15 7113 .LVL1144: 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Copy (srcALen) samples in scratch buffer */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** arm_copy_q15(pIn1, pScr1, srcALen); 7114 .loc 26 182 0 7115 0054 3046 mov r0, r6 7116 0056 4146 mov r1, r8 7117 0058 4A46 mov r2, r9 7118 005a FFF7FEFF bl arm_copy_q15 7119 .LVL1145: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Update pointers */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pScr1 += srcALen; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 7120 .loc 26 188 0 7121 005e 5246 mov r2, r10 7122 0060 08EB4901 add r1, r8, r9, lsl #1 7123 .LVL1146: 7124 0064 0020 movs r0, #0 7125 0066 FFF7FEFF bl arm_fill_q15 7126 .LVL1147: 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Update pointer */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pScr1 += (srcBLen - 1U); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Initialization of pIn2 pointer */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pIn2 = py; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pScratch1 += firstIndex; 7127 .loc 26 196 0 7128 006a 0B9B ldr r3, [sp, #44] 7129 006c 4FEA430C lsl ip, r3, #1 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pOut = pDst + firstIndex; 7130 .loc 26 198 0 7131 0070 0A9B ldr r3, [sp, #40] 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 7132 .loc 26 196 0 7133 0072 0BEB0C06 add r6, fp, ip 7134 .LVL1148: 7135 .loc 26 198 0 7136 0076 9C44 add ip, ip, r3 7137 .LVL1149: 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Actual convolution process starts here */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** blkCnt = (numPoints) >> 2; ARM GAS /tmp/ccJrAs6S.s page 360 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** while (blkCnt > 0) 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Initialze temporary scratch pointer as scratch1 */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pScr1 = pScratch1; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Clear Accumlators */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc0 = 0; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc1 = 0; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc2 = 0; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc3 = 0; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Read two samples from scratch1 buffer */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** x2 = read_q15x2_ia (&pScr1); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** tapCnt = (srcBLen) >> 2U; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** while (tapCnt > 0U) 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Read four samples from smaller buffer */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** y1 = read_q15x2_ia ((q15_t **) &pIn2); 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** y2 = read_q15x2_ia ((q15_t **) &pIn2); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* multiply and accumlate */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc0 = __SMLAD(x1, y1, acc0); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc2 = __SMLAD(x2, y1, acc2); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* pack input data */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #else 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #endif 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* multiply and accumlate */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc1 = __SMLADX(x3, y1, acc1); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* multiply and accumlate */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc0 = __SMLAD(x2, y2, acc0); 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc2 = __SMLAD(x1, y2, acc2); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* pack input data */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #else 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #endif 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc3 = __SMLADX(x3, y1, acc3); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc1 = __SMLADX(x3, y2, acc1); ARM GAS /tmp/ccJrAs6S.s page 361 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** x2 = read_q15x2_ia (&pScr1); 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #else 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #endif 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* multiply and accumlate */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc3 = __SMLADX(x3, y2, acc3); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Decrement loop counter */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** tapCnt--; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Update scratch pointer for remaining samples of smaller length sequence */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pScr1 -= 4U; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* apply same above for remaining samples of smaller length sequence */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** tapCnt = (srcBLen) & 3U; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** while (tapCnt > 0U) 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* accumlate the results */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc1 += (*pScr1++ * *pIn2); 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc2 += (*pScr1++ * *pIn2); 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc3 += (*pScr1++ * *pIn2++); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pScr1 -= 3U; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Decrement loop counter */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** tapCnt--; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** blkCnt--; 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Store the results in the accumulators in the destination buffer. */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #else 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Initialization of inputB pointer */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pIn2 = py; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pScratch1 += 4U; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Loop unrolling: Compute remaining outputs */ 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** blkCnt = numPoints & 0x3; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #else ARM GAS /tmp/ccJrAs6S.s page 362 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Initialize blkCnt with number of samples */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** blkCnt = numPoints; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Calculate convolution for remaining samples of Bigger length sequence */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** while (blkCnt > 0) 7138 .loc 26 327 0 7139 0078 44B3 cbz r4, .L463 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Initialze temporary scratch pointer as scratch1 */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pScr1 = pScratch1; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Clear Accumlators */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc0 = 0; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** tapCnt = (srcBLen) >> 1U; 7140 .loc 26 335 0 7141 007a 4FEA570E lsr lr, r7, #1 7142 007e 4FEA8E08 lsl r8, lr, #2 7143 .LVL1150: 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** while (tapCnt > 0U) 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Read two samples from smaller buffer */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** y1 = read_q15x2_ia ((q15_t **) &pIn2); 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* multiply and accumlate */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc0 = __SMLAD(x1, y1, acc0); 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Decrement loop counter */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** tapCnt--; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** tapCnt = (srcBLen) & 1U; 7144 .loc 26 352 0 7145 0082 07F00107 and r7, r7, #1 7146 .LVL1151: 7147 0086 05EB0809 add r9, r5, r8 7148 .LVL1152: 7149 .L458: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 7150 .loc 26 337 0 7151 008a BEF1000F cmp lr, #0 7152 008e 20D0 beq .L465 7153 0090 2846 mov r0, r5 7154 0092 3146 mov r1, r6 7155 0094 7346 mov r3, lr 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 7156 .loc 26 333 0 7157 0096 0022 movs r2, #0 7158 .LVL1153: 7159 .L460: ARM GAS /tmp/ccJrAs6S.s page 363 7160 .LBB1305: 7161 .LBB1306: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7162 .loc 3 928 0 7163 0098 51F804AB ldr r10, [r1], #4 @ unaligned 7164 .LVL1154: 7165 .LBE1306: 7166 .LBE1305: 7167 .LBB1307: 7168 .LBB1308: 7169 009c 50F804BB ldr fp, [r0], #4 @ unaligned 7170 .LVL1155: 7171 .LBE1308: 7172 .LBE1307: 7173 .LBB1310: 7174 .LBB1311: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7175 .loc 6 1993 0 7176 .syntax unified 7177 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7178 00a0 2AFB0B22 smlad r2, r10, fp, r2 7179 @ 0 "" 2 7180 .LVL1156: 7181 .thumb 7182 .syntax unified 7183 .LBE1311: 7184 .LBE1310: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 7185 .loc 26 337 0 7186 00a4 013B subs r3, r3, #1 7187 .LVL1157: 7188 00a6 F7D1 bne .L460 7189 00a8 06EB0803 add r3, r6, r8 7190 .LVL1158: 7191 .LBB1312: 7192 .LBB1309: 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 7193 .loc 3 933 0 7194 00ac 4946 mov r1, r9 7195 .LVL1159: 7196 .L459: 7197 .LBE1309: 7198 .LBE1312: 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* apply same above for remaining samples of smaller length sequence */ 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** while (tapCnt > 0U) 7199 .loc 26 355 0 7200 00ae 1FB1 cbz r7, .L461 7201 .LVL1160: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* accumlate the results */ 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 7202 .loc 26 358 0 7203 00b0 1B88 ldrh r3, [r3] 7204 .LVL1161: 7205 00b2 0988 ldrh r1, [r1] 7206 .LVL1162: ARM GAS /tmp/ccJrAs6S.s page 364 7207 00b4 13FB0122 smlabb r2, r3, r1, r2 7208 .LVL1163: 7209 .L461: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 7210 .loc 26 327 0 7211 00b8 013C subs r4, r4, #1 7212 .LVL1164: 7213 .LBB1313: 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Decrement loop counter */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** tapCnt--; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** blkCnt--; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* The result is in 2.30 format. Convert to 1.15 with saturation. 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** ** Then store the output in the destination buffer. */ 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); 7214 .loc 26 368 0 7215 00ba 4FEAE232 asr r2, r2, #15 7216 .LVL1165: 7217 .LBE1313: 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Initialization of inputB pointer */ 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pIn2 = py; 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** pScratch1 += 1U; 7218 .loc 26 373 0 7219 00be 06F10206 add r6, r6, #2 7220 .LVL1166: 7221 .LBB1314: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 7222 .loc 26 368 0 7223 .syntax unified 7224 @ 368 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_ 7225 00c2 02F30F02 ssat r2, #16, r2 7226 @ 0 "" 2 7227 .LVL1167: 7228 .thumb 7229 .syntax unified 7230 .LBE1314: 7231 00c6 2CF8022B strh r2, [ip], #2 @ movhi 7232 .LVL1168: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 7233 .loc 26 327 0 7234 00ca DED1 bne .L458 7235 .LVL1169: 7236 .L463: 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** status = ARM_MATH_SUCCESS; 7237 .loc 26 378 0 7238 00cc 0020 movs r0, #0 7239 .LVL1170: 7240 .L453: ARM GAS /tmp/ccJrAs6S.s page 365 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** /* Return to application */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** return (status); 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 7241 .loc 26 383 0 7242 00ce BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} 7243 .LVL1171: 7244 .L465: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 7245 .loc 26 337 0 7246 00d2 2946 mov r1, r5 7247 00d4 3346 mov r3, r6 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 7248 .loc 26 333 0 7249 00d6 7246 mov r2, lr 7250 00d8 E9E7 b .L459 7251 .LVL1172: 7252 .L473: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 7253 .loc 26 101 0 7254 00da 1146 mov r1, r2 7255 00dc 4A46 mov r2, r9 7256 .LVL1173: 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** 7257 .loc 26 104 0 7258 00de 0646 mov r6, r0 7259 .LVL1174: 7260 00e0 09F1FF3A add r10, r9, #-1 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 7261 .loc 26 107 0 7262 00e4 0846 mov r0, r1 7263 .LVL1175: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** { 7264 .loc 26 101 0 7265 00e6 B946 mov r9, r7 7266 .LVL1176: 7267 00e8 1746 mov r7, r2 7268 .LVL1177: 7269 00ea 9CE7 b .L454 7270 .LVL1178: 7271 .L464: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c **** } 7272 .loc 26 94 0 7273 00ec 4FF0FF30 mov r0, #-1 7274 .LVL1179: 7275 00f0 EDE7 b .L453 7276 .cfi_endproc 7277 .LFE171: 7279 00f2 00BF .section .text.arm_conv_partial_fast_q15,"ax",%progbits 7280 .align 1 7281 .p2align 2,,3 7282 .global arm_conv_partial_fast_q15 7283 .syntax unified 7284 .thumb 7285 .thumb_func 7286 .fpu fpv4-sp-d16 ARM GAS /tmp/ccJrAs6S.s page 366 7288 arm_conv_partial_fast_q15: 7289 .LFB172: 7290 .file 27 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Title: arm_conv_partial_fast_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Description: Fast Q15 Partial convolution 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @addtogroup PartialConv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @brief Partial convolution of Q15 sequences (fast version). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @param[out] pDst points to the location where the output result is written 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @param[in] firstIndex is the first output sample to start with 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @param[in] numPoints is the number of output points to be computed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @return execution status 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** @remark 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** Refer to \ref arm_conv_partial_q15() for a slower implementation of this functio 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** */ ARM GAS /tmp/ccJrAs6S.s page 367 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** arm_status arm_conv_partial_fast_q15( 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** const q15_t * pSrcA, 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** uint32_t srcALen, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** const q15_t * pSrcB, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** uint32_t srcBLen, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** q15_t * pDst, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** uint32_t firstIndex, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** uint32_t numPoints) 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7291 .loc 27 64 0 7292 .cfi_startproc 7293 @ args = 12, pretend = 0, frame = 64 7294 @ frame_needed = 0, uses_anonymous_args = 0 7295 .LVL1180: 7296 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 7297 .LCFI62: 7298 .cfi_def_cfa_offset 36 7299 .cfi_offset 4, -36 7300 .cfi_offset 5, -32 7301 .cfi_offset 6, -28 7302 .cfi_offset 7, -24 7303 .cfi_offset 8, -20 7304 .cfi_offset 9, -16 7305 .cfi_offset 10, -12 7306 .cfi_offset 11, -8 7307 .cfi_offset 14, -4 7308 0004 91B0 sub sp, sp, #68 7309 .LCFI63: 7310 .cfi_def_cfa_offset 104 7311 .loc 27 64 0 7312 0006 DDE91B94 ldrd r9, r4, [sp, #108] 7313 000a 4E1E subs r6, r1, #1 7314 000c 1F46 mov r7, r3 7315 000e 0393 str r3, [sp, #12] 7316 .LVL1181: 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** const q15_t *pIn1; /* InputA pointer */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** const q15_t *pIn2; /* InputB pointer */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** const q15_t *px; /* Intermediate inputA pointer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** const q15_t *py; /* Intermediate inputB pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** q31_t x0, x1, x2, x3, c0; /* Temporary input variables */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** uint32_t j, k, count, blkCnt, check; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** arm_status status; /* Status of Partial convolution */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Check for range of output samples to be calculated */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) 7317 .loc 27 78 0 7318 0010 09EB0405 add r5, r9, r4 7319 0014 3344 add r3, r3, r6 7320 .LVL1182: 7321 0016 9D42 cmp r5, r3 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** const q15_t *pIn1; /* InputA pointer */ 7322 .loc 27 64 0 ARM GAS /tmp/ccJrAs6S.s page 368 7323 0018 0191 str r1, [sp, #4] 7324 001a DDF868E0 ldr lr, [sp, #104] 7325 001e 0490 str r0, [sp, #16] 7326 0020 0092 str r2, [sp] 7327 .loc 27 78 0 7328 0022 00F20584 bhi .L554 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** status = ARM_MATH_ARGUMENT_ERROR; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** else 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* srcB is always made to slide across srcA. */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** if (srcALen >= srcBLen) 7329 .loc 27 88 0 7330 0026 8F42 cmp r7, r1 7331 0028 40F2D582 bls .L605 7332 .L476: 7333 .LVL1183: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Initialization of inputA pointer */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** pIn1 = pSrcA; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Initialization of inputB pointer */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** pIn2 = pSrcB; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** else 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Initialization of inputA pointer */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** pIn1 = pSrcB; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Initialization of inputB pointer */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** pIn2 = pSrcA; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** j = srcBLen; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** srcBLen = srcALen; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** srcALen = j; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Conditions to check which loopCounter holds 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * the first and last indices of the output samples to be calculated. */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** check = firstIndex + numPoints; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0; 7334 .loc 27 113 0 7335 002c 039B ldr r3, [sp, #12] 7336 002e 9D42 cmp r5, r3 7337 0030 D4BF ite le 7338 0032 4FF0000B movle fp, #0 7339 0036 A5EB030B subgt fp, r5, r3 7340 .LVL1184: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + 7341 .loc 27 114 0 7342 003a 4B45 cmp r3, r9 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + ARM GAS /tmp/ccJrAs6S.s page 369 7343 .loc 27 113 0 7344 003c 1A46 mov r2, r3 7345 .LVL1185: 7346 .loc 27 114 0 7347 003e DCBF itt le 7348 0040 ABEB0903 suble r3, fp, r9 7349 .LVL1186: 7350 0044 03EB020B addle fp, r3, r2 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; 7351 .loc 27 115 0 7352 0048 019B ldr r3, [sp, #4] 7353 .LVL1187: 7354 004a 049A ldr r2, [sp, #16] 7355 004c 6FEA0901 mvn r1, r9 7356 0050 1944 add r1, r1, r3 7357 .LVL1188: 7358 0052 4FEA4903 lsl r3, r9, #1 7359 0056 0EEB030A add r10, lr, r3 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 7360 .loc 27 116 0 7361 005a 0029 cmp r1, #0 7362 005c 1344 add r3, r3, r2 7363 005e 09F10102 add r2, r9, #1 7364 0062 0292 str r2, [sp, #8] 7365 0064 40F34883 ble .L606 7366 .loc 27 116 0 is_stmt 0 discriminator 1 7367 0068 B542 cmp r5, r6 7368 006a 00F2BA82 bhi .L482 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); 7369 .loc 27 117 0 is_stmt 1 discriminator 4 7370 006e 0BEB0402 add r2, fp, r4 7371 0072 4A44 add r2, r2, r9 7372 0074 AD1A subs r5, r5, r2 7373 .LVL1189: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 7374 .loc 27 118 0 discriminator 4 7375 0076 25EAE572 bic r2, r5, r5, asr #31 7376 007a 0892 str r2, [sp, #32] 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* The function is internally 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * divided into three stages according to the number of multiplications that has to be 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * taken place between inputA samples and inputB samples. In the first stage of the 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * algorithm, the multiplications increase by one for every iteration. 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * In the third stage of the algorithm, the multiplications decrease by one 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * for every iteration. */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Set the output pointer to point to the firstIndex 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * of the output sample to be calculated. */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** pOut = pDst + firstIndex; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* -------------------------- 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Initializations of stage1 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * -------------------------*/ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* sum = x[0] * y[0] ARM GAS /tmp/ccJrAs6S.s page 370 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * sum = x[0] * y[1] + x[1] * y[0] 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * .... 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** The count variable holds the number of MAC operations performed. 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** Since the partial convolution starts from firstIndex 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** Number of Macs to be performed is firstIndex + 1 */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** count = 1U + firstIndex; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Working pointer of inputA */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px = pIn1; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Working pointer of inputB */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** pSrc2 = pIn2 + firstIndex; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = pSrc2; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* ------------------------ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Stage1 process 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * ----------------------*/ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* For loop unrolling by 4, this stage is divided into two. */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* First part of this stage computes the MAC operations less than 4 */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Second part of this stage computes the MAC operations greater than or equal to 4 */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* The first part of the stage starts here */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while ((count < 4U) && (blockSize1 > 0)) 7377 .loc 27 165 0 discriminator 4 7378 007c 029A ldr r2, [sp, #8] 7379 007e 032A cmp r2, #3 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); 7380 .loc 27 116 0 discriminator 4 7381 0080 2146 mov r1, r4 7382 .LVL1190: 7383 .loc 27 165 0 discriminator 4 7384 0082 00F2D083 bhi .L556 7385 .LVL1191: 7386 .loc 27 165 0 is_stmt 0 7387 0086 002C cmp r4, #0 7388 0088 40F33B81 ble .L481 7389 .LVL1192: 7390 .L484: 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Accumulator is made zero for every iteration */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = 0; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Loop over number of MAC operations between 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * inputA samples and inputB samples */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k = count; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (k > 0U) 7391 .loc 27 174 0 is_stmt 1 7392 008c 029C ldr r4, [sp, #8] 7393 .LVL1193: 7394 008e 981C adds r0, r3, #2 7395 .LVL1194: ARM GAS /tmp/ccJrAs6S.s page 371 7396 0090 0AF10208 add r8, r10, #2 7397 0094 4A1E subs r2, r1, #1 7398 0096 09F1020C add ip, r9, #2 7399 009a 002C cmp r4, #0 7400 009c 00F04483 beq .L607 7401 .LVL1195: 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Perform the multiply-accumulates */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = __SMLAD(*px++, *py--, sum); 7402 .loc 27 177 0 7403 00a0 009C ldr r4, [sp] 7404 00a2 B3F90050 ldrsh r5, [r3] 7405 00a6 B4F90040 ldrsh r4, [r4] 7406 .LVL1196: 7407 .LBB1315: 7408 .LBB1316: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7409 .loc 6 1993 0 7410 00aa 0027 movs r7, #0 7411 .syntax unified 7412 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7413 00ac 24FB0574 smlad r4, r4, r5, r7 7414 @ 0 "" 2 7415 .LVL1197: 7416 .thumb 7417 .syntax unified 7418 .LBE1316: 7419 .LBE1315: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7420 .loc 27 174 0 7421 00b0 029D ldr r5, [sp, #8] 7422 00b2 012D cmp r5, #1 7423 00b4 00F03083 beq .L489 7424 .LVL1198: 7425 .loc 27 177 0 7426 00b8 009D ldr r5, [sp] 7427 00ba 33F9027C ldrsh r7, [r3, #-2] 7428 00be B5F90250 ldrsh r5, [r5, #2] 7429 .LVL1199: 7430 .LBB1331: 7431 .LBB1317: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7432 .loc 6 1993 0 7433 .syntax unified 7434 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7435 00c2 25FB0744 smlad r4, r5, r7, r4 7436 @ 0 "" 2 7437 .LVL1200: 7438 .thumb 7439 .syntax unified 7440 .LBE1317: 7441 .LBE1331: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7442 .loc 27 174 0 7443 00c6 029D ldr r5, [sp, #8] 7444 00c8 022D cmp r5, #2 7445 00ca 00F02583 beq .L489 ARM GAS /tmp/ccJrAs6S.s page 372 7446 .LVL1201: 7447 .loc 27 177 0 7448 00ce 009D ldr r5, [sp] 7449 00d0 33F9047C ldrsh r7, [r3, #-4] 7450 00d4 B5F90450 ldrsh r5, [r5, #4] 7451 .LVL1202: 7452 .LBB1332: 7453 .LBB1318: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7454 .loc 6 1993 0 7455 .syntax unified 7456 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7457 00d8 25FB0744 smlad r4, r5, r7, r4 7458 @ 0 "" 2 7459 .LVL1203: 7460 .thumb 7461 .syntax unified 7462 .LBE1318: 7463 .LBE1332: 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement loop counter */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k--; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** *pOut++ = (q15_t) (sum >> 15); 7464 .loc 27 184 0 7465 00dc E413 asrs r4, r4, #15 7466 .LVL1204: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7467 .loc 27 165 0 7468 00de BCF1030F cmp ip, #3 7469 .loc 27 184 0 7470 00e2 2EF81940 strh r4, [lr, r9, lsl #1] @ movhi 7471 .LVL1205: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7472 .loc 27 165 0 7473 00e6 00F2C180 bhi .L483 7474 .LVL1206: 7475 .L548: 7476 00ea 002A cmp r2, #0 7477 00ec 00F04883 beq .L563 7478 .LVL1207: 7479 00f0 181D adds r0, r3, #4 7480 .LVL1208: 7481 00f2 0AF10408 add r8, r10, #4 7482 .LVL1209: 7483 00f6 8A1E subs r2, r1, #2 7484 .LVL1210: 7485 00f8 09F10304 add r4, r9, #3 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7486 .loc 27 174 0 7487 00fc BCF1000F cmp ip, #0 7488 0100 00F04083 beq .L608 7489 .LVL1211: 7490 .L491: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 373 7491 .loc 27 177 0 7492 0104 0099 ldr r1, [sp] 7493 0106 B3F90250 ldrsh r5, [r3, #2] 7494 010a B1F90010 ldrsh r1, [r1] 7495 .LVL1212: 7496 .LBB1333: 7497 .LBB1319: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7498 .loc 6 1993 0 7499 010e 0027 movs r7, #0 7500 .syntax unified 7501 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7502 0110 21FB0571 smlad r1, r1, r5, r7 7503 @ 0 "" 2 7504 .LVL1213: 7505 .thumb 7506 .syntax unified 7507 .LBE1319: 7508 .LBE1333: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7509 .loc 27 174 0 7510 0114 BCF1010F cmp ip, #1 7511 0118 00F00283 beq .L494 7512 .LVL1214: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7513 .loc 27 177 0 7514 011c 009D ldr r5, [sp] 7515 011e B3F90070 ldrsh r7, [r3] 7516 0122 B5F90250 ldrsh r5, [r5, #2] 7517 .LVL1215: 7518 .LBB1334: 7519 .LBB1320: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7520 .loc 6 1993 0 7521 .syntax unified 7522 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7523 0126 25FB0711 smlad r1, r5, r7, r1 7524 @ 0 "" 2 7525 .LVL1216: 7526 .thumb 7527 .syntax unified 7528 .LBE1320: 7529 .LBE1334: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7530 .loc 27 174 0 7531 012a BCF1020F cmp ip, #2 7532 012e 00F0F782 beq .L494 7533 .LVL1217: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7534 .loc 27 177 0 7535 0132 33F9025C ldrsh r5, [r3, #-2] 7536 0136 009B ldr r3, [sp] 7537 .LVL1218: 7538 0138 B3F90430 ldrsh r3, [r3, #4] 7539 .LVL1219: 7540 .LBB1335: 7541 .LBB1321: ARM GAS /tmp/ccJrAs6S.s page 374 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7542 .loc 6 1993 0 7543 .syntax unified 7544 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7545 013c 23FB0513 smlad r3, r3, r5, r1 7546 @ 0 "" 2 7547 .LVL1220: 7548 .thumb 7549 .syntax unified 7550 .LBE1321: 7551 .LBE1335: 7552 .loc 27 184 0 7553 0140 DB13 asrs r3, r3, #15 7554 .LVL1221: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7555 .loc 27 165 0 7556 0142 032C cmp r4, #3 7557 .loc 27 184 0 7558 0144 AAF80230 strh r3, [r10, #2] @ movhi 7559 .LVL1222: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7560 .loc 27 165 0 7561 0148 00F21483 bhi .L561 7562 .LVL1223: 7563 .L549: 7564 014c 002A cmp r2, #0 7565 014e 00F01783 beq .L563 7566 .LVL1224: 7567 0152 871C adds r7, r0, #2 7568 0154 08F1020A add r10, r8, #2 7569 0158 511E subs r1, r2, #1 7570 015a 04F1010C add ip, r4, #1 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7571 .loc 27 174 0 7572 015e 002C cmp r4, #0 7573 0160 00F02083 beq .L609 7574 .L496: 7575 .LVL1225: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7576 .loc 27 177 0 7577 0164 009B ldr r3, [sp] 7578 0166 B0F90020 ldrsh r2, [r0] 7579 016a B3F90030 ldrsh r3, [r3] 7580 .LVL1226: 7581 .LBB1336: 7582 .LBB1322: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7583 .loc 6 1993 0 7584 016e 0025 movs r5, #0 7585 .syntax unified 7586 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7587 0170 23FB0253 smlad r3, r3, r2, r5 7588 @ 0 "" 2 7589 .LVL1227: 7590 .thumb 7591 .syntax unified 7592 .LBE1322: ARM GAS /tmp/ccJrAs6S.s page 375 7593 .LBE1336: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7594 .loc 27 174 0 7595 0174 012C cmp r4, #1 7596 0176 00F0E082 beq .L499 7597 .LVL1228: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7598 .loc 27 177 0 7599 017a 009A ldr r2, [sp] 7600 017c 30F9025C ldrsh r5, [r0, #-2] 7601 0180 B2F90220 ldrsh r2, [r2, #2] 7602 .LVL1229: 7603 .LBB1337: 7604 .LBB1323: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7605 .loc 6 1993 0 7606 .syntax unified 7607 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7608 0184 22FB0533 smlad r3, r2, r5, r3 7609 @ 0 "" 2 7610 .LVL1230: 7611 .thumb 7612 .syntax unified 7613 .LBE1323: 7614 .LBE1337: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7615 .loc 27 174 0 7616 0188 022C cmp r4, #2 7617 018a 00F0D682 beq .L499 7618 .LVL1231: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7619 .loc 27 177 0 7620 018e 009A ldr r2, [sp] 7621 0190 30F9040C ldrsh r0, [r0, #-4] 7622 0194 B2F90420 ldrsh r2, [r2, #4] 7623 .LVL1232: 7624 .LBB1338: 7625 .LBB1324: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7626 .loc 6 1993 0 7627 .syntax unified 7628 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7629 0198 22FB0033 smlad r3, r2, r0, r3 7630 @ 0 "" 2 7631 .LVL1233: 7632 .thumb 7633 .syntax unified 7634 .LBE1324: 7635 .LBE1338: 7636 .loc 27 184 0 7637 019c DB13 asrs r3, r3, #15 7638 .LVL1234: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7639 .loc 27 165 0 7640 019e BCF1030F cmp ip, #3 7641 .loc 27 184 0 7642 01a2 A8F80030 strh r3, [r8] @ movhi ARM GAS /tmp/ccJrAs6S.s page 376 7643 .LVL1235: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7644 .loc 27 165 0 7645 01a6 00F2E782 bhi .L560 7646 .LVL1236: 7647 .L550: 7648 01aa 0029 cmp r1, #0 7649 01ac 00F0A980 beq .L481 7650 .LVL1237: 7651 01b0 B81C adds r0, r7, #2 7652 01b2 0AF10208 add r8, r10, #2 7653 01b6 4A1E subs r2, r1, #1 7654 01b8 0CF10104 add r4, ip, #1 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7655 .loc 27 174 0 7656 01bc BCF1000F cmp ip, #0 7657 01c0 00F0FD82 beq .L610 7658 .L501: 7659 .LVL1238: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7660 .loc 27 177 0 7661 01c4 009B ldr r3, [sp] 7662 01c6 B7F90010 ldrsh r1, [r7] 7663 01ca B3F90030 ldrsh r3, [r3] 7664 .LVL1239: 7665 .LBB1339: 7666 .LBB1325: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7667 .loc 6 1993 0 7668 01ce 0025 movs r5, #0 7669 .syntax unified 7670 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7671 01d0 23FB0153 smlad r3, r3, r1, r5 7672 @ 0 "" 2 7673 .LVL1240: 7674 .thumb 7675 .syntax unified 7676 .LBE1325: 7677 .LBE1339: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7678 .loc 27 174 0 7679 01d4 BCF1010F cmp ip, #1 7680 01d8 00F0E082 beq .L504 7681 .LVL1241: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7682 .loc 27 177 0 7683 01dc 0099 ldr r1, [sp] 7684 01de 37F9025C ldrsh r5, [r7, #-2] 7685 01e2 B1F90210 ldrsh r1, [r1, #2] 7686 .LVL1242: 7687 .LBB1340: 7688 .LBB1326: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7689 .loc 6 1993 0 7690 .syntax unified 7691 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7692 01e6 21FB0533 smlad r3, r1, r5, r3 ARM GAS /tmp/ccJrAs6S.s page 377 7693 @ 0 "" 2 7694 .LVL1243: 7695 .thumb 7696 .syntax unified 7697 .LBE1326: 7698 .LBE1340: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7699 .loc 27 174 0 7700 01ea BCF1020F cmp ip, #2 7701 01ee 00F0D582 beq .L504 7702 .LVL1244: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7703 .loc 27 177 0 7704 01f2 0099 ldr r1, [sp] 7705 01f4 37F9045C ldrsh r5, [r7, #-4] 7706 01f8 B1F90410 ldrsh r1, [r1, #4] 7707 .LVL1245: 7708 .LBB1341: 7709 .LBB1327: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7710 .loc 6 1993 0 7711 .syntax unified 7712 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7713 01fc 21FB0533 smlad r3, r1, r5, r3 7714 @ 0 "" 2 7715 .LVL1246: 7716 .thumb 7717 .syntax unified 7718 .LBE1327: 7719 .LBE1341: 7720 .loc 27 184 0 7721 0200 DB13 asrs r3, r3, #15 7722 .LVL1247: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7723 .loc 27 165 0 7724 0202 032C cmp r4, #3 7725 .loc 27 184 0 7726 0204 AAF80030 strh r3, [r10] @ movhi 7727 .LVL1248: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7728 .loc 27 165 0 7729 0208 00F2B482 bhi .L561 7730 .LVL1249: 7731 .L551: 7732 020c 002A cmp r2, #0 7733 020e 00F0B782 beq .L563 7734 .LVL1250: 7735 0212 013A subs r2, r2, #1 7736 0214 871C adds r7, r0, #2 7737 0216 08F1020A add r10, r8, #2 7738 021a 04F1010C add ip, r4, #1 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7739 .loc 27 174 0 7740 021e 002C cmp r4, #0 7741 0220 00F0D982 beq .L506 7742 .L552: 7743 .LVL1251: ARM GAS /tmp/ccJrAs6S.s page 378 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7744 .loc 27 177 0 7745 0224 009B ldr r3, [sp] 7746 0226 B0F90010 ldrsh r1, [r0] 7747 022a B3F90030 ldrsh r3, [r3] 7748 .LVL1252: 7749 .LBB1342: 7750 .LBB1328: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7751 .loc 6 1993 0 7752 022e 0025 movs r5, #0 7753 .syntax unified 7754 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7755 0230 23FB0153 smlad r3, r3, r1, r5 7756 @ 0 "" 2 7757 .LVL1253: 7758 .thumb 7759 .syntax unified 7760 .LBE1328: 7761 .LBE1342: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7762 .loc 27 174 0 7763 0234 012C cmp r4, #1 7764 0236 00F08682 beq .L485 7765 .LVL1254: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7766 .loc 27 177 0 7767 023a 0099 ldr r1, [sp] 7768 023c 30F9025C ldrsh r5, [r0, #-2] 7769 0240 B1F90210 ldrsh r1, [r1, #2] 7770 .LVL1255: 7771 .LBB1343: 7772 .LBB1329: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7773 .loc 6 1993 0 7774 .syntax unified 7775 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7776 0244 21FB0533 smlad r3, r1, r5, r3 7777 @ 0 "" 2 7778 .LVL1256: 7779 .thumb 7780 .syntax unified 7781 .LBE1329: 7782 .LBE1343: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7783 .loc 27 174 0 7784 0248 022C cmp r4, #2 7785 024a 00F07C82 beq .L485 7786 .LVL1257: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7787 .loc 27 177 0 7788 024e 0099 ldr r1, [sp] 7789 0250 30F9040C ldrsh r0, [r0, #-4] 7790 0254 B1F90410 ldrsh r1, [r1, #4] 7791 .LVL1258: 7792 .LBB1344: 7793 .LBB1330: ARM GAS /tmp/ccJrAs6S.s page 379 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7794 .loc 6 1993 0 7795 .syntax unified 7796 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7797 0258 21FB0033 smlad r3, r1, r0, r3 7798 @ 0 "" 2 7799 .LVL1259: 7800 .thumb 7801 .syntax unified 7802 .LBE1330: 7803 .LBE1344: 7804 .loc 27 184 0 7805 025c DB13 asrs r3, r3, #15 7806 .LVL1260: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7807 .loc 27 165 0 7808 025e BCF1030F cmp ip, #3 7809 .loc 27 184 0 7810 0262 A8F80030 strh r3, [r8] @ movhi 7811 .LVL1261: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7812 .loc 27 165 0 7813 0266 4CD9 bls .L481 7814 .LVL1262: 7815 0268 D046 mov r8, r10 7816 .LVL1263: 7817 026a 3846 mov r0, r7 7818 .LVL1264: 7819 .L483: 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = ++pSrc2; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px = pIn1; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Increment MAC count */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** count++; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement loop counter */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize1--; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* The second part of the stage starts here */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* The internal loop, over count, is unrolled by 4 */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* To, read the last two inputB samples using SIMD: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = py - 1; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (blockSize1 > 0) 7820 .loc 27 203 0 7821 026c 002A cmp r2, #0 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7822 .loc 27 201 0 7823 026e A0F1020E sub lr, r0, #2 7824 .LVL1265: 7825 .loc 27 203 0 7826 0272 40F38582 ble .L563 7827 .L553: ARM GAS /tmp/ccJrAs6S.s page 380 7828 0276 CDF814B0 str fp, [sp, #20] 7829 027a DDF800B0 ldr fp, [sp] 7830 027e 08EB420A add r10, r8, r2, lsl #1 7831 .LVL1266: 7832 .L515: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Accumulator is made zero for every iteration */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = 0; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k = count >> 2U; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** a second loop below computes MACs for the remaining 1 to 3 samples. */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (k > 0U) 7833 .loc 27 213 0 7834 0282 5FEA9C07 lsrs r7, ip, #2 7835 0286 7246 mov r2, lr 7836 .LVL1267: 7837 0288 00F00B82 beq .L564 7838 028c 7446 mov r4, lr 7839 028e 5846 mov r0, fp 7840 0290 3D46 mov r5, r7 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 7841 .loc 27 206 0 7842 0292 0023 movs r3, #0 7843 .LVL1268: 7844 .L511: 7845 .LBB1345: 7846 .LBB1346: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7847 .loc 3 928 0 7848 0294 0268 ldr r2, [r0] @ unaligned 7849 .LBE1346: 7850 .LBE1345: 7851 .LBB1347: 7852 .LBB1348: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7853 .loc 3 948 0 7854 0296 2168 ldr r1, [r4] @ unaligned 7855 .LBE1348: 7856 .LBE1347: 7857 .LBB1349: 7858 .LBB1350: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7859 .loc 6 2001 0 7860 .syntax unified 7861 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7862 0298 22FB1133 smladx r3, r2, r1, r3 7863 @ 0 "" 2 7864 .LVL1269: 7865 .thumb 7866 .syntax unified 7867 .LBE1350: 7868 .LBE1349: 7869 .LBB1351: 7870 .LBB1352: ARM GAS /tmp/ccJrAs6S.s page 381 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7871 .loc 3 928 0 7872 029c 4268 ldr r2, [r0, #4] @ unaligned 7873 .LVL1270: 7874 .LBE1352: 7875 .LBE1351: 7876 .LBB1353: 7877 .LBB1354: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7878 .loc 3 948 0 7879 029e 54F8041C ldr r1, [r4, #-4] @ unaligned 7880 02a2 0830 adds r0, r0, #8 7881 .LVL1271: 7882 02a4 083C subs r4, r4, #8 7883 .LVL1272: 7884 .LBE1354: 7885 .LBE1353: 7886 .LBB1355: 7887 .LBB1356: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7888 .loc 6 2001 0 7889 .syntax unified 7890 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7891 02a6 22FB1133 smladx r3, r2, r1, r3 7892 @ 0 "" 2 7893 .LVL1273: 7894 .thumb 7895 .syntax unified 7896 .LBE1356: 7897 .LBE1355: 7898 .loc 27 213 0 7899 02aa 013D subs r5, r5, #1 7900 .LVL1274: 7901 02ac F2D1 bne .L511 7902 02ae C7EB4772 rsb r2, r7, r7, lsl #29 7903 02b2 0EEBC202 add r2, lr, r2, lsl #3 7904 02b6 0BEBC707 add r7, fp, r7, lsl #3 7905 .LVL1275: 7906 .L510: 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Perform the multiply-accumulate */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement loop counter */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k--; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* For the next MAC operations, the pointer py is used without SIMD 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** So, py is incremented by 1 */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = py + 1U; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** No loop unrolling is used. */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k = count % 0x4U; ARM GAS /tmp/ccJrAs6S.s page 382 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (k > 0U) 7907 .loc 27 233 0 7908 02ba 1CF00300 ands r0, ip, #3 7909 .LVL1276: 7910 02be 15D0 beq .L512 7911 .LVL1277: 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Perform the multiply-accumulates */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = __SMLAD(*px++, *py--, sum); 7912 .loc 27 236 0 7913 02c0 B7F90010 ldrsh r1, [r7] 7914 .LVL1278: 7915 02c4 B2F90240 ldrsh r4, [r2, #2] 7916 .LVL1279: 7917 .LBB1357: 7918 .LBB1358: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7919 .loc 6 1993 0 7920 .syntax unified 7921 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7922 02c8 21FB0433 smlad r3, r1, r4, r3 7923 @ 0 "" 2 7924 .LVL1280: 7925 .thumb 7926 .syntax unified 7927 .LBE1358: 7928 .LBE1357: 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7929 .loc 27 233 0 7930 02cc 0128 cmp r0, #1 7931 02ce 0DD0 beq .L512 7932 .LVL1281: 7933 .loc 27 236 0 7934 02d0 B7F90210 ldrsh r1, [r7, #2] 7935 .LVL1282: 7936 02d4 B2F90040 ldrsh r4, [r2] 7937 .LVL1283: 7938 .LBB1361: 7939 .LBB1359: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7940 .loc 6 1993 0 7941 .syntax unified 7942 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7943 02d8 21FB0433 smlad r3, r1, r4, r3 7944 @ 0 "" 2 7945 .LVL1284: 7946 .thumb 7947 .syntax unified 7948 .LBE1359: 7949 .LBE1361: 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7950 .loc 27 233 0 7951 02dc 0228 cmp r0, #2 7952 02de 05D0 beq .L512 7953 .LVL1285: 7954 .loc 27 236 0 ARM GAS /tmp/ccJrAs6S.s page 383 7955 02e0 B7F90410 ldrsh r1, [r7, #4] 7956 .LVL1286: 7957 02e4 32F9022C ldrsh r2, [r2, #-2] 7958 .LVL1287: 7959 .LBB1362: 7960 .LBB1360: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7961 .loc 6 1993 0 7962 .syntax unified 7963 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7964 02e8 21FB0233 smlad r3, r1, r2, r3 7965 @ 0 "" 2 7966 .LVL1288: 7967 .thumb 7968 .syntax unified 7969 .L512: 7970 .LBE1360: 7971 .LBE1362: 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement loop counter */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k--; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** *pOut++ = (q15_t) (sum >> 15); 7972 .loc 27 243 0 7973 02ec DB13 asrs r3, r3, #15 7974 02ee 28F8023B strh r3, [r8], #2 @ movhi 7975 .LVL1289: 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7976 .loc 27 203 0 7977 02f2 D045 cmp r8, r10 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = ++pSrc2 - 1U; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px = pIn1; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Increment MAC count */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** count++; 7978 .loc 27 250 0 7979 02f4 0CF1010C add ip, ip, #1 7980 .LVL1290: 7981 02f8 0EF1020E add lr, lr, #2 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 7982 .loc 27 203 0 7983 02fc C1D1 bne .L515 7984 02fe DDF814B0 ldr fp, [sp, #20] 7985 .LVL1291: 7986 .L481: 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement loop counter */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize1--; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* -------------------------- 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Initializations of stage2 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * ------------------------*/ ARM GAS /tmp/ccJrAs6S.s page 384 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * .... 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Working pointer of inputA */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) 7987 .loc 27 267 0 7988 0302 019B ldr r3, [sp, #4] 7989 0304 A9EB0309 sub r9, r9, r3 7990 .LVL1292: 7991 0308 B9F1000F cmp r9, #0 7992 030c C0F20182 blt .L565 7993 .L615: 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** pSrc1 = pIn1 + firstIndex - srcBLen + 1; 7994 .loc 27 269 0 7995 0310 029A ldr r2, [sp, #8] 7996 0312 A2EB030C sub ip, r2, r3 7997 0316 009B ldr r3, [sp] 7998 0318 03EB4C03 add r3, r3, ip, lsl #1 7999 031c 0A93 str r3, [sp, #40] 8000 .LVL1293: 8001 .L516: 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** else 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** pSrc1 = pIn1; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px = pSrc1; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Working pointer of inputB */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** pSrc2 = pIn2 + (srcBLen - 1U); 8002 .loc 27 278 0 8003 031e 0199 ldr r1, [sp, #4] 8004 0320 049B ldr r3, [sp, #16] 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = pSrc2; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* count is the index by which the pointer pIn1 to be incremented */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** count = 0U; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* ------------------- 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Stage2 process 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * ------------------*/ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * So, to loop unroll over blockSize2, 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * srcBLen should be greater than or equal to 4 */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** if (srcBLen >= 4U) 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blkCnt = ((uint32_t) blockSize2 >> 2U); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (blkCnt > 0U) 8005 .loc 27 296 0 ARM GAS /tmp/ccJrAs6S.s page 385 8006 0322 089A ldr r2, [sp, #32] 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = pSrc2; 8007 .loc 27 278 0 8008 0324 01F10040 add r0, r1, #-2147483648 8009 0328 0138 subs r0, r0, #1 8010 032a 03EB4003 add r3, r3, r0, lsl #1 8011 032e 0993 str r3, [sp, #36] 8012 .LVL1294: 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8013 .loc 27 291 0 8014 0330 0329 cmp r1, #3 8015 0332 A3F10203 sub r3, r3, #2 8016 .LVL1295: 8017 0336 0293 str r3, [sp, #8] 8018 0338 40F2B681 bls .L517 8019 .LVL1296: 8020 .loc 27 296 0 8021 033c 9408 lsrs r4, r2, #2 8022 .LVL1297: 8023 033e 0B94 str r4, [sp, #44] 8024 0340 00F05682 beq .L566 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = py - 1U; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Set all accumulators to zero */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc0 = 0; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc1 = 0; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc2 = 0; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc3 = 0; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* read x[0], x[1] samples */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** x0 = read_q15x2 ((q15_t *) px); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* read x[1], x[2] samples */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** x1 = read_q15x2 ((q15_t *) px + 1); 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px += 2U; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k = srcBLen >> 2U; 8025 .loc 27 315 0 8026 0344 8808 lsrs r0, r1, #2 8027 0346 C0EB4072 rsb r2, r0, r0, lsl #29 8028 034a 03EBC202 add r2, r3, r2, lsl #3 8029 034e C300 lsls r3, r0, #3 8030 0350 0590 str r0, [sp, #20] 8031 0352 E000 lsls r0, r4, #3 8032 0354 1C1D adds r4, r3, #4 8033 .LVL1298: 8034 0356 043B subs r3, r3, #4 8035 0358 0693 str r3, [sp, #24] 8036 035a 0A9B ldr r3, [sp, #40] 8037 035c 0C90 str r0, [sp, #48] 8038 035e 0832 adds r2, r2, #8 8039 0360 1818 adds r0, r3, r0 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. ARM GAS /tmp/ccJrAs6S.s page 386 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** do 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read the last two inputB samples using SIMD: 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * y[srcBLen - 1] and y[srcBLen - 2] */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** c0 = read_q15x2_da ((q15_t **) &py); 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc0 = __SMLADX(x0, c0, acc0); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc1 = __SMLADX(x1, c0, acc1); 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read x[2], x[3] */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** x2 = read_q15x2 ((q15_t *) px); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read x[3], x[4] */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px + 1); 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc2 = __SMLADX(x2, c0, acc2); 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc3 = __SMLADX(x3, c0, acc3); 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read y[srcBLen - 3] and y[srcBLen - 4] */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** c0 = read_q15x2_da ((q15_t **) &py); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc0 = __SMLADX(x2, c0, acc0); 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc1 = __SMLADX(x3, c0, acc1); 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read x[4], x[5] */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** x0 = read_q15x2 ((q15_t *) px + 2); 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read x[5], x[6] */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** x1 = read_q15x2 ((q15_t *) px + 3); 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px += 4U; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc2 = __SMLADX(x0, c0, acc2); 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc3 = __SMLADX(x1, c0, acc3); 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } while (--k); 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* For the next MAC operations, SIMD is not used 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** So, the 16 bit pointer if inputB, py is updated */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** No loop unrolling is used. */ 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k = srcBLen % 0x4U; 8040 .loc 27 372 0 8041 0362 01F00301 and r1, r1, #3 ARM GAS /tmp/ccJrAs6S.s page 387 8042 0366 CDE90DBA strd fp, r10, [sp, #52] 8043 036a D046 mov r8, r10 8044 036c 0794 str r4, [sp, #28] 8045 036e 0490 str r0, [sp, #16] 8046 .LVL1299: 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8047 .loc 27 275 0 8048 0370 9946 mov r9, r3 8049 .loc 27 372 0 8050 0372 8A46 mov r10, r1 8051 .LVL1300: 8052 0374 0F96 str r6, [sp, #60] 8053 0376 9346 mov fp, r2 8054 .LVL1301: 8055 .L523: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8056 .loc 27 304 0 8057 0378 0023 movs r3, #0 8058 .LBB1363: 8059 .LBB1364: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8060 .loc 3 909 0 8061 037a D9F80060 ldr r6, [r9] @ unaligned 8062 .LVL1302: 8063 .LBE1364: 8064 .LBE1363: 8065 .LBB1365: 8066 .LBB1366: 8067 037e D9F80240 ldr r4, [r9, #2] @ unaligned 8068 .LVL1303: 8069 .LBE1366: 8070 .LBE1365: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8071 .loc 27 298 0 8072 0382 DDF808C0 ldr ip, [sp, #8] 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8073 .loc 27 315 0 8074 0386 DDF814E0 ldr lr, [sp, #20] 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc3 = 0; 8075 .loc 27 303 0 8076 038a 1F46 mov r7, r3 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc2 = 0; 8077 .loc 27 302 0 8078 038c 1846 mov r0, r3 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc1 = 0; 8079 .loc 27 301 0 8080 038e 1D46 mov r5, r3 8081 0390 09F10401 add r1, r9, #4 8082 .LVL1304: 8083 .L519: 8084 .LBB1367: 8085 .LBB1368: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8086 .loc 3 948 0 discriminator 1 8087 0394 DCF80020 ldr r2, [ip] @ unaligned 8088 .LVL1305: 8089 .LBE1368: ARM GAS /tmp/ccJrAs6S.s page 388 8090 .LBE1367: 8091 .LBB1369: 8092 .LBB1370: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8093 .loc 6 2001 0 discriminator 1 8094 .syntax unified 8095 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8096 0398 26FB1255 smladx r5, r6, r2, r5 8097 @ 0 "" 2 8098 .LVL1306: 8099 .thumb 8100 .syntax unified 8101 .LBE1370: 8102 .LBE1369: 8103 .LBB1371: 8104 .LBB1372: 8105 .syntax unified 8106 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8107 039c 24FB1200 smladx r0, r4, r2, r0 8108 @ 0 "" 2 8109 .LVL1307: 8110 .thumb 8111 .syntax unified 8112 .LBE1372: 8113 .LBE1371: 8114 .LBB1373: 8115 .LBB1374: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8116 .loc 3 909 0 discriminator 1 8117 03a0 0C68 ldr r4, [r1] @ unaligned 8118 .LVL1308: 8119 .LBE1374: 8120 .LBE1373: 8121 .LBB1375: 8122 .LBB1376: 8123 03a2 D1F80260 ldr r6, [r1, #2] @ unaligned 8124 .LVL1309: 8125 .LBE1376: 8126 .LBE1375: 8127 .LBB1377: 8128 .LBB1378: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8129 .loc 6 2001 0 discriminator 1 8130 .syntax unified 8131 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8132 03a6 24FB1277 smladx r7, r4, r2, r7 8133 @ 0 "" 2 8134 .LVL1310: 8135 .thumb 8136 .syntax unified 8137 .LBE1378: 8138 .LBE1377: 8139 .LBB1379: 8140 .LBB1380: 8141 .syntax unified 8142 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8143 03aa 26FB1233 smladx r3, r6, r2, r3 ARM GAS /tmp/ccJrAs6S.s page 389 8144 @ 0 "" 2 8145 .LVL1311: 8146 .thumb 8147 .syntax unified 8148 .LBE1380: 8149 .LBE1379: 8150 .LBB1381: 8151 .LBB1382: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8152 .loc 3 948 0 discriminator 1 8153 03ae 5CF8042C ldr r2, [ip, #-4] @ unaligned 8154 .LVL1312: 8155 03b2 ACF1080C sub ip, ip, #8 8156 .LVL1313: 8157 .LBE1382: 8158 .LBE1381: 8159 .LBB1383: 8160 .LBB1384: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8161 .loc 6 2001 0 discriminator 1 8162 .syntax unified 8163 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8164 03b6 24FB1255 smladx r5, r4, r2, r5 8165 @ 0 "" 2 8166 .LVL1314: 8167 .thumb 8168 .syntax unified 8169 .LBE1384: 8170 .LBE1383: 8171 .LBB1385: 8172 .LBB1386: 8173 .syntax unified 8174 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8175 03ba 26FB1200 smladx r0, r6, r2, r0 8176 @ 0 "" 2 8177 .LVL1315: 8178 .thumb 8179 .syntax unified 8180 .LBE1386: 8181 .LBE1385: 8182 .LBB1387: 8183 .LBB1388: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8184 .loc 3 909 0 discriminator 1 8185 03be 4E68 ldr r6, [r1, #4] @ unaligned 8186 .LVL1316: 8187 .LBE1388: 8188 .LBE1387: 8189 .LBB1389: 8190 .LBB1390: 8191 03c0 D1F80640 ldr r4, [r1, #6] @ unaligned 8192 .LVL1317: 8193 .LBE1390: 8194 .LBE1389: 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8195 .loc 27 357 0 discriminator 1 8196 03c4 0831 adds r1, r1, #8 ARM GAS /tmp/ccJrAs6S.s page 390 8197 .LVL1318: 8198 .LBB1391: 8199 .LBB1392: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8200 .loc 6 2001 0 discriminator 1 8201 .syntax unified 8202 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8203 03c6 26FB1277 smladx r7, r6, r2, r7 8204 @ 0 "" 2 8205 .LVL1319: 8206 .thumb 8207 .syntax unified 8208 .LBE1392: 8209 .LBE1391: 8210 .LBB1393: 8211 .LBB1394: 8212 .syntax unified 8213 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8214 03ca 24FB1233 smladx r3, r4, r2, r3 8215 @ 0 "" 2 8216 .LVL1320: 8217 .thumb 8218 .syntax unified 8219 .LBE1394: 8220 .LBE1393: 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8221 .loc 27 365 0 discriminator 1 8222 03ce BEF1010E subs lr, lr, #1 8223 .LVL1321: 8224 03d2 DFD1 bne .L519 8225 03d4 079A ldr r2, [sp, #28] 8226 03d6 0699 ldr r1, [sp, #24] 8227 .LVL1322: 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** if (k == 1U) 8228 .loc 27 374 0 8229 03d8 BAF1010F cmp r10, #1 8230 03dc 4A44 add r2, r9, r2 8231 03de 4944 add r1, r9, r1 8232 .LVL1323: 8233 03e0 00F03481 beq .L611 8234 .LVL1324: 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read y[srcBLen - 5] */ 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** c0 = *(py + 1); 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** c0 = c0 << 16U; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #else 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** c0 = c0 & 0x0000FFFF; 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read x[7] */ 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px); 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px++; 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Perform the multiply-accumulate */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc0 = __SMLAD (x0, c0, acc0); ARM GAS /tmp/ccJrAs6S.s page 391 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc1 = __SMLAD (x1, c0, acc1); 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc2 = __SMLADX(x1, c0, acc2); 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc3 = __SMLADX(x3, c0, acc3); 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** if (k == 2U) 8235 .loc 27 395 0 8236 03e4 BAF1020F cmp r10, #2 8237 03e8 40F03D81 bne .L522 8238 .LVL1325: 8239 .LBB1395: 8240 .LBB1396: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8241 .loc 3 909 0 8242 03ec 5BF8081C ldr r1, [fp, #-8] @ unaligned 8243 .LVL1326: 8244 .LBE1396: 8245 .LBE1395: 8246 .LBB1397: 8247 .LBB1398: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8248 .loc 6 2001 0 8249 .syntax unified 8250 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8251 03f0 26FB1155 smladx r5, r6, r1, r5 8252 @ 0 "" 2 8253 .LVL1327: 8254 .thumb 8255 .syntax unified 8256 .LBE1398: 8257 .LBE1397: 8258 .LBB1399: 8259 .LBB1400: 8260 .syntax unified 8261 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8262 03f4 24FB1100 smladx r0, r4, r1, r0 8263 @ 0 "" 2 8264 .LVL1328: 8265 .thumb 8266 .syntax unified 8267 .LBE1400: 8268 .LBE1399: 8269 .LBB1401: 8270 .LBB1402: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8271 .loc 3 909 0 8272 03f8 1468 ldr r4, [r2] @ unaligned 8273 .LBE1402: 8274 .LBE1401: 8275 .LBB1403: 8276 .LBB1404: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8277 .loc 6 2001 0 8278 .syntax unified 8279 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8280 03fa 24FB1177 smladx r7, r4, r1, r7 8281 @ 0 "" 2 ARM GAS /tmp/ccJrAs6S.s page 392 8282 .LVL1329: 8283 .thumb 8284 .syntax unified 8285 .LBE1404: 8286 .LBE1403: 8287 .LBB1405: 8288 .LBB1406: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8289 .loc 3 909 0 8290 03fe D2F80220 ldr r2, [r2, #2] @ unaligned 8291 .LVL1330: 8292 .LBE1406: 8293 .LBE1405: 8294 .LBB1407: 8295 .LBB1408: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8296 .loc 6 2001 0 8297 .syntax unified 8298 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8299 0402 22FB1133 smladx r3, r2, r1, r3 8300 @ 0 "" 2 8301 .LVL1331: 8302 .thumb 8303 .syntax unified 8304 .L521: 8305 .LBE1408: 8306 .LBE1407: 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read y[srcBLen - 5], y[srcBLen - 6] */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** c0 = read_q15x2 ((q15_t *) py); 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read x[7], x[8] */ 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px); 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read x[9] */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** x2 = read_q15x2 ((q15_t *) px + 1); 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px += 2U; 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Perform the multiply-accumulate */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc0 = __SMLADX(x0, c0, acc0); 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc1 = __SMLADX(x1, c0, acc1); 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc2 = __SMLADX(x3, c0, acc2); 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc3 = __SMLADX(x2, c0, acc3); 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** if (k == 3U) 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read y[srcBLen - 5], y[srcBLen - 6] */ 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** c0 = read_q15x2 ((q15_t *) py); 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read x[7], x[8] */ 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px); 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read x[9] */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** x2 = read_q15x2 ((q15_t *) px + 1); 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Perform the multiply-accumulate */ ARM GAS /tmp/ccJrAs6S.s page 393 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc0 = __SMLADX(x0, c0, acc0); 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc1 = __SMLADX(x1, c0, acc1); 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc2 = __SMLADX(x3, c0, acc2); 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc3 = __SMLADX(x2, c0, acc3); 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** c0 = *(py-1); 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** c0 = c0 << 16U; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #else 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** c0 = c0 & 0x0000FFFF; 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Read x[10] */ 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px + 2); 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px += 3U; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Perform the multiply-accumulates */ 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc0 = __SMLADX(x1, c0, acc0); 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc1 = __SMLAD (x2, c0, acc1); 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc2 = __SMLADX(x2, c0, acc2); 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** acc3 = __SMLADX(x3, c0, acc3); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Store the results in the accumulators in the destination buffer. */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** write_q15x2_ia (&pOut, __PKHBT(acc0 >> 15, acc1 >> 15, 16)); 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** write_q15x2_ia (&pOut, __PKHBT(acc2 >> 15, acc3 >> 15, 16)); 8307 .loc 27 452 0 8308 0406 C7F3CF37 ubfx r7, r7, #15, #16 8309 .LVL1332: 8310 040a DB13 asrs r3, r3, #15 8311 .LVL1333: 8312 040c 47EA0343 orr r3, r7, r3, lsl #16 8313 .LBB1409: 8314 .LBB1410: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8315 .loc 3 969 0 8316 0410 C8F80430 str r3, [r8, #4] @ unaligned 8317 .LBE1410: 8318 .LBE1409: 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8319 .loc 27 296 0 8320 0414 049B ldr r3, [sp, #16] 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** write_q15x2_ia (&pOut, __PKHBT(acc2 >> 15, acc3 >> 15, 16)); 8321 .loc 27 451 0 8322 0416 C5F3CF35 ubfx r5, r5, #15, #16 8323 .LVL1334: 8324 041a C013 asrs r0, r0, #15 8325 .LVL1335: 8326 041c 09F10809 add r9, r9, #8 8327 0420 45EA0045 orr r5, r5, r0, lsl #16 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8328 .loc 27 296 0 8329 0424 9945 cmp r9, r3 8330 .LBB1411: 8331 .LBB1412: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else ARM GAS /tmp/ccJrAs6S.s page 394 8332 .loc 3 969 0 8333 0426 C8F80050 str r5, [r8] @ unaligned 8334 .LVL1336: 8335 042a 08F10808 add r8, r8, #8 8336 .LVL1337: 8337 .LBE1412: 8338 .LBE1411: 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8339 .loc 27 296 0 8340 042e A3D1 bne .L523 8341 0430 0B9B ldr r3, [sp, #44] 8342 0432 0F9E ldr r6, [sp, #60] 8343 0434 9B00 lsls r3, r3, #2 8344 0436 DDE90DBA ldrd fp, r10, [sp, #52] 8345 043a 0B93 str r3, [sp, #44] 8346 043c 0C9B ldr r3, [sp, #48] 8347 043e 9A44 add r10, r10, r3 8348 0440 089B ldr r3, [sp, #32] 8349 .LVL1338: 8350 .L518: 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #else 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** write_q15x2_ia (&pOut, __PKHBT(acc1 >> 15, acc0 >> 15, 16)); 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** write_q15x2_ia (&pOut, __PKHBT(acc3 >> 15, acc2 >> 15, 16)); 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Increment the pointer pIn1 index, count by 4 */ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** count += 4U; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px = pSrc1 + count; 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = pSrc2; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement the loop counter */ 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blkCnt--; 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** No loop unrolling is used. */ 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blkCnt = (uint32_t) blockSize2 % 0x4U; 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (blkCnt > 0U) 8351 .loc 27 473 0 8352 0442 13F00305 ands r5, r3, #3 8353 0446 00F07C81 beq .L568 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Accumulator is made zero for every iteration */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = 0; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k = srcBLen >> 2U; 8354 .loc 27 479 0 8355 044a 019A ldr r2, [sp, #4] 8356 044c 0B98 ldr r0, [sp, #44] 8357 044e 0A9C ldr r4, [sp, #40] 8358 0450 0796 str r6, [sp, #28] 8359 0452 9108 lsrs r1, r2, #2 8360 0454 00F1010C add ip, r0, #1 ARM GAS /tmp/ccJrAs6S.s page 395 8361 0458 0998 ldr r0, [sp, #36] 8362 045a 01F10053 add r3, r1, #536870912 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** a second loop below computes MACs for the remaining 1 to 3 samples. */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (k > 0U) 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Perform the multiply-accumulates */ 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement loop counter */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k--; 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** ** No loop unrolling is used. */ 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k = srcBLen % 0x4U; 8363 .loc 27 497 0 8364 045e 02F00308 and r8, r2, #3 8365 0462 C1EB417E rsb lr, r1, r1, lsl #29 8366 0466 A0F10802 sub r2, r0, #8 8367 046a 013B subs r3, r3, #1 8368 046c CDE9052B strd r2, fp, [sp, #20] 8369 0470 00EBCE0E add lr, r0, lr, lsl #3 8370 0474 4246 mov r2, r8 8371 0476 DB00 lsls r3, r3, #3 8372 0478 DDF810B0 ldr fp, [sp, #16] 8373 047c 8846 mov r8, r1 8374 047e 04EB4C0C add ip, r4, ip, lsl #1 8375 0482 0AEB4505 add r5, r10, r5, lsl #1 8376 0486 0EF1080E add lr, lr, #8 8377 048a 1E46 mov r6, r3 8378 048c 1146 mov r1, r2 8379 .LVL1339: 8380 .L527: 8381 048e 059C ldr r4, [sp, #20] 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8382 .loc 27 476 0 8383 0490 0491 str r1, [sp, #16] 8384 0492 0BF10807 add r7, fp, #8 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8385 .loc 27 479 0 8386 0496 C146 mov r9, r8 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8387 .loc 27 476 0 8388 0498 0023 movs r3, #0 8389 .LVL1340: 8390 .L525: 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 8391 .loc 27 486 0 8392 049a 37F8082C ldrh r2, [r7, #-8] 8393 049e 2089 ldrh r0, [r4, #8] 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 8394 .loc 27 487 0 ARM GAS /tmp/ccJrAs6S.s page 396 8395 04a0 E188 ldrh r1, [r4, #6] 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 8396 .loc 27 486 0 8397 04a2 12FB0033 smlabb r3, r2, r0, r3 8398 .LVL1341: 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 8399 .loc 27 487 0 8400 04a6 37F8062C ldrh r2, [r7, #-6] 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 8401 .loc 27 488 0 8402 04aa A088 ldrh r0, [r4, #4] 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 8403 .loc 27 487 0 8404 04ac 12FB0133 smlabb r3, r2, r1, r3 8405 .LVL1342: 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 8406 .loc 27 488 0 8407 04b0 37F8041C ldrh r1, [r7, #-4] 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8408 .loc 27 489 0 8409 04b4 37F8022C ldrh r2, [r7, #-2] 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 8410 .loc 27 488 0 8411 04b8 11FB0033 smlabb r3, r1, r0, r3 8412 .LVL1343: 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8413 .loc 27 489 0 8414 04bc 6188 ldrh r1, [r4, #2] 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8415 .loc 27 483 0 8416 04be B9F10109 subs r9, r9, #1 8417 .LVL1344: 8418 04c2 07F10807 add r7, r7, #8 8419 .LVL1345: 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8420 .loc 27 489 0 8421 04c6 12FB0133 smlabb r3, r2, r1, r3 8422 .LVL1346: 8423 04ca A4F10804 sub r4, r4, #8 8424 .LVL1347: 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8425 .loc 27 483 0 8426 04ce E4D1 bne .L525 8427 04d0 0499 ldr r1, [sp, #16] 8428 04d2 B344 add fp, fp, r6 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (k > 0U) 8429 .loc 27 499 0 8430 04d4 A9B1 cbz r1, .L526 8431 .LVL1348: 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Perform the multiply-accumulates */ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 8432 .loc 27 502 0 8433 04d6 BBF80800 ldrh r0, [fp, #8] 8434 04da 3EF8082C ldrh r2, [lr, #-8] 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 397 8435 .loc 27 499 0 8436 04de 0129 cmp r1, #1 8437 .loc 27 502 0 8438 04e0 10FB0233 smlabb r3, r0, r2, r3 8439 .LVL1349: 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8440 .loc 27 499 0 8441 04e4 0DD0 beq .L526 8442 .LVL1350: 8443 .loc 27 502 0 8444 04e6 BBF80A00 ldrh r0, [fp, #10] 8445 04ea 3EF80A2C ldrh r2, [lr, #-10] 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8446 .loc 27 499 0 8447 04ee 0229 cmp r1, #2 8448 .loc 27 502 0 8449 04f0 10FB0233 smlabb r3, r0, r2, r3 8450 .LVL1351: 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8451 .loc 27 499 0 8452 04f4 05D0 beq .L526 8453 .LVL1352: 8454 .loc 27 502 0 8455 04f6 BBF80C00 ldrh r0, [fp, #12] 8456 04fa 3EF80C2C ldrh r2, [lr, #-12] 8457 04fe 10FB0233 smlabb r3, r0, r2, r3 8458 .LVL1353: 8459 .L526: 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement the loop counter */ 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k--; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** *pOut++ = (q15_t) (sum >> 15); 8460 .loc 27 509 0 8461 0502 DB13 asrs r3, r3, #15 8462 .LVL1354: 8463 0504 2AF8023B strh r3, [r10], #2 @ movhi 8464 .LVL1355: 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8465 .loc 27 473 0 8466 0508 AA45 cmp r10, r5 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Increment the pointer pIn1 index, count by 1 */ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** count++; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px = pSrc1 + count; 8467 .loc 27 515 0 8468 050a E346 mov fp, ip 8469 .LVL1356: 8470 050c 0CF1020C add ip, ip, #2 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8471 .loc 27 473 0 8472 0510 BDD1 bne .L527 8473 0512 DDE906B6 ldrd fp, r6, [sp, #24] ARM GAS /tmp/ccJrAs6S.s page 398 8474 .LVL1357: 8475 .L524: 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = pSrc2; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement loop counter */ 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blkCnt--; 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** else 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* If the srcBLen is not a multiple of 4, 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * the blockSize2 loop cannot be unrolled by 4 */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blkCnt = (uint32_t) blockSize2; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (blkCnt > 0U) 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Accumulator is made zero for every iteration */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = 0; 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* srcBLen number of MACS should be performed */ 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k = srcBLen; 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (k > 0U) 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Perform the multiply-accumulate */ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum += ((q31_t) *px++ * *py--); 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement the loop counter */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k--; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** *pOut++ = (q15_t) (sum >> 15); 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Increment the MAC count */ 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** count++; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px = pSrc1 + count; 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = pSrc2; 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement the loop counter */ 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blkCnt--; 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* -------------------------- 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Initializations of stage3 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * -------------------------*/ 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[src 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[src 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * .... 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * sum += x[srcALen-1] * y[srcBLen-1] 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** */ ARM GAS /tmp/ccJrAs6S.s page 399 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** The count variable holds the number of MAC operations performed */ 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** count = srcBLen - 1U; 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Working pointer of inputA */ 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); 8476 .loc 27 577 0 8477 0516 039B ldr r3, [sp, #12] 8478 0518 03F1010C add ip, r3, #1 8479 051c 019B ldr r3, [sp, #4] 8480 051e ACEB030C sub ip, ip, r3 8481 0522 009B ldr r3, [sp] 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px = pSrc1; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Working pointer of inputB */ 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** pSrc2 = pIn2 + (srcBLen - 1U); 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** pIn2 = pSrc2 - 1U; 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = pIn2; 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* ------------------- 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * Stage3 process 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * ------------------*/ 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* For loop unrolling by 4, this stage is divided into two. */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* First part of this stage computes the MAC operations greater than 4 */ 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Second part of this stage computes the MAC operations less than or equal to 4 */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* The first part of the stage starts here */ 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** j = count >> 2U; 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while ((j > 0U) && (blockSize3 > 0)) 8482 .loc 27 596 0 8483 0524 B708 lsrs r7, r6, #2 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px = pSrc1; 8484 .loc 27 577 0 8485 0526 03EB4C0C add ip, r3, ip, lsl #1 8486 .LVL1358: 8487 .loc 27 596 0 8488 052a 00F05F81 beq .L569 8489 052e BBF1000F cmp fp, #0 8490 0532 40F38780 ble .L542 8491 .LVL1359: 8492 0536 B946 mov r9, r7 8493 .LVL1360: 8494 0538 0CEB470E add lr, ip, r7, lsl #1 8495 053c DDF80880 ldr r8, [sp, #8] 8496 0540 5F46 mov r7, fp 8497 .LVL1361: 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Accumulator is made zero for every iteration */ 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = 0; 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k = count >> 2U; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. ARM GAS /tmp/ccJrAs6S.s page 400 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (k > 0U) 8498 .loc 27 606 0 8499 0542 B9F1000F cmp r9, #0 8500 0546 42D0 beq .L570 8501 .LVL1362: 8502 .L613: 8503 0548 4046 mov r0, r8 8504 054a 6146 mov r1, ip 8505 054c 4C46 mov r4, r9 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8506 .loc 27 599 0 8507 054e 0023 movs r3, #0 8508 .LVL1363: 8509 .L537: 8510 .LBB1413: 8511 .LBB1414: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8512 .loc 3 928 0 8513 0550 0A68 ldr r2, [r1] @ unaligned 8514 .LBE1414: 8515 .LBE1413: 8516 .LBB1415: 8517 .LBB1416: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8518 .loc 3 948 0 8519 0552 D0F800A0 ldr r10, [r0] @ unaligned 8520 .LBE1416: 8521 .LBE1415: 8522 .LBB1417: 8523 .LBB1418: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8524 .loc 6 2001 0 8525 .syntax unified 8526 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8527 0556 22FB1A33 smladx r3, r2, r10, r3 8528 @ 0 "" 2 8529 .LVL1364: 8530 .thumb 8531 .syntax unified 8532 .LBE1418: 8533 .LBE1417: 8534 .LBB1419: 8535 .LBB1420: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8536 .loc 3 928 0 8537 055a 4A68 ldr r2, [r1, #4] @ unaligned 8538 .LVL1365: 8539 .LBE1420: 8540 .LBE1419: 8541 .LBB1421: 8542 .LBB1422: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8543 .loc 3 948 0 8544 055c 50F804AC ldr r10, [r0, #-4] @ unaligned 8545 0560 0831 adds r1, r1, #8 8546 .LVL1366: ARM GAS /tmp/ccJrAs6S.s page 401 8547 0562 0838 subs r0, r0, #8 8548 .LVL1367: 8549 .LBE1422: 8550 .LBE1421: 8551 .LBB1423: 8552 .LBB1424: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8553 .loc 6 2001 0 8554 .syntax unified 8555 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8556 0564 22FB1A33 smladx r3, r2, r10, r3 8557 @ 0 "" 2 8558 .LVL1368: 8559 .thumb 8560 .syntax unified 8561 .LBE1424: 8562 .LBE1423: 8563 .loc 27 606 0 8564 0568 013C subs r4, r4, #1 8565 .LVL1369: 8566 056a F1D1 bne .L537 8567 056c C9EB4972 rsb r2, r9, r9, lsl #29 8568 0570 08EBC202 add r2, r8, r2, lsl #3 8569 0574 0CEBC909 add r9, ip, r9, lsl #3 8570 .LVL1370: 8571 .L536: 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * with y[srcBLen - 1], y[srcBLen - 2] respectively */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * with y[srcBLen - 3], y[srcBLen - 4] respectively */ 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement loop counter */ 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k--; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* For the next MAC operations, the pointer py is used without SIMD 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** So, py is incremented by 1 */ 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = py + 1U; 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** No loop unrolling is used. */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k = count % 0x4U; 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (k > 0U) 8572 .loc 27 627 0 8573 0578 16F00300 ands r0, r6, #3 8574 .LVL1371: 8575 057c 15D0 beq .L538 8576 .LVL1372: 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = __SMLAD(*px++, *py--, sum); 8577 .loc 27 630 0 8578 057e B9F90010 ldrsh r1, [r9] ARM GAS /tmp/ccJrAs6S.s page 402 8579 .LVL1373: 8580 0582 B2F90240 ldrsh r4, [r2, #2] 8581 .LVL1374: 8582 .LBB1425: 8583 .LBB1426: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8584 .loc 6 1993 0 8585 .syntax unified 8586 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8587 0586 21FB0433 smlad r3, r1, r4, r3 8588 @ 0 "" 2 8589 .LVL1375: 8590 .thumb 8591 .syntax unified 8592 .LBE1426: 8593 .LBE1425: 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8594 .loc 27 627 0 8595 058a 0128 cmp r0, #1 8596 058c 0DD0 beq .L538 8597 .LVL1376: 8598 .loc 27 630 0 8599 058e B9F90210 ldrsh r1, [r9, #2] 8600 .LVL1377: 8601 0592 B2F90040 ldrsh r4, [r2] 8602 .LVL1378: 8603 .LBB1429: 8604 .LBB1427: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8605 .loc 6 1993 0 8606 .syntax unified 8607 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8608 0596 21FB0433 smlad r3, r1, r4, r3 8609 @ 0 "" 2 8610 .LVL1379: 8611 .thumb 8612 .syntax unified 8613 .LBE1427: 8614 .LBE1429: 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8615 .loc 27 627 0 8616 059a 0228 cmp r0, #2 8617 059c 05D0 beq .L538 8618 .LVL1380: 8619 .loc 27 630 0 8620 059e B9F90410 ldrsh r1, [r9, #4] 8621 .LVL1381: 8622 05a2 32F9022C ldrsh r2, [r2, #-2] 8623 .LVL1382: 8624 .LBB1430: 8625 .LBB1428: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8626 .loc 6 1993 0 8627 .syntax unified 8628 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8629 05a6 21FB0233 smlad r3, r1, r2, r3 8630 @ 0 "" 2 ARM GAS /tmp/ccJrAs6S.s page 403 8631 .LVL1383: 8632 .thumb 8633 .syntax unified 8634 .L538: 8635 .LBE1428: 8636 .LBE1430: 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement the loop counter */ 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k--; 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** *pOut++ = (q15_t) (sum >> 15); 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px = ++pSrc1; 8637 .loc 27 640 0 8638 05aa 0CF1020C add ip, ip, #2 8639 .LVL1384: 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8640 .loc 27 637 0 8641 05ae DB13 asrs r3, r3, #15 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8642 .loc 27 596 0 8643 05b0 F445 cmp ip, lr 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8644 .loc 27 637 0 8645 05b2 25F8023B strh r3, [r5], #2 @ movhi 8646 .LVL1385: 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = pIn2; 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement the MAC count */ 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** count--; 8647 .loc 27 644 0 8648 05b6 06F1FF36 add r6, r6, #-1 8649 .LVL1386: 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement the loop counter */ 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize3--; 8650 .loc 27 647 0 8651 05ba 07F1FF37 add r7, r7, #-1 8652 .LVL1387: 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8653 .loc 27 596 0 8654 05be 21D0 beq .L612 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8655 .loc 27 596 0 is_stmt 0 discriminator 1 8656 05c0 002F cmp r7, #0 8657 05c2 3FD0 beq .L542 8658 05c4 4FEA9609 lsr r9, r6, #2 8659 .LVL1388: 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8660 .loc 27 606 0 is_stmt 1 8661 05c8 B9F1000F cmp r9, #0 8662 05cc BCD1 bne .L613 8663 .LVL1389: 8664 .L570: ARM GAS /tmp/ccJrAs6S.s page 404 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8665 .loc 27 599 0 8666 05ce 4B46 mov r3, r9 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8667 .loc 27 606 0 8668 05d0 4246 mov r2, r8 8669 05d2 E146 mov r9, ip 8670 .LVL1390: 8671 05d4 D0E7 b .L536 8672 .LVL1391: 8673 .L605: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8674 .loc 27 91 0 8675 05d6 0090 str r0, [sp] 8676 05d8 7E1E subs r6, r7, #1 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8677 .loc 27 88 0 8678 05da CDE90312 strd r1, r2, [sp, #12] 8679 05de 0197 str r7, [sp, #4] 8680 05e0 24E5 b .L476 8681 .LVL1392: 8682 .L482: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 8683 .loc 27 117 0 8684 05e2 0BEB0102 add r2, fp, r1 8685 05e6 4A44 add r2, r2, r9 8686 05e8 AD1A subs r5, r5, r2 8687 .LVL1393: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8688 .loc 27 118 0 8689 05ea 25EAE572 bic r2, r5, r5, asr #31 8690 05ee 0892 str r2, [sp, #32] 8691 .LVL1394: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8692 .loc 27 165 0 8693 05f0 029A ldr r2, [sp, #8] 8694 .LVL1395: 8695 05f2 032A cmp r2, #3 8696 05f4 7FF64AAD bls .L484 8697 05f8 9446 mov ip, r2 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8698 .loc 27 201 0 8699 05fa A3F1020E sub lr, r3, #2 8700 .LVL1396: 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8701 .loc 27 131 0 8702 05fe D046 mov r8, r10 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8703 .loc 27 201 0 8704 0600 0A46 mov r2, r1 8705 .LVL1397: 8706 0602 38E6 b .L553 8707 .LVL1398: 8708 .L612: 8709 0604 BB46 mov fp, r7 8710 .LVL1399: 8711 .L534: ARM GAS /tmp/ccJrAs6S.s page 405 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** j--; 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* The second part of the stage starts here */ 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* SIMD is not used for the next MAC operations, 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** * so pointer py is updated to read only one sample at a time */ 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = py + 1U; 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (blockSize3 > 0) 8712 .loc 27 657 0 8713 0606 BBF1000F cmp fp, #0 8714 060a 1BDD ble .L542 8715 060c DDF82480 ldr r8, [sp, #36] 8716 0610 0EEB4B0C add ip, lr, fp, lsl #1 8717 .LVL1400: 8718 .L543: 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Accumulator is made zero for every iteration */ 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = 0; 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k = count; 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** while (k > 0U) 8719 .loc 27 665 0 8720 0614 002E cmp r6, #0 8721 0616 6DD0 beq .L614 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = pSrc2; 8722 .loc 27 278 0 8723 0618 4046 mov r0, r8 8724 .loc 27 665 0 8725 061a 7146 mov r1, lr 8726 061c 3346 mov r3, r6 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8727 .loc 27 660 0 8728 061e 0022 movs r2, #0 8729 .LVL1401: 8730 .L545: 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Perform the multiply-accumulates */ 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* sum += x[srcALen-1] * y[srcBLen-1] */ 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** sum = __SMLAD(*px++, *py--, sum); 8731 .loc 27 669 0 8732 0620 31F9024B ldrsh r4, [r1], #2 8733 .LVL1402: 8734 0624 30F90279 ldrsh r7, [r0], #-2 8735 .LVL1403: 8736 .LBB1431: 8737 .LBB1432: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8738 .loc 6 1993 0 8739 .syntax unified 8740 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8741 0628 24FB0722 smlad r2, r4, r7, r2 8742 @ 0 "" 2 8743 .LVL1404: ARM GAS /tmp/ccJrAs6S.s page 406 8744 .thumb 8745 .syntax unified 8746 .LBE1432: 8747 .LBE1431: 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8748 .loc 27 665 0 8749 062c 013B subs r3, r3, #1 8750 .LVL1405: 8751 062e F7D1 bne .L545 8752 0630 42F3CF32 sbfx r2, r2, #15, #16 8753 .LVL1406: 8754 .L546: 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement the loop counter */ 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** k--; 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** *pOut++ = (q15_t) (sum >> 15); 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px = ++pSrc1; 8755 .loc 27 679 0 8756 0634 0EF1020E add lr, lr, #2 8757 .LVL1407: 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8758 .loc 27 657 0 8759 0638 E645 cmp lr, ip 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8760 .loc 27 676 0 8761 063a 25F8022B strh r2, [r5], #2 @ movhi 8762 .LVL1408: 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** py = pSrc2; 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement the MAC count */ 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** count--; 8763 .loc 27 683 0 8764 063e 06F1FF36 add r6, r6, #-1 8765 .LVL1409: 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8766 .loc 27 657 0 8767 0642 E7D1 bne .L543 8768 .LVL1410: 8769 .L542: 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Decrement the loop counter */ 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize3--; 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** status = ARM_MATH_SUCCESS; 8770 .loc 27 690 0 8771 0644 0020 movs r0, #0 8772 .LVL1411: 8773 .L602: 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 407 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** /* Return to application */ 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** return (status); 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 8774 .loc 27 696 0 8775 0646 11B0 add sp, sp, #68 8776 .LCFI64: 8777 .cfi_remember_state 8778 .cfi_def_cfa_offset 36 8779 @ sp needed 8780 0648 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 8781 .LVL1412: 8782 .L611: 8783 .LCFI65: 8784 .cfi_restore_state 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 8785 .loc 27 377 0 8786 064c 3BF9062C ldrsh r2, [fp, #-6] 8787 .LVL1413: 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 8788 .loc 27 381 0 8789 0650 92B2 uxth r2, r2 8790 .LVL1414: 8791 .LBB1433: 8792 .LBB1434: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8793 .loc 6 1993 0 8794 .syntax unified 8795 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8796 0652 26FB0255 smlad r5, r6, r2, r5 8797 @ 0 "" 2 8798 .LVL1415: 8799 .thumb 8800 .syntax unified 8801 .LBE1434: 8802 .LBE1433: 8803 .LBB1435: 8804 .LBB1436: 8805 .syntax unified 8806 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8807 0656 24FB0200 smlad r0, r4, r2, r0 8808 @ 0 "" 2 8809 .LVL1416: 8810 .thumb 8811 .syntax unified 8812 .LBE1436: 8813 .LBE1435: 8814 .LBB1437: 8815 .LBB1438: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8816 .loc 6 2001 0 8817 .syntax unified 8818 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8819 065a 24FB1277 smladx r7, r4, r2, r7 8820 @ 0 "" 2 8821 .LVL1417: 8822 .thumb ARM GAS /tmp/ccJrAs6S.s page 408 8823 .syntax unified 8824 .LBE1438: 8825 .LBE1437: 8826 .LBB1439: 8827 .LBB1440: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8828 .loc 3 909 0 8829 065e 8968 ldr r1, [r1, #8] @ unaligned 8830 .LVL1418: 8831 .LBE1440: 8832 .LBE1439: 8833 .LBB1441: 8834 .LBB1442: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8835 .loc 6 2001 0 8836 .syntax unified 8837 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8838 0660 21FB1233 smladx r3, r1, r2, r3 8839 @ 0 "" 2 8840 .LVL1419: 8841 .thumb 8842 .syntax unified 8843 0664 CFE6 b .L521 8844 .LVL1420: 8845 .L522: 8846 .LBE1442: 8847 .LBE1441: 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8848 .loc 27 414 0 8849 0666 BAF1030F cmp r10, #3 8850 066a 7FF4CCAE bne .L521 8851 .LVL1421: 8852 .LBB1443: 8853 .LBB1444: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8854 .loc 3 909 0 8855 066e 5BF8081C ldr r1, [fp, #-8] @ unaligned 8856 .LVL1422: 8857 .LBE1444: 8858 .LBE1443: 8859 .LBB1445: 8860 .LBB1446: 8861 0672 D2F802C0 ldr ip, [r2, #2] @ unaligned 8862 .LVL1423: 8863 .LBE1446: 8864 .LBE1445: 8865 .LBB1447: 8866 .LBB1448: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8867 .loc 6 2001 0 8868 .syntax unified 8869 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8870 0676 26FB1156 smladx r6, r6, r1, r5 8871 @ 0 "" 2 8872 .LVL1424: 8873 .thumb 8874 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 409 8875 .LBE1448: 8876 .LBE1447: 8877 .LBB1449: 8878 .LBB1450: 8879 .syntax unified 8880 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8881 067a 24FB1100 smladx r0, r4, r1, r0 8882 @ 0 "" 2 8883 .LVL1425: 8884 .thumb 8885 .syntax unified 8886 .LBE1450: 8887 .LBE1449: 8888 .LBB1451: 8889 .LBB1452: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8890 .loc 3 909 0 8891 067e 1568 ldr r5, [r2] @ unaligned 8892 .LBE1452: 8893 .LBE1451: 8894 .LBB1453: 8895 .LBB1454: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8896 .loc 6 2001 0 8897 .syntax unified 8898 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8899 0680 25FB1177 smladx r7, r5, r1, r7 8900 @ 0 "" 2 8901 .LVL1426: 8902 .thumb 8903 .syntax unified 8904 .LBE1454: 8905 .LBE1453: 8906 .LBB1455: 8907 .LBB1456: 8908 .syntax unified 8909 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8910 0684 2CFB1133 smladx r3, ip, r1, r3 8911 @ 0 "" 2 8912 .LVL1427: 8913 .thumb 8914 .syntax unified 8915 .LBE1456: 8916 .LBE1455: 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 8917 .loc 27 431 0 8918 0688 3BF90A1C ldrsh r1, [fp, #-10] 8919 .LVL1428: 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 8920 .loc 27 435 0 8921 068c 89B2 uxth r1, r1 8922 .LVL1429: 8923 .LBB1457: 8924 .LBB1458: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8925 .loc 6 2001 0 8926 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 410 8927 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8928 068e 24FB1165 smladx r5, r4, r1, r6 8929 @ 0 "" 2 8930 .LVL1430: 8931 .thumb 8932 .syntax unified 8933 .LBE1458: 8934 .LBE1457: 8935 .LBB1459: 8936 .LBB1460: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8937 .loc 6 1993 0 8938 .syntax unified 8939 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8940 0692 2CFB0100 smlad r0, ip, r1, r0 8941 @ 0 "" 2 8942 .LVL1431: 8943 .thumb 8944 .syntax unified 8945 .LBE1460: 8946 .LBE1459: 8947 .LBB1461: 8948 .LBB1462: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8949 .loc 6 2001 0 8950 .syntax unified 8951 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8952 0696 2CFB1177 smladx r7, ip, r1, r7 8953 @ 0 "" 2 8954 .LVL1432: 8955 .thumb 8956 .syntax unified 8957 .LBE1462: 8958 .LBE1461: 8959 .LBB1463: 8960 .LBB1464: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 8961 .loc 3 909 0 8962 069a 5268 ldr r2, [r2, #4] @ unaligned 8963 .LVL1433: 8964 .LBE1464: 8965 .LBE1463: 8966 .LBB1465: 8967 .LBB1466: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 8968 .loc 6 2001 0 8969 .syntax unified 8970 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8971 069c 22FB1133 smladx r3, r2, r1, r3 8972 @ 0 "" 2 8973 .LVL1434: 8974 .thumb 8975 .syntax unified 8976 06a0 B1E6 b .L521 8977 .LVL1435: 8978 .L564: 8979 .LBE1466: ARM GAS /tmp/ccJrAs6S.s page 411 8980 .LBE1465: 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 8981 .loc 27 206 0 8982 06a2 3B46 mov r3, r7 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8983 .loc 27 213 0 8984 06a4 5F46 mov r7, fp 8985 .LVL1436: 8986 06a6 08E6 b .L510 8987 .LVL1437: 8988 .L517: 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 8989 .loc 27 528 0 8990 06a8 002A cmp r2, #0 8991 06aa 4AD0 beq .L568 8992 06ac 0029 cmp r1, #0 8993 06ae 00F09580 beq .L528 8994 06b2 0229 cmp r1, #2 8995 06b4 00F0A080 beq .L529 8996 06b8 0129 cmp r1, #1 8997 06ba 48D0 beq .L530 8998 06bc DDF828C0 ldr ip, [sp, #40] 8999 06c0 0998 ldr r0, [sp, #36] 9000 06c2 0AEB4205 add r5, r10, r2, lsl #1 9001 .LVL1438: 9002 .L531: 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9003 .loc 27 539 0 9004 06c6 BCF90020 ldrsh r2, [ip] 9005 .LVL1439: 9006 06ca 30F8023C ldrh r3, [r0, #-2] 9007 06ce 3CF8021F ldrh r1, [ip, #2]! 9008 .LVL1440: 9009 06d2 0788 ldrh r7, [r0] 9010 06d4 30F8044C ldrh r4, [r0, #-4] 9011 06d8 11FB03F1 smulbb r1, r1, r3 9012 06dc BCF80230 ldrh r3, [ip, #2] 9013 06e0 12FB0712 smlabb r2, r2, r7, r1 9014 .LVL1441: 9015 06e4 13FB0423 smlabb r3, r3, r4, r2 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9016 .loc 27 546 0 9017 06e8 DB13 asrs r3, r3, #15 9018 06ea 2AF8023B strh r3, [r10], #2 @ movhi 9019 .LVL1442: 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9020 .loc 27 528 0 9021 06ee AA45 cmp r10, r5 9022 06f0 E9D1 bne .L531 9023 06f2 10E7 b .L524 9024 .LVL1443: 9025 .L614: 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9026 .loc 27 665 0 9027 06f4 3246 mov r2, r6 9028 06f6 9DE7 b .L546 9029 .LVL1444: ARM GAS /tmp/ccJrAs6S.s page 412 9030 .L606: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 9031 .loc 27 117 0 9032 06f8 09EB0B03 add r3, r9, fp 9033 06fc ED1A subs r5, r5, r3 9034 .LVL1445: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9035 .loc 27 118 0 9036 06fe 25EAE573 bic r3, r5, r5, asr #31 9037 0702 0893 str r3, [sp, #32] 9038 .LVL1446: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9039 .loc 27 267 0 9040 0704 019B ldr r3, [sp, #4] 9041 .LVL1447: 9042 0706 A9EB0309 sub r9, r9, r3 9043 .LVL1448: 9044 070a B9F1000F cmp r9, #0 9045 070e BFF6FFAD bge .L615 9046 .LVL1449: 9047 .L565: 9048 0712 009B ldr r3, [sp] 9049 0714 0A93 str r3, [sp, #40] 9050 0716 02E6 b .L516 9051 .LVL1450: 9052 .L489: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9053 .loc 27 184 0 9054 0718 E013 asrs r0, r4, #15 9055 071a 2EF81900 strh r0, [lr, r9, lsl #1] @ movhi 9056 .LVL1451: 9057 071e E4E4 b .L548 9058 .LVL1452: 9059 .L494: 9060 0720 CB13 asrs r3, r1, #15 9061 0722 AAF80230 strh r3, [r10, #2] @ movhi 9062 .LVL1453: 9063 0726 11E5 b .L549 9064 .LVL1454: 9065 .L607: 9066 0728 2EF81940 strh r4, [lr, r9, lsl #1] @ movhi 9067 .LVL1455: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9068 .loc 27 165 0 9069 072c 42B3 cbz r2, .L563 9070 .LVL1456: 9071 072e 8A1E subs r2, r1, #2 9072 .LVL1457: 9073 0730 181D adds r0, r3, #4 9074 .LVL1458: 9075 0732 0AF10408 add r8, r10, #4 9076 .LVL1459: 9077 0736 0224 movs r4, #2 9078 0738 E4E4 b .L491 9079 .LVL1460: 9080 .L499: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 413 9081 .loc 27 184 0 9082 073a DB13 asrs r3, r3, #15 9083 073c A8F80030 strh r3, [r8] @ movhi 9084 .LVL1461: 9085 0740 33E5 b .L550 9086 .LVL1462: 9087 .L568: 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9088 .loc 27 528 0 9089 0742 5546 mov r5, r10 9090 0744 E7E6 b .L524 9091 .LVL1463: 9092 .L485: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9093 .loc 27 184 0 9094 0746 DB13 asrs r3, r3, #15 9095 0748 A8F80030 strh r3, [r8] @ movhi 9096 .LVL1464: 9097 074c D9E5 b .L481 9098 .LVL1465: 9099 .L530: 9100 074e 0A9B ldr r3, [sp, #40] 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9101 .loc 27 528 0 9102 0750 0998 ldr r0, [sp, #36] 9103 0752 A3F1020C sub ip, r3, #2 9104 0756 089B ldr r3, [sp, #32] 9105 0758 5546 mov r5, r10 9106 075a 0AEB4302 add r2, r10, r3, lsl #1 9107 .LVL1466: 9108 .L532: 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9109 .loc 27 539 0 9110 075e 0388 ldrh r3, [r0] 9111 0760 3CF8021F ldrh r1, [ip, #2]! 9112 .LVL1467: 9113 0764 13FB01F3 smulbb r3, r3, r1 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9114 .loc 27 546 0 9115 0768 DB13 asrs r3, r3, #15 9116 076a 25F8023B strh r3, [r5], #2 @ movhi 9117 .LVL1468: 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9118 .loc 27 528 0 9119 076e AA42 cmp r2, r5 9120 0770 F5D1 bne .L532 9121 0772 D0E6 b .L524 9122 .LVL1469: 9123 .L561: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9124 .loc 27 165 0 9125 0774 A446 mov ip, r4 9126 0776 79E5 b .L483 9127 .LVL1470: 9128 .L560: 9129 0778 D046 mov r8, r10 9130 077a 0A46 mov r2, r1 ARM GAS /tmp/ccJrAs6S.s page 414 9131 077c 3846 mov r0, r7 9132 077e 75E5 b .L483 9133 .LVL1471: 9134 .L563: 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9135 .loc 27 203 0 9136 0780 C246 mov r10, r8 9137 0782 BEE5 b .L481 9138 .LVL1472: 9139 .L608: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9140 .loc 27 184 0 9141 0784 AAF802C0 strh ip, [r10, #2] @ movhi 9142 .LVL1473: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9143 .loc 27 165 0 9144 0788 002A cmp r2, #0 9145 078a F9D0 beq .L563 9146 .LVL1474: 9147 078c 9F1D adds r7, r3, #6 9148 078e 0AF1060A add r10, r10, #6 9149 0792 0339 subs r1, r1, #3 9150 0794 0124 movs r4, #1 9151 0796 4FF0020C mov ip, #2 9152 079a E3E4 b .L496 9153 .LVL1475: 9154 .L504: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9155 .loc 27 184 0 9156 079c DB13 asrs r3, r3, #15 9157 079e AAF80030 strh r3, [r10] @ movhi 9158 .LVL1476: 9159 07a2 33E5 b .L551 9160 .LVL1477: 9161 .L609: 9162 07a4 A8F80040 strh r4, [r8] @ movhi 9163 .LVL1478: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9164 .loc 27 165 0 9165 07a8 0029 cmp r1, #0 9166 07aa 3FF4AAAD beq .L481 9167 .LVL1479: 9168 07ae 0430 adds r0, r0, #4 9169 07b0 08F10408 add r8, r8, #4 9170 07b4 023A subs r2, r2, #2 9171 07b6 4FF0010C mov ip, #1 9172 07ba 0224 movs r4, #2 9173 07bc 02E5 b .L501 9174 .LVL1480: 9175 .L610: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9176 .loc 27 184 0 9177 07be AAF800C0 strh ip, [r10] @ movhi 9178 .LVL1481: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9179 .loc 27 165 0 9180 07c2 002A cmp r2, #0 ARM GAS /tmp/ccJrAs6S.s page 415 9181 07c4 DCD0 beq .L563 9182 .LVL1482: 9183 07c6 0437 adds r7, r7, #4 9184 07c8 0AF1040A add r10, r10, #4 9185 .LVL1483: 9186 07cc 8A1E subs r2, r1, #2 9187 07ce 4FF0020C mov ip, #2 9188 07d2 0124 movs r4, #1 9189 07d4 26E5 b .L552 9190 .LVL1484: 9191 .L506: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9192 .loc 27 184 0 9193 07d6 A8F80040 strh r4, [r8] @ movhi 9194 07da 92E5 b .L481 9195 .LVL1485: 9196 .L528: 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9197 .loc 27 546 0 9198 07dc 5500 lsls r5, r2, #1 9199 07de 2A46 mov r2, r5 9200 07e0 0199 ldr r1, [sp, #4] 9201 07e2 5046 mov r0, r10 9202 07e4 FFF7FEFF bl memset 9203 .LVL1486: 9204 07e8 5544 add r5, r5, r10 9205 07ea 94E6 b .L524 9206 .LVL1487: 9207 .L569: 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** px = pSrc1; 9208 .loc 27 577 0 9209 07ec E646 mov lr, ip 9210 07ee 0AE7 b .L534 9211 .LVL1488: 9212 .L566: 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9213 .loc 27 275 0 9214 07f0 0A9B ldr r3, [sp, #40] 9215 07f2 0493 str r3, [sp, #16] 9216 .LVL1489: 9217 07f4 1346 mov r3, r2 9218 07f6 24E6 b .L518 9219 .LVL1490: 9220 .L529: 9221 07f8 DDF828C0 ldr ip, [sp, #40] 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9222 .loc 27 528 0 9223 07fc 0998 ldr r0, [sp, #36] 9224 07fe 0AEB4201 add r1, r10, r2, lsl #1 9225 0802 5546 mov r5, r10 9226 .LVL1491: 9227 .L533: 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9228 .loc 27 539 0 9229 0804 BCF90070 ldrsh r7, [ip] 9230 .LVL1492: 9231 0808 0288 ldrh r2, [r0] ARM GAS /tmp/ccJrAs6S.s page 416 9232 080a 30F8023C ldrh r3, [r0, #-2] 9233 080e 3CF8024F ldrh r4, [ip, #2]! 9234 .LVL1493: 9235 0812 12FB07F2 smulbb r2, r2, r7 9236 0816 13FB0423 smlabb r3, r3, r4, r2 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9237 .loc 27 546 0 9238 081a DB13 asrs r3, r3, #15 9239 081c 25F8023B strh r3, [r5], #2 @ movhi 9240 .LVL1494: 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9241 .loc 27 528 0 9242 0820 A942 cmp r1, r5 9243 0822 EFD1 bne .L533 9244 0824 77E6 b .L524 9245 .LVL1495: 9246 .L556: 9247 0826 9446 mov ip, r2 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9248 .loc 27 165 0 9249 0828 D046 mov r8, r10 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); 9250 .loc 27 116 0 9251 082a 2246 mov r2, r4 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** { 9252 .loc 27 165 0 9253 082c 1846 mov r0, r3 9254 .LVL1496: 9255 082e 1DE5 b .L483 9256 .LVL1497: 9257 .L554: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** } 9258 .loc 27 81 0 9259 0830 4FF0FF30 mov r0, #-1 9260 .LVL1498: 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c **** 9261 .loc 27 694 0 9262 0834 07E7 b .L602 9263 .cfi_endproc 9264 .LFE172: 9266 0836 00BF .section .text.arm_conv_partial_fast_q31,"ax",%progbits 9267 .align 1 9268 .p2align 2,,3 9269 .global arm_conv_partial_fast_q31 9270 .syntax unified 9271 .thumb 9272 .thumb_func 9273 .fpu fpv4-sp-d16 9275 arm_conv_partial_fast_q31: 9276 .LFB173: 9277 .file 28 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Title: arm_conv_partial_fast_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Description: Fast Q31 Partial convolution 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * $Date: 18. March 2019 ARM GAS /tmp/ccJrAs6S.s page 417 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @addtogroup PartialConv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @brief Partial convolution of Q31 sequences (fast version). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @param[out] pDst points to the location where the output result is written 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @param[in] firstIndex is the first output sample to start with 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @param[in] numPoints is the number of output points to be computed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @return execution status 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** @remark 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** Refer to \ref arm_conv_partial_q31() for a slower implementation of this functio 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** arm_status arm_conv_partial_fast_q31( 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** const q31_t * pSrcA, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** uint32_t srcALen, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** const q31_t * pSrcB, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** uint32_t srcBLen, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** q31_t * pDst, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** uint32_t firstIndex, ARM GAS /tmp/ccJrAs6S.s page 418 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** uint32_t numPoints) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9278 .loc 28 65 0 9279 .cfi_startproc 9280 @ args = 12, pretend = 0, frame = 24 9281 @ frame_needed = 0, uses_anonymous_args = 0 9282 .LVL1499: 9283 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 9284 .LCFI66: 9285 .cfi_def_cfa_offset 36 9286 .cfi_offset 4, -36 9287 .cfi_offset 5, -32 9288 .cfi_offset 6, -28 9289 .cfi_offset 7, -24 9290 .cfi_offset 8, -20 9291 .cfi_offset 9, -16 9292 .cfi_offset 10, -12 9293 .cfi_offset 11, -8 9294 .cfi_offset 14, -4 9295 0004 87B0 sub sp, sp, #28 9296 .LCFI67: 9297 .cfi_def_cfa_offset 64 9298 0006 4C1E subs r4, r1, #1 9299 .loc 28 65 0 9300 0008 8846 mov r8, r1 9301 000a 1D46 mov r5, r3 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** const q31_t *pIn1; /* InputA pointer */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** const q31_t *pIn2; /* InputB pointer */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** q31_t *pOut = pDst; /* Output pointer */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** const q31_t *px; /* Intermediate inputA pointer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** const q31_t *py; /* Intermediate inputB pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** q31_t sum; /* Accumulators */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** uint32_t j, k, count, check, blkCnt; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** arm_status status; /* Status of Partial convolution */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** q31_t acc0, acc1, acc2, acc3; /* Accumulators */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** q31_t x0, x1, x2, x3, c0; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #endif 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Check for range of output samples to be calculated */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) 9302 .loc 28 83 0 9303 000c E118 adds r1, r4, r3 9304 .LVL1500: 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** const q31_t *pIn1; /* InputA pointer */ 9305 .loc 28 65 0 9306 000e 0193 str r3, [sp, #4] 9307 .LVL1501: 9308 .loc 28 83 0 9309 0010 DDE91136 ldrd r3, r6, [sp, #68] 9310 .LVL1502: 9311 0014 3344 add r3, r3, r6 9312 0016 8B42 cmp r3, r1 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** const q31_t *pIn1; /* InputA pointer */ ARM GAS /tmp/ccJrAs6S.s page 419 9313 .loc 28 65 0 9314 0018 0390 str r0, [sp, #12] 9315 .loc 28 83 0 9316 001a 00F21F81 bhi .L644 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** status = ARM_MATH_ARGUMENT_ERROR; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** else 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* srcB is always made to slide across srcA. */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** if (srcALen >= srcBLen) 9317 .loc 28 93 0 9318 001e 4545 cmp r5, r8 9319 0020 9146 mov r9, r2 9320 0022 06D8 bhi .L618 9321 0024 1146 mov r1, r2 9322 0026 CDF80480 str r8, [sp, #4] 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Initialization of inputA pointer */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** pIn1 = pSrcA; 9323 .loc 28 96 0 9324 002a 8146 mov r9, r0 9325 002c 6C1E subs r4, r5, #1 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Initialization of inputB pointer */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** pIn2 = pSrcB; 9326 .loc 28 99 0 9327 002e 0391 str r1, [sp, #12] 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9328 .loc 28 93 0 9329 0030 A846 mov r8, r5 9330 .LVL1503: 9331 .L618: 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** else 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Initialization of inputA pointer */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** pIn1 = pSrcB; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Initialization of inputB pointer */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** pIn2 = pSrcA; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** j = srcBLen; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** srcBLen = srcALen; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** srcALen = j; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Conditions to check which loopCounter holds 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * the first and last indices of the output samples to be calculated. */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** check = firstIndex + numPoints; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0; 9332 .loc 28 118 0 9333 0032 019A ldr r2, [sp, #4] ARM GAS /tmp/ccJrAs6S.s page 420 9334 .LVL1504: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + 9335 .loc 28 119 0 9336 0034 1198 ldr r0, [sp, #68] 9337 .LVL1505: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + 9338 .loc 28 118 0 9339 0036 9342 cmp r3, r2 9340 0038 CCBF ite gt 9341 003a 9A1A subgt r2, r3, r2 9342 003c 0022 movle r2, #0 9343 003e 0292 str r2, [sp, #8] 9344 .LVL1506: 9345 .loc 28 119 0 9346 0040 019A ldr r2, [sp, #4] 9347 0042 8242 cmp r2, r0 9348 0044 03DC bgt .L620 9349 .loc 28 119 0 is_stmt 0 discriminator 1 9350 0046 0299 ldr r1, [sp, #8] 9351 0048 121A subs r2, r2, r0 9352 .LVL1507: 9353 004a 1144 add r1, r1, r2 9354 .LVL1508: 9355 004c 0291 str r1, [sp, #8] 9356 .LVL1509: 9357 .L620: 9358 004e 119A ldr r2, [sp, #68] 9359 0050 1099 ldr r1, [sp, #64] 9360 0052 4FEA820C lsl ip, r2, #2 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; 9361 .loc 28 120 0 is_stmt 1 discriminator 4 9362 0056 D243 mvns r2, r2 9363 .LVL1510: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : numPoints) : 0; 9364 .loc 28 121 0 discriminator 4 9365 0058 12EB0802 adds r2, r2, r8 9366 .LVL1511: 9367 005c 01EB0C07 add r7, r1, ip 9368 0060 43D1 bne .L621 9369 .LVL1512: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); 9370 .loc 28 122 0 9371 0062 129B ldr r3, [sp, #72] 9372 .LVL1513: 9373 0064 029A ldr r2, [sp, #8] 9374 0066 9B1A subs r3, r3, r2 9375 0068 0493 str r3, [sp, #16] 9376 .LVL1514: 9377 006a 119B ldr r3, [sp, #68] 9378 .LVL1515: 9379 .L622: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* The function is internally 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * divided into three stages according to the number of multiplications that has to be 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * taken place between inputA samples and inputB samples. In the first stage of the ARM GAS /tmp/ccJrAs6S.s page 421 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * algorithm, the multiplications increase by one for every iteration. 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * In the third stage of the algorithm, the multiplications decrease by one 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * for every iteration. */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Set the output pointer to point to the firstIndex 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * of the output sample to be calculated. */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** pOut = pDst + firstIndex; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* -------------------------- 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Initializations of stage1 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * -------------------------*/ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* sum = x[0] * y[0] 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * sum = x[0] * y[1] + x[1] * y[0] 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * .... 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** The count variable holds the number of MAC operations performed. 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** Since the partial convolution starts from firstIndex 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** Number of Macs to be performed is firstIndex + 1 */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** count = 1U + firstIndex; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Working pointer of inputA */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** px = pIn1; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Working pointer of inputB */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** pSrc2 = pIn2 + firstIndex; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** py = pSrc2; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* ------------------------ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Stage1 process 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * ----------------------*/ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* The first stage starts here */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (blockSize1 > 0U) 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Accumulator is made zero for every iteration */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = 0; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k = count >> 2U; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (k > 0U) 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* x[0] * y[srcBLen - 1] */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* x[1] * y[srcBLen - 2] */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 422 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* x[2] * y[srcBLen - 3] */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* x[3] * y[srcBLen - 4] */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement loop counter */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k--; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Loop unrolling: Compute remaining outputs */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k = count % 0x4U; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #else 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Initialize k with number of samples */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k = count; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (k > 0U) 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Perform the multiply-accumulate */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement loop counter */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k--; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** *pOut++ = sum << 1; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** py = ++pSrc2; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** px = pIn1; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Increment MAC count */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** count++; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement loop counter */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize1--; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* -------------------------- 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Initializations of stage2 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * ------------------------*/ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * .... 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Working pointer of inputA */ ARM GAS /tmp/ccJrAs6S.s page 423 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) 9380 .loc 28 243 0 9381 006c A3EB0803 sub r3, r3, r8 9382 0070 002B cmp r3, #0 9383 0072 71DB blt .L647 9384 .LVL1516: 9385 .L668: 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** pSrc1 = pIn1 + firstIndex - srcBLen + 1; 9386 .loc 28 245 0 9387 0074 119B ldr r3, [sp, #68] 9388 0076 0133 adds r3, r3, #1 9389 0078 A3EB0803 sub r3, r3, r8 9390 007c 09EB8303 add r3, r9, r3, lsl #2 9391 .LVL1517: 9392 .L629: 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** else 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** pSrc1 = pIn1; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** px = pSrc1; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Working pointer of inputB */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** pSrc2 = pIn2 + (srcBLen - 1U); 9393 .loc 28 254 0 9394 0080 039A ldr r2, [sp, #12] 9395 0082 08F18045 add r5, r8, #1073741824 9396 0086 013D subs r5, r5, #1 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** py = pSrc2; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* count is index by which the pointer pIn1 to be incremented */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** count = 0U; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* ------------------- 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Stage2 process 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * ------------------*/ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * So, to loop unroll over blockSize2, 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * srcBLen should be greater than or equal to 4 */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** if (srcBLen >= 4U) 9397 .loc 28 267 0 9398 0088 B8F1030F cmp r8, #3 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** py = pSrc2; 9399 .loc 28 254 0 9400 008c 02EB8505 add r5, r2, r5, lsl #2 9401 .LVL1518: 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blkCnt = ((uint32_t) blockSize2 >> 2U); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (blkCnt > 0U) 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Set all accumulators to zero */ ARM GAS /tmp/ccJrAs6S.s page 424 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc0 = 0; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc1 = 0; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc2 = 0; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc3 = 0; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* read x[0], x[1], x[2] samples */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** x0 = *px++; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** x1 = *px++; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** x2 = *px++; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k = srcBLen >> 2U; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** do 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Read y[srcBLen - 1] sample */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** c0 = *py--; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Read x[3] sample */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** x3 = *px++; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Perform the multiply-accumulate */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc0 += x[0] * y[srcBLen - 1] */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc1 += x[1] * y[srcBLen - 1] */ 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc2 += x[2] * y[srcBLen - 1] */ 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc3 += x[3] * y[srcBLen - 1] */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Read y[srcBLen - 2] sample */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** c0 = *py--; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Read x[4] sample */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** x0 = *px++; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Perform the multiply-accumulate */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc0 += x[1] * y[srcBLen - 2] */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32); 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc1 += x[2] * y[srcBLen - 2] */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc2 += x[3] * y[srcBLen - 2] */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32); 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc3 += x[4] * y[srcBLen - 2] */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32); 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Read y[srcBLen - 3] sample */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** c0 = *py--; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Read x[5] sample */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** x1 = *px++; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Perform the multiply-accumulates */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc0 += x[2] * y[srcBLen - 3] */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32); 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc1 += x[3] * y[srcBLen - 2] */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32); ARM GAS /tmp/ccJrAs6S.s page 425 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc2 += x[4] * y[srcBLen - 2] */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32); 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc3 += x[5] * y[srcBLen - 2] */ 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32); 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Read y[srcBLen - 4] sample */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** c0 = *py--; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Read x[6] sample */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** x2 = *px++; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Perform the multiply-accumulates */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc0 += x[3] * y[srcBLen - 4] */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32); 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc1 += x[4] * y[srcBLen - 4] */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc2 += x[5] * y[srcBLen - 4] */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32); 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc3 += x[6] * y[srcBLen - 4] */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32); 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } while (--k); 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ** No loop unrolling is used. */ 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k = srcBLen % 0x4U; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (k > 0U) 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Read y[srcBLen - 5] sample */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** c0 = *py--; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Read x[7] sample */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** x3 = *px++; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Perform the multiply-accumulates */ 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc0 += x[4] * y[srcBLen - 5] */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Reuse the present samples for the next MAC */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** x0 = x1; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** x1 = x2; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** x2 = x3; 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement the loop counter */ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k--; 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** *pOut++ = (q31_t) (acc0 << 1); 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** *pOut++ = (q31_t) (acc1 << 1); 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** *pOut++ = (q31_t) (acc2 << 1); 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** *pOut++ = (q31_t) (acc3 << 1); ARM GAS /tmp/ccJrAs6S.s page 426 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Increment the pointer pIn1 index, count by 4 */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** count += 4U; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** px = pSrc1 + count; 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** py = pSrc2; 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement loop counter */ 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blkCnt--; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Loop unrolling: Compute remaining outputs */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blkCnt = (uint32_t) blockSize2 % 0x4U; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #else 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Initialize blkCnt with number of samples */ 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blkCnt = blockSize2; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (blkCnt > 0U) 9402 .loc 28 413 0 9403 0090 049A ldr r2, [sp, #16] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9404 .loc 28 267 0 9405 0092 65D8 bhi .L630 9406 .LVL1519: 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Accumulator is made zero for every iteration */ 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = 0; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k = srcBLen >> 2U; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (k > 0U) 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Perform the multiply-accumulates */ 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) * px++ * (*py--))) >> 32); 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) * px++ * (*py--))) >> 32); 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) * px++ * (*py--))) >> 32); 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) * px++ * (*py--))) >> 32); 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement loop counter */ 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k--; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Loop unrolling: Compute remaining outputs */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k = srcBLen % 0x4U; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 427 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #else 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Initialize blkCnt with number of samples */ 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k = srcBLen; 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (k > 0U) 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Perform the multiply-accumulate */ 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement loop counter */ 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k--; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** *pOut++ = sum << 1; 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Increment MAC count */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** count++; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** px = pSrc1 + count; 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** py = pSrc2; 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement loop counter */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blkCnt--; 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** else 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* If the srcBLen is not a multiple of 4, 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * the blockSize2 loop cannot be unrolled by 4 */ 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blkCnt = (uint32_t) blockSize2; 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (blkCnt > 0U) 9407 .loc 28 479 0 9408 0094 002A cmp r2, #0 9409 0096 00F0BF80 beq .L649 9410 009a B8F1000F cmp r8, #0 9411 009e 00F0BD80 beq .L632 9412 00a2 B8F1020F cmp r8, #2 9413 00a6 00F0C180 beq .L633 9414 00aa B8F1010F cmp r8, #1 9415 00ae 00F0A580 beq .L634 9416 00b2 07EB8202 add r2, r7, r2, lsl #2 9417 .LVL1520: 9418 00b6 A446 mov ip, r4 9419 .LVL1521: 9420 .L635: 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Accumulator is made zero for every iteration */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = 0; 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* srcBLen number of MACS should be performed */ ARM GAS /tmp/ccJrAs6S.s page 428 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k = srcBLen; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (k > 0U) 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Perform the multiply-accumulate */ 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 9421 .loc 28 491 0 9422 00b8 1868 ldr r0, [r3] 9423 .LVL1522: 9424 00ba 2968 ldr r1, [r5] 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 9425 .loc 28 490 0 9426 00bc 53F8044F ldr r4, [r3, #4]! 9427 .LVL1523: 9428 00c0 55F8046C ldr r6, [r5, #-4] 9429 .loc 28 491 0 9430 00c4 80FB01AB smull r10, fp, r0, r1 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 9431 .loc 28 490 0 9432 00c8 5946 mov r1, fp 9433 00ca 0020 movs r0, #0 9434 .LVL1524: 9435 00cc C6FB0401 smlal r0, r1, r6, r4 9436 00d0 55F8084C ldr r4, [r5, #-8] 9437 00d4 5E68 ldr r6, [r3, #4] 9438 00d6 0020 movs r0, #0 9439 00d8 C4FB0601 smlal r0, r1, r4, r6 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement loop counter */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k--; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** *pOut++ = sum << 1; 9440 .loc 28 498 0 9441 00dc 4900 lsls r1, r1, #1 9442 00de 47F8041B str r1, [r7], #4 9443 .LVL1525: 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9444 .loc 28 479 0 9445 00e2 9742 cmp r7, r2 9446 00e4 E8D1 bne .L635 9447 00e6 6446 mov r4, ip 9448 00e8 57E0 b .L631 9449 .LVL1526: 9450 .L621: 9451 00ea 0399 ldr r1, [sp, #12] 9452 00ec 8C44 add ip, ip, r1 9453 00ee 1199 ldr r1, [sp, #68] 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); 9454 .loc 28 121 0 discriminator 1 9455 00f0 A342 cmp r3, r4 9456 00f2 01F10106 add r6, r1, #1 9457 00f6 79D8 bhi .L623 9458 .LVL1527: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; ARM GAS /tmp/ccJrAs6S.s page 429 9459 .loc 28 122 0 discriminator 8 9460 00f8 029B ldr r3, [sp, #8] 9461 .LVL1528: 9462 00fa 5B42 negs r3, r3 9463 00fc 0493 str r3, [sp, #16] 9464 .LVL1529: 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9465 .loc 28 166 0 discriminator 8 9466 00fe 129B ldr r3, [sp, #72] 9467 .LVL1530: 9468 0100 002B cmp r3, #0 9469 0102 00F0A980 beq .L666 9470 .LVL1531: 9471 .L624: 9472 0106 3344 add r3, r3, r6 9473 .LVL1532: 9474 0108 0093 str r3, [sp] 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 9475 .loc 28 122 0 9476 010a BE46 mov lr, r7 9477 010c 0597 str r7, [sp, #20] 9478 010e A346 mov fp, r4 9479 .LVL1533: 9480 .L626: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9481 .loc 28 208 0 9482 0110 26B3 cbz r6, .L667 9483 0112 3146 mov r1, r6 9484 0114 6546 mov r5, ip 9485 0116 4846 mov r0, r9 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9486 .loc 28 169 0 9487 0118 4FF0000A mov r10, #0 9488 .LVL1534: 9489 .L625: 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 9490 .loc 28 211 0 9491 011c 50F8047B ldr r7, [r0], #4 9492 .LVL1535: 9493 0120 55F80449 ldr r4, [r5], #-4 9494 .LVL1536: 9495 0124 5346 mov r3, r10 9496 0126 0022 movs r2, #0 9497 0128 C4FB0723 smlal r2, r3, r4, r7 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9498 .loc 28 208 0 9499 012c 0139 subs r1, r1, #1 9500 .LVL1537: 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 9501 .loc 28 211 0 9502 012e 9A46 mov r10, r3 9503 .LVL1538: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9504 .loc 28 208 0 9505 0130 F4D1 bne .L625 9506 0132 5B00 lsls r3, r3, #1 9507 .LVL1539: ARM GAS /tmp/ccJrAs6S.s page 430 9508 .L628: 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9509 .loc 28 219 0 9510 0134 4EF8043B str r3, [lr], #4 9511 .LVL1540: 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9512 .loc 28 166 0 9513 0138 009B ldr r3, [sp] 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9514 .loc 28 226 0 9515 013a 0136 adds r6, r6, #1 9516 .LVL1541: 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9517 .loc 28 166 0 9518 013c 9E42 cmp r6, r3 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** px = pIn1; 9519 .loc 28 222 0 9520 013e 0CF1040C add ip, ip, #4 9521 .LVL1542: 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9522 .loc 28 166 0 9523 0142 E5D1 bne .L626 9524 0144 129B ldr r3, [sp, #72] 9525 0146 059F ldr r7, [sp, #20] 9526 0148 07EB8307 add r7, r7, r3, lsl #2 9527 014c 119B ldr r3, [sp, #68] 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9528 .loc 28 243 0 9529 014e A3EB0803 sub r3, r3, r8 9530 0152 002B cmp r3, #0 9531 0154 5C46 mov r4, fp 9532 0156 8DDA bge .L668 9533 .LVL1543: 9534 .L647: 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 9535 .loc 28 249 0 9536 0158 4B46 mov r3, r9 9537 015a 91E7 b .L629 9538 .LVL1544: 9539 .L667: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9540 .loc 28 208 0 9541 015c 3346 mov r3, r6 9542 015e E9E7 b .L628 9543 .LVL1545: 9544 .L630: 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9545 .loc 28 413 0 9546 0160 002A cmp r2, #0 9547 0162 59D0 beq .L649 9548 0164 07EB8202 add r2, r7, r2, lsl #2 9549 0168 A346 mov fp, r4 9550 .LVL1546: 9551 .L639: 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9552 .loc 28 479 0 9553 016a 4646 mov r6, r8 ARM GAS /tmp/ccJrAs6S.s page 431 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** py = pSrc2; 9554 .loc 28 254 0 9555 016c AE46 mov lr, r5 9556 016e 9C46 mov ip, r3 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9557 .loc 28 416 0 9558 0170 4FF0000A mov r10, #0 9559 .LVL1547: 9560 .L638: 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 9561 .loc 28 452 0 9562 0174 5146 mov r1, r10 9563 0176 5EF80449 ldr r4, [lr], #-4 9564 .LVL1548: 9565 017a 5CF804AB ldr r10, [ip], #4 9566 .LVL1549: 9567 017e 0020 movs r0, #0 9568 0180 C4FB0A01 smlal r0, r1, r4, r10 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9569 .loc 28 449 0 9570 0184 013E subs r6, r6, #1 9571 .LVL1550: 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 9572 .loc 28 452 0 9573 0186 8A46 mov r10, r1 9574 .LVL1551: 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9575 .loc 28 449 0 9576 0188 F4D1 bne .L638 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9577 .loc 28 460 0 9578 018a 4900 lsls r1, r1, #1 9579 018c 47F8041B str r1, [r7], #4 9580 .LVL1552: 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9581 .loc 28 413 0 9582 0190 9742 cmp r7, r2 9583 0192 03F10403 add r3, r3, #4 9584 .LVL1553: 9585 0196 E8D1 bne .L639 9586 0198 5C46 mov r4, fp 9587 .LVL1554: 9588 .L631: 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Increment the MAC count */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** count++; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** px = pSrc1 + count; 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** py = pSrc2; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement the loop counter */ 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blkCnt--; 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 432 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* -------------------------- 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Initializations of stage3 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * -------------------------*/ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[src 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[src 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * .... 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * sum += x[srcALen-1] * y[srcBLen-1] 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** */ 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** The count variable holds the number of MAC operations performed */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** count = srcBLen - 1U; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Working pointer of inputA */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); 9589 .loc 28 529 0 9590 019a 019B ldr r3, [sp, #4] 9591 019c 0133 adds r3, r3, #1 9592 019e A3EB0808 sub r8, r3, r8 9593 .LVL1555: 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** px = pSrc1; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Working pointer of inputB */ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** pSrc2 = pIn2 + (srcBLen - 1U); 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** py = pSrc2; 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* ------------------- 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * Stage3 process 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** * ------------------*/ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (blockSize3 > 0U) 9594 .loc 28 540 0 9595 01a2 029B ldr r3, [sp, #8] 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** px = pSrc1; 9596 .loc 28 529 0 9597 01a4 09EB8809 add r9, r9, r8, lsl #2 9598 .LVL1556: 9599 .loc 28 540 0 9600 01a8 D3B1 cbz r3, .L640 9601 01aa A4EB030E sub lr, r4, r3 9602 01ae A846 mov r8, r5 9603 .LVL1557: 9604 .L641: 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Accumulator is made zero for every iteration */ 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = 0; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k = count >> 2U; 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (k > 0U) 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ ARM GAS /tmp/ccJrAs6S.s page 433 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement loop counter */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k--; 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Loop unrolling: Compute remaining outputs */ 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k = count % 0x4U; 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #else 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Initialize blkCnt with number of samples */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k = count; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** while (k > 0U) 9605 .loc 28 582 0 9606 01b0 D4B1 cbz r4, .L669 9607 01b2 2346 mov r3, r4 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** py = pSrc2; 9608 .loc 28 254 0 9609 01b4 C446 mov ip, r8 9610 .loc 28 582 0 9611 01b6 4F46 mov r7, r9 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9612 .loc 28 543 0 9613 01b8 0026 movs r6, #0 9614 .LVL1558: 9615 .L642: 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Perform the multiply-accumulates */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* sum += x[srcALen-1] * y[srcBLen-1] */ 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 9616 .loc 28 586 0 9617 01ba 3146 mov r1, r6 9618 01bc 57F8045B ldr r5, [r7], #4 9619 .LVL1559: 9620 01c0 5CF80469 ldr r6, [ip], #-4 9621 .LVL1560: 9622 01c4 0020 movs r0, #0 9623 01c6 C6FB0501 smlal r0, r1, r6, r5 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9624 .loc 28 582 0 ARM GAS /tmp/ccJrAs6S.s page 434 9625 01ca 013B subs r3, r3, #1 9626 .LVL1561: 9627 .loc 28 586 0 9628 01cc 0E46 mov r6, r1 9629 .LVL1562: 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9630 .loc 28 582 0 9631 01ce F4D1 bne .L642 9632 01d0 4E00 lsls r6, r1, #1 9633 .LVL1563: 9634 .L643: 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement loop counter */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** k--; 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** *pOut++ = sum << 1; 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** px = ++pSrc1; 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** py = pSrc2; 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement MAC count */ 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** count--; 9635 .loc 28 601 0 9636 01d2 013C subs r4, r4, #1 9637 .LVL1564: 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9638 .loc 28 540 0 9639 01d4 7445 cmp r4, lr 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9640 .loc 28 594 0 9641 01d6 42F8046B str r6, [r2], #4 9642 .LVL1565: 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** py = pSrc2; 9643 .loc 28 597 0 9644 01da 09F10409 add r9, r9, #4 9645 .LVL1566: 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9646 .loc 28 540 0 9647 01de E7D1 bne .L641 9648 .LVL1567: 9649 .L640: 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Decrement the loop counter */ 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize3--; 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** status = ARM_MATH_SUCCESS; 9650 .loc 28 608 0 9651 01e0 0020 movs r0, #0 9652 .LVL1568: 9653 .L663: 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } ARM GAS /tmp/ccJrAs6S.s page 435 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** /* Return to application */ 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** return (status); 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 9654 .loc 28 614 0 9655 01e2 07B0 add sp, sp, #28 9656 .LCFI68: 9657 .cfi_remember_state 9658 .cfi_def_cfa_offset 36 9659 @ sp needed 9660 01e4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 9661 .LVL1569: 9662 .L669: 9663 .LCFI69: 9664 .cfi_restore_state 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9665 .loc 28 582 0 9666 01e8 2646 mov r6, r4 9667 01ea F2E7 b .L643 9668 .LVL1570: 9669 .L623: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 9670 .loc 28 122 0 9671 01ec 129B ldr r3, [sp, #72] 9672 .LVL1571: 9673 01ee 0299 ldr r1, [sp, #8] 9674 01f0 1292 str r2, [sp, #72] 9675 .LVL1572: 9676 01f2 9B1A subs r3, r3, r2 9677 01f4 5B1A subs r3, r3, r1 9678 01f6 0493 str r3, [sp, #16] 9679 .LVL1573: 9680 01f8 1346 mov r3, r2 9681 .LVL1574: 9682 01fa 84E7 b .L624 9683 .LVL1575: 9684 .L634: 9685 01fc 043B subs r3, r3, #4 9686 .LVL1576: 9687 01fe 07EB8202 add r2, r7, r2, lsl #2 9688 .LVL1577: 9689 .L636: 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9690 .loc 28 491 0 9691 0202 2868 ldr r0, [r5] 9692 0204 53F8041F ldr r1, [r3, #4]! 9693 .LVL1578: 9694 0208 80FB0101 smull r0, r1, r0, r1 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9695 .loc 28 498 0 9696 020c 4900 lsls r1, r1, #1 9697 020e 47F8041B str r1, [r7], #4 9698 .LVL1579: 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9699 .loc 28 479 0 9700 0212 9742 cmp r7, r2 ARM GAS /tmp/ccJrAs6S.s page 436 9701 0214 F5D1 bne .L636 9702 0216 C0E7 b .L631 9703 .LVL1580: 9704 .L649: 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9705 .loc 28 413 0 9706 0218 3A46 mov r2, r7 9707 021a BEE7 b .L631 9708 .LVL1581: 9709 .L632: 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9710 .loc 28 498 0 9711 021c 9600 lsls r6, r2, #2 9712 021e 3246 mov r2, r6 9713 .LVL1582: 9714 0220 4146 mov r1, r8 9715 0222 3846 mov r0, r7 9716 0224 FFF7FEFF bl memset 9717 .LVL1583: 9718 0228 BA19 adds r2, r7, r6 9719 022a B6E7 b .L631 9720 .LVL1584: 9721 .L633: 9722 022c 1E46 mov r6, r3 9723 022e 049B ldr r3, [sp, #16] 9724 .LVL1585: 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9725 .loc 28 479 0 9726 0230 3A46 mov r2, r7 9727 .LVL1586: 9728 0232 07EB830C add ip, r7, r3, lsl #2 9729 .LVL1587: 9730 .L637: 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 9731 .loc 28 490 0 9732 0236 55E90131 ldrd r3, r1, [r5, #-4] 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9733 .loc 28 491 0 9734 023a 3068 ldr r0, [r6] 9735 .LVL1588: 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 9736 .loc 28 490 0 9737 023c 56F8047F ldr r7, [r6, #4]! 9738 .LVL1589: 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9739 .loc 28 491 0 9740 0240 80FB01AB smull r10, fp, r0, r1 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** ((q63_t) *px++ * (*py--))) >> 32); 9741 .loc 28 490 0 9742 0244 5946 mov r1, fp 9743 .LVL1590: 9744 0246 0020 movs r0, #0 9745 .LVL1591: 9746 0248 C7FB0301 smlal r0, r1, r7, r3 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9747 .loc 28 498 0 9748 024c 4B00 lsls r3, r1, #1 ARM GAS /tmp/ccJrAs6S.s page 437 9749 .LVL1592: 9750 024e 42F8043B str r3, [r2], #4 9751 .LVL1593: 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** { 9752 .loc 28 479 0 9753 0252 9445 cmp ip, r2 9754 0254 EFD1 bne .L637 9755 0256 A0E7 b .L631 9756 .LVL1594: 9757 .L666: 9758 0258 0B46 mov r3, r1 9759 .LVL1595: 9760 025a 07E7 b .L622 9761 .LVL1596: 9762 .L644: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** } 9763 .loc 28 86 0 9764 025c 4FF0FF30 mov r0, #-1 9765 .LVL1597: 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c **** 9766 .loc 28 612 0 9767 0260 BFE7 b .L663 9768 .cfi_endproc 9769 .LFE173: 9771 0262 00BF .section .text.arm_conv_partial_opt_q15,"ax",%progbits 9772 .align 1 9773 .p2align 2,,3 9774 .global arm_conv_partial_opt_q15 9775 .syntax unified 9776 .thumb 9777 .thumb_func 9778 .fpu fpv4-sp-d16 9780 arm_conv_partial_opt_q15: 9781 .LFB174: 9782 .file 29 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_o 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * Title: arm_conv_partial_opt_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * Description: Partial convolution of Q15 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * Unless required by applicable law or agreed to in writing, software ARM GAS /tmp/ccJrAs6S.s page 438 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @addtogroup PartialConv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @brief Partial convolution of Q15 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @param[out] pDst points to the location where the output result is written 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @param[in] firstIndex is the first output sample to start with 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @param[in] numPoints is the number of output points to be computed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @return execution status 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** @remark 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** arm_status arm_conv_partial_opt_q15( 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** const q15_t * pSrcA, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** uint32_t srcALen, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** const q15_t * pSrcB, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** uint32_t srcBLen, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q15_t * pDst, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** uint32_t firstIndex, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** uint32_t numPoints, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q15_t * pScratch1, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q15_t * pScratch2) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 9783 .loc 29 69 0 9784 .cfi_startproc 9785 @ args = 20, pretend = 0, frame = 8 9786 @ frame_needed = 0, uses_anonymous_args = 0 9787 .LVL1598: 9788 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 9789 .LCFI70: 9790 .cfi_def_cfa_offset 36 9791 .cfi_offset 4, -36 9792 .cfi_offset 5, -32 ARM GAS /tmp/ccJrAs6S.s page 439 9793 .cfi_offset 6, -28 9794 .cfi_offset 7, -24 9795 .cfi_offset 8, -20 9796 .cfi_offset 9, -16 9797 .cfi_offset 10, -12 9798 .cfi_offset 11, -8 9799 .cfi_offset 14, -4 9800 0004 83B0 sub sp, sp, #12 9801 .LCFI71: 9802 .cfi_def_cfa_offset 48 9803 .loc 29 69 0 9804 0006 DDE90DA7 ldrd r10, r7, [sp, #52] 9805 000a 01F1FF39 add r9, r1, #-1 9806 000e 0D46 mov r5, r1 9807 0010 1E46 mov r6, r3 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q63_t acc0; /* Accumulator */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q31_t x1; /* Temporary variables to hold state and coe 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q31_t y1; /* State variables */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** const q15_t *pIn1; /* InputA pointer */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** const q15_t *pIn2; /* InputB pointer */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** const q15_t *px; /* Intermediate inputA pointer */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q15_t *py; /* Intermediate inputB pointer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** uint32_t j, k, blkCnt; /* Loop counter */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** uint32_t tapCnt; /* Loop count */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** arm_status status; /* Status variable */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q63_t acc1, acc2, acc3; /* Accumulator */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q31_t x2, x3; /* Temporary variables to hold state and coe 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** q31_t y2; /* State variables */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #endif 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Check for range of output samples to be calculated */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) 9808 .loc 29 92 0 9809 0012 0AEB0701 add r1, r10, r7 9810 .LVL1599: 9811 0016 4B44 add r3, r9, r3 9812 .LVL1600: 9813 0018 9942 cmp r1, r3 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 9814 .loc 29 69 0 9815 001a DDF83C80 ldr r8, [sp, #60] 9816 .LVL1601: 9817 .loc 29 92 0 9818 001e 00F28480 bhi .L682 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** status = ARM_MATH_ARGUMENT_ERROR; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** else 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ ARM GAS /tmp/ccJrAs6S.s page 440 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* srcB is always made to slide across srcA. */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** if (srcALen >= srcBLen) 9819 .loc 29 102 0 9820 0022 AE42 cmp r6, r5 9821 0024 9346 mov fp, r2 9822 0026 78D9 bls .L691 9823 .LVL1602: 9824 .L672: 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Initialization of inputA pointer */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pIn1 = pSrcA; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Initialization of inputB pointer */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pIn2 = pSrcB; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** else 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Initialization of inputA pointer */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pIn1 = pSrcB; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Initialization of inputB pointer */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pIn2 = pSrcA; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** j = srcBLen; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** srcBLen = srcALen; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** srcALen = j; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Temporary pointer for scratch2 */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** py = pScratch2; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* pointer to take end of scratch2 buffer */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pScr2 = pScratch2 + srcBLen - 1; 9825 .loc 29 128 0 9826 0028 05F10044 add r4, r5, #-2147483648 9827 002c 013C subs r4, r4, #1 9828 002e 6400 lsls r4, r4, #1 9829 .LVL1603: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* points to smaller length sequence */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** px = pIn2; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** k = srcBLen >> 2U; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Copy smaller length input sequence in reverse order into second scratch buffer */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** while (k > 0U) 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* copy second buffer in reversal manner */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** *pScr2-- = *px++; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** *pScr2-- = *px++; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** *pScr2-- = *px++; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** *pScr2-- = *px++; ARM GAS /tmp/ccJrAs6S.s page 441 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Decrement loop counter */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** k--; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Loop unrolling: Compute remaining outputs */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** k = srcBLen % 0x4U; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #else 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Initialize k with number of samples */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** k = srcBLen; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** while (k > 0U) 9830 .loc 29 161 0 9831 0030 4DB1 cbz r5, .L673 9832 0032 109B ldr r3, [sp, #64] 9833 0034 A21C adds r2, r4, #2 9834 .LVL1604: 9835 0036 1A44 add r2, r2, r3 9836 0038 2B46 mov r3, r5 9837 .LVL1605: 9838 .L674: 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* copy second buffer in reversal manner for remaining samples */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** *pScr2-- = *px++; 9839 .loc 29 164 0 9840 003a 30F9021B ldrsh r1, [r0], #2 9841 .LVL1606: 9842 003e 22F8021D strh r1, [r2, #-2]! @ movhi 9843 .LVL1607: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 9844 .loc 29 161 0 9845 0042 013B subs r3, r3, #1 9846 .LVL1608: 9847 0044 F9D1 bne .L674 9848 .LVL1609: 9849 .L673: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Decrement loop counter */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** k--; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Initialze temporary scratch pointer */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pScr1 = pScratch1; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Assuming scratch1 buffer is aligned by 32-bit */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Fill (srcBLen - 1U) zeros in scratch buffer */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Update temporary scratch pointer */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pScr1 += (srcBLen - 1U); 9850 .loc 29 178 0 9851 0046 4444 add r4, r4, r8 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 442 9852 .loc 29 175 0 9853 0048 4146 mov r1, r8 9854 004a 4A46 mov r2, r9 9855 004c 0020 movs r0, #0 9856 .LVL1610: 9857 004e FFF7FEFF bl arm_fill_q15 9858 .LVL1611: 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Copy (srcALen) samples in scratch buffer */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** arm_copy_q15(pIn1, pScr1, srcALen); 9859 .loc 29 183 0 9860 0052 5846 mov r0, fp 9861 0054 2146 mov r1, r4 9862 0056 3246 mov r2, r6 9863 0058 FFF7FEFF bl arm_copy_q15 9864 .LVL1612: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Update pointers */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pScr1 += srcALen; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 9865 .loc 29 189 0 9866 005c 4A46 mov r2, r9 9867 005e 04EB4601 add r1, r4, r6, lsl #1 9868 .LVL1613: 9869 0062 0020 movs r0, #0 9870 0064 FFF7FEFF bl arm_fill_q15 9871 .LVL1614: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Update pointer */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pScr1 += (srcBLen - 1U); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Initialization of pIn2 pointer */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pIn2 = py; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pScratch1 += firstIndex; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pOut = pDst + firstIndex; 9872 .loc 29 199 0 9873 0068 0C9B ldr r3, [sp, #48] 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 9874 .loc 29 197 0 9875 006a 4FEA4A0A lsl r10, r10, #1 9876 006e D044 add r8, r8, r10 9877 .LVL1615: 9878 .loc 29 199 0 9879 0070 9A44 add r10, r10, r3 9880 .LVL1616: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Actual convolution process starts here */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ ARM GAS /tmp/ccJrAs6S.s page 443 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** blkCnt = (numPoints) >> 2; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** while (blkCnt > 0) 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Initialze temporary scratch pointer as scratch1 */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pScr1 = pScratch1; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Clear Accumlators */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc0 = 0; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc1 = 0; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc2 = 0; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc3 = 0; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Read two samples from scratch1 buffer */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** x2 = read_q15x2_ia (&pScr1); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** tapCnt = (srcBLen) >> 2U; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** while (tapCnt > 0U) 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Read four samples from smaller buffer */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** y1 = read_q15x2_ia ((q15_t **) &pIn2); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** y2 = read_q15x2_ia ((q15_t **) &pIn2); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* multiply and accumlate */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc0 = __SMLALD(x1, y1, acc0); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc2 = __SMLALD(x2, y1, acc2); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* pack input data */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #else 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #endif 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* multiply and accumlate */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc1 = __SMLALDX(x3, y1, acc1); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* multiply and accumlate */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc0 = __SMLALD(x2, y2, acc0); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc2 = __SMLALD(x1, y2, acc2); 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* pack input data */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #else 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #endif 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc3 = __SMLALDX(x3, y1, acc3); ARM GAS /tmp/ccJrAs6S.s page 444 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc1 = __SMLALDX(x3, y2, acc1); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** x2 = read_q15x2_ia (&pScr1); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #else 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #endif 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc3 = __SMLALDX(x3, y2, acc3); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Decrement loop counter */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** tapCnt--; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Update scratch pointer for remaining samples of smaller length sequence */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pScr1 -= 4U; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* apply same above for remaining samples of smaller length sequence */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** tapCnt = (srcBLen) & 3U; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** while (tapCnt > 0U) 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* accumlate the results */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc0 += (*pScr1++ * *pIn2); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc1 += (*pScr1++ * *pIn2); 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc2 += (*pScr1++ * *pIn2); 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc3 += (*pScr1++ * *pIn2++); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pScr1 -= 3U; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Decrement loop counter */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** tapCnt--; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** blkCnt--; 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Store the results in the accumulators in the destination buffer. */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #else 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Initialization of inputB pointer */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pIn2 = py; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pScratch1 += 4U; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Loop unrolling: Compute remaining outputs */ 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** blkCnt = numPoints & 0x3; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #else ARM GAS /tmp/ccJrAs6S.s page 445 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Initialize blkCnt with number of samples */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** blkCnt = numPoints; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Calculate convolution for remaining samples of Bigger length sequence */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** while (blkCnt > 0) 9881 .loc 29 327 0 9882 0072 002F cmp r7, #0 9883 0074 3AD0 beq .L681 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Initialze temporary scratch pointer as scratch1 */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pScr1 = pScratch1; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Clear Accumlators */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc0 = 0; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** tapCnt = (srcBLen) >> 1U; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** while (tapCnt > 0U) 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Read two samples from smaller buffer */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** y1 = read_q15x2_ia ((q15_t **) &pIn2); 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc0 = __SMLALD(x1, y1, acc0); 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Decrement the loop counter */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** tapCnt--; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** tapCnt = (srcBLen) & 1U; 9884 .loc 29 351 0 9885 0076 05F00103 and r3, r5, #1 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 9886 .loc 29 335 0 9887 007a 4FEA550B lsr fp, r5, #1 9888 .LVL1617: 9889 .loc 29 351 0 9890 007e 0093 str r3, [sp] 9891 0080 109B ldr r3, [sp, #64] 9892 0082 4FEA8B09 lsl r9, fp, #2 9893 0086 4B44 add r3, r3, r9 9894 0088 0193 str r3, [sp, #4] 9895 .LVL1618: 9896 .L676: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 9897 .loc 29 337 0 9898 008a BBF1000F cmp fp, #0 9899 008e 3FD0 beq .L683 9900 .L692: 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 9901 .loc 29 333 0 9902 0090 0025 movs r5, #0 ARM GAS /tmp/ccJrAs6S.s page 446 9903 0092 0026 movs r6, #0 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 9904 .loc 29 337 0 9905 0094 DDF840E0 ldr lr, [sp, #64] 9906 0098 C446 mov ip, r8 9907 009a 5C46 mov r4, fp 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 9908 .loc 29 333 0 9909 009c 2A46 mov r2, r5 9910 009e 3346 mov r3, r6 9911 .LVL1619: 9912 .L678: 9913 .LBB1467: 9914 .LBB1468: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 9915 .loc 3 928 0 9916 00a0 5CF8045B ldr r5, [ip], #4 @ unaligned 9917 .LVL1620: 9918 .LBE1468: 9919 .LBE1467: 9920 .LBB1469: 9921 .LBB1470: 9922 00a4 5EF8046B ldr r6, [lr], #4 @ unaligned 9923 .LVL1621: 9924 .LBE1470: 9925 .LBE1469: 9926 .LBB1472: 9927 .LBB1473: 9928 .loc 6 2014 0 9929 00a8 1046 mov r0, r2 9930 00aa 1946 mov r1, r3 9931 .syntax unified 9932 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 9933 00ac C5FBC601 smlald r0, r1, r5, r6 9934 @ 0 "" 2 9935 .LVL1622: 9936 .thumb 9937 .syntax unified 9938 .LBE1473: 9939 .LBE1472: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 9940 .loc 29 337 0 9941 00b0 013C subs r4, r4, #1 9942 .LVL1623: 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 9943 .loc 29 345 0 9944 00b2 0246 mov r2, r0 9945 .LVL1624: 9946 00b4 0B46 mov r3, r1 9947 .LVL1625: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 9948 .loc 29 337 0 9949 00b6 F3D1 bne .L678 9950 00b8 0E46 mov r6, r1 9951 .LBB1474: 9952 .LBB1471: 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); ARM GAS /tmp/ccJrAs6S.s page 447 9953 .loc 3 933 0 9954 00ba 0199 ldr r1, [sp, #4] 9955 00bc 0546 mov r5, r0 9956 00be 08EB0900 add r0, r8, r9 9957 .LVL1626: 9958 .L677: 9959 .LBE1471: 9960 .LBE1474: 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* apply same above for remaining samples of smaller length sequence */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** while (tapCnt > 0U) 9961 .loc 29 354 0 9962 00c2 009B ldr r3, [sp] 9963 00c4 B3B1 cbz r3, .L679 9964 .LVL1627: 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* accumlate the results */ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 9965 .loc 29 357 0 9966 00c6 0988 ldrh r1, [r1] 9967 .LVL1628: 9968 00c8 0088 ldrh r0, [r0] 9969 .LVL1629: 9970 00ca 2A46 mov r2, r5 9971 00cc 3346 mov r3, r6 9972 00ce C0FB8123 smlalbb r2, r3, r0, r1 9973 00d2 1946 mov r1, r3 9974 .LVL1630: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 9975 .loc 29 327 0 9976 00d4 013F subs r7, r7, #1 9977 .LVL1631: 9978 .LBB1475: 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Decrement loop counter */ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** tapCnt--; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** blkCnt--; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* The result is in 2.30 format. Convert to 1.15 with saturation. 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** ** Then store the output in the destination buffer. */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); 9979 .loc 29 367 0 9980 00d6 4FEAD233 lsr r3, r2, #15 9981 00da 43EA4143 orr r3, r3, r1, lsl #17 9982 .LBE1475: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Initialization of inputB pointer */ 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pIn2 = py; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** pScratch1 += 1U; 9983 .loc 29 372 0 9984 00de 08F10208 add r8, r8, #2 9985 .LVL1632: 9986 .LBB1476: 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 448 9987 .loc 29 367 0 9988 .syntax unified 9989 @ 367 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q 9990 00e2 03F30F03 ssat r3, #16, r3 9991 @ 0 "" 2 9992 .LVL1633: 9993 .thumb 9994 .syntax unified 9995 .LBE1476: 9996 00e6 2AF8023B strh r3, [r10], #2 @ movhi 9997 .LVL1634: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 9998 .loc 29 327 0 9999 00ea CED1 bne .L676 10000 .LVL1635: 10001 .L681: 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** status = ARM_MATH_SUCCESS; 10002 .loc 29 377 0 10003 00ec 0020 movs r0, #0 10004 .LVL1636: 10005 .L671: 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** /* Return to application */ 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** return (status); 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 10006 .loc 29 382 0 10007 00ee 03B0 add sp, sp, #12 10008 .LCFI72: 10009 .cfi_remember_state 10010 .cfi_def_cfa_offset 36 10011 @ sp needed 10012 00f0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 10013 .LVL1637: 10014 .L679: 10015 .LCFI73: 10016 .cfi_restore_state 10017 .LBB1477: 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 10018 .loc 29 367 0 10019 00f4 EA0B lsrs r2, r5, #15 10020 .LBE1477: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 10021 .loc 29 327 0 10022 00f6 013F subs r7, r7, #1 10023 .LVL1638: 10024 .LBB1478: 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 10025 .loc 29 367 0 10026 00f8 42EA4642 orr r2, r2, r6, lsl #17 10027 .LBE1478: 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 10028 .loc 29 372 0 ARM GAS /tmp/ccJrAs6S.s page 449 10029 00fc 08F10208 add r8, r8, #2 10030 .LVL1639: 10031 .LBB1479: 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 10032 .loc 29 367 0 10033 .syntax unified 10034 @ 367 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q 10035 0100 02F30F02 ssat r2, #16, r2 10036 @ 0 "" 2 10037 .LVL1640: 10038 .thumb 10039 .syntax unified 10040 .LBE1479: 10041 0104 2AF8022B strh r2, [r10], #2 @ movhi 10042 .LVL1641: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 10043 .loc 29 327 0 10044 0108 F0D0 beq .L681 10045 .LVL1642: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 10046 .loc 29 337 0 10047 010a BBF1000F cmp fp, #0 10048 010e BFD1 bne .L692 10049 .LVL1643: 10050 .L683: 10051 0110 1099 ldr r1, [sp, #64] 10052 0112 4046 mov r0, r8 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 10053 .loc 29 333 0 10054 0114 0025 movs r5, #0 10055 0116 0026 movs r6, #0 10056 0118 D3E7 b .L677 10057 .LVL1644: 10058 .L691: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 10059 .loc 29 102 0 10060 011a 3346 mov r3, r6 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** 10061 .loc 29 105 0 10062 011c 8346 mov fp, r0 10063 011e 06F1FF39 add r9, r6, #-1 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 10064 .loc 29 108 0 10065 0122 1046 mov r0, r2 10066 .LVL1645: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** { 10067 .loc 29 102 0 10068 0124 2E46 mov r6, r5 10069 .LVL1646: 10070 0126 1D46 mov r5, r3 10071 .LVL1647: 10072 0128 7EE7 b .L672 10073 .LVL1648: 10074 .L682: 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c **** } 10075 .loc 29 95 0 10076 012a 4FF0FF30 mov r0, #-1 ARM GAS /tmp/ccJrAs6S.s page 450 10077 .LVL1649: 10078 012e DEE7 b .L671 10079 .cfi_endproc 10080 .LFE174: 10082 .section .text.arm_conv_partial_opt_q7,"ax",%progbits 10083 .align 1 10084 .p2align 2,,3 10085 .global arm_conv_partial_opt_q7 10086 .syntax unified 10087 .thumb 10088 .thumb_func 10089 .fpu fpv4-sp-d16 10091 arm_conv_partial_opt_q7: 10092 .LFB175: 10093 .file 30 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_o 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * Title: arm_conv_partial_opt_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * Description: Partial convolution of Q7 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @addtogroup PartialConv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @brief Partial convolution of Q7 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @param[in] pSrcA points to the first input sequence ARM GAS /tmp/ccJrAs6S.s page 451 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @param[out] pDst points to the location where the output result is written 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @param[in] firstIndex is the first output sample to start with 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @param[in] numPoints is the number of output points to be computed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** @return execution status 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** - \ref ARM_MATH_SUCCESS : Operation successful 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** */ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** arm_status arm_conv_partial_opt_q7( 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** const q7_t * pSrcA, 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** uint32_t srcALen, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** const q7_t * pSrcB, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** uint32_t srcBLen, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** q7_t * pDst, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** uint32_t firstIndex, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** uint32_t numPoints, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** q15_t * pScratch1, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** q15_t * pScratch2) 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10094 .loc 30 66 0 10095 .cfi_startproc 10096 @ args = 20, pretend = 0, frame = 40 10097 @ frame_needed = 0, uses_anonymous_args = 0 10098 .LVL1650: 10099 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 10100 .LCFI74: 10101 .cfi_def_cfa_offset 36 10102 .cfi_offset 4, -36 10103 .cfi_offset 5, -32 10104 .cfi_offset 6, -28 10105 .cfi_offset 7, -24 10106 .cfi_offset 8, -20 10107 .cfi_offset 9, -16 10108 .cfi_offset 10, -12 10109 .cfi_offset 11, -8 10110 .cfi_offset 14, -4 10111 0004 8BB0 sub sp, sp, #44 10112 .LCFI75: 10113 .cfi_def_cfa_offset 80 10114 0006 01F1FF38 add r8, r1, #-1 10115 .loc 30 66 0 10116 000a 159E ldr r6, [sp, #84] 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** q15_t *pScr2, *pScr1; /* Intermediate pointers for scratch pointer 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** q15_t x4; /* Temporary input variable */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** const q7_t *pIn1, *pIn2; /* InputA and inputB pointer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** uint32_t j, k, blkCnt, tapCnt; /* Loop counter */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** const q7_t *px; /* Temporary input1 pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** q15_t *py; /* Temporary input2 pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** q31_t acc0, acc1, acc2, acc3; /* Accumulator */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** q31_t x1, x2, x3, y1; /* Temporary input variables */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** arm_status status; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** q7_t *pOut = pDst; /* Output pointer */ ARM GAS /tmp/ccJrAs6S.s page 452 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** q7_t out0, out1, out2, out3; /* Temporary variables */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Check for range of output samples to be calculated */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) 10117 .loc 30 80 0 10118 000c 169D ldr r5, [sp, #88] 10119 000e 0591 str r1, [sp, #20] 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** q15_t *pScr2, *pScr1; /* Intermediate pointers for scratch pointer 10120 .loc 30 66 0 10121 0010 1C46 mov r4, r3 10122 .loc 30 80 0 10123 0012 7119 adds r1, r6, r5 10124 .LVL1651: 10125 0014 4344 add r3, r3, r8 10126 .LVL1652: 10127 0016 9942 cmp r1, r3 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** q15_t *pScr2, *pScr1; /* Intermediate pointers for scratch pointer 10128 .loc 30 66 0 10129 0018 179F ldr r7, [sp, #92] 10130 .loc 30 80 0 10131 001a 00F29281 bhi .L715 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** status = ARM_MATH_ARGUMENT_ERROR; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** else 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* srcB is always made to slide across srcA. */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** if (srcALen >= srcBLen) 10132 .loc 30 90 0 10133 001e 0599 ldr r1, [sp, #20] 10134 0020 8C42 cmp r4, r1 10135 0022 1546 mov r5, r2 10136 0024 40F27C81 bls .L757 10137 .LVL1653: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Initialization of inputA pointer */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pIn1 = pSrcA; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Initialization of inputB pointer */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pIn2 = pSrcB; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** else 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Initialization of inputA pointer */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pIn1 = pSrcB; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Initialization of inputB pointer */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pIn2 = pSrcA; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** j = srcBLen; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** srcBLen = srcALen; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** srcALen = j; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } ARM GAS /tmp/ccJrAs6S.s page 453 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* pointer to take end of scratch2 buffer */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScr2 = pScratch2; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* points to smaller length sequence */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** px = pIn2 + srcBLen - 1; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Apply loop unrolling and do 4 Copies simultaneously. */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** k = srcBLen >> 2U; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* First part of the processing with loop unrolling copies 4 data points at a time. 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** ** a second loop below copies for the remaining 1 to 3 samples. */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** while (k > 0U) 10138 .loc 30 123 0 10139 0028 059B ldr r3, [sp, #20] 10140 002a 9A08 lsrs r2, r3, #2 10141 .LVL1654: 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10142 .loc 30 116 0 10143 002c 4044 add r0, r0, r8 10144 .LVL1655: 10145 .loc 30 123 0 10146 002e 0392 str r2, [sp, #12] 10147 0030 00F08381 beq .L716 10148 .LVL1656: 10149 .L759: 10150 0034 031F subs r3, r0, #4 10151 0036 A3EB820C sub ip, r3, r2, lsl #2 10152 003a 189A ldr r2, [sp, #96] 10153 .LVL1657: 10154 003c 0832 adds r2, r2, #8 10155 .LVL1658: 10156 .L697: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* copy second buffer in reversal manner */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x4 = (q15_t) *px--; 10157 .loc 30 126 0 10158 003e 93F90410 ldrsb r1, [r3, #4] 10159 0042 22F8081C strh r1, [r2, #-8] @ movhi 10160 .LVL1659: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** *pScr2++ = x4; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x4 = (q15_t) *px--; 10161 .loc 30 128 0 10162 0046 93F90310 ldrsb r1, [r3, #3] 10163 004a 22F8061C strh r1, [r2, #-6] @ movhi 10164 .LVL1660: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** *pScr2++ = x4; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x4 = (q15_t) *px--; 10165 .loc 30 130 0 10166 004e 93F90210 ldrsb r1, [r3, #2] 10167 0052 22F8041C strh r1, [r2, #-4] @ movhi 10168 .LVL1661: 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** *pScr2++ = x4; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x4 = (q15_t) *px--; 10169 .loc 30 132 0 10170 0056 93F90110 ldrsb r1, [r3, #1] 10171 005a 22F8021C strh r1, [r2, #-2] @ movhi ARM GAS /tmp/ccJrAs6S.s page 454 10172 .LVL1662: 10173 005e 043B subs r3, r3, #4 10174 .LVL1663: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10175 .loc 30 123 0 10176 0060 9C45 cmp ip, r3 10177 0062 02F10802 add r2, r2, #8 10178 .LVL1664: 10179 0066 EAD1 bne .L697 10180 0068 039A ldr r2, [sp, #12] 10181 .LVL1665: 10182 006a C2EB8273 rsb r3, r2, r2, lsl #30 10183 .LVL1666: 10184 006e 00EB8300 add r0, r0, r3, lsl #2 10185 0072 189B ldr r3, [sp, #96] 10186 0074 03EBC203 add r3, r3, r2, lsl #3 10187 .LVL1667: 10188 .L696: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** *pScr2++ = x4; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Decrement loop counter */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** k--; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* If the count is not a multiple of 4, copy remaining samples here. 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** ** No loop unrolling is used. */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** k = srcBLen % 0x4U; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** while (k > 0U) 10189 .loc 30 143 0 10190 0078 059A ldr r2, [sp, #20] 10191 007a 12F00301 ands r1, r2, #3 10192 .LVL1668: 10193 007e 0091 str r1, [sp] 10194 0080 0CD0 beq .L698 10195 .LVL1669: 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* copy second buffer in reversal manner for remaining samples */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x4 = (q15_t) *px--; 10196 .loc 30 146 0 10197 0082 90F90020 ldrsb r2, [r0] 10198 0086 1A80 strh r2, [r3] @ movhi 10199 .LVL1670: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10200 .loc 30 143 0 10201 0088 0129 cmp r1, #1 10202 008a 07D0 beq .L698 10203 .LVL1671: 10204 .loc 30 146 0 10205 008c 10F9012C ldrsb r2, [r0, #-1] 10206 0090 5A80 strh r2, [r3, #2] @ movhi 10207 .LVL1672: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10208 .loc 30 143 0 10209 0092 0229 cmp r1, #2 10210 .LVL1673: 10211 .loc 30 146 0 ARM GAS /tmp/ccJrAs6S.s page 455 10212 0094 1CBF itt ne 10213 0096 10F9022C ldrsbne r2, [r0, #-2] 10214 009a 9A80 strhne r2, [r3, #4] @ movhi 10215 .LVL1674: 10216 .L698: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** *pScr2++ = x4; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Decrement loop counter */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** k--; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Initialze temporary scratch pointer */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScr1 = pScratch1; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Fill (srcBLen - 1U) zeros in scratch buffer */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 10217 .loc 30 157 0 10218 009c 3946 mov r1, r7 10219 009e 4246 mov r2, r8 10220 00a0 0020 movs r0, #0 10221 00a2 FFF7FEFF bl arm_fill_q15 10222 .LVL1675: 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Update temporary scratch pointer */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScr1 += (srcBLen - 1U); 10223 .loc 30 160 0 10224 00a6 059B ldr r3, [sp, #20] 10225 00a8 03F10041 add r1, r3, #-2147483648 10226 00ac 0139 subs r1, r1, #1 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Copy (srcALen) samples in scratch buffer */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Apply loop unrolling and do 4 Copies simultaneously. */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** k = srcALen >> 2U; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* First part of the processing with loop unrolling copies 4 data points at a time. 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** ** a second loop below copies for the remaining 1 to 3 samples. */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** while (k > 0U) 10227 .loc 30 168 0 10228 00ae 5FEA940E lsrs lr, r4, #2 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10229 .loc 30 160 0 10230 00b2 07EB4101 add r1, r7, r1, lsl #1 10231 .LVL1676: 10232 .loc 30 168 0 10233 00b6 1ED0 beq .L699 10234 00b8 2A1D adds r2, r5, #4 10235 00ba 4FEA8E09 lsl r9, lr, #2 10236 00be 02EB090C add ip, r2, r9 10237 00c2 01F10800 add r0, r1, #8 10238 .LVL1677: 10239 .L700: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* copy second buffer in reversal manner */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x4 = (q15_t) *pIn1++; 10240 .loc 30 171 0 10241 00c6 12F9043C ldrsb r3, [r2, #-4] 10242 00ca 20F8083C strh r3, [r0, #-8] @ movhi ARM GAS /tmp/ccJrAs6S.s page 456 10243 .LVL1678: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** *pScr1++ = x4; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x4 = (q15_t) *pIn1++; 10244 .loc 30 173 0 10245 00ce 12F9033C ldrsb r3, [r2, #-3] 10246 00d2 20F8063C strh r3, [r0, #-6] @ movhi 10247 .LVL1679: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** *pScr1++ = x4; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x4 = (q15_t) *pIn1++; 10248 .loc 30 175 0 10249 00d6 12F9023C ldrsb r3, [r2, #-2] 10250 00da 20F8043C strh r3, [r0, #-4] @ movhi 10251 .LVL1680: 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** *pScr1++ = x4; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x4 = (q15_t) *pIn1++; 10252 .loc 30 177 0 10253 00de 12F9013C ldrsb r3, [r2, #-1] 10254 00e2 20F8023C strh r3, [r0, #-2] @ movhi 10255 .LVL1681: 10256 00e6 0432 adds r2, r2, #4 10257 .LVL1682: 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10258 .loc 30 168 0 10259 00e8 9445 cmp ip, r2 10260 00ea 00F10800 add r0, r0, #8 10261 .LVL1683: 10262 00ee EAD1 bne .L700 10263 00f0 4D44 add r5, r5, r9 10264 00f2 01EBCE01 add r1, r1, lr, lsl #3 10265 .LVL1684: 10266 .L699: 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** *pScr1++ = x4; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Decrement loop counter */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** k--; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* If the count is not a multiple of 4, copy remaining samples here. 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** ** No loop unrolling is used. */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** k = srcALen % 0x4U; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** while (k > 0U) 10267 .loc 30 188 0 10268 00f6 14F00304 ands r4, r4, #3 10269 .LVL1685: 10270 00fa 0ED0 beq .L701 10271 .LVL1686: 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* copy second buffer in reversal manner for remaining samples */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x4 = (q15_t) *pIn1++; 10272 .loc 30 191 0 10273 00fc 95F90030 ldrsb r3, [r5] 10274 0100 0B80 strh r3, [r1] @ movhi 10275 .LVL1687: 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10276 .loc 30 188 0 10277 0102 012C cmp r4, #1 ARM GAS /tmp/ccJrAs6S.s page 457 10278 0104 07D0 beq .L702 10279 .LVL1688: 10280 .loc 30 191 0 10281 0106 95F90130 ldrsb r3, [r5, #1] 10282 010a 4B80 strh r3, [r1, #2] @ movhi 10283 .LVL1689: 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10284 .loc 30 188 0 10285 010c 022C cmp r4, #2 10286 .LVL1690: 10287 .loc 30 191 0 10288 010e 1CBF itt ne 10289 0110 95F90230 ldrsbne r3, [r5, #2] 10290 0114 8B80 strhne r3, [r1, #4] @ movhi 10291 .LVL1691: 10292 .L702: 10293 0116 01EB4401 add r1, r1, r4, lsl #1 10294 .L701: 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** *pScr1++ = x4; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Decrement the loop counter */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** k--; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 10295 .loc 30 199 0 10296 011a 4246 mov r2, r8 10297 011c 0020 movs r0, #0 10298 011e FFF7FEFF bl arm_fill_q15 10299 .LVL1692: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Update pointer */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScr1 += (srcBLen - 1U); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Temporary pointer for scratch2 */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** py = pScratch2; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Initialization of pIn2 pointer */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pIn2 = (q7_t *) py; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScr2 = py; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pOut = pDst + firstIndex; 10300 .loc 30 213 0 10301 0122 149B ldr r3, [sp, #80] 10302 0124 9919 adds r1, r3, r6 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScratch1 += firstIndex; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Actual convolution process starts here */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** blkCnt = (numPoints) >> 2; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** while (blkCnt > 0) 10303 .loc 30 220 0 10304 0126 169B ldr r3, [sp, #88] ARM GAS /tmp/ccJrAs6S.s page 458 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10305 .loc 30 213 0 10306 0128 0191 str r1, [sp, #4] 10307 .LVL1693: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10308 .loc 30 215 0 10309 012a 07EB4602 add r2, r7, r6, lsl #1 10310 .LVL1694: 10311 .loc 30 220 0 10312 012e 9808 lsrs r0, r3, #2 10313 .LVL1695: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10314 .loc 30 215 0 10315 0130 0892 str r2, [sp, #32] 10316 .loc 30 220 0 10317 0132 0990 str r0, [sp, #36] 10318 0134 00F00381 beq .L717 10319 0138 039B ldr r3, [sp, #12] 10320 013a 189C ldr r4, [sp, #96] 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Initialize temporary scratch pointer as scratch1 */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScr1 = pScratch1; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Clear Accumulators */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc0 = 0; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc1 = 0; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc2 = 0; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc3 = 0; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Read two samples from scratch1 buffer */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x1 = read_q15x2_ia (&pScr1); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Read next two samples from scratch1 buffer */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x2 = read_q15x2_ia (&pScr1); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** tapCnt = (srcBLen) >> 2U; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** while (tapCnt > 0U) 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Read four samples from smaller buffer */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** y1 = read_q15x2_ia (&pScr2); 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* multiply and accumlate */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc0 = __SMLAD(x1, y1, acc0); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc2 = __SMLAD(x2, y1, acc2); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* pack input data */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** #ifndef ARM_MATH_BIG_ENDIAN 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x3 = __PKHBT(x2, x1, 0); 10321 .loc 30 250 0 10322 013c DFF808A2 ldr r10, .L760 10323 0140 DB00 lsls r3, r3, #3 10324 0142 1C44 add r4, r4, r3 10325 0144 0833 adds r3, r3, #8 10326 0146 0793 str r3, [sp, #28] 10327 0148 01EB8003 add r3, r1, r0, lsl #2 10328 014c 0694 str r4, [sp, #24] ARM GAS /tmp/ccJrAs6S.s page 459 10329 014e 0493 str r3, [sp, #16] 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10330 .loc 30 215 0 10331 0150 9146 mov r9, r2 10332 .LVL1696: 10333 .L707: 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10334 .loc 30 239 0 10335 0152 039A ldr r2, [sp, #12] 10336 .LBB1480: 10337 .LBB1481: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 10338 .loc 3 928 0 10339 0154 D9F80010 ldr r1, [r9] @ unaligned 10340 .LVL1697: 10341 .LBE1481: 10342 .LBE1480: 10343 .LBB1482: 10344 .LBB1483: 10345 0158 D9F80450 ldr r5, [r9, #4] @ unaligned 10346 .LVL1698: 10347 015c 09F10803 add r3, r9, #8 10348 .LVL1699: 10349 0160 0293 str r3, [sp, #8] 10350 0162 1F46 mov r7, r3 10351 .LBE1483: 10352 .LBE1482: 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10353 .loc 30 239 0 10354 0164 002A cmp r2, #0 10355 0166 00F0D580 beq .L718 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10356 .loc 30 229 0 10357 016a 0023 movs r3, #0 10358 .LVL1700: 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10359 .loc 30 239 0 10360 016c DDF860C0 ldr ip, [sp, #96] 10361 0170 CB46 mov fp, r9 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc3 = 0; 10362 .loc 30 228 0 10363 0172 9846 mov r8, r3 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc2 = 0; 10364 .loc 30 227 0 10365 0174 1846 mov r0, r3 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc1 = 0; 10366 .loc 30 226 0 10367 0176 1E46 mov r6, r3 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10368 .loc 30 239 0 10369 0178 9146 mov r9, r2 10370 .LVL1701: 10371 .L705: 10372 .LBB1484: 10373 .LBB1485: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 10374 .loc 3 928 0 ARM GAS /tmp/ccJrAs6S.s page 460 10375 017a DCF80020 ldr r2, [ip] @ unaligned 10376 .LVL1702: 10377 .LBE1485: 10378 .LBE1484: 10379 .LBB1486: 10380 .LBB1487: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 10381 .loc 6 1993 0 10382 .syntax unified 10383 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 10384 017e 21FB0266 smlad r6, r1, r2, r6 10385 @ 0 "" 2 10386 .LVL1703: 10387 .thumb 10388 .syntax unified 10389 .LBE1487: 10390 .LBE1486: 10391 .LBB1488: 10392 .LBB1489: 10393 .syntax unified 10394 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 10395 0182 25FB0288 smlad r8, r5, r2, r8 10396 @ 0 "" 2 10397 .LVL1704: 10398 .thumb 10399 .syntax unified 10400 .LBE1489: 10401 .LBE1488: 10402 .loc 30 250 0 10403 0186 01EA0A01 and r1, r1, r10 10404 .LVL1705: 10405 018a 1FFA85FE uxth lr, r5 10406 018e 4EEA0101 orr r1, lr, r1 10407 .LBB1490: 10408 .LBB1491: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 10409 .loc 6 2001 0 10410 .syntax unified 10411 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 10412 0192 21FB1200 smladx r0, r1, r2, r0 10413 @ 0 "" 2 10414 .LVL1706: 10415 .thumb 10416 .syntax unified 10417 .LBE1491: 10418 .LBE1490: 10419 .LBB1492: 10420 .LBB1493: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 10421 .loc 3 928 0 10422 0196 3968 ldr r1, [r7] @ unaligned 10423 .LVL1707: 10424 .LBE1493: 10425 .LBE1492: 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** #else 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x3 = __PKHBT(x1, x2, 0); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** #endif ARM GAS /tmp/ccJrAs6S.s page 461 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* multiply and accumlate */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc1 = __SMLADX(x3, y1, acc1); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Read next two samples from scratch1 buffer */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x1 = read_q15x2_ia (&pScr1); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* pack input data */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** #ifndef ARM_MATH_BIG_ENDIAN 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x3 = __PKHBT(x1, x2, 0); 10426 .loc 30 263 0 10427 0198 05EA0A04 and r4, r5, r10 10428 019c 1FFA81FE uxth lr, r1 10429 01a0 4EEA040E orr lr, lr, r4 10430 .LVL1708: 10431 .LBB1494: 10432 .LBB1495: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 10433 .loc 6 2001 0 10434 .syntax unified 10435 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 10436 01a4 2EFB1232 smladx r2, lr, r2, r3 10437 @ 0 "" 2 10438 .LVL1709: 10439 .thumb 10440 .syntax unified 10441 .LBE1495: 10442 .LBE1494: 10443 .LBB1496: 10444 .LBB1497: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 10445 .loc 3 928 0 10446 01a8 DCF80440 ldr r4, [ip, #4] @ unaligned 10447 .LVL1710: 10448 01ac 0CF1080C add ip, ip, #8 10449 .LVL1711: 10450 .LBE1497: 10451 .LBE1496: 10452 .LBB1499: 10453 .LBB1500: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 10454 .loc 6 1993 0 10455 .syntax unified 10456 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 10457 01b0 25FB0466 smlad r6, r5, r4, r6 10458 @ 0 "" 2 10459 .LVL1712: 10460 .thumb 10461 .syntax unified 10462 .LBE1500: 10463 .LBE1499: 10464 .LBB1501: 10465 .LBB1502: 10466 .syntax unified 10467 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 10468 01b4 21FB0488 smlad r8, r1, r4, r8 10469 @ 0 "" 2 ARM GAS /tmp/ccJrAs6S.s page 462 10470 .LVL1713: 10471 .thumb 10472 .syntax unified 10473 .LBE1502: 10474 .LBE1501: 10475 .LBB1503: 10476 .LBB1504: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 10477 .loc 6 2001 0 10478 .syntax unified 10479 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 10480 01b8 2EFB1400 smladx r0, lr, r4, r0 10481 @ 0 "" 2 10482 .LVL1714: 10483 .thumb 10484 .syntax unified 10485 .LBE1504: 10486 .LBE1503: 10487 .LBB1505: 10488 .LBB1506: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 10489 .loc 3 928 0 10490 01bc 7D68 ldr r5, [r7, #4] @ unaligned 10491 .LVL1715: 10492 .LBE1506: 10493 .LBE1505: 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** #else 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x3 = __PKHBT(x2, x1, 0); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** #endif 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc3 = __SMLADX(x3, y1, acc3); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Read four samples from smaller buffer */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** y1 = read_q15x2_ia (&pScr2); 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc0 = __SMLAD(x2, y1, acc0); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc2 = __SMLAD(x1, y1, acc2); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc1 = __SMLADX(x3, y1, acc1); 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x2 = read_q15x2_ia (&pScr1); 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** #ifndef ARM_MATH_BIG_ENDIAN 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x3 = __PKHBT(x2, x1, 0); 10494 .loc 30 282 0 10495 01be 01EA0A0E and lr, r1, r10 10496 .LVL1716: 10497 01c2 ABB2 uxth r3, r5 10498 01c4 0837 adds r7, r7, #8 10499 .LVL1717: 10500 01c6 43EA0E03 orr r3, r3, lr 10501 .LBB1507: 10502 .LBB1508: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 10503 .loc 6 2001 0 10504 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 463 10505 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 10506 01ca 23FB1423 smladx r3, r3, r4, r2 10507 @ 0 "" 2 10508 .LVL1718: 10509 .thumb 10510 .syntax unified 10511 .LBE1508: 10512 .LBE1507: 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10513 .loc 30 239 0 10514 01ce B9F10109 subs r9, r9, #1 10515 .LVL1719: 10516 01d2 D2D1 bne .L705 10517 01d4 079A ldr r2, [sp, #28] 10518 .LBB1509: 10519 .LBB1498: 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 10520 .loc 3 933 0 10521 01d6 0699 ldr r1, [sp, #24] 10522 .LVL1720: 10523 01d8 0BEB0207 add r7, fp, r2 10524 .LVL1721: 10525 .L704: 10526 .LBE1498: 10527 .LBE1509: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** #else 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x3 = __PKHBT(x1, x2, 0); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** #endif 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc3 = __SMLADX(x3, y1, acc3); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Decrement loop counter */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** tapCnt--; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Update scratch pointer for remaining samples of smaller length sequence */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScr1 -= 4U; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* apply same above for remaining samples of smaller length sequence */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** tapCnt = (srcBLen) & 3U; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** while (tapCnt > 0U) 10528 .loc 30 299 0 10529 01dc 009A ldr r2, [sp] 10530 01de 72B3 cbz r2, .L706 10531 .LVL1722: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* accumlate the results */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc0 += (*pScr1++ * *pScr2); 10532 .loc 30 302 0 10533 01e0 B1F90020 ldrsh r2, [r1] 10534 01e4 37F808EC ldrh lr, [r7, #-8] 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 10535 .loc 30 303 0 10536 01e8 37F906CC ldrsh ip, [r7, #-6] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc2 += (*pScr1++ * *pScr2); 10537 .loc 30 304 0 ARM GAS /tmp/ccJrAs6S.s page 464 10538 01ec 37F9045C ldrsh r5, [r7, #-4] 10539 .LVL1723: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc3 += (*pScr1++ * *pScr2++); 10540 .loc 30 305 0 10541 01f0 37F9024C ldrsh r4, [r7, #-2] 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 10542 .loc 30 302 0 10543 01f4 1EFB0266 smlabb r6, lr, r2, r6 10544 .LVL1724: 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc2 += (*pScr1++ * *pScr2); 10545 .loc 30 303 0 10546 01f8 02FB0C00 mla r0, r2, ip, r0 10547 .LVL1725: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc3 += (*pScr1++ * *pScr2++); 10548 .loc 30 304 0 10549 01fc 02FB0588 mla r8, r2, r5, r8 10550 .LVL1726: 10551 .loc 30 305 0 10552 0200 02FB0433 mla r3, r2, r4, r3 10553 .LVL1727: 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10554 .loc 30 299 0 10555 0204 009A ldr r2, [sp] 10556 0206 012A cmp r2, #1 10557 0208 19D0 beq .L706 10558 .LVL1728: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 10559 .loc 30 302 0 10560 020a B1F90220 ldrsh r2, [r1, #2] 10561 .loc 30 305 0 10562 020e B7F900E0 ldrsh lr, [r7] 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 10563 .loc 30 302 0 10564 0212 0CFB0266 mla r6, ip, r2, r6 10565 .LVL1729: 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc2 += (*pScr1++ * *pScr2); 10566 .loc 30 303 0 10567 0216 05FB0200 mla r0, r5, r2, r0 10568 .LVL1730: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc3 += (*pScr1++ * *pScr2++); 10569 .loc 30 304 0 10570 021a 04FB0288 mla r8, r4, r2, r8 10571 .LVL1731: 10572 .loc 30 305 0 10573 021e 02FB0E33 mla r3, r2, lr, r3 10574 .LVL1732: 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10575 .loc 30 299 0 10576 0222 009A ldr r2, [sp] 10577 0224 022A cmp r2, #2 10578 0226 0AD0 beq .L706 10579 .LVL1733: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 10580 .loc 30 302 0 10581 0228 B1F90420 ldrsh r2, [r1, #4] 10582 .loc 30 305 0 10583 022c 7988 ldrh r1, [r7, #2] ARM GAS /tmp/ccJrAs6S.s page 465 10584 .LVL1734: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 10585 .loc 30 302 0 10586 022e 05FB0266 mla r6, r5, r2, r6 10587 .LVL1735: 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc2 += (*pScr1++ * *pScr2); 10588 .loc 30 303 0 10589 0232 04FB0200 mla r0, r4, r2, r0 10590 .LVL1736: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc3 += (*pScr1++ * *pScr2++); 10591 .loc 30 304 0 10592 0236 0EFB0288 mla r8, lr, r2, r8 10593 .LVL1737: 10594 .loc 30 305 0 10595 023a 12FB0133 smlabb r3, r2, r1, r3 10596 .LVL1738: 10597 .L706: 10598 .LBB1510: 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScr1 -= 3U; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Decrement loop counter */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** tapCnt--; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** blkCnt--; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** out0 = (q7_t) (__SSAT(acc0 >> 7U, 8)); 10599 .loc 30 316 0 10600 023e F611 asrs r6, r6, #7 10601 .LVL1739: 10602 .LBE1510: 10603 .LBB1511: 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** out1 = (q7_t) (__SSAT(acc1 >> 7U, 8)); 10604 .loc 30 317 0 10605 0240 C111 asrs r1, r0, #7 10606 .LBE1511: 10607 .LBB1512: 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** out1 = (q7_t) (__SSAT(acc1 >> 7U, 8)); 10608 .loc 30 316 0 10609 .syntax unified 10610 @ 316 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q 10611 0242 06F30706 ssat r6, #8, r6 10612 @ 0 "" 2 10613 .LVL1740: 10614 .thumb 10615 .syntax unified 10616 .LBE1512: 10617 .LBB1513: 10618 .loc 30 317 0 10619 .syntax unified 10620 @ 317 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q 10621 0246 01F30701 ssat r1, #8, r1 10622 @ 0 "" 2 10623 .LVL1741: 10624 .thumb ARM GAS /tmp/ccJrAs6S.s page 466 10625 .syntax unified 10626 .LBE1513: 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** out2 = (q7_t) (__SSAT(acc2 >> 7U, 8)); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** out3 = (q7_t) (__SSAT(acc3 >> 7U, 8)); 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3)); 10627 .loc 30 321 0 10628 024a F6B2 uxtb r6, r6 10629 .LVL1742: 10630 024c 0902 lsls r1, r1, #8 10631 .LVL1743: 10632 .LBB1514: 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10633 .loc 30 319 0 10634 024e DB11 asrs r3, r3, #7 10635 .LVL1744: 10636 .LBE1514: 10637 .loc 30 321 0 10638 0250 01F47F41 and r1, r1, #65280 10639 .LBB1515: 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10640 .loc 30 319 0 10641 .syntax unified 10642 @ 319 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q 10643 0254 03F30702 ssat r2, #8, r3 10644 @ 0 "" 2 10645 .thumb 10646 .syntax unified 10647 .LBE1515: 10648 .LBB1516: 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** out2 = (q7_t) (__SSAT(acc2 >> 7U, 8)); 10649 .loc 30 318 0 10650 0258 4FEAE818 asr r8, r8, #7 10651 .LVL1745: 10652 .LBE1516: 10653 .loc 30 321 0 10654 025c 46EA0266 orr r6, r6, r2, lsl #24 10655 .LVL1746: 10656 .LBB1517: 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** out2 = (q7_t) (__SSAT(acc2 >> 7U, 8)); 10657 .loc 30 318 0 10658 .syntax unified 10659 @ 318 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q 10660 0260 08F30708 ssat r8, #8, r8 10661 @ 0 "" 2 10662 .LVL1747: 10663 .thumb 10664 .syntax unified 10665 .LBE1517: 10666 .loc 30 321 0 10667 0264 4FEA0843 lsl r3, r8, #16 10668 .LBB1518: 10669 .LBB1519: 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 10670 .loc 3 1052 0 10671 0268 019A ldr r2, [sp, #4] 10672 .LVL1748: ARM GAS /tmp/ccJrAs6S.s page 467 10673 .LBE1519: 10674 .LBE1518: 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Initialization of inputB pointer */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScr2 = py; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScratch1 += 4U; 10675 .loc 30 326 0 10676 026a DDF80890 ldr r9, [sp, #8] 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10677 .loc 30 321 0 10678 026e 03F47F03 and r3, r3, #16711680 10679 0272 3143 orrs r1, r1, r6 10680 0274 0B43 orrs r3, r3, r1 10681 .LBB1521: 10682 .LBB1520: 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 10683 .loc 3 1052 0 10684 0276 42F8043B str r3, [r2], #4 @ unaligned 10685 027a 1346 mov r3, r2 10686 027c 0192 str r2, [sp, #4] 10687 .LVL1749: 10688 .LBE1520: 10689 .LBE1521: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10690 .loc 30 220 0 10691 027e 049A ldr r2, [sp, #16] 10692 .LVL1750: 10693 0280 9342 cmp r3, r2 10694 0282 7FF466AF bne .L707 10695 0286 DDE90832 ldrd r3, r2, [sp, #32] 10696 .LVL1751: 10697 028a 03EBC203 add r3, r3, r2, lsl #3 10698 028e 0893 str r3, [sp, #32] 10699 .LVL1752: 10700 .L703: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** blkCnt = (numPoints) & 0x3; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Calculate convolution for remaining samples of Bigger length sequence */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** while (blkCnt > 0) 10701 .loc 30 332 0 10702 0290 169B ldr r3, [sp, #88] 10703 0292 13F00304 ands r4, r3, #3 10704 .LVL1753: 10705 0296 2AD0 beq .L714 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Initialze temporary scratch pointer as scratch1 */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScr1 = pScratch1; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Clear Accumlators */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc0 = 0; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** tapCnt = (srcBLen) >> 1U; 10706 .loc 30 340 0 10707 0298 059B ldr r3, [sp, #20] ARM GAS /tmp/ccJrAs6S.s page 468 10708 029a 049A ldr r2, [sp, #16] 10709 029c DDF82080 ldr r8, [sp, #32] 10710 02a0 5D08 lsrs r5, r3, #1 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** while (tapCnt > 0U) 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Read next two samples from scratch1 buffer */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** x1 = read_q15x2_ia (&pScr1); 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Read two samples from smaller buffer */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** y1 = read_q15x2_ia (&pScr2); 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc0 = __SMLAD(x1, y1, acc0); 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Decrement the loop counter */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** tapCnt--; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** tapCnt = (srcBLen) & 1U; 10711 .loc 30 357 0 10712 02a2 03F00107 and r7, r3, #1 10713 02a6 189B ldr r3, [sp, #96] 10714 02a8 AE00 lsls r6, r5, #2 10715 02aa 1444 add r4, r4, r2 10716 .LVL1754: 10717 02ac 03EB060C add ip, r3, r6 10718 02b0 9146 mov r9, r2 10719 .LVL1755: 10720 .L709: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10721 .loc 30 342 0 10722 02b2 5DB3 cbz r5, .L719 10723 .L758: 10724 02b4 1899 ldr r1, [sp, #96] 10725 02b6 4046 mov r0, r8 10726 02b8 2B46 mov r3, r5 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10727 .loc 30 338 0 10728 02ba 0022 movs r2, #0 10729 .LVL1756: 10730 .L711: 10731 .LBB1522: 10732 .LBB1523: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 10733 .loc 3 928 0 10734 02bc 50F804EB ldr lr, [r0], #4 @ unaligned 10735 .LVL1757: 10736 .LBE1523: 10737 .LBE1522: 10738 .LBB1524: 10739 .LBB1525: 10740 02c0 51F804AB ldr r10, [r1], #4 @ unaligned 10741 .LVL1758: 10742 .LBE1525: 10743 .LBE1524: 10744 .LBB1527: ARM GAS /tmp/ccJrAs6S.s page 469 10745 .LBB1528: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 10746 .loc 6 1993 0 10747 .syntax unified 10748 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 10749 02c4 2EFB0A22 smlad r2, lr, r10, r2 10750 @ 0 "" 2 10751 .LVL1759: 10752 .thumb 10753 .syntax unified 10754 .LBE1528: 10755 .LBE1527: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10756 .loc 30 342 0 10757 02c8 013B subs r3, r3, #1 10758 .LVL1760: 10759 02ca F7D1 bne .L711 10760 02cc 08EB0603 add r3, r8, r6 10761 .LVL1761: 10762 .LBB1529: 10763 .LBB1526: 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 10764 .loc 3 933 0 10765 02d0 6146 mov r1, ip 10766 .LVL1762: 10767 .L710: 10768 .LBE1526: 10769 .LBE1529: 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* apply same above for remaining samples of smaller length sequence */ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** while (tapCnt > 0U) 10770 .loc 30 360 0 10771 02d2 87B1 cbz r7, .L712 10772 .LVL1763: 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* accumlate the results */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc0 += (*pScr1++ * *pScr2++); 10773 .loc 30 364 0 10774 02d4 1B88 ldrh r3, [r3] 10775 .LVL1764: 10776 02d6 0988 ldrh r1, [r1] 10777 .LVL1765: 10778 02d8 13FB0123 smlabb r3, r3, r1, r2 10779 .LVL1766: 10780 .LBB1530: 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Decrement loop counter */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** tapCnt--; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** blkCnt--; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8)); 10781 .loc 30 373 0 10782 02dc DB11 asrs r3, r3, #7 ARM GAS /tmp/ccJrAs6S.s page 470 10783 .syntax unified 10784 @ 373 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q 10785 02de 03F30703 ssat r3, #8, r3 10786 @ 0 "" 2 10787 .LVL1767: 10788 .thumb 10789 .syntax unified 10790 .LBE1530: 10791 02e2 09F8013B strb r3, [r9], #1 10792 .LVL1768: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10793 .loc 30 332 0 10794 02e6 A145 cmp r9, r4 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Initialization of inputB pointer */ 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScr2 = py; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** pScratch1 += 1U; 10795 .loc 30 378 0 10796 02e8 08F10208 add r8, r8, #2 10797 .LVL1769: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10798 .loc 30 332 0 10799 02ec E1D1 bne .L709 10800 .LVL1770: 10801 .L714: 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** /* Set status as ARM_MATH_SUCCESS */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** status = ARM_MATH_SUCCESS; 10802 .loc 30 382 0 10803 02ee 0020 movs r0, #0 10804 .LVL1771: 10805 .L694: 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** return (status); 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 10806 .loc 30 386 0 10807 02f0 0BB0 add sp, sp, #44 10808 .LCFI76: 10809 .cfi_remember_state 10810 .cfi_def_cfa_offset 36 10811 @ sp needed 10812 02f2 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 10813 .LVL1772: 10814 .L712: 10815 .LCFI77: 10816 .cfi_restore_state 10817 .LBB1531: 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10818 .loc 30 373 0 10819 02f6 D211 asrs r2, r2, #7 10820 .LVL1773: 10821 .syntax unified 10822 @ 373 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q 10823 02f8 02F30702 ssat r2, #8, r2 ARM GAS /tmp/ccJrAs6S.s page 471 10824 @ 0 "" 2 10825 .LVL1774: 10826 .thumb 10827 .syntax unified 10828 .LBE1531: 10829 02fc 09F8012B strb r2, [r9], #1 10830 .LVL1775: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10831 .loc 30 332 0 10832 0300 A145 cmp r9, r4 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 10833 .loc 30 378 0 10834 0302 08F10208 add r8, r8, #2 10835 .LVL1776: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10836 .loc 30 332 0 10837 0306 F2D0 beq .L714 10838 .LVL1777: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10839 .loc 30 342 0 10840 0308 002D cmp r5, #0 10841 030a D3D1 bne .L758 10842 .LVL1778: 10843 .L719: 10844 030c 4346 mov r3, r8 10845 030e 1899 ldr r1, [sp, #96] 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10846 .loc 30 338 0 10847 0310 2A46 mov r2, r5 10848 0312 DEE7 b .L710 10849 .LVL1779: 10850 .L718: 10851 0314 1646 mov r6, r2 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10852 .loc 30 239 0 10853 0316 1899 ldr r1, [sp, #96] 10854 .LVL1780: 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10855 .loc 30 229 0 10856 0318 1346 mov r3, r2 10857 .LVL1781: 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc3 = 0; 10858 .loc 30 228 0 10859 031a 9046 mov r8, r2 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** acc2 = 0; 10860 .loc 30 227 0 10861 031c 1046 mov r0, r2 10862 031e 5DE7 b .L704 10863 .LVL1782: 10864 .L757: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10865 .loc 30 90 0 10866 0320 2346 mov r3, r4 10867 0322 0593 str r3, [sp, #20] 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10868 .loc 30 123 0 10869 0324 059B ldr r3, [sp, #20] ARM GAS /tmp/ccJrAs6S.s page 472 10870 0326 04F1FF38 add r8, r4, #-1 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10871 .loc 30 93 0 10872 032a 0546 mov r5, r0 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 10873 .loc 30 96 0 10874 032c 1046 mov r0, r2 10875 .LVL1783: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10876 .loc 30 123 0 10877 032e 9A08 lsrs r2, r3, #2 10878 .LVL1784: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10879 .loc 30 90 0 10880 0330 0C46 mov r4, r1 10881 .LVL1785: 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10882 .loc 30 116 0 10883 0332 4044 add r0, r0, r8 10884 .LVL1786: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** { 10885 .loc 30 123 0 10886 0334 0392 str r2, [sp, #12] 10887 0336 7FF47DAE bne .L759 10888 .LVL1787: 10889 .L716: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10890 .loc 30 113 0 10891 033a 189B ldr r3, [sp, #96] 10892 033c 9CE6 b .L696 10893 .LVL1788: 10894 .L717: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** 10895 .loc 30 213 0 10896 033e 0491 str r1, [sp, #16] 10897 0340 A6E7 b .L703 10898 .LVL1789: 10899 .L715: 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c **** } 10900 .loc 30 83 0 10901 0342 4FF0FF30 mov r0, #-1 10902 .LVL1790: 10903 0346 D3E7 b .L694 10904 .L761: 10905 .align 2 10906 .L760: 10907 0348 0000FFFF .word -65536 10908 .cfi_endproc 10909 .LFE175: 10911 .section .text.arm_conv_partial_q15,"ax",%progbits 10912 .align 1 10913 .p2align 2,,3 10914 .global arm_conv_partial_q15 10915 .syntax unified 10916 .thumb 10917 .thumb_func 10918 .fpu fpv4-sp-d16 ARM GAS /tmp/ccJrAs6S.s page 473 10920 arm_conv_partial_q15: 10921 .LFB176: 10922 .file 31 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Title: arm_conv_partial_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Description: Partial convolution of Q15 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @addtogroup PartialConv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @brief Partial convolution of Q15 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @param[out] pDst points to the location where the output result is written 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @param[in] firstIndex is the first output sample to start with 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @param[in] numPoints is the number of output points to be computed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @return execution status 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @remark 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version ARM GAS /tmp/ccJrAs6S.s page 474 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** @remark 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** Refer to \ref arm_conv_partial_opt_q15() for a faster implementation of this fun 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** arm_status arm_conv_partial_q15( 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** const q15_t * pSrcA, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** uint32_t srcALen, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** const q15_t * pSrcB, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** uint32_t srcBLen, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** q15_t * pDst, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** uint32_t firstIndex, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** uint32_t numPoints) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 10923 .loc 31 67 0 10924 .cfi_startproc 10925 @ args = 12, pretend = 0, frame = 88 10926 @ frame_needed = 0, uses_anonymous_args = 0 10927 .LVL1791: 10928 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 10929 .LCFI78: 10930 .cfi_def_cfa_offset 36 10931 .cfi_offset 4, -36 10932 .cfi_offset 5, -32 10933 .cfi_offset 6, -28 10934 .cfi_offset 7, -24 10935 .cfi_offset 8, -20 10936 .cfi_offset 9, -16 10937 .cfi_offset 10, -12 10938 .cfi_offset 11, -8 10939 .cfi_offset 14, -4 10940 0004 97B0 sub sp, sp, #92 10941 .LCFI79: 10942 .cfi_def_cfa_offset 128 10943 .loc 31 67 0 10944 0006 DDE921BA ldrd fp, r10, [sp, #132] 10945 000a 4C1E subs r4, r1, #1 10946 000c 1D46 mov r5, r3 10947 000e 0C93 str r3, [sp, #48] 10948 .LVL1792: 10949 0010 0B94 str r4, [sp, #44] 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #if defined (ARM_MATH_DSP) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** const q15_t *pIn1; /* InputA pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** const q15_t *pIn2; /* InputB pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** q63_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** const q15_t *px; /* Intermediate inputA pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** const q15_t *py; /* Intermediate inputB pointer */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** q31_t x0, x1, x2, x3, c0; /* Temporary input variables to hold state a 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** uint32_t j, k, count, blkCnt, check; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** arm_status status; /* Status of Partial convolution */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Check for range of output samples to be calculated */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) ARM GAS /tmp/ccJrAs6S.s page 475 10950 .loc 31 84 0 10951 0012 E318 adds r3, r4, r3 10952 .LVL1793: 10953 0014 0BEB0A04 add r4, fp, r10 10954 0018 9C42 cmp r4, r3 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 10955 .loc 31 67 0 10956 001a 0491 str r1, [sp, #16] 10957 001c DDF880C0 ldr ip, [sp, #128] 10958 0020 0590 str r0, [sp, #20] 10959 0022 0192 str r2, [sp, #4] 10960 .loc 31 84 0 10961 0024 00F2AC84 bhi .L842 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** status = ARM_MATH_ARGUMENT_ERROR; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** else 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* srcB is always made to slide across srcA. */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** if (srcALen >= srcBLen) 10962 .loc 31 94 0 10963 0028 8D42 cmp r5, r1 10964 002a 05D8 bhi .L764 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Initialization of inputA pointer */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pIn1 = pSrcA; 10965 .loc 31 97 0 10966 002c 0190 str r0, [sp, #4] 10967 002e 681E subs r0, r5, #1 10968 .LVL1794: 10969 0030 0B90 str r0, [sp, #44] 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Initialization of inputB pointer */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pIn2 = pSrcB; 10970 .loc 31 100 0 10971 0032 0592 str r2, [sp, #20] 10972 .LVL1795: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 10973 .loc 31 94 0 10974 0034 0C91 str r1, [sp, #48] 10975 0036 0495 str r5, [sp, #16] 10976 .LVL1796: 10977 .L764: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** else 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Initialization of inputA pointer */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pIn1 = pSrcB; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Initialization of inputB pointer */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pIn2 = pSrcA; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** j = srcBLen; ARM GAS /tmp/ccJrAs6S.s page 476 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** srcBLen = srcALen; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** srcALen = j; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Conditions to check which loopCounter holds 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * the first and last indices of the output samples to be calculated. */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** check = firstIndex + numPoints; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0; 10978 .loc 31 119 0 10979 0038 0C9B ldr r3, [sp, #48] 10980 003a 9C42 cmp r4, r3 10981 003c CCBF ite gt 10982 003e E31A subgt r3, r4, r3 10983 0040 0023 movle r3, #0 10984 0042 0993 str r3, [sp, #36] 10985 .LVL1797: 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + 10986 .loc 31 120 0 10987 0044 0C9B ldr r3, [sp, #48] 10988 0046 5B45 cmp r3, fp 10989 0048 04DC bgt .L766 10990 .loc 31 120 0 is_stmt 0 discriminator 1 10991 004a 099A ldr r2, [sp, #36] 10992 .LVL1798: 10993 004c A3EB0B03 sub r3, r3, fp 10994 .LVL1799: 10995 0050 1A44 add r2, r2, r3 10996 .LVL1800: 10997 0052 0992 str r2, [sp, #36] 10998 .LVL1801: 10999 .L766: 11000 0054 059B ldr r3, [sp, #20] 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : numPoints) : 0; 11001 .loc 31 122 0 is_stmt 1 discriminator 4 11002 0056 0498 ldr r0, [sp, #16] 11003 0058 4FEA4B02 lsl r2, fp, #1 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; 11004 .loc 31 121 0 discriminator 4 11005 005c 6FEA0B01 mvn r1, fp 11006 .LVL1802: 11007 0060 1344 add r3, r3, r2 11008 0062 6244 add r2, ip, r2 11009 0064 0292 str r2, [sp, #8] 11010 .loc 31 122 0 discriminator 4 11011 0066 0918 adds r1, r1, r0 11012 .LVL1803: 11013 0068 0BF10102 add r2, fp, #1 11014 006c 0392 str r2, [sp, #12] 11015 006e 00F08081 beq .L767 11016 .loc 31 122 0 is_stmt 0 discriminator 1 11017 0072 0B98 ldr r0, [sp, #44] 11018 0074 8442 cmp r4, r0 11019 0076 00F2B583 bhi .L768 11020 .LVL1804: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); 11021 .loc 31 123 0 is_stmt 1 discriminator 8 ARM GAS /tmp/ccJrAs6S.s page 477 11022 007a 0999 ldr r1, [sp, #36] 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* The function is internally 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * divided into three stages according to the number of multiplications that has to be 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * taken place between inputA samples and inputB samples. In the first stage of the 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * algorithm, the multiplications increase by one for every iteration. 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * In the third stage of the algorithm, the multiplications decrease by one 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * for every iteration. */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Set the output pointer to point to the firstIndex 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * of the output sample to be calculated. */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pOut = pDst + firstIndex; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* -------------------------- 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Initializations of stage1 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * -------------------------*/ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* sum = x[0] * y[0] 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * sum = x[0] * y[1] + x[1] * y[0] 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * .... 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** The count variable holds the number of MAC operations performed. 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** Since the partial convolution starts from firstIndex 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** Number of Macs to be performed is firstIndex + 1 */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** count = 1U + firstIndex; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Working pointer of inputA */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px = pIn1; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Working pointer of inputB */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pSrc2 = pIn2 + firstIndex; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* ------------------------ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Stage1 process 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * ----------------------*/ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* For loop unrolling by 4, this stage is divided into two. */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* First part of this stage computes the MAC operations less than 4 */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Second part of this stage computes the MAC operations greater than or equal to 4 */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* The first part of the stage starts here */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while ((count < 4U) && (blockSize1 > 0U)) 11023 .loc 31 171 0 discriminator 8 11024 007c 032A cmp r2, #3 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); 11025 .loc 31 123 0 discriminator 8 11026 007e C1F10001 rsb r1, r1, #0 11027 0082 1291 str r1, [sp, #72] 11028 .LVL1805: 11029 .loc 31 171 0 discriminator 8 ARM GAS /tmp/ccJrAs6S.s page 478 11030 0084 00F27784 bhi .L844 11031 .loc 31 171 0 is_stmt 0 11032 0088 BAF1000F cmp r10, #0 11033 008c 00F07581 beq .L771 11034 0090 5146 mov r1, r10 11035 .LVL1806: 11036 .L770: 11037 0092 029A ldr r2, [sp, #8] 11038 0094 0232 adds r2, r2, #2 11039 0096 0092 str r2, [sp] 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Accumulator is made zero for every iteration */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = 0; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Loop over number of MAC operations between 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * inputA samples and inputB samples */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k = count; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (k > 0U) 11040 .loc 31 180 0 is_stmt 1 11041 0098 039A ldr r2, [sp, #12] 11042 009a 0BF10205 add r5, fp, #2 11043 009e 01F1FF3A add r10, r1, #-1 11044 00a2 9C1C adds r4, r3, #2 11045 .LVL1807: 11046 00a4 002A cmp r2, #0 11047 00a6 00F0B583 beq .L900 11048 .LVL1808: 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Perform the multiply-accumulates */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = __SMLALD(*px++, *py--, sum); 11049 .loc 31 183 0 11050 00aa 0198 ldr r0, [sp, #4] 11051 00ac B3F90060 ldrsh r6, [r3] 11052 00b0 B0F90000 ldrsh r0, [r0] 11053 .LVL1809: 11054 .LBB1532: 11055 .LBB1533: 11056 .loc 6 2014 0 11057 00b4 0022 movs r2, #0 11058 00b6 1746 mov r7, r2 11059 .syntax unified 11060 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11061 00b8 C0FBC627 smlald r2, r7, r0, r6 11062 @ 0 "" 2 11063 .thumb 11064 .syntax unified 11065 .LBE1533: 11066 .LBE1532: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11067 .loc 31 180 0 11068 00bc 039E ldr r6, [sp, #12] 11069 .LVL1810: 11070 00be 012E cmp r6, #1 11071 .LBB1553: 11072 .LBB1534: 11073 .loc 6 2014 0 ARM GAS /tmp/ccJrAs6S.s page 479 11074 00c0 3846 mov r0, r7 11075 .LVL1811: 11076 .LBE1534: 11077 .LBE1553: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11078 .loc 31 180 0 11079 00c2 00F08783 beq .L776 11080 .LVL1812: 11081 .loc 31 183 0 11082 00c6 019E ldr r6, [sp, #4] 11083 00c8 33F9027C ldrsh r7, [r3, #-2] 11084 00cc B6F90260 ldrsh r6, [r6, #2] 11085 .LVL1813: 11086 .LBB1554: 11087 .LBB1535: 11088 .loc 6 2014 0 11089 .syntax unified 11090 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11091 00d0 C6FBC720 smlald r2, r0, r6, r7 11092 @ 0 "" 2 11093 .LVL1814: 11094 .thumb 11095 .syntax unified 11096 .LBE1535: 11097 .LBE1554: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11098 .loc 31 180 0 11099 00d4 039E ldr r6, [sp, #12] 11100 00d6 022E cmp r6, #2 11101 00d8 00F07C83 beq .L776 11102 .LVL1815: 11103 .loc 31 183 0 11104 00dc 019E ldr r6, [sp, #4] 11105 00de 33F9047C ldrsh r7, [r3, #-4] 11106 00e2 B6F90460 ldrsh r6, [r6, #4] 11107 .LVL1816: 11108 .LBB1555: 11109 .LBB1536: 11110 .loc 6 2014 0 11111 .syntax unified 11112 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11113 00e6 C6FBC720 smlald r2, r0, r6, r7 11114 @ 0 "" 2 11115 .LVL1817: 11116 .thumb 11117 .syntax unified 11118 .LBE1536: 11119 .LBE1555: 11120 .LBB1556: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k--; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); 11121 .loc 31 190 0 ARM GAS /tmp/ccJrAs6S.s page 480 11122 00ea D20B lsrs r2, r2, #15 11123 .LVL1818: 11124 .LBE1556: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11125 .loc 31 171 0 11126 00ec 032D cmp r5, #3 11127 .LBB1557: 11128 .loc 31 190 0 11129 00ee 42EA4042 orr r2, r2, r0, lsl #17 11130 .syntax unified 11131 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 11132 00f2 02F30F02 ssat r2, #16, r2 11133 @ 0 "" 2 11134 .LVL1819: 11135 .thumb 11136 .syntax unified 11137 .LBE1557: 11138 00f6 2CF81B20 strh r2, [ip, fp, lsl #1] @ movhi 11139 .LVL1820: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11140 .loc 31 171 0 11141 00fa 00F2DC80 bhi .L769 11142 .LVL1821: 11143 .L836: 11144 00fe BAF1000F cmp r10, #0 11145 0102 00F0C883 beq .L852 11146 .LVL1822: 11147 0106 029A ldr r2, [sp, #8] 11148 0108 0432 adds r2, r2, #4 11149 010a 0BF10300 add r0, fp, #3 11150 .LVL1823: 11151 010e A1F1020A sub r10, r1, #2 11152 .LVL1824: 11153 0112 0092 str r2, [sp] 11154 .LVL1825: 11155 0114 1C1D adds r4, r3, #4 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11156 .loc 31 180 0 11157 0116 002D cmp r5, #0 11158 0118 00F0C083 beq .L901 11159 .LVL1826: 11160 .L778: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11161 .loc 31 183 0 11162 011c 0199 ldr r1, [sp, #4] 11163 011e B3F90260 ldrsh r6, [r3, #2] 11164 0122 B1F90010 ldrsh r1, [r1] 11165 .LVL1827: 11166 .LBB1558: 11167 .LBB1537: 11168 .loc 6 2014 0 11169 0126 0022 movs r2, #0 11170 .LVL1828: 11171 0128 1746 mov r7, r2 11172 .syntax unified 11173 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11174 012a C1FBC627 smlald r2, r7, r1, r6 ARM GAS /tmp/ccJrAs6S.s page 481 11175 @ 0 "" 2 11176 .thumb 11177 .syntax unified 11178 .LBE1537: 11179 .LBE1558: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11180 .loc 31 180 0 11181 012e 012D cmp r5, #1 11182 .LBB1559: 11183 .LBB1538: 11184 .loc 6 2014 0 11185 0130 3946 mov r1, r7 11186 .LVL1829: 11187 .LBE1538: 11188 .LBE1559: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11189 .loc 31 180 0 11190 0132 00F06783 beq .L781 11191 .LVL1830: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11192 .loc 31 183 0 11193 0136 019E ldr r6, [sp, #4] 11194 0138 B3F90070 ldrsh r7, [r3] 11195 013c B6F90260 ldrsh r6, [r6, #2] 11196 .LVL1831: 11197 .LBB1560: 11198 .LBB1539: 11199 .loc 6 2014 0 11200 .syntax unified 11201 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11202 0140 C6FBC721 smlald r2, r1, r6, r7 11203 @ 0 "" 2 11204 .LVL1832: 11205 .thumb 11206 .syntax unified 11207 .LBE1539: 11208 .LBE1560: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11209 .loc 31 180 0 11210 0144 022D cmp r5, #2 11211 0146 00F05D83 beq .L781 11212 .LVL1833: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11213 .loc 31 183 0 11214 014a 33F9025C ldrsh r5, [r3, #-2] 11215 014e 019B ldr r3, [sp, #4] 11216 0150 B3F90430 ldrsh r3, [r3, #4] 11217 .LVL1834: 11218 .LBB1561: 11219 .LBB1540: 11220 .loc 6 2014 0 11221 .syntax unified 11222 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11223 0154 C3FBC521 smlald r2, r1, r3, r5 11224 @ 0 "" 2 11225 .LVL1835: 11226 .thumb ARM GAS /tmp/ccJrAs6S.s page 482 11227 .syntax unified 11228 .LBE1540: 11229 .LBE1561: 11230 .loc 31 190 0 11231 0158 029B ldr r3, [sp, #8] 11232 .LBB1562: 11233 015a D20B lsrs r2, r2, #15 11234 .LVL1836: 11235 .LBE1562: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11236 .loc 31 171 0 11237 015c 0328 cmp r0, #3 11238 .LBB1563: 11239 .loc 31 190 0 11240 015e 42EA4142 orr r2, r2, r1, lsl #17 11241 .syntax unified 11242 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 11243 0162 02F30F02 ssat r2, #16, r2 11244 @ 0 "" 2 11245 .LVL1837: 11246 .thumb 11247 .syntax unified 11248 .LBE1563: 11249 0166 5A80 strh r2, [r3, #2] @ movhi 11250 .LVL1838: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11251 .loc 31 171 0 11252 0168 00F28E83 bhi .L850 11253 .LVL1839: 11254 .L837: 11255 016c BAF1000F cmp r10, #0 11256 0170 00F09183 beq .L852 11257 .LVL1840: 11258 0174 009B ldr r3, [sp] 11259 0176 0233 adds r3, r3, #2 11260 0178 451C adds r5, r0, #1 11261 017a 0AF1FF31 add r1, r10, #-1 11262 017e 0293 str r3, [sp, #8] 11263 0180 04F1020C add ip, r4, #2 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11264 .loc 31 180 0 11265 0184 0028 cmp r0, #0 11266 0186 00F0A083 beq .L902 11267 .L783: 11268 .LVL1841: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11269 .loc 31 183 0 11270 018a 019A ldr r2, [sp, #4] 11271 018c B4F90060 ldrsh r6, [r4] 11272 0190 B2F90020 ldrsh r2, [r2] 11273 .LVL1842: 11274 .LBB1564: 11275 .LBB1541: 11276 .loc 6 2014 0 11277 0194 0023 movs r3, #0 11278 0196 1F46 mov r7, r3 11279 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 483 11280 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11281 0198 C2FBC637 smlald r3, r7, r2, r6 11282 @ 0 "" 2 11283 .thumb 11284 .syntax unified 11285 .LBE1541: 11286 .LBE1564: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11287 .loc 31 180 0 11288 019c 0128 cmp r0, #1 11289 .LBB1565: 11290 .LBB1542: 11291 .loc 6 2014 0 11292 019e 3A46 mov r2, r7 11293 .LVL1843: 11294 .LBE1542: 11295 .LBE1565: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11296 .loc 31 180 0 11297 01a0 00F04783 beq .L786 11298 .LVL1844: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11299 .loc 31 183 0 11300 01a4 019E ldr r6, [sp, #4] 11301 01a6 34F9027C ldrsh r7, [r4, #-2] 11302 01aa B6F90260 ldrsh r6, [r6, #2] 11303 .LVL1845: 11304 .LBB1566: 11305 .LBB1543: 11306 .loc 6 2014 0 11307 .syntax unified 11308 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11309 01ae C6FBC732 smlald r3, r2, r6, r7 11310 @ 0 "" 2 11311 .LVL1846: 11312 .thumb 11313 .syntax unified 11314 .LBE1543: 11315 .LBE1566: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11316 .loc 31 180 0 11317 01b2 0228 cmp r0, #2 11318 01b4 00F03D83 beq .L786 11319 .LVL1847: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11320 .loc 31 183 0 11321 01b8 0198 ldr r0, [sp, #4] 11322 01ba 34F9044C ldrsh r4, [r4, #-4] 11323 01be B0F90400 ldrsh r0, [r0, #4] 11324 .LVL1848: 11325 .LBB1567: 11326 .LBB1544: 11327 .loc 6 2014 0 11328 .syntax unified 11329 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11330 01c2 C0FBC432 smlald r3, r2, r0, r4 11331 @ 0 "" 2 ARM GAS /tmp/ccJrAs6S.s page 484 11332 .LVL1849: 11333 .thumb 11334 .syntax unified 11335 .LBE1544: 11336 .LBE1567: 11337 .LBB1568: 11338 .loc 31 190 0 11339 01c6 DB0B lsrs r3, r3, #15 11340 .LVL1850: 11341 01c8 43EA4243 orr r3, r3, r2, lsl #17 11342 .LBE1568: 11343 01cc 009A ldr r2, [sp] 11344 .LBB1569: 11345 .syntax unified 11346 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 11347 01ce 03F30F03 ssat r3, #16, r3 11348 @ 0 "" 2 11349 .LVL1851: 11350 .thumb 11351 .syntax unified 11352 .LBE1569: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11353 .loc 31 171 0 11354 01d2 032D cmp r5, #3 11355 .loc 31 190 0 11356 01d4 1380 strh r3, [r2] @ movhi 11357 .LVL1852: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11358 .loc 31 171 0 11359 01d6 00F25983 bhi .L849 11360 .LVL1853: 11361 .L838: 11362 01da 0029 cmp r1, #0 11363 01dc 00F0CD80 beq .L771 11364 .LVL1854: 11365 01e0 029B ldr r3, [sp, #8] 11366 01e2 0233 adds r3, r3, #2 11367 01e4 681C adds r0, r5, #1 11368 01e6 01F1FF3A add r10, r1, #-1 11369 01ea 0093 str r3, [sp] 11370 01ec 0CF10204 add r4, ip, #2 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11371 .loc 31 180 0 11372 01f0 002D cmp r5, #0 11373 01f2 00F07983 beq .L903 11374 .L788: 11375 .LVL1855: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11376 .loc 31 183 0 11377 01f6 019A ldr r2, [sp, #4] 11378 01f8 BCF90010 ldrsh r1, [ip] 11379 01fc B2F90020 ldrsh r2, [r2] 11380 .LVL1856: 11381 .LBB1570: 11382 .LBB1545: 11383 .loc 6 2014 0 11384 0200 0023 movs r3, #0 ARM GAS /tmp/ccJrAs6S.s page 485 11385 0202 1E46 mov r6, r3 11386 .syntax unified 11387 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11388 0204 C2FBC136 smlald r3, r6, r2, r1 11389 @ 0 "" 2 11390 .thumb 11391 .syntax unified 11392 .LBE1545: 11393 .LBE1570: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11394 .loc 31 180 0 11395 0208 012D cmp r5, #1 11396 .LBB1571: 11397 .LBB1546: 11398 .loc 6 2014 0 11399 020a 3246 mov r2, r6 11400 .LVL1857: 11401 .LBE1546: 11402 .LBE1571: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11403 .loc 31 180 0 11404 020c 00F05583 beq .L791 11405 .LVL1858: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11406 .loc 31 183 0 11407 0210 0199 ldr r1, [sp, #4] 11408 0212 3CF9026C ldrsh r6, [ip, #-2] 11409 0216 B1F90210 ldrsh r1, [r1, #2] 11410 .LVL1859: 11411 .LBB1572: 11412 .LBB1547: 11413 .loc 6 2014 0 11414 .syntax unified 11415 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11416 021a C1FBC632 smlald r3, r2, r1, r6 11417 @ 0 "" 2 11418 .LVL1860: 11419 .thumb 11420 .syntax unified 11421 .LBE1547: 11422 .LBE1572: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11423 .loc 31 180 0 11424 021e 022D cmp r5, #2 11425 0220 00F04B83 beq .L791 11426 .LVL1861: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11427 .loc 31 183 0 11428 0224 0199 ldr r1, [sp, #4] 11429 0226 3CF9045C ldrsh r5, [ip, #-4] 11430 022a B1F90410 ldrsh r1, [r1, #4] 11431 .LVL1862: 11432 .LBB1573: 11433 .LBB1548: 11434 .loc 6 2014 0 11435 .syntax unified 11436 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccJrAs6S.s page 486 11437 022e C1FBC532 smlald r3, r2, r1, r5 11438 @ 0 "" 2 11439 .LVL1863: 11440 .thumb 11441 .syntax unified 11442 .LBE1548: 11443 .LBE1573: 11444 .LBB1574: 11445 .loc 31 190 0 11446 0232 DB0B lsrs r3, r3, #15 11447 .LVL1864: 11448 0234 43EA4243 orr r3, r3, r2, lsl #17 11449 .LBE1574: 11450 0238 029A ldr r2, [sp, #8] 11451 .LBB1575: 11452 .syntax unified 11453 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 11454 023a 03F30F03 ssat r3, #16, r3 11455 @ 0 "" 2 11456 .LVL1865: 11457 .thumb 11458 .syntax unified 11459 .LBE1575: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11460 .loc 31 171 0 11461 023e 0328 cmp r0, #3 11462 .loc 31 190 0 11463 0240 1380 strh r3, [r2] @ movhi 11464 .LVL1866: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11465 .loc 31 171 0 11466 0242 00F22183 bhi .L850 11467 .LVL1867: 11468 .L839: 11469 0246 BAF1000F cmp r10, #0 11470 024a 00F02483 beq .L852 11471 .LVL1868: 11472 024e 009B ldr r3, [sp] 11473 0250 0233 adds r3, r3, #2 11474 0252 0AF1FF3A add r10, r10, #-1 11475 0256 451C adds r5, r0, #1 11476 0258 0293 str r3, [sp, #8] 11477 025a 04F1020C add ip, r4, #2 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11478 .loc 31 180 0 11479 025e 0028 cmp r0, #0 11480 0260 00F05583 beq .L793 11481 .L840: 11482 .LVL1869: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11483 .loc 31 183 0 11484 0264 019E ldr r6, [sp, #4] 11485 0266 B4F90010 ldrsh r1, [r4] 11486 026a B6F90020 ldrsh r2, [r6] 11487 .LVL1870: 11488 .LBB1576: 11489 .LBB1549: ARM GAS /tmp/ccJrAs6S.s page 487 11490 .loc 6 2014 0 11491 026e 0023 movs r3, #0 11492 0270 1F46 mov r7, r3 11493 .syntax unified 11494 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11495 0272 C2FBC137 smlald r3, r7, r2, r1 11496 @ 0 "" 2 11497 .thumb 11498 .syntax unified 11499 .LBE1549: 11500 .LBE1576: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11501 .loc 31 180 0 11502 0276 0128 cmp r0, #1 11503 .LBB1577: 11504 .LBB1550: 11505 .loc 6 2014 0 11506 0278 3A46 mov r2, r7 11507 .LVL1871: 11508 .LBE1550: 11509 .LBE1577: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11510 .loc 31 180 0 11511 027a 00F0E282 beq .L772 11512 .LVL1872: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11513 .loc 31 183 0 11514 027e B6F90210 ldrsh r1, [r6, #2] 11515 0282 34F9026C ldrsh r6, [r4, #-2] 11516 .LVL1873: 11517 .LBB1578: 11518 .LBB1551: 11519 .loc 6 2014 0 11520 .syntax unified 11521 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11522 0286 C1FBC632 smlald r3, r2, r1, r6 11523 @ 0 "" 2 11524 .LVL1874: 11525 .thumb 11526 .syntax unified 11527 .LBE1551: 11528 .LBE1578: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11529 .loc 31 180 0 11530 028a 0228 cmp r0, #2 11531 028c 00F0D982 beq .L772 11532 .LVL1875: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11533 .loc 31 183 0 11534 0290 0199 ldr r1, [sp, #4] 11535 0292 34F9040C ldrsh r0, [r4, #-4] 11536 0296 B1F90410 ldrsh r1, [r1, #4] 11537 .LVL1876: 11538 .LBB1579: 11539 .LBB1552: 11540 .loc 6 2014 0 11541 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 488 11542 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11543 029a C1FBC032 smlald r3, r2, r1, r0 11544 @ 0 "" 2 11545 .LVL1877: 11546 .thumb 11547 .syntax unified 11548 .LBE1552: 11549 .LBE1579: 11550 .LBB1580: 11551 .loc 31 190 0 11552 029e DB0B lsrs r3, r3, #15 11553 .LVL1878: 11554 02a0 43EA4243 orr r3, r3, r2, lsl #17 11555 .LBE1580: 11556 02a4 009A ldr r2, [sp] 11557 .LBB1581: 11558 .syntax unified 11559 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 11560 02a6 03F30F03 ssat r3, #16, r3 11561 @ 0 "" 2 11562 .LVL1879: 11563 .thumb 11564 .syntax unified 11565 .LBE1581: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11566 .loc 31 171 0 11567 02aa 032D cmp r5, #3 11568 .loc 31 190 0 11569 02ac 1380 strh r3, [r2] @ movhi 11570 .LVL1880: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11571 .loc 31 171 0 11572 02ae 64D9 bls .L771 11573 .LVL1881: 11574 02b0 029B ldr r3, [sp, #8] 11575 .LVL1882: 11576 02b2 0093 str r3, [sp] 11577 .LVL1883: 11578 02b4 6446 mov r4, ip 11579 .LVL1884: 11580 .L769: 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = ++pSrc2; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px = pIn1; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Increment MAC count */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** count++; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize1--; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* The second part of the stage starts here */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* The internal loop, over count, is unrolled by 4 */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* To, read the last two inputB samples using SIMD: 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ ARM GAS /tmp/ccJrAs6S.s page 489 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = py - 1; 11581 .loc 31 207 0 11582 02b6 A71E subs r7, r4, #2 11583 .LVL1885: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (blockSize1 > 0U) 11584 .loc 31 209 0 11585 02b8 BAF1000F cmp r10, #0 11586 02bc 00F0EB82 beq .L852 11587 .LVL1886: 11588 .L841: 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11589 .loc 31 153 0 11590 02c0 DDE900C8 ldrd ip, r8, [sp] 11591 02c4 05EB0A0E add lr, r5, r10 11592 02c8 CDF884B0 str fp, [sp, #132] 11593 .LVL1887: 11594 .L802: 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Accumulator is made zero for every iteration */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = 0; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k = count >> 2U; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** a second loop below computes MACs for the remaining 1 to 3 samples. */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (k > 0U) 11595 .loc 31 219 0 11596 02cc AE08 lsrs r6, r5, #2 11597 02ce 3946 mov r1, r7 11598 .LVL1888: 11599 02d0 00F09E80 beq .L853 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11600 .loc 31 212 0 11601 02d4 0023 movs r3, #0 11602 02d6 1A46 mov r2, r3 11603 .loc 31 219 0 11604 02d8 3846 mov r0, r7 11605 02da 4146 mov r1, r8 11606 .LVL1889: 11607 02dc 3446 mov r4, r6 11608 .LVL1890: 11609 .L798: 11610 .LBB1582: 11611 .LBB1583: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 11612 .loc 3 928 0 11613 02de D1F80090 ldr r9, [r1] @ unaligned 11614 .LVL1891: 11615 .LBE1583: 11616 .LBE1582: 11617 .LBB1584: 11618 .LBB1585: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 11619 .loc 3 948 0 11620 02e2 D0F800B0 ldr fp, [r0] @ unaligned ARM GAS /tmp/ccJrAs6S.s page 490 11621 .LVL1892: 11622 .LBE1585: 11623 .LBE1584: 11624 .LBB1586: 11625 .LBB1587: 2015:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 2016:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (o 2017:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 2018:Drivers/CMSIS/Include/cmsis_gcc.h **** 2019:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64); 2020:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2021:Drivers/CMSIS/Include/cmsis_gcc.h **** 2022:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) 2023:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2024:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{ 2025:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2]; 2026:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64; 2027:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr; 2028:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc; 2029:Drivers/CMSIS/Include/cmsis_gcc.h **** 2030:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */ 2031:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" ( 11626 .loc 6 2031 0 11627 .syntax unified 11628 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11629 02e6 C9FBDB32 smlaldx r3, r2, r9, fp 11630 @ 0 "" 2 11631 .LVL1893: 11632 .thumb 11633 .syntax unified 11634 .LBE1587: 11635 .LBE1586: 11636 .LBB1588: 11637 .LBB1589: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 11638 .loc 3 928 0 11639 02ea D1F80490 ldr r9, [r1, #4] @ unaligned 11640 .LVL1894: 11641 .LBE1589: 11642 .LBE1588: 11643 .LBB1590: 11644 .LBB1591: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 11645 .loc 3 948 0 11646 02ee 50F804BC ldr fp, [r0, #-4] @ unaligned 11647 02f2 0831 adds r1, r1, #8 11648 .LVL1895: 11649 02f4 0838 subs r0, r0, #8 11650 .LVL1896: 11651 .LBE1591: 11652 .LBE1590: 11653 .LBB1592: 11654 .LBB1593: 11655 .loc 6 2031 0 11656 .syntax unified 11657 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11658 02f6 C9FBDB32 smlaldx r3, r2, r9, fp ARM GAS /tmp/ccJrAs6S.s page 491 11659 @ 0 "" 2 11660 .LVL1897: 11661 .thumb 11662 .syntax unified 11663 .LBE1593: 11664 .LBE1592: 11665 .loc 31 219 0 11666 02fa 013C subs r4, r4, #1 11667 .LVL1898: 11668 02fc EFD1 bne .L798 11669 02fe C6EB4671 rsb r1, r6, r6, lsl #29 11670 .LVL1899: 11671 0302 07EBC101 add r1, r7, r1, lsl #3 11672 0306 08EBC606 add r6, r8, r6, lsl #3 11673 .LVL1900: 11674 .L797: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Perform the multiply-accumulate */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k--; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* For the next MAC operations, the pointer py is used without SIMD 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * So, py is incremented by 1 */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = py + 1U; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** No loop unrolling is used. */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k = count % 0x4U; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (k > 0U) 11675 .loc 31 239 0 11676 030a 15F00300 ands r0, r5, #3 11677 .LVL1901: 11678 030e 15D0 beq .L799 11679 .LVL1902: 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Perform the multiply-accumulates */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = __SMLALD(*px++, *py--, sum); 11680 .loc 31 242 0 11681 0310 B6F90040 ldrsh r4, [r6] 11682 .LVL1903: 11683 0314 B1F90290 ldrsh r9, [r1, #2] 11684 .LVL1904: 11685 .LBB1594: 11686 .LBB1595: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 11687 .loc 6 2014 0 11688 .syntax unified 11689 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11690 0318 C4FBC932 smlald r3, r2, r4, r9 11691 @ 0 "" 2 ARM GAS /tmp/ccJrAs6S.s page 492 11692 .LVL1905: 11693 .thumb 11694 .syntax unified 11695 .LBE1595: 11696 .LBE1594: 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11697 .loc 31 239 0 11698 031c 0128 cmp r0, #1 11699 031e 0DD0 beq .L799 11700 .LVL1906: 11701 .loc 31 242 0 11702 0320 B6F90240 ldrsh r4, [r6, #2] 11703 .LVL1907: 11704 0324 B1F90090 ldrsh r9, [r1] 11705 .LVL1908: 11706 .LBB1598: 11707 .LBB1596: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 11708 .loc 6 2014 0 11709 .syntax unified 11710 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11711 0328 C4FBC932 smlald r3, r2, r4, r9 11712 @ 0 "" 2 11713 .LVL1909: 11714 .thumb 11715 .syntax unified 11716 .LBE1596: 11717 .LBE1598: 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11718 .loc 31 239 0 11719 032c 0228 cmp r0, #2 11720 032e 05D0 beq .L799 11721 .LVL1910: 11722 .loc 31 242 0 11723 0330 B6F90400 ldrsh r0, [r6, #4] 11724 .LVL1911: 11725 0334 31F9021C ldrsh r1, [r1, #-2] 11726 .LVL1912: 11727 .LBB1599: 11728 .LBB1597: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 11729 .loc 6 2014 0 11730 .syntax unified 11731 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11732 0338 C0FBC132 smlald r3, r2, r0, r1 11733 @ 0 "" 2 11734 .LVL1913: 11735 .thumb 11736 .syntax unified 11737 .L799: 11738 .LBE1597: 11739 .LBE1599: 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k--; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 493 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = ++pSrc2 - 1U; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px = pIn1; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Increment MAC count */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** count++; 11740 .loc 31 256 0 11741 033c 0135 adds r5, r5, #1 11742 .LBB1600: 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11743 .loc 31 249 0 11744 033e DB0B lsrs r3, r3, #15 11745 .LVL1914: 11746 .LBE1600: 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11747 .loc 31 209 0 11748 0340 7545 cmp r5, lr 11749 .LBB1601: 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11750 .loc 31 249 0 11751 0342 43EA4243 orr r3, r3, r2, lsl #17 11752 0346 07F10207 add r7, r7, #2 11753 .syntax unified 11754 @ 249 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 11755 034a 03F30F03 ssat r3, #16, r3 11756 @ 0 "" 2 11757 .LVL1915: 11758 .thumb 11759 .syntax unified 11760 .LBE1601: 11761 034e 2CF8023B strh r3, [ip], #2 @ movhi 11762 .LVL1916: 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11763 .loc 31 209 0 11764 0352 BBD1 bne .L802 11765 0354 009B ldr r3, [sp] 11766 .LVL1917: 11767 0356 DDF884B0 ldr fp, [sp, #132] 11768 035a 03EB4A03 add r3, r3, r10, lsl #1 11769 035e 0293 str r3, [sp, #8] 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize1--; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* -------------------------- 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Initializations of stage2 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * ------------------------*/ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * .... 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** */ ARM GAS /tmp/ccJrAs6S.s page 494 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Working pointer of inputA */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) 11770 .loc 31 273 0 11771 0360 049B ldr r3, [sp, #16] 11772 0362 ABEB030B sub fp, fp, r3 11773 0366 BBF1000F cmp fp, #0 11774 036a 0CDA bge .L904 11775 .LVL1918: 11776 .L854: 11777 036c 019B ldr r3, [sp, #4] 11778 036e 1393 str r3, [sp, #76] 11779 0370 10E0 b .L803 11780 .LVL1919: 11781 .L767: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 11782 .loc 31 123 0 11783 0372 099B ldr r3, [sp, #36] 11784 0374 AAEB0303 sub r3, r10, r3 11785 0378 1293 str r3, [sp, #72] 11786 .LVL1920: 11787 .L771: 11788 .loc 31 273 0 11789 037a 049B ldr r3, [sp, #16] 11790 037c ABEB030B sub fp, fp, r3 11791 .LVL1921: 11792 0380 BBF1000F cmp fp, #0 11793 0384 F2DB blt .L854 11794 .LVL1922: 11795 .L904: 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pSrc1 = pIn1 + firstIndex - srcBLen + 1; 11796 .loc 31 275 0 11797 0386 039A ldr r2, [sp, #12] 11798 0388 A2EB030C sub ip, r2, r3 11799 038c 019B ldr r3, [sp, #4] 11800 038e 03EB4C03 add r3, r3, ip, lsl #1 11801 0392 1393 str r3, [sp, #76] 11802 .LVL1923: 11803 .L803: 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** else 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pSrc1 = pIn1; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px = pSrc1; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Working pointer of inputB */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pSrc2 = pIn2 + (srcBLen - 1U); 11804 .loc 31 284 0 11805 0394 049B ldr r3, [sp, #16] 11806 .LVL1924: 11807 0396 059A ldr r2, [sp, #20] 11808 0398 03F10040 add r0, r3, #-2147483648 11809 039c 0138 subs r0, r0, #1 11810 039e 02EB4004 add r4, r2, r0, lsl #1 11811 03a2 A21E subs r2, r4, #2 ARM GAS /tmp/ccJrAs6S.s page 495 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* count is the index by which the pointer pIn1 to be incremented */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** count = 0U; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* ------------------- 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Stage2 process 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * ------------------*/ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * So, to loop unroll over blockSize2, 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * srcBLen should be greater than or equal to 4 */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** if (srcBLen >= 4U) 11812 .loc 31 297 0 11813 03a4 032B cmp r3, #3 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 11814 .loc 31 284 0 11815 03a6 1494 str r4, [sp, #80] 11816 .LVL1925: 11817 03a8 0A92 str r2, [sp, #40] 11818 .loc 31 297 0 11819 03aa 35D8 bhi .L804 11820 .LVL1926: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blkCnt = ((uint32_t) blockSize2 >> 2U); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (blkCnt > 0U) 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = py - 1U; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Set all accumulators to zero */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc0 = 0; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc1 = 0; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc2 = 0; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc3 = 0; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* read x[0], x[1] samples */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** x0 = read_q15x2 ((q15_t *) px); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* read x[1], x[2] samples */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** x1 = read_q15x2 ((q15_t *) px + 1); 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px += 2U; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k = srcBLen >> 2U; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** do 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read the last two inputB samples using SIMD: 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * y[srcBLen - 1] and y[srcBLen - 2] */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** c0 = read_q15x2_da ((q15_t **) &py); 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ ARM GAS /tmp/ccJrAs6S.s page 496 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc0 = __SMLALDX(x0, c0, acc0); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc1 = __SMLALDX(x1, c0, acc1); 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read x[2], x[3] */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** x2 = read_q15x2 ((q15_t *) px); 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read x[3], x[4] */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** x3 = read_q15x2 ((q15_t *) px + 1); 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc2 = __SMLALDX(x2, c0, acc2); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc3 = __SMLALDX(x3, c0, acc3); 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read y[srcBLen - 3] and y[srcBLen - 4] */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** c0 = read_q15x2_da ((q15_t **) &py); 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc0 = __SMLALDX(x2, c0, acc0); 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc1 = __SMLALDX(x3, c0, acc1); 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read x[4], x[5] */ 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** x0 = read_q15x2 ((q15_t *) px + 2); 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read x[5], x[6] */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** x1 = read_q15x2 ((q15_t *) px + 3); 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px += 4U; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc2 = __SMLALDX(x0, c0, acc2); 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc3 = __SMLALDX(x1, c0, acc3); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } while (--k); 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* For the next MAC operations, SIMD is not used 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * So, the 16 bit pointer if inputB, py is updated */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** ** No loop unrolling is used. */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k = srcBLen % 0x4U; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** if (k == 1U) 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read y[srcBLen - 5] */ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** c0 = *(py+1); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** c0 = c0 << 16U; 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #else 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** c0 = c0 & 0x0000FFFF; 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ ARM GAS /tmp/ccJrAs6S.s page 497 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read x[7] */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** x3 = read_q15x2 ((q15_t *) px); 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px++; 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Perform the multiply-accumulate */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc0 = __SMLALD (x0, c0, acc0); 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc1 = __SMLALD (x1, c0, acc1); 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc2 = __SMLALDX(x1, c0, acc2); 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc3 = __SMLALDX(x3, c0, acc3); 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** if (k == 2U) 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read y[srcBLen - 5], y[srcBLen - 6] */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** c0 = read_q15x2 ((q15_t *) py); 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read x[7], x[8] */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** x3 = read_q15x2 ((q15_t *) px); 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read x[9] */ 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** x2 = read_q15x2 ((q15_t *) px + 1); 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px += 2U; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Perform the multiply-accumulate */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc0 = __SMLALDX(x0, c0, acc0); 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc1 = __SMLALDX(x1, c0, acc1); 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc2 = __SMLALDX(x3, c0, acc2); 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc3 = __SMLALDX(x2, c0, acc3); 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** if (k == 3U) 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read y[srcBLen - 5], y[srcBLen - 6] */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** c0 = read_q15x2 ((q15_t *) py); 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read x[7], x[8] */ 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** x3 = read_q15x2 ((q15_t *) px); 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read x[9] */ 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** x2 = read_q15x2 ((q15_t *) px + 1); 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Perform the multiply-accumulate */ 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc0 = __SMLALDX(x0, c0, acc0); 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc1 = __SMLALDX(x1, c0, acc1); 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc2 = __SMLALDX(x3, c0, acc2); 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc3 = __SMLALDX(x2, c0, acc3); 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** c0 = *(py-1); 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** c0 = c0 << 16U; 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #else 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** c0 = c0 & 0x0000FFFF; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Read x[10] */ 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** x3 = read_q15x2 ((q15_t *) px + 2); ARM GAS /tmp/ccJrAs6S.s page 498 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px += 3U; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Perform the multiply-accumulates */ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc0 = __SMLALDX(x1, c0, acc0); 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc1 = __SMLALD (x2, c0, acc1); 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc2 = __SMLALDX(x2, c0, acc2); 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc3 = __SMLALDX(x3, c0, acc3); 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Store the results in the accumulators in the destination buffer. */ 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #else 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Increment the pointer pIn1 index, count by 4 */ 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** count += 4U; 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px = pSrc1 + count; 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blkCnt--; 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** No loop unrolling is used. */ 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blkCnt = (uint32_t) blockSize2 % 0x4U; 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (blkCnt > 0U) 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Accumulator is made zero for every iteration */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = 0; 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k = srcBLen >> 2U; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** a second loop below computes MACs for the remaining 1 to 3 samples. */ 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (k > 0U) 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Perform the multiply-accumulates */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k--; 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** ** No loop unrolling is used. */ ARM GAS /tmp/ccJrAs6S.s page 499 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k = srcBLen % 0x4U; 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (k > 0U) 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Perform the multiply-accumulate */ 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k--; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** *pOut++ = (q15_t) (__SSAT(sum >> 15, 16)); 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Increment the pointer pIn1 index, count by 1 */ 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** count++; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px = pSrc1 + count; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blkCnt--; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** else 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* If the srcBLen is not a multiple of 4, 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * the blockSize2 loop cannot be unrolled by 4 */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blkCnt = (uint32_t) blockSize2; 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (blkCnt > 0U) 11821 .loc 31 534 0 11822 03ac 129A ldr r2, [sp, #72] 11823 03ae 002A cmp r2, #0 11824 03b0 00F0BD82 beq .L855 11825 03b4 002B cmp r3, #0 11826 03b6 00F0AF82 beq .L806 11827 03ba 022B cmp r3, #2 11828 03bc 00F0BE82 beq .L807 11829 03c0 012B cmp r3, #1 11830 03c2 00F04682 beq .L808 11831 03c6 029D ldr r5, [sp, #8] 11832 03c8 DDF84CC0 ldr ip, [sp, #76] 11833 03cc 05EB4201 add r1, r5, r2, lsl #1 11834 03d0 0E46 mov r6, r1 11835 .LVL1927: 11836 .L809: 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Accumulator is made zero for every iteration */ 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = 0; 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* srcBLen number of MACS should be performed */ 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k = srcBLen; 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (k > 0U) 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 500 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Perform the multiply-accumulate */ 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 11837 .loc 31 545 0 11838 03d2 BCF90070 ldrsh r7, [ip] 11839 .LVL1928: 11840 03d6 34F8023C ldrh r3, [r4, #-2] 11841 03da 3CF8022F ldrh r2, [ip, #2]! 11842 .LVL1929: 11843 03de 2188 ldrh r1, [r4] 11844 03e0 BCF80200 ldrh r0, [ip, #2] 11845 03e4 12FB03F2 smulbb r2, r2, r3 11846 03e8 D317 asrs r3, r2, #31 11847 03ea C7FB8123 smlalbb r2, r3, r7, r1 11848 .LVL1930: 11849 03ee 34F8041C ldrh r1, [r4, #-4] 11850 03f2 C0FB8123 smlalbb r2, r3, r0, r1 11851 .LVL1931: 11852 03f6 1946 mov r1, r3 11853 .LBB1602: 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement the loop counter */ 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k--; 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** *pOut++ = (q15_t) (__SSAT(sum >> 15, 16)); 11854 .loc 31 552 0 11855 03f8 D30B lsrs r3, r2, #15 11856 03fa 43EA4143 orr r3, r3, r1, lsl #17 11857 .syntax unified 11858 @ 552 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 11859 03fe 03F30F03 ssat r3, #16, r3 11860 @ 0 "" 2 11861 .LVL1932: 11862 .thumb 11863 .syntax unified 11864 .LBE1602: 11865 0402 25F8023B strh r3, [r5], #2 @ movhi 11866 .LVL1933: 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11867 .loc 31 534 0 11868 0406 B542 cmp r5, r6 11869 0408 E3D1 bne .L809 11870 .LVL1934: 11871 .L898: 11872 040a 3146 mov r1, r6 11873 040c 049B ldr r3, [sp, #16] 11874 .LVL1935: 11875 040e 18E1 b .L805 11876 .LVL1936: 11877 .L853: 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11878 .loc 31 212 0 11879 0410 3346 mov r3, r6 11880 0412 3246 mov r2, r6 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11881 .loc 31 219 0 ARM GAS /tmp/ccJrAs6S.s page 501 11882 0414 4646 mov r6, r8 11883 .LVL1937: 11884 0416 78E7 b .L797 11885 .LVL1938: 11886 .L804: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 11887 .loc 31 302 0 11888 0418 129B ldr r3, [sp, #72] 11889 041a 9908 lsrs r1, r3, #2 11890 .LVL1939: 11891 041c 1591 str r1, [sp, #84] 11892 041e 00F08A82 beq .L856 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11893 .loc 31 321 0 11894 0422 0498 ldr r0, [sp, #16] 11895 0424 8308 lsrs r3, r0, #2 11896 0426 1446 mov r4, r2 11897 .LVL1940: 11898 0428 C3EB4372 rsb r2, r3, r3, lsl #29 11899 042c 04EBC202 add r2, r4, r2, lsl #3 11900 0430 0832 adds r2, r2, #8 11901 0432 0F93 str r3, [sp, #60] 11902 0434 DB00 lsls r3, r3, #3 11903 0436 0E92 str r2, [sp, #56] 11904 0438 1A1D adds r2, r3, #4 11905 043a 043B subs r3, r3, #4 11906 043c 1093 str r3, [sp, #64] 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11907 .loc 31 378 0 11908 043e 00F00303 and r3, r0, #3 11909 0442 0793 str r3, [sp, #28] 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11910 .loc 31 281 0 11911 0444 139B ldr r3, [sp, #76] 11912 0446 0093 str r3, [sp] 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11913 .loc 31 378 0 11914 0448 029B ldr r3, [sp, #8] 11915 044a 1192 str r2, [sp, #68] 11916 044c CDE90531 strd r3, r1, [sp, #20] 11917 .LVL1941: 11918 .L818: 11919 .LBB1603: 11920 .LBB1604: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 11921 .loc 3 909 0 11922 0450 009F ldr r7, [sp] 11923 .LVL1942: 11924 .LBE1604: 11925 .LBE1603: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11926 .loc 31 304 0 11927 0452 DDF82890 ldr r9, [sp, #40] 11928 .LBB1606: 11929 .LBB1605: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 11930 .loc 3 909 0 ARM GAS /tmp/ccJrAs6S.s page 502 11931 0456 3C68 ldr r4, [r7] @ unaligned 11932 .LBE1605: 11933 .LBE1606: 11934 .LBB1607: 11935 .LBB1608: 11936 0458 D7F802E0 ldr lr, [r7, #2] @ unaligned 11937 .LVL1943: 11938 .LBE1608: 11939 .LBE1607: 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11940 .loc 31 321 0 11941 045c DDF83CA0 ldr r10, [sp, #60] 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 11942 .loc 31 310 0 11943 0460 0023 movs r3, #0 11944 0462 9B46 mov fp, r3 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc3 = 0; 11945 .loc 31 309 0 11946 0464 1A46 mov r2, r3 11947 0466 1846 mov r0, r3 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc2 = 0; 11948 .loc 31 308 0 11949 0468 1D46 mov r5, r3 11950 046a 9846 mov r8, r3 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc1 = 0; 11951 .loc 31 307 0 11952 046c 1946 mov r1, r3 11953 046e 1E46 mov r6, r3 11954 0470 07F1040C add ip, r7, #4 11955 .LVL1944: 11956 .L814: 11957 .LBB1609: 11958 .LBB1610: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 11959 .loc 3 948 0 discriminator 1 11960 0474 D9F80070 ldr r7, [r9] @ unaligned 11961 .LVL1945: 11962 .LBE1610: 11963 .LBE1609: 11964 .LBB1611: 11965 .LBB1612: 11966 .loc 6 2031 0 discriminator 1 11967 .syntax unified 11968 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11969 0478 C4FBD716 smlaldx r1, r6, r4, r7 11970 @ 0 "" 2 11971 .LVL1946: 11972 .thumb 11973 .syntax unified 11974 .LBE1612: 11975 .LBE1611: 11976 .LBB1613: 11977 .LBB1614: 11978 .syntax unified 11979 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 11980 047c CEFBD758 smlaldx r5, r8, lr, r7 11981 @ 0 "" 2 ARM GAS /tmp/ccJrAs6S.s page 503 11982 .LVL1947: 11983 .thumb 11984 .syntax unified 11985 .LBE1614: 11986 .LBE1613: 11987 .LBB1615: 11988 .LBB1616: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 11989 .loc 3 909 0 discriminator 1 11990 0480 DCF800E0 ldr lr, [ip] @ unaligned 11991 .LVL1948: 11992 .LBE1616: 11993 .LBE1615: 11994 .LBB1617: 11995 .LBB1618: 11996 0484 DCF80240 ldr r4, [ip, #2] @ unaligned 11997 .LVL1949: 11998 .LBE1618: 11999 .LBE1617: 12000 .LBB1619: 12001 .LBB1620: 12002 .loc 6 2031 0 discriminator 1 12003 .syntax unified 12004 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12005 0488 CEFBD720 smlaldx r2, r0, lr, r7 12006 @ 0 "" 2 12007 .LVL1950: 12008 .thumb 12009 .syntax unified 12010 .LBE1620: 12011 .LBE1619: 12012 .LBB1621: 12013 .LBB1622: 12014 .syntax unified 12015 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12016 048c C4FBD73B smlaldx r3, fp, r4, r7 12017 @ 0 "" 2 12018 .LVL1951: 12019 .thumb 12020 .syntax unified 12021 .LBE1622: 12022 .LBE1621: 12023 .LBB1623: 12024 .LBB1624: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12025 .loc 3 948 0 discriminator 1 12026 0490 59F8047C ldr r7, [r9, #-4] @ unaligned 12027 .LVL1952: 12028 0494 A9F10809 sub r9, r9, #8 12029 .LVL1953: 12030 .LBE1624: 12031 .LBE1623: 12032 .LBB1625: 12033 .LBB1626: 12034 .loc 6 2031 0 discriminator 1 12035 .syntax unified 12036 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccJrAs6S.s page 504 12037 0498 CEFBD716 smlaldx r1, r6, lr, r7 12038 @ 0 "" 2 12039 .LVL1954: 12040 .thumb 12041 .syntax unified 12042 .LBE1626: 12043 .LBE1625: 12044 .LBB1627: 12045 .LBB1628: 12046 .syntax unified 12047 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12048 049c C4FBD758 smlaldx r5, r8, r4, r7 12049 @ 0 "" 2 12050 .LVL1955: 12051 .thumb 12052 .syntax unified 12053 .LBE1628: 12054 .LBE1627: 12055 .LBB1629: 12056 .LBB1630: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12057 .loc 3 909 0 discriminator 1 12058 04a0 DCF80440 ldr r4, [ip, #4] @ unaligned 12059 .LVL1956: 12060 .LBE1630: 12061 .LBE1629: 12062 .LBB1631: 12063 .LBB1632: 12064 04a4 DCF806E0 ldr lr, [ip, #6] @ unaligned 12065 .LVL1957: 12066 .LBE1632: 12067 .LBE1631: 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12068 .loc 31 363 0 discriminator 1 12069 04a8 0CF1080C add ip, ip, #8 12070 .LVL1958: 12071 .LBB1633: 12072 .LBB1634: 12073 .loc 6 2031 0 discriminator 1 12074 .syntax unified 12075 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12076 04ac C4FBD720 smlaldx r2, r0, r4, r7 12077 @ 0 "" 2 12078 .LVL1959: 12079 .thumb 12080 .syntax unified 12081 .LBE1634: 12082 .LBE1633: 12083 .LBB1635: 12084 .LBB1636: 12085 .syntax unified 12086 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12087 04b0 CEFBD73B smlaldx r3, fp, lr, r7 12088 @ 0 "" 2 12089 .LVL1960: 12090 .thumb 12091 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 505 12092 .LBE1636: 12093 .LBE1635: 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12094 .loc 31 371 0 discriminator 1 12095 04b4 BAF1010A subs r10, r10, #1 12096 .LVL1961: 12097 04b8 DCD1 bne .L814 12098 04ba 009F ldr r7, [sp] 12099 04bc 0894 str r4, [sp, #32] 12100 04be 119C ldr r4, [sp, #68] 12101 04c0 3C19 adds r4, r7, r4 12102 04c2 0394 str r4, [sp, #12] 12103 04c4 109C ldr r4, [sp, #64] 12104 04c6 07EB040C add ip, r7, r4 12105 .LVL1962: 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12106 .loc 31 380 0 12107 04ca 079C ldr r4, [sp, #28] 12108 04cc 012C cmp r4, #1 12109 04ce 00F04381 beq .L905 12110 .LVL1963: 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12111 .loc 31 401 0 12112 04d2 022C cmp r4, #2 12113 04d4 40F05281 bne .L817 12114 .LVL1964: 12115 .LBB1637: 12116 .LBB1638: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12117 .loc 3 909 0 12118 04d8 0E9C ldr r4, [sp, #56] 12119 04da 54F808CC ldr ip, [r4, #-8] @ unaligned 12120 .LVL1965: 12121 .LBE1638: 12122 .LBE1637: 12123 .LBB1639: 12124 .LBB1640: 12125 04de 039C ldr r4, [sp, #12] 12126 04e0 D4F80090 ldr r9, [r4] @ unaligned 12127 .LVL1966: 12128 .LBE1640: 12129 .LBE1639: 12130 .LBB1641: 12131 .LBB1642: 12132 04e4 D4F80270 ldr r7, [r4, #2] @ unaligned 12133 .LVL1967: 12134 .LBE1642: 12135 .LBE1641: 12136 .LBB1643: 12137 .LBB1644: 12138 .loc 6 2031 0 12139 04e8 089C ldr r4, [sp, #32] 12140 .syntax unified 12141 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12142 04ea C4FBDC16 smlaldx r1, r6, r4, ip 12143 @ 0 "" 2 12144 .LVL1968: ARM GAS /tmp/ccJrAs6S.s page 506 12145 .thumb 12146 .syntax unified 12147 .LBE1644: 12148 .LBE1643: 12149 .LBB1645: 12150 .LBB1646: 12151 04ee 4446 mov r4, r8 12152 .syntax unified 12153 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12154 04f0 CEFBDC54 smlaldx r5, r4, lr, ip 12155 @ 0 "" 2 12156 .LVL1969: 12157 .thumb 12158 .syntax unified 12159 .LBE1646: 12160 .LBE1645: 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc2 = __SMLALDX(x3, c0, acc2); 12161 .loc 31 415 0 12162 04f4 A046 mov r8, r4 12163 .LVL1970: 12164 .LBB1647: 12165 .LBB1648: 12166 .loc 6 2031 0 12167 .syntax unified 12168 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12169 04f6 C9FBDC20 smlaldx r2, r0, r9, ip 12170 @ 0 "" 2 12171 .LVL1971: 12172 .thumb 12173 .syntax unified 12174 .LBE1648: 12175 .LBE1647: 12176 .LBB1649: 12177 .LBB1650: 12178 .syntax unified 12179 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12180 04fa C7FBDC3B smlaldx r3, fp, r7, ip 12181 @ 0 "" 2 12182 .LVL1972: 12183 .thumb 12184 .syntax unified 12185 .L816: 12186 .LBE1650: 12187 .LBE1649: 12188 .LBB1651: 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #else 12189 .loc 31 458 0 12190 04fe D20B lsrs r2, r2, #15 12191 .LVL1973: 12192 .LBE1651: 12193 .LBB1652: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 12194 .loc 31 457 0 12195 0500 C90B lsrs r1, r1, #15 12196 .LVL1974: 12197 .LBE1652: 12198 .LBB1653: ARM GAS /tmp/ccJrAs6S.s page 507 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #else 12199 .loc 31 458 0 12200 0502 42EA4042 orr r2, r2, r0, lsl #17 12201 .LBE1653: 12202 .LBB1654: 12203 0506 DB0B lsrs r3, r3, #15 12204 .LVL1975: 12205 .LBE1654: 12206 .LBB1655: 12207 .syntax unified 12208 @ 458 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 12209 0508 02F30F02 ssat r2, #16, r2 12210 @ 0 "" 2 12211 .thumb 12212 .syntax unified 12213 .LBE1655: 12214 050c 92B2 uxth r2, r2 12215 .LBB1656: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 12216 .loc 31 457 0 12217 050e 41EA4641 orr r1, r1, r6, lsl #17 12218 .LBE1656: 12219 .LBB1657: 12220 0512 ED0B lsrs r5, r5, #15 12221 .LVL1976: 12222 .LBE1657: 12223 .LBB1658: 12224 .syntax unified 12225 @ 457 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 12226 0514 01F30F01 ssat r1, #16, r1 12227 @ 0 "" 2 12228 .LVL1977: 12229 .thumb 12230 .syntax unified 12231 .LBE1658: 12232 .LBB1659: 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #else 12233 .loc 31 458 0 12234 0518 43EA4B43 orr r3, r3, fp, lsl #17 12235 .LBE1659: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 12236 .loc 31 457 0 12237 051c 89B2 uxth r1, r1 12238 .LVL1978: 12239 .LBB1660: 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #else 12240 .loc 31 458 0 12241 .syntax unified 12242 @ 458 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 12243 051e 03F30F03 ssat r3, #16, r3 12244 @ 0 "" 2 12245 .thumb 12246 .syntax unified 12247 .LBE1660: 12248 0522 42EA0342 orr r2, r2, r3, lsl #16 12249 .LBB1661: 12250 .LBB1662: ARM GAS /tmp/ccJrAs6S.s page 508 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12251 .loc 3 969 0 12252 0526 059B ldr r3, [sp, #20] 12253 .LBE1662: 12254 .LBE1661: 12255 .LBB1664: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 12256 .loc 31 457 0 12257 0528 45EA4845 orr r5, r5, r8, lsl #17 12258 .syntax unified 12259 @ 457 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 12260 052c 05F30F05 ssat r5, #16, r5 12261 @ 0 "" 2 12262 .LVL1979: 12263 .thumb 12264 .syntax unified 12265 .LBE1664: 12266 0530 41EA0541 orr r1, r1, r5, lsl #16 12267 .LBB1665: 12268 .LBB1666: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12269 .loc 3 969 0 12270 0534 5A60 str r2, [r3, #4] @ unaligned 12271 .LBE1666: 12272 .LBE1665: 12273 .LBB1667: 12274 .LBB1663: 12275 0536 1960 str r1, [r3] @ unaligned 12276 .LVL1980: 12277 0538 0833 adds r3, r3, #8 12278 .LVL1981: 12279 .LBE1663: 12280 .LBE1667: 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 12281 .loc 31 468 0 12282 053a 009A ldr r2, [sp] 12283 053c 0593 str r3, [sp, #20] 12284 .LVL1982: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12285 .loc 31 302 0 12286 053e 069B ldr r3, [sp, #24] 12287 .LVL1983: 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 12288 .loc 31 468 0 12289 0540 0832 adds r2, r2, #8 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12290 .loc 31 302 0 12291 0542 013B subs r3, r3, #1 12292 .LVL1984: 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 12293 .loc 31 468 0 12294 0544 0092 str r2, [sp] 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12295 .loc 31 302 0 12296 0546 0693 str r3, [sp, #24] 12297 0548 82D1 bne .L818 12298 054a 159B ldr r3, [sp, #84] ARM GAS /tmp/ccJrAs6S.s page 509 12299 .LVL1985: 12300 054c 029A ldr r2, [sp, #8] 12301 054e DE00 lsls r6, r3, #3 12302 0550 3244 add r2, r2, r6 12303 0552 0292 str r2, [sp, #8] 12304 0554 139A ldr r2, [sp, #76] 12305 0556 4FEA830C lsl ip, r3, #2 12306 055a 129B ldr r3, [sp, #72] 12307 055c 1644 add r6, r6, r2 12308 .LVL1986: 12309 .L813: 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12310 .loc 31 479 0 12311 055e 13F00301 ands r1, r3, #3 12312 0562 00F0D181 beq .L857 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12313 .loc 31 485 0 12314 0566 049B ldr r3, [sp, #16] 12315 0568 149A ldr r2, [sp, #80] 12316 056a 029C ldr r4, [sp, #8] 12317 056c 1398 ldr r0, [sp, #76] 12318 056e 4FEA930A lsr r10, r3, #2 12319 0572 0AF1005B add fp, r10, #536870912 12320 0576 CAEB4A77 rsb r7, r10, r10, lsl #29 12321 057a 0BF1FF3B add fp, fp, #-1 12322 057e 4FEACB0B lsl fp, fp, #3 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12323 .loc 31 503 0 12324 0582 03F0030E and lr, r3, #3 12325 0586 0CF1010C add ip, ip, #1 12326 .LVL1987: 12327 058a 02EBC707 add r7, r2, r7, lsl #3 12328 058e 04EB4101 add r1, r4, r1, lsl #1 12329 0592 A2F10809 sub r9, r2, #8 12330 0596 00EB4C0C add ip, r0, ip, lsl #1 12331 .LVL1988: 12332 059a CDF80CB0 str fp, [sp, #12] 12333 059e 7046 mov r0, lr 12334 05a0 D346 mov fp, r10 12335 05a2 0837 adds r7, r7, #8 12336 05a4 8846 mov r8, r1 12337 05a6 A646 mov lr, r4 12338 05a8 CA46 mov r10, r9 12339 .LVL1989: 12340 .L821: 12341 05aa 06F10802 add r2, r6, #8 12342 05ae 5346 mov r3, r10 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12343 .loc 31 485 0 12344 05b0 5946 mov r1, fp 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12345 .loc 31 482 0 12346 05b2 0024 movs r4, #0 12347 05b4 0025 movs r5, #0 12348 05b6 E146 mov r9, ip 12349 05b8 0090 str r0, [sp] 12350 05ba 0296 str r6, [sp, #8] ARM GAS /tmp/ccJrAs6S.s page 510 12351 .LVL1990: 12352 .L819: 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 12353 .loc 31 492 0 12354 05bc B3F808C0 ldrh ip, [r3, #8] 12355 05c0 32F8080C ldrh r0, [r2, #-8] 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 12356 .loc 31 494 0 12357 05c4 9E88 ldrh r6, [r3, #4] 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 12358 .loc 31 492 0 12359 05c6 C0FB8C45 smlalbb r4, r5, r0, ip 12360 .LVL1991: 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 12361 .loc 31 493 0 12362 05ca 32F8060C ldrh r0, [r2, #-6] 12363 05ce B3F806C0 ldrh ip, [r3, #6] 12364 05d2 C0FB8C45 smlalbb r4, r5, r0, ip 12365 .LVL1992: 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 12366 .loc 31 494 0 12367 05d6 32F8040C ldrh r0, [r2, #-4] 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12368 .loc 31 495 0 12369 05da 32F802CC ldrh ip, [r2, #-2] 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 12370 .loc 31 494 0 12371 05de C0FB8645 smlalbb r4, r5, r0, r6 12372 .LVL1993: 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12373 .loc 31 495 0 12374 05e2 5888 ldrh r0, [r3, #2] 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12375 .loc 31 489 0 12376 05e4 0139 subs r1, r1, #1 12377 .LVL1994: 12378 05e6 02F10802 add r2, r2, #8 12379 .LVL1995: 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12380 .loc 31 495 0 12381 05ea CCFB8045 smlalbb r4, r5, ip, r0 12382 .LVL1996: 12383 05ee A3F10803 sub r3, r3, #8 12384 .LVL1997: 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12385 .loc 31 489 0 12386 05f2 E3D1 bne .L819 12387 05f4 DDE90263 ldrd r6, r3, [sp, #8] 12388 .LVL1998: 12389 05f8 0098 ldr r0, [sp] 12390 05fa CC46 mov ip, r9 12391 05fc 1E44 add r6, r6, r3 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12392 .loc 31 505 0 12393 05fe 90B1 cbz r0, .L820 12394 .LVL1999: 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 511 12395 .loc 31 508 0 12396 0600 3289 ldrh r2, [r6, #8] 12397 .LVL2000: 12398 0602 37F8083C ldrh r3, [r7, #-8] 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12399 .loc 31 505 0 12400 0606 0128 cmp r0, #1 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12401 .loc 31 508 0 12402 0608 C2FB8345 smlalbb r4, r5, r2, r3 12403 .LVL2001: 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12404 .loc 31 505 0 12405 060c 0BD0 beq .L820 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12406 .loc 31 508 0 12407 060e 7289 ldrh r2, [r6, #10] 12408 0610 37F80A3C ldrh r3, [r7, #-10] 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12409 .loc 31 505 0 12410 0614 0228 cmp r0, #2 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12411 .loc 31 508 0 12412 0616 C2FB8345 smlalbb r4, r5, r2, r3 12413 .LVL2002: 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12414 .loc 31 505 0 12415 061a 04D0 beq .L820 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12416 .loc 31 508 0 12417 061c B289 ldrh r2, [r6, #12] 12418 061e 37F80C3C ldrh r3, [r7, #-12] 12419 0622 C2FB8345 smlalbb r4, r5, r2, r3 12420 .LVL2003: 12421 .L820: 12422 .LBB1668: 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12423 .loc 31 515 0 12424 0626 E30B lsrs r3, r4, #15 12425 0628 43EA4543 orr r3, r3, r5, lsl #17 12426 .syntax unified 12427 @ 515 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 12428 062c 03F30F03 ssat r3, #16, r3 12429 @ 0 "" 2 12430 .LVL2004: 12431 .thumb 12432 .syntax unified 12433 .LBE1668: 12434 0630 2EF8023B strh r3, [lr], #2 @ movhi 12435 .LVL2005: 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12436 .loc 31 479 0 12437 0634 C645 cmp lr, r8 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 12438 .loc 31 521 0 12439 0636 6646 mov r6, ip 12440 .LVL2006: ARM GAS /tmp/ccJrAs6S.s page 512 12441 0638 0CF1020C add ip, ip, #2 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12442 .loc 31 479 0 12443 063c B5D1 bne .L821 12444 063e 049B ldr r3, [sp, #16] 12445 .LVL2007: 12446 0640 4146 mov r1, r8 12447 .LVL2008: 12448 .L805: 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Increment the MAC count */ 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** count++; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px = pSrc1 + count; 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement the loop counter */ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blkCnt--; 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* -------------------------- 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Initializations of stage3 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * -------------------------*/ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[src 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[src 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * .... 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * sum += x[srcALen-1] * y[srcBLen-1] 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** */ 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** The count variable holds the number of MAC operations performed */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** count = srcBLen - 1U; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Working pointer of inputA */ 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); 12449 .loc 31 583 0 12450 0642 0C9F ldr r7, [sp, #48] 12451 0644 0137 adds r7, r7, #1 12452 0646 FF1A subs r7, r7, r3 12453 0648 019B ldr r3, [sp, #4] 12454 064a 03EB4707 add r7, r3, r7, lsl #1 12455 .LVL2009: 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px = pSrc1; 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Working pointer of inputB */ 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pSrc2 = pIn2 + (srcBLen - 1U); 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pIn2 = pSrc2 - 1U; 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pIn2; 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* ------------------- 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * Stage3 process 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * ------------------*/ ARM GAS /tmp/ccJrAs6S.s page 513 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* For loop unrolling by 4, this stage is divided into two. */ 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* First part of this stage computes the MAC operations greater than 4 */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Second part of this stage computes the MAC operations less than or equal to 4 */ 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* The first part of the stage starts here */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** j = count >> 2U; 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while ((j > 0U) && (blockSize3 > 0U)) 12456 .loc 31 602 0 12457 064e 0B9B ldr r3, [sp, #44] 12458 0650 9E08 lsrs r6, r3, #2 12459 .LVL2010: 12460 0652 00F06E81 beq .L858 12461 0656 099B ldr r3, [sp, #36] 12462 0658 002B cmp r3, #0 12463 065a 79D0 beq .L830 12464 065c 8846 mov r8, r1 12465 065e 09A9 add r1, sp, #36 12466 .LVL2011: 12467 0660 07EB460C add ip, r7, r6, lsl #1 12468 0664 91E80242 ldm r1, {r1, r9, lr} 12469 .LVL2012: 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Accumulator is made zero for every iteration */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = 0; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k = count >> 2U; 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (k > 0U) 12470 .loc 31 612 0 12471 0668 002E cmp r6, #0 12472 066a 46D0 beq .L859 12473 .LVL2013: 12474 .L907: 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12475 .loc 31 605 0 12476 066c 0023 movs r3, #0 12477 066e 1A46 mov r2, r3 12478 .loc 31 612 0 12479 0670 4C46 mov r4, r9 12480 0672 3846 mov r0, r7 12481 0674 3546 mov r5, r6 12482 .LVL2014: 12483 .L825: 12484 .LBB1669: 12485 .LBB1670: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12486 .loc 3 928 0 12487 0676 D0F800A0 ldr r10, [r0] @ unaligned 12488 .LVL2015: 12489 .LBE1670: 12490 .LBE1669: 12491 .LBB1671: ARM GAS /tmp/ccJrAs6S.s page 514 12492 .LBB1672: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12493 .loc 3 948 0 12494 067a D4F800B0 ldr fp, [r4] @ unaligned 12495 .LVL2016: 12496 .LBE1672: 12497 .LBE1671: 12498 .LBB1673: 12499 .LBB1674: 12500 .loc 6 2031 0 12501 .syntax unified 12502 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12503 067e CAFBDB32 smlaldx r3, r2, r10, fp 12504 @ 0 "" 2 12505 .LVL2017: 12506 .thumb 12507 .syntax unified 12508 .LBE1674: 12509 .LBE1673: 12510 .LBB1675: 12511 .LBB1676: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12512 .loc 3 928 0 12513 0682 D0F804A0 ldr r10, [r0, #4] @ unaligned 12514 .LVL2018: 12515 .LBE1676: 12516 .LBE1675: 12517 .LBB1677: 12518 .LBB1678: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12519 .loc 3 948 0 12520 0686 54F804BC ldr fp, [r4, #-4] @ unaligned 12521 068a 0830 adds r0, r0, #8 12522 .LVL2019: 12523 068c 083C subs r4, r4, #8 12524 .LVL2020: 12525 .LBE1678: 12526 .LBE1677: 12527 .LBB1679: 12528 .LBB1680: 12529 .loc 6 2031 0 12530 .syntax unified 12531 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12532 068e CAFBDB32 smlaldx r3, r2, r10, fp 12533 @ 0 "" 2 12534 .LVL2021: 12535 .thumb 12536 .syntax unified 12537 .LBE1680: 12538 .LBE1679: 12539 .loc 31 612 0 12540 0692 013D subs r5, r5, #1 12541 .LVL2022: 12542 0694 EFD1 bne .L825 12543 0696 C6EB4670 rsb r0, r6, r6, lsl #29 12544 .LVL2023: 12545 069a 09EBC000 add r0, r9, r0, lsl #3 ARM GAS /tmp/ccJrAs6S.s page 515 12546 069e 07EBC606 add r6, r7, r6, lsl #3 12547 .LVL2024: 12548 .L824: 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * with y[srcBLen - 1], y[srcBLen - 2] respectively */ 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * with y[srcBLen - 3], y[srcBLen - 4] respectively */ 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k--; 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* For the next MAC operations, the pointer py is used without SIMD 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * So, py is incremented by 1 */ 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = py + 1U; 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** ** No loop unrolling is used. */ 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k = count % 0x4U; 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (k > 0U) 12549 .loc 31 633 0 12550 06a2 1EF00304 ands r4, lr, #3 12551 .LVL2025: 12552 06a6 15D0 beq .L826 12553 .LVL2026: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = __SMLALD(*px++, *py--, sum); 12554 .loc 31 636 0 12555 06a8 B6F90050 ldrsh r5, [r6] 12556 .LVL2027: 12557 06ac B0F902A0 ldrsh r10, [r0, #2] 12558 .LVL2028: 12559 .LBB1681: 12560 .LBB1682: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 12561 .loc 6 2014 0 12562 .syntax unified 12563 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12564 06b0 C5FBCA32 smlald r3, r2, r5, r10 12565 @ 0 "" 2 12566 .LVL2029: 12567 .thumb 12568 .syntax unified 12569 .LBE1682: 12570 .LBE1681: 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12571 .loc 31 633 0 12572 06b4 012C cmp r4, #1 12573 06b6 0DD0 beq .L826 12574 .LVL2030: 12575 .loc 31 636 0 12576 06b8 B6F90250 ldrsh r5, [r6, #2] ARM GAS /tmp/ccJrAs6S.s page 516 12577 .LVL2031: 12578 06bc B0F900A0 ldrsh r10, [r0] 12579 .LVL2032: 12580 .LBB1685: 12581 .LBB1683: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 12582 .loc 6 2014 0 12583 .syntax unified 12584 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12585 06c0 C5FBCA32 smlald r3, r2, r5, r10 12586 @ 0 "" 2 12587 .LVL2033: 12588 .thumb 12589 .syntax unified 12590 .LBE1683: 12591 .LBE1685: 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12592 .loc 31 633 0 12593 06c4 022C cmp r4, #2 12594 06c6 05D0 beq .L826 12595 .LVL2034: 12596 .loc 31 636 0 12597 06c8 B6F90440 ldrsh r4, [r6, #4] 12598 .LVL2035: 12599 06cc 30F9020C ldrsh r0, [r0, #-2] 12600 .LVL2036: 12601 .LBB1686: 12602 .LBB1684: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 12603 .loc 6 2014 0 12604 .syntax unified 12605 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12606 06d0 C4FBC032 smlald r3, r2, r4, r0 12607 @ 0 "" 2 12608 .LVL2037: 12609 .thumb 12610 .syntax unified 12611 .L826: 12612 .LBE1684: 12613 .LBE1686: 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k--; 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px = ++pSrc1; 12614 .loc 31 646 0 12615 06d4 0237 adds r7, r7, #2 12616 .LVL2038: 12617 .LBB1687: 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12618 .loc 31 643 0 12619 06d6 DB0B lsrs r3, r3, #15 ARM GAS /tmp/ccJrAs6S.s page 517 12620 .LVL2039: 12621 .LBE1687: 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12622 .loc 31 602 0 12623 06d8 6745 cmp r7, ip 12624 .LBB1688: 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12625 .loc 31 643 0 12626 06da 43EA4243 orr r3, r3, r2, lsl #17 12627 .LBE1688: 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pIn2; 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement MAC count */ 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** count--; 12628 .loc 31 650 0 12629 06de 0EF1FF3E add lr, lr, #-1 12630 .LVL2040: 12631 .LBB1689: 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12632 .loc 31 643 0 12633 .syntax unified 12634 @ 643 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 12635 06e2 03F30F03 ssat r3, #16, r3 12636 @ 0 "" 2 12637 .LVL2041: 12638 .thumb 12639 .syntax unified 12640 .LBE1689: 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize3--; 12641 .loc 31 653 0 12642 06e6 01F1FF31 add r1, r1, #-1 12643 .LVL2042: 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12644 .loc 31 643 0 12645 06ea 28F8023B strh r3, [r8], #2 @ movhi 12646 .LVL2043: 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12647 .loc 31 602 0 12648 06ee 09D0 beq .L906 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12649 .loc 31 602 0 is_stmt 0 discriminator 1 12650 06f0 71B3 cbz r1, .L830 12651 06f2 4FEA9E06 lsr r6, lr, #2 12652 .LVL2044: 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12653 .loc 31 612 0 is_stmt 1 12654 06f6 002E cmp r6, #0 12655 06f8 B8D1 bne .L907 12656 .LVL2045: 12657 .L859: 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12658 .loc 31 605 0 12659 06fa 3346 mov r3, r6 12660 06fc 3246 mov r2, r6 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 518 12661 .loc 31 612 0 12662 06fe 4846 mov r0, r9 12663 0700 3E46 mov r6, r7 12664 .LVL2046: 12665 0702 CEE7 b .L824 12666 .LVL2047: 12667 .L906: 12668 0704 0991 str r1, [sp, #36] 12669 0706 CDF82CE0 str lr, [sp, #44] 12670 .LVL2048: 12671 070a 4146 mov r1, r8 12672 .LVL2049: 12673 .L822: 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** j--; 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* The second part of the stage starts here */ 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* SIMD is not used for the next MAC operations, 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** * so pointer py is updated to read only one sample at a time */ 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = py + 1U; 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (blockSize3 > 0U) 12674 .loc 31 663 0 12675 070c 099B ldr r3, [sp, #36] 12676 070e FBB1 cbz r3, .L830 12677 0710 0B9E ldr r6, [sp, #44] 12678 0712 149F ldr r7, [sp, #80] 12679 0714 F51A subs r5, r6, r3 12680 .LVL2050: 12681 .L831: 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Accumulator is made zero for every iteration */ 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = 0; 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k = count; 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** while (k > 0U) 12682 .loc 31 671 0 12683 0716 002E cmp r6, #0 12684 0718 5AD0 beq .L908 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12685 .loc 31 666 0 12686 071a 0023 movs r3, #0 12687 071c 1846 mov r0, r3 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 12688 .loc 31 284 0 12689 071e B946 mov r9, r7 12690 .loc 31 671 0 12691 0720 E046 mov r8, ip 12692 0722 3446 mov r4, r6 12693 .LVL2051: 12694 .L833: 12695 .LBB1690: 12696 .LBB1691: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ ARM GAS /tmp/ccJrAs6S.s page 519 12697 .loc 6 2014 0 12698 0724 0246 mov r2, r0 12699 .LBE1691: 12700 .LBE1690: 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Perform the multiply-accumulates */ 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* sum += x[srcALen-1] * y[srcBLen-1] */ 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = __SMLALD(*px++, *py--, sum); 12701 .loc 31 675 0 12702 0726 39F902E9 ldrsh lr, [r9], #-2 12703 .LVL2052: 12704 072a 38F9020B ldrsh r0, [r8], #2 12705 .LVL2053: 12706 .LBB1693: 12707 .LBB1692: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 12708 .loc 6 2014 0 12709 .syntax unified 12710 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12711 072e C0FBCE32 smlald r3, r2, r0, lr 12712 @ 0 "" 2 12713 .LVL2054: 12714 .thumb 12715 .syntax unified 12716 .LBE1692: 12717 .LBE1693: 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12718 .loc 31 671 0 12719 0732 013C subs r4, r4, #1 12720 .LVL2055: 12721 .loc 31 675 0 12722 0734 1046 mov r0, r2 12723 .LVL2056: 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12724 .loc 31 671 0 12725 0736 F5D1 bne .L833 12726 0738 DA0B lsrs r2, r3, #15 12727 073a 42EA4043 orr r3, r2, r0, lsl #17 12728 .LVL2057: 12729 .L834: 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement loop counter */ 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** k--; 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px = ++pSrc1; 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement MAC count */ 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** count--; 12730 .loc 31 689 0 12731 073e 013E subs r6, r6, #1 12732 .LVL2058: ARM GAS /tmp/ccJrAs6S.s page 520 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12733 .loc 31 663 0 12734 0740 AE42 cmp r6, r5 12735 .LBB1694: 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12736 .loc 31 682 0 12737 .syntax unified 12738 @ 682 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 12739 0742 03F30F03 ssat r3, #16, r3 12740 @ 0 "" 2 12741 .LVL2059: 12742 .thumb 12743 .syntax unified 12744 .LBE1694: 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** py = pSrc2; 12745 .loc 31 685 0 12746 0746 0CF1020C add ip, ip, #2 12747 .LVL2060: 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 12748 .loc 31 682 0 12749 074a 21F8023B strh r3, [r1], #2 @ movhi 12750 .LVL2061: 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12751 .loc 31 663 0 12752 074e E2D1 bne .L831 12753 .LVL2062: 12754 .L830: 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Decrement the loop counter */ 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize3--; 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** status = ARM_MATH_SUCCESS; 12755 .loc 31 696 0 12756 0750 0020 movs r0, #0 12757 .LVL2063: 12758 .L895: 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Return to application */ 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** return (status); 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** const q15_t *pIn1 = pSrcA; /* InputA pointer */ 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** const q15_t *pIn2 = pSrcB; /* InputB pointer */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** q63_t sum; /* Accumulator */ 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** uint32_t i, j; /* Loop counters */ 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** arm_status status; /* Status of Partial convolution */ 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Check for range of output samples to be calculated */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** status = ARM_MATH_ARGUMENT_ERROR; 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } ARM GAS /tmp/ccJrAs6S.s page 521 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** else 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Loop to calculate convolution for output length number of values */ 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Initialize sum with zero to carry on MAC operations */ 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum = 0; 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Loop to perform MAC operations according to convolution equation */ 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** for (j = 0U; j <= i; j++) 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Check the array limitations */ 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** if (((i - j) < srcBLen) && (j < srcALen)) 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* z[i] += x[i-j] * y[j] */ 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** sum += ((q31_t) pIn1[j] * pIn2[i - j]); 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Store the output in the destination buffer */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U); 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** status = ARM_MATH_SUCCESS; 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** /* Return to application */ 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** return (status); 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 12759 .loc 31 748 0 12760 0752 17B0 add sp, sp, #92 12761 .LCFI80: 12762 .cfi_remember_state 12763 .cfi_def_cfa_offset 36 12764 @ sp needed 12765 0754 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 12766 .LVL2064: 12767 .L905: 12768 .LCFI81: 12769 .cfi_restore_state 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 12770 .loc 31 383 0 12771 0758 0E9C ldr r4, [sp, #56] 12772 .LBB1695: 12773 .LBB1696: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12774 .loc 3 909 0 12775 075a DCF808C0 ldr ip, [ip, #8] @ unaligned 12776 .LBE1696: 12777 .LBE1695: 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 12778 .loc 31 383 0 12779 075e 34F9067C ldrsh r7, [r4, #-6] ARM GAS /tmp/ccJrAs6S.s page 522 12780 .LVL2065: 12781 .LBB1697: 12782 .LBB1698: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 12783 .loc 6 2014 0 12784 0762 089C ldr r4, [sp, #32] 12785 .LBE1698: 12786 .LBE1697: 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 12787 .loc 31 387 0 12788 0764 BFB2 uxth r7, r7 12789 .LVL2066: 12790 .LBB1700: 12791 .LBB1699: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 12792 .loc 6 2014 0 12793 .syntax unified 12794 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12795 0766 C4FBC716 smlald r1, r6, r4, r7 12796 @ 0 "" 2 12797 .LVL2067: 12798 .thumb 12799 .syntax unified 12800 .LBE1699: 12801 .LBE1700: 12802 .LBB1701: 12803 .LBB1702: 12804 076a 4446 mov r4, r8 12805 .syntax unified 12806 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12807 076c CEFBC754 smlald r5, r4, lr, r7 12808 @ 0 "" 2 12809 .LVL2068: 12810 .thumb 12811 .syntax unified 12812 .LBE1702: 12813 .LBE1701: 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc2 = __SMLALDX(x1, c0, acc2); 12814 .loc 31 396 0 12815 0770 A046 mov r8, r4 12816 .LVL2069: 12817 .LBB1703: 12818 .LBB1704: 12819 .loc 6 2031 0 12820 .syntax unified 12821 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12822 0772 CEFBD720 smlaldx r2, r0, lr, r7 12823 @ 0 "" 2 12824 .LVL2070: 12825 .thumb 12826 .syntax unified 12827 .LBE1704: 12828 .LBE1703: 12829 .LBB1705: 12830 .LBB1706: 12831 .syntax unified 12832 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccJrAs6S.s page 523 12833 0776 CCFBD73B smlaldx r3, fp, ip, r7 12834 @ 0 "" 2 12835 .LVL2071: 12836 .thumb 12837 .syntax unified 12838 077a C0E6 b .L816 12839 .LVL2072: 12840 .L817: 12841 .LBE1706: 12842 .LBE1705: 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 12843 .loc 31 420 0 12844 077c 032C cmp r4, #3 12845 077e 7FF4BEAE bne .L816 12846 .LVL2073: 12847 .LBB1707: 12848 .LBB1708: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12849 .loc 3 909 0 12850 0782 039C ldr r4, [sp, #12] 12851 .LBE1708: 12852 .LBE1707: 12853 .LBB1710: 12854 .LBB1711: 12855 0784 0E9F ldr r7, [sp, #56] 12856 .LBE1711: 12857 .LBE1710: 12858 .LBB1713: 12859 .LBB1714: 12860 .loc 6 2031 0 12861 0786 0D91 str r1, [sp, #52] 12862 .LBE1714: 12863 .LBE1713: 12864 .LBB1716: 12865 .LBB1709: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12866 .loc 3 909 0 12867 0788 D4F800A0 ldr r10, [r4] @ unaligned 12868 .LBE1709: 12869 .LBE1716: 12870 .LBB1717: 12871 .LBB1718: 12872 078c D4F802C0 ldr ip, [r4, #2] @ unaligned 12873 .LBE1718: 12874 .LBE1717: 12875 .LBB1719: 12876 .LBB1712: 12877 0790 57F8089C ldr r9, [r7, #-8] @ unaligned 12878 .LVL2074: 12879 .LBE1712: 12880 .LBE1719: 12881 .LBB1720: 12882 .LBB1715: 12883 .loc 6 2031 0 12884 0794 0899 ldr r1, [sp, #32] 12885 .LVL2075: 12886 0796 0D9C ldr r4, [sp, #52] ARM GAS /tmp/ccJrAs6S.s page 524 12887 .syntax unified 12888 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12889 0798 C1FBD946 smlaldx r4, r6, r1, r9 12890 @ 0 "" 2 12891 .LVL2076: 12892 .thumb 12893 .syntax unified 12894 079c 2146 mov r1, r4 12895 079e 0D94 str r4, [sp, #52] 12896 .LVL2077: 12897 .LBE1715: 12898 .LBE1720: 12899 .LBB1721: 12900 .LBB1722: 12901 07a0 4446 mov r4, r8 12902 .syntax unified 12903 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12904 07a2 CEFBD954 smlaldx r5, r4, lr, r9 12905 @ 0 "" 2 12906 .LVL2078: 12907 .thumb 12908 .syntax unified 12909 .LBE1722: 12910 .LBE1721: 12911 .LBB1723: 12912 .LBB1724: 12913 .syntax unified 12914 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12915 07a6 CAFBD920 smlaldx r2, r0, r10, r9 12916 @ 0 "" 2 12917 .LVL2079: 12918 .thumb 12919 .syntax unified 12920 .LBE1724: 12921 .LBE1723: 12922 .LBB1725: 12923 .LBB1726: 12924 .syntax unified 12925 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12926 07aa CCFBD93B smlaldx r3, fp, ip, r9 12927 @ 0 "" 2 12928 .LVL2080: 12929 .thumb 12930 .syntax unified 12931 .LBE1726: 12932 .LBE1725: 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 12933 .loc 31 437 0 12934 07ae 37F90A8C ldrsh r8, [r7, #-10] 12935 .LVL2081: 12936 .LBB1727: 12937 .LBB1728: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 12938 .loc 3 909 0 12939 07b2 039F ldr r7, [sp, #12] 12940 07b4 D7F80490 ldr r9, [r7, #4] @ unaligned 12941 .LVL2082: ARM GAS /tmp/ccJrAs6S.s page 525 12942 .LBE1728: 12943 .LBE1727: 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 12944 .loc 31 441 0 12945 07b8 1FFA88F7 uxth r7, r8 12946 .LVL2083: 12947 .LBB1729: 12948 .LBB1730: 12949 .loc 6 2031 0 12950 .syntax unified 12951 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12952 07bc CEFBD716 smlaldx r1, r6, lr, r7 12953 @ 0 "" 2 12954 .LVL2084: 12955 .thumb 12956 .syntax unified 12957 .LBE1730: 12958 .LBE1729: 12959 .LBB1731: 12960 .LBB1732: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 12961 .loc 6 2014 0 12962 .syntax unified 12963 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12964 07c0 CCFBC754 smlald r5, r4, ip, r7 12965 @ 0 "" 2 12966 .LVL2085: 12967 .thumb 12968 .syntax unified 12969 .LBE1732: 12970 .LBE1731: 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** acc2 = __SMLALDX(x2, c0, acc2); 12971 .loc 31 450 0 12972 07c4 A046 mov r8, r4 12973 .LVL2086: 12974 .LBB1733: 12975 .LBB1734: 12976 .loc 6 2031 0 12977 .syntax unified 12978 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12979 07c6 CCFBD720 smlaldx r2, r0, ip, r7 12980 @ 0 "" 2 12981 .LVL2087: 12982 .thumb 12983 .syntax unified 12984 .LBE1734: 12985 .LBE1733: 12986 .LBB1735: 12987 .LBB1736: 12988 .syntax unified 12989 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 12990 07ca C9FBD73B smlaldx r3, fp, r9, r7 12991 @ 0 "" 2 12992 .LVL2088: 12993 .thumb 12994 .syntax unified 12995 07ce 96E6 b .L816 ARM GAS /tmp/ccJrAs6S.s page 526 12996 .LVL2089: 12997 .L908: 12998 .LBE1736: 12999 .LBE1735: 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 13000 .loc 31 671 0 13001 07d0 3346 mov r3, r6 13002 07d2 B4E7 b .L834 13003 .LVL2090: 13004 .L776: 13005 .LBB1737: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13006 .loc 31 190 0 13007 07d4 D20B lsrs r2, r2, #15 13008 .LVL2091: 13009 07d6 42EA4042 orr r2, r2, r0, lsl #17 13010 .syntax unified 13011 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13012 07da 02F30F02 ssat r2, #16, r2 13013 @ 0 "" 2 13014 .LVL2092: 13015 .thumb 13016 .syntax unified 13017 .LBE1737: 13018 07de 2CF81B20 strh r2, [ip, fp, lsl #1] @ movhi 13019 .LVL2093: 13020 07e2 8CE4 b .L836 13021 .LVL2094: 13022 .L768: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 13023 .loc 31 123 0 13024 07e4 099A ldr r2, [sp, #36] 13025 07e6 AAEB010A sub r10, r10, r1 13026 07ea AAEB0202 sub r2, r10, r2 13027 07ee 1292 str r2, [sp, #72] 13028 .LVL2095: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 13029 .loc 31 171 0 13030 07f0 039A ldr r2, [sp, #12] 13031 .LVL2096: 13032 07f2 032A cmp r2, #3 13033 07f4 7FF64DAC bls .L770 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13034 .loc 31 207 0 13035 07f8 9F1E subs r7, r3, #2 13036 .LVL2097: 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13037 .loc 31 137 0 13038 07fa 029B ldr r3, [sp, #8] 13039 .LVL2098: 13040 07fc 0093 str r3, [sp] 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13041 .loc 31 207 0 13042 07fe 8A46 mov r10, r1 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13043 .loc 31 153 0 13044 0800 039D ldr r5, [sp, #12] ARM GAS /tmp/ccJrAs6S.s page 527 13045 0802 5DE5 b .L841 13046 .LVL2099: 13047 .L781: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13048 .loc 31 190 0 13049 0804 029B ldr r3, [sp, #8] 13050 .LBB1738: 13051 0806 D20B lsrs r2, r2, #15 13052 .LVL2100: 13053 0808 42EA4142 orr r2, r2, r1, lsl #17 13054 .syntax unified 13055 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13056 080c 02F30F02 ssat r2, #16, r2 13057 @ 0 "" 2 13058 .LVL2101: 13059 .thumb 13060 .syntax unified 13061 .LBE1738: 13062 0810 5A80 strh r2, [r3, #2] @ movhi 13063 .LVL2102: 13064 0812 ABE4 b .L837 13065 .LVL2103: 13066 .L900: 13067 .LBB1739: 13068 .syntax unified 13069 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13070 0814 02F30F02 ssat r2, #16, r2 13071 @ 0 "" 2 13072 .LVL2104: 13073 .thumb 13074 .syntax unified 13075 .LBE1739: 13076 0818 2CF81B20 strh r2, [ip, fp, lsl #1] @ movhi 13077 .LVL2105: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 13078 .loc 31 171 0 13079 081c BAF1000F cmp r10, #0 13080 0820 39D0 beq .L852 13081 .LVL2106: 13082 0822 029A ldr r2, [sp, #8] 13083 0824 0432 adds r2, r2, #4 13084 0826 A1F1020A sub r10, r1, #2 13085 .LVL2107: 13086 082a 0092 str r2, [sp] 13087 .LVL2108: 13088 082c 1C1D adds r4, r3, #4 13089 082e 0220 movs r0, #2 13090 0830 74E4 b .L778 13091 .LVL2109: 13092 .L786: 13093 .LBB1740: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13094 .loc 31 190 0 13095 0832 DB0B lsrs r3, r3, #15 13096 .LVL2110: 13097 0834 43EA4243 orr r3, r3, r2, lsl #17 13098 .LBE1740: ARM GAS /tmp/ccJrAs6S.s page 528 13099 0838 009A ldr r2, [sp] 13100 .LBB1741: 13101 .syntax unified 13102 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13103 083a 03F30F03 ssat r3, #16, r3 13104 @ 0 "" 2 13105 .LVL2111: 13106 .thumb 13107 .syntax unified 13108 .LBE1741: 13109 083e 1380 strh r3, [r2] @ movhi 13110 .LVL2112: 13111 0840 CBE4 b .L838 13112 .LVL2113: 13113 .L772: 13114 .LBB1742: 13115 0842 DB0B lsrs r3, r3, #15 13116 .LVL2114: 13117 0844 43EA4243 orr r3, r3, r2, lsl #17 13118 .LBE1742: 13119 0848 009A ldr r2, [sp] 13120 .LBB1743: 13121 .syntax unified 13122 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13123 084a 03F30F03 ssat r3, #16, r3 13124 @ 0 "" 2 13125 .LVL2115: 13126 .thumb 13127 .syntax unified 13128 .LBE1743: 13129 084e 1380 strh r3, [r2] @ movhi 13130 .LVL2116: 13131 0850 93E5 b .L771 13132 .LVL2117: 13133 .L808: 13134 0852 1146 mov r1, r2 13135 0854 029A ldr r2, [sp, #8] 13136 .LVL2118: 13137 0856 139B ldr r3, [sp, #76] 13138 0858 02EB4101 add r1, r2, r1, lsl #1 13139 085c 2546 mov r5, r4 13140 085e A3F1020C sub ip, r3, #2 13141 0862 0C46 mov r4, r1 13142 .LVL2119: 13143 .L810: 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13144 .loc 31 545 0 13145 0864 2B88 ldrh r3, [r5] 13146 0866 3CF8020F ldrh r0, [ip, #2]! 13147 .LVL2120: 13148 086a 13FB00F3 smulbb r3, r3, r0 13149 086e D917 asrs r1, r3, #31 13150 .LBB1744: 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13151 .loc 31 552 0 13152 0870 DB0B lsrs r3, r3, #15 13153 0872 43EA4143 orr r3, r3, r1, lsl #17 ARM GAS /tmp/ccJrAs6S.s page 529 13154 .syntax unified 13155 @ 552 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13156 0876 03F30F03 ssat r3, #16, r3 13157 @ 0 "" 2 13158 .LVL2121: 13159 .thumb 13160 .syntax unified 13161 .LBE1744: 13162 087a 22F8023B strh r3, [r2], #2 @ movhi 13163 .LVL2122: 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 13164 .loc 31 534 0 13165 087e A242 cmp r2, r4 13166 0880 F0D1 bne .L810 13167 0882 2146 mov r1, r4 13168 0884 049B ldr r3, [sp, #16] 13169 .LVL2123: 13170 0886 DCE6 b .L805 13171 .LVL2124: 13172 .L850: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 13173 .loc 31 171 0 13174 0888 0546 mov r5, r0 13175 088a 14E5 b .L769 13176 .LVL2125: 13177 .L849: 13178 088c 029B ldr r3, [sp, #8] 13179 .LVL2126: 13180 088e 0093 str r3, [sp] 13181 0890 6446 mov r4, ip 13182 0892 8A46 mov r10, r1 13183 0894 0FE5 b .L769 13184 .LVL2127: 13185 .L852: 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 13186 .loc 31 209 0 13187 0896 009B ldr r3, [sp] 13188 0898 0293 str r3, [sp, #8] 13189 089a 6EE5 b .L771 13190 .LVL2128: 13191 .L901: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13192 .loc 31 190 0 13193 089c 029A ldr r2, [sp, #8] 13194 .LVL2129: 13195 .LBB1745: 13196 .syntax unified 13197 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13198 089e 05F30F05 ssat r5, #16, r5 13199 @ 0 "" 2 13200 .LVL2130: 13201 .thumb 13202 .syntax unified 13203 .LBE1745: 13204 08a2 5580 strh r5, [r2, #2] @ movhi 13205 .LVL2131: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 530 13206 .loc 31 171 0 13207 08a4 BAF1000F cmp r10, #0 13208 08a8 F5D0 beq .L852 13209 .LVL2132: 13210 08aa 0632 adds r2, r2, #6 13211 08ac 0339 subs r1, r1, #3 13212 08ae 0292 str r2, [sp, #8] 13213 08b0 03F1060C add ip, r3, #6 13214 08b4 0120 movs r0, #1 13215 08b6 0225 movs r5, #2 13216 08b8 67E4 b .L783 13217 .LVL2133: 13218 .L791: 13219 .LBB1746: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13220 .loc 31 190 0 13221 08ba DB0B lsrs r3, r3, #15 13222 .LVL2134: 13223 08bc 43EA4243 orr r3, r3, r2, lsl #17 13224 .LBE1746: 13225 08c0 029A ldr r2, [sp, #8] 13226 .LBB1747: 13227 .syntax unified 13228 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13229 08c2 03F30F03 ssat r3, #16, r3 13230 @ 0 "" 2 13231 .LVL2135: 13232 .thumb 13233 .syntax unified 13234 .LBE1747: 13235 08c6 1380 strh r3, [r2] @ movhi 13236 .LVL2136: 13237 08c8 BDE4 b .L839 13238 .LVL2137: 13239 .L902: 13240 08ca 009B ldr r3, [sp] 13241 .LBB1748: 13242 .syntax unified 13243 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13244 08cc 00F30F00 ssat r0, #16, r0 13245 @ 0 "" 2 13246 .LVL2138: 13247 .thumb 13248 .syntax unified 13249 .LBE1748: 13250 08d0 1880 strh r0, [r3] @ movhi 13251 .LVL2139: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 13252 .loc 31 171 0 13253 08d2 0029 cmp r1, #0 13254 08d4 3FF451AD beq .L771 13255 .LVL2140: 13256 08d8 0433 adds r3, r3, #4 13257 08da AAF1020A sub r10, r10, #2 13258 08de 0093 str r3, [sp] 13259 08e0 0434 adds r4, r4, #4 13260 08e2 0125 movs r5, #1 ARM GAS /tmp/ccJrAs6S.s page 531 13261 08e4 0220 movs r0, #2 13262 08e6 86E4 b .L788 13263 .LVL2141: 13264 .L903: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13265 .loc 31 190 0 13266 08e8 029B ldr r3, [sp, #8] 13267 .LBB1749: 13268 .syntax unified 13269 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13270 08ea 05F30F05 ssat r5, #16, r5 13271 @ 0 "" 2 13272 .LVL2142: 13273 .thumb 13274 .syntax unified 13275 .LBE1749: 13276 08ee 1D80 strh r5, [r3] @ movhi 13277 .LVL2143: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 13278 .loc 31 171 0 13279 08f0 BAF1000F cmp r10, #0 13280 08f4 CFD0 beq .L852 13281 .LVL2144: 13282 08f6 0433 adds r3, r3, #4 13283 08f8 A1F1020A sub r10, r1, #2 13284 08fc 0293 str r3, [sp, #8] 13285 08fe 0CF1040C add ip, ip, #4 13286 0902 0225 movs r5, #2 13287 0904 0120 movs r0, #1 13288 0906 ADE4 b .L840 13289 .LVL2145: 13290 .L857: 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 13291 .loc 31 479 0 13292 0908 0299 ldr r1, [sp, #8] 13293 .LVL2146: 13294 .L899: 13295 090a 049B ldr r3, [sp, #16] 13296 090c 99E6 b .L805 13297 .LVL2147: 13298 .L793: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13299 .loc 31 190 0 13300 090e 009B ldr r3, [sp] 13301 .LBB1750: 13302 .syntax unified 13303 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13304 0910 00F30F00 ssat r0, #16, r0 13305 @ 0 "" 2 13306 .LVL2148: 13307 .thumb 13308 .syntax unified 13309 .LBE1750: 13310 0914 1880 strh r0, [r3] @ movhi 13311 0916 30E5 b .L771 13312 .LVL2149: 13313 .L806: ARM GAS /tmp/ccJrAs6S.s page 532 13314 0918 0299 ldr r1, [sp, #8] 13315 .LBB1751: 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13316 .loc 31 552 0 13317 091a 049B ldr r3, [sp, #16] 13318 .syntax unified 13319 @ 552 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13320 091c 03F30F03 ssat r3, #16, r3 13321 @ 0 "" 2 13322 .thumb 13323 .syntax unified 13324 0920 01EB4202 add r2, r1, r2, lsl #1 13325 .LVL2150: 13326 .L812: 13327 .LBE1751: 13328 0924 21F8023B strh r3, [r1], #2 @ movhi 13329 .LVL2151: 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 13330 .loc 31 534 0 13331 0928 8A42 cmp r2, r1 13332 092a FBD1 bne .L812 13333 092c EDE7 b .L899 13334 .LVL2152: 13335 .L855: 13336 092e 0299 ldr r1, [sp, #8] 13337 0930 87E6 b .L805 13338 .LVL2153: 13339 .L858: 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** px = pSrc1; 13340 .loc 31 583 0 13341 0932 BC46 mov ip, r7 13342 0934 EAE6 b .L822 13343 .LVL2154: 13344 .L856: 13345 0936 8C46 mov ip, r1 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13346 .loc 31 281 0 13347 0938 139E ldr r6, [sp, #76] 13348 093a 10E6 b .L813 13349 .LVL2155: 13350 .L807: 13351 093c 1146 mov r1, r2 13352 093e 029A ldr r2, [sp, #8] 13353 .LVL2156: 13354 0940 DDF84CC0 ldr ip, [sp, #76] 13355 0944 02EB4101 add r1, r2, r1, lsl #1 13356 0948 0E46 mov r6, r1 13357 .LVL2157: 13358 .L811: 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13359 .loc 31 545 0 13360 094a BCF90010 ldrsh r1, [ip] 13361 .LVL2158: 13362 094e 2088 ldrh r0, [r4] 13363 0950 3CF8023F ldrh r3, [ip, #2]! 13364 .LVL2159: 13365 0954 34F8025C ldrh r5, [r4, #-2] ARM GAS /tmp/ccJrAs6S.s page 533 13366 0958 10FB01F0 smulbb r0, r0, r1 13367 095c C117 asrs r1, r0, #31 13368 .LVL2160: 13369 095e C5FB8301 smlalbb r0, r1, r5, r3 13370 .LBB1752: 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13371 .loc 31 552 0 13372 0962 C30B lsrs r3, r0, #15 13373 0964 43EA4143 orr r3, r3, r1, lsl #17 13374 .syntax unified 13375 @ 552 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c 13376 0968 03F30F03 ssat r3, #16, r3 13377 @ 0 "" 2 13378 .LVL2161: 13379 .thumb 13380 .syntax unified 13381 .LBE1752: 13382 096c 22F8023B strh r3, [r2], #2 @ movhi 13383 .LVL2162: 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 13384 .loc 31 534 0 13385 0970 B242 cmp r2, r6 13386 0972 EAD1 bne .L811 13387 0974 49E5 b .L898 13388 .LVL2163: 13389 .L844: 13390 0976 1546 mov r5, r2 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** { 13391 .loc 31 171 0 13392 0978 029A ldr r2, [sp, #8] 13393 097a 0092 str r2, [sp] 13394 097c 1C46 mov r4, r3 13395 .LVL2164: 13396 097e 9AE4 b .L769 13397 .LVL2165: 13398 .L842: 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** } 13399 .loc 31 87 0 13400 0980 4FF0FF30 mov r0, #-1 13401 .LVL2166: 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c **** 13402 .loc 31 700 0 13403 0984 E5E6 b .L895 13404 .cfi_endproc 13405 .LFE176: 13407 0986 00BF .section .text.arm_conv_partial_q31,"ax",%progbits 13408 .align 1 13409 .p2align 2,,3 13410 .global arm_conv_partial_q31 13411 .syntax unified 13412 .thumb 13413 .thumb_func 13414 .fpu fpv4-sp-d16 13416 arm_conv_partial_q31: 13417 .LFB177: 13418 .file 32 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* ---------------------------------------------------------------------- ARM GAS /tmp/ccJrAs6S.s page 534 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Title: arm_conv_partial_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Description: Partial convolution of Q31 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @addtogroup PartialConv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @brief Partial convolution of Q31 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @param[out] pDst points to the location where the output result is written 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @param[in] firstIndex is the first output sample to start with 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @param[in] numPoints is the number of output points to be computed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @return execution status 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** @remark 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** Refer to \ref arm_conv_partial_fast_q31() for a faster but less precise implemen 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** arm_status arm_conv_partial_q31( 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** const q31_t * pSrcA, ARM GAS /tmp/ccJrAs6S.s page 535 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** uint32_t srcALen, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** const q31_t * pSrcB, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** uint32_t srcBLen, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** q31_t * pDst, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** uint32_t firstIndex, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** uint32_t numPoints) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13419 .loc 32 65 0 13420 .cfi_startproc 13421 @ args = 12, pretend = 0, frame = 24 13422 @ frame_needed = 0, uses_anonymous_args = 0 13423 .LVL2167: 13424 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 13425 .LCFI82: 13426 .cfi_def_cfa_offset 36 13427 .cfi_offset 4, -36 13428 .cfi_offset 5, -32 13429 .cfi_offset 6, -28 13430 .cfi_offset 7, -24 13431 .cfi_offset 8, -20 13432 .cfi_offset 9, -16 13433 .cfi_offset 10, -12 13434 .cfi_offset 11, -8 13435 .cfi_offset 14, -4 13436 0004 87B0 sub sp, sp, #28 13437 .LCFI83: 13438 .cfi_def_cfa_offset 64 13439 0006 4C1E subs r4, r1, #1 13440 .loc 32 65 0 13441 0008 8846 mov r8, r1 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #if defined(ARM_MATH_DSP) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** const q31_t *pIn1; /* InputA pointer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** const q31_t *pIn2; /* InputB pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** q31_t *pOut = pDst; /* Output pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** const q31_t *px; /* Intermediate inputA pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** const q31_t *py; /* Intermediate inputB pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** q63_t sum; /* Accumulator */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** uint32_t j, k, count, blkCnt, check; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** arm_status status; /* Status of Partial convolution */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** q63_t acc0, acc1, acc2; /* Accumulator */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** q31_t x0, x1, x2, c0; /* Temporary variables */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #endif 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Check for range of output samples to be calculated */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) 13442 .loc 32 86 0 13443 000a DDE91116 ldrd r1, r6, [sp, #68] 13444 .LVL2168: 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13445 .loc 32 65 0 13446 000e 1D46 mov r5, r3 ARM GAS /tmp/ccJrAs6S.s page 536 13447 0010 0193 str r3, [sp, #4] 13448 .LVL2169: 13449 .loc 32 86 0 13450 0012 3144 add r1, r1, r6 13451 0014 E318 adds r3, r4, r3 13452 .LVL2170: 13453 0016 9942 cmp r1, r3 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13454 .loc 32 65 0 13455 0018 0390 str r0, [sp, #12] 13456 .loc 32 86 0 13457 001a 00F22181 bhi .L937 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** status = ARM_MATH_ARGUMENT_ERROR; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** else 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* srcB is always made to slide across srcA. */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** if (srcALen >= srcBLen) 13458 .loc 32 96 0 13459 001e 4545 cmp r5, r8 13460 0020 9146 mov r9, r2 13461 0022 06D8 bhi .L911 13462 0024 4A46 mov r2, r9 13463 0026 CDF80480 str r8, [sp, #4] 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Initialization of inputA pointer */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** pIn1 = pSrcA; 13464 .loc 32 99 0 13465 002a 8146 mov r9, r0 13466 002c 6C1E subs r4, r5, #1 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Initialization of inputB pointer */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** pIn2 = pSrcB; 13467 .loc 32 102 0 13468 002e 0392 str r2, [sp, #12] 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13469 .loc 32 96 0 13470 0030 A846 mov r8, r5 13471 .LVL2171: 13472 .L911: 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** else 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Initialization of inputA pointer */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** pIn1 = pSrcB; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Initialization of inputB pointer */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** pIn2 = pSrcA; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** j = srcBLen; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** srcBLen = srcALen; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** srcALen = j; ARM GAS /tmp/ccJrAs6S.s page 537 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Conditions to check which loopCounter holds 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * the first and last indices of the output samples to be calculated. */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** check = firstIndex + numPoints; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0; 13473 .loc 32 121 0 13474 0032 019B ldr r3, [sp, #4] 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + 13475 .loc 32 122 0 13476 0034 1198 ldr r0, [sp, #68] 13477 .LVL2172: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + 13478 .loc 32 121 0 13479 0036 9942 cmp r1, r3 13480 0038 CCBF ite gt 13481 003a CB1A subgt r3, r1, r3 13482 003c 0023 movle r3, #0 13483 003e 0293 str r3, [sp, #8] 13484 .LVL2173: 13485 .loc 32 122 0 13486 0040 019B ldr r3, [sp, #4] 13487 0042 8342 cmp r3, r0 13488 0044 03DC bgt .L913 13489 .loc 32 122 0 is_stmt 0 discriminator 1 13490 0046 029A ldr r2, [sp, #8] 13491 .LVL2174: 13492 0048 1B1A subs r3, r3, r0 13493 .LVL2175: 13494 004a 1A44 add r2, r2, r3 13495 .LVL2176: 13496 004c 0292 str r2, [sp, #8] 13497 .LVL2177: 13498 .L913: 13499 004e 119B ldr r3, [sp, #68] 13500 0050 4FEA830A lsl r10, r3, #2 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; 13501 .loc 32 123 0 is_stmt 1 discriminator 4 13502 0054 DA43 mvns r2, r3 13503 .LVL2178: 13504 0056 109B ldr r3, [sp, #64] 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : numPoints) : 0; 13505 .loc 32 124 0 discriminator 4 13506 0058 12EB0802 adds r2, r2, r8 13507 .LVL2179: 13508 005c 5344 add r3, r3, r10 13509 005e 46D1 bne .L914 13510 .LVL2180: 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); 13511 .loc 32 125 0 13512 0060 129A ldr r2, [sp, #72] 13513 0062 0299 ldr r1, [sp, #8] 13514 .LVL2181: 13515 0064 521A subs r2, r2, r1 13516 0066 0492 str r2, [sp, #16] 13517 .LVL2182: 13518 0068 119A ldr r2, [sp, #68] ARM GAS /tmp/ccJrAs6S.s page 538 13519 .LVL2183: 13520 .L915: 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* The function is internally 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * divided into three stages according to the number of multiplications that has to be 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * taken place between inputA samples and inputB samples. In the first stage of the 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * algorithm, the multiplications increase by one for every iteration. 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * In the third stage of the algorithm, the multiplications decrease by one 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * for every iteration. */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Set the output pointer to point to the firstIndex 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * of the output sample to be calculated. */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** pOut = pDst + firstIndex; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* -------------------------- 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Initializations of stage1 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * -------------------------*/ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* sum = x[0] * y[0] 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * sum = x[0] * y[1] + x[1] * y[0] 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * .... 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** The count variable holds the number of MAC operations performed. 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** Since the partial convolution starts from firstIndex 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** Number of Macs to be performed is firstIndex + 1 */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** count = 1U + firstIndex; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Working pointer of inputA */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** px = pIn1; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Working pointer of inputB */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** pSrc2 = pIn2 + firstIndex; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py = pSrc2; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* ------------------------ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Stage1 process 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * ----------------------*/ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* The first stage starts here */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (blockSize1 > 0U) 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Accumulator is made zero for every iteration */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum = 0; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k = count >> 2U; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (k > 0U) 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { ARM GAS /tmp/ccJrAs6S.s page 539 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* x[0] * y[srcBLen - 1] */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * (*py--); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* x[1] * y[srcBLen - 2] */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * (*py--); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* x[2] * y[srcBLen - 3] */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * (*py--); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* x[3] * y[srcBLen - 4] */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * (*py--); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement loop counter */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k--; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Loop unrolling: Compute remaining outputs */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k = count % 0x4U; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #else 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Initialize k with number of samples */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k = count; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (k > 0U) 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Perform the multiply-accumulate */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * (*py--); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement loop counter */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k--; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** *pOut++ = (q31_t) (sum >> 31); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py = ++pSrc2; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** px = pIn1; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Increment MAC count */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** count++; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement loop counter */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize1--; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* -------------------------- 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Initializations of stage2 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * ------------------------*/ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * .... 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y ARM GAS /tmp/ccJrAs6S.s page 540 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Working pointer of inputA */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) 13521 .loc 32 241 0 13522 006a A2EB0802 sub r2, r2, r8 13523 006e 002A cmp r2, #0 13524 0070 74DB blt .L940 13525 .LVL2184: 13526 .L960: 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** pSrc1 = pIn1 + firstIndex - srcBLen + 1; 13527 .loc 32 243 0 13528 0072 119A ldr r2, [sp, #68] 13529 0074 02F1010C add ip, r2, #1 13530 0078 ACEB080C sub ip, ip, r8 13531 007c 09EB8C0C add ip, r9, ip, lsl #2 13532 .LVL2185: 13533 .L922: 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** else 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** pSrc1 = pIn1; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** px = pSrc1; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Working pointer of inputB */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** pSrc2 = pIn2 + (srcBLen - 1U); 13534 .loc 32 252 0 13535 0080 039A ldr r2, [sp, #12] 13536 0082 08F18045 add r5, r8, #1073741824 13537 0086 013D subs r5, r5, #1 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py = pSrc2; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* count is index by which the pointer pIn1 to be incremented */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** count = 0U; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* ------------------- 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Stage2 process 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * ------------------*/ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * So, to loop unroll over blockSize2, 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * srcBLen should be greater than or equal to 4 */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** if (srcBLen >= 4U) 13538 .loc 32 265 0 13539 0088 B8F1030F cmp r8, #3 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py = pSrc2; 13540 .loc 32 252 0 13541 008c 02EB8505 add r5, r2, r5, lsl #2 13542 .LVL2186: 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Loop unroll over blkCnt */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blkCnt = blockSize2 / 3; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 541 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (blkCnt > 0U) 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Set all accumulators to zero */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc0 = 0; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc1 = 0; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc2 = 0; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* read x[0], x[1] samples */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** x0 = *px++; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** x1 = *px++; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Apply loop unrolling and compute 3 MACs simultaneously. */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k = srcBLen / 3; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* First part of the processing with loop unrolling. Compute 3 MACs at a time. 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** ** a second loop below computes MACs for the remaining 1 to 2 samples. */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** do 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Read y[srcBLen - 1] sample */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** c0 = *(py); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Read x[2] sample */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** x2 = *(px); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Perform the multiply-accumulate */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* acc0 += x[0] * y[srcBLen - 1] */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc0 += (q63_t) x0 * c0; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* acc1 += x[1] * y[srcBLen - 1] */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc1 += (q63_t) x1 * c0; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* acc2 += x[2] * y[srcBLen - 1] */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc2 += (q63_t) x2 * c0; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Read y[srcBLen - 2] sample */ 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** c0 = *(py - 1U); 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Read x[3] sample */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** x0 = *(px + 1U); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Perform the multiply-accumulate */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* acc0 += x[1] * y[srcBLen - 2] */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc0 += (q63_t) x1 * c0; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* acc1 += x[2] * y[srcBLen - 2] */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc1 += (q63_t) x2 * c0; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* acc2 += x[3] * y[srcBLen - 2] */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc2 += (q63_t) x0 * c0; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Read y[srcBLen - 3] sample */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** c0 = *(py - 2U); 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Read x[4] sample */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** x1 = *(px + 2U); 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Perform the multiply-accumulate */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* acc0 += x[2] * y[srcBLen - 3] */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc0 += (q63_t) x2 * c0; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* acc1 += x[3] * y[srcBLen - 2] */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc1 += (q63_t) x0 * c0; ARM GAS /tmp/ccJrAs6S.s page 542 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* acc2 += x[4] * y[srcBLen - 2] */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc2 += (q63_t) x1 * c0; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** px += 3U; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py -= 3U; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } while (--k); 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* If the srcBLen is not a multiple of 3, compute any remaining MACs here. 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** ** No loop unrolling is used. */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k = srcBLen - (3 * (srcBLen / 3)); 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (k > 0U) 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Read y[srcBLen - 5] sample */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** c0 = *py--; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Read x[7] sample */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** x2 = *px++; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Perform the multiply-accumulates */ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* acc0 += x[4] * y[srcBLen - 5] */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc0 += (q63_t) x0 * c0; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc1 += (q63_t) x1 * c0; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** acc2 += (q63_t) x2 * c0; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Reuse the present samples for the next MAC */ 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** x0 = x1; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** x1 = x2; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement the loop counter */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k--; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** *pOut++ = (q31_t) (acc0 >> 31); 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** *pOut++ = (q31_t) (acc1 >> 31); 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** *pOut++ = (q31_t) (acc2 >> 31); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Increment the pointer pIn1 index, count by 3 */ 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** count += 3U; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** px = pSrc1 + count; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py = pSrc2; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement loop counter */ 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blkCnt--; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Loop unrolling: Compute remaining outputs */ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blkCnt = blockSize2 - 3 * (blockSize2 / 3); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #else ARM GAS /tmp/ccJrAs6S.s page 543 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Initialize blkCnt with number of samples */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blkCnt = blockSize2; 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (blkCnt > 0U) 13543 .loc 32 392 0 13544 0090 049A ldr r2, [sp, #16] 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13545 .loc 32 265 0 13546 0092 65D8 bhi .L923 13547 .LVL2187: 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Accumulator is made zero for every iteration */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum = 0; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k = srcBLen >> 2U; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (k > 0U) 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Perform the multiply-accumulates */ 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * (*py--); 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * (*py--); 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * (*py--); 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * (*py--); 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement loop counter */ 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k--; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Loop unrolling: Compute remaining outputs */ 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k = srcBLen % 0x4U; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #else 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Initialize blkCnt with number of samples */ 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k = srcBLen; 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (k > 0U) 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Perform the multiply-accumulate */ 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * *py--; 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement loop counter */ 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k--; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** *pOut++ = (q31_t) (sum >> 31); 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Increment MAC count */ ARM GAS /tmp/ccJrAs6S.s page 544 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** count++; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** px = pSrc1 + count; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py = pSrc2; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement loop counter */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blkCnt--; 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** else 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* If the srcBLen is not a multiple of 4, 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * the blockSize2 loop cannot be unrolled by 4 */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blkCnt = (uint32_t) blockSize2; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (blkCnt > 0U) 13548 .loc 32 453 0 13549 0094 002A cmp r2, #0 13550 0096 00F0C180 beq .L942 13551 009a B8F1000F cmp r8, #0 13552 009e 00F0BF80 beq .L925 13553 00a2 B8F1020F cmp r8, #2 13554 00a6 00F0C480 beq .L926 13555 00aa B8F1010F cmp r8, #1 13556 00ae 00F0A380 beq .L927 13557 00b2 2746 mov r7, r4 13558 00b4 03EB820E add lr, r3, r2, lsl #2 13559 00b8 1C46 mov r4, r3 13560 .LVL2188: 13561 .L928: 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Accumulator is made zero for every iteration */ 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum = 0; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* srcBLen number of MACS should be performed */ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k = srcBLen; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (k > 0U) 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Perform the multiply-accumulate */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * *py--; 13562 .loc 32 464 0 13563 00ba DCF80010 ldr r1, [ip] 13564 .LVL2189: 13565 00be 55F8043C ldr r3, [r5, #-4] 13566 00c2 5CF8042F ldr r2, [ip, #4]! 13567 .LVL2190: 13568 00c6 2E68 ldr r6, [r5] 13569 00c8 DCF80400 ldr r0, [ip, #4] 13570 00cc 82FB0323 smull r2, r3, r2, r3 13571 00d0 C6FB0123 smlal r2, r3, r6, r1 13572 .LVL2191: 13573 00d4 55F8081C ldr r1, [r5, #-8] 13574 00d8 C1FB0023 smlal r2, r3, r1, r0 13575 .LVL2192: 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 545 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement loop counter */ 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k--; 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** *pOut++ = (q31_t) (sum >> 31); 13576 .loc 32 471 0 13577 00dc D20F lsrs r2, r2, #31 13578 00de 42EA4302 orr r2, r2, r3, lsl #1 13579 00e2 44F8042B str r2, [r4], #4 13580 .LVL2193: 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13581 .loc 32 453 0 13582 00e6 7445 cmp r4, lr 13583 00e8 E7D1 bne .L928 13584 00ea 3C46 mov r4, r7 13585 .LVL2194: 13586 00ec 55E0 b .L924 13587 .LVL2195: 13588 .L914: 13589 00ee 0398 ldr r0, [sp, #12] 13590 00f0 8244 add r10, r10, r0 13591 00f2 1198 ldr r0, [sp, #68] 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); 13592 .loc 32 124 0 discriminator 1 13593 00f4 A142 cmp r1, r4 13594 00f6 00F1010E add lr, r0, #1 13595 00fa 76D8 bhi .L916 13596 .LVL2196: 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 13597 .loc 32 125 0 discriminator 8 13598 00fc 029A ldr r2, [sp, #8] 13599 00fe 5242 negs r2, r2 13600 0100 0492 str r2, [sp, #16] 13601 .LVL2197: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13602 .loc 32 169 0 discriminator 8 13603 0102 129A ldr r2, [sp, #72] 13604 .LVL2198: 13605 0104 002A cmp r2, #0 13606 0106 00F0A980 beq .L959 13607 .LVL2199: 13608 .L917: 13609 010a 7244 add r2, r2, lr 13610 .LVL2200: 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 13611 .loc 32 125 0 13612 010c 9B46 mov fp, r3 13613 010e 0593 str r3, [sp, #20] 13614 0110 7346 mov r3, lr 13615 0112 9446 mov ip, r2 13616 0114 A646 mov lr, r4 13617 0116 1C46 mov r4, r3 13618 .LVL2201: 13619 .L919: 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13620 .loc 32 207 0 ARM GAS /tmp/ccJrAs6S.s page 546 13621 0118 2346 mov r3, r4 13622 011a 74B1 cbz r4, .L921 13623 011c 5546 mov r5, r10 13624 011e 4A46 mov r2, r9 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13625 .loc 32 172 0 13626 0120 0020 movs r0, #0 13627 0122 0021 movs r1, #0 13628 .LVL2202: 13629 .L918: 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13630 .loc 32 210 0 13631 0124 52F8047B ldr r7, [r2], #4 13632 .LVL2203: 13633 0128 55F80469 ldr r6, [r5], #-4 13634 .LVL2204: 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13635 .loc 32 207 0 13636 012c 013B subs r3, r3, #1 13637 .LVL2205: 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13638 .loc 32 210 0 13639 012e C6FB0701 smlal r0, r1, r6, r7 13640 .LVL2206: 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13641 .loc 32 207 0 13642 0132 F7D1 bne .L918 13643 0134 C30F lsrs r3, r0, #31 13644 0136 43EA4103 orr r3, r3, r1, lsl #1 13645 .LVL2207: 13646 .L921: 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13647 .loc 32 224 0 13648 013a 0134 adds r4, r4, #1 13649 .LVL2208: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13650 .loc 32 169 0 13651 013c 6445 cmp r4, ip 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13652 .loc 32 217 0 13653 013e 4BF8043B str r3, [fp], #4 13654 .LVL2209: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** px = pIn1; 13655 .loc 32 220 0 13656 0142 0AF1040A add r10, r10, #4 13657 .LVL2210: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13658 .loc 32 169 0 13659 0146 E7D1 bne .L919 13660 0148 129A ldr r2, [sp, #72] 13661 014a 059B ldr r3, [sp, #20] 13662 014c 03EB8203 add r3, r3, r2, lsl #2 13663 0150 119A ldr r2, [sp, #68] 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13664 .loc 32 241 0 13665 0152 A2EB0802 sub r2, r2, r8 13666 0156 002A cmp r2, #0 ARM GAS /tmp/ccJrAs6S.s page 547 13667 0158 7446 mov r4, lr 13668 .LVL2211: 13669 015a 8ADA bge .L960 13670 .LVL2212: 13671 .L940: 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 13672 .loc 32 247 0 13673 015c CC46 mov ip, r9 13674 015e 8FE7 b .L922 13675 .LVL2213: 13676 .L923: 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13677 .loc 32 392 0 13678 0160 002A cmp r2, #0 13679 0162 5BD0 beq .L942 13680 0164 03EB820E add lr, r3, r2, lsl #2 13681 0168 9A46 mov r10, r3 13682 016a A346 mov fp, r4 13683 .LVL2214: 13684 .L932: 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13685 .loc 32 453 0 13686 016c 4246 mov r2, r8 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py = pSrc2; 13687 .loc 32 252 0 13688 016e 2F46 mov r7, r5 13689 0170 6646 mov r6, ip 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13690 .loc 32 395 0 13691 0172 0020 movs r0, #0 13692 0174 0021 movs r1, #0 13693 .LVL2215: 13694 .L931: 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13695 .loc 32 427 0 13696 0176 56F8044B ldr r4, [r6], #4 13697 .LVL2216: 13698 017a 57F80439 ldr r3, [r7], #-4 13699 .LVL2217: 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13700 .loc 32 424 0 13701 017e 013A subs r2, r2, #1 13702 .LVL2218: 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13703 .loc 32 427 0 13704 0180 C3FB0401 smlal r0, r1, r3, r4 13705 .LVL2219: 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13706 .loc 32 424 0 13707 0184 F7D1 bne .L931 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13708 .loc 32 434 0 13709 0186 C30F lsrs r3, r0, #31 13710 0188 43EA4103 orr r3, r3, r1, lsl #1 13711 018c 4AF8043B str r3, [r10], #4 13712 .LVL2220: 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { ARM GAS /tmp/ccJrAs6S.s page 548 13713 .loc 32 392 0 13714 0190 F245 cmp r10, lr 13715 0192 0CF1040C add ip, ip, #4 13716 .LVL2221: 13717 0196 E9D1 bne .L932 13718 0198 5C46 mov r4, fp 13719 .LVL2222: 13720 .L924: 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Increment the MAC count */ 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** count++; 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** px = pSrc1 + count; 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py = pSrc2; 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement the loop counter */ 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blkCnt--; 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* -------------------------- 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Initializations of stage3 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * -------------------------*/ 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[src 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[src 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * .... 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * sum += x[srcALen-1] * y[srcBLen-1] 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** */ 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** The blockSize3 variable holds the number of MAC operations performed */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** count = srcBLen - 1U; 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Working pointer of inputA */ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); 13721 .loc 32 502 0 13722 019a 019B ldr r3, [sp, #4] 13723 019c 0133 adds r3, r3, #1 13724 019e A3EB0808 sub r8, r3, r8 13725 .LVL2223: 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** px = pSrc1; 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Working pointer of inputB */ 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** pSrc2 = pIn2 + (srcBLen - 1U); 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py = pSrc2; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* ------------------- 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * Stage3 process 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** * ------------------*/ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (blockSize3 > 0U) 13726 .loc 32 513 0 13727 01a2 029B ldr r3, [sp, #8] ARM GAS /tmp/ccJrAs6S.s page 549 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** px = pSrc1; 13728 .loc 32 502 0 13729 01a4 09EB8809 add r9, r9, r8, lsl #2 13730 .LVL2224: 13731 .loc 32 513 0 13732 01a8 DBB1 cbz r3, .L933 13733 01aa AC46 mov ip, r5 13734 01ac A4EB0308 sub r8, r4, r3 13735 01b0 2546 mov r5, r4 13736 .LVL2225: 13737 .L934: 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Accumulator is made zero for every iteration */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum = 0; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k = count >> 2U; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (k > 0U) 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * *py--; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * *py--; 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * *py--; 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * *py--; 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement loop counter */ 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k--; 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Loop unrolling: Compute remaining outputs */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k = count % 0x4U; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #else 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Initialize blkCnt with number of samples */ 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k = count; 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** while (k > 0U) 13738 .loc 32 551 0 13739 01b2 2B46 mov r3, r5 13740 01b4 75B1 cbz r5, .L936 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py = pSrc2; 13741 .loc 32 252 0 13742 01b6 6646 mov r6, ip 13743 .loc 32 551 0 13744 01b8 4A46 mov r2, r9 ARM GAS /tmp/ccJrAs6S.s page 550 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13745 .loc 32 516 0 13746 01ba 0020 movs r0, #0 13747 01bc 0021 movs r1, #0 13748 .LVL2226: 13749 .L935: 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Perform the multiply-accumulate */ 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* sum += x[srcALen-1] * y[srcBLen-1] */ 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += (q63_t) *px++ * *py--; 13750 .loc 32 555 0 13751 01be 52F8044B ldr r4, [r2], #4 13752 .LVL2227: 13753 01c2 56F80479 ldr r7, [r6], #-4 13754 .LVL2228: 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13755 .loc 32 551 0 13756 01c6 013B subs r3, r3, #1 13757 .LVL2229: 13758 .loc 32 555 0 13759 01c8 C7FB0401 smlal r0, r1, r7, r4 13760 .LVL2230: 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13761 .loc 32 551 0 13762 01cc F7D1 bne .L935 13763 01ce C30F lsrs r3, r0, #31 13764 01d0 43EA4103 orr r3, r3, r1, lsl #1 13765 .LVL2231: 13766 .L936: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement loop counter */ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** k--; 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** *pOut++ = (q31_t) (sum >> 31); 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** px = ++pSrc1; 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py = pSrc2; 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement MAC count */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** count--; 13767 .loc 32 569 0 13768 01d4 013D subs r5, r5, #1 13769 .LVL2232: 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13770 .loc 32 513 0 13771 01d6 4545 cmp r5, r8 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13772 .loc 32 562 0 13773 01d8 4EF8043B str r3, [lr], #4 13774 .LVL2233: 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** py = pSrc2; 13775 .loc 32 565 0 13776 01dc 09F10409 add r9, r9, #4 13777 .LVL2234: ARM GAS /tmp/ccJrAs6S.s page 551 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13778 .loc 32 513 0 13779 01e0 E7D1 bne .L934 13780 .LVL2235: 13781 .L933: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Decrement the loop counter */ 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize3--; 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** status = ARM_MATH_SUCCESS; 13782 .loc 32 576 0 13783 01e2 0020 movs r0, #0 13784 .LVL2236: 13785 .L956: 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Return to application */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** return (status); 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #else 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* alternate version for CM0_FAMILY */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** const q31_t *pIn1 = pSrcA; /* InputA pointer */ 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** const q31_t *pIn2 = pSrcB; /* InputB pointer */ 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** q63_t sum; /* Accumulator */ 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** uint32_t i, j; /* Loop counters */ 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** arm_status status; /* Status of Partial convolution */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Check for range of output samples to be calculated */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** status = ARM_MATH_ARGUMENT_ERROR; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** else 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Loop to calculate convolution for output length number of values */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Initialize sum with zero to carry on MAC operations */ 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum = 0; 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Loop to perform MAC operations according to convolution equation */ 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** for (j = 0U; j <= i; j++) 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Check the array limitations */ 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** if (((i - j) < srcBLen) && (j < srcALen)) 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* z[i] += x[i-j] * y[j] */ 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** sum += ((q63_t) pIn1[j] * pIn2[i - j]); 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Store the output in the destination buffer */ 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** pDst[i] = (q31_t) (sum >> 31U); ARM GAS /tmp/ccJrAs6S.s page 552 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** status = ARM_MATH_SUCCESS; 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** /* Return to application */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** return (status); 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 13786 .loc 32 629 0 13787 01e4 07B0 add sp, sp, #28 13788 .LCFI84: 13789 .cfi_remember_state 13790 .cfi_def_cfa_offset 36 13791 @ sp needed 13792 01e6 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 13793 .LVL2237: 13794 .L916: 13795 .LCFI85: 13796 .cfi_restore_state 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 13797 .loc 32 125 0 13798 01ea 1299 ldr r1, [sp, #72] 13799 .LVL2238: 13800 01ec 1292 str r2, [sp, #72] 13801 .LVL2239: 13802 01ee 881A subs r0, r1, r2 13803 01f0 0299 ldr r1, [sp, #8] 13804 01f2 411A subs r1, r0, r1 13805 01f4 0491 str r1, [sp, #16] 13806 .LVL2240: 13807 01f6 88E7 b .L917 13808 .LVL2241: 13809 .L927: 13810 01f8 ACF1040C sub ip, ip, #4 13811 .LVL2242: 13812 01fc 03EB820E add lr, r3, r2, lsl #2 13813 0200 1946 mov r1, r3 13814 .LVL2243: 13815 .L929: 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13816 .loc 32 464 0 13817 0202 2A68 ldr r2, [r5] 13818 0204 5CF8043F ldr r3, [ip, #4]! 13819 .LVL2244: 13820 0208 82FB0367 smull r6, r7, r2, r3 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13821 .loc 32 471 0 13822 020c F20F lsrs r2, r6, #31 13823 020e 42EA4702 orr r2, r2, r7, lsl #1 13824 0212 41F8042B str r2, [r1], #4 13825 .LVL2245: 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13826 .loc 32 453 0 ARM GAS /tmp/ccJrAs6S.s page 553 13827 0216 7145 cmp r1, lr 13828 0218 F3D1 bne .L929 13829 021a BEE7 b .L924 13830 .LVL2246: 13831 .L942: 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13832 .loc 32 392 0 13833 021c 9E46 mov lr, r3 13834 021e BCE7 b .L924 13835 .LVL2247: 13836 .L925: 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13837 .loc 32 471 0 13838 0220 9600 lsls r6, r2, #2 13839 0222 3246 mov r2, r6 13840 .LVL2248: 13841 0224 4146 mov r1, r8 13842 0226 1846 mov r0, r3 13843 0228 FFF7FEFF bl memset 13844 .LVL2249: 13845 022c 00EB060E add lr, r0, r6 13846 0230 B3E7 b .L924 13847 .LVL2250: 13848 .L926: 13849 0232 03EB8200 add r0, r3, r2, lsl #2 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13850 .loc 32 453 0 13851 0236 9E46 mov lr, r3 13852 .LVL2251: 13853 .L930: 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13854 .loc 32 464 0 13855 0238 55E90132 ldrd r3, r2, [r5, #-4] 13856 023c DCF80060 ldr r6, [ip] 13857 .LVL2252: 13858 0240 5CF8041F ldr r1, [ip, #4]! 13859 .LVL2253: 13860 0244 86FB0267 smull r6, r7, r6, r2 13861 .LVL2254: 13862 0248 C1FB0367 smlal r6, r7, r1, r3 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13863 .loc 32 471 0 13864 024c F30F lsrs r3, r6, #31 13865 024e 43EA4703 orr r3, r3, r7, lsl #1 13866 0252 4EF8043B str r3, [lr], #4 13867 .LVL2255: 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** { 13868 .loc 32 453 0 13869 0256 7045 cmp r0, lr 13870 0258 EED1 bne .L930 13871 025a 9EE7 b .L924 13872 .LVL2256: 13873 .L959: 13874 025c 0246 mov r2, r0 13875 .LVL2257: 13876 025e 04E7 b .L915 13877 .LVL2258: ARM GAS /tmp/ccJrAs6S.s page 554 13878 .L937: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** } 13879 .loc 32 89 0 13880 0260 4FF0FF30 mov r0, #-1 13881 .LVL2259: 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c **** 13882 .loc 32 580 0 13883 0264 BEE7 b .L956 13884 .cfi_endproc 13885 .LFE177: 13887 0266 00BF .section .text.arm_conv_partial_q7,"ax",%progbits 13888 .align 1 13889 .p2align 2,,3 13890 .global arm_conv_partial_q7 13891 .syntax unified 13892 .thumb 13893 .thumb_func 13894 .fpu fpv4-sp-d16 13896 arm_conv_partial_q7: 13897 .LFB178: 13898 .file 33 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Title: arm_conv_partial_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Description: Partial convolution of Q7 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @addtogroup PartialConv ARM GAS /tmp/ccJrAs6S.s page 555 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @brief Partial convolution of Q7 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @param[out] pDst points to the location where the output result is written 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @param[in] firstIndex is the first output sample to start with 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @param[in] numPoints is the number of output points to be computed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @return execution status 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** - \ref ARM_MATH_SUCCESS : Operation successful 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** @remark 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** Refer to \ref arm_conv_partial_opt_q7() for a faster implementation of this func 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** arm_status arm_conv_partial_q7( 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** const q7_t * pSrcA, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** uint32_t srcALen, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** const q7_t * pSrcB, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** uint32_t srcBLen, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** q7_t * pDst, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** uint32_t firstIndex, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** uint32_t numPoints) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 13899 .loc 33 65 0 13900 .cfi_startproc 13901 @ args = 12, pretend = 0, frame = 16 13902 @ frame_needed = 0, uses_anonymous_args = 0 13903 .LVL2260: 13904 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 13905 .LCFI86: 13906 .cfi_def_cfa_offset 36 13907 .cfi_offset 4, -36 13908 .cfi_offset 5, -32 13909 .cfi_offset 6, -28 13910 .cfi_offset 7, -24 13911 .cfi_offset 8, -20 13912 .cfi_offset 9, -16 13913 .cfi_offset 10, -12 13914 .cfi_offset 11, -8 13915 .cfi_offset 14, -4 13916 0004 85B0 sub sp, sp, #20 13917 .LCFI87: 13918 .cfi_def_cfa_offset 56 13919 .LVL2261: 13920 .loc 33 65 0 13921 0006 8846 mov r8, r1 13922 0008 109C ldr r4, [sp, #64] 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #if ARM_MATH_DSP 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** const q7_t *pIn1; /* InputA pointer */ ARM GAS /tmp/ccJrAs6S.s page 556 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** const q7_t *pIn2; /* InputB pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** q7_t *pOut = pDst; /* Output pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** const q7_t *px; /* Intermediate inputA pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** const q7_t *py; /* Intermediate inputB pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** const q7_t *pSrc1, *pSrc2; /* Intermediate pointers */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** q31_t sum; /* Accumulator */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** uint32_t j, k, count, blkCnt, check; /* Loop counters */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** arm_status status; /* Status of Partial convolution */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** q31_t acc0, acc1, acc2, acc3; /* Accumulator */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** q31_t input1, input2; /* Temporary input variables */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** q15_t in1, in2; /* Temporary input variables */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** q7_t x0, x1, x2, x3, c0, c1; /* Temporary variables to hold state and coe 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #endif 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Check for range of output samples to be calculated */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) 13923 .loc 33 88 0 13924 000a 0F9D ldr r5, [sp, #60] 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 13925 .loc 33 65 0 13926 000c 0290 str r0, [sp, #8] 13927 000e 0139 subs r1, r1, #1 13928 .LVL2262: 13929 .loc 33 88 0 13930 0010 CE18 adds r6, r1, r3 13931 0012 2544 add r5, r5, r4 13932 0014 B542 cmp r5, r6 13933 0016 00F22581 bhi .L993 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** status = ARM_MATH_ARGUMENT_ERROR; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** else 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* srcB is always made to slide across srcA. */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** if (srcALen >= srcBLen) 13934 .loc 33 98 0 13935 001a 4345 cmp r3, r8 13936 001c 9346 mov fp, r2 13937 001e 07D8 bhi .L963 13938 0020 0746 mov r7, r0 13939 0022 1046 mov r0, r2 13940 .LVL2263: 13941 0024 1A46 mov r2, r3 13942 .LVL2264: 13943 0026 591E subs r1, r3, #1 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Initialization of inputA pointer */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** pIn1 = pSrcA; 13944 .loc 33 101 0 13945 0028 BB46 mov fp, r7 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { ARM GAS /tmp/ccJrAs6S.s page 557 13946 .loc 33 98 0 13947 002a 4346 mov r3, r8 13948 .LVL2265: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Initialization of inputB pointer */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** pIn2 = pSrcB; 13949 .loc 33 104 0 13950 002c 0290 str r0, [sp, #8] 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 13951 .loc 33 98 0 13952 002e 9046 mov r8, r2 13953 .LVL2266: 13954 .L963: 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** else 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Initialization of inputA pointer */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** pIn1 = pSrcB; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Initialization of inputB pointer */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** pIn2 = pSrcA; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** j = srcBLen; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** srcBLen = srcALen; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** srcALen = j; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Conditions to check which loopCounter holds 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * the first and last indices of the output samples to be calculated. */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** check = firstIndex + numPoints; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0; 13955 .loc 33 123 0 13956 0030 9D42 cmp r5, r3 13957 0032 CCBF ite gt 13958 0034 EA1A subgt r2, r5, r3 13959 0036 0022 movle r2, #0 13960 0038 0192 str r2, [sp, #4] 13961 .LVL2267: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + 13962 .loc 33 124 0 13963 003a 0F9A ldr r2, [sp, #60] 13964 003c 9342 cmp r3, r2 13965 003e 04DC bgt .L965 13966 .loc 33 124 0 is_stmt 0 discriminator 1 13967 0040 0198 ldr r0, [sp, #4] 13968 0042 9A1A subs r2, r3, r2 13969 .LVL2268: 13970 0044 1044 add r0, r0, r2 13971 .LVL2269: 13972 0046 0F9A ldr r2, [sp, #60] 13973 0048 0190 str r0, [sp, #4] 13974 .LVL2270: 13975 .L965: 13976 004a DDE90E06 ldrd r0, r6, [sp, #56] 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; 13977 .loc 33 125 0 is_stmt 1 discriminator 4 ARM GAS /tmp/ccJrAs6S.s page 558 13978 004e D243 mvns r2, r2 13979 .LVL2271: 13980 0050 00EB0609 add r9, r0, r6 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : numPoints) : 0; 13981 .loc 33 126 0 discriminator 4 13982 0054 12EB0800 adds r0, r2, r8 13983 .LVL2272: 13984 0058 65D1 bne .L966 13985 .LVL2273: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); 13986 .loc 33 127 0 13987 005a 019A ldr r2, [sp, #4] 13988 005c A21A subs r2, r4, r2 13989 005e 0392 str r2, [sp, #12] 13990 .LVL2274: 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* The function is internally 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * divided into three stages according to the number of multiplications that has to be 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * taken place between inputA samples and inputB samples. In the first stage of the 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * algorithm, the multiplications increase by one for every iteration. 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * In the third stage of the algorithm, the multiplications decrease by one 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * for every iteration. */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Set the output pointer to point to the firstIndex 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * of the output sample to be calculated. */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** pOut = pDst + firstIndex; 13991 .loc 33 141 0 13992 0060 CE46 mov lr, r9 13993 0062 3246 mov r2, r6 13994 .LVL2275: 13995 .L967: 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* -------------------------- 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Initializations of stage1 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * -------------------------*/ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* sum = x[0] * y[0] 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * sum = x[0] * y[1] + x[1] * y[0] 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * .... 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** The count variable holds the number of MAC operations performed. 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** Since the partial convolution starts from firstIndex 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** Number of Macs to be performed is firstIndex + 1 */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** count = 1U + firstIndex; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Working pointer of inputA */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** px = pIn1; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Working pointer of inputB */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** pSrc2 = pIn2 + firstIndex; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** py = pSrc2; ARM GAS /tmp/ccJrAs6S.s page 559 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* ------------------------ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Stage1 process 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * ----------------------*/ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* The first stage starts here */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (blockSize1 > 0U) 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Accumulator is made zero for every iteration */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum = 0; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k = count >> 2U; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (k > 0U) 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[0] , x[1] */ 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) *px++; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) *px++; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* y[srcBLen - 1] , y[srcBLen - 2] */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) *py--; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) *py--; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[0] * y[srcBLen - 1] */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[1] * y[srcBLen - 2] */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum = __SMLAD(input1, input2, sum); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[2] , x[3] */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) *px++; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) *px++; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* y[srcBLen - 3] , y[srcBLen - 4] */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) *py--; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) *py--; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[2] * y[srcBLen - 3] */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[3] * y[srcBLen - 4] */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum = __SMLAD(input1, input2, sum); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement loop counter */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k--; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Loop unrolling: Compute remaining outputs */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k = count % 0x4U; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #else 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Initialize k with number of samples */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k = count; ARM GAS /tmp/ccJrAs6S.s page 560 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (k > 0U) 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Perform the multiply-accumulate */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum += ((q31_t) * px++ * *py--); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement loop counter */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k--; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** *pOut++ = (q7_t) (__SSAT(sum >> 7, 8)); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** py = ++pSrc2; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** px = pIn1; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Increment MAC count */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** count++; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement loop counter */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blockSize1--; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* -------------------------- 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Initializations of stage2 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * ------------------------*/ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * .... 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Working pointer of inputA */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) 13996 .loc 33 259 0 13997 0064 A2EB0802 sub r2, r2, r8 13998 0068 002A cmp r2, #0 13999 006a C0F28B80 blt .L995 14000 .LVL2276: 14001 .L1016: 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** pSrc1 = pIn1 + firstIndex - srcBLen + 1; 14002 .loc 33 261 0 14003 006e 0F9A ldr r2, [sp, #60] 14004 0070 0132 adds r2, r2, #1 14005 0072 A2EB0802 sub r2, r2, r8 14006 0076 5A44 add r2, r2, fp 14007 .LVL2277: 14008 .L974: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** else 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** pSrc1 = pIn1; ARM GAS /tmp/ccJrAs6S.s page 561 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** px = pSrc1; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Working pointer of inputB */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** pSrc2 = pIn2 + (srcBLen - 1U); 14009 .loc 33 270 0 14010 0078 0298 ldr r0, [sp, #8] 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** py = pSrc2; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* count is the index by which the pointer pIn1 to be incremented */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** count = 0U; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* ------------------- 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Stage2 process 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * ------------------*/ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * So, to loop unroll over blockSize2, 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * srcBLen should be greater than or equal to 4 */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** if (srcBLen >= 4U) 14011 .loc 33 283 0 14012 007a B8F1030F cmp r8, #3 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** py = pSrc2; 14013 .loc 33 270 0 14014 007e 0844 add r0, r0, r1 14015 0080 8146 mov r9, r0 14016 .LVL2278: 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blkCnt = ((uint32_t) blockSize2 >> 2U); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (blkCnt > 0U) 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Set all accumulators to zero */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc0 = 0; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc1 = 0; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc2 = 0; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc3 = 0; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* read x[0], x[1], x[2] samples */ 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** x0 = *px++; 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** x1 = *px++; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** x2 = *px++; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k = srcBLen >> 2U; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** do 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Read y[srcBLen - 1] sample */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** c0 = *py--; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Read y[srcBLen - 2] sample */ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** c1 = *py--; ARM GAS /tmp/ccJrAs6S.s page 562 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Read x[3] sample */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** x3 = *px++; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[0] and x[1] are packed */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) x0; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) x1; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* y[srcBLen - 1] and y[srcBLen - 2] are packed */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) c0; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) c1; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc0 = __SMLAD(input1, input2, acc0); 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[1] and x[2] are packed */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) x1; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) x2; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc1 = __SMLAD(input1, input2, acc1); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[2] and x[3] are packed */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) x2; 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) x3; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc2 = __SMLAD(input1, input2, acc2); 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Read x[4] sample */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** x0 = *px++; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[3] and x[4] are packed */ 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) x3; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) x0; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc3 = __SMLAD(input1, input2, acc3); 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Read y[srcBLen - 3] sample */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** c0 = *py--; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Read y[srcBLen - 4] sample */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** c1 = *py--; 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Read x[5] sample */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** x1 = *px++; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 563 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[2] and x[3] are packed */ 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) x2; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) x3; 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* y[srcBLen - 3] and y[srcBLen - 4] are packed */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) c0; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) c1; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc0 = __SMLAD(input1, input2, acc0); 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[3] and x[4] are packed */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) x3; 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) x0; 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc1 = __SMLAD(input1, input2, acc1); 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[4] and x[5] are packed */ 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) x0; 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) x1; 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc2 = __SMLAD(input1, input2, acc2); 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Read x[6] sample */ 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** x2 = *px++; 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* x[5] and x[6] are packed */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) x1; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) x2; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc3 = __SMLAD(input1, input2, acc3); 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } while (--k); 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** ** No loop unrolling is used. */ 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k = srcBLen % 0x4U; 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (k > 0U) 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Read y[srcBLen - 5] sample */ 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** c0 = *py--; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Read x[7] sample */ 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** x3 = *px++; ARM GAS /tmp/ccJrAs6S.s page 564 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Perform the multiply-accumulates */ 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* acc0 += x[4] * y[srcBLen - 5] */ 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc0 += ((q31_t) x0 * c0); 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc1 += ((q31_t) x1 * c0); 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc2 += ((q31_t) x2 * c0); 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** acc3 += ((q31_t) x3 * c0); 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Reuse the present samples for the next MAC */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** x0 = x1; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** x1 = x2; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** x2 = x3; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement the loop counter */ 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k--; 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** *pOut++ = (q7_t) (__SSAT(acc0 >> 7, 8)); 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** *pOut++ = (q7_t) (__SSAT(acc1 >> 7, 8)); 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** *pOut++ = (q7_t) (__SSAT(acc2 >> 7, 8)); 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** *pOut++ = (q7_t) (__SSAT(acc3 >> 7, 8)); 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Increment the pointer pIn1 index, count by 4 */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** count += 4U; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** px = pSrc1 + count; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** py = pSrc2; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement loop counter */ 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blkCnt--; 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Loop unrolling: Compute remaining outputs */ 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blkCnt = (uint32_t) blockSize2 % 0x4U; 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #else 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Initialize blkCnt with number of samples */ 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blkCnt = blockSize2; 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (blkCnt > 0U) 14017 .loc 33 475 0 14018 0082 0398 ldr r0, [sp, #12] 14019 .LVL2279: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14020 .loc 33 283 0 14021 0084 00F28280 bhi .L975 14022 .LVL2280: 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Accumulator is made zero for every iteration */ ARM GAS /tmp/ccJrAs6S.s page 565 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum = 0; 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k = srcBLen >> 2U; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (k > 0U) 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Reading two inputs of SrcA buffer and packing */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) *px++; 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) *px++; 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Reading two inputs of SrcB buffer and packing */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) *py--; 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) *py--; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Perform the multiply-accumulate */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum = __SMLAD(input1, input2, sum); 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Reading two inputs of SrcA buffer and packing */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) *px++; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) *px++; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Reading two inputs of SrcB buffer and packing */ 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) *py--; 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) *py--; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Perform the multiply-accumulate */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum = __SMLAD(input1, input2, sum); 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement loop counter */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k--; 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Loop unrolling: Compute remaining outputs */ 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k = srcBLen % 0x4U; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #else 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Initialize blkCnt with number of samples */ 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k = srcBLen; 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (k > 0U) 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Perform the multiply-accumulate */ 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum += ((q31_t) * px++ * *py--); 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement loop counter */ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k--; 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } ARM GAS /tmp/ccJrAs6S.s page 566 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** *pOut++ = (q7_t) (__SSAT(sum >> 7, 8)); 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Increment the pointer pIn1 index, count by 1 */ 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** count++; 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** px = pSrc1 + count; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** py = pSrc2; 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement loop counter */ 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blkCnt--; 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** else 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* If the srcBLen is not a multiple of 4, 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * the blockSize2 loop cannot be unrolled by 4 */ 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blkCnt = (uint32_t) blockSize2; 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (blkCnt > 0U) 14023 .loc 33 556 0 14024 0088 0028 cmp r0, #0 14025 008a 00F0B280 beq .L997 14026 008e B8F1000F cmp r8, #0 14027 0092 00F0B080 beq .L977 14028 0096 B8F1020F cmp r8, #2 14029 009a 00F0B780 beq .L978 14030 009e 0029 cmp r1, #0 14031 00a0 00F09680 beq .L979 14032 00a4 7044 add r0, r0, lr 14033 00a6 0746 mov r7, r0 14034 .LVL2281: 14035 .L980: 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Accumulator is made zero for every iteration */ 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum = 0; 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* srcBLen number of MACS should be performed */ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k = srcBLen; 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (k > 0U) 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Perform the multiply-accumulate */ 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum += ((q31_t) * px++ * *py--); 14036 .loc 33 567 0 14037 00a8 92F90040 ldrsb r4, [r2] 14038 .LVL2282: 14039 00ac 19F9010C ldrsb r0, [r9, #-1] 14040 00b0 12F9015F ldrsb r5, [r2, #1]! 14041 .LVL2283: 14042 00b4 99F900C0 ldrsb ip, [r9] 14043 00b8 19F9026C ldrsb r6, [r9, #-2] 14044 00bc 15FB00F5 smulbb r5, r5, r0 14045 00c0 92F90100 ldrsb r0, [r2, #1] 14046 00c4 14FB0C54 smlabb r4, r4, ip, r5 ARM GAS /tmp/ccJrAs6S.s page 567 14047 .LVL2284: 14048 00c8 10FB0640 smlabb r0, r0, r6, r4 14049 .LBB1753: 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement loop counter */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k--; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** *pOut++ = (q7_t) (__SSAT(sum >> 7, 8)); 14050 .loc 33 574 0 14051 00cc C011 asrs r0, r0, #7 14052 .syntax unified 14053 @ 574 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c" 14054 00ce 00F30700 ssat r0, #8, r0 14055 @ 0 "" 2 14056 .LVL2285: 14057 .thumb 14058 .syntax unified 14059 .LBE1753: 14060 00d2 0EF8010B strb r0, [lr], #1 14061 .LVL2286: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14062 .loc 33 556 0 14063 00d6 BE45 cmp lr, r7 14064 00d8 E6D1 bne .L980 14065 .LVL2287: 14066 .L976: 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Increment the MAC count */ 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** count++; 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** px = pSrc1 + count; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** py = pSrc2; 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement the loop counter */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blkCnt--; 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* -------------------------- 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Initializations of stage3 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * -------------------------*/ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[src 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[src 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * .... 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * sum += x[srcALen-1] * y[srcBLen-1] 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** */ 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** The count variable holds the number of MAC operations performed */ 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** count = srcBLen - 1U; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 568 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Working pointer of inputA */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); 14067 .loc 33 605 0 14068 00da 0133 adds r3, r3, #1 14069 .LVL2288: 14070 00dc A3EB0808 sub r8, r3, r8 14071 .LVL2289: 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** px = pSrc1; 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Working pointer of inputB */ 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** pSrc2 = pIn2 + (srcBLen - 1U); 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** py = pSrc2; 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* ------------------- 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * Stage3 process 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** * ------------------*/ 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (blockSize3 > 0U) 14072 .loc 33 616 0 14073 00e0 019B ldr r3, [sp, #4] 14074 .LVL2290: 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** px = pSrc1; 14075 .loc 33 605 0 14076 00e2 C344 add fp, fp, r8 14077 .LVL2291: 14078 .loc 33 616 0 14079 00e4 DBB1 cbz r3, .L988 14080 00e6 3B44 add r3, r3, r7 14081 00e8 9C46 mov ip, r3 14082 .LVL2292: 14083 .L989: 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Accumulator is made zero for every iteration */ 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum = 0; 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k = count >> 2U; 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (k > 0U) 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) *px++; 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) *px++; 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */ 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) *py--; 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) *py--; 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum = __SMLAD(input1, input2, sum); 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer ARM GAS /tmp/ccJrAs6S.s page 569 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) *px++; 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) *px++; 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */ 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in1 = (q15_t) *py--; 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** in2 = (q15_t) *py--; 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum = __SMLAD(input1, input2, sum); 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement loop counter */ 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k--; 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Loop unrolling: Compute remaining outputs */ 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k = count % 0x4U; 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #else 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Initialize blkCnt with number of samples */ 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k = count; 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** while (k > 0U) 14084 .loc 33 670 0 14085 00ea 0029 cmp r1, #0 14086 00ec 68D0 beq .L1013 14087 00ee 0BEB0106 add r6, fp, r1 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** py = pSrc2; 14088 .loc 33 270 0 14089 00f2 4846 mov r0, r9 14090 .loc 33 670 0 14091 00f4 5B46 mov r3, fp 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14092 .loc 33 619 0 14093 00f6 0022 movs r2, #0 14094 .LVL2293: 14095 .L990: 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Perform the multiply-accumulates */ 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* sum += x[srcALen-1] * y[srcBLen-1] */ 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum += ((q31_t) * px++ * *py--); 14096 .loc 33 674 0 14097 00f8 13F9015B ldrsb r5, [r3], #1 14098 .LVL2294: 14099 00fc 10F90149 ldrsb r4, [r0], #-1 14100 .LVL2295: 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14101 .loc 33 670 0 14102 0100 9E42 cmp r6, r3 14103 .loc 33 674 0 14104 0102 15FB0422 smlabb r2, r5, r4, r2 14105 .LVL2296: ARM GAS /tmp/ccJrAs6S.s page 570 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14106 .loc 33 670 0 14107 0106 F7D1 bne .L990 14108 0108 D211 asrs r2, r2, #7 14109 .LVL2297: 14110 .L992: 14111 .LBB1754: 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement loop counter */ 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** k--; 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** *pOut++ = (q7_t) (__SSAT(sum >> 7, 8)); 14112 .loc 33 681 0 14113 .syntax unified 14114 @ 681 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c" 14115 010a 02F30702 ssat r2, #8, r2 14116 @ 0 "" 2 14117 .LVL2298: 14118 .thumb 14119 .syntax unified 14120 .LBE1754: 14121 010e 07F8012B strb r2, [r7], #1 14122 .LVL2299: 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14123 .loc 33 616 0 14124 0112 BC45 cmp ip, r7 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** px = ++pSrc1; 14125 .loc 33 684 0 14126 0114 0BF1010B add fp, fp, #1 14127 .LVL2300: 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** py = pSrc2; 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement MAC count */ 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** count--; 14128 .loc 33 688 0 14129 0118 01F1FF31 add r1, r1, #-1 14130 .LVL2301: 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14131 .loc 33 616 0 14132 011c E5D1 bne .L989 14133 .LVL2302: 14134 .L988: 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Decrement the loop counter */ 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blockSize3--; 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Set status as ARM_MATH_SUCCESS */ 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** status = ARM_MATH_SUCCESS; 14135 .loc 33 695 0 14136 011e 0020 movs r0, #0 14137 .LVL2303: 14138 .L1011: ARM GAS /tmp/ccJrAs6S.s page 571 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Return to application */ 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** return (status); 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #else 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* alternate version for CM0_FAMILY */ 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** const q7_t *pIn1 = pSrcA; /* InputA pointer */ 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** const q7_t *pIn2 = pSrcB; /* InputB pointer */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** q31_t sum; /* Accumulator */ 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** uint32_t i, j; /* Loop counters */ 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** arm_status status; /* Status of Partial convolution */ 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Check for range of output samples to be calculated */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Set status as ARM_MATH_ARGUMENT_ERROR */ 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** status = ARM_MATH_ARGUMENT_ERROR; 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** else 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Loop to calculate convolution for output length number of values */ 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Initialize sum with zero to carry on MAC operations */ 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum = 0; 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Loop to perform MAC operations according to convolution equation */ 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** for (j = 0U; j <= i; j++) 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Check the array limitations */ 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** if (((i - j) < srcBLen) && (j < srcALen)) 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* z[i] += x[i-j] * y[j] */ 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** sum += ((q15_t) pIn1[j] * (pIn2[i - j])); 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Store the output in the destination buffer */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U); 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Set status as ARM_MATH_SUCCESS */ 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** status = ARM_MATH_SUCCESS; 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** /* Return to application */ 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** return (status); 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 14139 .loc 33 748 0 14140 0120 05B0 add sp, sp, #20 14141 .LCFI88: 14142 .cfi_remember_state ARM GAS /tmp/ccJrAs6S.s page 572 14143 .cfi_def_cfa_offset 36 14144 @ sp needed 14145 0122 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 14146 .LVL2304: 14147 .L966: 14148 .LCFI89: 14149 .cfi_restore_state 14150 0126 3246 mov r2, r6 14151 0128 3746 mov r7, r6 14152 012a 029E ldr r6, [sp, #8] 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); 14153 .loc 33 126 0 discriminator 1 14154 012c 8D42 cmp r5, r1 14155 012e 02F10102 add r2, r2, #1 14156 0132 06EB070A add r10, r6, r7 14157 0136 45D8 bhi .L968 14158 .LVL2305: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 14159 .loc 33 127 0 discriminator 8 14160 0138 0198 ldr r0, [sp, #4] 14161 013a 4042 negs r0, r0 14162 013c 0390 str r0, [sp, #12] 14163 .LVL2306: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14164 .loc 33 171 0 discriminator 8 14165 013e 002C cmp r4, #0 14166 0140 7CD0 beq .L1014 14167 .LVL2307: 14168 .L969: 14169 0142 09EB040E add lr, r9, r4 14170 .LVL2308: 14171 .L971: 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14172 .loc 33 225 0 14173 0146 FAB1 cbz r2, .L1015 14174 0148 0BEB020C add ip, fp, r2 14175 014c 5546 mov r5, r10 14176 014e 5846 mov r0, fp 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14177 .loc 33 174 0 14178 0150 0024 movs r4, #0 14179 .LVL2309: 14180 .L970: 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14181 .loc 33 228 0 14182 0152 10F9017B ldrsb r7, [r0], #1 14183 .LVL2310: 14184 0156 15F90169 ldrsb r6, [r5], #-1 14185 .LVL2311: 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14186 .loc 33 225 0 14187 015a 6045 cmp r0, ip 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14188 .loc 33 228 0 14189 015c 17FB0644 smlabb r4, r7, r6, r4 14190 .LVL2312: 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { ARM GAS /tmp/ccJrAs6S.s page 573 14191 .loc 33 225 0 14192 0160 F7D1 bne .L970 14193 0162 E411 asrs r4, r4, #7 14194 .LVL2313: 14195 .L973: 14196 .LBB1755: 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14197 .loc 33 235 0 14198 .syntax unified 14199 @ 235 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c" 14200 0164 04F30704 ssat r4, #8, r4 14201 @ 0 "" 2 14202 .LVL2314: 14203 .thumb 14204 .syntax unified 14205 .LBE1755: 14206 0168 09F8014B strb r4, [r9], #1 14207 .LVL2315: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14208 .loc 33 171 0 14209 016c F145 cmp r9, lr 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** px = pIn1; 14210 .loc 33 238 0 14211 016e 0AF1010A add r10, r10, #1 14212 .LVL2316: 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14213 .loc 33 242 0 14214 0172 02F10102 add r2, r2, #1 14215 .LVL2317: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14216 .loc 33 171 0 14217 0176 E6D1 bne .L971 14218 0178 0F9A ldr r2, [sp, #60] 14219 .LVL2318: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14220 .loc 33 259 0 14221 017a A2EB0802 sub r2, r2, r8 14222 017e 002A cmp r2, #0 14223 0180 BFF675AF bge .L1016 14224 .LVL2319: 14225 .L995: 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 14226 .loc 33 265 0 14227 0184 5A46 mov r2, fp 14228 0186 77E7 b .L974 14229 .LVL2320: 14230 .L1015: 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14231 .loc 33 225 0 14232 0188 1446 mov r4, r2 14233 018a EBE7 b .L973 14234 .LVL2321: 14235 .L975: 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14236 .loc 33 475 0 14237 018c 88B3 cbz r0, .L997 14238 018e 7044 add r0, r0, lr ARM GAS /tmp/ccJrAs6S.s page 574 14239 0190 0746 mov r7, r0 14240 .LVL2322: 14241 .L987: 14242 0192 1646 mov r6, r2 14243 0194 08EB020A add r10, r8, r2 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** py = pSrc2; 14244 .loc 33 270 0 14245 0198 4C46 mov r4, r9 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14246 .loc 33 478 0 14247 019a 0020 movs r0, #0 14248 .LVL2323: 14249 .L986: 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14250 .loc 33 530 0 14251 019c 12F901CB ldrsb ip, [r2], #1 14252 .LVL2324: 14253 01a0 14F90159 ldrsb r5, [r4], #-1 14254 .LVL2325: 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14255 .loc 33 527 0 14256 01a4 5245 cmp r2, r10 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14257 .loc 33 530 0 14258 01a6 1CFB0500 smlabb r0, ip, r5, r0 14259 .LVL2326: 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14260 .loc 33 527 0 14261 01aa F7D1 bne .L986 14262 .LVL2327: 14263 .LBB1756: 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14264 .loc 33 537 0 14265 01ac C011 asrs r0, r0, #7 14266 .LVL2328: 14267 .syntax unified 14268 @ 537 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c" 14269 01ae 00F30700 ssat r0, #8, r0 14270 @ 0 "" 2 14271 .LVL2329: 14272 .thumb 14273 .syntax unified 14274 .LBE1756: 14275 01b2 0EF8010B strb r0, [lr], #1 14276 .LVL2330: 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14277 .loc 33 475 0 14278 01b6 BE45 cmp lr, r7 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** py = pSrc2; 14279 .loc 33 543 0 14280 01b8 06F10102 add r2, r6, #1 14281 .LVL2331: 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14282 .loc 33 475 0 14283 01bc E9D1 bne .L987 14284 01be 8CE7 b .L976 14285 .LVL2332: ARM GAS /tmp/ccJrAs6S.s page 575 14286 .L1013: 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14287 .loc 33 670 0 14288 01c0 0A46 mov r2, r1 14289 01c2 A2E7 b .L992 14290 .LVL2333: 14291 .L968: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; 14292 .loc 33 127 0 14293 01c4 019D ldr r5, [sp, #4] 14294 .LVL2334: 14295 01c6 241A subs r4, r4, r0 14296 .LVL2335: 14297 01c8 641B subs r4, r4, r5 14298 01ca 0394 str r4, [sp, #12] 14299 .LVL2336: 14300 01cc 0446 mov r4, r0 14301 .LVL2337: 14302 01ce B8E7 b .L969 14303 .LVL2338: 14304 .L979: 14305 01d0 7044 add r0, r0, lr 14306 01d2 013A subs r2, r2, #1 14307 .LVL2339: 14308 01d4 0746 mov r7, r0 14309 .LVL2340: 14310 .L981: 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14311 .loc 33 567 0 14312 01d6 99F90000 ldrsb r0, [r9] 14313 01da 12F9014F ldrsb r4, [r2, #1]! 14314 .LVL2341: 14315 01de 10FB04F0 smulbb r0, r0, r4 14316 .LBB1757: 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14317 .loc 33 574 0 14318 01e2 C011 asrs r0, r0, #7 14319 .syntax unified 14320 @ 574 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c" 14321 01e4 00F30700 ssat r0, #8, r0 14322 @ 0 "" 2 14323 .LVL2342: 14324 .thumb 14325 .syntax unified 14326 .LBE1757: 14327 01e8 0EF8010B strb r0, [lr], #1 14328 .LVL2343: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14329 .loc 33 556 0 14330 01ec BE45 cmp lr, r7 14331 01ee F2D1 bne .L981 14332 01f0 73E7 b .L976 14333 .LVL2344: 14334 .L997: 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14335 .loc 33 475 0 14336 01f2 7746 mov r7, lr ARM GAS /tmp/ccJrAs6S.s page 576 14337 01f4 71E7 b .L976 14338 .L977: 14339 01f6 0246 mov r2, r0 14340 .LVL2345: 14341 01f8 7244 add r2, r2, lr 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14342 .loc 33 556 0 14343 01fa 7746 mov r7, lr 14344 01fc 1046 mov r0, r2 14345 .LBB1758: 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14346 .loc 33 574 0 14347 .syntax unified 14348 @ 574 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c" 14349 01fe 08F30702 ssat r2, #8, r8 14350 @ 0 "" 2 14351 .LVL2346: 14352 .thumb 14353 .syntax unified 14354 .L985: 14355 .LBE1758: 14356 0202 07F8012B strb r2, [r7], #1 14357 .LVL2347: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14358 .loc 33 556 0 14359 0206 B842 cmp r0, r7 14360 0208 FBD1 bne .L985 14361 020a 66E7 b .L976 14362 .LVL2348: 14363 .L978: 14364 020c C9B1 cbz r1, .L1017 14365 020e 7044 add r0, r0, lr 14366 0210 0546 mov r5, r0 14367 0212 7746 mov r7, lr 14368 .LVL2349: 14369 .L984: 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14370 .loc 33 567 0 14371 0214 92F900C0 ldrsb ip, [r2] 14372 .LVL2350: 14373 0218 99F90040 ldrsb r4, [r9] 14374 021c 19F9010C ldrsb r0, [r9, #-1] 14375 0220 12F9016F ldrsb r6, [r2, #1]! 14376 .LVL2351: 14377 0224 14FB0CF4 smulbb r4, r4, ip 14378 0228 10FB0640 smlabb r0, r0, r6, r4 14379 .LBB1759: 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14380 .loc 33 574 0 14381 022c C011 asrs r0, r0, #7 14382 .syntax unified 14383 @ 574 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c" 14384 022e 00F30700 ssat r0, #8, r0 14385 @ 0 "" 2 14386 .LVL2352: 14387 .thumb 14388 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 577 14389 .LBE1759: 14390 0232 07F8010B strb r0, [r7], #1 14391 .LVL2353: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14392 .loc 33 556 0 14393 0236 BD42 cmp r5, r7 14394 0238 ECD1 bne .L984 14395 023a 4EE7 b .L976 14396 .LVL2354: 14397 .L1014: 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14398 .loc 33 141 0 14399 023c CE46 mov lr, r9 14400 023e 3A46 mov r2, r7 14401 0240 10E7 b .L967 14402 .LVL2355: 14403 .L1017: 14404 0242 7044 add r0, r0, lr 14405 0244 013A subs r2, r2, #1 14406 .LVL2356: 14407 0246 0746 mov r7, r0 14408 .LVL2357: 14409 .L983: 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14410 .loc 33 567 0 14411 0248 99F90000 ldrsb r0, [r9] 14412 024c 12F9014F ldrsb r4, [r2, #1]! 14413 .LVL2358: 14414 0250 10FB04F0 smulbb r0, r0, r4 14415 .LBB1760: 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14416 .loc 33 574 0 14417 0254 C011 asrs r0, r0, #7 14418 .syntax unified 14419 @ 574 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c" 14420 0256 00F30700 ssat r0, #8, r0 14421 @ 0 "" 2 14422 .LVL2359: 14423 .thumb 14424 .syntax unified 14425 .LBE1760: 14426 025a 0EF8010B strb r0, [lr], #1 14427 .LVL2360: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** { 14428 .loc 33 556 0 14429 025e BE45 cmp lr, r7 14430 0260 F2D1 bne .L983 14431 0262 3AE7 b .L976 14432 .LVL2361: 14433 .L993: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** } 14434 .loc 33 91 0 14435 0264 4FF0FF30 mov r0, #-1 14436 .LVL2362: 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c **** 14437 .loc 33 699 0 14438 0268 5AE7 b .L1011 ARM GAS /tmp/ccJrAs6S.s page 578 14439 .cfi_endproc 14440 .LFE178: 14442 026a 00BF .section .text.arm_conv_q15,"ax",%progbits 14443 .align 1 14444 .p2align 2,,3 14445 .global arm_conv_q15 14446 .syntax unified 14447 .thumb 14448 .thumb_func 14449 .fpu fpv4-sp-d16 14451 arm_conv_q15: 14452 .LFB179: 14453 .file 34 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Title: arm_conv_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Description: Convolution of Q15 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @addtogroup Conv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @brief Convolution of Q15 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @param[in] pSrcB points to the second input sequence ARM GAS /tmp/ccJrAs6S.s page 579 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @param[out] pDst points to the location where the output result is written. Length srcA 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** The function is implemented using a 64-bit internal accumulator. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** Both inputs are in 1.15 format and multiplications yield a 2.30 result. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 f 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** This approach provides 33 guard bits and there is no risk of overflow. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @remark 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** @remark 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** Refer to \ref arm_conv_opt_q15() for a faster implementation of this function us 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #if defined(ARM_MATH_MVEI) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #include "arm_helium_utils.h" 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #include "arm_vec_filtering.h" 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** void arm_conv_q15( 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t * pSrcA, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t srcALen, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t * pSrcB, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t srcBLen, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** q15_t * pDst) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *pIn1 = pSrcA; /* inputA pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *pIn2 = pSrcB; /* inputB pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Loop to perform MAC operations according to correlation equation 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *pX; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *pY; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *pA; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *pB; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int32_t i = 0U, j = 0; /* loop counters */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int32_t block1, block2, block3; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint16x8_t decrIdxVec = vddupq_u16(7, 1); 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** if (srcALen < srcBLen) 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Initialization to inputB pointer 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pIn1 = pSrcB; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Initialization to the end of inputA pointer 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pIn2 = pSrcA; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Swapping the lengths 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** j = srcALen; ARM GAS /tmp/ccJrAs6S.s page 580 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** srcALen = srcBLen; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** srcBLen = j; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** block1 = srcBLen - 1; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** block2 = srcALen - srcBLen + 1; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** block3 = srcBLen - 1; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pA = pIn1; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pB = pIn2 - 7; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** for (i = 0; i <= block1 - 2; i += 2) 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t count = i + 1; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc0 = 0LL; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc1 = 0LL; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pX = pA; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pY = pB; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q15(acc0, acc1, pX, pY, count); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc0; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc1; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pB += 2; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** for (; i < block1; i++) 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t count = i + 1; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc = 0LL; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pX = pA; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pY = pB; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** MVE_INTR_CONV_SINGLE_Q15(acc, pX, pY, count); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pB++; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** for (i = 0; i <= block2 - 4; i += 4) 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t count = srcBLen; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc0 = 0LL; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc1 = 0LL; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc2 = 0LL; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc3 = 0LL; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pX = pA; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pY = pB; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * compute 4 accumulators per loop 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * size is fixed for all accumulators 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * X pointer is incrementing for successive accumulators 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q15(acc0, acc1, acc2, acc3, pX, pY, count); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc0; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc1; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc2; ARM GAS /tmp/ccJrAs6S.s page 581 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc3; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pA += 4; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** for (; i <= block2 - 2; i += 2) 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t count = srcBLen; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc0 = 0LL; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc1 = 0LL; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pX = pA; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pY = pB; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * compute 2 accumulators per loop 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * size is fixed for all accumulators 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * X pointer is incrementing for successive accumulators 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q15(acc0, acc1, pX, pY, count); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc0; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc1; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pA += 2; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** if (block2 & 1) 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t count = srcBLen; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc = 0LL; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pX = pA; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pY = pB; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** MVE_INTR_CONV_SINGLE_Q15(acc, pX, pY, count); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pA++; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** for (i = block3; i >= 1; i -= 2) 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t count = i; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc0 = 0LL; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc1 = 0LL; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pX = pA; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pY = pB; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q15(acc0, acc1, pX, pY, count); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc0; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc1; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pA += 2; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** for (; i >= 1; i--) 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t count = i; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** int64_t acc = 0LL; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pX = pA; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pY = pB; ARM GAS /tmp/ccJrAs6S.s page 582 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** MVE_INTR_CONV_SINGLE_Q15(acc, pX, pY, count); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pDst++ = (q15_t) acc; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pA++; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #else 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** void arm_conv_q15( 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t * pSrcA, 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t srcALen, 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t * pSrcB, 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t srcBLen, 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** q15_t * pDst) 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 14454 .loc 34 229 0 14455 .cfi_startproc 14456 @ args = 4, pretend = 0, frame = 80 14457 @ frame_needed = 0, uses_anonymous_args = 0 14458 .LVL2363: 14459 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 14460 .LCFI90: 14461 .cfi_def_cfa_offset 36 14462 .cfi_offset 4, -36 14463 .cfi_offset 5, -32 14464 .cfi_offset 6, -28 14465 .cfi_offset 7, -24 14466 .cfi_offset 8, -20 14467 .cfi_offset 9, -16 14468 .cfi_offset 10, -12 14469 .cfi_offset 11, -8 14470 .cfi_offset 14, -4 14471 0004 95B0 sub sp, sp, #84 14472 .LCFI91: 14473 .cfi_def_cfa_offset 120 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #if defined (ARM_MATH_DSP) 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *pIn1; /* InputA pointer */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *pIn2; /* InputB pointer */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** q63_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *px; /* Intermediate inputA pointer */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *py; /* Intermediate inputB pointer */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** q31_t x0, x1, x2, x3, c0; /* Temporary input variables to hold state a 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t j, k, count, blkCnt; /* Loop counters */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* srcB is always made to slide across srcA. */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** if (srcALen >= srcBLen) 14474 .loc 34 247 0 14475 0006 9942 cmp r1, r3 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14476 .loc 34 229 0 14477 0008 1446 mov r4, r2 ARM GAS /tmp/ccJrAs6S.s page 583 14478 000a 0392 str r2, [sp, #12] 14479 000c 0291 str r1, [sp, #8] 14480 000e 1E9A ldr r2, [sp, #120] 14481 .LVL2364: 14482 .loc 34 247 0 14483 0010 05D3 bcc .L1019 14484 0012 0D46 mov r5, r1 14485 0014 1946 mov r1, r3 14486 .LVL2365: 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Initialization of inputA pointer */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pIn1 = pSrcA; 14487 .loc 34 250 0 14488 0016 0390 str r0, [sp, #12] 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 14489 .loc 34 247 0 14490 0018 2B46 mov r3, r5 14491 .LVL2366: 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Initialization of inputB pointer */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pIn2 = pSrcB; 14492 .loc 34 253 0 14493 001a 2046 mov r0, r4 14494 .LVL2367: 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 14495 .loc 34 247 0 14496 001c 0291 str r1, [sp, #8] 14497 .LVL2368: 14498 .L1019: 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** else 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Initialization of inputA pointer */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pIn1 = pSrcB; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Initialization of inputB pointer */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pIn2 = pSrcA; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** j = srcBLen; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** srcBLen = srcALen; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** srcALen = j; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* The function is internally 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * divided into three stages according to the number of multiplications that has to be 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * taken place between inputA samples and inputB samples. In the first stage of the 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * algorithm, the multiplications increase by one for every iteration. 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * In the third stage of the algorithm, the multiplications decrease by one 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * for every iteration. */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* The algorithm is implemented in three stages. 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** The loop counters of each stage is initiated here. */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blockSize1 = srcBLen - 1U; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blockSize2 = srcALen - (srcBLen - 1U); ARM GAS /tmp/ccJrAs6S.s page 584 14499 .loc 34 281 0 14500 001e 029E ldr r6, [sp, #8] 14501 0020 0133 adds r3, r3, #1 14502 .LVL2369: 14503 0022 9B1B subs r3, r3, r6 14504 .LVL2370: 14505 0024 1193 str r3, [sp, #68] 14506 .LVL2371: 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* -------------------------- 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Initializations of stage1 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * -------------------------*/ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* sum = x[0] * y[0] 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * sum = x[0] * y[1] + x[1] * y[0] 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * .... 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** The count variable holds the number of MAC operations performed */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** count = 1U; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Working pointer of inputA */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pIn1; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Working pointer of inputB */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = pIn2; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* ------------------------ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Stage1 process 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * ----------------------*/ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* For loop unrolling by 4, this stage is divided into two. */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* First part of this stage computes the MAC operations less than 4 */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Second part of this stage computes the MAC operations greater than or equal to 4 */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* The first part of the stage starts here */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while ((count < 4U) && (blockSize1 > 0U)) 14507 .loc 34 312 0 14508 0026 731E subs r3, r6, #1 14509 .LVL2372: 14510 0028 0B93 str r3, [sp, #44] 14511 002a 00F01F82 beq .L1020 14512 .LVL2373: 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Accumulator is made zero for every iteration */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = 0; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Loop over number of MAC operations between 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * inputA samples and inputB samples */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k = count; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (k > 0U) 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Perform the multiply-accumulates */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = __SMLALD(*px++, *py--, sum); ARM GAS /tmp/ccJrAs6S.s page 585 14513 .loc 34 324 0 14514 002e 039C ldr r4, [sp, #12] 14515 .LVL2374: 14516 0030 B0F90050 ldrsh r5, [r0] 14517 0034 B4F90040 ldrsh r4, [r4] 14518 .LVL2375: 14519 .LBB1761: 14520 .LBB1762: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 14521 .loc 6 2014 0 14522 0038 0023 movs r3, #0 14523 .LVL2376: 14524 003a 1946 mov r1, r3 14525 003c 1F46 mov r7, r3 14526 .syntax unified 14527 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14528 003e C4FBC517 smlald r1, r7, r4, r5 14529 @ 0 "" 2 14530 .LVL2377: 14531 .thumb 14532 .syntax unified 14533 .LBE1762: 14534 .LBE1761: 14535 .LBB1768: 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement loop counter */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k--; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); 14536 .loc 34 331 0 14537 0042 C90B lsrs r1, r1, #15 14538 .LVL2378: 14539 .LBE1768: 14540 0044 941C adds r4, r2, #2 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 14541 .loc 34 312 0 14542 0046 022E cmp r6, #2 14543 .LBB1769: 14544 .loc 34 331 0 14545 0048 41EA4741 orr r1, r1, r7, lsl #17 14546 .LBE1769: 14547 004c 0594 str r4, [sp, #20] 14548 .LBB1770: 14549 .syntax unified 14550 @ 331 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 14551 004e 01F30F01 ssat r1, #16, r1 14552 @ 0 "" 2 14553 .LVL2379: 14554 .thumb 14555 .syntax unified 14556 .LBE1770: 14557 0052 1180 strh r1, [r2] @ movhi 14558 .LVL2380: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 14559 .loc 34 312 0 ARM GAS /tmp/ccJrAs6S.s page 586 14560 0054 00F0E082 beq .L1107 14561 .LVL2381: 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14562 .loc 34 324 0 14563 0058 039E ldr r6, [sp, #12] 14564 005a B0F90250 ldrsh r5, [r0, #2] 14565 005e B6F90040 ldrsh r4, [r6] 14566 .LVL2382: 14567 .LBB1771: 14568 .LBB1763: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 14569 .loc 6 2014 0 14570 0062 1946 mov r1, r3 14571 .LVL2383: 14572 0064 1F46 mov r7, r3 14573 .syntax unified 14574 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14575 0066 C4FBC517 smlald r1, r7, r4, r5 14576 @ 0 "" 2 14577 .thumb 14578 .syntax unified 14579 .LBE1763: 14580 .LBE1771: 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14581 .loc 34 324 0 14582 006a B6F90250 ldrsh r5, [r6, #2] 14583 .LVL2384: 14584 006e B0F90060 ldrsh r6, [r0] 14585 .LBB1772: 14586 .LBB1764: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 14587 .loc 6 2014 0 14588 0072 3C46 mov r4, r7 14589 .LVL2385: 14590 .syntax unified 14591 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14592 0074 C5FBC614 smlald r1, r4, r5, r6 14593 @ 0 "" 2 14594 .LVL2386: 14595 .thumb 14596 .syntax unified 14597 .LBE1764: 14598 .LBE1772: 14599 .LBB1773: 14600 .loc 34 331 0 14601 0078 C90B lsrs r1, r1, #15 14602 .LVL2387: 14603 007a 41EA4441 orr r1, r1, r4, lsl #17 14604 .syntax unified 14605 @ 331 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 14606 007e 01F30F01 ssat r1, #16, r1 14607 @ 0 "" 2 14608 .LVL2388: 14609 .thumb 14610 .syntax unified 14611 .LBE1773: 14612 0082 5180 strh r1, [r2, #2] @ movhi ARM GAS /tmp/ccJrAs6S.s page 587 14613 .LVL2389: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 14614 .loc 34 312 0 14615 0084 0299 ldr r1, [sp, #8] 14616 .LVL2390: 14617 .loc 34 331 0 14618 0086 141D adds r4, r2, #4 14619 .LVL2391: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 14620 .loc 34 312 0 14621 0088 0329 cmp r1, #3 14622 .loc 34 331 0 14623 008a 0594 str r4, [sp, #20] 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 14624 .loc 34 312 0 14625 008c 00F0C982 beq .L1108 14626 .LVL2392: 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14627 .loc 34 324 0 14628 0090 039E ldr r6, [sp, #12] 14629 0092 B0F90440 ldrsh r4, [r0, #4] 14630 .LVL2393: 14631 0096 B6F90010 ldrsh r1, [r6] 14632 .LVL2394: 14633 .LBB1774: 14634 .LBB1765: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 14635 .loc 6 2014 0 14636 009a 1D46 mov r5, r3 14637 .syntax unified 14638 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14639 009c C1FBC435 smlald r3, r5, r1, r4 14640 @ 0 "" 2 14641 .thumb 14642 .syntax unified 14643 00a0 2946 mov r1, r5 14644 .LVL2395: 14645 .LBE1765: 14646 .LBE1774: 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14647 .loc 34 324 0 14648 00a2 B6F90240 ldrsh r4, [r6, #2] 14649 .LVL2396: 14650 00a6 B0F90250 ldrsh r5, [r0, #2] 14651 .LVL2397: 14652 .LBB1775: 14653 .LBB1766: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 14654 .loc 6 2014 0 14655 .syntax unified 14656 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14657 00aa C4FBC531 smlald r3, r1, r4, r5 14658 @ 0 "" 2 14659 .LVL2398: 14660 .thumb 14661 .syntax unified 14662 .LBE1766: ARM GAS /tmp/ccJrAs6S.s page 588 14663 .LBE1775: 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14664 .loc 34 324 0 14665 00ae 8646 mov lr, r0 14666 00b0 B6F90440 ldrsh r4, [r6, #4] 14667 .LVL2399: 14668 00b4 3EF9065B ldrsh r5, [lr], #6 14669 .LVL2400: 14670 .LBB1776: 14671 .LBB1767: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 14672 .loc 6 2014 0 14673 .syntax unified 14674 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14675 00b8 C4FBC531 smlald r3, r1, r4, r5 14676 @ 0 "" 2 14677 .LVL2401: 14678 .thumb 14679 .syntax unified 14680 .LBE1767: 14681 .LBE1776: 14682 .LBB1777: 14683 .loc 34 331 0 14684 00bc DB0B lsrs r3, r3, #15 14685 .LVL2402: 14686 00be 43EA4143 orr r3, r3, r1, lsl #17 14687 .syntax unified 14688 @ 331 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 14689 00c2 03F30F03 ssat r3, #16, r3 14690 @ 0 "" 2 14691 .LVL2403: 14692 .thumb 14693 .syntax unified 14694 .LBE1777: 14695 00c6 9380 strh r3, [r2, #4] @ movhi 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = pIn2 + count; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pIn1; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Increment MAC count */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** count++; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement loop counter */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blockSize1--; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* The second part of the stage starts here */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* The internal loop, over count, is unrolled by 4 */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* To, read the last two inputB samples using SIMD: 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = py - 1; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (blockSize1 > 0U) 14696 .loc 34 350 0 14697 00c8 029B ldr r3, [sp, #8] 14698 .LVL2404: ARM GAS /tmp/ccJrAs6S.s page 589 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14699 .loc 34 331 0 14700 00ca 911D adds r1, r2, #6 14701 .LVL2405: 14702 .loc 34 350 0 14703 00cc 043B subs r3, r3, #4 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14704 .loc 34 331 0 14705 00ce 0591 str r1, [sp, #20] 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14706 .loc 34 348 0 14707 00d0 00F10406 add r6, r0, #4 14708 .LVL2406: 14709 .loc 34 350 0 14710 00d4 0493 str r3, [sp, #16] 14711 00d6 00F0C482 beq .L1109 14712 00da 029B ldr r3, [sp, #8] 14713 .LVL2407: 14714 00dc 039F ldr r7, [sp, #12] 14715 00de 0690 str r0, [sp, #24] 14716 00e0 03F10043 add r3, r3, #-2147483648 14717 00e4 013B subs r3, r3, #1 14718 00e6 8846 mov r8, r1 14719 00e8 0193 str r3, [sp, #4] 14720 00ea 02EB430B add fp, r2, r3, lsl #1 14721 00ee 4FF0040C mov ip, #4 14722 .LVL2408: 14723 .L1026: 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Accumulator is made zero for every iteration */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = 0; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k = count >> 2U; 14724 .loc 34 356 0 14725 00f2 4FEA9C05 lsr r5, ip, #2 14726 .LVL2409: 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14727 .loc 34 353 0 14728 00f6 0023 movs r3, #0 14729 .loc 34 356 0 14730 00f8 2C46 mov r4, r5 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14731 .loc 34 353 0 14732 00fa 1A46 mov r2, r3 14733 .loc 34 356 0 14734 00fc 3046 mov r0, r6 14735 00fe 3946 mov r1, r7 14736 .LVL2410: 14737 .L1022: 14738 .LBB1778: 14739 .LBB1779: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 14740 .loc 3 928 0 14741 0100 D1F80090 ldr r9, [r1] @ unaligned 14742 .LVL2411: 14743 .LBE1779: ARM GAS /tmp/ccJrAs6S.s page 590 14744 .LBE1778: 14745 .LBB1780: 14746 .LBB1781: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 14747 .loc 3 948 0 14748 0104 D0F800A0 ldr r10, [r0] @ unaligned 14749 .LVL2412: 14750 .LBE1781: 14751 .LBE1780: 14752 .LBB1782: 14753 .LBB1783: 14754 .loc 6 2031 0 14755 .syntax unified 14756 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14757 0108 C9FBDA32 smlaldx r3, r2, r9, r10 14758 @ 0 "" 2 14759 .LVL2413: 14760 .thumb 14761 .syntax unified 14762 .LBE1783: 14763 .LBE1782: 14764 .LBB1784: 14765 .LBB1785: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 14766 .loc 3 928 0 14767 010c D1F80490 ldr r9, [r1, #4] @ unaligned 14768 .LVL2414: 14769 .LBE1785: 14770 .LBE1784: 14771 .LBB1786: 14772 .LBB1787: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 14773 .loc 3 948 0 14774 0110 50F804AC ldr r10, [r0, #-4] @ unaligned 14775 0114 0831 adds r1, r1, #8 14776 .LVL2415: 14777 0116 0838 subs r0, r0, #8 14778 .LVL2416: 14779 .LBE1787: 14780 .LBE1786: 14781 .LBB1788: 14782 .LBB1789: 14783 .loc 6 2031 0 14784 .syntax unified 14785 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14786 0118 C9FBDA32 smlaldx r3, r2, r9, r10 14787 @ 0 "" 2 14788 .LVL2417: 14789 .thumb 14790 .syntax unified 14791 .LBE1789: 14792 .LBE1788: 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (k > 0U) 14793 .loc 34 360 0 ARM GAS /tmp/ccJrAs6S.s page 591 14794 011c 013C subs r4, r4, #1 14795 .LVL2418: 14796 011e EFD1 bne .L1022 14797 0120 C5EB4571 rsb r1, r5, r5, lsl #29 14798 .LVL2419: 14799 0124 06EBC106 add r6, r6, r1, lsl #3 14800 .LVL2420: 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Perform the multiply-accumulate */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement loop counter */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k--; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* For the next MAC operations, the pointer py is used without SIMD 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * So, py is incremented by 1 */ 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = py + 1U; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** ** No loop unrolling is used. */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k = count % 0x4U; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (k > 0U) 14801 .loc 34 380 0 14802 0128 1CF00301 ands r1, ip, #3 14803 012c 07EBC504 add r4, r7, r5, lsl #3 14804 .LVL2421: 14805 0130 15D0 beq .L1023 14806 .LVL2422: 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Perform the multiply-accumulate */ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = __SMLALD(*px++, *py--, sum); 14807 .loc 34 383 0 14808 0132 37F93500 ldrsh r0, [r7, r5, lsl #3] 14809 .LVL2423: 14810 0136 B6F90250 ldrsh r5, [r6, #2] 14811 .LVL2424: 14812 .LBB1790: 14813 .LBB1791: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 14814 .loc 6 2014 0 14815 .syntax unified 14816 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14817 013a C0FBC532 smlald r3, r2, r0, r5 14818 @ 0 "" 2 14819 .LVL2425: 14820 .thumb 14821 .syntax unified 14822 .LBE1791: 14823 .LBE1790: 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 14824 .loc 34 380 0 14825 013e 0129 cmp r1, #1 ARM GAS /tmp/ccJrAs6S.s page 592 14826 0140 0DD0 beq .L1023 14827 .LVL2426: 14828 .loc 34 383 0 14829 0142 B4F90200 ldrsh r0, [r4, #2] 14830 .LVL2427: 14831 0146 B6F90050 ldrsh r5, [r6] 14832 .LVL2428: 14833 .LBB1794: 14834 .LBB1792: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 14835 .loc 6 2014 0 14836 .syntax unified 14837 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14838 014a C0FBC532 smlald r3, r2, r0, r5 14839 @ 0 "" 2 14840 .LVL2429: 14841 .thumb 14842 .syntax unified 14843 .LBE1792: 14844 .LBE1794: 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 14845 .loc 34 380 0 14846 014e 0229 cmp r1, #2 14847 0150 05D0 beq .L1023 14848 .LVL2430: 14849 .loc 34 383 0 14850 0152 B4F90410 ldrsh r1, [r4, #4] 14851 .LVL2431: 14852 0156 36F9020C ldrsh r0, [r6, #-2] 14853 .LVL2432: 14854 .LBB1795: 14855 .LBB1793: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 14856 .loc 6 2014 0 14857 .syntax unified 14858 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14859 015a C1FBC032 smlald r3, r2, r1, r0 14860 @ 0 "" 2 14861 .LVL2433: 14862 .thumb 14863 .syntax unified 14864 .L1023: 14865 .LBE1793: 14866 .LBE1795: 14867 .LBB1796: 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement loop counter */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k--; 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); 14868 .loc 34 390 0 14869 015e DB0B lsrs r3, r3, #15 14870 .LVL2434: 14871 0160 43EA4243 orr r3, r3, r2, lsl #17 14872 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 593 14873 @ 390 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 14874 0164 03F30F03 ssat r3, #16, r3 14875 @ 0 "" 2 14876 .LVL2435: 14877 .thumb 14878 .syntax unified 14879 .LBE1796: 14880 0168 28F8023B strh r3, [r8], #2 @ movhi 14881 .LVL2436: 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 14882 .loc 34 350 0 14883 016c C345 cmp fp, r8 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = pIn2 + (count - 1U); 14884 .loc 34 393 0 14885 016e 7646 mov r6, lr 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pIn1; 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Increment MAC count */ 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** count++; 14886 .loc 34 397 0 14887 0170 0CF1010C add ip, ip, #1 14888 .LVL2437: 14889 0174 0EF1020E add lr, lr, #2 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 14890 .loc 34 350 0 14891 0178 BBD1 bne .L1026 14892 017a DDE90530 ldrd r3, r0, [sp, #20] 14893 .LVL2438: 14894 017e 049A ldr r2, [sp, #16] 14895 0180 03EB4203 add r3, r3, r2, lsl #1 14896 0184 0593 str r3, [sp, #20] 14897 0186 019B ldr r3, [sp, #4] 14898 .LVL2439: 14899 .L1021: 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement loop counter */ 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blockSize1--; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* -------------------------- 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Initializations of stage2 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * ------------------------*/ 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * .... 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Working pointer of inputA */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pIn1; 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Working pointer of inputB */ 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pSrc2 = pIn2 + (srcBLen - 1U); 14900 .loc 34 417 0 ARM GAS /tmp/ccJrAs6S.s page 594 14901 0188 00EB4303 add r3, r0, r3, lsl #1 14902 018c 1293 str r3, [sp, #72] 14903 .LVL2440: 14904 018e 023B subs r3, r3, #2 14905 .LVL2441: 14906 0190 0A93 str r3, [sp, #40] 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = pSrc2; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* count is the index by which the pointer pIn1 to be incremented */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** count = 0U; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* ------------------- 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Stage2 process 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * ------------------*/ 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * So, to loop unroll over blockSize2, 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * srcBLen should be greater than or equal to 4 */ 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** if (srcBLen >= 4U) 14907 .loc 34 430 0 14908 0192 029B ldr r3, [sp, #8] 14909 0194 032B cmp r3, #3 14910 0196 40F27281 bls .L1058 14911 .LVL2442: 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blkCnt = blockSize2 >> 2U; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (blkCnt > 0U) 14912 .loc 34 435 0 14913 019a 119B ldr r3, [sp, #68] 14914 019c 9908 lsrs r1, r3, #2 14915 .LVL2443: 14916 019e 1391 str r1, [sp, #76] 14917 01a0 00F00A82 beq .L1060 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = py - 1U; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Set all accumulators to zero */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc0 = 0; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc1 = 0; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc2 = 0; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc3 = 0; 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* read x[0], x[1] samples */ 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** x0 = read_q15x2 ((q15_t *) px); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* read x[1], x[2] samples */ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** x1 = read_q15x2 ((q15_t *) px + 1); 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px += 2U; 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k = srcBLen >> 2U; 14918 .loc 34 453 0 14919 01a4 0298 ldr r0, [sp, #8] 14920 01a6 0A9C ldr r4, [sp, #40] 14921 01a8 8208 lsrs r2, r0, #2 ARM GAS /tmp/ccJrAs6S.s page 595 14922 01aa C2EB4273 rsb r3, r2, r2, lsl #29 14923 01ae 04EBC303 add r3, r4, r3, lsl #3 14924 01b2 0833 adds r3, r3, #8 14925 01b4 0E92 str r2, [sp, #56] 14926 01b6 D200 lsls r2, r2, #3 14927 01b8 0D93 str r3, [sp, #52] 14928 01ba 131D adds r3, r2, #4 14929 01bc 1093 str r3, [sp, #64] 14930 01be 131F subs r3, r2, #4 14931 01c0 0F93 str r3, [sp, #60] 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** do 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read the last two inputB samples using SIMD: 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * y[srcBLen - 1] and y[srcBLen - 2] */ 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** c0 = read_q15x2_da ((q15_t **) &py); 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc0 = __SMLALDX(x0, c0, acc0); 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc1 = __SMLALDX(x1, c0, acc1); 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read x[2], x[3] */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** x2 = read_q15x2 ((q15_t *) px); 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read x[3], x[4] */ 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** x3 = read_q15x2 ((q15_t *) px + 1); 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc2 = __SMLALDX(x2, c0, acc2); 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc3 = __SMLALDX(x3, c0, acc3); 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read y[srcBLen - 3] and y[srcBLen - 4] */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** c0 = read_q15x2_da ((q15_t **) &py); 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc0 = __SMLALDX(x2, c0, acc0); 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc1 = __SMLALDX(x3, c0, acc1); 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read x[4], x[5] */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** x0 = read_q15x2 ((q15_t *) px + 2); 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read x[5], x[6] */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** x1 = read_q15x2 ((q15_t *) px + 3); 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px += 4U; 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc2 = __SMLALDX(x0, c0, acc2); 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 596 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc3 = __SMLALDX(x1, c0, acc3); 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } while (--k); 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* For the next MAC operations, SIMD is not used 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * So, the 16 bit pointer if inputB, py is updated */ 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** ** No loop unrolling is used. */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k = srcBLen % 0x4U; 14932 .loc 34 511 0 14933 01c2 00F00303 and r3, r0, #3 14934 01c6 0893 str r3, [sp, #32] 14935 01c8 039B ldr r3, [sp, #12] 14936 01ca 0193 str r3, [sp, #4] 14937 01cc 059B ldr r3, [sp, #20] 14938 01ce CDE90613 strd r1, r3, [sp, #24] 14939 .LVL2444: 14940 .L1043: 14941 .LBB1797: 14942 .LBB1798: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 14943 .loc 3 909 0 14944 01d2 019F ldr r7, [sp, #4] 14945 .LVL2445: 14946 .LBE1798: 14947 .LBE1797: 14948 .LBB1800: 14949 .LBB1801: 14950 01d4 DDF82890 ldr r9, [sp, #40] 14951 .LBE1801: 14952 .LBE1800: 14953 .LBB1803: 14954 .LBB1799: 14955 01d8 3C68 ldr r4, [r7] @ unaligned 14956 .LBE1799: 14957 .LBE1803: 14958 .LBB1804: 14959 .LBB1802: 14960 01da D7F802E0 ldr lr, [r7, #2] @ unaligned 14961 .LVL2446: 14962 .LBE1802: 14963 .LBE1804: 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14964 .loc 34 453 0 14965 01de DDF838A0 ldr r10, [sp, #56] 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 14966 .loc 34 443 0 14967 01e2 0023 movs r3, #0 14968 01e4 9B46 mov fp, r3 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc3 = 0; 14969 .loc 34 442 0 14970 01e6 1A46 mov r2, r3 14971 01e8 1846 mov r0, r3 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc2 = 0; 14972 .loc 34 441 0 ARM GAS /tmp/ccJrAs6S.s page 597 14973 01ea 1D46 mov r5, r3 14974 01ec 9846 mov r8, r3 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc1 = 0; 14975 .loc 34 440 0 14976 01ee 1946 mov r1, r3 14977 01f0 1E46 mov r6, r3 14978 01f2 07F1040C add ip, r7, #4 14979 .LVL2447: 14980 .L1039: 14981 .LBB1805: 14982 .LBB1806: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 14983 .loc 3 948 0 discriminator 1 14984 01f6 D9F80070 ldr r7, [r9] @ unaligned 14985 .LVL2448: 14986 .LBE1806: 14987 .LBE1805: 14988 .LBB1807: 14989 .LBB1808: 14990 .loc 6 2031 0 discriminator 1 14991 .syntax unified 14992 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14993 01fa C4FBD716 smlaldx r1, r6, r4, r7 14994 @ 0 "" 2 14995 .LVL2449: 14996 .thumb 14997 .syntax unified 14998 .LBE1808: 14999 .LBE1807: 15000 .LBB1809: 15001 .LBB1810: 15002 .syntax unified 15003 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15004 01fe CEFBD758 smlaldx r5, r8, lr, r7 15005 @ 0 "" 2 15006 .LVL2450: 15007 .thumb 15008 .syntax unified 15009 .LBE1810: 15010 .LBE1809: 15011 .LBB1811: 15012 .LBB1812: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15013 .loc 3 909 0 discriminator 1 15014 0202 DCF800E0 ldr lr, [ip] @ unaligned 15015 .LVL2451: 15016 .LBE1812: 15017 .LBE1811: 15018 .LBB1813: 15019 .LBB1814: 15020 0206 DCF80240 ldr r4, [ip, #2] @ unaligned 15021 .LVL2452: 15022 .LBE1814: 15023 .LBE1813: 15024 .LBB1815: 15025 .LBB1816: 15026 .loc 6 2031 0 discriminator 1 ARM GAS /tmp/ccJrAs6S.s page 598 15027 .syntax unified 15028 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15029 020a CEFBD720 smlaldx r2, r0, lr, r7 15030 @ 0 "" 2 15031 .LVL2453: 15032 .thumb 15033 .syntax unified 15034 .LBE1816: 15035 .LBE1815: 15036 .LBB1817: 15037 .LBB1818: 15038 .syntax unified 15039 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15040 020e C4FBD73B smlaldx r3, fp, r4, r7 15041 @ 0 "" 2 15042 .LVL2454: 15043 .thumb 15044 .syntax unified 15045 .LBE1818: 15046 .LBE1817: 15047 .LBB1819: 15048 .LBB1820: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15049 .loc 3 948 0 discriminator 1 15050 0212 59F8047C ldr r7, [r9, #-4] @ unaligned 15051 .LVL2455: 15052 0216 A9F10809 sub r9, r9, #8 15053 .LVL2456: 15054 .LBE1820: 15055 .LBE1819: 15056 .LBB1821: 15057 .LBB1822: 15058 .loc 6 2031 0 discriminator 1 15059 .syntax unified 15060 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15061 021a CEFBD716 smlaldx r1, r6, lr, r7 15062 @ 0 "" 2 15063 .LVL2457: 15064 .thumb 15065 .syntax unified 15066 .LBE1822: 15067 .LBE1821: 15068 .LBB1823: 15069 .LBB1824: 15070 .syntax unified 15071 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15072 021e C4FBD758 smlaldx r5, r8, r4, r7 15073 @ 0 "" 2 15074 .LVL2458: 15075 .thumb 15076 .syntax unified 15077 .LBE1824: 15078 .LBE1823: 15079 .LBB1825: 15080 .LBB1826: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15081 .loc 3 909 0 discriminator 1 ARM GAS /tmp/ccJrAs6S.s page 599 15082 0222 DCF80440 ldr r4, [ip, #4] @ unaligned 15083 .LVL2459: 15084 .LBE1826: 15085 .LBE1825: 15086 .LBB1827: 15087 .LBB1828: 15088 0226 DCF806E0 ldr lr, [ip, #6] @ unaligned 15089 .LVL2460: 15090 .LBE1828: 15091 .LBE1827: 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15092 .loc 34 496 0 discriminator 1 15093 022a 0CF1080C add ip, ip, #8 15094 .LVL2461: 15095 .LBB1829: 15096 .LBB1830: 15097 .loc 6 2031 0 discriminator 1 15098 .syntax unified 15099 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15100 022e C4FBD720 smlaldx r2, r0, r4, r7 15101 @ 0 "" 2 15102 .LVL2462: 15103 .thumb 15104 .syntax unified 15105 .LBE1830: 15106 .LBE1829: 15107 .LBB1831: 15108 .LBB1832: 15109 .syntax unified 15110 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15111 0232 CEFBD73B smlaldx r3, fp, lr, r7 15112 @ 0 "" 2 15113 .LVL2463: 15114 .thumb 15115 .syntax unified 15116 .LBE1832: 15117 .LBE1831: 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15118 .loc 34 504 0 discriminator 1 15119 0236 BAF1010A subs r10, r10, #1 15120 .LVL2464: 15121 023a DCD1 bne .L1039 15122 023c 019F ldr r7, [sp, #4] 15123 023e 0994 str r4, [sp, #36] 15124 0240 109C ldr r4, [sp, #64] 15125 0242 3C19 adds r4, r7, r4 15126 0244 0494 str r4, [sp, #16] 15127 0246 0F9C ldr r4, [sp, #60] 15128 0248 07EB040C add ip, r7, r4 15129 .LVL2465: 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** if (k == 1U) 15130 .loc 34 513 0 15131 024c 089C ldr r4, [sp, #32] 15132 024e 012C cmp r4, #1 15133 0250 00F07181 beq .L1110 15134 .LVL2466: ARM GAS /tmp/ccJrAs6S.s page 600 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read y[srcBLen - 5] */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** c0 = *(py + 1); 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** c0 = c0 << 16U; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #else 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** c0 = c0 & 0x0000FFFF; 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read x[7] */ 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** x3 = read_q15x2 ((q15_t *) px); 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px++; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Perform the multiply-accumulate */ 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc0 = __SMLALD(x0, c0, acc0); 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc1 = __SMLALD(x1, c0, acc1); 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc2 = __SMLALDX(x1, c0, acc2); 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc3 = __SMLALDX(x3, c0, acc3); 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** if (k == 2U) 15135 .loc 34 534 0 15136 0254 022C cmp r4, #2 15137 0256 40F08081 bne .L1042 15138 .LVL2467: 15139 .LBB1833: 15140 .LBB1834: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15141 .loc 3 909 0 15142 025a 0D9C ldr r4, [sp, #52] 15143 025c 54F808CC ldr ip, [r4, #-8] @ unaligned 15144 .LVL2468: 15145 .LBE1834: 15146 .LBE1833: 15147 .LBB1835: 15148 .LBB1836: 15149 0260 049C ldr r4, [sp, #16] 15150 0262 D4F80090 ldr r9, [r4] @ unaligned 15151 .LVL2469: 15152 .LBE1836: 15153 .LBE1835: 15154 .LBB1837: 15155 .LBB1838: 15156 0266 D4F80270 ldr r7, [r4, #2] @ unaligned 15157 .LVL2470: 15158 .LBE1838: 15159 .LBE1837: 15160 .LBB1839: 15161 .LBB1840: 15162 .loc 6 2031 0 15163 026a 099C ldr r4, [sp, #36] 15164 .syntax unified 15165 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15166 026c C4FBDC16 smlaldx r1, r6, r4, ip 15167 @ 0 "" 2 15168 .LVL2471: 15169 .thumb ARM GAS /tmp/ccJrAs6S.s page 601 15170 .syntax unified 15171 .LBE1840: 15172 .LBE1839: 15173 .LBB1841: 15174 .LBB1842: 15175 0270 4446 mov r4, r8 15176 .syntax unified 15177 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15178 0272 CEFBDC54 smlaldx r5, r4, lr, ip 15179 @ 0 "" 2 15180 .LVL2472: 15181 .thumb 15182 .syntax unified 15183 .LBE1842: 15184 .LBE1841: 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read y[srcBLen - 5], y[srcBLen - 6] */ 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** c0 = read_q15x2 ((q15_t *) py); 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read x[7], x[8] */ 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** x3 = read_q15x2 ((q15_t *) px); 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read x[9] */ 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** x2 = read_q15x2 ((q15_t *) px + 1); 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px += 2U; 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Perform the multiply-accumulate */ 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc0 = __SMLALDX(x0, c0, acc0); 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc1 = __SMLALDX(x1, c0, acc1); 15185 .loc 34 548 0 15186 0276 A046 mov r8, r4 15187 .LVL2473: 15188 .LBB1843: 15189 .LBB1844: 15190 .loc 6 2031 0 15191 .syntax unified 15192 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15193 0278 C9FBDC20 smlaldx r2, r0, r9, ip 15194 @ 0 "" 2 15195 .LVL2474: 15196 .thumb 15197 .syntax unified 15198 .LBE1844: 15199 .LBE1843: 15200 .LBB1845: 15201 .LBB1846: 15202 .syntax unified 15203 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15204 027c C7FBDC3B smlaldx r3, fp, r7, ip 15205 @ 0 "" 2 15206 .LVL2475: 15207 .thumb 15208 .syntax unified 15209 .L1041: 15210 .LBE1846: 15211 .LBE1845: 15212 .LBB1847: ARM GAS /tmp/ccJrAs6S.s page 602 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc2 = __SMLALDX(x3, c0, acc2); 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc3 = __SMLALDX(x2, c0, acc3); 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** if (k == 3U) 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read y[srcBLen - 5], y[srcBLen - 6] */ 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** c0 = read_q15x2 ((q15_t *) py); 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read x[7], x[8] */ 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** x3 = read_q15x2 ((q15_t *) px); 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read x[9] */ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** x2 = read_q15x2 ((q15_t *) px + 1); 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Perform the multiply-accumulate */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc0 = __SMLALDX(x0, c0, acc0); 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc1 = __SMLALDX(x1, c0, acc1); 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc2 = __SMLALDX(x3, c0, acc2); 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc3 = __SMLALDX(x2, c0, acc3); 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** c0 = *(py-1); 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** c0 = c0 << 16U; 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #else 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** c0 = c0 & 0x0000FFFF; 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Read x[10] */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** x3 = read_q15x2 ((q15_t *) px + 2); 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px += 3U; 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Perform the multiply-accumulates */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc0 = __SMLALDX(x1, c0, acc0); 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc1 = __SMLALD(x2, c0, acc1); 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc2 = __SMLALDX(x2, c0, acc2); 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc3 = __SMLALDX(x3, c0, acc3); 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 15213 .loc 34 591 0 15214 0280 D20B lsrs r2, r2, #15 15215 .LVL2476: 15216 .LBE1847: 15217 .LBB1848: 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 15218 .loc 34 590 0 15219 0282 C90B lsrs r1, r1, #15 15220 .LVL2477: 15221 .LBE1848: 15222 .LBB1849: 15223 .loc 34 591 0 15224 0284 42EA4042 orr r2, r2, r0, lsl #17 15225 .LBE1849: ARM GAS /tmp/ccJrAs6S.s page 603 15226 .LBB1850: 15227 0288 DB0B lsrs r3, r3, #15 15228 .LVL2478: 15229 .LBE1850: 15230 .LBB1851: 15231 .syntax unified 15232 @ 591 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 15233 028a 02F30F02 ssat r2, #16, r2 15234 @ 0 "" 2 15235 .thumb 15236 .syntax unified 15237 .LBE1851: 15238 028e 92B2 uxth r2, r2 15239 .LBB1852: 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 15240 .loc 34 590 0 15241 0290 41EA4641 orr r1, r1, r6, lsl #17 15242 .LBE1852: 15243 .LBB1853: 15244 0294 ED0B lsrs r5, r5, #15 15245 .LVL2479: 15246 .LBE1853: 15247 .LBB1854: 15248 .syntax unified 15249 @ 590 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 15250 0296 01F30F01 ssat r1, #16, r1 15251 @ 0 "" 2 15252 .LVL2480: 15253 .thumb 15254 .syntax unified 15255 .LBE1854: 15256 .LBB1855: 15257 .loc 34 591 0 15258 029a 43EA4B43 orr r3, r3, fp, lsl #17 15259 .LBE1855: 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 15260 .loc 34 590 0 15261 029e 89B2 uxth r1, r1 15262 .LVL2481: 15263 .LBB1856: 15264 .loc 34 591 0 15265 .syntax unified 15266 @ 591 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 15267 02a0 03F30F03 ssat r3, #16, r3 15268 @ 0 "" 2 15269 .thumb 15270 .syntax unified 15271 .LBE1856: 15272 02a4 42EA0342 orr r2, r2, r3, lsl #16 15273 .LBB1857: 15274 .LBB1858: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15275 .loc 3 969 0 15276 02a8 079B ldr r3, [sp, #28] 15277 .LBE1858: 15278 .LBE1857: 15279 .LBB1860: ARM GAS /tmp/ccJrAs6S.s page 604 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 15280 .loc 34 590 0 15281 02aa 45EA4845 orr r5, r5, r8, lsl #17 15282 .syntax unified 15283 @ 590 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 15284 02ae 05F30F05 ssat r5, #16, r5 15285 @ 0 "" 2 15286 .LVL2482: 15287 .thumb 15288 .syntax unified 15289 .LBE1860: 15290 02b2 41EA0541 orr r1, r1, r5, lsl #16 15291 .LBB1861: 15292 .LBB1862: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15293 .loc 3 969 0 15294 02b6 5A60 str r2, [r3, #4] @ unaligned 15295 .LBE1862: 15296 .LBE1861: 15297 .LBB1863: 15298 .LBB1859: 15299 02b8 1960 str r1, [r3] @ unaligned 15300 .LVL2483: 15301 02ba 0833 adds r3, r3, #8 15302 .LVL2484: 15303 .LBE1859: 15304 .LBE1863: 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #else 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Increment the pointer pIn1 index, count by 4 */ 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** count += 4U; 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pIn1 + count; 15305 .loc 34 601 0 15306 02bc 019A ldr r2, [sp, #4] 15307 02be 0793 str r3, [sp, #28] 15308 .LVL2485: 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15309 .loc 34 435 0 15310 02c0 069B ldr r3, [sp, #24] 15311 .LVL2486: 15312 .loc 34 601 0 15313 02c2 0832 adds r2, r2, #8 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15314 .loc 34 435 0 15315 02c4 013B subs r3, r3, #1 15316 .LVL2487: 15317 .loc 34 601 0 15318 02c6 0192 str r2, [sp, #4] 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15319 .loc 34 435 0 15320 02c8 0693 str r3, [sp, #24] 15321 02ca 82D1 bne .L1043 ARM GAS /tmp/ccJrAs6S.s page 605 15322 02cc 139B ldr r3, [sp, #76] 15323 .LVL2488: 15324 02ce 059A ldr r2, [sp, #20] 15325 02d0 DE00 lsls r6, r3, #3 15326 02d2 3244 add r2, r2, r6 15327 02d4 1146 mov r1, r2 15328 02d6 039A ldr r2, [sp, #12] 15329 02d8 1644 add r6, r6, r2 15330 02da 9A00 lsls r2, r3, #2 15331 02dc 119B ldr r3, [sp, #68] 15332 .LVL2489: 15333 .L1038: 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = pSrc2; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement loop counter */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blkCnt--; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** ** No loop unrolling is used. */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blkCnt = blockSize2 % 0x4U; 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (blkCnt > 0U) 15334 .loc 34 612 0 15335 02de 13F0030B ands fp, r3, #3 15336 02e2 65D0 beq .L1028 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Accumulator is made zero for every iteration */ 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = 0; 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k = srcBLen >> 2U; 15337 .loc 34 618 0 15338 02e4 0298 ldr r0, [sp, #8] 15339 02e6 129C ldr r4, [sp, #72] 15340 02e8 039D ldr r5, [sp, #12] 15341 02ea 4FEA900A lsr r10, r0, #2 15342 02ee 0AF10053 add r3, r10, #536870912 15343 02f2 CAEB4A77 rsb r7, r10, r10, lsl #29 15344 02f6 013B subs r3, r3, #1 15345 02f8 0132 adds r2, r2, #1 15346 .LVL2490: 15347 02fa 04EBC707 add r7, r4, r7, lsl #3 15348 02fe DB00 lsls r3, r3, #3 15349 0300 05EB420C add ip, r5, r2, lsl #1 15350 0304 01EB4B0B add fp, r1, fp, lsl #1 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (k > 0U) 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Perform the multiply-accumulates */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 606 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement loop counter */ 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k--; 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** ** No loop unrolling is used. */ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k = srcBLen % 0x4U; 15351 .loc 34 636 0 15352 0308 00F00308 and r8, r0, #3 15353 030c 0493 str r3, [sp, #16] 15354 030e 0837 adds r7, r7, #8 15355 0310 A4F10809 sub r9, r4, #8 15356 .LVL2491: 15357 .L1046: 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15358 .loc 34 615 0 15359 0314 CDE90161 strd r6, r1, [sp, #4] 15360 0318 06F10802 add r2, r6, #8 15361 031c 4B46 mov r3, r9 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15362 .loc 34 618 0 15363 031e 5046 mov r0, r10 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15364 .loc 34 615 0 15365 0320 0024 movs r4, #0 15366 0322 0025 movs r5, #0 15367 0324 E646 mov lr, ip 15368 .LVL2492: 15369 .L1044: 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 15370 .loc 34 625 0 15371 0326 B3F808C0 ldrh ip, [r3, #8] 15372 032a 32F8081C ldrh r1, [r2, #-8] 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 15373 .loc 34 627 0 15374 032e 9E88 ldrh r6, [r3, #4] 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 15375 .loc 34 625 0 15376 0330 C1FB8C45 smlalbb r4, r5, r1, ip 15377 .LVL2493: 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 15378 .loc 34 626 0 15379 0334 32F8061C ldrh r1, [r2, #-6] 15380 0338 B3F806C0 ldrh ip, [r3, #6] 15381 033c C1FB8C45 smlalbb r4, r5, r1, ip 15382 .LVL2494: 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 15383 .loc 34 627 0 15384 0340 32F8041C ldrh r1, [r2, #-4] 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15385 .loc 34 628 0 15386 0344 32F802CC ldrh ip, [r2, #-2] 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 15387 .loc 34 627 0 15388 0348 C1FB8645 smlalbb r4, r5, r1, r6 15389 .LVL2495: 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 607 15390 .loc 34 628 0 15391 034c 5988 ldrh r1, [r3, #2] 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15392 .loc 34 622 0 15393 034e 0138 subs r0, r0, #1 15394 .LVL2496: 15395 0350 02F10802 add r2, r2, #8 15396 .LVL2497: 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15397 .loc 34 628 0 15398 0354 CCFB8145 smlalbb r4, r5, ip, r1 15399 .LVL2498: 15400 0358 A3F10803 sub r3, r3, #8 15401 .LVL2499: 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15402 .loc 34 622 0 15403 035c E3D1 bne .L1044 15404 035e DDE90161 ldrd r6, r1, [sp, #4] 15405 0362 049B ldr r3, [sp, #16] 15406 .LVL2500: 15407 0364 F446 mov ip, lr 15408 0366 1E44 add r6, r6, r3 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (k > 0U) 15409 .loc 34 638 0 15410 0368 B8F1000F cmp r8, #0 15411 036c 14D0 beq .L1045 15412 .LVL2501: 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Perform the multiply-accumulates */ 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 15413 .loc 34 641 0 15414 036e 3289 ldrh r2, [r6, #8] 15415 .LVL2502: 15416 0370 37F8083C ldrh r3, [r7, #-8] 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15417 .loc 34 638 0 15418 0374 B8F1010F cmp r8, #1 15419 .loc 34 641 0 15420 0378 C2FB8345 smlalbb r4, r5, r2, r3 15421 .LVL2503: 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15422 .loc 34 638 0 15423 037c 0CD0 beq .L1045 15424 .loc 34 641 0 15425 037e 7289 ldrh r2, [r6, #10] 15426 0380 37F80A3C ldrh r3, [r7, #-10] 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15427 .loc 34 638 0 15428 0384 B8F1020F cmp r8, #2 15429 .loc 34 641 0 15430 0388 C2FB8345 smlalbb r4, r5, r2, r3 15431 .LVL2504: 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15432 .loc 34 638 0 15433 038c 04D0 beq .L1045 15434 .loc 34 641 0 ARM GAS /tmp/ccJrAs6S.s page 608 15435 038e B289 ldrh r2, [r6, #12] 15436 0390 37F80C3C ldrh r3, [r7, #-12] 15437 0394 C2FB8345 smlalbb r4, r5, r2, r3 15438 .LVL2505: 15439 .L1045: 15440 .LBB1864: 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement the loop counter */ 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k--; 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pOut++ = (q15_t) (__SSAT(sum >> 15, 16)); 15441 .loc 34 648 0 15442 0398 E30B lsrs r3, r4, #15 15443 039a 43EA4543 orr r3, r3, r5, lsl #17 15444 .syntax unified 15445 @ 648 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 15446 039e 03F30F03 ssat r3, #16, r3 15447 @ 0 "" 2 15448 .LVL2506: 15449 .thumb 15450 .syntax unified 15451 .LBE1864: 15452 03a2 21F8023B strh r3, [r1], #2 @ movhi 15453 .LVL2507: 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15454 .loc 34 612 0 15455 03a6 8B45 cmp fp, r1 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Increment the pointer pIn1 index, count by 1 */ 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** count++; 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pIn1 + count; 15456 .loc 34 654 0 15457 03a8 6646 mov r6, ip 15458 .LVL2508: 15459 03aa 0CF1020C add ip, ip, #2 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15460 .loc 34 612 0 15461 03ae B1D1 bne .L1046 15462 .LVL2509: 15463 .L1028: 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = pSrc2; 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement the loop counter */ 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blkCnt--; 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** else 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* If the srcBLen is not a multiple of 4, 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * the blockSize2 loop cannot be unrolled by 4 */ 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blkCnt = blockSize2; 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (blkCnt > 0U) ARM GAS /tmp/ccJrAs6S.s page 609 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Accumulator is made zero for every iteration */ 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = 0; 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* srcBLen number of MACS should be performed */ 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k = srcBLen; 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (k > 0U) 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Perform the multiply-accumulate */ 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += (q63_t) ((q31_t) *px++ * *py--); 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement the loop counter */ 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k--; 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pOut++ = (q15_t) (__SSAT(sum >> 15, 16)); 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Increment the MAC count */ 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** count++; 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pIn1 + count; 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = pSrc2; 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement the loop counter */ 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blkCnt--; 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* -------------------------- 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Initializations of stage3 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * -------------------------*/ 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcAL 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcAL 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * .... 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * sum += x[srcALen-1] * y[srcBLen-1] 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** */ 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** The blockSize3 variable holds the number of MAC operations performed */ 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blockSize3 = srcBLen - 1U; 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Working pointer of inputA */ 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pSrc1; 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Working pointer of inputB */ 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pSrc2 = pIn2 + (srcBLen - 1U); 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pIn2 = pSrc2 - 1U; 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = pIn2; 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* ------------------- ARM GAS /tmp/ccJrAs6S.s page 610 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * Stage3 process 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * ------------------*/ 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* For loop unrolling by 4, this stage is divided into two. */ 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* First part of this stage computes the MAC operations greater than 4 */ 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Second part of this stage computes the MAC operations less than or equal to 4 */ 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* The first part of the stage starts here */ 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** j = blockSize3 >> 2U; 15464 .loc 34 733 0 15465 03b0 0B9B ldr r3, [sp, #44] 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pSrc1; 15466 .loc 34 716 0 15467 03b2 119A ldr r2, [sp, #68] 15468 .loc 34 733 0 15469 03b4 9E08 lsrs r6, r3, #2 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pSrc1; 15470 .loc 34 716 0 15471 03b6 039B ldr r3, [sp, #12] 15472 .loc 34 733 0 15473 03b8 3446 mov r4, r6 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pSrc1; 15474 .loc 34 716 0 15475 03ba 03EB4200 add r0, r3, r2, lsl #1 15476 .LVL2510: 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while ((j > 0U) && (blockSize3 > 0U)) 15477 .loc 34 735 0 15478 03be 002E cmp r6, #0 15479 03c0 00F09780 beq .L1061 15480 .LVL2511: 15481 .L1037: 15482 03c4 00EB4404 add r4, r0, r4, lsl #1 15483 03c8 8646 mov lr, r0 15484 03ca DDE90A80 ldrd r8, r0, [sp, #40] 15485 .LVL2512: 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Accumulator is made zero for every iteration */ 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = 0; 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k = blockSize3 >> 2U; 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (k > 0U) 15486 .loc 34 745 0 15487 03ce 002E cmp r6, #0 15488 03d0 47D0 beq .L1062 15489 .LVL2513: 15490 .L1112: 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15491 .loc 34 738 0 15492 03d2 0022 movs r2, #0 15493 03d4 1346 mov r3, r2 15494 .loc 34 745 0 15495 03d6 4746 mov r7, r8 ARM GAS /tmp/ccJrAs6S.s page 611 15496 03d8 7546 mov r5, lr 15497 03da B446 mov ip, r6 15498 .LVL2514: 15499 .L1049: 15500 .LBB1865: 15501 .LBB1866: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15502 .loc 3 928 0 15503 03dc D5F80090 ldr r9, [r5] @ unaligned 15504 .LVL2515: 15505 .LBE1866: 15506 .LBE1865: 15507 .LBB1867: 15508 .LBB1868: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15509 .loc 3 948 0 15510 03e0 D7F800A0 ldr r10, [r7] @ unaligned 15511 .LVL2516: 15512 .LBE1868: 15513 .LBE1867: 15514 .LBB1869: 15515 .LBB1870: 15516 .loc 6 2031 0 15517 .syntax unified 15518 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15519 03e4 C9FBDA23 smlaldx r2, r3, r9, r10 15520 @ 0 "" 2 15521 .LVL2517: 15522 .thumb 15523 .syntax unified 15524 .LBE1870: 15525 .LBE1869: 15526 .LBB1871: 15527 .LBB1872: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15528 .loc 3 928 0 15529 03e8 D5F80490 ldr r9, [r5, #4] @ unaligned 15530 .LVL2518: 15531 .LBE1872: 15532 .LBE1871: 15533 .LBB1873: 15534 .LBB1874: 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15535 .loc 3 948 0 15536 03ec 57F804AC ldr r10, [r7, #-4] @ unaligned 15537 03f0 0835 adds r5, r5, #8 15538 .LVL2519: 15539 03f2 083F subs r7, r7, #8 15540 .LVL2520: 15541 .LBE1874: 15542 .LBE1873: 15543 .LBB1875: 15544 .LBB1876: 15545 .loc 6 2031 0 15546 .syntax unified 15547 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15548 03f4 C9FBDA23 smlaldx r2, r3, r9, r10 ARM GAS /tmp/ccJrAs6S.s page 612 15549 @ 0 "" 2 15550 .LVL2521: 15551 .thumb 15552 .syntax unified 15553 .LBE1876: 15554 .LBE1875: 15555 .loc 34 745 0 15556 03f8 BCF1010C subs ip, ip, #1 15557 .LVL2522: 15558 03fc EED1 bne .L1049 15559 03fe C6EB4675 rsb r5, r6, r6, lsl #29 15560 .LVL2523: 15561 0402 08EBC505 add r5, r8, r5, lsl #3 15562 0406 0EEBC606 add r6, lr, r6, lsl #3 15563 .LVL2524: 15564 .L1048: 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Perform the multiply-accumulate */ 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * with y[srcBLen - 1], y[srcBLen - 2] respectively */ 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * with y[srcBLen - 3], y[srcBLen - 4] respectively */ 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement loop counter */ 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k--; 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* For the next MAC operations, the pointer py is used without SIMD 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * So, py is incremented by 1 */ 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = py + 1U; 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** ** No loop unrolling is used. */ 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k = blockSize3 % 0x4U; 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (k > 0U) 15565 .loc 34 767 0 15566 040a 10F00307 ands r7, r0, #3 15567 .LVL2525: 15568 040e 15D0 beq .L1050 15569 .LVL2526: 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = __SMLALD(*px++, *py--, sum); 15570 .loc 34 770 0 15571 0410 B6F900C0 ldrsh ip, [r6] 15572 .LVL2527: 15573 0414 B5F90290 ldrsh r9, [r5, #2] 15574 .LVL2528: 15575 .LBB1877: 15576 .LBB1878: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 15577 .loc 6 2014 0 15578 .syntax unified 15579 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccJrAs6S.s page 613 15580 0418 CCFBC923 smlald r2, r3, ip, r9 15581 @ 0 "" 2 15582 .LVL2529: 15583 .thumb 15584 .syntax unified 15585 .LBE1878: 15586 .LBE1877: 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15587 .loc 34 767 0 15588 041c 012F cmp r7, #1 15589 041e 0DD0 beq .L1050 15590 .LVL2530: 15591 .loc 34 770 0 15592 0420 B6F902C0 ldrsh ip, [r6, #2] 15593 .LVL2531: 15594 0424 B5F90090 ldrsh r9, [r5] 15595 .LVL2532: 15596 .LBB1881: 15597 .LBB1879: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 15598 .loc 6 2014 0 15599 .syntax unified 15600 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15601 0428 CCFBC923 smlald r2, r3, ip, r9 15602 @ 0 "" 2 15603 .LVL2533: 15604 .thumb 15605 .syntax unified 15606 .LBE1879: 15607 .LBE1881: 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15608 .loc 34 767 0 15609 042c 022F cmp r7, #2 15610 042e 05D0 beq .L1050 15611 .LVL2534: 15612 .loc 34 770 0 15613 0430 B6F90460 ldrsh r6, [r6, #4] 15614 .LVL2535: 15615 0434 35F9025C ldrsh r5, [r5, #-2] 15616 .LVL2536: 15617 .LBB1882: 15618 .LBB1880: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 15619 .loc 6 2014 0 15620 .syntax unified 15621 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15622 0438 C6FBC523 smlald r2, r3, r6, r5 15623 @ 0 "" 2 15624 .LVL2537: 15625 .thumb 15626 .syntax unified 15627 .L1050: 15628 .LBE1880: 15629 .LBE1882: 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement loop counter */ 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k--; ARM GAS /tmp/ccJrAs6S.s page 614 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = ++pSrc1; 15630 .loc 34 780 0 15631 043c 0EF1020E add lr, lr, #2 15632 .LVL2538: 15633 .LBB1883: 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15634 .loc 34 777 0 15635 0440 D20B lsrs r2, r2, #15 15636 .LVL2539: 15637 .LBE1883: 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15638 .loc 34 735 0 15639 0442 7445 cmp r4, lr 15640 .LBB1884: 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15641 .loc 34 777 0 15642 0444 42EA4342 orr r2, r2, r3, lsl #17 15643 .LBE1884: 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = pIn2; 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement loop counter */ 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blockSize3--; 15644 .loc 34 784 0 15645 0448 00F1FF30 add r0, r0, #-1 15646 .LVL2540: 15647 .LBB1885: 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15648 .loc 34 777 0 15649 .syntax unified 15650 @ 777 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 15651 044c 02F30F02 ssat r2, #16, r2 15652 @ 0 "" 2 15653 .LVL2541: 15654 .thumb 15655 .syntax unified 15656 .LBE1885: 15657 0450 21F8022B strh r2, [r1], #2 @ movhi 15658 .LVL2542: 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15659 .loc 34 735 0 15660 0454 00F0AB80 beq .L1111 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15661 .loc 34 735 0 is_stmt 0 discriminator 1 15662 0458 0028 cmp r0, #0 15663 045a 69D0 beq .L1018 15664 045c 8608 lsrs r6, r0, #2 15665 .LVL2543: 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15666 .loc 34 745 0 is_stmt 1 15667 045e 002E cmp r6, #0 15668 0460 B7D1 bne .L1112 ARM GAS /tmp/ccJrAs6S.s page 615 15669 .LVL2544: 15670 .L1062: 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15671 .loc 34 738 0 15672 0462 3246 mov r2, r6 15673 0464 3346 mov r3, r6 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15674 .loc 34 745 0 15675 0466 4546 mov r5, r8 15676 0468 7646 mov r6, lr 15677 .LVL2545: 15678 046a CEE7 b .L1048 15679 .LVL2546: 15680 .L1020: 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = pSrc2; 15681 .loc 34 417 0 15682 046c 06F10043 add r3, r6, #-2147483648 15683 .LVL2547: 15684 0470 013B subs r3, r3, #1 15685 0472 00EB4303 add r3, r0, r3, lsl #1 15686 0476 1293 str r3, [sp, #72] 15687 .LVL2548: 15688 0478 023B subs r3, r3, #2 15689 .LVL2549: 15690 047a 0592 str r2, [sp, #20] 15691 047c 0A93 str r3, [sp, #40] 15692 .LVL2550: 15693 .L1058: 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15694 .loc 34 667 0 15695 047e 119B ldr r3, [sp, #68] 15696 0480 002B cmp r3, #0 15697 0482 00F09780 beq .L1059 15698 0486 029A ldr r2, [sp, #8] 15699 0488 002A cmp r2, #0 15700 048a 00F0B480 beq .L1029 15701 048e 022A cmp r2, #2 15702 0490 00F0CC80 beq .L1030 15703 0494 0B9A ldr r2, [sp, #44] 15704 0496 5800 lsls r0, r3, #1 15705 0498 002A cmp r2, #0 15706 049a 00F09180 beq .L1031 15707 049e 059D ldr r5, [sp, #20] 15708 04a0 039C ldr r4, [sp, #12] 15709 04a2 DDF848C0 ldr ip, [sp, #72] 15710 04a6 2918 adds r1, r5, r0 15711 .LVL2551: 15712 .L1032: 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15713 .loc 34 678 0 15714 04a8 B4F900E0 ldrsh lr, [r4] 15715 .LVL2552: 15716 04ac 3CF8023C ldrh r3, [ip, #-2] 15717 04b0 34F8022F ldrh r2, [r4, #2]! 15718 .LVL2553: 15719 04b4 BCF80060 ldrh r6, [ip] 15720 04b8 6788 ldrh r7, [r4, #2] ARM GAS /tmp/ccJrAs6S.s page 616 15721 04ba 12FB03F2 smulbb r2, r2, r3 15722 04be D317 asrs r3, r2, #31 15723 04c0 CEFB8623 smlalbb r2, r3, lr, r6 15724 .LVL2554: 15725 04c4 3CF8046C ldrh r6, [ip, #-4] 15726 04c8 C7FB8623 smlalbb r2, r3, r7, r6 15727 .LVL2555: 15728 04cc 1F46 mov r7, r3 15729 .LBB1886: 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15730 .loc 34 685 0 15731 04ce D30B lsrs r3, r2, #15 15732 04d0 43EA4743 orr r3, r3, r7, lsl #17 15733 .syntax unified 15734 @ 685 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 15735 04d4 03F30F03 ssat r3, #16, r3 15736 @ 0 "" 2 15737 .LVL2556: 15738 .thumb 15739 .syntax unified 15740 .LBE1886: 15741 04d8 25F8023B strh r3, [r5], #2 @ movhi 15742 .LVL2557: 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15743 .loc 34 667 0 15744 04dc 8D42 cmp r5, r1 15745 04de E3D1 bne .L1032 15746 .LVL2558: 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15747 .loc 34 733 0 15748 04e0 0B9B ldr r3, [sp, #44] 15749 .LVL2559: 15750 04e2 9E08 lsrs r6, r3, #2 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pSrc1; 15751 .loc 34 716 0 15752 04e4 039B ldr r3, [sp, #12] 15753 04e6 0344 add r3, r3, r0 15754 04e8 1846 mov r0, r3 15755 .LVL2560: 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15756 .loc 34 733 0 15757 04ea 3446 mov r4, r6 15758 .LVL2561: 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15759 .loc 34 735 0 15760 04ec 002E cmp r6, #0 15761 04ee 7FF469AF bne .L1037 15762 .LVL2562: 15763 .L1061: 15764 04f2 0B9B ldr r3, [sp, #44] 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pSrc1; 15765 .loc 34 716 0 15766 04f4 0446 mov r4, r0 15767 .LVL2563: 15768 .L1047: 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** j--; ARM GAS /tmp/ccJrAs6S.s page 617 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* The second part of the stage starts here */ 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* SIMD is not used for the next MAC operations, 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** * so pointer py is updated to read only one sample at a time */ 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = py + 1U; 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (blockSize3 > 0U) 15769 .loc 34 794 0 15770 04f6 DBB1 cbz r3, .L1018 15771 04f8 DDF848E0 ldr lr, [sp, #72] 15772 04fc 9C46 mov ip, r3 15773 .LVL2564: 15774 .L1054: 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Accumulator is made zero for every iteration */ 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = 0; 15775 .loc 34 797 0 15776 04fe 0023 movs r3, #0 15777 0500 1A46 mov r2, r3 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pSrc1; 15778 .loc 34 716 0 15779 0502 F046 mov r8, lr 15780 0504 2746 mov r7, r4 15781 0506 6046 mov r0, ip 15782 .LVL2565: 15783 .L1057: 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k = blockSize3; 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** while (k > 0U) 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Perform the multiply-accumulates */ 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* sum += x[srcALen-1] * y[srcBLen-1] */ 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = __SMLALD(*px++, *py--, sum); 15784 .loc 34 806 0 15785 0508 37F9025B ldrsh r5, [r7], #2 15786 .LVL2566: 15787 050c 38F90269 ldrsh r6, [r8], #-2 15788 .LVL2567: 15789 .LBB1887: 15790 .LBB1888: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 15791 .loc 6 2014 0 15792 .syntax unified 15793 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15794 0510 C5FBC632 smlald r3, r2, r5, r6 15795 @ 0 "" 2 15796 .LVL2568: 15797 .thumb 15798 .syntax unified 15799 .LBE1888: 15800 .LBE1887: 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15801 .loc 34 802 0 15802 0514 0138 subs r0, r0, #1 ARM GAS /tmp/ccJrAs6S.s page 618 15803 .LVL2569: 15804 0516 F7D1 bne .L1057 15805 .LVL2570: 15806 .LBB1889: 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement loop counter */ 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** k--; 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); 15807 .loc 34 813 0 15808 0518 DB0B lsrs r3, r3, #15 15809 .LVL2571: 15810 .LBE1889: 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15811 .loc 34 794 0 15812 051a BCF1010C subs ip, ip, #1 15813 .LVL2572: 15814 .LBB1890: 15815 .loc 34 813 0 15816 051e 43EA4243 orr r3, r3, r2, lsl #17 15817 .LBE1890: 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = ++pSrc1; 15818 .loc 34 816 0 15819 0522 04F10204 add r4, r4, #2 15820 .LVL2573: 15821 .LBB1891: 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 15822 .loc 34 813 0 15823 .syntax unified 15824 @ 813 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 15825 0526 03F30F03 ssat r3, #16, r3 15826 @ 0 "" 2 15827 .LVL2574: 15828 .thumb 15829 .syntax unified 15830 .LBE1891: 15831 052a 21F8023B strh r3, [r1], #2 @ movhi 15832 .LVL2575: 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15833 .loc 34 794 0 15834 052e E6D1 bne .L1054 15835 .LVL2576: 15836 .L1018: 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** py = pSrc2; 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Decrement loop counter */ 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** blockSize3--; 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *pIn1 = pSrcA; /* InputA pointer */ 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** const q15_t *pIn2 = pSrcB; /* InputB pointer */ ARM GAS /tmp/ccJrAs6S.s page 619 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** q63_t sum; /* Accumulator */ 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** uint32_t i, j; /* Loop counters */ 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Loop to calculate convolution for output length number of values */ 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** for (i = 0; i < (srcALen + srcBLen - 1); i++) 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Initialize sum with zero to carry on MAC operations */ 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum = 0; 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Loop to perform MAC operations according to convolution equation */ 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** for (j = 0U; j <= i; j++) 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Check the array limitations */ 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** if (((i - j) < srcBLen) && (j < srcALen)) 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* z[i] += x[i-j] * y[j] */ 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** sum += ((q31_t) pIn1[j] * pIn2[i - j]); 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** /* Store the output in the destination buffer */ 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U); 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** } 15837 .loc 34 853 0 15838 0530 15B0 add sp, sp, #84 15839 .LCFI92: 15840 .cfi_remember_state 15841 .cfi_def_cfa_offset 36 15842 @ sp needed 15843 0532 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 15844 .LVL2577: 15845 .L1110: 15846 .LCFI93: 15847 .cfi_restore_state 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 15848 .loc 34 516 0 15849 0536 0D9C ldr r4, [sp, #52] 15850 .LBB1892: 15851 .LBB1893: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15852 .loc 3 909 0 15853 0538 DCF808C0 ldr ip, [ip, #8] @ unaligned 15854 .LBE1893: 15855 .LBE1892: 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 15856 .loc 34 516 0 15857 053c 34F9067C ldrsh r7, [r4, #-6] 15858 .LVL2578: 15859 .LBB1894: 15860 .LBB1895: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 15861 .loc 6 2014 0 15862 0540 099C ldr r4, [sp, #36] ARM GAS /tmp/ccJrAs6S.s page 620 15863 .LBE1895: 15864 .LBE1894: 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 15865 .loc 34 520 0 15866 0542 BFB2 uxth r7, r7 15867 .LVL2579: 15868 .LBB1897: 15869 .LBB1896: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 15870 .loc 6 2014 0 15871 .syntax unified 15872 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15873 0544 C4FBC716 smlald r1, r6, r4, r7 15874 @ 0 "" 2 15875 .LVL2580: 15876 .thumb 15877 .syntax unified 15878 .LBE1896: 15879 .LBE1897: 15880 .LBB1898: 15881 .LBB1899: 15882 0548 4446 mov r4, r8 15883 .syntax unified 15884 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15885 054a CEFBC754 smlald r5, r4, lr, r7 15886 @ 0 "" 2 15887 .LVL2581: 15888 .thumb 15889 .syntax unified 15890 .LBE1899: 15891 .LBE1898: 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc2 = __SMLALDX(x1, c0, acc2); 15892 .loc 34 529 0 15893 054e A046 mov r8, r4 15894 .LVL2582: 15895 .LBB1900: 15896 .LBB1901: 15897 .loc 6 2031 0 15898 .syntax unified 15899 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15900 0550 CEFBD720 smlaldx r2, r0, lr, r7 15901 @ 0 "" 2 15902 .LVL2583: 15903 .thumb 15904 .syntax unified 15905 .LBE1901: 15906 .LBE1900: 15907 .LBB1902: 15908 .LBB1903: 15909 .syntax unified 15910 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15911 0554 CCFBD73B smlaldx r3, fp, ip, r7 15912 @ 0 "" 2 15913 .LVL2584: 15914 .thumb 15915 .syntax unified 15916 0558 92E6 b .L1041 ARM GAS /tmp/ccJrAs6S.s page 621 15917 .LVL2585: 15918 .L1042: 15919 .LBE1903: 15920 .LBE1902: 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 15921 .loc 34 553 0 15922 055a 032C cmp r4, #3 15923 055c 7FF490AE bne .L1041 15924 .LVL2586: 15925 .LBB1904: 15926 .LBB1905: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15927 .loc 3 909 0 15928 0560 049C ldr r4, [sp, #16] 15929 .LBE1905: 15930 .LBE1904: 15931 .LBB1907: 15932 .LBB1908: 15933 0562 0D9F ldr r7, [sp, #52] 15934 .LBE1908: 15935 .LBE1907: 15936 .LBB1910: 15937 .LBB1911: 15938 .loc 6 2031 0 15939 0564 0C91 str r1, [sp, #48] 15940 .LBE1911: 15941 .LBE1910: 15942 .LBB1913: 15943 .LBB1906: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15944 .loc 3 909 0 15945 0566 D4F800A0 ldr r10, [r4] @ unaligned 15946 .LBE1906: 15947 .LBE1913: 15948 .LBB1914: 15949 .LBB1915: 15950 056a D4F802C0 ldr ip, [r4, #2] @ unaligned 15951 .LBE1915: 15952 .LBE1914: 15953 .LBB1916: 15954 .LBB1909: 15955 056e 57F8089C ldr r9, [r7, #-8] @ unaligned 15956 .LVL2587: 15957 .LBE1909: 15958 .LBE1916: 15959 .LBB1917: 15960 .LBB1912: 15961 .loc 6 2031 0 15962 0572 0999 ldr r1, [sp, #36] 15963 .LVL2588: 15964 0574 0C9C ldr r4, [sp, #48] 15965 .syntax unified 15966 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15967 0576 C1FBD946 smlaldx r4, r6, r1, r9 15968 @ 0 "" 2 15969 .LVL2589: 15970 .thumb ARM GAS /tmp/ccJrAs6S.s page 622 15971 .syntax unified 15972 057a 2146 mov r1, r4 15973 057c 0C94 str r4, [sp, #48] 15974 .LVL2590: 15975 .LBE1912: 15976 .LBE1917: 15977 .LBB1918: 15978 .LBB1919: 15979 057e 4446 mov r4, r8 15980 .syntax unified 15981 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15982 0580 CEFBD954 smlaldx r5, r4, lr, r9 15983 @ 0 "" 2 15984 .LVL2591: 15985 .thumb 15986 .syntax unified 15987 .LBE1919: 15988 .LBE1918: 15989 .LBB1920: 15990 .LBB1921: 15991 .syntax unified 15992 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15993 0584 CAFBD920 smlaldx r2, r0, r10, r9 15994 @ 0 "" 2 15995 .LVL2592: 15996 .thumb 15997 .syntax unified 15998 .LBE1921: 15999 .LBE1920: 16000 .LBB1922: 16001 .LBB1923: 16002 .syntax unified 16003 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 16004 0588 CCFBD93B smlaldx r3, fp, ip, r9 16005 @ 0 "" 2 16006 .LVL2593: 16007 .thumb 16008 .syntax unified 16009 .LBE1923: 16010 .LBE1922: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 16011 .loc 34 570 0 16012 058c 37F90A8C ldrsh r8, [r7, #-10] 16013 .LVL2594: 16014 .LBB1924: 16015 .LBB1925: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 16016 .loc 3 909 0 16017 0590 049F ldr r7, [sp, #16] 16018 0592 D7F80490 ldr r9, [r7, #4] @ unaligned 16019 .LVL2595: 16020 .LBE1925: 16021 .LBE1924: 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 16022 .loc 34 574 0 16023 0596 1FFA88F7 uxth r7, r8 16024 .LVL2596: ARM GAS /tmp/ccJrAs6S.s page 623 16025 .LBB1926: 16026 .LBB1927: 16027 .loc 6 2031 0 16028 .syntax unified 16029 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 16030 059a CEFBD716 smlaldx r1, r6, lr, r7 16031 @ 0 "" 2 16032 .LVL2597: 16033 .thumb 16034 .syntax unified 16035 .LBE1927: 16036 .LBE1926: 16037 .LBB1928: 16038 .LBB1929: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 16039 .loc 6 2014 0 16040 .syntax unified 16041 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 16042 059e CCFBC754 smlald r5, r4, ip, r7 16043 @ 0 "" 2 16044 .LVL2598: 16045 .thumb 16046 .syntax unified 16047 .LBE1929: 16048 .LBE1928: 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** acc2 = __SMLALDX(x2, c0, acc2); 16049 .loc 34 583 0 16050 05a2 A046 mov r8, r4 16051 .LVL2599: 16052 .LBB1930: 16053 .LBB1931: 16054 .loc 6 2031 0 16055 .syntax unified 16056 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 16057 05a4 CCFBD720 smlaldx r2, r0, ip, r7 16058 @ 0 "" 2 16059 .LVL2600: 16060 .thumb 16061 .syntax unified 16062 .LBE1931: 16063 .LBE1930: 16064 .LBB1932: 16065 .LBB1933: 16066 .syntax unified 16067 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 16068 05a8 C9FBD73B smlaldx r3, fp, r9, r7 16069 @ 0 "" 2 16070 .LVL2601: 16071 .thumb 16072 .syntax unified 16073 05ac 68E6 b .L1041 16074 .LVL2602: 16075 .L1111: 16076 05ae 0B90 str r0, [sp, #44] 16077 05b0 0346 mov r3, r0 16078 05b2 A0E7 b .L1047 16079 .LVL2603: ARM GAS /tmp/ccJrAs6S.s page 624 16080 .L1059: 16081 .LBE1933: 16082 .LBE1932: 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 16083 .loc 34 667 0 16084 05b4 0599 ldr r1, [sp, #20] 16085 05b6 FBE6 b .L1028 16086 .LVL2604: 16087 .L1060: 16088 05b8 0A46 mov r2, r1 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 16089 .loc 34 435 0 16090 05ba 039E ldr r6, [sp, #12] 16091 05bc 0599 ldr r1, [sp, #20] 16092 .LVL2605: 16093 05be 8EE6 b .L1038 16094 .LVL2606: 16095 .L1031: 16096 05c0 059A ldr r2, [sp, #20] 16097 05c2 039B ldr r3, [sp, #12] 16098 .LVL2607: 16099 05c4 DDF848C0 ldr ip, [sp, #72] 16100 05c8 1118 adds r1, r2, r0 16101 05ca 9D1E subs r5, r3, #2 16102 .LVL2608: 16103 .L1033: 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 16104 .loc 34 678 0 16105 05cc BCF80030 ldrh r3, [ip] 16106 05d0 35F8024F ldrh r4, [r5, #2]! 16107 .LVL2609: 16108 05d4 13FB04F3 smulbb r3, r3, r4 16109 05d8 DF17 asrs r7, r3, #31 16110 .LBB1934: 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 16111 .loc 34 685 0 16112 05da DB0B lsrs r3, r3, #15 16113 05dc 43EA4743 orr r3, r3, r7, lsl #17 16114 .syntax unified 16115 @ 685 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 16116 05e0 03F30F03 ssat r3, #16, r3 16117 @ 0 "" 2 16118 .LVL2610: 16119 .thumb 16120 .syntax unified 16121 .LBE1934: 16122 05e4 22F8023B strh r3, [r2], #2 @ movhi 16123 .LVL2611: 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 16124 .loc 34 667 0 16125 05e8 8A42 cmp r2, r1 16126 05ea EFD1 bne .L1033 16127 .LVL2612: 16128 .L1034: 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pSrc1; 16129 .loc 34 716 0 16130 05ec 039B ldr r3, [sp, #12] ARM GAS /tmp/ccJrAs6S.s page 625 16131 .LVL2613: 16132 05ee 0344 add r3, r3, r0 16133 05f0 1C46 mov r4, r3 16134 .LVL2614: 16135 05f2 0B9B ldr r3, [sp, #44] 16136 .LVL2615: 16137 05f4 7FE7 b .L1047 16138 .LVL2616: 16139 .L1029: 16140 05f6 0599 ldr r1, [sp, #20] 16141 .LBB1935: 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 16142 .loc 34 685 0 16143 .syntax unified 16144 @ 685 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 16145 05f8 02F30F08 ssat r8, #16, r2 16146 @ 0 "" 2 16147 .thumb 16148 .syntax unified 16149 05fc 5800 lsls r0, r3, #1 16150 05fe 0B18 adds r3, r1, r0 16151 .LVL2617: 16152 .L1036: 16153 .LBE1935: 16154 0600 21F8028B strh r8, [r1], #2 @ movhi 16155 .LVL2618: 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 16156 .loc 34 667 0 16157 0604 8B42 cmp r3, r1 16158 0606 FBD1 bne .L1036 16159 .LVL2619: 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** px = pSrc1; 16160 .loc 34 716 0 16161 0608 039B ldr r3, [sp, #12] 16162 060a 0344 add r3, r3, r0 16163 060c 1846 mov r0, r3 16164 .LVL2620: 16165 060e 0B9B ldr r3, [sp, #44] 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 16166 .loc 34 733 0 16167 0610 6FF04044 mvn r4, #-1073741824 16168 0614 9E08 lsrs r6, r3, #2 16169 0616 D5E6 b .L1037 16170 .LVL2621: 16171 .L1107: 16172 0618 06F10043 add r3, r6, #-2147483648 16173 061c 013B subs r3, r3, #1 16174 061e 0193 str r3, [sp, #4] 16175 0620 B2E5 b .L1021 16176 .LVL2622: 16177 .L1108: 16178 0622 01F10043 add r3, r1, #-2147483648 16179 0626 013B subs r3, r3, #1 16180 0628 0193 str r3, [sp, #4] 16181 062a ADE5 b .L1021 16182 .LVL2623: 16183 .L1030: ARM GAS /tmp/ccJrAs6S.s page 626 16184 062c 059A ldr r2, [sp, #20] 16185 062e 039C ldr r4, [sp, #12] 16186 0630 129D ldr r5, [sp, #72] 16187 0632 5800 lsls r0, r3, #1 16188 0634 1118 adds r1, r2, r0 16189 .LVL2624: 16190 .L1035: 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 16191 .loc 34 678 0 16192 0636 B4F90070 ldrsh r7, [r4] 16193 .LVL2625: 16194 063a 2E88 ldrh r6, [r5] 16195 063c 34F8023F ldrh r3, [r4, #2]! 16196 .LVL2626: 16197 0640 35F802CC ldrh ip, [r5, #-2] 16198 0644 16FB07F6 smulbb r6, r6, r7 16199 0648 F717 asrs r7, r6, #31 16200 .LVL2627: 16201 064a CCFB8367 smlalbb r6, r7, ip, r3 16202 .LBB1936: 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** 16203 .loc 34 685 0 16204 064e F30B lsrs r3, r6, #15 16205 0650 43EA4743 orr r3, r3, r7, lsl #17 16206 .syntax unified 16207 @ 685 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 16208 0654 03F30F03 ssat r3, #16, r3 16209 @ 0 "" 2 16210 .LVL2628: 16211 .thumb 16212 .syntax unified 16213 .LBE1936: 16214 0658 22F8023B strh r3, [r2], #2 @ movhi 16215 .LVL2629: 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c **** { 16216 .loc 34 667 0 16217 065c 8A42 cmp r2, r1 16218 065e EAD1 bne .L1035 16219 0660 C4E7 b .L1034 16220 .LVL2630: 16221 .L1109: 16222 0662 029B ldr r3, [sp, #8] 16223 .LVL2631: 16224 0664 03F10043 add r3, r3, #-2147483648 16225 0668 013B subs r3, r3, #1 16226 066a 0193 str r3, [sp, #4] 16227 066c 8CE5 b .L1021 16228 .cfi_endproc 16229 .LFE179: 16231 066e 00BF .section .text.arm_conv_q31,"ax",%progbits 16232 .align 1 16233 .p2align 2,,3 16234 .global arm_conv_q31 16235 .syntax unified 16236 .thumb 16237 .thumb_func 16238 .fpu fpv4-sp-d16 ARM GAS /tmp/ccJrAs6S.s page 627 16240 arm_conv_q31: 16241 .LFB180: 16242 .file 35 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Title: arm_conv_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Description: Convolution of Q31 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** @addtogroup Conv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** @brief Convolution of Q31 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** @param[out] pDst points to the location where the output result is written. Length srcA 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** The function is implemented using an internal 64-bit accumulator. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** The accumulator has a 2.62 format and maintains full precision of the intermedia 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** There is no saturation on intermediate additions. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** Thus, if the accumulator overflows it wraps around and distorts the result. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** The input signals should be scaled down to avoid intermediate overflows. ARM GAS /tmp/ccJrAs6S.s page 628 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** as maximum of min(srcALen, srcBLen) number of additions are carried internally. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** @remark 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** Refer to \ref arm_conv_fast_q31() for a faster but less precise implementation o 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #if defined(ARM_MATH_MVEI) 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #include "arm_helium_utils.h" 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #include "arm_vec_filtering.h" 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** void arm_conv_q31( 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t * pSrcA, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t srcALen, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t * pSrcB, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t srcBLen, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** q31_t * pDst) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *pIn1 = pSrcA; /* inputA pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *pIn2 = pSrcB; /* inputB pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Loop to perform MAC operations according to correlation equation 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *pX; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *pY; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *pA; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *pB; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int32_t i = 0U, j = 0; /* loop counters */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int32_t block1, block2, block3; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t vddupStartIdx = 3; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32x4_t decrIdxVec = vddupq_u32(vddupStartIdx, 1); 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** if (srcALen < srcBLen) 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Initialization to inputB pointer 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pIn1 = pSrcB; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Initialization to the end of inputA pointer 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pIn2 = pSrcA; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Swapping the lengths 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** j = srcALen; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** srcALen = srcBLen; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** srcBLen = j; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** block1 = srcBLen - 1; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** block2 = srcALen - srcBLen + 1; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** block3 = srcBLen - 1; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pA = pIn1; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pB = pIn2 - 3; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 629 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** for (i = 0; i <= block1 - 2; i += 2) 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t count = i + 1; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc0 = 0LL; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc1 = 0LL; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pX = pA; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pY = pB; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q31(acc0, acc1, pX, pY, count); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc0; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc1; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pB += 2; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** for (; i < block1; i++) 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t count = i + 1; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc = 0LL; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pX = pA; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pY = pB; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** MVE_INTR_CONV_SINGLE_Q31(acc, pX, pY, count); 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pB++; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** for (i = 0; i <= block2 - 4; i += 4) 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t count = srcBLen; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc0 = 0LL; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc1 = 0LL; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc2 = 0LL; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc3 = 0LL; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pX = pA; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pY = pB; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * compute 4 accumulators per loop 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * size is fixed for all accumulators 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * X pointer is incrementing for successive accumulators 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q31(acc0, acc1, acc2, acc3, pX, pY, count); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc0; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc1; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc2; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc3; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pA += 4; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** for (; i <= block2 - 2; i += 2) 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t count = srcBLen; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc0 = 0LL; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc1 = 0LL; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 630 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pX = pA; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pY = pB; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * compute 2 accumulators per loop 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * size is fixed for all accumulators 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * X pointer is incrementing for successive accumulators 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q31(acc0, acc1, pX, pY, count); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc0; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc1; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pA += 2; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** if (block2 & 1) 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t count = srcBLen; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc = 0LL; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pX = pA; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pY = pB; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** MVE_INTR_CONV_SINGLE_Q31(acc, pX, pY, count); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pA++; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** for (i = block3; i >= 2; i -= 2) 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t count = i; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc0 = 0LL; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc1 = 0LL; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pX = pA; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pY = pB; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q31(acc0, acc1, pX, pY, count); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc0; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc1; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pA += 2; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** for (; i >= 1; i--) 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t count = i; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** int64_t acc = 0LL; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pX = pA; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pY = pB; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** MVE_INTR_CONV_SINGLE_Q31(acc, pX, pY, count); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pDst++ = (q31_t) acc; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pA++; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #else ARM GAS /tmp/ccJrAs6S.s page 631 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** void arm_conv_q31( 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t * pSrcA, 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t srcALen, 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t * pSrcB, 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t srcBLen, 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** q31_t * pDst) 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16243 .loc 35 232 0 16244 .cfi_startproc 16245 @ args = 4, pretend = 0, frame = 16 16246 @ frame_needed = 0, uses_anonymous_args = 0 16247 .LVL2632: 16248 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 16249 .LCFI94: 16250 .cfi_def_cfa_offset 36 16251 .cfi_offset 4, -36 16252 .cfi_offset 5, -32 16253 .cfi_offset 6, -28 16254 .cfi_offset 7, -24 16255 .cfi_offset 8, -20 16256 .cfi_offset 9, -16 16257 .cfi_offset 10, -12 16258 .cfi_offset 11, -8 16259 .cfi_offset 14, -4 16260 0004 85B0 sub sp, sp, #20 16261 .LCFI95: 16262 .cfi_def_cfa_offset 56 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #if (1) 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** //#if !defined(ARM_MATH_CM0_FAMILY) 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *pIn1; /* InputA pointer */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *pIn2; /* InputB pointer */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** q31_t *pOut = pDst; /* Output pointer */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *px; /* Intermediate inputA pointer */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *py; /* Intermediate inputB pointer */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** q63_t sum; /* Accumulators */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t j, k, count, blkCnt; /* Loop counters */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** q63_t acc0, acc1, acc2; /* Accumulators */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** q31_t x0, x1, x2, c0; /* Temporary variables to hold state and coe 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #endif 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* srcB is always made to slide across srcA. */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** if (srcALen >= srcBLen) 16263 .loc 35 255 0 16264 0006 9942 cmp r1, r3 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16265 .loc 35 232 0 16266 0008 8346 mov fp, r0 16267 000a 0092 str r2, [sp] 16268 000c 0E9E ldr r6, [sp, #56] ARM GAS /tmp/ccJrAs6S.s page 632 16269 .LVL2633: 16270 .loc 35 255 0 16271 000e 06D3 bcc .L1114 16272 0010 1046 mov r0, r2 16273 .LVL2634: 16274 0012 1A46 mov r2, r3 16275 .LVL2635: 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Initialization of inputA pointer */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pIn1 = pSrcA; 16276 .loc 35 258 0 16277 0014 CDF800B0 str fp, [sp] 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16278 .loc 35 255 0 16279 0018 0B46 mov r3, r1 16280 .LVL2636: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Initialization of inputB pointer */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pIn2 = pSrcB; 16281 .loc 35 261 0 16282 001a 8346 mov fp, r0 16283 .LVL2637: 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16284 .loc 35 255 0 16285 001c 1146 mov r1, r2 16286 .LVL2638: 16287 .L1114: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** else 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Initialization of inputA pointer */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pIn1 = pSrcB; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Initialization of inputB pointer */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pIn2 = pSrcA; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** j = srcBLen; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** srcBLen = srcALen; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** srcALen = j; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* The function is internally 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * divided into three stages according to the number of multiplications that has to be 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * taken place between inputA samples and inputB samples. In the first stage of the 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * algorithm, the multiplications increase by one for every iteration. 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * In the third stage of the algorithm, the multiplications decrease by one 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * for every iteration. */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* The algorithm is implemented in three stages. 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** The loop counters of each stage is initiated here. */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blockSize1 = srcBLen - 1U; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blockSize2 = srcALen - (srcBLen - 1U); 16288 .loc 35 289 0 16289 001e 03F10108 add r8, r3, #1 ARM GAS /tmp/ccJrAs6S.s page 633 16290 0022 A8EB0103 sub r3, r8, r1 16291 .LVL2639: 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blockSize3 = blockSize1; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* -------------------------- 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Initializations of stage1 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * -------------------------*/ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* sum = x[0] * y[0] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * sum = x[0] * y[1] + x[1] * y[0] 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * .... 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** The count variable holds the number of MAC operations performed */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** count = 1U; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Working pointer of inputA */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** px = pIn1; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Working pointer of inputB */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** py = pIn2; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* ------------------------ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Stage1 process 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * ----------------------*/ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* The first stage starts here */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (blockSize1 > 0U) 16292 .loc 35 318 0 16293 0026 4C1E subs r4, r1, #1 16294 .LVL2640: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blockSize3 = blockSize1; 16295 .loc 35 289 0 16296 0028 0193 str r3, [sp, #4] 16297 .LVL2641: 16298 .loc 35 318 0 16299 002a 70D0 beq .L1115 16300 002c 009B ldr r3, [sp] 16301 .LVL2642: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16302 .loc 35 310 0 16303 002e 0394 str r4, [sp, #12] 16304 0030 8800 lsls r0, r1, #2 16305 0032 1F1D adds r7, r3, #4 16306 0034 0290 str r0, [sp, #8] 16307 0036 03EB000A add r10, r3, r0 16308 003a A6F1040E sub lr, r6, #4 16309 003e DC46 mov ip, fp 16310 0040 B846 mov r8, r7 16311 .LVL2643: 16312 0042 8946 mov r9, r1 16313 0044 1C46 mov r4, r3 16314 .LVL2644: 16315 .L1117: ARM GAS /tmp/ccJrAs6S.s page 634 16316 0046 6246 mov r2, ip 16317 0048 2346 mov r3, r4 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Accumulator is made zero for every iteration */ 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum = 0; 16318 .loc 35 321 0 16319 004a 0020 movs r0, #0 16320 004c 0021 movs r1, #0 16321 .LVL2645: 16322 .L1116: 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k = count >> 2U; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (k > 0U) 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* x[0] * y[srcBLen - 1] */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * (*py--); 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* x[1] * y[srcBLen - 2] */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * (*py--); 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* x[2] * y[srcBLen - 3] */ 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * (*py--); 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* x[3] * y[srcBLen - 4] */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * (*py--); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement loop counter */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k--; 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Loop unrolling: Compute remaining outputs */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k = count % 0x4U; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #else 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Initialize k with number of samples */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k = count; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (k > 0U) 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Perform the multiply-accumulate */ 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * *py--; 16323 .loc 35 359 0 16324 004e 53F8047B ldr r7, [r3], #4 16325 .LVL2646: 16326 0052 52F80459 ldr r5, [r2], #-4 16327 .LVL2647: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16328 .loc 35 356 0 16329 0056 4345 cmp r3, r8 16330 .loc 35 359 0 ARM GAS /tmp/ccJrAs6S.s page 635 16331 0058 C5FB0701 smlal r0, r1, r5, r7 16332 .LVL2648: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16333 .loc 35 356 0 16334 005c F7D1 bne .L1116 16335 .LVL2649: 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement loop counter */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k--; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pOut++ = (q31_t) (sum >> 31); 16336 .loc 35 366 0 16337 005e C20F lsrs r2, r0, #31 16338 .LVL2650: 16339 0060 03F10408 add r8, r3, #4 16340 0064 42EA4102 orr r2, r2, r1, lsl #1 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16341 .loc 35 318 0 16342 0068 C245 cmp r10, r8 16343 006a 0CF1040C add ip, ip, #4 16344 .LVL2651: 16345 .loc 35 366 0 16346 006e 4EF8042F str r2, [lr, #4]! 16347 .LVL2652: 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16348 .loc 35 318 0 16349 0072 E8D1 bne .L1117 16350 0074 029B ldr r3, [sp, #8] 16351 0076 039C ldr r4, [sp, #12] 16352 .LVL2653: 16353 0078 4946 mov r1, r9 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** py = pIn2 + count; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** px = pIn1; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Increment MAC count */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** count++; 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement loop counter */ 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blockSize1--; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* -------------------------- 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Initializations of stage2 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * ------------------------*/ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * .... 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Working pointer of inputA */ 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** px = pIn1; ARM GAS /tmp/ccJrAs6S.s page 636 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Working pointer of inputB */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pSrc2 = pIn2 + (srcBLen - 1U); 16354 .loc 35 393 0 16355 007a 09F18045 add r5, r9, #1073741824 16356 007e 043B subs r3, r3, #4 16357 0080 013D subs r5, r5, #1 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** py = pSrc2; 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* count is index by which the pointer pIn1 to be incremented */ 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** count = 0U; 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* ------------------- 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Stage2 process 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * ------------------*/ 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * So, to loop unroll over blockSize2, 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * srcBLen should be greater than or equal to 4 */ 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** if (srcBLen >= 4U) 16358 .loc 35 406 0 16359 0082 0329 cmp r1, #3 16360 0084 1E44 add r6, r6, r3 16361 .LVL2654: 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** py = pSrc2; 16362 .loc 35 393 0 16363 0086 0BEB8505 add r5, fp, r5, lsl #2 16364 .LVL2655: 16365 .loc 35 406 0 16366 008a 45D9 bls .L1133 16367 .LVL2656: 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Loop unroll by 3 */ 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blkCnt = blockSize2 / 3; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (blkCnt > 0U) 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Set all accumulators to zero */ 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc0 = 0; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc1 = 0; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc2 = 0; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* read x[0], x[1], x[2] samples */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** x0 = *px++; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** x1 = *px++; 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Apply loop unrolling and compute 3 MACs simultaneously. */ 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k = srcBLen / 3; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* First part of the processing with loop unrolling. Compute 3 MACs at a time. 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** ** a second loop below computes MACs for the remaining 1 to 2 samples. */ 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** do 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Read y[srcBLen - 1] sample */ 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** c0 = *(py); ARM GAS /tmp/ccJrAs6S.s page 637 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Read x[3] sample */ 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** x2 = *(px); 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Perform the multiply-accumulate */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* acc0 += x[0] * y[srcBLen - 1] */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc0 += ((q63_t) x0 * c0); 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* acc1 += x[1] * y[srcBLen - 1] */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc1 += ((q63_t) x1 * c0); 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* acc2 += x[2] * y[srcBLen - 1] */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc2 += ((q63_t) x2 * c0); 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Read y[srcBLen - 2] sample */ 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** c0 = *(py - 1U); 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Read x[4] sample */ 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** x0 = *(px + 1U); 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Perform the multiply-accumulate */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* acc0 += x[1] * y[srcBLen - 2] */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc0 += ((q63_t) x1 * c0); 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* acc1 += x[2] * y[srcBLen - 2] */ 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc1 += ((q63_t) x2 * c0); 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* acc2 += x[3] * y[srcBLen - 2] */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc2 += ((q63_t) x0 * c0); 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Read y[srcBLen - 3] sample */ 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** c0 = *(py - 2U); 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Read x[5] sample */ 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** x1 = *(px + 2U); 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Perform the multiply-accumulate */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* acc0 += x[2] * y[srcBLen - 3] */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc0 += ((q63_t) x2 * c0); 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* acc1 += x[3] * y[srcBLen - 2] */ 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc1 += ((q63_t) x0 * c0); 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* acc2 += x[4] * y[srcBLen - 2] */ 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc2 += ((q63_t) x1 * c0); 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* update scratch pointers */ 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** px += 3U; 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** py -= 3U; 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } while (--k); 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* If the srcBLen is not a multiple of 3, compute any remaining MACs here. 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** ** No loop unrolling is used. */ 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k = srcBLen - (3 * (srcBLen / 3)); 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (k > 0U) 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Read y[srcBLen - 5] sample */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** c0 = *py--; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Read x[7] sample */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** x2 = *px++; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Perform the multiply-accumulates */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* acc0 += x[4] * y[srcBLen - 5] */ 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc0 += ((q63_t) x0 * c0); ARM GAS /tmp/ccJrAs6S.s page 638 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc1 += ((q63_t) x1 * c0); 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** acc2 += ((q63_t) x2 * c0); 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Reuse the present samples for the next MAC */ 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** x0 = x1; 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** x1 = x2; 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement loop counter */ 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k--; 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pOut++ = (q31_t) (acc0 >> 31); 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pOut++ = (q31_t) (acc1 >> 31); 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pOut++ = (q31_t) (acc2 >> 31); 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Increment the pointer pIn1 index, count by 3 */ 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** count += 3U; 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** px = pIn1 + count; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** py = pSrc2; 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement loop counter */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blkCnt--; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Loop unrolling: Compute remaining outputs */ 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blkCnt = blockSize2 - 3 * (blockSize2 / 3); 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #else 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Initialize blkCnt with number of samples */ 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blkCnt = blockSize2; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (blkCnt > 0U) 16368 .loc 35 529 0 16369 008c 019B ldr r3, [sp, #4] 16370 008e 002B cmp r3, #0 16371 0090 70D0 beq .L1135 16372 0092 4FEA8308 lsl r8, r3, #2 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16373 .loc 35 390 0 16374 0096 DDF800B0 ldr fp, [sp] 16375 .LVL2657: 16376 009a 06EB080C add ip, r6, r8 16377 009e A246 mov r10, r4 16378 00a0 B646 mov lr, r6 16379 .LVL2658: 16380 .L1129: 16381 00a2 4B46 mov r3, r9 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** py = pSrc2; 16382 .loc 35 393 0 ARM GAS /tmp/ccJrAs6S.s page 639 16383 00a4 2F46 mov r7, r5 16384 00a6 5A46 mov r2, fp 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Accumulator is made zero for every iteration */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum = 0; 16385 .loc 35 532 0 16386 00a8 0020 movs r0, #0 16387 .LVL2659: 16388 00aa 0021 movs r1, #0 16389 .LVL2660: 16390 .L1128: 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k = srcBLen >> 2U; 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (k > 0U) 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Perform the multiply-accumulates */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * *py--; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * *py--; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * *py--; 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * *py--; 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement loop counter */ 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k--; 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Loop unrolling: Compute remaining outputs */ 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k = srcBLen % 0x4U; 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #else 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Initialize blkCnt with number of samples */ 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k = srcBLen; 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (k > 0U) 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Perform the multiply-accumulate */ 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * *py--; 16391 .loc 35 564 0 16392 00ac 52F8046B ldr r6, [r2], #4 16393 .LVL2661: 16394 00b0 57F80449 ldr r4, [r7], #-4 16395 .LVL2662: 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16396 .loc 35 561 0 16397 00b4 013B subs r3, r3, #1 16398 .LVL2663: 16399 .loc 35 564 0 16400 00b6 C4FB0601 smlal r0, r1, r4, r6 16401 .LVL2664: 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16402 .loc 35 561 0 ARM GAS /tmp/ccJrAs6S.s page 640 16403 00ba F7D1 bne .L1128 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement the loop counter */ 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k--; 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pOut++ = (q31_t) (sum >> 31); 16404 .loc 35 571 0 16405 00bc C30F lsrs r3, r0, #31 16406 00be 43EA4103 orr r3, r3, r1, lsl #1 16407 00c2 4EF8043B str r3, [lr], #4 16408 .LVL2665: 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16409 .loc 35 529 0 16410 00c6 E645 cmp lr, ip 16411 00c8 0BF1040B add fp, fp, #4 16412 .LVL2666: 16413 00cc E9D1 bne .L1129 16414 00ce 5446 mov r4, r10 16415 .LVL2667: 16416 .L1119: 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Increment MAC count */ 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** count++; 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** px = pIn1 + count; 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** py = pSrc2; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement loop counter */ 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blkCnt--; 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** else 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* If the srcBLen is not a multiple of 4, 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * the blockSize2 loop cannot be unrolled by 4 */ 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blkCnt = blockSize2; 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (blkCnt > 0U) 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Accumulator is made zero for every iteration */ 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum = 0; 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* srcBLen number of MACS should be performed */ 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k = srcBLen; 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (k > 0U) 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Perform the multiply-accumulate */ 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * *py--; 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement the loop counter */ 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k--; 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 641 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pOut++ = (q31_t) (sum >> 31); 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Increment MAC count */ 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** count++; 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** px = pIn1 + count; 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** py = pSrc2; 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement loop counter */ 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blkCnt--; 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* -------------------------- 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Initializations of stage3 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * -------------------------*/ 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcAL 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcAL 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * .... 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * sum += x[srcALen-1] * y[srcBLen-1] 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** */ 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** The blockSize3 variable holds the number of MAC operations performed */ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Working pointer of inputA */ 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); 16417 .loc 35 638 0 16418 00d0 009B ldr r3, [sp] 16419 00d2 4344 add r3, r3, r8 16420 00d4 9846 mov r8, r3 16421 .LVL2668: 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** px = pSrc1; 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Working pointer of inputB */ 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pSrc2 = pIn2 + (srcBLen - 1U); 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** py = pSrc2; 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* ------------------- 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * Stage3 process 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** * ------------------*/ 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (blockSize3 > 0U) 16422 .loc 35 649 0 16423 00d6 BCB1 cbz r4, .L1113 16424 00d8 A646 mov lr, r4 16425 .LVL2669: 16426 .L1131: 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16427 .loc 35 366 0 16428 00da 7346 mov r3, lr 16429 00dc 2E46 mov r6, r5 ARM GAS /tmp/ccJrAs6S.s page 642 16430 00de 4246 mov r2, r8 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Accumulator is made zero for every iteration */ 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum = 0; 16431 .loc 35 652 0 16432 00e0 0020 movs r0, #0 16433 00e2 0021 movs r1, #0 16434 .LVL2670: 16435 .L1130: 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k = blockSize3 >> 2U; 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (k > 0U) 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Perform the multiply-accumulate */ 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * *py--; 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * *py--; 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * *py--; 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * *py--; 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement loop counter */ 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k--; 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Loop unrolling: Compute remaining outputs */ 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k = blockSize3 % 0x4U; 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #else 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Initialize blkCnt with number of samples */ 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k = blockSize3; 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** while (k > 0U) 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Perform the multiply-accumulate */ 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* sum += x[srcALen-1] * y[srcBLen-1] */ 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += (q63_t) *px++ * *py--; 16436 .loc 35 692 0 16437 00e4 52F8044B ldr r4, [r2], #4 16438 .LVL2671: 16439 00e8 56F80479 ldr r7, [r6], #-4 16440 .LVL2672: 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16441 .loc 35 688 0 16442 00ec 013B subs r3, r3, #1 ARM GAS /tmp/ccJrAs6S.s page 643 16443 .LVL2673: 16444 .loc 35 692 0 16445 00ee C7FB0401 smlal r0, r1, r7, r4 16446 .LVL2674: 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16447 .loc 35 688 0 16448 00f2 F7D1 bne .L1130 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement loop counter */ 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** k--; 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** *pOut++ = (q31_t) (sum >> 31); 16449 .loc 35 699 0 16450 00f4 C30F lsrs r3, r0, #31 16451 00f6 43EA4103 orr r3, r3, r1, lsl #1 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16452 .loc 35 649 0 16453 00fa BEF1010E subs lr, lr, #1 16454 .LVL2675: 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** px = ++pSrc1; 16455 .loc 35 702 0 16456 00fe 08F10408 add r8, r8, #4 16457 .LVL2676: 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16458 .loc 35 699 0 16459 0102 4CF8043B str r3, [ip], #4 16460 .LVL2677: 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16461 .loc 35 649 0 16462 0106 E8D1 bne .L1131 16463 .LVL2678: 16464 .L1113: 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** py = pSrc2; 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Decrement loop counter */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** blockSize3--; 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #else 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* alternate version for CM0_FAMILY */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *pIn1 = pSrcA; /* InputA pointer */ 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** const q31_t *pIn2 = pSrcB; /* InputB pointer */ 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** q63_t sum; /* Accumulators */ 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** uint32_t i, j; /* Loop counters */ 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Loop to calculate convolution for output length number of times */ 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** for (i = 0U; i < (srcALen + srcBLen - 1U); i++) 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Initialize sum with zero to carry out MAC operations */ 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum = 0; 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Loop to perform MAC operations according to convolution equation */ ARM GAS /tmp/ccJrAs6S.s page 644 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** for (j = 0U; j <= i; j++) 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Check the array limitations */ 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** if (((i - j) < srcBLen) && (j < srcALen)) 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* z[i] += x[i-j] * y[j] */ 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** sum += ((q63_t) pIn1[j] * pIn2[i - j]); 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** /* Store the output in the destination buffer */ 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** pDst[i] = (q31_t) (sum >> 31U); 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** } 16465 .loc 35 740 0 16466 0108 05B0 add sp, sp, #20 16467 .LCFI96: 16468 .cfi_remember_state 16469 .cfi_def_cfa_offset 36 16470 .LVL2679: 16471 @ sp needed 16472 010a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 16473 .LVL2680: 16474 .L1115: 16475 .LCFI97: 16476 .cfi_restore_state 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** py = pSrc2; 16477 .loc 35 393 0 16478 010e 01F18045 add r5, r1, #1073741824 16479 0112 013D subs r5, r5, #1 16480 0114 0BEB8505 add r5, fp, r5, lsl #2 16481 .LVL2681: 16482 .L1133: 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16483 .loc 35 590 0 16484 0118 019B ldr r3, [sp, #4] 16485 011a 5BB3 cbz r3, .L1135 16486 011c 0029 cmp r1, #0 16487 011e 3ED0 beq .L1120 16488 0120 0229 cmp r1, #2 16489 0122 45D0 beq .L1121 16490 0124 4CB3 cbz r4, .L1122 16491 0126 4FEA8308 lsl r8, r3, #2 16492 012a DDF800E0 ldr lr, [sp] 16493 012e 06EB080C add ip, r6, r8 16494 0132 2746 mov r7, r4 16495 .LVL2682: 16496 .L1123: 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16497 .loc 35 601 0 16498 0134 DEF80010 ldr r1, [lr] 16499 .LVL2683: 16500 0138 55F8043C ldr r3, [r5, #-4] 16501 013c 5EF8042F ldr r2, [lr, #4]! ARM GAS /tmp/ccJrAs6S.s page 645 16502 .LVL2684: 16503 0140 2C68 ldr r4, [r5] 16504 0142 DEF80400 ldr r0, [lr, #4] 16505 0146 82FB0323 smull r2, r3, r2, r3 16506 014a C4FB0123 smlal r2, r3, r4, r1 16507 .LVL2685: 16508 014e 55F8081C ldr r1, [r5, #-8] 16509 0152 1C46 mov r4, r3 16510 0154 1346 mov r3, r2 16511 0156 C1FB0034 smlal r3, r4, r1, r0 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16512 .loc 35 608 0 16513 015a DA0F lsrs r2, r3, #31 16514 .LVL2686: 16515 015c 42EA4402 orr r2, r2, r4, lsl #1 16516 0160 46F8042B str r2, [r6], #4 16517 .LVL2687: 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16518 .loc 35 590 0 16519 0164 6645 cmp r6, ip 16520 0166 E5D1 bne .L1123 16521 0168 3C46 mov r4, r7 16522 .LVL2688: 16523 .L1127: 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** px = pSrc1; 16524 .loc 35 638 0 16525 016a 009B ldr r3, [sp] 16526 016c 4344 add r3, r3, r8 16527 016e 9846 mov r8, r3 16528 .LVL2689: 16529 0170 A646 mov lr, r4 16530 0172 B2E7 b .L1131 16531 .LVL2690: 16532 .L1135: 16533 0174 9846 mov r8, r3 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16534 .loc 35 366 0 16535 0176 B446 mov ip, r6 16536 0178 AAE7 b .L1119 16537 .L1122: 16538 017a 009B ldr r3, [sp] 16539 .LVL2691: 16540 017c 191F subs r1, r3, #4 16541 .LVL2692: 16542 017e 019B ldr r3, [sp, #4] 16543 0180 06EB8308 add r8, r6, r3, lsl #2 16544 .LVL2693: 16545 .L1124: 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16546 .loc 35 601 0 16547 0184 2A68 ldr r2, [r5] 16548 0186 51F8043F ldr r3, [r1, #4]! 16549 .LVL2694: 16550 018a 82FB0334 smull r3, r4, r2, r3 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16551 .loc 35 608 0 16552 018e DA0F lsrs r2, r3, #31 ARM GAS /tmp/ccJrAs6S.s page 646 16553 0190 42EA4402 orr r2, r2, r4, lsl #1 16554 0194 46F8042B str r2, [r6], #4 16555 .LVL2695: 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16556 .loc 35 590 0 16557 0198 4645 cmp r6, r8 16558 019a F3D1 bne .L1124 16559 019c B4E7 b .L1113 16560 .LVL2696: 16561 .L1120: 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16562 .loc 35 608 0 16563 019e 4FEA8308 lsl r8, r3, #2 16564 01a2 4246 mov r2, r8 16565 01a4 3046 mov r0, r6 16566 01a6 FFF7FEFF bl memset 16567 .LVL2697: 16568 01aa 06EB080C add ip, r6, r8 16569 01ae DCE7 b .L1127 16570 .LVL2698: 16571 .L1121: 16572 01b0 4FEA8308 lsl r8, r3, #2 16573 01b4 06EB0807 add r7, r6, r8 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16574 .loc 35 590 0 16575 01b8 B446 mov ip, r6 16576 01ba 009E ldr r6, [sp] 16577 .LVL2699: 16578 .L1126: 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16579 .loc 35 601 0 16580 01bc 3068 ldr r0, [r6] 16581 .LVL2700: 16582 01be 56F8043F ldr r3, [r6, #4]! 16583 .LVL2701: 16584 01c2 55E90121 ldrd r2, r1, [r5, #-4] 16585 01c6 80FB0101 smull r0, r1, r0, r1 16586 .LVL2702: 16587 01ca C3FB0201 smlal r0, r1, r3, r2 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** 16588 .loc 35 608 0 16589 01ce C30F lsrs r3, r0, #31 16590 01d0 43EA4103 orr r3, r3, r1, lsl #1 16591 01d4 4CF8043B str r3, [ip], #4 16592 .LVL2703: 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c **** { 16593 .loc 35 590 0 16594 01d8 6745 cmp r7, ip 16595 01da EFD1 bne .L1126 16596 01dc C5E7 b .L1127 16597 .cfi_endproc 16598 .LFE180: 16600 01de 00BF .section .text.arm_conv_q7,"ax",%progbits 16601 .align 1 16602 .p2align 2,,3 16603 .global arm_conv_q7 16604 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 647 16605 .thumb 16606 .thumb_func 16607 .fpu fpv4-sp-d16 16609 arm_conv_q7: 16610 .LFB181: 16611 .file 36 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Title: arm_conv_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Description: Convolution of Q7 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** @addtogroup Conv 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** @brief Convolution of Q7 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** @param[out] pDst points to the location where the output result is written. Length srcA 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** The function is implemented using a 32-bit internal accumulator. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** Both the inputs are represented in 1.7 format and multiplications yield a 2.14 r ARM GAS /tmp/ccJrAs6S.s page 648 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 f 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** This approach provides 17 guard bits and there is no risk of overflow as long as 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits a 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** @remark 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** Refer to \ref arm_conv_opt_q7() for a faster implementation of this function. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #if defined(ARM_MATH_MVEI) 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #include "arm_helium_utils.h" 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #include "arm_vec_filtering.h" 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** void arm_conv_q7( 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t * pSrcA, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t srcALen, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t * pSrcB, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t srcBLen, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** q7_t * pDst) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *pIn1 = pSrcA; /* inputA pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *pIn2 = pSrcB; /* inputB pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Loop to perform MAC operations according to correlation equation 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *pX; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *pY; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *pA; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *pB; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t i = 0U, j = 0; /* loop counters */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t block1, block2, block3; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint8_t vddupStartIdx = 15; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint8x16_t decrIdxVec = vddupq_u8(vddupStartIdx, 1); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** if (srcALen < srcBLen) 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Initialization to inputB pointer 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pIn1 = pSrcB; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Initialization to the end of inputA pointer 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pIn2 = pSrcA; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Swapping the lengths 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** j = srcALen; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** srcALen = srcBLen; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** srcBLen = j; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** block1 = srcBLen - 1; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** block2 = srcALen - srcBLen + 1; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** block3 = srcBLen - 1; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pA = pIn1; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pB = pIn2 - 15; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 649 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** for (i = 0; i <= block1 - 2; i += 2) 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t count = i + 1; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc0 = 0; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc1 = 0; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pX = pA; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pY = pB; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q7(acc0, acc1, pX, pY, count); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc0; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc1; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pB += 2; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** for (; i < block1; i++) 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t count = i + 1; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc = 0; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pX = pA; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pY = pB; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** MVE_INTR_CONV_SINGLE_Q7(acc, pX, pY, count); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pB++; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** for (i = 0; i <= block2 - 4; i += 4) 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t count = srcBLen; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc0 = 0; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc1 = 0; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc2 = 0; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc3 = 0; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pX = pA; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pY = pB; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * compute 4 accumulators per loop 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * size is fixed for all accumulators 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * X pointer is incrementing for successive accumulators 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q7(acc0, acc1, acc2, acc3, pX, pY, count); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc0; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc1; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc2; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc3; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pA += 4; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** for (; i <= block2 - 2; i += 2) 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t count = srcBLen; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc0 = 0; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc1 = 0; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pX = pA; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pY = pB; ARM GAS /tmp/ccJrAs6S.s page 650 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * compute 2 accumulators per loop 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * size is fixed for all accumulators 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * X pointer is incrementing for successive accumulators 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q7(acc0, acc1, pX, pY, count); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc0; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc1; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pA += 2; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** if (block2 & 1) 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t count = srcBLen; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc = 0; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pX = pA; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pY = pB; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** MVE_INTR_CONV_SINGLE_Q7(acc, pX, pY, count); 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pA++; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** for (i = block3; i >= 1; i -= 2) 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t count = i; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc0 = 0; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc1 = 0; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pX = pA; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pY = pB; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q7(acc0, acc1, pX, pY, count); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc0; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc1; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pA += 2; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** for (; i >= 1; i--) 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t count = i; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** int32_t acc = 0; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pX = pA; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pY = pB; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** MVE_INTR_CONV_SINGLE_Q7(acc, pX, pY, count); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pDst++ = (q7_t) acc; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pA++; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #else 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** void arm_conv_q7( 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t * pSrcA, 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t srcALen, 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t * pSrcB, 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t srcBLen, ARM GAS /tmp/ccJrAs6S.s page 651 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** q7_t * pDst) 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16612 .loc 36 224 0 16613 .cfi_startproc 16614 @ args = 4, pretend = 0, frame = 8 16615 @ frame_needed = 0, uses_anonymous_args = 0 16616 .LVL2704: 16617 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 16618 .LCFI98: 16619 .cfi_def_cfa_offset 36 16620 .cfi_offset 4, -36 16621 .cfi_offset 5, -32 16622 .cfi_offset 6, -28 16623 .cfi_offset 7, -24 16624 .cfi_offset 8, -20 16625 .cfi_offset 9, -16 16626 .cfi_offset 10, -12 16627 .cfi_offset 11, -8 16628 .cfi_offset 14, -4 16629 0004 83B0 sub sp, sp, #12 16630 .LCFI99: 16631 .cfi_def_cfa_offset 48 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #if (1) 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** //#if !defined(ARM_MATH_CM0_FAMILY) 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *pIn1; /* InputA pointer */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *pIn2; /* InputB pointer */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** q7_t *pOut = pDst; /* Output pointer */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *px; /* Intermediate inputA pointer */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *py; /* Intermediate inputB pointer */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *pSrc1, *pSrc2; /* Intermediate pointers */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** q31_t sum; /* Accumulators */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t j, k, count, blkCnt; /* Loop counters */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** q31_t acc0, acc1, acc2, acc3; /* Accumulators */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** q31_t input1, input2; /* Temporary input variables */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** q15_t in1, in2; /* Temporary input variables */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** q7_t x0, x1, x2, x3, c0, c1; /* Temporary variables to hold state and coe 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #endif 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* srcB is always made to slide across srcA. */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** if (srcALen >= srcBLen) 16632 .loc 36 249 0 16633 0006 9942 cmp r1, r3 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16634 .loc 36 224 0 16635 0008 8846 mov r8, r1 16636 .LVL2705: 16637 000a DDF83090 ldr r9, [sp, #48] 16638 .loc 36 249 0 16639 000e 05D3 bcc .L1150 16640 0010 1446 mov r4, r2 ARM GAS /tmp/ccJrAs6S.s page 652 16641 0012 1946 mov r1, r3 16642 .LVL2706: 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Initialization of inputA pointer */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pIn1 = pSrcA; 16643 .loc 36 252 0 16644 0014 0246 mov r2, r0 16645 .LVL2707: 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16646 .loc 36 249 0 16647 0016 4346 mov r3, r8 16648 .LVL2708: 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Initialization of inputB pointer */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pIn2 = pSrcB; 16649 .loc 36 255 0 16650 0018 2046 mov r0, r4 16651 .LVL2709: 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16652 .loc 36 249 0 16653 001a 8846 mov r8, r1 16654 .LVL2710: 16655 .L1150: 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** else 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Initialization of inputA pointer */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pIn1 = pSrcB; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Initialization of inputB pointer */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pIn2 = pSrcA; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** j = srcBLen; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** srcBLen = srcALen; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** srcALen = j; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* The function is internally 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * divided into three stages according to the number of multiplications that has to be 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * taken place between inputA samples and inputB samples. In the first stage of the 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * algorithm, the multiplications increase by one for every iteration. 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * In the third stage of the algorithm, the multiplications decrease by one 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * for every iteration. */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* The algorithm is implemented in three stages. 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** The loop counters of each stage is initiated here. */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blockSize1 = srcBLen - 1U; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blockSize2 = srcALen - (srcBLen - 1U); 16656 .loc 36 283 0 16657 001c 0133 adds r3, r3, #1 16658 .LVL2711: 16659 001e A3EB0803 sub r3, r3, r8 16660 .LVL2712: 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blockSize3 = blockSize1; ARM GAS /tmp/ccJrAs6S.s page 653 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* -------------------------- 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Initializations of stage1 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * -------------------------*/ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* sum = x[0] * y[0] 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * sum = x[0] * y[1] + x[1] * y[0] 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * .... 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** The count variable holds the number of MAC operations performed */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** count = 1U; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Working pointer of inputA */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** px = pIn1; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Working pointer of inputB */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** py = pIn2; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* ------------------------ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Stage1 process 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * ----------------------*/ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* The first stage starts here */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (blockSize1 > 0U) 16661 .loc 36 312 0 16662 0022 B8F1010E subs lr, r8, #1 16663 .LVL2713: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blockSize3 = blockSize1; 16664 .loc 36 283 0 16665 0026 0193 str r3, [sp, #4] 16666 .LVL2714: 16667 .loc 36 312 0 16668 0028 60D0 beq .L1173 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16669 .loc 36 298 0 16670 002a 0121 movs r1, #1 16671 .LVL2715: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16672 .loc 36 304 0 16673 002c 8246 mov r10, r0 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *px; /* Intermediate inputA pointer */ 16674 .loc 36 231 0 16675 002e CB46 mov fp, r9 16676 .LVL2716: 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Accumulator is made zero for every iteration */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum = 0; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k = count >> 2U; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 654 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (k > 0U) 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[0] , x[1] */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) *px++; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) *px++; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* y[srcBLen - 1] , y[srcBLen - 2] */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) *py--; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) *py--; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[0] * y[srcBLen - 1] */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[1] * y[srcBLen - 2] */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum = __SMLAD(input1, input2, sum); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[2] , x[3] */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) *px++; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) *px++; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* y[srcBLen - 3] , y[srcBLen - 4] */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) *py--; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) *py--; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[2] * y[srcBLen - 3] */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[3] * y[srcBLen - 4] */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum = __SMLAD(input1, input2, sum); 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement loop counter */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k--; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Loop unrolling: Compute remaining outputs */ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k = count % 0x4U; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #else 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Initialize k with number of samples */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k = count; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (k > 0U) 16677 .loc 36 366 0 16678 0030 C9B1 cbz r1, .L1191 16679 .L1155: 16680 0032 02EB010C add ip, r2, r1 16681 0036 5546 mov r5, r10 16682 0038 1346 mov r3, r2 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16683 .loc 36 315 0 16684 003a 0024 movs r4, #0 16685 .LVL2717: 16686 .L1153: 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { ARM GAS /tmp/ccJrAs6S.s page 655 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Perform the multiply-accumulate */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum += ((q15_t) *px++ * *py--); 16687 .loc 36 369 0 16688 003c 13F9017B ldrsb r7, [r3], #1 16689 .LVL2718: 16690 0040 15F90169 ldrsb r6, [r5], #-1 16691 .LVL2719: 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16692 .loc 36 366 0 16693 0044 6345 cmp r3, ip 16694 .loc 36 369 0 16695 0046 17FB0644 smlabb r4, r7, r6, r4 16696 .LVL2720: 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16697 .loc 36 366 0 16698 004a F7D1 bne .L1153 16699 004c E411 asrs r4, r4, #7 16700 .LVL2721: 16701 .L1156: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement loop counter */ 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k--; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8)); 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** py = pIn2 + count; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** px = pIn1; 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Increment MAC count */ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** count++; 16702 .loc 36 383 0 16703 004e 4B1C adds r3, r1, #1 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16704 .loc 36 312 0 16705 0050 9845 cmp r8, r3 16706 .LBB1937: 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16707 .loc 36 376 0 16708 .syntax unified 16709 @ 376 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1 16710 0052 04F30704 ssat r4, #8, r4 16711 @ 0 "" 2 16712 .LVL2722: 16713 .thumb 16714 .syntax unified 16715 0056 0AF1010A add r10, r10, #1 16716 .LVL2723: 16717 .LBE1937: 16718 005a 0BF8014B strb r4, [fp], #1 16719 .LVL2724: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16720 .loc 36 312 0 16721 005e 04D0 beq .L1154 16722 0060 1946 mov r1, r3 ARM GAS /tmp/ccJrAs6S.s page 656 16723 .LVL2725: 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16724 .loc 36 366 0 16725 0062 0029 cmp r1, #0 16726 0064 E5D1 bne .L1155 16727 .LVL2726: 16728 .L1191: 16729 0066 0C46 mov r4, r1 16730 0068 F1E7 b .L1156 16731 .LVL2727: 16732 .L1154: 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement loop counter */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blockSize1--; 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* -------------------------- 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Initializations of stage2 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * ------------------------*/ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * .... 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Working pointer of inputA */ 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** px = pIn1; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Working pointer of inputB */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pSrc2 = pIn2 + (srcBLen - 1U); 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** py = pSrc2; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* count is index by which the pointer pIn1 to be incremented */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** count = 0U; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* ------------------- 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Stage2 process 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * ------------------*/ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * So, to loop unroll over blockSize2, 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * srcBLen should be greater than or equal to 4 */ 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** if (srcBLen >= 4U) 16733 .loc 36 416 0 16734 006a B8F1030F cmp r8, #3 16735 006e 8944 add r9, r9, r1 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** py = pSrc2; 16736 .loc 36 403 0 16737 0070 7044 add r0, r0, lr 16738 .LVL2728: 16739 .loc 36 416 0 16740 0072 3BD9 bls .L1173 16741 .LVL2729: 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 657 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blkCnt = blockSize2 >> 2U; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (blkCnt > 0U) 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Set all accumulators to zero */ 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc0 = 0; 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc1 = 0; 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc2 = 0; 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc3 = 0; 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* read x[0], x[1], x[2] samples */ 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** x0 = *px++; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** x1 = *px++; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** x2 = *px++; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k = srcBLen >> 2U; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** do 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Read y[srcBLen - 1] sample */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** c0 = *py--; 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Read y[srcBLen - 2] sample */ 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** c1 = *py--; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Read x[3] sample */ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** x3 = *px++; 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[0] and x[1] are packed */ 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) x0; 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) x1; 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* y[srcBLen - 1] and y[srcBLen - 2] are packed */ 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) c0; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) c1; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc0 = __SMLAD(input1, input2, acc0); 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[1] and x[2] are packed */ 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) x1; 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) x2; 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc1 = __SMLAD(input1, input2, acc1); 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[2] and x[3] are packed */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) x2; ARM GAS /tmp/ccJrAs6S.s page 658 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) x3; 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc2 = __SMLAD(input1, input2, acc2); 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Read x[4] sample */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** x0 = *px++; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[3] and x[4] are packed */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) x3; 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) x0; 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc3 = __SMLAD(input1, input2, acc3); 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Read y[srcBLen - 3] sample */ 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** c0 = *py--; 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Read y[srcBLen - 4] sample */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** c1 = *py--; 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Read x[5] sample */ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** x1 = *px++; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[2] and x[3] are packed */ 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) x2; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) x3; 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* y[srcBLen - 3] and y[srcBLen - 4] are packed */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) c0; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) c1; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc0 = __SMLAD(input1, input2, acc0); 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[3] and x[4] are packed */ 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) x3; 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) x0; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc1 = __SMLAD(input1, input2, acc1); 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[4] and x[5] are packed */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) x0; 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) x1; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 659 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc2 = __SMLAD(input1, input2, acc2); 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Read x[6] sample */ 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** x2 = *px++; 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* x[5] and x[6] are packed */ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) x1; 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) x2; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc3 = __SMLAD(input1, input2, acc3); 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } while (--k); 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** ** No loop unrolling is used. */ 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k = srcBLen % 0x4U; 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (k > 0U) 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Read y[srcBLen - 5] sample */ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** c0 = *py--; 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Read x[7] sample */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** x3 = *px++; 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Perform the multiply-accumulates */ 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* acc0 += x[4] * y[srcBLen - 5] */ 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc0 += ((q15_t) x0 * c0); 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* acc1 += x[5] * y[srcBLen - 5] */ 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc1 += ((q15_t) x1 * c0); 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* acc2 += x[6] * y[srcBLen - 5] */ 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc2 += ((q15_t) x2 * c0); 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* acc3 += x[7] * y[srcBLen - 5] */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** acc3 += ((q15_t) x3 * c0); 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Reuse the present samples for the next MAC */ 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** x0 = x1; 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** x1 = x2; 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** x2 = x3; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement loop counter */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k--; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8)); 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pOut++ = (q7_t) (__SSAT(acc1 >> 7U, 8)); 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pOut++ = (q7_t) (__SSAT(acc2 >> 7U, 8)); 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pOut++ = (q7_t) (__SSAT(acc3 >> 7U, 8)); 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Increment the pointer pIn1 index, count by 4 */ 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** count += 4U; 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ ARM GAS /tmp/ccJrAs6S.s page 660 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** px = pIn1 + count; 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** py = pSrc2; 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement loop counter */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blkCnt--; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Loop unrolling: Compute remaining outputs */ 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blkCnt = blockSize2 % 0x4U; 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #else 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Initialize blkCnt with number of samples */ 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blkCnt = blockSize2; 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (blkCnt > 0U) 16742 .loc 36 608 0 16743 0074 019B ldr r3, [sp, #4] 16744 0076 002B cmp r3, #0 16745 0078 62D0 beq .L1176 16746 007a 09EB0307 add r7, r9, r3 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16747 .loc 36 400 0 16748 007e 1346 mov r3, r2 16749 .LVL2730: 16750 .L1169: 16751 0080 9C46 mov ip, r3 16752 0082 08EB030A add r10, r8, r3 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** py = pSrc2; 16753 .loc 36 403 0 16754 0086 0446 mov r4, r0 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Accumulator is made zero for every iteration */ 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum = 0; 16755 .loc 36 611 0 16756 0088 0021 movs r1, #0 16757 .LVL2731: 16758 .L1168: 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k = srcBLen >> 2U; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (k > 0U) 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Reading two inputs of SrcA buffer and packing */ 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) *px++; 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) *px++; 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Reading two inputs of SrcB buffer and packing */ 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) *py--; 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) *py--; ARM GAS /tmp/ccJrAs6S.s page 661 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Perform the multiply-accumulate */ 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum = __SMLAD(input1, input2, sum); 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Reading two inputs of SrcA buffer and packing */ 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) *px++; 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) *px++; 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Reading two inputs of SrcB buffer and packing */ 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) *py--; 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) *py--; 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Perform the multiply-accumulate */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum = __SMLAD(input1, input2, sum); 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement loop counter */ 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k--; 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Loop unrolling: Compute remaining outputs */ 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k = srcBLen % 0x4U; 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #else 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Initialize blkCnt with number of samples */ 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k = srcBLen; 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (k > 0U) 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Perform the multiply-accumulate */ 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum += ((q15_t) *px++ * *py--); 16759 .loc 36 664 0 16760 008a 13F9016B ldrsb r6, [r3], #1 16761 .LVL2732: 16762 008e 14F90159 ldrsb r5, [r4], #-1 16763 .LVL2733: 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16764 .loc 36 661 0 16765 0092 5345 cmp r3, r10 16766 .loc 36 664 0 16767 0094 16FB0511 smlabb r1, r6, r5, r1 16768 .LVL2734: 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16769 .loc 36 661 0 16770 0098 F7D1 bne .L1168 16771 .LVL2735: 16772 .LBB1938: 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement the loop counter */ 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k--; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 662 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8)); 16773 .loc 36 671 0 16774 009a C911 asrs r1, r1, #7 16775 .LVL2736: 16776 .syntax unified 16777 @ 671 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1 16778 009c 01F30701 ssat r1, #8, r1 16779 @ 0 "" 2 16780 .LVL2737: 16781 .thumb 16782 .syntax unified 16783 .LBE1938: 16784 00a0 09F8011B strb r1, [r9], #1 16785 .LVL2738: 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16786 .loc 36 608 0 16787 00a4 B945 cmp r9, r7 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Increment the pointer pIn1 index, count by 1 */ 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** count++; 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** px = pIn1 + count; 16788 .loc 36 677 0 16789 00a6 0CF10103 add r3, ip, #1 16790 .LVL2739: 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16791 .loc 36 608 0 16792 00aa E9D1 bne .L1169 16793 00ac 019B ldr r3, [sp, #4] 16794 .LVL2740: 16795 .L1158: 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** py = pSrc2; 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement the loop counter */ 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blkCnt--; 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** else 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* If the srcBLen is not a multiple of 4, 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * the blockSize2 loop cannot be unrolled by 4 */ 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blkCnt = blockSize2; 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (blkCnt > 0U) 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Accumulator is made zero for every iteration */ 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum = 0; 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* srcBLen number of MACS should be performed */ 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k = srcBLen; 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (k > 0U) 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Perform the multiply-accumulate */ 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum += ((q15_t) *px++ * *py--); ARM GAS /tmp/ccJrAs6S.s page 663 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement the loop counter */ 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k--; 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8)); 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Increment the MAC count */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** count++; 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** px = pIn1 + count; 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** py = pSrc2; 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement loop counter */ 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blkCnt--; 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* -------------------------- 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Initializations of stage3 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * -------------------------*/ 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcAL 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcAL 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * .... 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * sum += x[srcALen-1] * y[srcBLen-1] 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** */ 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** The blockSize3 variable holds the number of MAC operations performed */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Working pointer of inputA */ 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pSrc1 = pIn1 + (srcALen - (srcBLen - 1U)); 16796 .loc 36 738 0 16797 00ae 1A44 add r2, r2, r3 16798 .LVL2741: 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** px = pSrc1; 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Working pointer of inputB */ 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pSrc2 = pIn2 + (srcBLen - 1U); 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** py = pSrc2; 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* ------------------- 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * Stage3 process 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** * ------------------*/ 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (blockSize3 > 0U) 16799 .loc 36 749 0 16800 00b0 BEF1000F cmp lr, #0 16801 00b4 17D0 beq .L1149 16802 .LVL2742: 16803 .L1171: 16804 00b6 02EB0E0C add ip, r2, lr ARM GAS /tmp/ccJrAs6S.s page 664 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16805 .loc 36 376 0 16806 00ba 0446 mov r4, r0 16807 00bc 1346 mov r3, r2 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Accumulator is made zero for every iteration */ 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum = 0; 16808 .loc 36 752 0 16809 00be 0021 movs r1, #0 16810 .LVL2743: 16811 .L1170: 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k = blockSize3 >> 2U; 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (k > 0U) 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer a 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) *px++; 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) *px++; 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */ 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) *py--; 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) *py--; 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum = __SMLAD(input1, input2, sum); 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer a 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) *px++; 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) *px++; 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */ 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in1 = (q15_t) *py--; 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** in2 = (q15_t) *py--; 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum = __SMLAD(input1, input2, sum); 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement loop counter */ 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k--; 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Loop unrolling: Compute remaining outputs */ 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k = blockSize3 % 0x4U; 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #else 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Initialize blkCnt with number of samples */ ARM GAS /tmp/ccJrAs6S.s page 665 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k = blockSize3; 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** while (k > 0U) 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Perform the multiply-accumulate */ 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* sum += x[srcALen-1] * y[srcBLen-1] */ 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum += ((q15_t) *px++ * *py--); 16812 .loc 36 807 0 16813 00c0 13F9016B ldrsb r6, [r3], #1 16814 .LVL2744: 16815 00c4 14F90159 ldrsb r5, [r4], #-1 16816 .LVL2745: 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16817 .loc 36 803 0 16818 00c8 9C45 cmp ip, r3 16819 .loc 36 807 0 16820 00ca 16FB0511 smlabb r1, r6, r5, r1 16821 .LVL2746: 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16822 .loc 36 803 0 16823 00ce F7D1 bne .L1170 16824 .LVL2747: 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16825 .loc 36 749 0 16826 00d0 BEF1010E subs lr, lr, #1 16827 .LVL2748: 16828 .LBB1939: 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement loop counter */ 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** k--; 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8)); 16829 .loc 36 814 0 16830 00d4 4FEAE111 asr r1, r1, #7 16831 .LVL2749: 16832 .LBE1939: 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** px = ++pSrc1; 16833 .loc 36 817 0 16834 00d8 02F10102 add r2, r2, #1 16835 .LVL2750: 16836 .LBB1940: 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16837 .loc 36 814 0 16838 .syntax unified 16839 @ 814 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1 16840 00dc 01F30701 ssat r1, #8, r1 16841 @ 0 "" 2 16842 .LVL2751: 16843 .thumb 16844 .syntax unified 16845 .LBE1940: ARM GAS /tmp/ccJrAs6S.s page 666 16846 00e0 07F8011B strb r1, [r7], #1 16847 .LVL2752: 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16848 .loc 36 749 0 16849 00e4 E7D1 bne .L1171 16850 .LVL2753: 16851 .L1149: 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** py = pSrc2; 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Decrement loop counter */ 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** blockSize3--; 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #else 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* alternate version for CM0_FAMILY */ 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *pIn1 = pSrcA; /* InputA pointer */ 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** const q7_t *pIn2 = pSrcB; /* InputB pointer */ 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** q31_t sum; /* Accumulator */ 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** uint32_t i, j; /* Loop counters */ 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Loop to calculate convolution for output length number of times */ 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** for (i = 0U; i < (srcALen + srcBLen - 1U); i++) 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Initialize sum with zero to carry out MAC operations */ 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum = 0; 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Loop to perform MAC operations according to convolution equation */ 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** for (j = 0U; j <= i; j++) 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Check the array limitations */ 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** if (((i - j) < srcBLen) && (j < srcALen)) 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* z[i] += x[i-j] * y[j] */ 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** sum += ((q15_t) pIn1[j] * pIn2[i - j]); 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** /* Store the output in the destination buffer */ 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U); 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** } 16852 .loc 36 855 0 16853 00e6 03B0 add sp, sp, #12 16854 .LCFI100: 16855 .cfi_remember_state 16856 .cfi_def_cfa_offset 36 16857 @ sp needed 16858 00e8 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 16859 .LVL2754: 16860 .L1173: 16861 .LCFI101: 16862 .cfi_restore_state 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { ARM GAS /tmp/ccJrAs6S.s page 667 16863 .loc 36 690 0 16864 00ec 019B ldr r3, [sp, #4] 16865 00ee 3BB3 cbz r3, .L1176 16866 00f0 B8F1000F cmp r8, #0 16867 00f4 37D0 beq .L1159 16868 00f6 B8F1020F cmp r8, #2 16869 00fa 3FD0 beq .L1160 16870 00fc BEF1000F cmp lr, #0 16871 0100 20D0 beq .L1161 16872 0102 9446 mov ip, r2 16873 0104 09EB0307 add r7, r9, r3 16874 .LVL2755: 16875 .L1162: 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16876 .loc 36 701 0 16877 0108 9CF90010 ldrsb r1, [ip] 16878 .LVL2756: 16879 010c 10F9013C ldrsb r3, [r0, #-1] 16880 0110 1CF9014F ldrsb r4, [ip, #1]! 16881 .LVL2757: 16882 0114 90F90060 ldrsb r6, [r0] 16883 0118 10F9025C ldrsb r5, [r0, #-2] 16884 011c 14FB03F4 smulbb r4, r4, r3 16885 0120 9CF90130 ldrsb r3, [ip, #1] 16886 0124 11FB0641 smlabb r1, r1, r6, r4 16887 .LVL2758: 16888 0128 13FB0513 smlabb r3, r3, r5, r1 16889 .LBB1941: 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16890 .loc 36 708 0 16891 012c DB11 asrs r3, r3, #7 16892 .syntax unified 16893 @ 708 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1 16894 012e 03F30703 ssat r3, #8, r3 16895 @ 0 "" 2 16896 .LVL2759: 16897 .thumb 16898 .syntax unified 16899 .LBE1941: 16900 0132 09F8013B strb r3, [r9], #1 16901 .LVL2760: 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16902 .loc 36 690 0 16903 0136 B945 cmp r9, r7 16904 0138 E6D1 bne .L1162 16905 .LVL2761: 16906 .L1166: 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** px = pSrc1; 16907 .loc 36 738 0 16908 013a 019B ldr r3, [sp, #4] 16909 .LVL2762: 16910 013c 1A44 add r2, r2, r3 16911 .LVL2763: 16912 013e BAE7 b .L1171 16913 .LVL2764: 16914 .L1176: 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 668 16915 .loc 36 376 0 16916 0140 4F46 mov r7, r9 16917 0142 B4E7 b .L1158 16918 .L1161: 16919 0144 4B44 add r3, r3, r9 16920 0146 013A subs r2, r2, #1 16921 0148 1C46 mov r4, r3 16922 .LVL2765: 16923 .L1163: 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16924 .loc 36 701 0 16925 014a 90F90030 ldrsb r3, [r0] 16926 014e 12F9011F ldrsb r1, [r2, #1]! 16927 .LVL2766: 16928 0152 13FB01F3 smulbb r3, r3, r1 16929 .LBB1942: 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16930 .loc 36 708 0 16931 0156 DB11 asrs r3, r3, #7 16932 .syntax unified 16933 @ 708 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1 16934 0158 03F30703 ssat r3, #8, r3 16935 @ 0 "" 2 16936 .LVL2767: 16937 .thumb 16938 .syntax unified 16939 .LBE1942: 16940 015c 09F8013B strb r3, [r9], #1 16941 .LVL2768: 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16942 .loc 36 690 0 16943 0160 A145 cmp r9, r4 16944 0162 F2D1 bne .L1163 16945 0164 BFE7 b .L1149 16946 .LVL2769: 16947 .L1159: 16948 0166 4B44 add r3, r9, r3 16949 0168 4F46 mov r7, r9 16950 .LBB1943: 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16951 .loc 36 708 0 16952 .syntax unified 16953 @ 708 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1 16954 016a 08F30708 ssat r8, #8, r8 16955 @ 0 "" 2 16956 .LVL2770: 16957 .thumb 16958 .syntax unified 16959 .L1167: 16960 .LBE1943: 16961 016e 07F8018B strb r8, [r7], #1 16962 .LVL2771: 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16963 .loc 36 690 0 16964 0172 BB42 cmp r3, r7 16965 0174 FBD1 bne .L1167 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** px = pSrc1; ARM GAS /tmp/ccJrAs6S.s page 669 16966 .loc 36 738 0 16967 0176 019B ldr r3, [sp, #4] 16968 0178 1A44 add r2, r2, r3 16969 .LVL2772: 16970 017a 9CE7 b .L1171 16971 .LVL2773: 16972 .L1160: 16973 017c 1546 mov r5, r2 16974 017e 09EB0306 add r6, r9, r3 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 16975 .loc 36 690 0 16976 0182 4F46 mov r7, r9 16977 .LVL2774: 16978 .L1165: 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16979 .loc 36 701 0 16980 0184 95F900C0 ldrsb ip, [r5] 16981 .LVL2775: 16982 0188 90F90010 ldrsb r1, [r0] 16983 018c 10F9013C ldrsb r3, [r0, #-1] 16984 0190 15F9014F ldrsb r4, [r5, #1]! 16985 .LVL2776: 16986 0194 11FB0CF1 smulbb r1, r1, ip 16987 0198 13FB0413 smlabb r3, r3, r4, r1 16988 .LBB1944: 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** 16989 .loc 36 708 0 16990 019c DB11 asrs r3, r3, #7 16991 .syntax unified 16992 @ 708 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1 16993 019e 03F30703 ssat r3, #8, r3 16994 @ 0 "" 2 16995 .LVL2777: 16996 .thumb 16997 .syntax unified 16998 .LBE1944: 16999 01a2 07F8013B strb r3, [r7], #1 17000 .LVL2778: 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c **** { 17001 .loc 36 690 0 17002 01a6 BE42 cmp r6, r7 17003 01a8 ECD1 bne .L1165 17004 01aa C6E7 b .L1166 17005 .cfi_endproc 17006 .LFE181: 17008 .section .text.arm_correlate_f32,"ax",%progbits 17009 .align 1 17010 .p2align 2,,3 17011 .global arm_correlate_f32 17012 .syntax unified 17013 .thumb 17014 .thumb_func 17015 .fpu fpv4-sp-d16 17017 arm_correlate_f32: 17018 .LFB182: 17019 .file 37 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* ---------------------------------------------------------------------- ARM GAS /tmp/ccJrAs6S.s page 670 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Title: arm_correlate_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Description: Correlation of floating-point sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @defgroup Corr Correlation 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** Correlation is a mathematical operation that is similar to convolution. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** As with convolution, correlation uses two signals to produce a third signal. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** The underlying algorithms in correlation and convolution are identical except that one of the inp 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** Correlation is commonly used to measure the similarity between two signals. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** It has applications in pattern recognition, cryptanalysis, and searching. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** Fast versions of the Q15 and Q31 functions are also provided. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @par Algorithm 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** Let a[n] and b[n] be sequences of length srcALen 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** The convolution of the two signals is denoted by 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c ****       c[n] = a[n] * b[n]
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c ****
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** In correlation, one of the signals is flipped in time 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c ****        c[n] = a[n] * b[-n]
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @par 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** and this is mathematically defined as 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** \image html CorrelateEquation.gif ARM GAS /tmp/ccJrAs6S.s page 671 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @par 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** The pSrcA points to the first input vector of length srcALen< 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** The result c[n] is of length 2 * max(srcALen, srcBLen) - 1pDst and the calling function must 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @note 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** The pDst should be initialized to all zeros before being used. 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @par Fixed-Point Behavior 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** Correlation requires summing up a large number of intermediate products. 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** Refer to the function specific documentation below for further details of the pa 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @par Fast Versions 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** the input signals should be scaled down to avoid intermediate overflows. 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @par Opt Versions 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** These versions are optimised in cycles and consumes more memory (Scratch memory) 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @addtogroup Corr 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @{ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @brief Correlation of floating-point sequences. 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @param[in] pSrcA points to the first input sequence 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @param[in] srcALen length of the first input sequence 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @param[in] pSrcB points to the second input sequence 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @param[in] srcBLen length of the second input sequence 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @param[out] pDst points to the location where the output result is written. Length 2 * 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** @return none 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #include "arm_helium_utils.h" 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #include "arm_vec_filtering.h" 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** void arm_correlate_f32( 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t * pSrcA, 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t srcALen, 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t * pSrcB, 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t srcBLen, 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t * pDst) 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t *pIn1 = pSrcA; /* inputA pointer */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t *pX, *pY; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t *pA, *pB; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** int32_t i = 0U, j = 0; /* loop counters */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** int32_t inv = 4U; /* Reverse order flag */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t tot = 0U; /* Length */ ARM GAS /tmp/ccJrAs6S.s page 672 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** int32_t block1, block2, block3; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** int32_t incr; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** tot = ((srcALen + srcBLen) - 2U); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** if (srcALen > srcBLen) 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Calculating the number of zeros to be padded to the output 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** j = srcALen - srcBLen; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Initialize the pointer after zero padding 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += j; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** else if (srcALen < srcBLen) 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Initialization to inputB pointer 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pIn1 = pSrcB; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Initialization to the end of inputA pointer 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pIn2 = pSrcA + (srcALen - 1U); 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Initialisation of the pointer after zero padding 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst = pDst + tot; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Swapping the lengths 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** j = srcALen; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** srcALen = srcBLen; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** srcBLen = j; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Setting the reverse flag 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** inv = -4; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** block1 = srcBLen - 1; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** block2 = srcALen - srcBLen + 1; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** block3 = srcBLen - 1; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pA = pIn1; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pB = pIn2; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** incr = inv / 4; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** for (i = 0U; i <= block1 - 2; i += 2) 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t count = i + 1; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc0; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc1; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* ARM GAS /tmp/ccJrAs6S.s page 673 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * compute 2 accumulators per loop 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * size is incrementing for second accumulator 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Y pointer is decrementing for second accumulator 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pX = pA; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pY = pB; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_F32(acc0, acc1, pX, pY, count); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc0; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc1; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pB -= 2; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** for (; i < block1; i++) 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t count = i + 1; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pX = pA; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pY = pB; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** MVE_INTR_CORR_SINGLE_F32(acc, pX, pY, count); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pB--; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** for (i = 0U; i <= block2 - 4; i += 4) 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc0; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc1; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc2; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc3; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pX = pA; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pY = pB; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * compute 4 accumulators per loop 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * size is fixed for all accumulators 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * X pointer is incrementing for successive accumulators 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_F32(acc0, acc1, acc2, acc3, pX, pY, srcBLen); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc0; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc1; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc2; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc3; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pA += 4; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** for (; i <= block2 - 2; i += 2) 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { ARM GAS /tmp/ccJrAs6S.s page 674 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc0; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc1; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pX = pA; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pY = pB; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * compute 2 accumulators per loop 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * size is fixed for all accumulators 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * X pointer is incrementing for second accumulator 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_F32(acc0, acc1, pX, pY, srcBLen); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc0; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc1; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pA += 2; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** if (block2 & 1) 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pX = pA; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pY = pB; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** MVE_INTR_CORR_SINGLE_F32(acc, pX, pY, srcBLen); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pA++; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** for (i = block3 - 1; i >= 0; i -= 2) 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t count = (i + 1); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc0; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc1; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pX = pA; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pY = pB; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * compute 2 accumulators per loop 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * size is decrementing for second accumulator 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * X pointer is incrementing for second accumulator 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_F32(acc0, acc1, pX, pY, count); 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc0; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc1; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pA += 2; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** for (; i >= 0; i--) 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { ARM GAS /tmp/ccJrAs6S.s page 675 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t count = (i + 1); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pX = pA; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pY = pB; 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** MVE_INTR_CORR_SINGLE_F32(acc, pX, pY, count); 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst = acc; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += incr; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pA++; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #else 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** void arm_correlate_f32( 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t * pSrcA, 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t srcALen, 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t * pSrcB, 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t srcBLen, 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t * pDst) 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17020 .loc 37 307 0 17021 .cfi_startproc 17022 @ args = 4, pretend = 0, frame = 0 17023 @ frame_needed = 0, uses_anonymous_args = 0 17024 .LVL2779: 17025 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 17026 .LCFI102: 17027 .cfi_def_cfa_offset 36 17028 .cfi_offset 4, -36 17029 .cfi_offset 5, -32 17030 .cfi_offset 6, -28 17031 .cfi_offset 7, -24 17032 .cfi_offset 8, -20 17033 .cfi_offset 9, -16 17034 .cfi_offset 10, -12 17035 .cfi_offset 11, -8 17036 .cfi_offset 14, -4 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if defined(ARM_MATH_DSP) && !defined(ARM_MATH_AUTOVECTORIZE) 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t *pIn1; /* InputA pointer */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t *pIn2; /* InputB pointer */ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t *pOut = pDst; /* Output pointer */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t *px; /* Intermediate inputA pointer */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t *py; /* Intermediate inputB pointer */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t *pSrc1; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t sum; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t j, k, count, blkCnt; /* Loop counters */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t outBlockSize; /* Loop counter */ 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** int32_t inc = 1; /* Destination address modifier */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t acc0, acc1, acc2, acc3,c0; /* Accumulators */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if !defined(ARM_MATH_NEON) 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t x0, x1, x2, x3; /* temporary variables for holding input and c ARM GAS /tmp/ccJrAs6S.s page 676 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #endif 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #endif 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* srcB is always made to slide across srcA. */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* But CORR(x, y) is reverse of CORR(y, x) */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* and the destination pointer modifier, inc is set to -1 */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* But to improve the performance, 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * we assume zeroes in the output instead of zero padding either of the the inputs*/ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* If srcALen > srcBLen, 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* If srcALen < srcBLen, 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** if (srcALen >= srcBLen) 17037 .loc 37 343 0 17038 0004 9942 cmp r1, r3 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17039 .loc 37 307 0 17040 0006 099E ldr r6, [sp, #36] 17041 .LVL2780: 17042 .loc 37 343 0 17043 0008 C0F09280 bcc .L1193 17044 .LVL2781: 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialization of inputA pointer */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pIn1 = pSrcA; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialization of inputB pointer */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pIn2 = pSrcB; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Number of output samples is calculated */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** outBlockSize = (2U * srcALen) - 1U; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* When srcALen > srcBLen, zero padding has to be done to srcB 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * to make their lengths equal. 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Instead, (outBlockSize - (srcALen + srcBLen - 1)) 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * number of output samples are made zero */ 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** j = outBlockSize - (srcALen + (srcBLen - 1U)); 17045 .loc 37 358 0 17046 000c CC1A subs r4, r1, r3 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Updating the pointer position to non zero value */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pOut += j; 17047 .loc 37 361 0 17048 000e 06EB8406 add r6, r6, r4, lsl #2 17049 .LVL2782: 17050 0012 4FF0040C mov ip, #4 17051 .LVL2783: 17052 .L1194: 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** else 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialization of inputA pointer */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pIn1 = pSrcB; ARM GAS /tmp/ccJrAs6S.s page 677 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialization of inputB pointer */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pIn2 = pSrcA; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** j = srcBLen; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** srcBLen = srcALen; 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** srcALen = j; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* CORR(x, y) = Reverse order(CORR(y, x)) */ 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Hence set the destination pointer to point to the last output sample */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pOut = pDst + ((srcALen + srcBLen) - 2U); 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Destination address modifier is set to -1 */ 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** inc = -1; 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* The function is internally 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * divided into three stages according to the number of multiplications that has to be 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * taken place between inputA samples and inputB samples. In the first stage of the 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * algorithm, the multiplications increase by one for every iteration. 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * In the third stage of the algorithm, the multiplications decrease by one 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * for every iteration. */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* The algorithm is implemented in three stages. 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** The loop counters of each stage is initiated here. */ 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blockSize1 = srcBLen - 1U; 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blockSize2 = srcALen - (srcBLen - 1U); 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blockSize3 = blockSize1; 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* -------------------------- 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Initializations of stage1 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * -------------------------*/ 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* sum = x[0] * y[srcBlen - 1] 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1] 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * .... 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** The count variable holds the number of MAC operations performed */ 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** count = 1U; 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Working pointer of inputA */ 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px = pIn1; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Working pointer of inputB */ 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pSrc1 = pIn2 + (srcBLen - 1U); 17053 .loc 37 416 0 17054 0016 03F18044 add r4, r3, #1073741824 17055 001a 013C subs r4, r4, #1 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blockSize3 = blockSize1; 17056 .loc 37 395 0 17057 001c 0131 adds r1, r1, #1 17058 .LVL2784: ARM GAS /tmp/ccJrAs6S.s page 678 17059 .loc 37 416 0 17060 001e A400 lsls r4, r4, #2 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py = pSrc1; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* ------------------------ 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Stage1 process 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * ----------------------*/ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* The first stage starts here */ 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (blockSize1 > 0U) 17061 .loc 37 424 0 17062 0020 5F1E subs r7, r3, #1 17063 .LVL2785: 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blockSize3 = blockSize1; 17064 .loc 37 395 0 17065 0022 A1EB0308 sub r8, r1, r3 17066 .LVL2786: 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py = pSrc1; 17067 .loc 37 416 0 17068 0026 02EB040E add lr, r2, r4 17069 .LVL2787: 17070 .loc 37 424 0 17071 002a 55D0 beq .L1195 17072 002c 0434 adds r4, r4, #4 17073 002e 00EB040A add r10, r0, r4 17074 0032 051D adds r5, r0, #4 17075 0034 B146 mov r9, r6 17076 .LVL2788: 17077 .L1197: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Accumulator is made zero for every iteration */ 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum = 0.0f; 17078 .loc 37 427 0 17079 0036 DFED5D7A vldr.32 s15, .L1239 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17080 .loc 37 424 0 17081 003a 7446 mov r4, lr 17082 003c 0146 mov r1, r0 17083 .LVL2789: 17084 .L1196: 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = count >> 2U; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if defined(ARM_MATH_NEON) 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x4_t x,y; 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x4_t res = vdupq_n_f32(0) ; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x2_t accum = vdup_n_f32(0); 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (k > 0U) 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x = vld1q_f32(px); 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** y = vld1q_f32(py); 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** res = vmlaq_f32(res,x, y); ARM GAS /tmp/ccJrAs6S.s page 679 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px += 4; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py += 4; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement the loop counter */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k--; 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res)); 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += accum[0] + accum[1]; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = count & 0x3; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #else 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (k > 0U) 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* x[0] * y[srcBLen - 4] */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* x[1] * y[srcBLen - 3] */ 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* x[2] * y[srcBLen - 2] */ 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* x[3] * y[srcBLen - 1] */ 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement loop counter */ 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k--; 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Loop unrolling: Compute remaining outputs */ 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = count % 0x4U; 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #else 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialize k with number of samples */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = count; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (k > 0U) 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Perform the multiply-accumulate */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* x[0] * y[srcBLen - 1] */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 17085 .loc 37 493 0 17086 003e F1EC016A vldmia.32 r1!, {s13} 17087 .LVL2790: 17088 0042 B4EC017A vldmia.32 r4!, {s14} 17089 .LVL2791: 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17090 .loc 37 489 0 17091 0046 8D42 cmp r5, r1 ARM GAS /tmp/ccJrAs6S.s page 680 17092 .loc 37 493 0 17093 0048 E6EE877A vfma.f32 s15, s13, s14 17094 .LVL2792: 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17095 .loc 37 489 0 17096 004c F7D1 bne .L1196 17097 004e 0435 adds r5, r5, #4 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17098 .loc 37 424 0 17099 0050 AA45 cmp r10, r5 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement loop counter */ 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k--; 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pOut = sum; 17100 .loc 37 500 0 17101 0052 C9ED007A vstr.32 s15, [r9] 17102 0056 AEF1040E sub lr, lr, #4 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Destination pointer is updated according to the address modifier, inc */ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pOut += inc; 17103 .loc 37 502 0 17104 005a E144 add r9, r9, ip 17105 .LVL2793: 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17106 .loc 37 424 0 17107 005c EBD1 bne .L1197 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py = pSrc1 - count; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px = pIn1; 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Increment MAC count */ 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** count++; 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement loop counter */ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blockSize1--; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* -------------------------- 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Initializations of stage2 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * ------------------------*/ 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * .... 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Working pointer of inputA */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px = pIn1; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Working pointer of inputB */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py = pIn2; 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* count is index by which the pointer pIn1 to be incremented */ ARM GAS /tmp/ccJrAs6S.s page 681 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** count = 0U; 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* ------------------- 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Stage2 process 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * ------------------*/ 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * So, to loop unroll over blockSize2, 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * srcBLen should be greater than or equal to 4 */ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** if (srcBLen >= 4U) 17108 .loc 37 541 0 17109 005e 032B cmp r3, #3 17110 0060 0CFB0766 mla r6, ip, r7, r6 17111 .LVL2794: 17112 0064 38D9 bls .L1195 17113 .LVL2795: 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blkCnt = blockSize2 >> 2U; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if defined(ARM_MATH_NEON) 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x4_t c; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x4_t x1v; 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x4_t x2v; 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x4_t x; 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x4_t res = vdupq_n_f32(0) ; 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */ 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (blkCnt > 0U) 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Set all accumulators to zero */ 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc0 = 0.0f; 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc1 = 0.0f; 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc2 = 0.0f; 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc3 = 0.0f; 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if defined(ARM_MATH_NEON) 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Compute 4 MACs simultaneously. */ 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = srcBLen >> 2U; 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** res = vdupq_n_f32(0) ; 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x1v = vld1q_f32(px); 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px += 4; 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** do 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x2v = vld1q_f32(px); 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** c = vld1q_f32(py); 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py += 4; 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x = x1v; 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** res = vmlaq_n_f32(res,x,c[0]); 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x = vextq_f32(x1v,x2v,1); ARM GAS /tmp/ccJrAs6S.s page 682 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** res = vmlaq_n_f32(res,x,c[1]); 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x = vextq_f32(x1v,x2v,2); 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** res = vmlaq_n_f32(res,x,c[2]); 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x = vextq_f32(x1v,x2v,3); 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** res = vmlaq_n_f32(res,x,c[3]); 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x1v = x2v; 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px+=4; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } while (--k); 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** ** No loop unrolling is used. */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = srcBLen & 0x3; 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (k > 0U) 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Read y[srcBLen - 5] sample */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** c0 = *(py++); 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** res = vmlaq_n_f32(res,x1v,c0); 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Reuse the present samples for the next MAC */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x1v[0] = x1v[1]; 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x1v[1] = x1v[2]; 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x1v[2] = x1v[3]; 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x1v[3] = *(px++); 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement the loop counter */ 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k--; 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px-=1; 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc0 = res[0]; 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc1 = res[1]; 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc2 = res[2]; 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc3 = res[3]; 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #else 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* read x[0], x[1], x[2] samples */ 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x0 = *px++; 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x1 = *px++; 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x2 = *px++; 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = srcBLen >> 2U; 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** do 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Read y[0] sample */ ARM GAS /tmp/ccJrAs6S.s page 683 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** c0 = *(py++); 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Read x[3] sample */ 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x3 = *(px++); 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Perform the multiply-accumulate */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc0 += x[0] * y[0] */ 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc0 += x0 * c0; 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc1 += x[1] * y[0] */ 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc1 += x1 * c0; 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc2 += x[2] * y[0] */ 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc2 += x2 * c0; 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc3 += x[3] * y[0] */ 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc3 += x3 * c0; 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Read y[1] sample */ 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** c0 = *(py++); 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Read x[4] sample */ 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x0 = *(px++); 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Perform the multiply-accumulate */ 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc0 += x[1] * y[1] */ 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc0 += x1 * c0; 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc1 += x[2] * y[1] */ 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc1 += x2 * c0; 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc2 += x[3] * y[1] */ 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc2 += x3 * c0; 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc3 += x[4] * y[1] */ 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc3 += x0 * c0; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Read y[2] sample */ 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** c0 = *(py++); 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Read x[5] sample */ 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x1 = *(px++); 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Perform the multiply-accumulate */ 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc0 += x[2] * y[2] */ 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc0 += x2 * c0; 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc1 += x[3] * y[2] */ 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc1 += x3 * c0; 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc2 += x[4] * y[2] */ 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc2 += x0 * c0; 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc3 += x[5] * y[2] */ 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc3 += x1 * c0; 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Read y[3] sample */ 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** c0 = *(py++); 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Read x[6] sample */ 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x2 = *(px++); 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Perform the multiply-accumulate */ 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc0 += x[3] * y[3] */ 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc0 += x3 * c0; 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc1 += x[4] * y[3] */ 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc1 += x0 * c0; 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc2 += x[5] * y[3] */ 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc2 += x1 * c0; 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc3 += x[6] * y[3] */ ARM GAS /tmp/ccJrAs6S.s page 684 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc3 += x2 * c0; 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } while (--k); 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** ** No loop unrolling is used. */ 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = srcBLen % 0x4U; 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (k > 0U) 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Read y[4] sample */ 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** c0 = *(py++); 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Read x[7] sample */ 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x3 = *(px++); 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Perform the multiply-accumulate */ 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc0 += x[4] * y[4] */ 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc0 += x0 * c0; 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc1 += x[5] * y[4] */ 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc1 += x1 * c0; 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc2 += x[6] * y[4] */ 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc2 += x2 * c0; 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* acc3 += x[7] * y[4] */ 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** acc3 += x3 * c0; 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Reuse the present samples for the next MAC */ 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x0 = x1; 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x1 = x2; 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x2 = x3; 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement the loop counter */ 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k--; 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */ 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pOut = acc0; 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Destination pointer is updated according to the address modifier, inc */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pOut += inc; 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pOut = acc1; 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pOut += inc; 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pOut = acc2; 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pOut += inc; 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pOut = acc3; 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pOut += inc; 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Increment the pointer pIn1 index, count by 4 */ 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** count += 4U; 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px = pIn1 + count; 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py = pIn2; 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 685 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement loop counter */ 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blkCnt--; 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Loop unrolling: Compute remaining outputs */ 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blkCnt = blockSize2 % 0x4U; 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #else 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialize blkCnt with number of samples */ 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blkCnt = blockSize2; 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (blkCnt > 0U) 17114 .loc 37 768 0 17115 0066 B8F1000F cmp r8, #0 17116 006a 00F08280 beq .L1237 17117 006e 4FEA880A lsl r10, r8, #2 17118 0072 00EB0A0B add fp, r0, r10 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17119 .loc 37 526 0 17120 0076 8646 mov lr, r0 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17121 .loc 37 502 0 17122 0078 B146 mov r9, r6 17123 .LVL2796: 17124 .L1209: 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Accumulator is made zero for every iteration */ 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum = 0.0f; 17125 .loc 37 771 0 17126 007a DFED4C7A vldr.32 s15, .L1239 17127 .LVL2797: 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17128 .loc 37 502 0 17129 007e 1946 mov r1, r3 17130 0080 1546 mov r5, r2 17131 0082 7446 mov r4, lr 17132 .LVL2798: 17133 .L1208: 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = srcBLen >> 2U; 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if defined(ARM_MATH_NEON) 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x4_t x,y; 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x4_t res = vdupq_n_f32(0) ; 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x2_t accum = vdup_n_f32(0); 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (k > 0U) 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x = vld1q_f32(px); 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** y = vld1q_f32(py); 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 686 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** res = vmlaq_f32(res,x, y); 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px += 4; 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py += 4; 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement the loop counter */ 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k--; 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res)); 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += accum[0] + accum[1]; 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #else 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (k > 0U) 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Perform the multiply-accumulate */ 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement loop counter */ 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k--; 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */ 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** ** No loop unrolling is used. */ 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = srcBLen % 0x4U; 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #else 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialize blkCnt with number of samples */ 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = srcBLen; 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (k > 0U) 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Perform the multiply-accumulate */ 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 17134 .loc 37 826 0 17135 0084 F4EC016A vldmia.32 r4!, {s13} 17136 .LVL2799: 17137 0088 B5EC017A vldmia.32 r5!, {s14} 17138 .LVL2800: 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17139 .loc 37 823 0 17140 008c 0139 subs r1, r1, #1 17141 .LVL2801: 17142 .loc 37 826 0 17143 008e E6EE877A vfma.f32 s15, s13, s14 17144 .LVL2802: 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17145 .loc 37 823 0 17146 0092 F7D1 bne .L1208 17147 0094 0EF1040E add lr, lr, #4 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17148 .loc 37 768 0 ARM GAS /tmp/ccJrAs6S.s page 687 17149 0098 F345 cmp fp, lr 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement the loop counter */ 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k--; 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pOut = sum; 17150 .loc 37 833 0 17151 009a C9ED007A vstr.32 s15, [r9] 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Destination pointer is updated according to the address modifier, inc */ 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pOut += inc; 17152 .loc 37 836 0 17153 009e E144 add r9, r9, ip 17154 .LVL2803: 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17155 .loc 37 768 0 17156 00a0 EBD1 bne .L1209 17157 00a2 0CFB0866 mla r6, ip, r8, r6 17158 .LVL2804: 17159 .L1199: 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Increment the pointer pIn1 index, count by 1 */ 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** count++; 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px = pIn1 + count; 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py = pIn2; 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement the loop counter */ 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blkCnt--; 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** else 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* If the srcBLen is not a multiple of 4, 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * the blockSize2 loop cannot be unrolled by 4 */ 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blkCnt = blockSize2; 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (blkCnt > 0U) 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Accumulator is made zero for every iteration */ 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum = 0.0f; 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Loop over srcBLen */ 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = srcBLen; 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (k > 0U) 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Perform the multiply-accumulate */ 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement the loop counter */ 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k--; 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 688 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pOut = sum; 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Destination pointer is updated according to the address modifier, inc */ 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pOut += inc; 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Increment the pointer pIn1 index, count by 1 */ 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** count++; 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px = pIn1 + count; 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py = pIn2; 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement the loop counter */ 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blkCnt--; 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* -------------------------- 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Initializations of stage3 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * -------------------------*/ 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLe 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLe 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * .... 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * sum += x[srcALen-1] * y[0] 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** */ 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** The count variable holds the number of MAC operations performed */ 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** count = srcBLen - 1U; 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Working pointer of inputA */ 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pSrc1 = pIn1 + (srcALen - (srcBLen - 1U)); 17160 .loc 37 906 0 17161 00a6 00EB0A04 add r4, r0, r10 17162 .LVL2805: 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px = pSrc1; 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Working pointer of inputB */ 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py = pIn2; 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* ------------------- 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * Stage3 process 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * ------------------*/ 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (blockSize3 > 0U) 17163 .loc 37 916 0 17164 00aa 9FB1 cbz r7, .L1192 17165 .LVL2806: 17166 .L1211: 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Accumulator is made zero for every iteration */ 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum = 0.0f; 17167 .loc 37 919 0 17168 00ac DFED3F7A vldr.32 s15, .L1239 ARM GAS /tmp/ccJrAs6S.s page 689 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17169 .loc 37 855 0 17170 00b0 3B46 mov r3, r7 17171 00b2 1046 mov r0, r2 17172 00b4 2146 mov r1, r4 17173 .LVL2807: 17174 .L1210: 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = count >> 2U; 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #if defined(ARM_MATH_NEON) 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x4_t x,y; 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x4_t res = vdupq_n_f32(0) ; 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32x2_t accum = vdup_n_f32(0); 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (k > 0U) 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** x = vld1q_f32(px); 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** y = vld1q_f32(py); 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** res = vmlaq_f32(res,x, y); 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px += 4; 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py += 4; 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement the loop counter */ 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k--; 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res)); 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += accum[0] + accum[1]; 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #else 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (k > 0U) 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Perform the multiply-accumulate */ 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* sum += x[srcALen - srcBLen + 4] * y[3] */ 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* sum += x[srcALen - srcBLen + 3] * y[2] */ 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* sum += x[srcALen - srcBLen + 2] * y[1] */ 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* sum += x[srcALen - srcBLen + 1] * y[0] */ 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement loop counter */ 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k--; 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #endif /* #if defined (ARM_MATH_NEON) */ ARM GAS /tmp/ccJrAs6S.s page 690 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Loop unrolling: Compute remaining outputs */ 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = count % 0x4U; 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #else 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialize blkCnt with number of samples */ 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k = count; 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** while (k > 0U) 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Perform the multiply-accumulate */ 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += *px++ * *py++; 17175 .loc 37 983 0 17176 00b6 F1EC016A vldmia.32 r1!, {s13} 17177 .LVL2808: 17178 00ba B0EC017A vldmia.32 r0!, {s14} 17179 .LVL2809: 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17180 .loc 37 980 0 17181 00be 013B subs r3, r3, #1 17182 .LVL2810: 17183 .loc 37 983 0 17184 00c0 E6EE877A vfma.f32 s15, s13, s14 17185 .LVL2811: 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17186 .loc 37 980 0 17187 00c4 F7D1 bne .L1210 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17188 .loc 37 916 0 17189 00c6 013F subs r7, r7, #1 17190 .LVL2812: 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement loop counter */ 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** k--; 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Store the result in the accumulator in the destination buffer. */ 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pOut = sum; 17191 .loc 37 990 0 17192 00c8 C6ED007A vstr.32 s15, [r6] 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Destination pointer is updated according to the address modifier, inc */ 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pOut += inc; 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px = ++pSrc1; 17193 .loc 37 995 0 17194 00cc 04F10404 add r4, r4, #4 17195 .LVL2813: 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17196 .loc 37 992 0 17197 00d0 6644 add r6, r6, ip 17198 .LVL2814: 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17199 .loc 37 916 0 17200 00d2 EBD1 bne .L1211 ARM GAS /tmp/ccJrAs6S.s page 691 17201 .LVL2815: 17202 .L1192: 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** py = pIn2; 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement MAC count */ 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** count--; 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Decrement the loop counter */ 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** blockSize3--; 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #else 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* alternate version for CM0_FAMILY */ 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t *pIn1 = pSrcA; /* inputA pointer */ 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** const float32_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */ 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** float32_t sum; /* Accumulator */ 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t i = 0U, j; /* Loop counters */ 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t inv = 0U; /* Reverse order flag */ 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** uint32_t tot = 0U; /* Length */ 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* srcB is always made to slide across srcA. */ 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* But CORR(x, y) is reverse of CORR(y, x) */ 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* and a varaible, inv is set to 1 */ 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* If lengths are not equal then zero pad has to be done to make the two 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * inputs of same length. But to improve the performance, we assume zeroes 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * in the output instead of zero padding either of the the inputs*/ 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * starting of the output buffer */ 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * ending of the output buffer */ 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Once the zero padding is done the remaining of the output is calcualted 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** * using convolution but with the shorter signal time shifted. */ 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Calculate the length of the remaining sequence */ 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** tot = ((srcALen + srcBLen) - 2U); 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** if (srcALen > srcBLen) 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Calculating the number of zeros to be padded to the output */ 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** j = srcALen - srcBLen; 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialise the pointer after zero padding */ 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst += j; 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** else if (srcALen < srcBLen) 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialization to inputB pointer */ 1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pIn1 = pSrcB; 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialization to the end of inputA pointer */ 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pIn2 = pSrcA + (srcALen - 1U); 1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 692 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialisation of the pointer after zero padding */ 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** pDst = pDst + tot; 1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Swapping the lengths */ 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** j = srcALen; 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** srcALen = srcBLen; 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** srcBLen = j; 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Setting the reverse flag */ 1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** inv = 1; 1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Loop to calculate convolution for output length number of times */ 1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** for (i = 0U; i <= tot; i++) 1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Initialize sum with zero to carry out MAC operations */ 1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum = 0.0f; 1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Loop to perform MAC operations according to convolution equation */ 1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** for (j = 0U; j <= i; j++) 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Check the array limitations */ 1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** if ((((i - j) < srcBLen) && (j < srcALen))) 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* z[i] += x[i-j] * y[j] */ 1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** sum += pIn1[j] * pIn2[-((int32_t) i - j)]; 1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Store the output in the destination buffer */ 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** if (inv == 1) 1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst-- = sum; 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** else 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** *pDst++ = sum; 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** } 17203 .loc 37 1090 0 17204 00d4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 17205 .LVL2816: 17206 .L1195: 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17207 .loc 37 855 0 17208 00d8 B8F1000F cmp r8, #0 17209 00dc 49D0 beq .L1237 17210 00de 002B cmp r3, #0 17211 00e0 49D0 beq .L1213 17212 00e2 002F cmp r7, #0 17213 00e4 53D0 beq .L1201 17214 00e6 4FEA880A lsl r10, r8, #2 17215 00ea 022B cmp r3, #2 17216 00ec 00EB0A04 add r4, r0, r10 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17217 .loc 37 526 0 ARM GAS /tmp/ccJrAs6S.s page 693 17218 00f0 0346 mov r3, r0 17219 .LVL2817: 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17220 .loc 37 855 0 17221 00f2 3146 mov r1, r6 17222 00f4 2BD0 beq .L1204 17223 .LVL2818: 17224 .L1203: 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17225 .loc 37 866 0 17226 00f6 D3ED017A vldr.32 s15, [r3, #4] 17227 00fa 92ED015A vldr.32 s10, [r2, #4] 17228 00fe D3ED005A vldr.32 s11, [r3] 17229 0102 92ED006A vldr.32 s12, [r2] 17230 0106 D3ED026A vldr.32 s13, [r3, #8] 17231 010a 92ED027A vldr.32 s14, [r2, #8] 17232 010e 67EE857A vmul.f32 s15, s15, s10 17233 0112 0433 adds r3, r3, #4 17234 .LVL2819: 17235 0114 E5EE867A vfma.f32 s15, s11, s12 17236 .LVL2820: 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17237 .loc 37 855 0 17238 0118 A342 cmp r3, r4 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17239 .loc 37 866 0 17240 011a E6EE877A vfma.f32 s15, s13, s14 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Destination pointer is updated according to the address modifier, inc */ 17241 .loc 37 873 0 17242 011e C1ED007A vstr.32 s15, [r1] 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17243 .loc 37 875 0 17244 0122 6144 add r1, r1, ip 17245 .LVL2821: 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17246 .loc 37 855 0 17247 0124 E7D1 bne .L1203 17248 .LVL2822: 17249 .L1238: 17250 0126 0CFB0866 mla r6, ip, r8, r6 17251 .LVL2823: 17252 .L1205: 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** px = pSrc1; 17253 .loc 37 906 0 17254 012a 00EB0A04 add r4, r0, r10 17255 .LVL2824: 17256 012e BDE7 b .L1211 17257 .LVL2825: 17258 .L1193: 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17259 .loc 37 378 0 17260 0130 03F18044 add r4, r3, #1073741824 17261 0134 023C subs r4, r4, #2 17262 0136 0746 mov r7, r0 17263 0138 0C44 add r4, r4, r1 17264 013a 0D46 mov r5, r1 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 694 17265 .loc 37 366 0 17266 013c 1046 mov r0, r2 17267 .LVL2826: 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17268 .loc 37 378 0 17269 013e 1946 mov r1, r3 17270 .LVL2827: 17271 0140 06EB8406 add r6, r6, r4, lsl #2 17272 .LVL2828: 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17273 .loc 37 369 0 17274 0144 3A46 mov r2, r7 17275 .LVL2829: 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17276 .loc 37 378 0 17277 0146 6FF0030C mvn ip, #3 17278 014a 2B46 mov r3, r5 17279 014c 63E7 b .L1194 17280 .LVL2830: 17281 .L1204: 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17282 .loc 37 866 0 17283 014e 93ED016A vldr.32 s12, [r3, #4] 17284 0152 D2ED017A vldr.32 s15, [r2, #4] 17285 0156 B3EC017A vldmia.32 r3!, {s14} 17286 .LVL2831: 17287 015a D2ED006A vldr.32 s13, [r2] 17288 015e 67EE867A vmul.f32 s15, s15, s12 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17289 .loc 37 855 0 17290 0162 9C42 cmp r4, r3 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17291 .loc 37 866 0 17292 0164 E6EE877A vfma.f32 s15, s13, s14 17293 .LVL2832: 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Destination pointer is updated according to the address modifier, inc */ 17294 .loc 37 873 0 17295 0168 C1ED007A vstr.32 s15, [r1] 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17296 .loc 37 875 0 17297 016c 6144 add r1, r1, ip 17298 .LVL2833: 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17299 .loc 37 855 0 17300 016e EED1 bne .L1204 17301 0170 D9E7 b .L1238 17302 .LVL2834: 17303 .L1237: 17304 0172 C246 mov r10, r8 17305 0174 97E7 b .L1199 17306 .L1213: 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Destination pointer is updated according to the address modifier, inc */ 17307 .loc 37 873 0 17308 0176 0024 movs r4, #0 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17309 .loc 37 855 0 17310 0178 4146 mov r1, r8 ARM GAS /tmp/ccJrAs6S.s page 695 17311 017a 3346 mov r3, r6 17312 .LVL2835: 17313 .L1200: 17314 017c 0139 subs r1, r1, #1 17315 .LVL2836: 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Destination pointer is updated according to the address modifier, inc */ 17316 .loc 37 873 0 17317 017e 1C60 str r4, [r3] @ float 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17318 .loc 37 875 0 17319 0180 6344 add r3, r3, ip 17320 .LVL2837: 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17321 .loc 37 855 0 17322 0182 FBD1 bne .L1200 17323 0184 0CFB0866 mla r6, ip, r8, r6 17324 0188 4FEA880A lsl r10, r8, #2 17325 018c CDE7 b .L1205 17326 .LVL2838: 17327 .L1201: 17328 018e 00EB8808 add r8, r0, r8, lsl #2 17329 .LVL2839: 17330 .L1206: 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17331 .loc 37 866 0 17332 0192 B0EC017A vldmia.32 r0!, {s14} 17333 .LVL2840: 17334 0196 D2ED007A vldr.32 s15, [r2] 17335 019a 67EE877A vmul.f32 s15, s15, s14 17336 .LVL2841: 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17337 .loc 37 855 0 17338 019e 8045 cmp r8, r0 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** /* Destination pointer is updated according to the address modifier, inc */ 17339 .loc 37 873 0 17340 01a0 C6ED007A vstr.32 s15, [r6] 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** 17341 .loc 37 875 0 17342 01a4 6644 add r6, r6, ip 17343 .LVL2842: 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c **** { 17344 .loc 37 855 0 17345 01a6 F4D1 bne .L1206 17346 01a8 94E7 b .L1192 17347 .L1240: 17348 01aa 00BF .align 2 17349 .L1239: 17350 01ac 00000000 .word 0 17351 .cfi_endproc 17352 .LFE182: 17354 .section .text.arm_correlate_fast_opt_q15,"ax",%progbits 17355 .align 1 17356 .p2align 2,,3 17357 .global arm_correlate_fast_opt_q15 17358 .syntax unified 17359 .thumb 17360 .thumb_func ARM GAS /tmp/ccJrAs6S.s page 696 17361 .fpu fpv4-sp-d16 17363 arm_correlate_fast_opt_q15: 17364 .LFB183: 17365 .file 38 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * Title: arm_correlate_fast_opt_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * Description: Fast Q15 Correlation 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @addtogroup Corr 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @brief Correlation of Q15 sequences (fast version). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @param[in] srcBLen length of the second input sequence. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @param[out] pDst points to the location where the output result is written. Length 2 * 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @return none 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @par Scaling and Overflow Behavior 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** This fast version uses a 32-bit accumulator with 2.30 format. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** The accumulator maintains full precision of the intermediate multiplication resu 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** There is no saturation on intermediate additions. ARM GAS /tmp/ccJrAs6S.s page 697 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** Thus, if the accumulator overflows it wraps around and distorts the result. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** The input signals should be scaled down to avoid intermediate overflows. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** maximum of min(srcALen, srcBLen) number of additions is carried internally. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 form 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** @remark 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** Refer to \ref arm_correlate_q15() for a slower implementation of this function w 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** void arm_correlate_fast_opt_q15( 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** const q15_t * pSrcA, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** uint32_t srcALen, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** const q15_t * pSrcB, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** uint32_t srcBLen, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** q15_t * pDst, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** q15_t * pScratch) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 17366 .loc 38 71 0 17367 .cfi_startproc 17368 @ args = 8, pretend = 0, frame = 8 17369 @ frame_needed = 0, uses_anonymous_args = 0 17370 .LVL2843: 17371 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 17372 .LCFI103: 17373 .cfi_def_cfa_offset 36 17374 .cfi_offset 4, -36 17375 .cfi_offset 5, -32 17376 .cfi_offset 6, -28 17377 .cfi_offset 7, -24 17378 .cfi_offset 8, -20 17379 .cfi_offset 9, -16 17380 .cfi_offset 10, -12 17381 .cfi_offset 11, -8 17382 .cfi_offset 14, -4 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** const q15_t *pIn1; /* InputA pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** const q15_t *pIn2; /* InputB pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** q31_t acc0; /* Accumulators */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** q15_t *pScr1 = pScratch; /* Temporary pointer for scratch */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** const q15_t *py; /* Intermediate inputB pointer */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** uint32_t j, blkCnt, outBlockSize; /* Loop counter */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** int32_t inc = 1; /* Destination address modifier */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** uint32_t tapCnt; /* Loop count */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** q31_t acc1, acc2, acc3; /* Accumulators */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** q31_t x1, x2, x3; /* Temporary variables for holding input and 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** q31_t y1, y2; /* State variables */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #endif 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* srcB is always made to slide across srcA. */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* But CORR(x, y) is reverse of CORR(y, x) */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* and the destination pointer modifier, inc is set to -1 */ ARM GAS /tmp/ccJrAs6S.s page 698 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* But to improve the performance, 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * we include zeroes in the output instead of zero padding either of the the inputs*/ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* If srcALen > srcBLen, 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* If srcALen < srcBLen, 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** if (srcALen >= srcBLen) 17383 .loc 38 101 0 17384 0004 9942 cmp r1, r3 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** const q15_t *pIn1; /* InputA pointer */ 17385 .loc 38 71 0 17386 0006 83B0 sub sp, sp, #12 17387 .LCFI104: 17388 .cfi_def_cfa_offset 48 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** const q15_t *pIn1; /* InputA pointer */ 17389 .loc 38 71 0 17390 0008 0C46 mov r4, r1 17391 000a 1F46 mov r7, r3 17392 000c 8346 mov fp, r0 17393 000e 9046 mov r8, r2 17394 0010 DDE90C65 ldrd r6, r5, [sp, #48] 17395 .LVL2844: 17396 .loc 38 101 0 17397 0014 60D3 bcc .L1242 17398 .LVL2845: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Initialization of inputA pointer */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pIn1 = pSrcA; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Initialization of inputB pointer */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pIn2 = pSrcB; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Number of output samples is calculated */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** outBlockSize = (2U * srcALen) - 1U; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* When srcALen > srcBLen, zero padding is done to srcB 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * to make their lengths equal. 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * Instead, (outBlockSize - (srcALen + srcBLen - 1)) 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** * number of output samples are made zero */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** j = outBlockSize - (srcALen + (srcBLen - 1U)); 17399 .loc 38 116 0 17400 0016 CB1A subs r3, r1, r3 17401 .LVL2846: 17402 0018 0222 movs r2, #2 17403 .LVL2847: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Updating the pointer position to non zero value */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pOut += j; 17404 .loc 38 119 0 17405 001a 06EB4306 add r6, r6, r3, lsl #1 17406 .LVL2848: 17407 001e 0092 str r2, [sp] 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17408 .loc 38 116 0 17409 0020 4B00 lsls r3, r1, #1 17410 .LVL2849: ARM GAS /tmp/ccJrAs6S.s page 699 17411 .L1243: 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** } 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** else 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Initialization of inputA pointer */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pIn1 = pSrcB; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Initialization of inputB pointer */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pIn2 = pSrcA; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** j = srcBLen; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** srcBLen = srcALen; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** srcALen = j; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* CORR(x, y) = Reverse order(CORR(y, x)) */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Hence set the destination pointer to point to the last output sample */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pOut = pDst + ((srcALen + srcBLen) - 2U); 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Destination address modifier is set to -1 */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** inc = -1; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** } 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pScr1 = pScratch; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Fill (srcBLen - 1U) zeros in scratch buffer */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Update temporary scratch pointer */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pScr1 += (srcBLen - 1U); 17412 .loc 38 148 0 17413 0022 07F10049 add r9, r7, #-2147483648 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17414 .loc 38 145 0 17415 0026 07F1FF3A add r10, r7, #-1 17416 .loc 38 148 0 17417 002a 09F1FF39 add r9, r9, #-1 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17418 .loc 38 145 0 17419 002e 5246 mov r2, r10 17420 0030 2946 mov r1, r5 17421 0032 0020 movs r0, #0 17422 .LVL2850: 17423 .loc 38 148 0 17424 0034 05EB4909 add r9, r5, r9, lsl #1 17425 0038 0193 str r3, [sp, #4] 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17426 .loc 38 145 0 17427 003a FFF7FEFF bl arm_fill_q15 17428 .LVL2851: 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Copy (srcALen) samples in scratch buffer */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** arm_copy_q15(pIn1, pScr1, srcALen); 17429 .loc 38 152 0 17430 003e 2246 mov r2, r4 17431 0040 5846 mov r0, fp ARM GAS /tmp/ccJrAs6S.s page 700 17432 0042 4946 mov r1, r9 17433 0044 FFF7FEFF bl arm_copy_q15 17434 .LVL2852: 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Update pointers */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pScr1 += srcALen; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 17435 .loc 38 159 0 17436 0048 019B ldr r3, [sp, #4] 17437 004a 5246 mov r2, r10 17438 004c 09EB0301 add r1, r9, r3 17439 .LVL2853: 17440 0050 0020 movs r0, #0 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Update pointer */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pScr1 += (srcBLen - 1U); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Temporary pointer for scratch2 */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** py = pIn2; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Actual correlation process starts here */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** blkCnt = (srcALen + srcBLen - 1U) >> 2; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** while (blkCnt > 0) 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Initialze temporary scratch pointer as scratch1 */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pScr1 = pScratch; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Clear Accumlators */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc0 = 0; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc1 = 0; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc2 = 0; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc3 = 0; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Read two samples from scratch buffer */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Read next two samples from scratch buffer */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** x2 = read_q15x2_ia (&pScr1); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** tapCnt = (srcBLen) >> 2U; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** while (tapCnt > 0U) 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Read four samples from smaller buffer */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** y1 = read_q15x2_ia ((q15_t **) &pIn2); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** y2 = read_q15x2_ia ((q15_t **) &pIn2); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* multiply and accumlate */ ARM GAS /tmp/ccJrAs6S.s page 701 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc0 = __SMLAD(x1, y1, acc0); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc2 = __SMLAD(x2, y1, acc2); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* pack input data */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #else 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #endif 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* multiply and accumlate */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc1 = __SMLADX(x3, y1, acc1); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Read next two samples from scratch buffer */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* multiply and accumlate */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc0 = __SMLAD(x2, y2, acc0); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc2 = __SMLAD(x1, y2, acc2); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* pack input data */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #else 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #endif 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc3 = __SMLADX(x3, y1, acc3); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc1 = __SMLADX(x3, y2, acc1); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** x2 = read_q15x2_ia (&pScr1); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #else 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #endif 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc3 = __SMLADX(x3, y2, acc3); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Decrement loop counter */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** tapCnt--; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** } 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Update scratch pointer for remaining samples of smaller length sequence */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pScr1 -= 4U; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* apply same above for remaining samples of smaller length sequence */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** tapCnt = (srcBLen) & 3U; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** while (tapCnt > 0U) 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* accumlate the results */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2); 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc1 += (*pScr1++ * *pIn2); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc2 += (*pScr1++ * *pIn2); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc3 += (*pScr1++ * *pIn2++); ARM GAS /tmp/ccJrAs6S.s page 702 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pScr1 -= 3U; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Decrement loop counter */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** tapCnt--; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** } 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** blkCnt--; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Store the results in the accumulators in the destination buffer. */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** *pOut = (__SSAT(acc0 >> 15U, 16)); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pOut += inc; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** *pOut = (__SSAT(acc1 >> 15U, 16)); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pOut += inc; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** *pOut = (__SSAT(acc2 >> 15U, 16)); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pOut += inc; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** *pOut = (__SSAT(acc3 >> 15U, 16)); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pOut += inc; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Initialization of inputB pointer */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pIn2 = py; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pScratch += 4U; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** } 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Loop unrolling: Compute remaining outputs */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** blkCnt = (srcALen + srcBLen - 1U) & 0x3; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #else 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Initialize blkCnt with number of samples */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** blkCnt = (srcALen + srcBLen - 1U); 17441 .loc 38 289 0 17442 0052 3C44 add r4, r4, r7 17443 .LVL2854: 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17444 .loc 38 159 0 17445 0054 FFF7FEFF bl arm_fill_q15 17446 .LVL2855: 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Calculate correlation for remaining samples of Bigger length sequence */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** while (blkCnt > 0) 17447 .loc 38 294 0 17448 0058 013C subs r4, r4, #1 17449 .LVL2856: 17450 005a 36D0 beq .L1241 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Initialze temporary scratch pointer as scratch1 */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pScr1 = pScratch; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Clear Accumlators */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc0 = 0; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** tapCnt = (srcBLen) >> 1U; 17451 .loc 38 302 0 ARM GAS /tmp/ccJrAs6S.s page 703 17452 005c 4FEA570A lsr r10, r7, #1 17453 0060 4FEA8A0B lsl fp, r10, #2 17454 .LVL2857: 17455 0064 08EB0B03 add r3, r8, fp 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** while (tapCnt > 0U) 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Read next two samples from scratch buffer */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Decrement loop counter */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** tapCnt--; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** } 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** tapCnt = (srcBLen) & 1U; 17456 .loc 38 315 0 17457 0068 07F00107 and r7, r7, #1 17458 006c 0193 str r3, [sp, #4] 17459 .LVL2858: 17460 .L1245: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 17461 .loc 38 304 0 17462 006e BAF1000F cmp r10, #0 17463 0072 2DD0 beq .L1250 17464 0074 05F1040C add ip, r5, #4 17465 0078 08F10400 add r0, r8, #4 17466 007c D646 mov lr, r10 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17467 .loc 38 300 0 17468 007e 0023 movs r3, #0 17469 .LVL2859: 17470 .L1247: 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 17471 .loc 38 308 0 17472 0080 3CF8042C ldrh r2, [ip, #-4] 17473 0084 30F8049C ldrh r9, [r0, #-4] 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17474 .loc 38 309 0 17475 0088 3CF8021C ldrh r1, [ip, #-2] 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 17476 .loc 38 308 0 17477 008c 12FB0933 smlabb r3, r2, r9, r3 17478 .LVL2860: 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17479 .loc 38 309 0 17480 0090 30F8022C ldrh r2, [r0, #-2] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 17481 .loc 38 304 0 17482 0094 BEF1010E subs lr, lr, #1 17483 .LVL2861: 17484 0098 0CF1040C add ip, ip, #4 17485 .LVL2862: 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17486 .loc 38 309 0 17487 009c 11FB0233 smlabb r3, r1, r2, r3 ARM GAS /tmp/ccJrAs6S.s page 704 17488 .LVL2863: 17489 00a0 00F10400 add r0, r0, #4 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 17490 .loc 38 304 0 17491 00a4 ECD1 bne .L1247 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17492 .loc 38 309 0 17493 00a6 0199 ldr r1, [sp, #4] 17494 00a8 05EB0B02 add r2, r5, fp 17495 .LVL2864: 17496 .L1246: 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* apply same above for remaining samples of smaller length sequence */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** while (tapCnt > 0U) 17497 .loc 38 318 0 17498 00ac 1FB1 cbz r7, .L1248 17499 .LVL2865: 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* accumlate the results */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 17500 .loc 38 322 0 17501 00ae 1288 ldrh r2, [r2] 17502 .LVL2866: 17503 00b0 0988 ldrh r1, [r1] 17504 .LVL2867: 17505 00b2 12FB0133 smlabb r3, r2, r1, r3 17506 .LVL2868: 17507 .L1248: 17508 .LBB1945: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Decrement loop counter */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** tapCnt--; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** } 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** blkCnt--; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* The result is in 2.30 format. Convert to 1.15 with saturation. 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** ** Then store the output in the destination buffer. */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** *pOut = (q15_t) (__SSAT((acc0 >> 15), 16)); 17509 .loc 38 332 0 17510 00b6 DB13 asrs r3, r3, #15 17511 .LVL2869: 17512 .syntax unified 17513 @ 332 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt 17514 00b8 03F30F03 ssat r3, #16, r3 17515 @ 0 "" 2 17516 .LVL2870: 17517 .thumb 17518 .syntax unified 17519 .LBE1945: 17520 00bc 3380 strh r3, [r6] @ movhi 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pOut += inc; 17521 .loc 38 333 0 17522 00be 009B ldr r3, [sp] 17523 .LVL2871: 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 705 17524 .loc 38 294 0 17525 00c0 013C subs r4, r4, #1 17526 .LVL2872: 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** /* Initialization of inputB pointer */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pIn2 = py; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** pScratch += 1U; 17527 .loc 38 338 0 17528 00c2 05F10205 add r5, r5, #2 17529 .LVL2873: 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17530 .loc 38 333 0 17531 00c6 1E44 add r6, r6, r3 17532 .LVL2874: 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 17533 .loc 38 294 0 17534 00c8 D1D1 bne .L1245 17535 .L1241: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** } 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** } 17536 .loc 38 341 0 17537 00ca 03B0 add sp, sp, #12 17538 .LCFI105: 17539 .cfi_remember_state 17540 .cfi_def_cfa_offset 36 17541 @ sp needed 17542 00cc BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 17543 .LVL2875: 17544 .L1250: 17545 .LCFI106: 17546 .cfi_restore_state 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** { 17547 .loc 38 304 0 17548 00d0 2A46 mov r2, r5 17549 00d2 4146 mov r1, r8 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17550 .loc 38 300 0 17551 00d4 5346 mov r3, r10 17552 00d6 E9E7 b .L1246 17553 .LVL2876: 17554 .L1242: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17555 .loc 38 136 0 17556 00d8 03F10043 add r3, r3, #-2147483648 17557 .LVL2877: 17558 00dc 023B subs r3, r3, #2 17559 00de 2344 add r3, r3, r4 17560 00e0 2246 mov r2, r4 17561 .LVL2878: 17562 00e2 6FF00101 mvn r1, #1 17563 .LVL2879: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17564 .loc 38 124 0 17565 00e6 C346 mov fp, r8 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 706 17566 .loc 38 136 0 17567 00e8 06EB4306 add r6, r6, r3, lsl #1 17568 .LVL2880: 17569 00ec 3C46 mov r4, r7 17570 .LVL2881: 17571 00ee 7B00 lsls r3, r7, #1 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17572 .loc 38 127 0 17573 00f0 8046 mov r8, r0 17574 .LVL2882: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c **** 17575 .loc 38 136 0 17576 00f2 0091 str r1, [sp] 17577 00f4 1746 mov r7, r2 17578 00f6 94E7 b .L1243 17579 .cfi_endproc 17580 .LFE183: 17582 .section .text.arm_correlate_fast_q15,"ax",%progbits 17583 .align 1 17584 .p2align 2,,3 17585 .global arm_correlate_fast_q15 17586 .syntax unified 17587 .thumb 17588 .thumb_func 17589 .fpu fpv4-sp-d16 17591 arm_correlate_fast_q15: 17592 .LFB184: 17593 .file 39 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Title: arm_correlate_fast_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Description: Fast Q15 Correlation 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** #include "arm_math.h" ARM GAS /tmp/ccJrAs6S.s page 707 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** @addtogroup Corr 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** @brief Correlation of Q15 sequences (fast version). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** @param[out] pDst points to the location where the output result is written. Length 2 * 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** This fast version uses a 32-bit accumulator with 2.30 format. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** The accumulator maintains full precision of the intermediate multiplication resu 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** There is no saturation on intermediate additions. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** Thus, if the accumulator overflows it wraps around and distorts the result. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** The input signals should be scaled down to avoid intermediate overflows. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** maximum of min(srcALen, srcBLen) number of additions is carried internally. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 form 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** @remark 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** Refer to \ref arm_correlate_q15() for a slower implementation of this function w 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** void arm_correlate_fast_q15( 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** const q15_t * pSrcA, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** uint32_t srcALen, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** const q15_t * pSrcB, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** uint32_t srcBLen, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** q15_t * pDst) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 17594 .loc 39 69 0 17595 .cfi_startproc 17596 @ args = 4, pretend = 0, frame = 56 17597 @ frame_needed = 0, uses_anonymous_args = 0 17598 .LVL2883: 17599 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 17600 .LCFI107: 17601 .cfi_def_cfa_offset 36 17602 .cfi_offset 4, -36 17603 .cfi_offset 5, -32 17604 .cfi_offset 6, -28 17605 .cfi_offset 7, -24 17606 .cfi_offset 8, -20 17607 .cfi_offset 9, -16 17608 .cfi_offset 10, -12 17609 .cfi_offset 11, -8 17610 .cfi_offset 14, -4 ARM GAS /tmp/ccJrAs6S.s page 708 17611 0004 8FB0 sub sp, sp, #60 17612 .LCFI108: 17613 .cfi_def_cfa_offset 96 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** const q15_t *pIn1; /* InputA pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** const q15_t *pIn2; /* InputB pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** const q15_t *px; /* Intermediate inputA pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** const q15_t *py; /* Intermediate inputB pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** const q15_t *pSrc1; /* Intermediate pointers */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** q31_t x0, x1, x2, x3, c0; /* Temporary variables for holding input and 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** uint32_t j, k, count, blkCnt; /* Loop counters */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** uint32_t outBlockSize; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** int32_t inc = 1; /* Destination address modifier */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* srcB is always made to slide across srcA. */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* But CORR(x, y) is reverse of CORR(y, x) */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* and the destination pointer modifier, inc is set to -1 */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* But to improve the performance, 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * we include zeroes in the output instead of zero padding either of the the inputs*/ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* If srcALen > srcBLen, 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* If srcALen < srcBLen, 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** if (srcALen >= srcBLen) 17614 .loc 39 97 0 17615 0006 9942 cmp r1, r3 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** const q15_t *pIn1; /* InputA pointer */ 17616 .loc 39 69 0 17617 0008 9246 mov r10, r2 17618 000a CDE90103 strd r0, r3, [sp, #4] 17619 000e 189A ldr r2, [sp, #96] 17620 .LVL2884: 17621 .loc 39 97 0 17622 0010 C0F0CD81 bcc .L1257 17623 .LVL2885: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Initialization of inputA pointer */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pIn1 = pSrcA; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Initialization of inputB pointer */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pIn2 = pSrcB; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Number of output samples is calculated */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** outBlockSize = (2U * srcALen) - 1U; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* When srcALen > srcBLen, zero padding is done to srcB 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * to make their lengths equal. 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Instead, (outBlockSize - (srcALen + srcBLen - 1)) 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * number of output samples are made zero */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** j = outBlockSize - (srcALen + (srcBLen - 1U)); ARM GAS /tmp/ccJrAs6S.s page 709 17624 .loc 39 112 0 17625 0014 CB1A subs r3, r1, r3 17626 .LVL2886: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Updating the pointer position to non zero value */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += j; 17627 .loc 39 115 0 17628 0016 02EB4309 add r9, r2, r3, lsl #1 17629 .LVL2887: 17630 001a 029A ldr r2, [sp, #8] 17631 001c 4FF0020B mov fp, #2 17632 .LVL2888: 17633 .L1258: 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** else 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Initialization of inputA pointer */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pIn1 = pSrcB; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Initialization of inputB pointer */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pIn2 = pSrcA; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** j = srcBLen; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** srcBLen = srcALen; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** srcALen = j; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* CORR(x, y) = Reverse order(CORR(y, x)) */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Hence set the destination pointer to point to the last output sample */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut = pDst + ((srcALen + srcBLen) - 2U); 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination address modifier is set to -1 */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** inc = -1; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* The function is internally 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * divided into three stages according to the number of multiplications that has to be 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * taken place between inputA samples and inputB samples. In the first stage of the 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * algorithm, the multiplications increase by one for every iteration. 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * In the third stage of the algorithm, the multiplications decrease by one 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * for every iteration. */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* The algorithm is implemented in three stages. 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** The loop counters of each stage is initiated here. */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** blockSize1 = srcBLen - 1U; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** blockSize2 = srcALen - (srcBLen - 1U); 17634 .loc 39 151 0 17635 0020 0131 adds r1, r1, #1 17636 .LVL2889: 17637 0022 8B1A subs r3, r1, r2 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** blockSize3 = blockSize1; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* -------------------------- 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Initializations of stage1 ARM GAS /tmp/ccJrAs6S.s page 710 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * -------------------------*/ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* sum = x[0] * y[srcBlen - 1] 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * .... 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** The count variable holds the number of MAC operations performed */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** count = 1U; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Working pointer of inputA */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = pIn1; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Working pointer of inputB */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pSrc1 = pIn2 + (srcBLen - 1U); 17638 .loc 39 172 0 17639 0024 02F10040 add r0, r2, #-2147483648 17640 0028 0138 subs r0, r0, #1 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** blockSize3 = blockSize1; 17641 .loc 39 151 0 17642 002a 0693 str r3, [sp, #24] 17643 .LVL2890: 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** py = pSrc1; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* ------------------------ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Stage1 process 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * ----------------------*/ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* The first loop starts here */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** while (blockSize1 > 0U) 17644 .loc 39 180 0 17645 002c 531E subs r3, r2, #1 17646 .LVL2891: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** py = pSrc1; 17647 .loc 39 172 0 17648 002e 0AEB4001 add r1, r10, r0, lsl #1 17649 .LVL2892: 17650 .loc 39 180 0 17651 0032 0B93 str r3, [sp, #44] 17652 0034 00F08881 beq .L1259 17653 0038 DDF80480 ldr r8, [sp, #4] 17654 003c CDF80090 str r9, [sp] 17655 0040 CE46 mov lr, r9 17656 0042 A1F1020C sub ip, r1, #2 17657 0046 4646 mov r6, r8 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 17658 .loc 39 166 0 17659 0048 0120 movs r0, #1 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Accumulator is made zero for every iteration */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum = 0; 17660 .loc 39 183 0 17661 004a 0023 movs r3, #0 17662 .LVL2893: 17663 004c 9146 mov r9, r2 ARM GAS /tmp/ccJrAs6S.s page 711 17664 .LVL2894: 17665 .L1260: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k = count >> 2U; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** while (k > 0U) 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement loop counter */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k--; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** No loop unrolling is used. */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k = count % 0x4U; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** while (k > 0U) 17666 .loc 39 205 0 17667 004e 10F00304 ands r4, r0, #3 17668 .LVL2895: 17669 0052 15D0 beq .L1263 17670 .LVL2896: 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Perform the multiply-accumulates */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* x[0] * y[srcBLen - 1] */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum = __SMLAD(*px++, *py++, sum); 17671 .loc 39 209 0 17672 0054 B6F90020 ldrsh r2, [r6] 17673 .LVL2897: 17674 0058 B1F90050 ldrsh r5, [r1] 17675 .LVL2898: 17676 .LBB1946: 17677 .LBB1947: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 17678 .loc 6 1993 0 17679 .syntax unified 17680 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 17681 005c 22FB0533 smlad r3, r2, r5, r3 17682 @ 0 "" 2 17683 .LVL2899: 17684 .thumb 17685 .syntax unified 17686 .LBE1947: 17687 .LBE1946: 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 17688 .loc 39 205 0 17689 0060 012C cmp r4, #1 17690 0062 0DD0 beq .L1263 17691 .LVL2900: 17692 .loc 39 209 0 ARM GAS /tmp/ccJrAs6S.s page 712 17693 0064 B6F90220 ldrsh r2, [r6, #2] 17694 .LVL2901: 17695 0068 B1F90250 ldrsh r5, [r1, #2] 17696 .LVL2902: 17697 .LBB1950: 17698 .LBB1948: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 17699 .loc 6 1993 0 17700 .syntax unified 17701 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 17702 006c 22FB0533 smlad r3, r2, r5, r3 17703 @ 0 "" 2 17704 .LVL2903: 17705 .thumb 17706 .syntax unified 17707 .LBE1948: 17708 .LBE1950: 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 17709 .loc 39 205 0 17710 0070 022C cmp r4, #2 17711 0072 05D0 beq .L1263 17712 .LVL2904: 17713 .loc 39 209 0 17714 0074 B6F90420 ldrsh r2, [r6, #4] 17715 .LVL2905: 17716 0078 B1F90410 ldrsh r1, [r1, #4] 17717 .LVL2906: 17718 .LBB1951: 17719 .LBB1949: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 17720 .loc 6 1993 0 17721 .syntax unified 17722 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 17723 007c 22FB0133 smlad r3, r2, r1, r3 17724 @ 0 "" 2 17725 .LVL2907: 17726 .thumb 17727 .syntax unified 17728 .L1263: 17729 .LBE1949: 17730 .LBE1951: 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement the loop counter */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k--; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** *pOut = (q15_t) (sum >> 15); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += inc; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** py = pSrc1 - count; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = pIn1; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Increment MAC count */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** count++; ARM GAS /tmp/ccJrAs6S.s page 713 17731 .loc 39 225 0 17732 0080 451C adds r5, r0, #1 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 17733 .loc 39 216 0 17734 0082 DB13 asrs r3, r3, #15 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 17735 .loc 39 180 0 17736 0084 A945 cmp r9, r5 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 17737 .loc 39 216 0 17738 0086 AEF80030 strh r3, [lr] @ movhi 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = pIn1; 17739 .loc 39 221 0 17740 008a 6146 mov r1, ip 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 17741 .loc 39 218 0 17742 008c DE44 add lr, lr, fp 17743 .LVL2908: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 17744 .loc 39 180 0 17745 008e 1AD0 beq .L1337 17746 .LVL2909: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 17747 .loc 39 190 0 17748 0090 AF08 lsrs r7, r5, #2 17749 .LVL2910: 17750 0092 00F00082 beq .L1293 17751 0096 FF00 lsls r7, r7, #3 17752 .LVL2911: 17753 0098 08EB0706 add r6, r8, r7 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = pIn1; 17754 .loc 39 221 0 17755 009c 6446 mov r4, ip 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 17756 .loc 39 190 0 17757 009e 4046 mov r0, r8 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 17758 .loc 39 183 0 17759 00a0 0023 movs r3, #0 17760 .LVL2912: 17761 .L1262: 17762 .LBB1952: 17763 .LBB1953: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 17764 .loc 3 928 0 17765 00a2 0268 ldr r2, [r0] @ unaligned 17766 .LBE1953: 17767 .LBE1952: 17768 .LBB1954: 17769 .LBB1955: 17770 00a4 2168 ldr r1, [r4] @ unaligned 17771 .LBE1955: 17772 .LBE1954: 17773 .LBB1956: 17774 .LBB1957: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 17775 .loc 6 1993 0 ARM GAS /tmp/ccJrAs6S.s page 714 17776 .syntax unified 17777 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 17778 00a6 22FB0133 smlad r3, r2, r1, r3 17779 @ 0 "" 2 17780 .LVL2913: 17781 .thumb 17782 .syntax unified 17783 .LBE1957: 17784 .LBE1956: 17785 .LBB1958: 17786 .LBB1959: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 17787 .loc 3 928 0 17788 00aa 4268 ldr r2, [r0, #4] @ unaligned 17789 .LVL2914: 17790 .LBE1959: 17791 .LBE1958: 17792 .LBB1960: 17793 .LBB1961: 17794 00ac 6168 ldr r1, [r4, #4] @ unaligned 17795 00ae 0830 adds r0, r0, #8 17796 .LVL2915: 17797 00b0 0834 adds r4, r4, #8 17798 .LVL2916: 17799 .LBE1961: 17800 .LBE1960: 17801 .LBB1962: 17802 .LBB1963: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 17803 .loc 6 1993 0 17804 .syntax unified 17805 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 17806 00b2 22FB0133 smlad r3, r2, r1, r3 17807 @ 0 "" 2 17808 .LVL2917: 17809 .thumb 17810 .syntax unified 17811 .LBE1963: 17812 .LBE1962: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 17813 .loc 39 190 0 17814 00b6 B042 cmp r0, r6 17815 00b8 F3D1 bne .L1262 17816 00ba 0CEB0701 add r1, ip, r7 17817 .LVL2918: 17818 .L1261: 17819 00be ACF1020C sub ip, ip, #2 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 17820 .loc 39 183 0 17821 00c2 2846 mov r0, r5 17822 00c4 C3E7 b .L1260 17823 .LVL2919: 17824 .L1337: 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement loop counter */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** blockSize1--; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } ARM GAS /tmp/ccJrAs6S.s page 715 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* -------------------------- 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Initializations of stage2 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * ------------------------*/ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * .... 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Working pointer of inputA */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = pIn1; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Working pointer of inputB */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** py = pIn2; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* count is the index by which the pointer pIn1 to be incremented */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** count = 0U; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* -------------------- 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Stage2 process 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * -------------------*/ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * So, to loop unroll over blockSize2, 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * srcBLen should be greater than or equal to 4 */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** if (srcBLen >= 4U) 17825 .loc 39 257 0 17826 00c6 029B ldr r3, [sp, #8] 17827 00c8 DDF80090 ldr r9, [sp] 17828 .LVL2920: 17829 00cc 032B cmp r3, #3 17830 00ce 0BFB0099 mla r9, fp, r0, r9 17831 .LVL2921: 17832 00d2 40F23981 bls .L1259 17833 .LVL2922: 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Loop unroll over blockSize2, by 4 */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** blkCnt = blockSize2 >> 2U; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** while (blkCnt > 0U) 17834 .loc 39 262 0 17835 00d6 069B ldr r3, [sp, #24] 17836 00d8 9908 lsrs r1, r3, #2 17837 .LVL2923: 17838 00da 0C91 str r1, [sp, #48] 17839 00dc 00F0A681 beq .L1295 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Set all accumulators to zero */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc0 = 0; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc1 = 0; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc2 = 0; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc3 = 0; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* read x[0], x[1] samples */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** x0 = read_q15x2 ((q15_t *) px); ARM GAS /tmp/ccJrAs6S.s page 716 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* read x[1], x[2] samples */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** x1 = read_q15x2 ((q15_t *) px + 1); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px += 2U; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k = srcBLen >> 2U; 17840 .loc 39 277 0 17841 00e0 0298 ldr r0, [sp, #8] 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 17842 .loc 39 242 0 17843 00e2 DDF80480 ldr r8, [sp, #4] 17844 .LVL2924: 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 17845 .loc 39 218 0 17846 00e6 CDF814A0 str r10, [sp, #20] 17847 .loc 39 277 0 17848 00ea 8308 lsrs r3, r0, #2 17849 00ec 0793 str r3, [sp, #28] 17850 00ee DB00 lsls r3, r3, #3 17851 00f0 A3F10802 sub r2, r3, #8 17852 00f4 5244 add r2, r10, r2 17853 00f6 0392 str r2, [sp, #12] 17854 00f8 1A1D adds r2, r3, #4 17855 00fa 043B subs r3, r3, #4 17856 00fc 0993 str r3, [sp, #36] 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** do 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read the first two inputB samples using SIMD: 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * y[0] and y[1] */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** c0 = read_q15x2_ia ((q15_t **) &py); 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* acc0 += x[0] * y[0] + x[1] * y[1] */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc0 = __SMLAD(x0, c0, acc0); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* acc1 += x[1] * y[0] + x[2] * y[1] */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc1 = __SMLAD(x1, c0, acc1); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read x[2], x[3] */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** x2 = read_q15x2 ((q15_t *) px); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read x[3], x[4] */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px + 1); 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* acc2 += x[2] * y[0] + x[3] * y[1] */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc2 = __SMLAD(x2, c0, acc2); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* acc3 += x[3] * y[0] + x[4] * y[1] */ 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc3 = __SMLAD(x3, c0, acc3); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read y[2] and y[3] */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** c0 = read_q15x2_ia ((q15_t **) &py); 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* acc0 += x[2] * y[2] + x[3] * y[3] */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc0 = __SMLAD(x2, c0, acc0); ARM GAS /tmp/ccJrAs6S.s page 717 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* acc1 += x[3] * y[2] + x[4] * y[3] */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc1 = __SMLAD(x3, c0, acc1); 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read x[4], x[5] */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** x0 = read_q15x2 ((q15_t *) px + 2); 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read x[5], x[6] */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** x1 = read_q15x2 ((q15_t *) px + 3); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px += 4U; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* acc2 += x[4] * y[2] + x[5] * y[3] */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc2 = __SMLAD(x0, c0, acc2); 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* acc3 += x[5] * y[2] + x[6] * y[3] */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc3 = __SMLAD(x1, c0, acc3); 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } while (--k); 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* For the next MAC operations, SIMD is not used 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * So, the 16 bit pointer if inputB, py is updated */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** ** No loop unrolling is used. */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k = srcBLen % 0x4U; 17857 .loc 39 334 0 17858 00fe 00F00303 and r3, r0, #3 17859 0102 0093 str r3, [sp] 17860 0104 0BEB4B03 add r3, fp, fp, lsl #1 17861 0108 0893 str r3, [sp, #32] 17862 010a 4FEA8B03 lsl r3, fp, #2 17863 010e 0A92 str r2, [sp, #40] 17864 0110 0493 str r3, [sp, #16] 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 17865 .loc 39 218 0 17866 0112 CDF83490 str r9, [sp, #52] 17867 0116 8A46 mov r10, r1 17868 .LVL2925: 17869 .L1282: 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 17870 .loc 39 268 0 17871 0118 0023 movs r3, #0 17872 .LBB1964: 17873 .LBB1965: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 17874 .loc 3 909 0 17875 011a D8F80060 ldr r6, [r8] @ unaligned 17876 .LVL2926: 17877 .LBE1965: 17878 .LBE1964: 17879 .LBB1966: 17880 .LBB1967: 17881 011e D8F80240 ldr r4, [r8, #2] @ unaligned 17882 .LVL2927: 17883 0122 DDF814C0 ldr ip, [sp, #20] 17884 .LBE1967: 17885 .LBE1966: ARM GAS /tmp/ccJrAs6S.s page 718 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 17886 .loc 39 277 0 17887 0126 DDF81CE0 ldr lr, [sp, #28] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc3 = 0; 17888 .loc 39 267 0 17889 012a 1F46 mov r7, r3 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc2 = 0; 17890 .loc 39 266 0 17891 012c 1846 mov r0, r3 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc1 = 0; 17892 .loc 39 265 0 17893 012e 1D46 mov r5, r3 17894 0130 08F10401 add r1, r8, #4 17895 .LVL2928: 17896 .L1278: 17897 .LBB1968: 17898 .LBB1969: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 17899 .loc 3 928 0 discriminator 1 17900 0134 DCF80020 ldr r2, [ip] @ unaligned 17901 .LVL2929: 17902 .LBE1969: 17903 .LBE1968: 17904 .LBB1970: 17905 .LBB1971: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 17906 .loc 6 1993 0 discriminator 1 17907 .syntax unified 17908 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 17909 0138 26FB0255 smlad r5, r6, r2, r5 17910 @ 0 "" 2 17911 .LVL2930: 17912 .thumb 17913 .syntax unified 17914 .LBE1971: 17915 .LBE1970: 17916 .LBB1972: 17917 .LBB1973: 17918 .syntax unified 17919 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 17920 013c 24FB0200 smlad r0, r4, r2, r0 17921 @ 0 "" 2 17922 .LVL2931: 17923 .thumb 17924 .syntax unified 17925 .LBE1973: 17926 .LBE1972: 17927 .LBB1974: 17928 .LBB1975: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 17929 .loc 3 909 0 discriminator 1 17930 0140 0C68 ldr r4, [r1] @ unaligned 17931 .LVL2932: 17932 .LBE1975: 17933 .LBE1974: 17934 .LBB1976: 17935 .LBB1977: ARM GAS /tmp/ccJrAs6S.s page 719 17936 0142 D1F80260 ldr r6, [r1, #2] @ unaligned 17937 .LVL2933: 17938 .LBE1977: 17939 .LBE1976: 17940 .LBB1978: 17941 .LBB1979: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 17942 .loc 6 1993 0 discriminator 1 17943 .syntax unified 17944 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 17945 0146 24FB0277 smlad r7, r4, r2, r7 17946 @ 0 "" 2 17947 .LVL2934: 17948 .thumb 17949 .syntax unified 17950 .LBE1979: 17951 .LBE1978: 17952 .LBB1980: 17953 .LBB1981: 17954 .syntax unified 17955 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 17956 014a 26FB0233 smlad r3, r6, r2, r3 17957 @ 0 "" 2 17958 .LVL2935: 17959 .thumb 17960 .syntax unified 17961 .LBE1981: 17962 .LBE1980: 17963 .LBB1982: 17964 .LBB1983: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 17965 .loc 3 928 0 discriminator 1 17966 014e DCF80420 ldr r2, [ip, #4] @ unaligned 17967 .LVL2936: 17968 0152 0CF1080C add ip, ip, #8 17969 .LVL2937: 17970 .LBE1983: 17971 .LBE1982: 17972 .LBB1984: 17973 .LBB1985: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 17974 .loc 6 1993 0 discriminator 1 17975 .syntax unified 17976 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 17977 0156 24FB0255 smlad r5, r4, r2, r5 17978 @ 0 "" 2 17979 .LVL2938: 17980 .thumb 17981 .syntax unified 17982 .LBE1985: 17983 .LBE1984: 17984 .LBB1986: 17985 .LBB1987: 17986 .syntax unified 17987 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 17988 015a 26FB0200 smlad r0, r6, r2, r0 17989 @ 0 "" 2 ARM GAS /tmp/ccJrAs6S.s page 720 17990 .LVL2939: 17991 .thumb 17992 .syntax unified 17993 .LBE1987: 17994 .LBE1986: 17995 .LBB1988: 17996 .LBB1989: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 17997 .loc 3 909 0 discriminator 1 17998 015e 4E68 ldr r6, [r1, #4] @ unaligned 17999 .LVL2940: 18000 .LBE1989: 18001 .LBE1988: 18002 .LBB1990: 18003 .LBB1991: 18004 0160 D1F80640 ldr r4, [r1, #6] @ unaligned 18005 .LVL2941: 18006 .LBE1991: 18007 .LBE1990: 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18008 .loc 39 319 0 discriminator 1 18009 0164 0831 adds r1, r1, #8 18010 .LVL2942: 18011 .LBB1992: 18012 .LBB1993: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18013 .loc 6 1993 0 discriminator 1 18014 .syntax unified 18015 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18016 0166 26FB0277 smlad r7, r6, r2, r7 18017 @ 0 "" 2 18018 .LVL2943: 18019 .thumb 18020 .syntax unified 18021 .LBE1993: 18022 .LBE1992: 18023 .LBB1994: 18024 .LBB1995: 18025 .syntax unified 18026 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18027 016a 24FB0233 smlad r3, r4, r2, r3 18028 @ 0 "" 2 18029 .LVL2944: 18030 .thumb 18031 .syntax unified 18032 .LBE1995: 18033 .LBE1994: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18034 .loc 39 327 0 discriminator 1 18035 016e BEF1010E subs lr, lr, #1 18036 .LVL2945: 18037 0172 DFD1 bne .L1278 18038 0174 0999 ldr r1, [sp, #36] 18039 .LVL2946: 18040 0176 0A9A ldr r2, [sp, #40] 18041 0178 08EB010C add ip, r8, r1 18042 .LVL2947: ARM GAS /tmp/ccJrAs6S.s page 721 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** if (k == 1U) 18043 .loc 39 336 0 18044 017c 0099 ldr r1, [sp] 18045 017e 0129 cmp r1, #1 18046 0180 4244 add r2, r8, r2 18047 0182 00F02681 beq .L1338 18048 .LVL2948: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read y[4] */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** c0 = *py; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** c0 = c0 << 16U; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** #else 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** c0 = c0 & 0x0000FFFF; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read x[7] */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px++; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Perform the multiply-accumulates */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc0 = __SMLAD (x0, c0, acc0); 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc1 = __SMLAD (x1, c0, acc1); 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc2 = __SMLADX(x1, c0, acc2); 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc3 = __SMLADX(x3, c0, acc3); 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** if (k == 2U) 18049 .loc 39 358 0 18050 0186 0229 cmp r1, #2 18051 0188 40F03281 bne .L1281 18052 .LVL2949: 18053 .LBB1996: 18054 .LBB1997: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18055 .loc 3 909 0 18056 018c 0399 ldr r1, [sp, #12] 18057 018e 8968 ldr r1, [r1, #8] @ unaligned 18058 .LVL2950: 18059 .LBE1997: 18060 .LBE1996: 18061 .LBB1998: 18062 .LBB1999: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18063 .loc 6 1993 0 18064 .syntax unified 18065 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18066 0190 26FB0155 smlad r5, r6, r1, r5 18067 @ 0 "" 2 18068 .LVL2951: 18069 .thumb 18070 .syntax unified 18071 .LBE1999: 18072 .LBE1998: 18073 .LBB2000: ARM GAS /tmp/ccJrAs6S.s page 722 18074 .LBB2001: 18075 .syntax unified 18076 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18077 0194 24FB0100 smlad r0, r4, r1, r0 18078 @ 0 "" 2 18079 .LVL2952: 18080 .thumb 18081 .syntax unified 18082 .LBE2001: 18083 .LBE2000: 18084 .LBB2002: 18085 .LBB2003: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18086 .loc 3 909 0 18087 0198 1468 ldr r4, [r2] @ unaligned 18088 .LBE2003: 18089 .LBE2002: 18090 .LBB2004: 18091 .LBB2005: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18092 .loc 6 1993 0 18093 .syntax unified 18094 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18095 019a 24FB0177 smlad r7, r4, r1, r7 18096 @ 0 "" 2 18097 .LVL2953: 18098 .thumb 18099 .syntax unified 18100 .LBE2005: 18101 .LBE2004: 18102 .LBB2006: 18103 .LBB2007: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18104 .loc 3 909 0 18105 019e D2F80220 ldr r2, [r2, #2] @ unaligned 18106 .LVL2954: 18107 .LBE2007: 18108 .LBE2006: 18109 .LBB2008: 18110 .LBB2009: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18111 .loc 6 1993 0 18112 .syntax unified 18113 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18114 01a2 22FB0133 smlad r3, r2, r1, r3 18115 @ 0 "" 2 18116 .LVL2955: 18117 .thumb 18118 .syntax unified 18119 .L1280: 18120 .LBE2009: 18121 .LBE2008: 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read y[4], y[5] */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** c0 = read_q15x2 ((q15_t *) py); 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read x[7], x[8] */ ARM GAS /tmp/ccJrAs6S.s page 723 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px); 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read x[9] */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** x2 = read_q15x2 ((q15_t *) px + 1); 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px += 2U; 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Perform the multiply-accumulates */ 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc0 = __SMLAD(x0, c0, acc0); 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc1 = __SMLAD(x1, c0, acc1); 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc2 = __SMLAD(x3, c0, acc2); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc3 = __SMLAD(x2, c0, acc3); 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** if (k == 3U) 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read y[4], y[5] */ 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** c0 = read_q15x2_ia ((q15_t **) &py); 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read x[7], x[8] */ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read x[9] */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** x2 = read_q15x2 ((q15_t *) px + 1); 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Perform the multiply-accumulates */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc0 = __SMLAD(x0, c0, acc0); 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc1 = __SMLAD(x1, c0, acc1); 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc2 = __SMLAD(x3, c0, acc2); 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc3 = __SMLAD(x2, c0, acc3); 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** c0 = (*py); 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read y[6] */ 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** c0 = c0 << 16U; 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** #else 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** c0 = c0 & 0x0000FFFF; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read x[10] */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** x3 = read_q15x2 ((q15_t *) px + 2); 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px += 3U; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Perform the multiply-accumulates */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc0 = __SMLADX(x1, c0, acc0); 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc1 = __SMLAD (x2, c0, acc1); 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc2 = __SMLADX(x2, c0, acc2); 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** acc3 = __SMLADX(x3, c0, acc3); 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** *pOut = (q15_t) (acc0 >> 15); 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += inc; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** *pOut = (q15_t) (acc1 >> 15); 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += inc; 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 724 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** *pOut = (q15_t) (acc2 >> 15); 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += inc; 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** *pOut = (q15_t) (acc3 >> 15); 18122 .loc 39 424 0 18123 01a6 089A ldr r2, [sp, #32] 18124 01a8 DB13 asrs r3, r3, #15 18125 .LVL2956: 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 18126 .loc 39 414 0 18127 01aa ED13 asrs r5, r5, #15 18128 .LVL2957: 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += inc; 18129 .loc 39 418 0 18130 01ac C013 asrs r0, r0, #15 18131 .LVL2958: 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += inc; 18132 .loc 39 421 0 18133 01ae FF13 asrs r7, r7, #15 18134 .LVL2959: 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 18135 .loc 39 414 0 18136 01b0 A9F80050 strh r5, [r9] @ movhi 18137 .LVL2960: 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += inc; 18138 .loc 39 418 0 18139 01b4 29F80B00 strh r0, [r9, fp] @ movhi 18140 .LVL2961: 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += inc; 18141 .loc 39 421 0 18142 01b8 29F81B70 strh r7, [r9, fp, lsl #1] @ movhi 18143 .LVL2962: 18144 .loc 39 424 0 18145 01bc 29F80230 strh r3, [r9, r2] @ movhi 18146 01c0 049B ldr r3, [sp, #16] 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18147 .loc 39 262 0 18148 01c2 BAF1010A subs r10, r10, #1 18149 .LVL2963: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += inc; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Increment the pointer pIn1 index, count by 4 */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** count += 4U; 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = pIn1 + count; 18150 .loc 39 431 0 18151 01c6 08F10808 add r8, r8, #8 18152 01ca 9944 add r9, r9, r3 18153 .LVL2964: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18154 .loc 39 262 0 18155 01cc A4D1 bne .L1282 18156 01ce 1946 mov r1, r3 18157 01d0 DDF83490 ldr r9, [sp, #52] 18158 .LVL2965: 18159 01d4 0C9B ldr r3, [sp, #48] ARM GAS /tmp/ccJrAs6S.s page 725 18160 01d6 DDF814A0 ldr r10, [sp, #20] 18161 01da 01FB0399 mla r9, r1, r3, r9 18162 01de 0199 ldr r1, [sp, #4] 18163 01e0 1A46 mov r2, r3 18164 01e2 01EBC206 add r6, r1, r2, lsl #3 18165 01e6 9B00 lsls r3, r3, #2 18166 .LVL2966: 18167 .L1277: 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** py = pIn2; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement loop counter */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** blkCnt--; 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** ** No loop unrolling is used. */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** blkCnt = blockSize2 % 0x4U; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** while (blkCnt > 0U) 18168 .loc 39 442 0 18169 01e8 069A ldr r2, [sp, #24] 18170 01ea 12F00301 ands r1, r2, #3 18171 .LVL2967: 18172 01ee 0491 str r1, [sp, #16] 18173 01f0 68D0 beq .L1268 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Accumulator is made zero for every iteration */ 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum = 0; 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k = srcBLen >> 2U; 18174 .loc 39 448 0 18175 01f2 029C ldr r4, [sp, #8] 18176 01f4 CDF81490 str r9, [sp, #20] 18177 01f8 A008 lsrs r0, r4, #2 18178 01fa 00F10052 add r2, r0, #536870912 18179 01fe 013A subs r2, r2, #1 18180 0200 D500 lsls r5, r2, #3 18181 0202 019A ldr r2, [sp, #4] 18182 0204 CDF81CA0 str r10, [sp, #28] 18183 0208 5F1C adds r7, r3, #1 18184 020a 0232 adds r2, r2, #2 18185 020c 0B44 add r3, r3, r1 18186 .LVL2968: 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** while (k > 0U) 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Perform the multiply-accumulates */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement loop counter */ 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k--; ARM GAS /tmp/ccJrAs6S.s page 726 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** ** No loop unrolling is used. */ 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k = srcBLen % 0x4U; 18187 .loc 39 466 0 18188 020e 04F00301 and r1, r4, #3 18189 .LVL2969: 18190 0212 019C ldr r4, [sp, #4] 18191 0214 0295 str r5, [sp, #8] 18192 0216 02EB4303 add r3, r2, r3, lsl #1 18193 021a 0AF10802 add r2, r10, #8 18194 021e 0AEB050C add ip, r10, r5 18195 0222 CE46 mov lr, r9 18196 0224 04EB4707 add r7, r4, r7, lsl #1 18197 .LVL2970: 18198 0228 0392 str r2, [sp, #12] 18199 022a 8146 mov r9, r0 18200 .LVL2971: 18201 022c 9A46 mov r10, r3 18202 .LVL2972: 18203 .L1285: 18204 022e 039C ldr r4, [sp, #12] 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18205 .loc 39 445 0 18206 0230 0091 str r1, [sp] 18207 0232 06F10805 add r5, r6, #8 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18208 .loc 39 448 0 18209 0236 C846 mov r8, r9 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18210 .loc 39 445 0 18211 0238 0023 movs r3, #0 18212 .LVL2973: 18213 .L1283: 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); 18214 .loc 39 455 0 18215 023a 35F8082C ldrh r2, [r5, #-8] 18216 023e 34F8080C ldrh r0, [r4, #-8] 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); 18217 .loc 39 456 0 18218 0242 34F8061C ldrh r1, [r4, #-6] 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); 18219 .loc 39 455 0 18220 0246 12FB0033 smlabb r3, r2, r0, r3 18221 .LVL2974: 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); 18222 .loc 39 456 0 18223 024a 35F8062C ldrh r2, [r5, #-6] 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); 18224 .loc 39 457 0 18225 024e 34F8040C ldrh r0, [r4, #-4] 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); 18226 .loc 39 456 0 18227 0252 12FB0133 smlabb r3, r2, r1, r3 18228 .LVL2975: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); ARM GAS /tmp/ccJrAs6S.s page 727 18229 .loc 39 457 0 18230 0256 35F8041C ldrh r1, [r5, #-4] 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18231 .loc 39 458 0 18232 025a 35F8022C ldrh r2, [r5, #-2] 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); 18233 .loc 39 457 0 18234 025e 11FB0033 smlabb r3, r1, r0, r3 18235 .LVL2976: 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18236 .loc 39 458 0 18237 0262 34F8021C ldrh r1, [r4, #-2] 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18238 .loc 39 452 0 18239 0266 B8F10108 subs r8, r8, #1 18240 .LVL2977: 18241 026a 05F10805 add r5, r5, #8 18242 .LVL2978: 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18243 .loc 39 458 0 18244 026e 12FB0133 smlabb r3, r2, r1, r3 18245 .LVL2979: 18246 0272 04F10804 add r4, r4, #8 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18247 .loc 39 452 0 18248 0276 E0D1 bne .L1283 18249 0278 029A ldr r2, [sp, #8] 18250 027a 0099 ldr r1, [sp] 18251 027c 1644 add r6, r6, r2 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** while (k > 0U) 18252 .loc 39 468 0 18253 027e 91B1 cbz r1, .L1284 18254 .LVL2980: 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Perform the multiply-accumulates */ 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) * px++ * *py++); 18255 .loc 39 471 0 18256 0280 3089 ldrh r0, [r6, #8] 18257 0282 BCF80820 ldrh r2, [ip, #8] 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18258 .loc 39 468 0 18259 0286 0129 cmp r1, #1 18260 .loc 39 471 0 18261 0288 10FB0233 smlabb r3, r0, r2, r3 18262 .LVL2981: 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18263 .loc 39 468 0 18264 028c 0BD0 beq .L1284 18265 .LVL2982: 18266 .loc 39 471 0 18267 028e 7089 ldrh r0, [r6, #10] 18268 0290 BCF80A20 ldrh r2, [ip, #10] 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18269 .loc 39 468 0 18270 0294 0229 cmp r1, #2 18271 .loc 39 471 0 ARM GAS /tmp/ccJrAs6S.s page 728 18272 0296 10FB0233 smlabb r3, r0, r2, r3 18273 .LVL2983: 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18274 .loc 39 468 0 18275 029a 04D0 beq .L1284 18276 .LVL2984: 18277 .loc 39 471 0 18278 029c B089 ldrh r0, [r6, #12] 18279 029e BCF80C20 ldrh r2, [ip, #12] 18280 02a2 10FB0233 smlabb r3, r0, r2, r3 18281 .LVL2985: 18282 .L1284: 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement loop counter */ 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k--; 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** *pOut = (q15_t) (sum >> 15); 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += inc; 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Increment the pointer pIn1 index, count by 1 */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** count++; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = pIn1 + count; 18283 .loc 39 486 0 18284 02a6 3E46 mov r6, r7 18285 02a8 0237 adds r7, r7, #2 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 18286 .loc 39 478 0 18287 02aa DB13 asrs r3, r3, #15 18288 .LVL2986: 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18289 .loc 39 442 0 18290 02ac BA45 cmp r10, r7 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 18291 .loc 39 478 0 18292 02ae AEF80030 strh r3, [lr] @ movhi 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18293 .loc 39 480 0 18294 02b2 DE44 add lr, lr, fp 18295 .LVL2987: 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18296 .loc 39 442 0 18297 02b4 BBD1 bne .L1285 18298 02b6 DDF81490 ldr r9, [sp, #20] 18299 02ba 049B ldr r3, [sp, #16] 18300 02bc DDF81CA0 ldr r10, [sp, #28] 18301 02c0 0BFB0399 mla r9, fp, r3, r9 18302 .LVL2988: 18303 .L1268: 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** py = pIn2; 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement loop counter */ 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** blkCnt--; ARM GAS /tmp/ccJrAs6S.s page 729 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** else 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* If the srcBLen is not a multiple of 4, 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * the blockSize2 loop cannot be unrolled by 4 */ 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** blkCnt = blockSize2; 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** while (blkCnt > 0U) 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Accumulator is made zero for every iteration */ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum = 0; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* srcBLen number of MACS should be performed */ 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k = srcBLen; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** while (k > 0U) 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Perform the multiply-accumulate */ 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum += ((q31_t) *px++ * *py++); 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement loop counter */ 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k--; 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** *pOut = (q15_t) (sum >> 15); 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += inc; 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Increment MAC count */ 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** count++; 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = pIn1 + count; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** py = pIn2; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement loop counter */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** blkCnt--; 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* -------------------------- 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Initializations of stage3 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * -------------------------*/ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLe 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLe 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * .... 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * sum += x[srcALen-1] * y[0] 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** */ 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** The count variable holds the number of MAC operations performed */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** count = srcBLen - 1U; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 730 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Working pointer of inputA */ 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); 18304 .loc 39 549 0 18305 02c4 019B ldr r3, [sp, #4] 18306 02c6 069A ldr r2, [sp, #24] 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = pSrc1; 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Working pointer of inputB */ 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** py = pIn2; 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* ------------------- 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * Stage3 process 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** * ------------------*/ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** while (blockSize3 > 0U) 18307 .loc 39 559 0 18308 02c8 0B9F ldr r7, [sp, #44] 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = pSrc1; 18309 .loc 39 549 0 18310 02ca 03EB4203 add r3, r3, r2, lsl #1 18311 .LVL2989: 18312 .loc 39 559 0 18313 02ce C7B3 cbz r7, .L1256 18314 .LVL2990: 18315 .L1291: 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Accumulator is made zero for every iteration */ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum = 0; 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k = count >> 2U; 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** while (k > 0U) 18316 .loc 39 569 0 18317 02d0 5FEA970C lsrs ip, r7, #2 18318 .LVL2991: 18319 02d4 67D0 beq .L1296 18320 .L1339: 18321 02d6 5446 mov r4, r10 18322 02d8 1846 mov r0, r3 18323 02da 6546 mov r5, ip 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18324 .loc 39 562 0 18325 02dc 0022 movs r2, #0 18326 .LVL2992: 18327 .L1287: 18328 .LBB2010: 18329 .LBB2011: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18330 .loc 3 928 0 18331 02de 0168 ldr r1, [r0] @ unaligned 18332 .LBE2011: 18333 .LBE2010: 18334 .LBB2012: 18335 .LBB2013: ARM GAS /tmp/ccJrAs6S.s page 731 18336 02e0 2668 ldr r6, [r4] @ unaligned 18337 .LBE2013: 18338 .LBE2012: 18339 .LBB2014: 18340 .LBB2015: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18341 .loc 6 1993 0 18342 .syntax unified 18343 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18344 02e2 21FB0622 smlad r2, r1, r6, r2 18345 @ 0 "" 2 18346 .LVL2993: 18347 .thumb 18348 .syntax unified 18349 .LBE2015: 18350 .LBE2014: 18351 .LBB2016: 18352 .LBB2017: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18353 .loc 3 928 0 18354 02e6 4168 ldr r1, [r0, #4] @ unaligned 18355 .LVL2994: 18356 .LBE2017: 18357 .LBE2016: 18358 .LBB2018: 18359 .LBB2019: 18360 02e8 6668 ldr r6, [r4, #4] @ unaligned 18361 02ea 0830 adds r0, r0, #8 18362 .LVL2995: 18363 02ec 0834 adds r4, r4, #8 18364 .LVL2996: 18365 .LBE2019: 18366 .LBE2018: 18367 .LBB2020: 18368 .LBB2021: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18369 .loc 6 1993 0 18370 .syntax unified 18371 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18372 02ee 21FB0622 smlad r2, r1, r6, r2 18373 @ 0 "" 2 18374 .LVL2997: 18375 .thumb 18376 .syntax unified 18377 .LBE2021: 18378 .LBE2020: 18379 .loc 39 569 0 18380 02f2 013D subs r5, r5, #1 18381 .LVL2998: 18382 02f4 F3D1 bne .L1287 18383 02f6 4FEACC0C lsl ip, ip, #3 18384 02fa 03EB0C00 add r0, r3, ip 18385 .LVL2999: 18386 02fe D444 add ip, ip, r10 18387 .LVL3000: 18388 .L1286: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 732 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Perform the multiply-accumulates */ 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */ 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement loop counter */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k--; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** ** No loop unrolling is used. */ 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k = count % 0x4U; 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** while (k > 0U) 18389 .loc 39 585 0 18390 0300 17F00304 ands r4, r7, #3 18391 .LVL3001: 18392 0304 15D0 beq .L1288 18393 .LVL3002: 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Perform the multiply-accumulates */ 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** sum = __SMLAD(*px++, *py++, sum); 18394 .loc 39 588 0 18395 0306 B0F90010 ldrsh r1, [r0] 18396 .LVL3003: 18397 030a BCF90050 ldrsh r5, [ip] 18398 .LVL3004: 18399 .LBB2022: 18400 .LBB2023: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18401 .loc 6 1993 0 18402 .syntax unified 18403 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18404 030e 21FB0522 smlad r2, r1, r5, r2 18405 @ 0 "" 2 18406 .LVL3005: 18407 .thumb 18408 .syntax unified 18409 .LBE2023: 18410 .LBE2022: 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18411 .loc 39 585 0 18412 0312 012C cmp r4, #1 18413 0314 0DD0 beq .L1288 18414 .LVL3006: 18415 .loc 39 588 0 18416 0316 B0F90210 ldrsh r1, [r0, #2] 18417 .LVL3007: 18418 031a BCF90250 ldrsh r5, [ip, #2] 18419 .LVL3008: 18420 .LBB2026: 18421 .LBB2024: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18422 .loc 6 1993 0 18423 .syntax unified 18424 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccJrAs6S.s page 733 18425 031e 21FB0522 smlad r2, r1, r5, r2 18426 @ 0 "" 2 18427 .LVL3009: 18428 .thumb 18429 .syntax unified 18430 .LBE2024: 18431 .LBE2026: 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18432 .loc 39 585 0 18433 0322 022C cmp r4, #2 18434 0324 05D0 beq .L1288 18435 .LVL3010: 18436 .loc 39 588 0 18437 0326 B0F90410 ldrsh r1, [r0, #4] 18438 .LVL3011: 18439 032a BCF90400 ldrsh r0, [ip, #4] 18440 .LVL3012: 18441 .LBB2027: 18442 .LBB2025: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18443 .loc 6 1993 0 18444 .syntax unified 18445 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18446 032e 21FB0022 smlad r2, r1, r0, r2 18447 @ 0 "" 2 18448 .LVL3013: 18449 .thumb 18450 .syntax unified 18451 .L1288: 18452 .LBE2025: 18453 .LBE2027: 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement loop counter */ 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** k--; 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** *pOut = (q15_t) (sum >> 15); 18454 .loc 39 595 0 18455 0332 D213 asrs r2, r2, #15 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18456 .loc 39 559 0 18457 0334 013F subs r7, r7, #1 18458 .LVL3014: 18459 .loc 39 595 0 18460 0336 A9F80020 strh r2, [r9] @ movhi 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** pOut += inc; 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = ++pSrc1; 18461 .loc 39 600 0 18462 033a 03F10203 add r3, r3, #2 18463 .LVL3015: 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18464 .loc 39 597 0 18465 033e D944 add r9, r9, fp ARM GAS /tmp/ccJrAs6S.s page 734 18466 .LVL3016: 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18467 .loc 39 559 0 18468 0340 C6D1 bne .L1291 18469 .LVL3017: 18470 .L1256: 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** py = pIn2; 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement the MAC count */ 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** count--; 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Decrement the loop counter */ 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** blockSize3--; 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** } 18471 .loc 39 610 0 18472 0342 0FB0 add sp, sp, #60 18473 .LCFI109: 18474 .cfi_remember_state 18475 .cfi_def_cfa_offset 36 18476 @ sp needed 18477 0344 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 18478 .LVL3018: 18479 .L1259: 18480 .LCFI110: 18481 .cfi_restore_state 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18482 .loc 39 499 0 18483 0348 069B ldr r3, [sp, #24] 18484 034a 002B cmp r3, #0 18485 034c BAD0 beq .L1268 18486 034e 029A ldr r2, [sp, #8] 18487 0350 002A cmp r2, #0 18488 0352 7FD0 beq .L1294 18489 0354 022A cmp r2, #2 18490 0356 00F08980 beq .L1270 18491 035a 0B9A ldr r2, [sp, #44] 18492 035c 002A cmp r2, #0 18493 035e 68D0 beq .L1271 18494 0360 019D ldr r5, [sp, #4] 18495 0362 5B00 lsls r3, r3, #1 18496 0364 EF18 adds r7, r5, r3 18497 0366 4E46 mov r6, r9 18498 .LVL3019: 18499 .L1272: 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18500 .loc 39 510 0 18501 0368 6888 ldrh r0, [r5, #2] 18502 036a BAF80220 ldrh r2, [r10, #2] 18503 036e 2988 ldrh r1, [r5] 18504 0370 BAF800C0 ldrh ip, [r10] 18505 0374 BAF80440 ldrh r4, [r10, #4] 18506 0378 10FB02F0 smulbb r0, r0, r2 18507 037c AA88 ldrh r2, [r5, #4] 18508 037e 11FB0C01 smlabb r1, r1, ip, r0 18509 .LVL3020: ARM GAS /tmp/ccJrAs6S.s page 735 18510 0382 12FB0412 smlabb r2, r2, r4, r1 18511 0386 0235 adds r5, r5, #2 18512 .LVL3021: 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 18513 .loc 39 517 0 18514 0388 D213 asrs r2, r2, #15 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18515 .loc 39 499 0 18516 038a BD42 cmp r5, r7 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 18517 .loc 39 517 0 18518 038c 3280 strh r2, [r6] @ movhi 18519 .LVL3022: 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18520 .loc 39 519 0 18521 038e 5E44 add r6, r6, fp 18522 .LVL3023: 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18523 .loc 39 499 0 18524 0390 EAD1 bne .L1272 18525 .LVL3024: 18526 .L1336: 18527 0392 069A ldr r2, [sp, #24] 18528 0394 0BFB0299 mla r9, fp, r2, r9 18529 .L1276: 18530 .LVL3025: 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = pSrc1; 18531 .loc 39 549 0 18532 0398 019A ldr r2, [sp, #4] 18533 039a 0B9F ldr r7, [sp, #44] 18534 039c 1A44 add r2, r2, r3 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18535 .loc 39 569 0 18536 039e 5FEA970C lsrs ip, r7, #2 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** px = pSrc1; 18537 .loc 39 549 0 18538 03a2 1346 mov r3, r2 18539 .LVL3026: 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18540 .loc 39 569 0 18541 03a4 97D1 bne .L1339 18542 .LVL3027: 18543 .L1296: 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18544 .loc 39 562 0 18545 03a6 6246 mov r2, ip 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18546 .loc 39 569 0 18547 03a8 1846 mov r0, r3 18548 03aa D446 mov ip, r10 18549 .LVL3028: 18550 03ac A8E7 b .L1286 18551 .LVL3029: 18552 .L1257: 18553 03ae 1D46 mov r5, r3 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18554 .loc 39 133 0 ARM GAS /tmp/ccJrAs6S.s page 736 18555 03b0 03F10043 add r3, r3, #-2147483648 18556 .LVL3030: 18557 03b4 019C ldr r4, [sp, #4] 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18558 .loc 39 121 0 18559 03b6 CDF804A0 str r10, [sp, #4] 18560 .LVL3031: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18561 .loc 39 133 0 18562 03ba 023B subs r3, r3, #2 18563 03bc 0846 mov r0, r1 18564 .LVL3032: 18565 03be 0B44 add r3, r3, r1 18566 03c0 02EB4309 add r9, r2, r3, lsl #1 18567 .LVL3033: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18568 .loc 39 124 0 18569 03c4 A246 mov r10, r4 18570 .LVL3034: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18571 .loc 39 133 0 18572 03c6 2946 mov r1, r5 18573 .LVL3035: 18574 03c8 6FF0010B mvn fp, #1 18575 03cc 0290 str r0, [sp, #8] 18576 03ce 0246 mov r2, r0 18577 03d0 26E6 b .L1258 18578 .LVL3036: 18579 .L1338: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18580 .loc 39 339 0 18581 03d2 039A ldr r2, [sp, #12] 18582 03d4 B2F90820 ldrsh r2, [r2, #8] 18583 .LVL3037: 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 18584 .loc 39 344 0 18585 03d8 92B2 uxth r2, r2 18586 .LVL3038: 18587 .LBB2028: 18588 .LBB2029: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18589 .loc 6 1993 0 18590 .syntax unified 18591 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18592 03da 26FB0255 smlad r5, r6, r2, r5 18593 @ 0 "" 2 18594 .LVL3039: 18595 .thumb 18596 .syntax unified 18597 .LBE2029: 18598 .LBE2028: 18599 .LBB2030: 18600 .LBB2031: 18601 .syntax unified 18602 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18603 03de 24FB0200 smlad r0, r4, r2, r0 18604 @ 0 "" 2 ARM GAS /tmp/ccJrAs6S.s page 737 18605 .LVL3040: 18606 .thumb 18607 .syntax unified 18608 .LBE2031: 18609 .LBE2030: 18610 .LBB2032: 18611 .LBB2033: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18612 .loc 6 2001 0 18613 .syntax unified 18614 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18615 03e2 24FB1277 smladx r7, r4, r2, r7 18616 @ 0 "" 2 18617 .LVL3041: 18618 .thumb 18619 .syntax unified 18620 .LBE2033: 18621 .LBE2032: 18622 .LBB2034: 18623 .LBB2035: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18624 .loc 3 909 0 18625 03e6 DCF80810 ldr r1, [ip, #8] @ unaligned 18626 .LBE2035: 18627 .LBE2034: 18628 .LBB2036: 18629 .LBB2037: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18630 .loc 6 2001 0 18631 .syntax unified 18632 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18633 03ea 21FB1233 smladx r3, r1, r2, r3 18634 @ 0 "" 2 18635 .LVL3042: 18636 .thumb 18637 .syntax unified 18638 03ee DAE6 b .L1280 18639 .LVL3043: 18640 .L1281: 18641 .LBE2037: 18642 .LBE2036: 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18643 .loc 39 377 0 18644 03f0 0329 cmp r1, #3 18645 03f2 7FF4D8AE bne .L1280 18646 .LVL3044: 18647 .LBB2038: 18648 .LBB2039: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18649 .loc 3 928 0 18650 03f6 0399 ldr r1, [sp, #12] 18651 .LBE2039: 18652 .LBE2038: 18653 .LBB2041: 18654 .LBB2042: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18655 .loc 3 909 0 ARM GAS /tmp/ccJrAs6S.s page 738 18656 03f8 D2F802C0 ldr ip, [r2, #2] @ unaligned 18657 .LBE2042: 18658 .LBE2041: 18659 .LBB2043: 18660 .LBB2040: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18661 .loc 3 928 0 18662 03fc 8968 ldr r1, [r1, #8] @ unaligned 18663 .LVL3045: 18664 .LBE2040: 18665 .LBE2043: 18666 .LBB2044: 18667 .LBB2045: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18668 .loc 6 1993 0 18669 .syntax unified 18670 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18671 03fe 26FB0156 smlad r6, r6, r1, r5 18672 @ 0 "" 2 18673 .LVL3046: 18674 .thumb 18675 .syntax unified 18676 .LBE2045: 18677 .LBE2044: 18678 .LBB2046: 18679 .LBB2047: 18680 .syntax unified 18681 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18682 0402 24FB0100 smlad r0, r4, r1, r0 18683 @ 0 "" 2 18684 .LVL3047: 18685 .thumb 18686 .syntax unified 18687 .LBE2047: 18688 .LBE2046: 18689 .LBB2048: 18690 .LBB2049: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18691 .loc 3 909 0 18692 0406 1568 ldr r5, [r2] @ unaligned 18693 .LBE2049: 18694 .LBE2048: 18695 .LBB2050: 18696 .LBB2051: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18697 .loc 6 1993 0 18698 .syntax unified 18699 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18700 0408 25FB0177 smlad r7, r5, r1, r7 18701 @ 0 "" 2 18702 .LVL3048: 18703 .thumb 18704 .syntax unified 18705 .LBE2051: 18706 .LBE2050: 18707 .LBB2052: 18708 .LBB2053: ARM GAS /tmp/ccJrAs6S.s page 739 18709 .syntax unified 18710 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18711 040c 2CFB0133 smlad r3, ip, r1, r3 18712 @ 0 "" 2 18713 .LVL3049: 18714 .thumb 18715 .syntax unified 18716 .LBE2053: 18717 .LBE2052: 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Read y[6] */ 18718 .loc 39 394 0 18719 0410 0399 ldr r1, [sp, #12] 18720 0412 B1F90C10 ldrsh r1, [r1, #12] 18721 .LVL3050: 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 18722 .loc 39 399 0 18723 0416 89B2 uxth r1, r1 18724 .LVL3051: 18725 .LBB2054: 18726 .LBB2055: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18727 .loc 6 2001 0 18728 .syntax unified 18729 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18730 0418 24FB1165 smladx r5, r4, r1, r6 18731 @ 0 "" 2 18732 .LVL3052: 18733 .thumb 18734 .syntax unified 18735 .LBE2055: 18736 .LBE2054: 18737 .LBB2056: 18738 .LBB2057: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18739 .loc 6 1993 0 18740 .syntax unified 18741 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18742 041c 2CFB0100 smlad r0, ip, r1, r0 18743 @ 0 "" 2 18744 .LVL3053: 18745 .thumb 18746 .syntax unified 18747 .LBE2057: 18748 .LBE2056: 18749 .LBB2058: 18750 .LBB2059: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18751 .loc 6 2001 0 18752 .syntax unified 18753 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18754 0420 2CFB1177 smladx r7, ip, r1, r7 18755 @ 0 "" 2 18756 .LVL3054: 18757 .thumb 18758 .syntax unified 18759 .LBE2059: 18760 .LBE2058: ARM GAS /tmp/ccJrAs6S.s page 740 18761 .LBB2060: 18762 .LBB2061: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18763 .loc 3 909 0 18764 0424 5268 ldr r2, [r2, #4] @ unaligned 18765 .LVL3055: 18766 .LBE2061: 18767 .LBE2060: 18768 .LBB2062: 18769 .LBB2063: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18770 .loc 6 2001 0 18771 .syntax unified 18772 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18773 0426 22FB1133 smladx r3, r2, r1, r3 18774 @ 0 "" 2 18775 .LVL3056: 18776 .thumb 18777 .syntax unified 18778 042a BCE6 b .L1280 18779 .LVL3057: 18780 .L1295: 18781 042c 0B46 mov r3, r1 18782 .LBE2063: 18783 .LBE2062: 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18784 .loc 39 242 0 18785 042e 019E ldr r6, [sp, #4] 18786 0430 DAE6 b .L1277 18787 .LVL3058: 18788 .L1271: 18789 0432 019A ldr r2, [sp, #4] 18790 0434 1946 mov r1, r3 18791 0436 02EB4101 add r1, r2, r1, lsl #1 18792 .LVL3059: 18793 .L1273: 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18794 .loc 39 510 0 18795 043a 32F8020B ldrh r0, [r2], #2 18796 .LVL3060: 18797 043e BAF80030 ldrh r3, [r10] 18798 0442 13FB00F3 smulbb r3, r3, r0 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 18799 .loc 39 517 0 18800 0446 DB13 asrs r3, r3, #15 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18801 .loc 39 499 0 18802 0448 8A42 cmp r2, r1 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 18803 .loc 39 517 0 18804 044a A9F80030 strh r3, [r9] @ movhi 18805 .LVL3061: 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18806 .loc 39 519 0 18807 044e D944 add r9, r9, fp 18808 .LVL3062: 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 741 18809 .loc 39 499 0 18810 0450 F3D1 bne .L1273 18811 0452 76E7 b .L1256 18812 .LVL3063: 18813 .L1294: 18814 0454 1146 mov r1, r2 18815 0456 069A ldr r2, [sp, #24] 18816 0458 4B46 mov r3, r9 18817 .LVL3064: 18818 .L1269: 18819 045a 013A subs r2, r2, #1 18820 .LVL3065: 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 18821 .loc 39 517 0 18822 045c 1980 strh r1, [r3] @ movhi 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18823 .loc 39 519 0 18824 045e 5B44 add r3, r3, fp 18825 .LVL3066: 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18826 .loc 39 499 0 18827 0460 FBD1 bne .L1269 18828 0462 069B ldr r3, [sp, #24] 18829 .LVL3067: 18830 0464 0BFB0399 mla r9, fp, r3, r9 18831 0468 5B00 lsls r3, r3, #1 18832 046a 95E7 b .L1276 18833 .LVL3068: 18834 .L1270: 18835 046c 019C ldr r4, [sp, #4] 18836 046e 5B00 lsls r3, r3, #1 18837 .LVL3069: 18838 0470 E618 adds r6, r4, r3 18839 0472 4D46 mov r5, r9 18840 .LVL3070: 18841 .L1275: 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18842 .loc 39 510 0 18843 0474 2788 ldrh r7, [r4] 18844 0476 BAF80010 ldrh r1, [r10] 18845 047a 34F8020F ldrh r0, [r4, #2]! 18846 .LVL3071: 18847 047e BAF80220 ldrh r2, [r10, #2] 18848 0482 11FB07F1 smulbb r1, r1, r7 18849 0486 12FB0012 smlabb r2, r2, r0, r1 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 18850 .loc 39 517 0 18851 048a D213 asrs r2, r2, #15 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18852 .loc 39 499 0 18853 048c B442 cmp r4, r6 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 18854 .loc 39 517 0 18855 048e 2A80 strh r2, [r5] @ movhi 18856 .LVL3072: 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18857 .loc 39 519 0 ARM GAS /tmp/ccJrAs6S.s page 742 18858 0490 5D44 add r5, r5, fp 18859 .LVL3073: 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18860 .loc 39 499 0 18861 0492 EFD1 bne .L1275 18862 0494 7DE7 b .L1336 18863 .LVL3074: 18864 .L1293: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** 18865 .loc 39 183 0 18866 0496 3B46 mov r3, r7 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c **** { 18867 .loc 39 190 0 18868 0498 4646 mov r6, r8 18869 049a 10E6 b .L1261 18870 .cfi_endproc 18871 .LFE184: 18873 .section .text.arm_correlate_fast_q31,"ax",%progbits 18874 .align 1 18875 .p2align 2,,3 18876 .global arm_correlate_fast_q31 18877 .syntax unified 18878 .thumb 18879 .thumb_func 18880 .fpu fpv4-sp-d16 18882 arm_correlate_fast_q31: 18883 .LFB185: 18884 .file 40 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Title: arm_correlate_fast_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Description: Fast Q31 Correlation 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** #include "arm_math.h" ARM GAS /tmp/ccJrAs6S.s page 743 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @addtogroup Corr 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @brief Correlation of Q31 sequences (fast version). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @param[out] pDst points to the location where the output result is written. Length 2 * 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** This function is optimized for speed at the expense of fixed-point precision and 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** These intermediate results are accumulated in a 32-bit register in 2.30 format. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** Finally, the accumulator is saturated and converted to a 1.31 result. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @par 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** The fast version has the same overflow behavior as the standard version but prov 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** In order to avoid overflows completely the input signals must be scaled down. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** The input signals should be scaled down to avoid intermediate overflows. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** maximum of min(srcALen, srcBLen) number of additions is carried internally. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** @remark 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** Refer to \ref arm_correlate_q31() for a slower implementation of this function w 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** void arm_correlate_fast_q31( 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** const q31_t * pSrcA, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** uint32_t srcALen, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** const q31_t * pSrcB, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** uint32_t srcBLen, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** q31_t * pDst) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 18885 .loc 40 71 0 18886 .cfi_startproc 18887 @ args = 4, pretend = 0, frame = 120 18888 @ frame_needed = 0, uses_anonymous_args = 0 18889 .LVL3075: 18890 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 18891 .LCFI111: 18892 .cfi_def_cfa_offset 36 18893 .cfi_offset 4, -36 18894 .cfi_offset 5, -32 18895 .cfi_offset 6, -28 18896 .cfi_offset 7, -24 18897 .cfi_offset 8, -20 18898 .cfi_offset 9, -16 18899 .cfi_offset 10, -12 ARM GAS /tmp/ccJrAs6S.s page 744 18900 .cfi_offset 11, -8 18901 .cfi_offset 14, -4 18902 0004 9FB0 sub sp, sp, #124 18903 .LCFI112: 18904 .cfi_def_cfa_offset 160 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** const q31_t *pIn1; /* InputA pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** const q31_t *pIn2; /* InputB pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** q31_t *pOut = pDst; /* Output pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** const q31_t *px; /* Intermediate inputA pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** const q31_t *py; /* Intermediate inputB pointer */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** const q31_t *pSrc1; /* Intermediate pointers */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** q31_t x0, x1, x2, x3, c0; /* Temporary variables for holding input and 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** uint32_t j, k, count, blkCnt; /* Loop counters */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** uint32_t outBlockSize; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** int32_t inc = 1; /* Destination address modifier */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* srcB is always made to slide across srcA. */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** if (srcALen >= srcBLen) 18905 .loc 40 88 0 18906 0006 9942 cmp r1, r3 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** const q31_t *pIn1; /* InputA pointer */ 18907 .loc 40 71 0 18908 0008 1592 str r2, [sp, #84] 18909 000a 1493 str r3, [sp, #80] 18910 000c 1290 str r0, [sp, #72] 18911 000e 289A ldr r2, [sp, #160] 18912 .LVL3076: 18913 .loc 40 88 0 18914 0010 C0F01583 bcc .L1341 18915 .LVL3077: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Initialization of inputA pointer */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pIn1 = pSrcA; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Initialization of inputB pointer */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pIn2 = pSrcB; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Number of output samples is calculated */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** outBlockSize = (2U * srcALen) - 1U; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* When srcALen > srcBLen, zero padding is done to srcB 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * to make their lengths equal. 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Instead, (outBlockSize - (srcALen + srcBLen - 1)) 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * number of output samples are made zero */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** j = outBlockSize - (srcALen + (srcBLen - 1U)); 18916 .loc 40 103 0 18917 0014 CB1A subs r3, r1, r3 18918 .LVL3078: 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Updating the pointer position to non zero value */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut += j; 18919 .loc 40 106 0 18920 0016 02EB8303 add r3, r2, r3, lsl #2 ARM GAS /tmp/ccJrAs6S.s page 745 18921 001a 0E93 str r3, [sp, #56] 18922 .LVL3079: 18923 001c 149A ldr r2, [sp, #80] 18924 001e 0423 movs r3, #4 18925 .LVL3080: 18926 0020 0C93 str r3, [sp, #48] 18927 .LVL3081: 18928 .L1342: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** else 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Initialization of inputA pointer */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pIn1 = pSrcB; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Initialization of inputB pointer */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pIn2 = pSrcA; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** j = srcBLen; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** srcBLen = srcALen; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** srcALen = j; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* CORR(x, y) = Reverse order(CORR(y, x)) */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Hence set the destination pointer to point to the last output sample */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut = pDst + ((srcALen + srcBLen) - 2U); 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination address modifier is set to -1 */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** inc = -1; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* The function is internally 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * divided into three stages according to the number of multiplications that has to be 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * taken place between inputA samples and inputB samples. In the first stage of the 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * algorithm, the multiplications increase by one for every iteration. 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * In the third stage of the algorithm, the multiplications decrease by one 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * for every iteration. */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* The algorithm is implemented in three stages. 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** The loop counters of each stage is initiated here. */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** blockSize1 = srcBLen - 1U; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** blockSize2 = srcALen - (srcBLen - 1U); 18929 .loc 40 142 0 18930 0022 0131 adds r1, r1, #1 18931 .LVL3082: 18932 0024 8B1A subs r3, r1, r2 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** blockSize3 = blockSize1; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* -------------------------- 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Initializations of stage1 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * -------------------------*/ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* sum = x[0] * y[srcBlen - 1] 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * .... ARM GAS /tmp/ccJrAs6S.s page 746 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** The count variable holds the number of MAC operations performed */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** count = 1U; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Working pointer of inputA */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** px = pIn1; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Working pointer of inputB */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pSrc1 = pIn2 + (srcBLen - 1U); 18933 .loc 40 163 0 18934 0026 02F1804C add ip, r2, #1073741824 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** blockSize3 = blockSize1; 18935 .loc 40 142 0 18936 002a 1793 str r3, [sp, #92] 18937 .LVL3083: 18938 .loc 40 163 0 18939 002c 159B ldr r3, [sp, #84] 18940 .LVL3084: 18941 002e 0CF1FF3C add ip, ip, #-1 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** py = pSrc1; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* ------------------------ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Stage1 process 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * ----------------------*/ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* The first stage starts here */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (blockSize1 > 0U) 18942 .loc 40 171 0 18943 0032 1146 mov r1, r2 18944 .LVL3085: 18945 0034 013A subs r2, r2, #1 18946 .LVL3086: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** py = pSrc1; 18947 .loc 40 163 0 18948 0036 03EB8C03 add r3, r3, ip, lsl #2 18949 .LVL3087: 18950 .loc 40 171 0 18951 003a 1B92 str r2, [sp, #108] 18952 003c 00F0BC82 beq .L1343 18953 0040 DDF84890 ldr r9, [sp, #72] 18954 0044 DDF83880 ldr r8, [sp, #56] 18955 0048 DDF830B0 ldr fp, [sp, #48] 18956 004c A3F1040E sub lr, r3, #4 18957 0050 4E46 mov r6, r9 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 18958 .loc 40 157 0 18959 0052 0122 movs r2, #1 18960 .LVL3088: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Accumulator is made zero for every iteration */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = 0; 18961 .loc 40 174 0 18962 0054 0024 movs r4, #0 18963 0056 8A46 mov r10, r1 ARM GAS /tmp/ccJrAs6S.s page 747 18964 .LVL3089: 18965 .L1344: 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k = count >> 2U; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (k > 0U) 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* x[0] * y[srcBLen - 4] */ 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* x[1] * y[srcBLen - 3] */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* x[2] * y[srcBLen - 2] */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* x[3] * y[srcBLen - 1] */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k--; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ** No loop unrolling is used. */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k = count % 0x4U; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (k > 0U) 18966 .loc 40 207 0 18967 0058 12F00307 ands r7, r2, #3 18968 .LVL3090: 18969 005c 15D0 beq .L1347 18970 .LVL3091: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Perform the multiply-accumulate */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* x[0] * y[srcBLen - 1] */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 18971 .loc 40 211 0 18972 005e 2146 mov r1, r4 18973 0060 3568 ldr r5, [r6] 18974 0062 1C68 ldr r4, [r3] 18975 .LVL3092: 18976 0064 0020 movs r0, #0 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 18977 .loc 40 207 0 18978 0066 012F cmp r7, #1 18979 .loc 40 211 0 18980 0068 C4FB0501 smlal r0, r1, r4, r5 18981 .LVL3093: 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { ARM GAS /tmp/ccJrAs6S.s page 748 18982 .loc 40 207 0 18983 006c 0CD0 beq .L1420 18984 .LVL3094: 18985 .loc 40 211 0 18986 006e 5C68 ldr r4, [r3, #4] 18987 0070 7568 ldr r5, [r6, #4] 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 18988 .loc 40 207 0 18989 0072 022F cmp r7, #2 18990 .loc 40 211 0 18991 0074 4FF00000 mov r0, #0 18992 0078 C4FB0501 smlal r0, r1, r4, r5 18993 .LVL3095: 18994 007c 1FBF itttt ne 18995 007e 9B68 ldrne r3, [r3, #8] 18996 .LVL3096: 18997 0080 B468 ldrne r4, [r6, #8] 18998 0082 0020 movne r0, #0 18999 0084 C3FB0401 smlalne r0, r1, r3, r4 19000 .LVL3097: 19001 .L1420: 19002 0088 0C46 mov r4, r1 19003 .LVL3098: 19004 .L1347: 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k--; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** *pOut = sum << 1; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut += inc; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** py = pSrc1 - count; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** px = pIn1; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Increment MAC count */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** count++; 19005 .loc 40 228 0 19006 008a 571C adds r7, r2, #1 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 19007 .loc 40 219 0 19008 008c 6400 lsls r4, r4, #1 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19009 .loc 40 171 0 19010 008e BA45 cmp r10, r7 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 19011 .loc 40 219 0 19012 0090 C8F80040 str r4, [r8] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** px = pIn1; 19013 .loc 40 224 0 19014 0094 7346 mov r3, lr 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19015 .loc 40 221 0 ARM GAS /tmp/ccJrAs6S.s page 749 19016 0096 D844 add r8, r8, fp 19017 .LVL3099: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19018 .loc 40 171 0 19019 0098 39D0 beq .L1423 19020 .LVL3100: 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19021 .loc 40 181 0 19022 009a 5FEA970C lsrs ip, r7, #2 19023 .LVL3101: 19024 009e 00F03083 beq .L1380 19025 00a2 4FEA0C1C lsl ip, ip, #4 19026 .LVL3102: 19027 00a6 09F11001 add r1, r9, #16 19028 00aa 01EB0C06 add r6, r1, ip 19029 00ae 0EF11000 add r0, lr, #16 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19030 .loc 40 174 0 19031 00b2 0024 movs r4, #0 19032 00b4 0097 str r7, [sp] 19033 .LVL3103: 19034 .L1346: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19035 .loc 40 184 0 19036 00b6 51F8105C ldr r5, [r1, #-16] 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19037 .loc 40 192 0 19038 00ba 51F8087C ldr r7, [r1, #-8] 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19039 .loc 40 184 0 19040 00be 2346 mov r3, r4 19041 00c0 50F8104C ldr r4, [r0, #-16] 19042 .LVL3104: 19043 00c4 0022 movs r2, #0 19044 00c6 C4FB0523 smlal r2, r3, r4, r5 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19045 .loc 40 188 0 19046 00ca 51F80C5C ldr r5, [r1, #-12] 19047 00ce 50F80C4C ldr r4, [r0, #-12] 19048 00d2 0022 movs r2, #0 19049 00d4 C4FB0523 smlal r2, r3, r4, r5 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19050 .loc 40 192 0 19051 00d8 50F8084C ldr r4, [r0, #-8] 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19052 .loc 40 196 0 19053 00dc 51F8045C ldr r5, [r1, #-4] 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19054 .loc 40 192 0 19055 00e0 0022 movs r2, #0 19056 00e2 C4FB0723 smlal r2, r3, r4, r7 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19057 .loc 40 196 0 19058 00e6 50F8044C ldr r4, [r0, #-4] 19059 00ea 0022 movs r2, #0 19060 00ec 1031 adds r1, r1, #16 19061 .LVL3105: ARM GAS /tmp/ccJrAs6S.s page 750 19062 00ee C4FB0523 smlal r2, r3, r4, r5 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19063 .loc 40 181 0 19064 00f2 8E42 cmp r6, r1 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19065 .loc 40 196 0 19066 00f4 1C46 mov r4, r3 19067 .LVL3106: 19068 00f6 00F11000 add r0, r0, #16 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19069 .loc 40 181 0 19070 00fa DCD1 bne .L1346 19071 00fc 009F ldr r7, [sp] 19072 00fe 09EB0C06 add r6, r9, ip 19073 0102 0EEB0C03 add r3, lr, ip 19074 .LVL3107: 19075 .L1345: 19076 0106 AEF1040E sub lr, lr, #4 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19077 .loc 40 174 0 19078 010a 3A46 mov r2, r7 19079 010c A4E7 b .L1344 19080 .LVL3108: 19081 .L1423: 19082 010e 0E99 ldr r1, [sp, #56] 19083 0110 0C9B ldr r3, [sp, #48] 19084 .LVL3109: 19085 0112 03FB0213 mla r3, r3, r2, r1 19086 0116 0E93 str r3, [sp, #56] 19087 .LVL3110: 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** blockSize1--; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* -------------------------- 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Initializations of stage2 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * ------------------------*/ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * .... 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Working pointer of inputA */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** px = pIn1; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Working pointer of inputB */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** py = pIn2; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* count is index by which the pointer pIn1 to be incremented */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** count = 0U; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* ------------------- 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Stage2 process 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * ------------------*/ ARM GAS /tmp/ccJrAs6S.s page 751 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * So, to loop unroll over blockSize2, 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * srcBLen should be greater than or equal to 4 */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** if (srcBLen >= 4U) 19088 .loc 40 260 0 19089 0118 149B ldr r3, [sp, #80] 19090 011a 032B cmp r3, #3 19091 011c 40F24C82 bls .L1343 19092 .LVL3111: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Loop unroll over blockSize2, by 4 */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** blkCnt = blockSize2 >> 2U; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (blkCnt > 0U) 19093 .loc 40 265 0 19094 0120 179B ldr r3, [sp, #92] 19095 0122 9908 lsrs r1, r3, #2 19096 .LVL3112: 19097 0124 1C91 str r1, [sp, #112] 19098 0126 00F0AC82 beq .L1382 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Set all accumulators to zero */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc0 = 0; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc1 = 0; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc2 = 0; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc3 = 0; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* read x[0], x[1], x[2] samples */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x0 = *px++; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x1 = *px++; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x2 = *px++; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k = srcBLen >> 2U; 19099 .loc 40 279 0 19100 012a 1498 ldr r0, [sp, #80] 19101 012c 129D ldr r5, [sp, #72] 19102 012e 159E ldr r6, [sp, #84] 19103 0130 8308 lsrs r3, r0, #2 19104 0132 1893 str r3, [sp, #96] 19105 0134 2C46 mov r4, r5 19106 0136 1B01 lsls r3, r3, #4 19107 0138 A3F11002 sub r2, r3, #16 19108 013c 0C34 adds r4, r4, #12 19109 013e 0901 lsls r1, r1, #4 19110 .LVL3113: 19111 0140 EB18 adds r3, r5, r3 19112 0142 0B93 str r3, [sp, #44] 19113 0144 6318 adds r3, r4, r1 19114 0146 1993 str r3, [sp, #100] 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** do 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read y[0] sample */ ARM GAS /tmp/ccJrAs6S.s page 752 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** c0 = *py++; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read x[3] sample */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x3 = *px++; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Perform the multiply-accumulate */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc0 += x[0] * y[0] */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[1] * y[0] */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[2] * y[0] */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[3] * y[0] */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read y[1] sample */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** c0 = *py++; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read x[4] sample */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x0 = *px++; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Perform the multiply-accumulate */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc0 += x[1] * y[1] */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[2] * y[1] */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32); 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[3] * y[1] */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32); 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[4] * y[1] */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read y[2] sample */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** c0 = *py++; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read x[5] sample */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x1 = *px++; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Perform the multiply-accumulates */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc0 += x[2] * y[2] */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32); 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[3] * y[2] */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[4] * y[2] */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32); 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[5] * y[2] */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32); 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read y[3] sample */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** c0 = *py++; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read x[6] sample */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x2 = *px++; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Perform the multiply-accumulates */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc0 += x[3] * y[3] */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[4] * y[3] */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32); ARM GAS /tmp/ccJrAs6S.s page 753 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[5] * y[3] */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[6] * y[3] */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32); 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } while (--k); 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ** No loop unrolling is used. */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k = srcBLen % 0x4U; 19115 .loc 40 353 0 19116 0148 00F00303 and r3, r0, #3 19117 014c 0F93 str r3, [sp, #60] 19118 014e 0C9B ldr r3, [sp, #48] 19119 0150 0D94 str r4, [sp, #52] 19120 0152 B218 adds r2, r6, r2 19121 0154 1192 str r2, [sp, #68] 19122 0156 03EB4302 add r2, r3, r3, lsl #1 19123 015a 9B00 lsls r3, r3, #2 19124 015c 1693 str r3, [sp, #88] 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19125 .loc 40 221 0 19126 015e 0E9B ldr r3, [sp, #56] 19127 0160 1093 str r3, [sp, #64] 19128 0162 06F11003 add r3, r6, #16 19129 0166 1D91 str r1, [sp, #116] 19130 0168 1A92 str r2, [sp, #104] 19131 016a 1393 str r3, [sp, #76] 19132 .LVL3114: 19133 .L1367: 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x1 = *px++; 19134 .loc 40 274 0 19135 016c 0D9B ldr r3, [sp, #52] 19136 016e DDF84CE0 ldr lr, [sp, #76] 19137 0172 53F80C2C ldr r2, [r3, #-12] 19138 0176 0292 str r2, [sp, #8] 19139 .LVL3115: 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x2 = *px++; 19140 .loc 40 275 0 19141 0178 53F8082C ldr r2, [r3, #-8] 19142 .LVL3116: 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19143 .loc 40 276 0 19144 017c D3F800A0 ldr r10, [r3] 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x2 = *px++; 19145 .loc 40 275 0 19146 0180 0892 str r2, [sp, #32] 19147 .LVL3117: 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19148 .loc 40 271 0 19149 0182 4FF0000C mov ip, #0 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19150 .loc 40 276 0 19151 0186 53F8042C ldr r2, [r3, #-4] 19152 .LVL3118: 19153 018a 0092 str r2, [sp] ARM GAS /tmp/ccJrAs6S.s page 754 19154 .LVL3119: 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc2 = 0; 19155 .loc 40 269 0 19156 018c 6146 mov r1, ip 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19157 .loc 40 276 0 19158 018e 1A46 mov r2, r3 19159 .LVL3120: 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19160 .loc 40 279 0 19161 0190 189B ldr r3, [sp, #96] 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc3 = 0; 19162 .loc 40 270 0 19163 0192 CDF818C0 str ip, [sp, #24] 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19164 .loc 40 279 0 19165 0196 5646 mov r6, r10 19166 0198 E346 mov fp, ip 19167 019a E246 mov r10, ip 19168 019c 0993 str r3, [sp, #36] 19169 019e 0F46 mov r7, r1 19170 01a0 9446 mov ip, r2 19171 01a2 03E0 b .L1363 19172 .LVL3121: 19173 .L1424: 19174 01a4 6346 mov r3, ip 19175 01a6 0CF1100C add ip, ip, #16 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19176 .loc 40 336 0 19177 01aa 1E69 ldr r6, [r3, #16] 19178 .LVL3122: 19179 .L1363: 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[2] * y[0] */ 19180 .loc 40 294 0 discriminator 1 19181 01ac CDF814A0 str r10, [sp, #20] 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[1] * y[0] */ 19182 .loc 40 292 0 discriminator 1 19183 01b0 0024 movs r4, #0 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[2] * y[0] */ 19184 .loc 40 294 0 discriminator 1 19185 01b2 0494 str r4, [sp, #16] 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read x[4] sample */ 19186 .loc 40 302 0 discriminator 1 19187 01b4 5EE90432 ldrd r3, r2, [lr, #-16] 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19188 .loc 40 298 0 discriminator 1 19189 01b8 5946 mov r1, fp 19190 .LVL3123: 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[2] * y[0] */ 19191 .loc 40 294 0 discriminator 1 19192 01ba DDE904AB ldrd r10, [sp, #16] 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[1] * y[0] */ 19193 .loc 40 292 0 discriminator 1 19194 01be 3D46 mov r5, r7 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[2] * y[0] */ 19195 .loc 40 294 0 discriminator 1 19196 01c0 089F ldr r7, [sp, #32] ARM GAS /tmp/ccJrAs6S.s page 755 19197 .LVL3124: 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[3] * y[0] */ 19198 .loc 40 296 0 discriminator 1 19199 01c2 DDF81890 ldr r9, [sp, #24] 19200 .LVL3125: 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[2] * y[0] */ 19201 .loc 40 294 0 discriminator 1 19202 01c6 C7FB03AB smlal r10, fp, r7, r3 19203 .LVL3126: 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[1] * y[0] */ 19204 .loc 40 292 0 discriminator 1 19205 01ca 029F ldr r7, [sp, #8] 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[3] * y[0] */ 19206 .loc 40 296 0 discriminator 1 19207 01cc A046 mov r8, r4 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19208 .loc 40 298 0 discriminator 1 19209 01ce 2046 mov r0, r4 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[1] * y[0] */ 19210 .loc 40 292 0 discriminator 1 19211 01d0 C3FB0745 smlal r4, r5, r3, r7 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[3] * y[0] */ 19212 .loc 40 296 0 discriminator 1 19213 01d4 009F ldr r7, [sp] 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19214 .loc 40 298 0 discriminator 1 19215 01d6 C6FB0301 smlal r0, r1, r6, r3 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[3] * y[0] */ 19216 .loc 40 296 0 discriminator 1 19217 01da C7FB0389 smlal r8, r9, r7, r3 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[2] * y[0] */ 19218 .loc 40 294 0 discriminator 1 19219 01de CDE906AB strd r10, [sp, #24] 19220 .LVL3127: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19221 .loc 40 304 0 discriminator 1 19222 01e2 DCF80430 ldr r3, [ip, #4] 19223 .LVL3128: 19224 01e6 0293 str r3, [sp, #8] 19225 .LVL3129: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19226 .loc 40 298 0 discriminator 1 19227 01e8 CDE90001 strd r0, [sp] 19228 .LVL3130: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[3] * y[1] */ 19229 .loc 40 310 0 discriminator 1 19230 01ec DDE906AB ldrd r10, [sp, #24] 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read x[6] sample */ 19231 .loc 40 334 0 discriminator 1 19232 01f0 5EE90230 ldrd r3, r0, [lr, #-8] 19233 .LVL3131: 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[1] * y[0] */ 19234 .loc 40 292 0 discriminator 1 19235 01f4 CDE90445 strd r4, [sp, #16] 19236 .LVL3132: 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[2] * y[1] */ 19237 .loc 40 308 0 discriminator 1 ARM GAS /tmp/ccJrAs6S.s page 756 19238 01f8 DDE90445 ldrd r4, [sp, #16] 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[3] * y[1] */ 19239 .loc 40 310 0 discriminator 1 19240 01fc 4FF0000A mov r10, #0 19241 .LVL3133: 19242 0200 C2FB07AB smlal r10, fp, r2, r7 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read x[6] sample */ 19243 .loc 40 334 0 discriminator 1 19244 0204 0A90 str r0, [sp, #40] 19245 .LVL3134: 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19246 .loc 40 314 0 discriminator 1 19247 0206 DDE90001 ldrd r0, [sp] 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[3] * y[1] */ 19248 .loc 40 310 0 discriminator 1 19249 020a 0097 str r7, [sp] 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[2] * y[1] */ 19250 .loc 40 308 0 discriminator 1 19251 020c 089F ldr r7, [sp, #32] 19252 .LVL3135: 19253 020e 0024 movs r4, #0 19254 0210 C2FB0745 smlal r4, r5, r2, r7 19255 0214 CDE90445 strd r4, [sp, #16] 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[4] * y[1] */ 19256 .loc 40 312 0 discriminator 1 19257 0218 4FF00008 mov r8, #0 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19258 .loc 40 314 0 discriminator 1 19259 021c 029C ldr r4, [sp, #8] 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[4] * y[1] */ 19260 .loc 40 312 0 discriminator 1 19261 021e 4746 mov r7, r8 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19262 .loc 40 314 0 discriminator 1 19263 0220 0020 movs r0, #0 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[4] * y[1] */ 19264 .loc 40 312 0 discriminator 1 19265 0222 C846 mov r8, r9 19266 0224 C2FB0678 smlal r7, r8, r2, r6 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19267 .loc 40 314 0 discriminator 1 19268 0228 C4FB0201 smlal r0, r1, r4, r2 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[5] * y[2] */ 19269 .loc 40 328 0 discriminator 1 19270 022c 0027 movs r7, #0 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[3] * y[2] */ 19271 .loc 40 324 0 discriminator 1 19272 022e DDE90445 ldrd r4, [sp, #16] 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[5] * y[2] */ 19273 .loc 40 328 0 discriminator 1 19274 0232 C146 mov r9, r8 19275 0234 B846 mov r8, r7 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[3] * y[2] */ 19276 .loc 40 324 0 discriminator 1 19277 0236 009F ldr r7, [sp] 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19278 .loc 40 320 0 discriminator 1 ARM GAS /tmp/ccJrAs6S.s page 757 19279 0238 DCF80820 ldr r2, [ip, #8] 19280 023c 0892 str r2, [sp, #32] 19281 .LVL3136: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[3] * y[1] */ 19282 .loc 40 310 0 discriminator 1 19283 023e CDE906AB strd r10, [sp, #24] 19284 .LVL3137: 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[3] * y[2] */ 19285 .loc 40 324 0 discriminator 1 19286 0242 0024 movs r4, #0 19287 0244 C3FB0745 smlal r4, r5, r3, r7 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[4] * y[2] */ 19288 .loc 40 326 0 discriminator 1 19289 0248 DDE906AB ldrd r10, [sp, #24] 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[3] * y[2] */ 19290 .loc 40 324 0 discriminator 1 19291 024c CDE90445 strd r4, [sp, #16] 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[5] * y[2] */ 19292 .loc 40 328 0 discriminator 1 19293 0250 029A ldr r2, [sp, #8] 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19294 .loc 40 330 0 discriminator 1 19295 0252 089F ldr r7, [sp, #32] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[4] * y[2] */ 19296 .loc 40 326 0 discriminator 1 19297 0254 4FF0000A mov r10, #0 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19298 .loc 40 330 0 discriminator 1 19299 0258 0020 movs r0, #0 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[4] * y[2] */ 19300 .loc 40 326 0 discriminator 1 19301 025a C3FB06AB smlal r10, fp, r3, r6 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19302 .loc 40 330 0 discriminator 1 19303 025e C7FB0301 smlal r0, r1, r7, r3 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[5] * y[2] */ 19304 .loc 40 328 0 discriminator 1 19305 0262 C3FB0289 smlal r8, r9, r3, r2 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19306 .loc 40 336 0 discriminator 1 19307 0266 DCF80C30 ldr r3, [ip, #12] 19308 026a 0093 str r3, [sp] 19309 .LVL3138: 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[4] * y[3] */ 19310 .loc 40 340 0 discriminator 1 19311 026c DDE90423 ldrd r2, [sp, #16] 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[5] * y[3] */ 19312 .loc 40 342 0 discriminator 1 19313 0270 5D46 mov r5, fp 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19314 .loc 40 346 0 discriminator 1 19315 0272 8B46 mov fp, r1 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[4] * y[3] */ 19316 .loc 40 340 0 discriminator 1 19317 0274 0A99 ldr r1, [sp, #40] 19318 0276 CDF810C0 str ip, [sp, #16] 19319 027a 0022 movs r2, #0 ARM GAS /tmp/ccJrAs6S.s page 758 19320 027c C1FB0623 smlal r2, r3, r1, r6 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[5] * y[3] */ 19321 .loc 40 342 0 discriminator 1 19322 0280 029E ldr r6, [sp, #8] 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19323 .loc 40 346 0 discriminator 1 19324 0282 0020 movs r0, #0 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[5] * y[3] */ 19325 .loc 40 342 0 discriminator 1 19326 0284 0024 movs r4, #0 19327 0286 C1FB0645 smlal r4, r5, r1, r6 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19328 .loc 40 346 0 discriminator 1 19329 028a 8246 mov r10, r0 19330 028c 009E ldr r6, [sp] 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[6] * y[3] */ 19331 .loc 40 344 0 discriminator 1 19332 028e 4FF00008 mov r8, #0 19333 0292 C1FB0789 smlal r8, r9, r1, r7 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19334 .loc 40 346 0 discriminator 1 19335 0296 5046 mov r0, r10 19336 0298 0F46 mov r7, r1 19337 029a 5946 mov r1, fp 19338 029c C6FB0701 smlal r0, r1, r6, r7 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19339 .loc 40 349 0 discriminator 1 19340 02a0 099E ldr r6, [sp, #36] 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[6] * y[3] */ 19341 .loc 40 344 0 discriminator 1 19342 02a2 CDF81890 str r9, [sp, #24] 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19343 .loc 40 349 0 discriminator 1 19344 02a6 013E subs r6, r6, #1 19345 02a8 0EF1100E add lr, lr, #16 19346 .LVL3139: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[5] * y[3] */ 19347 .loc 40 342 0 discriminator 1 19348 02ac AA46 mov r10, r5 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19349 .loc 40 346 0 discriminator 1 19350 02ae 8B46 mov fp, r1 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[4] * y[3] */ 19351 .loc 40 340 0 discriminator 1 19352 02b0 1F46 mov r7, r3 19353 .LVL3140: 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19354 .loc 40 349 0 discriminator 1 19355 02b2 0996 str r6, [sp, #36] 19356 02b4 7FF476AF bne .L1424 19357 .LVL3141: 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (k > 0U) 19358 .loc 40 355 0 19359 02b8 0F9E ldr r6, [sp, #60] 19360 02ba CDE90401 strd r0, [sp, #16] 19361 02be 8C46 mov ip, r1 ARM GAS /tmp/ccJrAs6S.s page 759 19362 .LVL3142: 19363 02c0 1846 mov r0, r3 19364 02c2 2946 mov r1, r5 19365 02c4 002E cmp r6, #0 19366 02c6 61D0 beq .L1364 19367 .LVL3143: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read y[4] sample */ 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** c0 = *py++; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read x[7] sample */ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x3 = *px++; 19368 .loc 40 360 0 19369 02c8 0B9C ldr r4, [sp, #44] 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read x[7] sample */ 19370 .loc 40 358 0 19371 02ca 119A ldr r2, [sp, #68] 19372 .loc 40 360 0 19373 02cc D4F80CC0 ldr ip, [r4, #12] 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Perform the multiply-accumulates */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc0 += x[4] * y[4] */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 19374 .loc 40 364 0 19375 02d0 099C ldr r4, [sp, #36] 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read x[7] sample */ 19376 .loc 40 358 0 19377 02d2 D2F810E0 ldr lr, [r2, #16] 19378 .LVL3144: 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[6] * y[4] */ 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); 19379 .loc 40 368 0 19380 02d6 0099 ldr r1, [sp] 19381 .LVL3145: 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ 19382 .loc 40 364 0 19383 02d8 9B46 mov fp, r3 19384 02da A246 mov r10, r4 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[7] * y[4] */ 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); 19385 .loc 40 370 0 19386 02dc 059B ldr r3, [sp, #20] 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[6] * y[4] */ 19387 .loc 40 366 0 19388 02de 2646 mov r6, r4 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[7] * y[4] */ 19389 .loc 40 368 0 19390 02e0 2046 mov r0, r4 19391 .LVL3146: 19392 .loc 40 370 0 19393 02e2 2246 mov r2, r4 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ 19394 .loc 40 364 0 19395 02e4 029C ldr r4, [sp, #8] 19396 .loc 40 370 0 19397 02e6 CCFB0E23 smlal r2, r3, ip, lr ARM GAS /tmp/ccJrAs6S.s page 760 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ 19398 .loc 40 364 0 19399 02ea CEFB04AB smlal r10, fp, lr, r4 19400 .LVL3147: 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[6] * y[4] */ 19401 .loc 40 366 0 19402 02ee 089C ldr r4, [sp, #32] 19403 02f0 2F46 mov r7, r5 19404 .loc 40 370 0 19405 02f2 CDE90423 strd r2, [sp, #16] 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19406 .loc 40 355 0 19407 02f6 0F9B ldr r3, [sp, #60] 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[6] * y[4] */ 19408 .loc 40 366 0 19409 02f8 CEFB0467 smlal r6, r7, lr, r4 19410 .LVL3148: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[7] * y[4] */ 19411 .loc 40 368 0 19412 02fc 4D46 mov r5, r9 19413 .LVL3149: 19414 02fe 0446 mov r4, r0 19415 0300 CEFB0145 smlal r4, r5, lr, r1 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19416 .loc 40 355 0 19417 0304 012B cmp r3, #1 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[7] * y[4] */ 19418 .loc 40 368 0 19419 0306 CDE90245 strd r4, [sp, #8] 19420 .LVL3150: 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19421 .loc 40 355 0 19422 030a 00F0AC81 beq .L1425 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read x[7] sample */ 19423 .loc 40 358 0 19424 030e 119B ldr r3, [sp, #68] 19425 .LVL3151: 19426 0310 D3F81480 ldr r8, [r3, #20] 19427 .LVL3152: 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19428 .loc 40 360 0 19429 0314 0B9B ldr r3, [sp, #44] 19430 0316 D3F810E0 ldr lr, [r3, #16] 19431 .LVL3153: 19432 .loc 40 370 0 19433 031a DDE90423 ldrd r2, [sp, #16] 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ 19434 .loc 40 364 0 19435 031e 5946 mov r1, fp 19436 .LVL3154: 19437 .loc 40 370 0 19438 0320 0022 movs r2, #0 19439 .LVL3155: 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[6] * y[4] */ 19440 .loc 40 366 0 19441 0322 3D46 mov r5, r7 19442 .loc 40 370 0 ARM GAS /tmp/ccJrAs6S.s page 761 19443 0324 CEFB0823 smlal r2, r3, lr, r8 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ 19444 .loc 40 364 0 19445 0328 0F46 mov r7, r1 19446 032a 0020 movs r0, #0 19447 032c 0899 ldr r1, [sp, #32] 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[7] * y[4] */ 19448 .loc 40 368 0 19449 032e DDE902AB ldrd r10, [sp, #8] 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ 19450 .loc 40 364 0 19451 0332 0646 mov r6, r0 19452 .loc 40 370 0 19453 0334 CDE90223 strd r2, [sp, #8] 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19454 .loc 40 355 0 19455 0338 0F9B ldr r3, [sp, #60] 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ 19456 .loc 40 364 0 19457 033a C8FB0167 smlal r6, r7, r8, r1 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[6] * y[4] */ 19458 .loc 40 366 0 19459 033e 0099 ldr r1, [sp] 19460 0340 0024 movs r4, #0 19461 .LVL3156: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[7] * y[4] */ 19462 .loc 40 368 0 19463 0342 4FF0000A mov r10, #0 19464 .LVL3157: 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19465 .loc 40 355 0 19466 0346 022B cmp r3, #2 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[6] * y[4] */ 19467 .loc 40 366 0 19468 0348 C8FB0145 smlal r4, r5, r8, r1 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[7] * y[4] */ 19469 .loc 40 368 0 19470 034c C8FB0CAB smlal r10, fp, r8, ip 19471 .LVL3158: 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19472 .loc 40 355 0 19473 0350 00F09081 beq .L1426 19474 .LVL3159: 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Read x[7] sample */ 19475 .loc 40 358 0 19476 0354 119B ldr r3, [sp, #68] 19477 0356 9869 ldr r0, [r3, #24] 19478 .LVL3160: 19479 .loc 40 370 0 19480 0358 0B9B ldr r3, [sp, #44] 19481 035a 5969 ldr r1, [r3, #20] 19482 .LVL3161: 19483 035c 0891 str r1, [sp, #32] 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ 19484 .loc 40 364 0 19485 035e 0099 ldr r1, [sp] 19486 .loc 40 370 0 ARM GAS /tmp/ccJrAs6S.s page 762 19487 0360 DDE90223 ldrd r2, [sp, #8] 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ 19488 .loc 40 364 0 19489 0364 0026 movs r6, #0 19490 0366 C0FB0167 smlal r6, r7, r0, r1 19491 .loc 40 370 0 19492 036a 0899 ldr r1, [sp, #32] 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[6] * y[4] */ 19493 .loc 40 366 0 19494 036c 0024 movs r4, #0 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[7] * y[4] */ 19495 .loc 40 368 0 19496 036e 4FF00008 mov r8, #0 19497 0372 D946 mov r9, fp 19498 .loc 40 370 0 19499 0374 0022 movs r2, #0 19500 .LVL3162: 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[6] * y[4] */ 19501 .loc 40 366 0 19502 0376 C0FB0C45 smlal r4, r5, r0, ip 19503 .loc 40 370 0 19504 037a C1FB0023 smlal r2, r3, r1, r0 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[7] * y[4] */ 19505 .loc 40 368 0 19506 037e C0FB0E89 smlal r8, r9, r0, lr 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[6] * y[4] */ 19507 .loc 40 366 0 19508 0382 2946 mov r1, r5 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ 19509 .loc 40 364 0 19510 0384 3846 mov r0, r7 19511 .LVL3163: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[7] * y[4] */ 19512 .loc 40 368 0 19513 0386 CDF81890 str r9, [sp, #24] 19514 .loc 40 370 0 19515 038a 9C46 mov ip, r3 19516 .LVL3164: 19517 .L1364: 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Reuse the present samples for the next MAC */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x0 = x1; 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x1 = x2; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** x2 = x3; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k--; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** *pOut = (q31_t) (acc0 << 1); 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut += inc; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** *pOut = (q31_t) (acc1 << 1); 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut += inc; 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 763 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** *pOut = (q31_t) (acc2 << 1); 19518 .loc 40 389 0 19519 038c 069B ldr r3, [sp, #24] 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 19520 .loc 40 382 0 19521 038e 109C ldr r4, [sp, #64] 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut += inc; 19522 .loc 40 386 0 19523 0390 0C9D ldr r5, [sp, #48] 19524 0392 0D9E ldr r6, [sp, #52] 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 19525 .loc 40 382 0 19526 0394 4000 lsls r0, r0, #1 19527 .loc 40 389 0 19528 0396 5B00 lsls r3, r3, #1 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut += inc; 19529 .loc 40 386 0 19530 0398 4900 lsls r1, r1, #1 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 19531 .loc 40 382 0 19532 039a 2060 str r0, [r4] 19533 .LVL3165: 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut += inc; 19534 .loc 40 386 0 19535 039c 6151 str r1, [r4, r5] 19536 .LVL3166: 19537 .loc 40 389 0 19538 039e 44F81530 str r3, [r4, r5, lsl #1] 19539 .LVL3167: 19540 03a2 169B ldr r3, [sp, #88] 19541 03a4 0B98 ldr r0, [sp, #44] 19542 03a6 E318 adds r3, r4, r3 19543 03a8 1030 adds r0, r0, #16 19544 03aa 1093 str r3, [sp, #64] 19545 .LVL3168: 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19546 .loc 40 265 0 19547 03ac 199B ldr r3, [sp, #100] 19548 .LVL3169: 19549 03ae 0B90 str r0, [sp, #44] 19550 03b0 1036 adds r6, r6, #16 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut += inc; 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** *pOut = (q31_t) (acc3 << 1); 19551 .loc 40 392 0 19552 03b2 1A98 ldr r0, [sp, #104] 19553 03b4 0D96 str r6, [sp, #52] 19554 03b6 4FEA4C02 lsl r2, ip, #1 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19555 .loc 40 265 0 19556 03ba B342 cmp r3, r6 19557 .loc 40 392 0 19558 03bc 2250 str r2, [r4, r0] 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19559 .loc 40 265 0 19560 03be 7FF4D5AE bne .L1367 19561 03c2 1C9B ldr r3, [sp, #112] ARM GAS /tmp/ccJrAs6S.s page 764 19562 03c4 1699 ldr r1, [sp, #88] 19563 03c6 0E98 ldr r0, [sp, #56] 19564 03c8 01FB0302 mla r2, r1, r3, r0 19565 03cc 0E92 str r2, [sp, #56] 19566 03ce 1299 ldr r1, [sp, #72] 19567 03d0 1D9A ldr r2, [sp, #116] 19568 03d2 9B00 lsls r3, r3, #2 19569 03d4 0A44 add r2, r2, r1 19570 03d6 1C93 str r3, [sp, #112] 19571 03d8 179B ldr r3, [sp, #92] 19572 03da 1646 mov r6, r2 19573 .LVL3170: 19574 .L1361: 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut += inc; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Increment the pointer pIn1 index, count by 4 */ 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** count += 4U; 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** px = pIn1 + count; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** py = pIn2; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** blkCnt--; 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ** No loop unrolling is used. */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** blkCnt = blockSize2 % 0x4U; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (blkCnt > 0U) 19575 .loc 40 410 0 19576 03dc 13F00303 ands r3, r3, #3 19577 03e0 0293 str r3, [sp, #8] 19578 03e2 7ED0 beq .L1352 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Accumulator is made zero for every iteration */ 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = 0; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k = srcBLen >> 2U; 19579 .loc 40 416 0 19580 03e4 1499 ldr r1, [sp, #80] 19581 03e6 1C9A ldr r2, [sp, #112] 19582 03e8 1298 ldr r0, [sp, #72] 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (k > 0U) 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Perform the multiply-accumulates */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); ARM GAS /tmp/ccJrAs6S.s page 765 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k--; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ** No loop unrolling is used. */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k = srcBLen % 0x4U; 19583 .loc 40 438 0 19584 03ea DDF83880 ldr r8, [sp, #56] 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19585 .loc 40 416 0 19586 03ee 4FEA910A lsr r10, r1, #2 19587 .loc 40 438 0 19588 03f2 01F00309 and r9, r1, #3 19589 03f6 1599 ldr r1, [sp, #84] 19590 03f8 0AF1805B add fp, r10, #268435456 19591 03fc 02F1010C add ip, r2, #1 19592 0400 1A44 add r2, r2, r3 19593 0402 031D adds r3, r0, #4 19594 0404 03EB8207 add r7, r3, r2, lsl #2 19595 0408 0BF1FF3B add fp, fp, #-1 19596 040c 01F11003 add r3, r1, #16 19597 0410 4FEA0B1B lsl fp, fp, #4 19598 0414 1393 str r3, [sp, #76] 19599 0416 3B46 mov r3, r7 19600 0418 01EB0B0E add lr, r1, fp 19601 041c 5746 mov r7, r10 19602 041e 00EB8C0C add ip, r0, ip, lsl #2 19603 0422 9A46 mov r10, r3 19604 .LVL3171: 19605 .L1372: 19606 0424 1399 ldr r1, [sp, #76] 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19607 .loc 40 413 0 19608 0426 CDF800E0 str lr, [sp] 19609 042a 06F11000 add r0, r6, #16 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19610 .loc 40 416 0 19611 042e 3C46 mov r4, r7 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19612 .loc 40 413 0 19613 0430 0025 movs r5, #0 19614 0432 B646 mov lr, r6 19615 .LVL3172: 19616 .L1368: 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19617 .loc 40 423 0 19618 0434 50F8106C ldr r6, [r0, #-16] 19619 0438 2B46 mov r3, r5 19620 043a 51F8105C ldr r5, [r1, #-16] 19621 .LVL3173: 19622 043e 0022 movs r2, #0 19623 0440 C5FB0623 smlal r2, r3, r5, r6 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); ARM GAS /tmp/ccJrAs6S.s page 766 19624 .loc 40 425 0 19625 0444 51F80C5C ldr r5, [r1, #-12] 19626 0448 50F80C6C ldr r6, [r0, #-12] 19627 044c 0022 movs r2, #0 19628 044e C5FB0623 smlal r2, r3, r5, r6 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19629 .loc 40 427 0 19630 0452 51F8085C ldr r5, [r1, #-8] 19631 0456 50F8086C ldr r6, [r0, #-8] 19632 045a 0022 movs r2, #0 19633 045c C5FB0623 smlal r2, r3, r5, r6 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19634 .loc 40 429 0 19635 0460 51F8045C ldr r5, [r1, #-4] 19636 0464 50F8046C ldr r6, [r0, #-4] 19637 0468 0022 movs r2, #0 19638 046a C5FB0623 smlal r2, r3, r5, r6 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19639 .loc 40 420 0 19640 046e 013C subs r4, r4, #1 19641 .LVL3174: 19642 0470 00F11000 add r0, r0, #16 19643 .LVL3175: 19644 0474 01F11001 add r1, r1, #16 19645 .LVL3176: 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19646 .loc 40 429 0 19647 0478 1D46 mov r5, r3 19648 .LVL3177: 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19649 .loc 40 420 0 19650 047a DBD1 bne .L1368 19651 047c 7646 mov r6, lr 19652 047e 5E44 add r6, r6, fp 19653 .LVL3178: 19654 0480 DDF800E0 ldr lr, [sp] 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (k > 0U) 19655 .loc 40 440 0 19656 0484 B9F1000F cmp r9, #0 19657 0488 1BD0 beq .L1369 19658 .LVL3179: 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Perform the multiply-accumulate */ 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 19659 .loc 40 443 0 19660 048a 1946 mov r1, r3 19661 048c 3269 ldr r2, [r6, #16] 19662 048e DEF81030 ldr r3, [lr, #16] 19663 .LVL3180: 19664 0492 2046 mov r0, r4 19665 .LVL3181: 19666 0494 C3FB0201 smlal r0, r1, r3, r2 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19667 .loc 40 440 0 19668 0498 B9F1010F cmp r9, #1 19669 .loc 40 443 0 ARM GAS /tmp/ccJrAs6S.s page 767 19670 049c 0D46 mov r5, r1 19671 .LVL3182: 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19672 .loc 40 440 0 19673 049e 10D0 beq .L1369 19674 .loc 40 443 0 19675 04a0 7269 ldr r2, [r6, #20] 19676 04a2 DEF81430 ldr r3, [lr, #20] 19677 04a6 0020 movs r0, #0 19678 04a8 C3FB0201 smlal r0, r1, r3, r2 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19679 .loc 40 440 0 19680 04ac B9F1020F cmp r9, #2 19681 .loc 40 443 0 19682 04b0 0D46 mov r5, r1 19683 .LVL3183: 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19684 .loc 40 440 0 19685 04b2 06D0 beq .L1369 19686 .loc 40 443 0 19687 04b4 B269 ldr r2, [r6, #24] 19688 04b6 DEF81830 ldr r3, [lr, #24] 19689 04ba 0020 movs r0, #0 19690 04bc C3FB0201 smlal r0, r1, r3, r2 19691 04c0 0D46 mov r5, r1 19692 .LVL3184: 19693 .L1369: 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k--; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** *pOut = sum << 1; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut += inc; 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Increment MAC count */ 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** count++; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** px = pIn1 + count; 19694 .loc 40 459 0 19695 04c2 6646 mov r6, ip 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19696 .loc 40 453 0 19697 04c4 0C9B ldr r3, [sp, #48] 19698 04c6 0CF1040C add ip, ip, #4 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 19699 .loc 40 451 0 19700 04ca 6D00 lsls r5, r5, #1 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19701 .loc 40 410 0 19702 04cc D445 cmp ip, r10 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 19703 .loc 40 451 0 ARM GAS /tmp/ccJrAs6S.s page 768 19704 04ce C8F80050 str r5, [r8] 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19705 .loc 40 453 0 19706 04d2 9844 add r8, r8, r3 19707 .LVL3185: 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19708 .loc 40 410 0 19709 04d4 A6D1 bne .L1372 19710 04d6 1A46 mov r2, r3 19711 04d8 0E99 ldr r1, [sp, #56] 19712 04da 029B ldr r3, [sp, #8] 19713 04dc 02FB0313 mla r3, r2, r3, r1 19714 04e0 0E93 str r3, [sp, #56] 19715 .LVL3186: 19716 .L1352: 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** py = pIn2; 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** blkCnt--; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** else 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* If the srcBLen is not a multiple of 4, 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * the blockSize2 loop cannot be unrolled by 4 */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** blkCnt = blockSize2; 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (blkCnt > 0U) 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Accumulator is made zero for every iteration */ 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = 0; 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* srcBLen number of MACS should be performed */ 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k = srcBLen; 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (k > 0U) 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Perform the multiply-accumulate */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k--; 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** *pOut = sum << 1; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut += inc; 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Increment MAC count */ 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** count++; 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** px = pIn1 + count; 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** py = pIn2; 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 769 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** blkCnt--; 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* -------------------------- 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Initializations of stage3 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * -------------------------*/ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLe 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLe 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * .... 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * sum += x[srcALen-1] * y[0] 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** */ 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** The count variable holds the number of MAC operations performed */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** count = srcBLen - 1U; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Working pointer of inputA */ 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pSrc1 = ((pIn1 + srcALen) - srcBLen) + 1U; 19717 .loc 40 524 0 19718 04e2 129B ldr r3, [sp, #72] 19719 04e4 179A ldr r2, [sp, #92] 19720 04e6 03EB8206 add r6, r3, r2, lsl #2 19721 .LVL3187: 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** px = pSrc1; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Working pointer of inputB */ 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** py = pIn2; 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* ------------------- 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * Stage3 process 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** * ------------------*/ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (blockSize3 > 0U) 19722 .loc 40 534 0 19723 04ea 1B9B ldr r3, [sp, #108] 19724 04ec 002B cmp r3, #0 19725 04ee 60D0 beq .L1340 19726 04f0 DDF83880 ldr r8, [sp, #56] 19727 04f4 DDF830A0 ldr r10, [sp, #48] 19728 04f8 DDF85490 ldr r9, [sp, #84] 19729 04fc 9C46 mov ip, r3 19730 04fe B346 mov fp, r6 19731 .LVL3188: 19732 .L1378: 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Accumulator is made zero for every iteration */ 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = 0; 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k = count >> 2U; 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. ARM GAS /tmp/ccJrAs6S.s page 770 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (k > 0U) 19733 .loc 40 544 0 19734 0500 5FEA9C0E lsrs lr, ip, #2 19735 .LVL3189: 19736 0504 00F09580 beq .L1383 19737 .L1427: 19738 0508 0BF11000 add r0, fp, #16 19739 050c 09F11001 add r1, r9, #16 19740 0510 7446 mov r4, lr 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19741 .loc 40 537 0 19742 0512 0025 movs r5, #0 19743 .LVL3190: 19744 .L1374: 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Perform the multiply-accumulate */ 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* sum += x[srcALen - srcBLen + 4] * y[3] */ 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 19745 .loc 40 548 0 19746 0514 50F8107C ldr r7, [r0, #-16] 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* sum += x[srcALen - srcBLen + 3] * y[2] */ 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 19747 .loc 40 552 0 19748 0518 50F80C6C ldr r6, [r0, #-12] 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19749 .loc 40 548 0 19750 051c 2B46 mov r3, r5 19751 051e 51F8105C ldr r5, [r1, #-16] 19752 .LVL3191: 19753 0522 0022 movs r2, #0 19754 0524 C5FB0723 smlal r2, r3, r5, r7 19755 .loc 40 552 0 19756 0528 51F80C5C ldr r5, [r1, #-12] 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* sum += x[srcALen - srcBLen + 2] * y[1] */ 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 19757 .loc 40 556 0 19758 052c 50F8087C ldr r7, [r0, #-8] 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19759 .loc 40 552 0 19760 0530 0022 movs r2, #0 19761 0532 C5FB0623 smlal r2, r3, r5, r6 19762 .loc 40 556 0 19763 0536 51F8085C ldr r5, [r1, #-8] 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* sum += x[srcALen - srcBLen + 1] * y[0] */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 19764 .loc 40 560 0 19765 053a 50F8046C ldr r6, [r0, #-4] 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19766 .loc 40 556 0 19767 053e 0022 movs r2, #0 ARM GAS /tmp/ccJrAs6S.s page 771 19768 0540 C5FB0723 smlal r2, r3, r5, r7 19769 .loc 40 560 0 19770 0544 51F8045C ldr r5, [r1, #-4] 19771 0548 0022 movs r2, #0 19772 054a C5FB0623 smlal r2, r3, r5, r6 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19773 .loc 40 544 0 19774 054e 013C subs r4, r4, #1 19775 .LVL3192: 19776 0550 00F11000 add r0, r0, #16 19777 .LVL3193: 19778 .loc 40 560 0 19779 0554 1D46 mov r5, r3 19780 .LVL3194: 19781 0556 01F11001 add r1, r1, #16 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19782 .loc 40 544 0 19783 055a DBD1 bne .L1374 19784 055c 4FEA0E1E lsl lr, lr, #4 19785 0560 0BEB0E04 add r4, fp, lr 19786 0564 CE44 add lr, lr, r9 19787 .LVL3195: 19788 .L1373: 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k--; 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ** No loop unrolling is used. */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k = count % 0x4U; 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** while (k > 0U) 19789 .loc 40 571 0 19790 0566 1CF00307 ands r7, ip, #3 19791 .LVL3196: 19792 056a 19D0 beq .L1375 19793 .LVL3197: 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Perform the multiply-accumulate */ 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** sum = (q31_t) ((((q63_t) sum << 32) + 19794 .loc 40 574 0 19795 056c 2068 ldr r0, [r4] 19796 056e DEF80010 ldr r1, [lr] 19797 0572 0022 movs r2, #0 19798 0574 2B46 mov r3, r5 19799 0576 C1FB0023 smlal r2, r3, r1, r0 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19800 .loc 40 571 0 19801 057a 012F cmp r7, #1 19802 .loc 40 574 0 19803 057c 1E46 mov r6, r3 19804 .LVL3198: 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19805 .loc 40 571 0 19806 057e 5CD0 beq .L1421 ARM GAS /tmp/ccJrAs6S.s page 772 19807 .LVL3199: 19808 .loc 40 574 0 19809 0580 6068 ldr r0, [r4, #4] 19810 0582 DEF80410 ldr r1, [lr, #4] 19811 0586 0022 movs r2, #0 19812 0588 C1FB0023 smlal r2, r3, r1, r0 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19813 .loc 40 571 0 19814 058c 022F cmp r7, #2 19815 .loc 40 574 0 19816 058e 1E46 mov r6, r3 19817 .LVL3200: 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19818 .loc 40 571 0 19819 0590 53D0 beq .L1421 19820 .LVL3201: 19821 .loc 40 574 0 19822 0592 A068 ldr r0, [r4, #8] 19823 0594 DEF80810 ldr r1, [lr, #8] 19824 0598 0022 movs r2, #0 19825 059a C1FB0023 smlal r2, r3, r1, r0 19826 059e 1D46 mov r5, r3 19827 .LVL3202: 19828 .L1375: 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** k--; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** *pOut = sum << 1; 19829 .loc 40 582 0 19830 05a0 6D00 lsls r5, r5, #1 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19831 .loc 40 534 0 19832 05a2 BCF1010C subs ip, ip, #1 19833 .LVL3203: 19834 .loc 40 582 0 19835 05a6 C8F80050 str r5, [r8] 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** pOut += inc; 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** px = ++pSrc1; 19836 .loc 40 587 0 19837 05aa 0BF1040B add fp, fp, #4 19838 .LVL3204: 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19839 .loc 40 584 0 19840 05ae D044 add r8, r8, r10 19841 .LVL3205: 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19842 .loc 40 534 0 19843 05b0 A6D1 bne .L1378 19844 .LVL3206: 19845 .L1340: ARM GAS /tmp/ccJrAs6S.s page 773 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** py = pIn2; 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement MAC count */ 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** count--; 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Decrement loop counter */ 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** blockSize3--; 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** } 19846 .loc 40 597 0 19847 05b2 1FB0 add sp, sp, #124 19848 .LCFI113: 19849 .cfi_remember_state 19850 .cfi_def_cfa_offset 36 19851 @ sp needed 19852 05b4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 19853 .LVL3207: 19854 .L1343: 19855 .LCFI114: 19856 .cfi_restore_state 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19857 .loc 40 472 0 19858 05b8 179B ldr r3, [sp, #92] 19859 05ba 002B cmp r3, #0 19860 05bc 91D0 beq .L1352 19861 05be 149A ldr r2, [sp, #80] 19862 05c0 002A cmp r2, #0 19863 05c2 72D0 beq .L1381 19864 05c4 022A cmp r2, #2 19865 05c6 00F08280 beq .L1354 19866 05ca 1B9A ldr r2, [sp, #108] 19867 05cc 002A cmp r2, #0 19868 05ce 5AD0 beq .L1355 19869 05d0 1299 ldr r1, [sp, #72] 19870 05d2 0E98 ldr r0, [sp, #56] 19871 05d4 DDF830E0 ldr lr, [sp, #48] 19872 05d8 9E00 lsls r6, r3, #2 19873 05da 8F19 adds r7, r1, r6 19874 05dc B446 mov ip, r6 19875 05de 159E ldr r6, [sp, #84] 19876 .LVL3208: 19877 .L1356: 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19878 .loc 40 484 0 19879 05e0 0A68 ldr r2, [r1] 19880 05e2 3368 ldr r3, [r6] 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19881 .loc 40 483 0 19882 05e4 4D68 ldr r5, [r1, #4] 19883 05e6 7468 ldr r4, [r6, #4] 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19884 .loc 40 484 0 19885 05e8 82FB0389 smull r8, r9, r2, r3 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19886 .loc 40 483 0 19887 05ec 4B46 mov r3, r9 ARM GAS /tmp/ccJrAs6S.s page 774 19888 05ee 0022 movs r2, #0 19889 05f0 C4FB0523 smlal r2, r3, r4, r5 19890 05f4 8D68 ldr r5, [r1, #8] 19891 05f6 B468 ldr r4, [r6, #8] 19892 05f8 0022 movs r2, #0 19893 05fa C4FB0523 smlal r2, r3, r4, r5 19894 05fe 0431 adds r1, r1, #4 19895 .LVL3209: 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 19896 .loc 40 491 0 19897 0600 5B00 lsls r3, r3, #1 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19898 .loc 40 472 0 19899 0602 B942 cmp r1, r7 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 19900 .loc 40 491 0 19901 0604 0360 str r3, [r0] 19902 .LVL3210: 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19903 .loc 40 493 0 19904 0606 7044 add r0, r0, lr 19905 .LVL3211: 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19906 .loc 40 472 0 19907 0608 EAD1 bne .L1356 19908 060a 6646 mov r6, ip 19909 .LVL3212: 19910 .L1422: 19911 060c 0C9A ldr r2, [sp, #48] 19912 060e 0E99 ldr r1, [sp, #56] 19913 0610 179B ldr r3, [sp, #92] 19914 0612 02FB0313 mla r3, r2, r3, r1 19915 0616 0E93 str r3, [sp, #56] 19916 0618 9846 mov r8, r3 19917 061a 9246 mov r10, r2 19918 .L1360: 19919 .LVL3213: 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** px = pSrc1; 19920 .loc 40 524 0 19921 061c 129B ldr r3, [sp, #72] 19922 061e DDF86CC0 ldr ip, [sp, #108] 19923 0622 DDF85490 ldr r9, [sp, #84] 19924 0626 3344 add r3, r3, r6 19925 .LVL3214: 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19926 .loc 40 544 0 19927 0628 5FEA9C0E lsrs lr, ip, #2 19928 062c 9B46 mov fp, r3 19929 .LVL3215: 19930 062e 7FF46BAF bne .L1427 19931 .LVL3216: 19932 .L1383: 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19933 .loc 40 537 0 19934 0632 7546 mov r5, lr 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 19935 .loc 40 544 0 ARM GAS /tmp/ccJrAs6S.s page 775 19936 0634 5C46 mov r4, fp 19937 0636 CE46 mov lr, r9 19938 .LVL3217: 19939 0638 95E7 b .L1373 19940 .LVL3218: 19941 .L1421: 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 19942 .loc 40 574 0 19943 063a 3546 mov r5, r6 19944 063c B0E7 b .L1375 19945 .LVL3219: 19946 .L1341: 19947 063e 1D46 mov r5, r3 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19948 .loc 40 124 0 19949 0640 03F18043 add r3, r3, #1073741824 19950 .LVL3220: 19951 0644 023B subs r3, r3, #2 19952 0646 0B44 add r3, r3, r1 19953 0648 02EB8303 add r3, r2, r3, lsl #2 19954 064c 0846 mov r0, r1 19955 .LVL3221: 19956 064e 129C ldr r4, [sp, #72] 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19957 .loc 40 112 0 19958 0650 1599 ldr r1, [sp, #84] 19959 .LVL3222: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19960 .loc 40 124 0 19961 0652 0E93 str r3, [sp, #56] 19962 .LVL3223: 19963 0654 6FF00303 mvn r3, #3 19964 .LVL3224: 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19965 .loc 40 112 0 19966 0658 1291 str r1, [sp, #72] 19967 .LVL3225: 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19968 .loc 40 115 0 19969 065a 1594 str r4, [sp, #84] 19970 .LVL3226: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19971 .loc 40 124 0 19972 065c 2946 mov r1, r5 19973 .LVL3227: 19974 065e 0C93 str r3, [sp, #48] 19975 0660 1490 str r0, [sp, #80] 19976 0662 0246 mov r2, r0 19977 0664 DDE4 b .L1342 19978 .LVL3228: 19979 .L1425: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[7] * y[4] */ 19980 .loc 40 368 0 19981 0666 039B ldr r3, [sp, #12] 19982 .LVL3229: 19983 0668 0693 str r3, [sp, #24] 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ ARM GAS /tmp/ccJrAs6S.s page 776 19984 .loc 40 364 0 19985 066a 5846 mov r0, fp 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[6] * y[4] */ 19986 .loc 40 366 0 19987 066c 3946 mov r1, r7 19988 .LVL3230: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 19989 .loc 40 370 0 19990 066e DDF814C0 ldr ip, [sp, #20] 19991 .LVL3231: 19992 0672 8BE6 b .L1364 19993 .LVL3232: 19994 .L1426: 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc1 += x[5] * y[4] */ 19995 .loc 40 364 0 19996 0674 3846 mov r0, r7 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc2 += x[6] * y[4] */ 19997 .loc 40 366 0 19998 0676 2946 mov r1, r5 19999 .LVL3233: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* acc3 += x[7] * y[4] */ 20000 .loc 40 368 0 20001 0678 CDF818B0 str fp, [sp, #24] 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 20002 .loc 40 370 0 20003 067c DDF80CC0 ldr ip, [sp, #12] 20004 .LVL3234: 20005 0680 84E6 b .L1364 20006 .LVL3235: 20007 .L1382: 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 20008 .loc 40 245 0 20009 0682 129E ldr r6, [sp, #72] 20010 0684 AAE6 b .L1361 20011 .LVL3236: 20012 .L1355: 20013 0686 1298 ldr r0, [sp, #72] 20014 0688 0E99 ldr r1, [sp, #56] 20015 068a 0C9C ldr r4, [sp, #48] 20016 068c 159D ldr r5, [sp, #84] 20017 068e 1A46 mov r2, r3 20018 0690 00EB8206 add r6, r0, r2, lsl #2 20019 .LVL3237: 20020 .L1357: 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 20021 .loc 40 484 0 20022 0694 50F8043B ldr r3, [r0], #4 20023 .LVL3238: 20024 0698 2A68 ldr r2, [r5] 20025 069a 82FB0323 smull r2, r3, r2, r3 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 20026 .loc 40 491 0 20027 069e 5B00 lsls r3, r3, #1 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 20028 .loc 40 472 0 20029 06a0 B042 cmp r0, r6 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ ARM GAS /tmp/ccJrAs6S.s page 777 20030 .loc 40 491 0 20031 06a2 0B60 str r3, [r1] 20032 .LVL3239: 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 20033 .loc 40 493 0 20034 06a4 2144 add r1, r1, r4 20035 .LVL3240: 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 20036 .loc 40 472 0 20037 06a6 F5D1 bne .L1357 20038 06a8 83E7 b .L1340 20039 .LVL3241: 20040 .L1381: 20041 06aa 1146 mov r1, r2 20042 06ac 0E9B ldr r3, [sp, #56] 20043 .LVL3242: 20044 06ae 179A ldr r2, [sp, #92] 20045 06b0 0C98 ldr r0, [sp, #48] 20046 .LVL3243: 20047 .L1353: 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 20048 .loc 40 491 0 20049 06b2 1960 str r1, [r3] 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 20050 .loc 40 472 0 20051 06b4 013A subs r2, r2, #1 20052 .LVL3244: 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 20053 .loc 40 493 0 20054 06b6 0344 add r3, r3, r0 20055 .LVL3245: 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 20056 .loc 40 472 0 20057 06b8 FBD1 bne .L1353 20058 06ba 179B ldr r3, [sp, #92] 20059 .LVL3246: 20060 06bc 0C99 ldr r1, [sp, #48] 20061 06be 0E98 ldr r0, [sp, #56] 20062 06c0 01FB0302 mla r2, r1, r3, r0 20063 06c4 0E92 str r2, [sp, #56] 20064 06c6 9E00 lsls r6, r3, #2 20065 06c8 9046 mov r8, r2 20066 06ca 8A46 mov r10, r1 20067 06cc A6E7 b .L1360 20068 .LVL3247: 20069 .L1354: 20070 06ce 9E00 lsls r6, r3, #2 20071 06d0 129B ldr r3, [sp, #72] 20072 .LVL3248: 20073 06d2 0E9C ldr r4, [sp, #56] 20074 06d4 DDF830C0 ldr ip, [sp, #48] 20075 06d8 159A ldr r2, [sp, #84] 20076 06da 9D19 adds r5, r3, r6 20077 06dc B646 mov lr, r6 20078 .LVL3249: 20079 .L1359: 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 778 20080 .loc 40 484 0 20081 06de 1968 ldr r1, [r3] 20082 06e0 1068 ldr r0, [r2] 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 20083 .loc 40 483 0 20084 06e2 53F8047F ldr r7, [r3, #4]! 20085 .LVL3250: 20086 06e6 5668 ldr r6, [r2, #4] 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 20087 .loc 40 484 0 20088 06e8 80FB0189 smull r8, r9, r0, r1 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** ((q63_t) *px++ * (*py++))) >> 32); 20089 .loc 40 483 0 20090 06ec 4946 mov r1, r9 20091 .LVL3251: 20092 06ee 0020 movs r0, #0 20093 06f0 C7FB0601 smlal r0, r1, r7, r6 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 20094 .loc 40 491 0 20095 06f4 4900 lsls r1, r1, #1 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 20096 .loc 40 472 0 20097 06f6 AB42 cmp r3, r5 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 20098 .loc 40 491 0 20099 06f8 2160 str r1, [r4] 20100 .LVL3252: 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 20101 .loc 40 493 0 20102 06fa 6444 add r4, r4, ip 20103 .LVL3253: 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 20104 .loc 40 472 0 20105 06fc EFD1 bne .L1359 20106 06fe 7646 mov r6, lr 20107 0700 84E7 b .L1422 20108 .LVL3254: 20109 .L1380: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** 20110 .loc 40 174 0 20111 0702 6446 mov r4, ip 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c **** { 20112 .loc 40 181 0 20113 0704 4E46 mov r6, r9 20114 0706 FEE4 b .L1345 20115 .cfi_endproc 20116 .LFE185: 20118 .section .text.arm_correlate_opt_q15,"ax",%progbits 20119 .align 1 20120 .p2align 2,,3 20121 .global arm_correlate_opt_q15 20122 .syntax unified 20123 .thumb 20124 .thumb_func 20125 .fpu fpv4-sp-d16 20127 arm_correlate_opt_q15: 20128 .LFB186: ARM GAS /tmp/ccJrAs6S.s page 779 20129 .file 41 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * Title: arm_correlate_opt_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * Description: Correlation of Q15 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @addtogroup Corr 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @brief Correlation of Q15 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @param[out] pDst points to the location where the output result is written. Length 2 * 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @return none 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @par Scaling and Overflow Behavior 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** The function is implemented using a 64-bit internal accumulator. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** Both inputs are in 1.15 format and multiplications yield a 2.30 result. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 f 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** This approach provides 33 guard bits and there is no risk of overflow. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 780 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** @remark 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** void arm_correlate_opt_q15( 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** const q15_t * pSrcA, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** uint32_t srcALen, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** const q15_t * pSrcB, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** uint32_t srcBLen, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** q15_t * pDst, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** q15_t * pScratch) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 20130 .loc 41 68 0 20131 .cfi_startproc 20132 @ args = 8, pretend = 0, frame = 8 20133 @ frame_needed = 0, uses_anonymous_args = 0 20134 .LVL3255: 20135 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 20136 .LCFI115: 20137 .cfi_def_cfa_offset 36 20138 .cfi_offset 4, -36 20139 .cfi_offset 5, -32 20140 .cfi_offset 6, -28 20141 .cfi_offset 7, -24 20142 .cfi_offset 8, -20 20143 .cfi_offset 9, -16 20144 .cfi_offset 10, -12 20145 .cfi_offset 11, -8 20146 .cfi_offset 14, -4 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** q63_t acc0; /* Accumulators */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** q15_t *pScr1; /* Temporary pointer for scratch1 */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** const q15_t *pIn1; /* InputA pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** const q15_t *pIn2; /* InputB pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** const q15_t *py; /* Intermediate inputB pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** uint32_t j, blkCnt, outBlockSize; /* Loop counter */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** int32_t inc = 1; /* Output pointer increment */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** uint32_t tapCnt; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** q63_t acc1, acc2, acc3; /* Accumulators */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** q31_t x1, x2, x3; /* Temporary variables for holding input1 an 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** q31_t y1, y2; /* State variables */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #endif 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* srcB is always made to slide across srcA. */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* But CORR(x, y) is reverse of CORR(y, x) */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* and the destination pointer modifier, inc is set to -1 */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* But to improve the performance, 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * we include zeroes in the output instead of zero padding either of the the inputs*/ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* If srcALen > srcBLen, 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* If srcALen < srcBLen, ARM GAS /tmp/ccJrAs6S.s page 781 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** if (srcALen >= srcBLen) 20147 .loc 41 98 0 20148 0004 9942 cmp r1, r3 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** q63_t acc0; /* Accumulators */ 20149 .loc 41 68 0 20150 0006 83B0 sub sp, sp, #12 20151 .LCFI116: 20152 .cfi_def_cfa_offset 48 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** q63_t acc0; /* Accumulators */ 20153 .loc 41 68 0 20154 0008 0C46 mov r4, r1 20155 000a 1F46 mov r7, r3 20156 000c 8346 mov fp, r0 20157 000e 9046 mov r8, r2 20158 0010 DDE90C65 ldrd r6, r5, [sp, #48] 20159 .loc 41 98 0 20160 0014 6ED3 bcc .L1429 20161 .LVL3256: 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Initialization of inputA pointer */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pIn1 = pSrcA; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Initialization of inputB pointer */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pIn2 = pSrcB; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Number of output samples is calculated */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** outBlockSize = (srcALen * 2U) - 1U; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* When srcALen > srcBLen, zero padding is done to srcB 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * to make their lengths equal. 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * Instead, (outBlockSize - (srcALen + srcBLen - 1)) 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** * number of output samples are made zero */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** j = outBlockSize - (srcALen + (srcBLen - 1U)); 20162 .loc 41 113 0 20163 0016 CB1A subs r3, r1, r3 20164 .LVL3257: 20165 0018 0222 movs r2, #2 20166 .LVL3258: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Updating the pointer position to non zero value */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pOut += j; 20167 .loc 41 116 0 20168 001a 06EB4306 add r6, r6, r3, lsl #1 20169 .LVL3259: 20170 001e 0192 str r2, [sp, #4] 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20171 .loc 41 113 0 20172 0020 4B00 lsls r3, r1, #1 20173 .LVL3260: 20174 .L1430: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** } 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** else 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Initialization of inputA pointer */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pIn1 = pSrcB; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 782 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Initialization of inputB pointer */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pIn2 = pSrcA; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** j = srcBLen; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** srcBLen = srcALen; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** srcALen = j; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* CORR(x, y) = Reverse order(CORR(y, x)) */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Hence set the destination pointer to point to the last output sample */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pOut = pDst + ((srcALen + srcBLen) - 2U); 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Destination address modifier is set to -1 */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** inc = -1; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** } 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pScr1 = pScratch; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Fill (srcBLen - 1U) zeros in scratch buffer */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Update temporary scratch pointer */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pScr1 += (srcBLen - 1U); 20175 .loc 41 145 0 20176 0022 07F10049 add r9, r7, #-2147483648 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20177 .loc 41 142 0 20178 0026 07F1FF3A add r10, r7, #-1 20179 .loc 41 145 0 20180 002a 09F1FF39 add r9, r9, #-1 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20181 .loc 41 142 0 20182 002e 5246 mov r2, r10 20183 0030 2946 mov r1, r5 20184 0032 0020 movs r0, #0 20185 .LVL3261: 20186 .loc 41 145 0 20187 0034 05EB4909 add r9, r5, r9, lsl #1 20188 0038 0093 str r3, [sp] 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20189 .loc 41 142 0 20190 003a FFF7FEFF bl arm_fill_q15 20191 .LVL3262: 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Copy (srcALen) samples in scratch buffer */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** arm_copy_q15(pIn1, pScr1, srcALen); 20192 .loc 41 148 0 20193 003e 2246 mov r2, r4 20194 0040 5846 mov r0, fp 20195 0042 4946 mov r1, r9 20196 0044 FFF7FEFF bl arm_copy_q15 20197 .LVL3263: 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Update pointers */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pScr1 += srcALen; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 783 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 20198 .loc 41 155 0 20199 0048 009B ldr r3, [sp] 20200 004a 5246 mov r2, r10 20201 004c 09EB0301 add r1, r9, r3 20202 .LVL3264: 20203 0050 0020 movs r0, #0 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Update pointer */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pScr1 += (srcBLen - 1U); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Temporary pointer for scratch2 */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** py = pIn2; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Actual correlation process starts here */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** blkCnt = (srcALen + srcBLen - 1U) >> 2; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** while (blkCnt > 0) 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Initialze temporary scratch pointer as scratch1 */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pScr1 = pScratch; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Clear Accumlators */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc0 = 0; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc1 = 0; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc2 = 0; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc3 = 0; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Read two samples from scratch1 buffer */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** x2 = read_q15x2_ia (&pScr1); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** tapCnt = (srcBLen) >> 2U; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** while (tapCnt > 0U) 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Read four samples from smaller buffer */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** y1 = read_q15x2_ia ((q15_t **) &pIn2); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** y2 = read_q15x2_ia ((q15_t **) &pIn2); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* multiply and accumlate */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc0 = __SMLALD(x1, y1, acc0); 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc2 = __SMLALD(x2, y1, acc2); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* pack input data */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #else 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #endif ARM GAS /tmp/ccJrAs6S.s page 784 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* multiply and accumlate */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc1 = __SMLALDX(x3, y1, acc1); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Read next two samples from scratch1 buffer */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** x1 = read_q15x2_ia (&pScr1); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* multiply and accumlate */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc0 = __SMLALD(x2, y2, acc0); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc2 = __SMLALD(x1, y2, acc2); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* pack input data */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #else 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #endif 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc3 = __SMLALDX(x3, y1, acc3); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc1 = __SMLALDX(x3, y2, acc1); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** x2 = read_q15x2_ia (&pScr1); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** x3 = __PKHBT(x2, x1, 0); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #else 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** x3 = __PKHBT(x1, x2, 0); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #endif 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc3 = __SMLALDX(x3, y2, acc3); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Decrement loop counter */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** tapCnt--; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** } 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Update scratch pointer for remaining samples of smaller length sequence */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pScr1 -= 4U; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* apply same above for remaining samples of smaller length sequence */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** tapCnt = (srcBLen) & 3U; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** while (tapCnt > 0U) 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* accumlate the results */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc0 += (*pScr1++ * *pIn2); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc1 += (*pScr1++ * *pIn2); 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc2 += (*pScr1++ * *pIn2); 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc3 += (*pScr1++ * *pIn2++); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pScr1 -= 3U; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Decrement loop counter */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** tapCnt--; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** } 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** blkCnt--; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 785 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Store the results in the accumulators in the destination buffer. */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** *pOut = (__SSAT(acc0 >> 15U, 16)); 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pOut += inc; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** *pOut = (__SSAT(acc1 >> 15U, 16)); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pOut += inc; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** *pOut = (__SSAT(acc2 >> 15U, 16)); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pOut += inc; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** *pOut = (__SSAT(acc3 >> 15U, 16)); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pOut += inc; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Initialization of inputB pointer */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pIn2 = py; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pScratch += 4U; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** } 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Loop unrolling: Compute remaining outputs */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** blkCnt = (srcALen + srcBLen - 1U) & 0x3; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #else 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Initialize blkCnt with number of samples */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** blkCnt = (srcALen + srcBLen - 1U); 20204 .loc 41 286 0 20205 0052 3C44 add r4, r4, r7 20206 .LVL3265: 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20207 .loc 41 155 0 20208 0054 FFF7FEFF bl arm_fill_q15 20209 .LVL3266: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Calculate correlation for remaining samples of Bigger length sequence */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** while (blkCnt > 0) 20210 .loc 41 291 0 20211 0058 013C subs r4, r4, #1 20212 .LVL3267: 20213 005a 41D0 beq .L1428 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Initialze temporary scratch pointer as scratch1 */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pScr1 = pScratch; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Clear Accumlators */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc0 = 0; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** tapCnt = (srcBLen) >> 1U; 20214 .loc 41 299 0 20215 005c 7A08 lsrs r2, r7, #1 20216 005e 4FEA820A lsl r10, r2, #2 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** while (tapCnt > 0U) 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Read next two samples from scratch1 buffer */ ARM GAS /tmp/ccJrAs6S.s page 786 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Decrement loop counter */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** tapCnt--; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** } 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** tapCnt = (srcBLen) & 1U; 20217 .loc 41 312 0 20218 0062 07F0010B and fp, r7, #1 20219 .LVL3268: 20220 0066 08EB0A09 add r9, r8, r10 20221 006a DC46 mov ip, fp 20222 006c D646 mov lr, r10 20223 .LVL3269: 20224 .L1432: 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 20225 .loc 41 301 0 20226 006e 002A cmp r2, #0 20227 0070 39D0 beq .L1437 20228 0072 291D adds r1, r5, #4 20229 0074 08F10403 add r3, r8, #4 20230 0078 1046 mov r0, r2 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20231 .loc 41 297 0 20232 007a 4FF0000A mov r10, #0 20233 007e 4FF0000B mov fp, #0 20234 0082 2746 mov r7, r4 20235 0084 0092 str r2, [sp] 20236 0086 0D95 str r5, [sp, #52] 20237 .LVL3270: 20238 .L1434: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 20239 .loc 41 305 0 20240 0088 31F8042C ldrh r2, [r1, #-4] 20241 008c 33F8045C ldrh r5, [r3, #-4] 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20242 .loc 41 306 0 20243 0090 31F8024C ldrh r4, [r1, #-2] 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 20244 .loc 41 305 0 20245 0094 C2FB85AB smlalbb r10, fp, r2, r5 20246 .LVL3271: 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20247 .loc 41 306 0 20248 0098 33F8022C ldrh r2, [r3, #-2] 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 20249 .loc 41 301 0 20250 009c 0138 subs r0, r0, #1 20251 .LVL3272: 20252 009e 01F10401 add r1, r1, #4 20253 .LVL3273: 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20254 .loc 41 306 0 20255 00a2 C4FB82AB smlalbb r10, fp, r4, r2 20256 .LVL3274: 20257 00a6 03F10403 add r3, r3, #4 ARM GAS /tmp/ccJrAs6S.s page 787 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 20258 .loc 41 301 0 20259 00aa EDD1 bne .L1434 20260 00ac 0D9D ldr r5, [sp, #52] 20261 00ae 009A ldr r2, [sp] 20262 00b0 3C46 mov r4, r7 20263 00b2 05EB0E01 add r1, r5, lr 20264 .LVL3275: 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20265 .loc 41 306 0 20266 00b6 4B46 mov r3, r9 20267 .LVL3276: 20268 .L1433: 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* apply same above for remaining samples of smaller length sequence */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** while (tapCnt > 0U) 20269 .loc 41 315 0 20270 00b8 BCF1000F cmp ip, #0 20271 00bc 03D0 beq .L1435 20272 .LVL3277: 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* accumlate the results */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** acc0 += (*pScr1++ * *pIn2++); 20273 .loc 41 318 0 20274 00be 0988 ldrh r1, [r1] 20275 .LVL3278: 20276 00c0 1B88 ldrh r3, [r3] 20277 .LVL3279: 20278 00c2 C1FB83AB smlalbb r10, fp, r1, r3 20279 .LVL3280: 20280 .L1435: 20281 .LBB2064: 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Decrement loop counter */ 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** tapCnt--; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** } 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** blkCnt--; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* The result is in 2.30 format. Convert to 1.15 with saturation. 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** Then store the output in the destination buffer. */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** *pOut = (q15_t) (__SSAT((acc0 >> 15), 16)); 20282 .loc 41 328 0 20283 00c6 4FEADA33 lsr r3, r10, #15 20284 00ca 43EA4B43 orr r3, r3, fp, lsl #17 20285 .syntax unified 20286 @ 328 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15. 20287 00ce 03F30F03 ssat r3, #16, r3 20288 @ 0 "" 2 20289 .LVL3281: 20290 .thumb 20291 .syntax unified 20292 .LBE2064: 20293 00d2 3380 strh r3, [r6] @ movhi 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pOut += inc; 20294 .loc 41 329 0 20295 00d4 019B ldr r3, [sp, #4] ARM GAS /tmp/ccJrAs6S.s page 788 20296 .LVL3282: 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 20297 .loc 41 291 0 20298 00d6 013C subs r4, r4, #1 20299 .LVL3283: 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** /* Initialization of inputB pointer */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pIn2 = py; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** pScratch += 1U; 20300 .loc 41 334 0 20301 00d8 05F10205 add r5, r5, #2 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20302 .loc 41 329 0 20303 00dc 1E44 add r6, r6, r3 20304 .LVL3284: 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 20305 .loc 41 291 0 20306 00de C6D1 bne .L1432 20307 .LVL3285: 20308 .L1428: 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** } 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** } 20309 .loc 41 337 0 20310 00e0 03B0 add sp, sp, #12 20311 .LCFI117: 20312 .cfi_remember_state 20313 .cfi_def_cfa_offset 36 20314 @ sp needed 20315 00e2 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 20316 .LVL3286: 20317 .L1437: 20318 .LCFI118: 20319 .cfi_restore_state 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** { 20320 .loc 41 301 0 20321 00e6 4346 mov r3, r8 20322 00e8 2946 mov r1, r5 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20323 .loc 41 297 0 20324 00ea 4FF0000A mov r10, #0 20325 00ee 4FF0000B mov fp, #0 20326 00f2 E1E7 b .L1433 20327 .LVL3287: 20328 .L1429: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20329 .loc 41 133 0 20330 00f4 03F10043 add r3, r3, #-2147483648 20331 .LVL3288: 20332 00f8 023B subs r3, r3, #2 20333 00fa 2344 add r3, r3, r4 20334 00fc 2246 mov r2, r4 20335 .LVL3289: 20336 00fe 6FF00101 mvn r1, #1 20337 .LVL3290: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 789 20338 .loc 41 121 0 20339 0102 C346 mov fp, r8 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20340 .loc 41 133 0 20341 0104 06EB4306 add r6, r6, r3, lsl #1 20342 .LVL3291: 20343 0108 3C46 mov r4, r7 20344 .LVL3292: 20345 010a 7B00 lsls r3, r7, #1 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20346 .loc 41 124 0 20347 010c 8046 mov r8, r0 20348 .LVL3293: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c **** 20349 .loc 41 133 0 20350 010e 0191 str r1, [sp, #4] 20351 0110 1746 mov r7, r2 20352 0112 86E7 b .L1430 20353 .cfi_endproc 20354 .LFE186: 20356 .section .text.arm_correlate_opt_q7,"ax",%progbits 20357 .align 1 20358 .p2align 2,,3 20359 .global arm_correlate_opt_q7 20360 .syntax unified 20361 .thumb 20362 .thumb_func 20363 .fpu fpv4-sp-d16 20365 arm_correlate_opt_q7: 20366 .LFB187: 20367 .file 42 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * Title: arm_correlate_opt_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * Description: Correlation of Q7 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * limitations under the License. ARM GAS /tmp/ccJrAs6S.s page 790 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @addtogroup Corr 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @brief Correlation of Q7 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @param[out] pDst points to the location where the output result is written. Length 2 * 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @return none 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** @par Scaling and Overflow Behavior 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** The function is implemented using a 32-bit internal accumulator. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** Both the inputs are represented in 1.7 format and multiplications yield a 2.14 r 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 f 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** This approach provides 17 guard bits and there is no risk of overflow as long as 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits a 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** void arm_correlate_opt_q7( 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** const q7_t * pSrcA, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** uint32_t srcALen, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** const q7_t * pSrcB, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** uint32_t srcBLen, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** q7_t * pDst, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** q15_t * pScratch1, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** q15_t * pScratch2) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20368 .loc 42 67 0 20369 .cfi_startproc 20370 @ args = 12, pretend = 0, frame = 56 20371 @ frame_needed = 0, uses_anonymous_args = 0 20372 .LVL3294: 20373 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 20374 .LCFI119: 20375 .cfi_def_cfa_offset 36 20376 .cfi_offset 4, -36 20377 .cfi_offset 5, -32 20378 .cfi_offset 6, -28 20379 .cfi_offset 7, -24 20380 .cfi_offset 8, -20 20381 .cfi_offset 9, -16 20382 .cfi_offset 10, -12 20383 .cfi_offset 11, -8 ARM GAS /tmp/ccJrAs6S.s page 791 20384 .cfi_offset 14, -4 20385 0004 0C46 mov r4, r1 20386 0006 8FB0 sub sp, sp, #60 20387 .LCFI120: 20388 .cfi_def_cfa_offset 96 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** q15_t x4; /* Temporary input variable */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** q15_t *py; /* Temporary input2 pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** q31_t acc0, acc1, acc2, acc3; /* Accumulators */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** const q7_t *pIn1, *pIn2; /* InputA and inputB pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** uint32_t j, k, blkCnt, tapCnt; /* Loop counter */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** int32_t inc = 1; /* Output pointer increment */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** uint32_t outBlockSize; /* Loop counter */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** q31_t x1, x2, x3, y1; /* Temporary input variables */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** q7_t *pOut = pDst; /* Output pointer */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* srcB is always made to slide across srcA. */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* But CORR(x, y) is reverse of CORR(y, x) */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* and the destination pointer modifier, inc is set to -1 */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* But to improve the performance, 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * we include zeroes in the output instead of zero padding either of the the inputs*/ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* If srcALen > srcBLen, 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* If srcALen < srcBLen, 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** if (srcALen >= srcBLen) 20389 .loc 42 93 0 20390 0008 9C42 cmp r4, r3 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch */ 20391 .loc 42 67 0 20392 000a 0793 str r3, [sp, #28] 20393 000c 0546 mov r5, r0 20394 .LVL3295: 20395 000e 1899 ldr r1, [sp, #96] 20396 .LVL3296: 20397 .loc 42 93 0 20398 0010 C0F08C81 bcc .L1444 20399 .LVL3297: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Initialization of inputA pointer */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pIn1 = pSrcA; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Initialization of inputB pointer */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pIn2 = pSrcB; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Number of output samples is calculated */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** outBlockSize = (srcALen * 2U) - 1U; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* When srcALen > srcBLen, zero padding is done to srcB 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * to make their lengths equal. 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * Instead, (outBlockSize - (srcALen + srcBLen - 1)) 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** * number of output samples are made zero */ ARM GAS /tmp/ccJrAs6S.s page 792 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** j = outBlockSize - (srcALen + (srcBLen - 1U)); 20400 .loc 42 108 0 20401 0014 E31A subs r3, r4, r3 20402 .LVL3298: 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Updating the pointer position to non zero value */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut += j; 20403 .loc 42 111 0 20404 0016 CB18 adds r3, r1, r3 20405 0018 0B93 str r3, [sp, #44] 20406 .LVL3299: 20407 001a 0123 movs r3, #1 20408 .LVL3300: 20409 001c 0493 str r3, [sp, #16] 20410 001e 079B ldr r3, [sp, #28] 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** else 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Initialization of inputA pointer */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pIn1 = pSrcB; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Initialization of inputB pointer */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pIn2 = pSrcA; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** j = srcBLen; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** srcBLen = srcALen; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** srcALen = j; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* CORR(x, y) = Reverse order(CORR(y, x)) */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Hence set the destination pointer to point to the last output sample */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut = pDst + ((srcALen + srcBLen) - 2U); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Destination address modifier is set to -1 */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** inc = -1; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Copy (srcBLen) samples in scratch buffer */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** k = srcBLen >> 2U; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* First part of the processing with loop unrolling copies 4 data points at a time. 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** a second loop below copies for the remaining 1 to 3 samples. */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** while (k > 0U) 20411 .loc 42 140 0 20412 0020 9908 lsrs r1, r3, #2 20413 .LVL3301: 20414 0022 0591 str r1, [sp, #20] 20415 0024 00F09581 beq .L1464 20416 .LVL3302: 20417 .L1510: 20418 0028 8F00 lsls r7, r1, #2 20419 002a 1A99 ldr r1, [sp, #104] 20420 002c 131D adds r3, r2, #4 20421 002e DE19 adds r6, r3, r7 20422 0030 0831 adds r1, r1, #8 20423 .LVL3303: ARM GAS /tmp/ccJrAs6S.s page 793 20424 .L1447: 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* copy second buffer in reversal manner */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x4 = (q15_t) *pIn2++; 20425 .loc 42 143 0 20426 0032 13F9040C ldrsb r0, [r3, #-4] 20427 0036 21F8080C strh r0, [r1, #-8] @ movhi 20428 .LVL3304: 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pScr2++ = x4; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x4 = (q15_t) *pIn2++; 20429 .loc 42 145 0 20430 003a 13F9030C ldrsb r0, [r3, #-3] 20431 003e 21F8060C strh r0, [r1, #-6] @ movhi 20432 .LVL3305: 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pScr2++ = x4; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x4 = (q15_t) *pIn2++; 20433 .loc 42 147 0 20434 0042 13F9020C ldrsb r0, [r3, #-2] 20435 0046 21F8040C strh r0, [r1, #-4] @ movhi 20436 .LVL3306: 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pScr2++ = x4; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x4 = (q15_t) *pIn2++; 20437 .loc 42 149 0 20438 004a 13F9010C ldrsb r0, [r3, #-1] 20439 004e 21F8020C strh r0, [r1, #-2] @ movhi 20440 .LVL3307: 20441 0052 0433 adds r3, r3, #4 20442 .LVL3308: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20443 .loc 42 140 0 20444 0054 9E42 cmp r6, r3 20445 0056 01F10801 add r1, r1, #8 20446 .LVL3309: 20447 005a EAD1 bne .L1447 20448 005c 1A9B ldr r3, [sp, #104] 20449 .LVL3310: 20450 005e 0599 ldr r1, [sp, #20] 20451 .LVL3311: 20452 0060 3A44 add r2, r2, r7 20453 0062 03EBC103 add r3, r3, r1, lsl #3 20454 .LVL3312: 20455 .L1446: 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pScr2++ = x4; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Decrement loop counter */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** k--; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* If the count is not a multiple of 4, copy remaining samples here. 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** No loop unrolling is used. */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** k = srcBLen % 0x4U; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** while (k > 0U) 20456 .loc 42 160 0 20457 0066 0799 ldr r1, [sp, #28] 20458 0068 11F00300 ands r0, r1, #3 20459 .LVL3313: ARM GAS /tmp/ccJrAs6S.s page 794 20460 006c 0190 str r0, [sp, #4] 20461 006e 0CD0 beq .L1448 20462 .LVL3314: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* copy second buffer in reversal manner for remaining samples */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x4 = (q15_t) *pIn2++; 20463 .loc 42 163 0 20464 0070 92F90010 ldrsb r1, [r2] 20465 0074 1980 strh r1, [r3] @ movhi 20466 .LVL3315: 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20467 .loc 42 160 0 20468 0076 0128 cmp r0, #1 20469 0078 07D0 beq .L1448 20470 .LVL3316: 20471 .loc 42 163 0 20472 007a 92F90110 ldrsb r1, [r2, #1] 20473 007e 5980 strh r1, [r3, #2] @ movhi 20474 .LVL3317: 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20475 .loc 42 160 0 20476 0080 0228 cmp r0, #2 20477 .LVL3318: 20478 .loc 42 163 0 20479 0082 1CBF itt ne 20480 0084 92F90220 ldrsbne r2, [r2, #2] 20481 .LVL3319: 20482 0088 9A80 strhne r2, [r3, #4] @ movhi 20483 .LVL3320: 20484 .L1448: 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pScr2++ = x4; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Decrement loop counter */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** k--; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Fill (srcBLen - 1U) zeros in scratch buffer */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 20485 .loc 42 171 0 20486 008a 079F ldr r7, [sp, #28] 20487 008c 1999 ldr r1, [sp, #100] 20488 008e 7E1E subs r6, r7, #1 20489 0090 3246 mov r2, r6 20490 0092 0020 movs r0, #0 20491 0094 FFF7FEFF bl arm_fill_q15 20492 .LVL3321: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Update temporary scratch pointer */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pScr1 += (srcBLen - 1U); 20493 .loc 42 174 0 20494 0098 07F10041 add r1, r7, #-2147483648 20495 009c 199B ldr r3, [sp, #100] 20496 009e 0139 subs r1, r1, #1 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Copy (srcALen) samples in scratch buffer */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Apply loop unrolling and do 4 Copies simultaneously. */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** k = srcALen >> 2U; ARM GAS /tmp/ccJrAs6S.s page 795 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* First part of the processing with loop unrolling copies 4 data points at a time. 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** a second loop below copies for the remaining 1 to 3 samples. */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** while (k > 0U) 20497 .loc 42 182 0 20498 00a0 5FEA940C lsrs ip, r4, #2 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 20499 .loc 42 174 0 20500 00a4 03EB4101 add r1, r3, r1, lsl #1 20501 .LVL3322: 20502 .loc 42 182 0 20503 00a8 1ED0 beq .L1449 20504 00aa 2B1D adds r3, r5, #4 20505 00ac 4FEA8C0E lsl lr, ip, #2 20506 00b0 03EB0E07 add r7, r3, lr 20507 00b4 01F10802 add r2, r1, #8 20508 .LVL3323: 20509 .L1450: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* copy second buffer in reversal manner */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x4 = (q15_t) *pIn1++; 20510 .loc 42 185 0 20511 00b8 13F9040C ldrsb r0, [r3, #-4] 20512 00bc 22F8080C strh r0, [r2, #-8] @ movhi 20513 .LVL3324: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pScr1++ = x4; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x4 = (q15_t) *pIn1++; 20514 .loc 42 187 0 20515 00c0 13F9030C ldrsb r0, [r3, #-3] 20516 00c4 22F8060C strh r0, [r2, #-6] @ movhi 20517 .LVL3325: 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pScr1++ = x4; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x4 = (q15_t) *pIn1++; 20518 .loc 42 189 0 20519 00c8 13F9020C ldrsb r0, [r3, #-2] 20520 00cc 22F8040C strh r0, [r2, #-4] @ movhi 20521 .LVL3326: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pScr1++ = x4; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x4 = (q15_t) *pIn1++; 20522 .loc 42 191 0 20523 00d0 13F9010C ldrsb r0, [r3, #-1] 20524 00d4 22F8020C strh r0, [r2, #-2] @ movhi 20525 .LVL3327: 20526 00d8 0433 adds r3, r3, #4 20527 .LVL3328: 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20528 .loc 42 182 0 20529 00da 9F42 cmp r7, r3 20530 00dc 02F10802 add r2, r2, #8 20531 .LVL3329: 20532 00e0 EAD1 bne .L1450 20533 00e2 7544 add r5, r5, lr 20534 00e4 01EBCC01 add r1, r1, ip, lsl #3 20535 .LVL3330: 20536 .L1449: 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pScr1++ = x4; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 796 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Decrement loop counter */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** k--; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* If the count is not a multiple of 4, copy remaining samples here. 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** No loop unrolling is used. */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** k = srcALen % 0x4U; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** while (k > 0U) 20537 .loc 42 202 0 20538 00e8 14F00303 ands r3, r4, #3 20539 .LVL3331: 20540 00ec 0ED0 beq .L1451 20541 .LVL3332: 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* copy second buffer in reversal manner for remaining samples */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x4 = (q15_t) * pIn1++; 20542 .loc 42 205 0 20543 00ee 95F90020 ldrsb r2, [r5] 20544 00f2 0A80 strh r2, [r1] @ movhi 20545 .LVL3333: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20546 .loc 42 202 0 20547 00f4 012B cmp r3, #1 20548 00f6 07D0 beq .L1452 20549 .LVL3334: 20550 .loc 42 205 0 20551 00f8 95F90120 ldrsb r2, [r5, #1] 20552 00fc 4A80 strh r2, [r1, #2] @ movhi 20553 .LVL3335: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20554 .loc 42 202 0 20555 00fe 022B cmp r3, #2 20556 .LVL3336: 20557 .loc 42 205 0 20558 0100 1CBF itt ne 20559 0102 95F90220 ldrsbne r2, [r5, #2] 20560 0106 8A80 strhne r2, [r1, #4] @ movhi 20561 .LVL3337: 20562 .L1452: 20563 0108 01EB4301 add r1, r1, r3, lsl #1 20564 .L1451: 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pScr1++ = x4; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Decrement the loop counter */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** k--; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** arm_fill_q15(0, pScr1, (srcBLen - 1U)); 20565 .loc 42 213 0 20566 010c 3246 mov r2, r6 20567 010e 0020 movs r0, #0 20568 0110 FFF7FEFF bl arm_fill_q15 20569 .LVL3338: 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Update pointer */ ARM GAS /tmp/ccJrAs6S.s page 797 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pScr1 += (srcBLen - 1U); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Temporary pointer for scratch2 */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** py = pScratch2; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Initialization of pScr2 pointer */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pScr2 = pScratch2; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Actual correlation process starts here */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** blkCnt = (srcALen + srcBLen - 1U) >> 2; 20570 .loc 42 225 0 20571 0114 079B ldr r3, [sp, #28] 20572 0116 1C44 add r4, r4, r3 20573 .LVL3339: 20574 0118 631E subs r3, r4, #1 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** while (blkCnt > 0) 20575 .loc 42 227 0 20576 011a 9A08 lsrs r2, r3, #2 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 20577 .loc 42 225 0 20578 011c 0C93 str r3, [sp, #48] 20579 .LVL3340: 20580 .loc 42 227 0 20581 011e 0D92 str r2, [sp, #52] 20582 0120 00F0B780 beq .L1453 20583 0124 059B ldr r3, [sp, #20] 20584 0126 1A99 ldr r1, [sp, #104] 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Initialze temporary scratch pointer as scratch1 */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pScr1 = pScratch1; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Clear Accumlators */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc0 = 0; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc1 = 0; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc2 = 0; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc3 = 0; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Read two samples from scratch1 buffer */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x1 = read_q15x2_ia (&pScr1); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Read next two samples from scratch1 buffer */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x2 = read_q15x2_ia (&pScr1); 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** tapCnt = (srcBLen) >> 2U; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** while (tapCnt > 0U) 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Read four samples from smaller buffer */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** y1 = read_q15x2_ia (&pScr2); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* multiply and accumlate */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc0 = __SMLAD(x1, y1, acc0); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc2 = __SMLAD(x2, y1, acc2); 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* pack input data */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** #ifndef ARM_MATH_BIG_ENDIAN ARM GAS /tmp/ccJrAs6S.s page 798 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x3 = __PKHBT(x2, x1, 0); 20585 .loc 42 257 0 20586 0128 DFF834A2 ldr r10, .L1511 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20587 .loc 42 227 0 20588 012c DDF82C90 ldr r9, [sp, #44] 20589 0130 0292 str r2, [sp, #8] 20590 0132 DB00 lsls r3, r3, #3 20591 0134 1944 add r1, r1, r3 20592 0136 0833 adds r3, r3, #8 20593 0138 0A93 str r3, [sp, #40] 20594 013a 049B ldr r3, [sp, #16] 20595 013c 0991 str r1, [sp, #36] 20596 013e 03EB4301 add r1, r3, r3, lsl #1 20597 0142 9B00 lsls r3, r3, #2 20598 0144 0693 str r3, [sp, #24] 20599 0146 199B ldr r3, [sp, #100] 20600 0148 0891 str r1, [sp, #32] 20601 014a 0093 str r3, [sp] 20602 .LVL3341: 20603 .L1457: 20604 014c 009B ldr r3, [sp] 20605 014e 1A46 mov r2, r3 20606 0150 0832 adds r2, r2, #8 20607 0152 0392 str r2, [sp, #12] 20608 0154 1746 mov r7, r2 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20609 .loc 42 246 0 20610 0156 059A ldr r2, [sp, #20] 20611 .LBB2065: 20612 .LBB2066: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20613 .loc 3 928 0 20614 0158 1968 ldr r1, [r3] @ unaligned 20615 .LVL3342: 20616 .LBE2066: 20617 .LBE2065: 20618 .LBB2067: 20619 .LBB2068: 20620 015a 5D68 ldr r5, [r3, #4] @ unaligned 20621 .LVL3343: 20622 .LBE2068: 20623 .LBE2067: 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20624 .loc 42 246 0 20625 015c 002A cmp r2, #0 20626 015e 00F0DF80 beq .L1465 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 20627 .loc 42 236 0 20628 0162 0023 movs r3, #0 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20629 .loc 42 246 0 20630 0164 DDF868C0 ldr ip, [sp, #104] 20631 0168 CB46 mov fp, r9 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc3 = 0; 20632 .loc 42 235 0 20633 016a 9846 mov r8, r3 ARM GAS /tmp/ccJrAs6S.s page 799 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc2 = 0; 20634 .loc 42 234 0 20635 016c 1846 mov r0, r3 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc1 = 0; 20636 .loc 42 233 0 20637 016e 1E46 mov r6, r3 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20638 .loc 42 246 0 20639 0170 9146 mov r9, r2 20640 .LVL3344: 20641 .L1455: 20642 .LBB2069: 20643 .LBB2070: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20644 .loc 3 928 0 20645 0172 DCF80020 ldr r2, [ip] @ unaligned 20646 .LVL3345: 20647 .LBE2070: 20648 .LBE2069: 20649 .LBB2071: 20650 .LBB2072: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20651 .loc 6 1993 0 20652 .syntax unified 20653 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20654 0176 21FB0266 smlad r6, r1, r2, r6 20655 @ 0 "" 2 20656 .LVL3346: 20657 .thumb 20658 .syntax unified 20659 .LBE2072: 20660 .LBE2071: 20661 .LBB2073: 20662 .LBB2074: 20663 .syntax unified 20664 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20665 017a 25FB0288 smlad r8, r5, r2, r8 20666 @ 0 "" 2 20667 .LVL3347: 20668 .thumb 20669 .syntax unified 20670 .LBE2074: 20671 .LBE2073: 20672 .loc 42 257 0 20673 017e 01EA0A01 and r1, r1, r10 20674 .LVL3348: 20675 0182 1FFA85FE uxth lr, r5 20676 0186 4EEA0101 orr r1, lr, r1 20677 .LBB2075: 20678 .LBB2076: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20679 .loc 6 2001 0 20680 .syntax unified 20681 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20682 018a 21FB1200 smladx r0, r1, r2, r0 20683 @ 0 "" 2 20684 .LVL3349: ARM GAS /tmp/ccJrAs6S.s page 800 20685 .thumb 20686 .syntax unified 20687 .LBE2076: 20688 .LBE2075: 20689 .LBB2077: 20690 .LBB2078: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20691 .loc 3 928 0 20692 018e 3968 ldr r1, [r7] @ unaligned 20693 .LVL3350: 20694 .LBE2078: 20695 .LBE2077: 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** #else 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x3 = __PKHBT(x1, x2, 0); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** #endif 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* multiply and accumlate */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc1 = __SMLADX(x3, y1, acc1); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Read next two samples from scratch1 buffer */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x1 = read_q15x2_ia (&pScr1); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* pack input data */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** #ifndef ARM_MATH_BIG_ENDIAN 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x3 = __PKHBT(x1, x2, 0); 20696 .loc 42 270 0 20697 0190 05EA0A04 and r4, r5, r10 20698 0194 1FFA81FE uxth lr, r1 20699 0198 4EEA040E orr lr, lr, r4 20700 .LVL3351: 20701 .LBB2079: 20702 .LBB2080: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20703 .loc 6 2001 0 20704 .syntax unified 20705 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20706 019c 2EFB1232 smladx r2, lr, r2, r3 20707 @ 0 "" 2 20708 .LVL3352: 20709 .thumb 20710 .syntax unified 20711 .LBE2080: 20712 .LBE2079: 20713 .LBB2081: 20714 .LBB2082: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20715 .loc 3 928 0 20716 01a0 DCF80440 ldr r4, [ip, #4] @ unaligned 20717 .LVL3353: 20718 01a4 0CF1080C add ip, ip, #8 20719 .LVL3354: 20720 .LBE2082: 20721 .LBE2081: 20722 .LBB2084: 20723 .LBB2085: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20724 .loc 6 1993 0 ARM GAS /tmp/ccJrAs6S.s page 801 20725 .syntax unified 20726 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20727 01a8 25FB0466 smlad r6, r5, r4, r6 20728 @ 0 "" 2 20729 .LVL3355: 20730 .thumb 20731 .syntax unified 20732 .LBE2085: 20733 .LBE2084: 20734 .LBB2086: 20735 .LBB2087: 20736 .syntax unified 20737 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20738 01ac 21FB0488 smlad r8, r1, r4, r8 20739 @ 0 "" 2 20740 .LVL3356: 20741 .thumb 20742 .syntax unified 20743 .LBE2087: 20744 .LBE2086: 20745 .LBB2088: 20746 .LBB2089: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20747 .loc 6 2001 0 20748 .syntax unified 20749 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20750 01b0 2EFB1400 smladx r0, lr, r4, r0 20751 @ 0 "" 2 20752 .LVL3357: 20753 .thumb 20754 .syntax unified 20755 .LBE2089: 20756 .LBE2088: 20757 .LBB2090: 20758 .LBB2091: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20759 .loc 3 928 0 20760 01b4 7D68 ldr r5, [r7, #4] @ unaligned 20761 .LVL3358: 20762 .LBE2091: 20763 .LBE2090: 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** #else 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x3 = __PKHBT(x2, x1, 0); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** #endif 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc3 = __SMLADX(x3, y1, acc3); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Read four samples from smaller buffer */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** y1 = read_q15x2_ia (&pScr2); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc0 = __SMLAD(x2, y1, acc0); 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc2 = __SMLAD(x1, y1, acc2); 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc1 = __SMLADX(x3, y1, acc1); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x2 = read_q15x2_ia (&pScr1); ARM GAS /tmp/ccJrAs6S.s page 802 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** #ifndef ARM_MATH_BIG_ENDIAN 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x3 = __PKHBT(x2, x1, 0); 20764 .loc 42 289 0 20765 01b6 01EA0A0E and lr, r1, r10 20766 .LVL3359: 20767 01ba ABB2 uxth r3, r5 20768 01bc 0837 adds r7, r7, #8 20769 .LVL3360: 20770 01be 43EA0E03 orr r3, r3, lr 20771 .LBB2092: 20772 .LBB2093: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20773 .loc 6 2001 0 20774 .syntax unified 20775 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20776 01c2 23FB1423 smladx r3, r3, r4, r2 20777 @ 0 "" 2 20778 .LVL3361: 20779 .thumb 20780 .syntax unified 20781 .LBE2093: 20782 .LBE2092: 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20783 .loc 42 246 0 20784 01c6 B9F10109 subs r9, r9, #1 20785 .LVL3362: 20786 01ca D2D1 bne .L1455 20787 01cc 0A99 ldr r1, [sp, #40] 20788 .LVL3363: 20789 01ce 009A ldr r2, [sp] 20790 01d0 0A44 add r2, r2, r1 20791 .LBB2094: 20792 .LBB2083: 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 20793 .loc 3 933 0 20794 01d2 0999 ldr r1, [sp, #36] 20795 01d4 D946 mov r9, fp 20796 .LVL3364: 20797 01d6 1746 mov r7, r2 20798 .LVL3365: 20799 .L1454: 20800 .LBE2083: 20801 .LBE2094: 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** #else 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** x3 = __PKHBT(x1, x2, 0); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** #endif 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc3 = __SMLADX(x3, y1, acc3); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Decrement loop counter */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** tapCnt--; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Update scratch pointer for remaining samples of smaller length sequence */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pScr1 -= 4U; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 803 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* apply same above for remaining samples of smaller length sequence */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** tapCnt = (srcBLen) & 3U; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** while (tapCnt > 0U) 20802 .loc 42 306 0 20803 01d8 019A ldr r2, [sp, #4] 20804 01da 72B3 cbz r2, .L1456 20805 .LVL3366: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* accumlate the results */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc0 += (*pScr1++ * *pScr2); 20806 .loc 42 309 0 20807 01dc B1F90020 ldrsh r2, [r1] 20808 01e0 37F808EC ldrh lr, [r7, #-8] 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 20809 .loc 42 310 0 20810 01e4 37F906CC ldrsh ip, [r7, #-6] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc2 += (*pScr1++ * *pScr2); 20811 .loc 42 311 0 20812 01e8 37F9045C ldrsh r5, [r7, #-4] 20813 .LVL3367: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc3 += (*pScr1++ * *pScr2++); 20814 .loc 42 312 0 20815 01ec 37F9024C ldrsh r4, [r7, #-2] 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 20816 .loc 42 309 0 20817 01f0 1EFB0266 smlabb r6, lr, r2, r6 20818 .LVL3368: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc2 += (*pScr1++ * *pScr2); 20819 .loc 42 310 0 20820 01f4 02FB0C00 mla r0, r2, ip, r0 20821 .LVL3369: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc3 += (*pScr1++ * *pScr2++); 20822 .loc 42 311 0 20823 01f8 02FB0588 mla r8, r2, r5, r8 20824 .LVL3370: 20825 .loc 42 312 0 20826 01fc 02FB0433 mla r3, r2, r4, r3 20827 .LVL3371: 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20828 .loc 42 306 0 20829 0200 019A ldr r2, [sp, #4] 20830 0202 012A cmp r2, #1 20831 0204 19D0 beq .L1456 20832 .LVL3372: 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 20833 .loc 42 309 0 20834 0206 B1F90220 ldrsh r2, [r1, #2] 20835 .loc 42 312 0 20836 020a B7F900E0 ldrsh lr, [r7] 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 20837 .loc 42 309 0 20838 020e 0CFB0266 mla r6, ip, r2, r6 20839 .LVL3373: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc2 += (*pScr1++ * *pScr2); 20840 .loc 42 310 0 20841 0212 05FB0200 mla r0, r5, r2, r0 ARM GAS /tmp/ccJrAs6S.s page 804 20842 .LVL3374: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc3 += (*pScr1++ * *pScr2++); 20843 .loc 42 311 0 20844 0216 04FB0288 mla r8, r4, r2, r8 20845 .LVL3375: 20846 .loc 42 312 0 20847 021a 02FB0E33 mla r3, r2, lr, r3 20848 .LVL3376: 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20849 .loc 42 306 0 20850 021e 019A ldr r2, [sp, #4] 20851 0220 022A cmp r2, #2 20852 0222 0AD0 beq .L1456 20853 .LVL3377: 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 20854 .loc 42 309 0 20855 0224 B1F90420 ldrsh r2, [r1, #4] 20856 .loc 42 312 0 20857 0228 7988 ldrh r1, [r7, #2] 20858 .LVL3378: 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc1 += (*pScr1++ * *pScr2); 20859 .loc 42 309 0 20860 022a 05FB0266 mla r6, r5, r2, r6 20861 .LVL3379: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc2 += (*pScr1++ * *pScr2); 20862 .loc 42 310 0 20863 022e 04FB0200 mla r0, r4, r2, r0 20864 .LVL3380: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc3 += (*pScr1++ * *pScr2++); 20865 .loc 42 311 0 20866 0232 0EFB0288 mla r8, lr, r2, r8 20867 .LVL3381: 20868 .loc 42 312 0 20869 0236 12FB0133 smlabb r3, r2, r1, r3 20870 .LVL3382: 20871 .L1456: 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pScr1 -= 3U; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Decrement loop counter */ 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** tapCnt--; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** blkCnt--; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pOut = (q7_t) (__SSAT(acc0 >> 7U, 8)); 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut += inc; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pOut = (q7_t) (__SSAT(acc1 >> 7U, 8)); 20872 .loc 42 325 0 20873 023a 049A ldr r2, [sp, #16] 20874 .LBB2095: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut += inc; 20875 .loc 42 323 0 20876 023c F611 asrs r6, r6, #7 20877 .LVL3383: 20878 .LBE2095: ARM GAS /tmp/ccJrAs6S.s page 805 20879 .LBB2096: 20880 .loc 42 325 0 20881 023e C011 asrs r0, r0, #7 20882 .LVL3384: 20883 .LBE2096: 20884 .LBB2097: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut += inc; 20885 .loc 42 323 0 20886 .syntax unified 20887 @ 323 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c 20888 0240 06F30706 ssat r6, #8, r6 20889 @ 0 "" 2 20890 .LVL3385: 20891 .thumb 20892 .syntax unified 20893 .LBE2097: 20894 .LBB2098: 20895 .loc 42 325 0 20896 .syntax unified 20897 @ 325 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c 20898 0244 00F30700 ssat r0, #8, r0 20899 @ 0 "" 2 20900 .thumb 20901 .syntax unified 20902 .LBE2098: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut += inc; 20903 .loc 42 323 0 20904 0248 89F80060 strb r6, [r9] 20905 .LVL3386: 20906 .LBB2099: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut += inc; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pOut = (q7_t) (__SSAT(acc2 >> 7U, 8)); 20907 .loc 42 327 0 20908 024c 4FEAE818 asr r8, r8, #7 20909 .LVL3387: 20910 .LBE2099: 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut += inc; 20911 .loc 42 325 0 20912 0250 09F80200 strb r0, [r9, r2] 20913 .LVL3388: 20914 .LBB2100: 20915 .loc 42 327 0 20916 .syntax unified 20917 @ 327 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c 20918 0254 08F30708 ssat r8, #8, r8 20919 @ 0 "" 2 20920 .LVL3389: 20921 .thumb 20922 .syntax unified 20923 .LBE2100: 20924 0258 09F81280 strb r8, [r9, r2, lsl #1] 20925 .LVL3390: 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut += inc; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pOut = (q7_t) (__SSAT(acc3 >> 7U, 8)); 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut += inc; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Initialization of inputB pointer */ ARM GAS /tmp/ccJrAs6S.s page 806 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pScr2 = py; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pScratch1 += 4U; 20926 .loc 42 335 0 20927 025c 039A ldr r2, [sp, #12] 20928 .LVL3391: 20929 025e 0092 str r2, [sp] 20930 .LVL3392: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut += inc; 20931 .loc 42 329 0 20932 0260 089A ldr r2, [sp, #32] 20933 .LBB2101: 20934 0262 DB11 asrs r3, r3, #7 20935 .LVL3393: 20936 .syntax unified 20937 @ 329 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c 20938 0264 03F30703 ssat r3, #8, r3 20939 @ 0 "" 2 20940 .LVL3394: 20941 .thumb 20942 .syntax unified 20943 .LBE2101: 20944 0268 09F80230 strb r3, [r9, r2] 20945 026c 069B ldr r3, [sp, #24] 20946 .LVL3395: 20947 026e 9944 add r9, r9, r3 20948 .LVL3396: 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20949 .loc 42 227 0 20950 0270 029B ldr r3, [sp, #8] 20951 0272 013B subs r3, r3, #1 20952 .LVL3397: 20953 0274 0293 str r3, [sp, #8] 20954 0276 7FF469AF bne .L1457 20955 027a 199B ldr r3, [sp, #100] 20956 .LVL3398: 20957 027c 1946 mov r1, r3 20958 027e 0D9B ldr r3, [sp, #52] 20959 0280 01EBC302 add r2, r1, r3, lsl #3 20960 0284 1992 str r2, [sp, #100] 20961 0286 0B99 ldr r1, [sp, #44] 20962 0288 069A ldr r2, [sp, #24] 20963 028a 02FB0313 mla r3, r2, r3, r1 20964 028e 0B93 str r3, [sp, #44] 20965 0290 0C9B ldr r3, [sp, #48] 20966 .LVL3399: 20967 .L1453: 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** blkCnt = (srcALen + srcBLen - 1U) & 0x3; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Calculate correlation for remaining samples of Bigger length sequence */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** while (blkCnt > 0) 20968 .loc 42 341 0 20969 0292 13F0030C ands ip, r3, #3 20970 0296 3DD0 beq .L1443 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { ARM GAS /tmp/ccJrAs6S.s page 807 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Initialze temporary scratch pointer as scratch1 */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pScr1 = pScratch1; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Clear Accumlators */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc0 = 0; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** tapCnt = (srcBLen) >> 1U; 20971 .loc 42 349 0 20972 0298 079B ldr r3, [sp, #28] 20973 029a 199A ldr r2, [sp, #100] 20974 029c DDF82CB0 ldr fp, [sp, #44] 20975 02a0 4FEA530E lsr lr, r3, #1 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** while (tapCnt > 0U) 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc0 += (*pScr1++ * *pScr2++); 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc0 += (*pScr1++ * *pScr2++); 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Decrement loop counter */ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** tapCnt--; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** tapCnt = (srcBLen) & 1U; 20976 .loc 42 360 0 20977 02a4 03F00107 and r7, r3, #1 20978 02a8 1A9B ldr r3, [sp, #104] 20979 02aa 4FEA8E08 lsl r8, lr, #2 20980 02ae 02EB4C0C add ip, r2, ip, lsl #1 20981 02b2 03EB0809 add r9, r3, r8 20982 02b6 9246 mov r10, r2 20983 .LVL3400: 20984 .L1459: 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 20985 .loc 42 351 0 20986 02b8 BEF1000F cmp lr, #0 20987 02bc 4BD0 beq .L1466 20988 02be 1A9B ldr r3, [sp, #104] 20989 02c0 0AF10404 add r4, r10, #4 20990 02c4 181D adds r0, r3, #4 20991 02c6 7546 mov r5, lr 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 20992 .loc 42 347 0 20993 02c8 0023 movs r3, #0 20994 .LVL3401: 20995 .L1461: 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc0 += (*pScr1++ * *pScr2++); 20996 .loc 42 353 0 20997 02ca 34F8042C ldrh r2, [r4, #-4] 20998 02ce 30F8046C ldrh r6, [r0, #-4] 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 20999 .loc 42 354 0 21000 02d2 34F8021C ldrh r1, [r4, #-2] 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc0 += (*pScr1++ * *pScr2++); 21001 .loc 42 353 0 21002 02d6 12FB0633 smlabb r3, r2, r6, r3 21003 .LVL3402: 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 808 21004 .loc 42 354 0 21005 02da 30F8022C ldrh r2, [r0, #-2] 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 21006 .loc 42 351 0 21007 02de 013D subs r5, r5, #1 21008 .LVL3403: 21009 02e0 04F10404 add r4, r4, #4 21010 .LVL3404: 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 21011 .loc 42 354 0 21012 02e4 11FB0233 smlabb r3, r1, r2, r3 21013 .LVL3405: 21014 02e8 00F10400 add r0, r0, #4 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 21015 .loc 42 351 0 21016 02ec EDD1 bne .L1461 21017 02ee 0AEB0802 add r2, r10, r8 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 21018 .loc 42 354 0 21019 02f2 4946 mov r1, r9 21020 .LVL3406: 21021 .L1460: 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* apply same above for remaining samples of smaller length sequence */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** while (tapCnt > 0U) 21022 .loc 42 363 0 21023 02f4 8FB1 cbz r7, .L1462 21024 .LVL3407: 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* accumlate the results */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc0 += (*pScr1++ * *pScr2++); 21025 .loc 42 366 0 21026 02f6 1288 ldrh r2, [r2] 21027 .LVL3408: 21028 02f8 0988 ldrh r1, [r1] 21029 .LVL3409: 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Decrement loop counter */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** tapCnt--; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** blkCnt--; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** *pOut = (q7_t) (__SSAT(acc0 >> 7U, 8)); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut += inc; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** /* Initialization of inputB pointer */ 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pScr2 = py; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pScratch1 += 1U; 21030 .loc 42 381 0 21031 02fa 0AF1020A add r10, r10, #2 21032 .LVL3410: 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 21033 .loc 42 366 0 21034 02fe 12FB0133 smlabb r3, r2, r1, r3 ARM GAS /tmp/ccJrAs6S.s page 809 21035 .LVL3411: 21036 .L1509: 21037 .LBB2102: 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** pOut += inc; 21038 .loc 42 375 0 21039 0302 DB11 asrs r3, r3, #7 21040 .syntax unified 21041 @ 375 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c 21042 0304 03F30703 ssat r3, #8, r3 21043 @ 0 "" 2 21044 .LVL3412: 21045 .thumb 21046 .syntax unified 21047 .LBE2102: 21048 0308 8BF80030 strb r3, [fp] 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 21049 .loc 42 376 0 21050 030c 049B ldr r3, [sp, #16] 21051 .LVL3413: 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 21052 .loc 42 341 0 21053 030e E245 cmp r10, ip 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 21054 .loc 42 376 0 21055 0310 9B44 add fp, fp, r3 21056 .LVL3414: 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 21057 .loc 42 341 0 21058 0312 D1D1 bne .L1459 21059 .LVL3415: 21060 .L1443: 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 21061 .loc 42 384 0 21062 0314 0FB0 add sp, sp, #60 21063 .LCFI121: 21064 .cfi_remember_state 21065 .cfi_def_cfa_offset 36 21066 @ sp needed 21067 0316 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 21068 .LVL3416: 21069 .L1462: 21070 .LCFI122: 21071 .cfi_restore_state 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** } 21072 .loc 42 381 0 21073 031a 0AF1020A add r10, r10, #2 21074 .LVL3417: 21075 031e F0E7 b .L1509 21076 .LVL3418: 21077 .L1465: 21078 0320 1646 mov r6, r2 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 21079 .loc 42 246 0 21080 0322 1A99 ldr r1, [sp, #104] 21081 .LVL3419: ARM GAS /tmp/ccJrAs6S.s page 810 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 21082 .loc 42 236 0 21083 0324 1346 mov r3, r2 21084 .LVL3420: 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc3 = 0; 21085 .loc 42 235 0 21086 0326 9046 mov r8, r2 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** acc2 = 0; 21087 .loc 42 234 0 21088 0328 1046 mov r0, r2 21089 032a 55E7 b .L1454 21090 .LVL3421: 21091 .L1444: 21092 032c 1F46 mov r7, r3 21093 .LVL3422: 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 21094 .loc 42 128 0 21095 032e 023B subs r3, r3, #2 21096 .LVL3423: 21097 0330 2344 add r3, r3, r4 21098 0332 CB18 adds r3, r1, r3 21099 0334 0646 mov r6, r0 21100 0336 0B93 str r3, [sp, #44] 21101 .LVL3424: 21102 0338 2046 mov r0, r4 21103 .LVL3425: 21104 033a 4FF0FF33 mov r3, #-1 21105 .LVL3426: 21106 033e 0493 str r3, [sp, #16] 21107 0340 0346 mov r3, r0 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 21108 .loc 42 140 0 21109 0342 9908 lsrs r1, r3, #2 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 21110 .loc 42 116 0 21111 0344 1546 mov r5, r2 21112 .LVL3427: 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 21113 .loc 42 128 0 21114 0346 3C46 mov r4, r7 21115 .LVL3428: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 21116 .loc 42 119 0 21117 0348 3246 mov r2, r6 21118 .LVL3429: 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 21119 .loc 42 128 0 21120 034a 0790 str r0, [sp, #28] 21121 .LVL3430: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 21122 .loc 42 140 0 21123 034c 0591 str r1, [sp, #20] 21124 034e 7FF46BAE bne .L1510 21125 .LVL3431: 21126 .L1464: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** q15_t x4; /* Temporary input variable */ 21127 .loc 42 69 0 ARM GAS /tmp/ccJrAs6S.s page 811 21128 0352 1A9B ldr r3, [sp, #104] 21129 0354 87E6 b .L1446 21130 .LVL3432: 21131 .L1466: 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** { 21132 .loc 42 351 0 21133 0356 1A99 ldr r1, [sp, #104] 21134 0358 5246 mov r2, r10 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c **** 21135 .loc 42 347 0 21136 035a 7346 mov r3, lr 21137 035c CAE7 b .L1460 21138 .L1512: 21139 035e 00BF .align 2 21140 .L1511: 21141 0360 0000FFFF .word -65536 21142 .cfi_endproc 21143 .LFE187: 21145 .section .text.arm_correlate_q15,"ax",%progbits 21146 .align 1 21147 .p2align 2,,3 21148 .global arm_correlate_q15 21149 .syntax unified 21150 .thumb 21151 .thumb_func 21152 .fpu fpv4-sp-d16 21154 arm_correlate_q15: 21155 .LFB188: 21156 .file 43 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Title: arm_correlate_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Description: Correlation of Q15 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 812 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @addtogroup Corr 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @brief Correlation of Q15 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @param[out] pDst points to the location where the output result is written. Length 2 * 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** The function is implemented using a 64-bit internal accumulator. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** Both inputs are in 1.15 format and multiplications yield a 2.30 result. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 f 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** This approach provides 33 guard bits and there is no risk of overflow. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @remark 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** @remark 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** Refer to \ref arm_correlate_opt_q15() for a faster implementation of this functi 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #if defined(ARM_MATH_MVEI) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #include "arm_helium_utils.h" 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #include "arm_vec_filtering.h" 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** void arm_correlate_q15( 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t * pSrcA, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t srcALen, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t * pSrcB, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t srcBLen, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** q15_t * pDst) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *pIn1 = pSrcA; /* inputA pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Loop to perform MAC operations according to correlation equation 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *pX; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *pY; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *pA; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *pB; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int32_t i = 0U, j = 0; /* loop counters */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int32_t inv = 2U; /* Reverse order flag */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t tot = 0U; /* Length */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int32_t block1, block2, block3; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int32_t incr; ARM GAS /tmp/ccJrAs6S.s page 813 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** tot = ((srcALen + srcBLen) - 2U); 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** if (srcALen > srcBLen) 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Calculating the number of zeros to be padded to the output 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** j = srcALen - srcBLen; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Initialize the pointer after zero padding 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += j; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** else if (srcALen < srcBLen) 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Initialization to inputB pointer 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pIn1 = pSrcB; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Initialization to the end of inputA pointer 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pIn2 = pSrcA + (srcALen - 1U); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Initialisation of the pointer after zero padding 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst = pDst + tot; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Swapping the lengths 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** j = srcALen; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** srcALen = srcBLen; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** srcBLen = j; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Setting the reverse flag 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** inv = -2; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** block1 = srcBLen - 1; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** block2 = srcALen - srcBLen + 1; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** block3 = srcBLen - 1; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pA = pIn1; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pB = pIn2; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** incr = inv / 2; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** for (i = 0U; i <= block1 - 2; i += 2) 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t count = i + 1; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc0 = 0LL; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc1 = 0LL; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * compute 2 accumulators per loop 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * size is incrementing for second accumulator 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Y pointer is decrementing for second accumulator ARM GAS /tmp/ccJrAs6S.s page 814 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pX = pA; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pY = pB; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q15(acc0, acc1, pX, pY, count); 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc0; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc1; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pB -= 2; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** for (; i < block1; i++) 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t count = i + 1; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc = 0LL; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pX = pA; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pY = pB; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** MVE_INTR_CORR_SINGLE_Q15(acc, pX, pY, count); 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pB--; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** for (i = 0U; i <= block2 - 4; i += 4) 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc0 = 0LL; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc1 = 0LL; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc2 = 0LL; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc3 = 0LL; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pX = pA; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pY = pB; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * compute 4 accumulators per loop 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * size is fixed for all accumulators 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * X pointer is incrementing for successive accumulators 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q15(acc0, acc1, acc2, acc3, pX, pY, srcBLen); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc0; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc1; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc2; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc3; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pA += 4; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** for (; i <= block2 - 2; i += 2) 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc0 = 0LL; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc1 = 0LL; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 815 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pX = pA; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pY = pB; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * compute 2 accumulators per loop 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * size is fixed for all accumulators 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * X pointer is incrementing for second accumulator 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q15(acc0, acc1, pX, pY, srcBLen); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc0; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc1; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pA += 2; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** if (block2 & 1) 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc = 0LL; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pX = pA; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pY = pB; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** MVE_INTR_CORR_SINGLE_Q15(acc, pX, pY, srcBLen); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pA++; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** for (i = block3 - 1; i >= 0; i -= 2) 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t count = (i + 1); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc0 = 0LL; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc1 = 0LL; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pX = pA; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pY = pB; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * compute 2 accumulators per loop 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * size is decrementing for second accumulator 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * X pointer is incrementing for second accumulator 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q15(acc0, acc1, pX, pY, count); 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc0; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc1; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pA += 2; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** for (; i >= 0; i--) 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t count = (i + 1); 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int64_t acc = 0LL; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 816 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pX = pA; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pY = pB; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** MVE_INTR_CORR_SINGLE_Q15(acc, pX, pY, count); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst = (q15_t) acc; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += incr; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pA++; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #else 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** void arm_correlate_q15( 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t * pSrcA, 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t srcALen, 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t * pSrcB, 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t srcBLen, 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** q15_t * pDst) 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21157 .loc 43 274 0 21158 .cfi_startproc 21159 @ args = 4, pretend = 0, frame = 80 21160 @ frame_needed = 0, uses_anonymous_args = 0 21161 .LVL3433: 21162 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 21163 .LCFI123: 21164 .cfi_def_cfa_offset 36 21165 .cfi_offset 4, -36 21166 .cfi_offset 5, -32 21167 .cfi_offset 6, -28 21168 .cfi_offset 7, -24 21169 .cfi_offset 8, -20 21170 .cfi_offset 9, -16 21171 .cfi_offset 10, -12 21172 .cfi_offset 11, -8 21173 .cfi_offset 14, -4 21174 0004 95B0 sub sp, sp, #84 21175 .LCFI124: 21176 .cfi_def_cfa_offset 120 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #if defined (ARM_MATH_DSP) 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *pIn1; /* InputA pointer */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *pIn2; /* InputB pointer */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** q15_t *pOut = pDst; /* Output pointer */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** q63_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *px; /* Intermediate inputA pointer */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *py; /* Intermediate inputB pointer */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *pSrc1; /* Intermediate pointers */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** q31_t x0, x1, x2, x3, c0; /* Temporary input variables for holding inp 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t j, k, count, blkCnt; /* Loop counters */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t outBlockSize; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** int32_t inc = 1; /* Destination address modifier */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* srcB is always made to slide across srcA. */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ ARM GAS /tmp/ccJrAs6S.s page 817 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* But CORR(x, y) is reverse of CORR(y, x) */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* and the destination pointer modifier, inc is set to -1 */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* But to improve the performance, 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * we include zeroes in the output instead of zero padding either of the the inputs*/ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* If srcALen > srcBLen, 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* If srcALen < srcBLen, 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** if (srcALen >= srcBLen) 21177 .loc 43 304 0 21178 0006 9942 cmp r1, r3 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21179 .loc 43 274 0 21180 0008 0392 str r2, [sp, #12] 21181 000a CDE90803 strd r0, r3, [sp, #32] 21182 000e 1E9A ldr r2, [sp, #120] 21183 .LVL3434: 21184 .loc 43 304 0 21185 0010 C0F01482 bcc .L1514 21186 .LVL3435: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Initialization of inputA pointer */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pIn1 = pSrcA; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Initialization of inputB pointer */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pIn2 = pSrcB; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Number of output samples is calculated */ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** outBlockSize = (srcALen * 2U) - 1U; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* When srcALen > srcBLen, zero padding is done to srcB 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * to make their lengths equal. 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Instead, (outBlockSize - (srcALen + srcBLen - 1)) 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * number of output samples are made zero */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** j = outBlockSize - (srcALen + (srcBLen - 1U)); 21187 .loc 43 319 0 21188 0014 CB1A subs r3, r1, r3 21189 .LVL3436: 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Updating the pointer position to non zero value */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += j; 21190 .loc 43 322 0 21191 0016 02EB4303 add r3, r2, r3, lsl #1 21192 001a 0493 str r3, [sp, #16] 21193 .LVL3437: 21194 001c 0998 ldr r0, [sp, #36] 21195 .LVL3438: 21196 001e 0223 movs r3, #2 21197 .LVL3439: 21198 0020 0293 str r3, [sp, #8] 21199 .LVL3440: 21200 .L1515: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** else 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 818 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Initialization of inputA pointer */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pIn1 = pSrcB; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Initialization of inputB pointer */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pIn2 = pSrcA; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** j = srcBLen; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** srcBLen = srcALen; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** srcALen = j; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* CORR(x, y) = Reverse order(CORR(y, x)) */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Hence set the destination pointer to point to the last output sample */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut = pDst + ((srcALen + srcBLen) - 2U); 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination address modifier is set to -1 */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** inc = -1; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* The function is internally 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * divided into three stages according to the number of multiplications that has to be 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * taken place between inputA samples and inputB samples. In the first stage of the 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * algorithm, the multiplications increase by one for every iteration. 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * In the third stage of the algorithm, the multiplications decrease by one 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * for every iteration. */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* The algorithm is implemented in three stages. 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** The loop counters of each stage is initiated here. */ 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** blockSize1 = srcBLen - 1U; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** blockSize2 = srcALen - (srcBLen - 1U); 21201 .loc 43 356 0 21202 0022 0131 adds r1, r1, #1 21203 .LVL3441: 21204 0024 0B1A subs r3, r1, r0 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** blockSize3 = blockSize1; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* -------------------------- 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Initializations of stage1 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * -------------------------*/ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* sum = x[0] * y[srcBlen - 1] 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * .... 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** The count variable holds the number of MAC operations performed */ 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** count = 1U; 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Working pointer of inputA */ 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = pIn1; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Working pointer of inputB */ 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pSrc1 = pIn2 + (srcBLen - 1U); 21205 .loc 43 377 0 ARM GAS /tmp/ccJrAs6S.s page 819 21206 0026 00F10045 add r5, r0, #-2147483648 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** blockSize3 = blockSize1; 21207 .loc 43 356 0 21208 002a 0B93 str r3, [sp, #44] 21209 .LVL3442: 21210 .loc 43 377 0 21211 002c 039B ldr r3, [sp, #12] 21212 .LVL3443: 21213 002e 013D subs r5, r5, #1 21214 0030 03EB4505 add r5, r3, r5, lsl #1 21215 .LVL3444: 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** py = pSrc1; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* ------------------------ 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Stage1 process 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * ----------------------*/ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* The first loop starts here */ 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** while (blockSize1 > 0U) 21216 .loc 43 385 0 21217 0034 431E subs r3, r0, #1 21218 .LVL3445: 21219 0036 1193 str r3, [sp, #68] 21220 0038 00F0BC81 beq .L1516 21221 003c DDF820E0 ldr lr, [sp, #32] 21222 0040 DDF810C0 ldr ip, [sp, #16] 21223 0044 DDF80880 ldr r8, [sp, #8] 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Accumulator is made zero for every iteration */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum = 0; 21224 .loc 43 388 0 21225 0048 0023 movs r3, #0 21226 .LVL3446: 21227 004a 1A46 mov r2, r3 21228 004c AF1E subs r7, r5, #2 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21229 .loc 43 385 0 21230 004e 7146 mov r1, lr 21231 .LVL3447: 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21232 .loc 43 371 0 21233 0050 0124 movs r4, #1 21234 0052 8146 mov r9, r0 21235 .LVL3448: 21236 .L1517: 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k = count >> 2U; 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** while (k > 0U) 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Perform the multiply-accumulate */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */ 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */ ARM GAS /tmp/ccJrAs6S.s page 820 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement loop counter */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k--; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ** No loop unrolling is used. */ 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k = count % 0x4U; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** while (k > 0U) 21237 .loc 43 411 0 21238 0054 14F00300 ands r0, r4, #3 21239 .LVL3449: 21240 0058 15D0 beq .L1520 21241 .LVL3450: 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Perform the multiply-accumulate */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* x[0] * y[srcBLen - 1] */ 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum = __SMLALD(*px++, *py++, sum); 21242 .loc 43 415 0 21243 005a B1F90060 ldrsh r6, [r1] 21244 .LVL3451: 21245 005e B5F900A0 ldrsh r10, [r5] 21246 .LVL3452: 21247 .LBB2103: 21248 .LBB2104: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 21249 .loc 6 2014 0 21250 .syntax unified 21251 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21252 0062 C6FBCA32 smlald r3, r2, r6, r10 21253 @ 0 "" 2 21254 .LVL3453: 21255 .thumb 21256 .syntax unified 21257 .LBE2104: 21258 .LBE2103: 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21259 .loc 43 411 0 21260 0066 0128 cmp r0, #1 21261 0068 0DD0 beq .L1520 21262 .LVL3454: 21263 .loc 43 415 0 21264 006a B1F90260 ldrsh r6, [r1, #2] 21265 .LVL3455: 21266 006e B5F902A0 ldrsh r10, [r5, #2] 21267 .LVL3456: 21268 .LBB2107: 21269 .LBB2105: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 21270 .loc 6 2014 0 21271 .syntax unified 21272 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21273 0072 C6FBCA32 smlald r3, r2, r6, r10 21274 @ 0 "" 2 21275 .LVL3457: ARM GAS /tmp/ccJrAs6S.s page 821 21276 .thumb 21277 .syntax unified 21278 .LBE2105: 21279 .LBE2107: 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21280 .loc 43 411 0 21281 0076 0228 cmp r0, #2 21282 0078 05D0 beq .L1520 21283 .LVL3458: 21284 .loc 43 415 0 21285 007a B1F90410 ldrsh r1, [r1, #4] 21286 .LVL3459: 21287 007e B5F90400 ldrsh r0, [r5, #4] 21288 .LVL3460: 21289 .LBB2108: 21290 .LBB2106: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 21291 .loc 6 2014 0 21292 .syntax unified 21293 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21294 0082 C1FBC032 smlald r3, r2, r1, r0 21295 @ 0 "" 2 21296 .LVL3461: 21297 .thumb 21298 .syntax unified 21299 .L1520: 21300 .LBE2106: 21301 .LBE2108: 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement loop counter */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k--; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pOut = (q15_t) (__SSAT((sum >> 15), 16)); 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** py = pSrc1 - count; 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = pIn1; 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Increment MAC count */ 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** count++; 21302 .loc 43 431 0 21303 0086 661C adds r6, r4, #1 21304 .LBB2109: 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 21305 .loc 43 422 0 21306 0088 DB0B lsrs r3, r3, #15 21307 .LVL3462: 21308 .LBE2109: 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21309 .loc 43 385 0 21310 008a B145 cmp r9, r6 21311 .LBB2110: 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ ARM GAS /tmp/ccJrAs6S.s page 822 21312 .loc 43 422 0 21313 008c 43EA4243 orr r3, r3, r2, lsl #17 21314 .LBE2110: 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = pIn1; 21315 .loc 43 427 0 21316 0090 3946 mov r1, r7 21317 .LBB2111: 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 21318 .loc 43 422 0 21319 .syntax unified 21320 @ 422 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 21321 0092 03F30F03 ssat r3, #16, r3 21322 @ 0 "" 2 21323 .LVL3463: 21324 .thumb 21325 .syntax unified 21326 .LBE2111: 21327 0096 ACF80030 strh r3, [ip] @ movhi 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21328 .loc 43 424 0 21329 009a C444 add ip, ip, r8 21330 .LVL3464: 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21331 .loc 43 385 0 21332 009c 1CD0 beq .L1594 21333 .LVL3465: 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21334 .loc 43 395 0 21335 009e B408 lsrs r4, r6, #2 21336 .LVL3466: 21337 00a0 00F06382 beq .L1550 21338 00a4 E400 lsls r4, r4, #3 21339 .LVL3467: 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21340 .loc 43 388 0 21341 00a6 0023 movs r3, #0 21342 .LVL3468: 21343 00a8 3D19 adds r5, r7, r4 21344 00aa 1A46 mov r2, r3 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21345 .loc 43 395 0 21346 00ac 7046 mov r0, lr 21347 .LVL3469: 21348 .L1519: 21349 .LBB2112: 21350 .LBB2113: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 21351 .loc 3 928 0 21352 00ae D0F800A0 ldr r10, [r0] @ unaligned 21353 .LVL3470: 21354 .LBE2113: 21355 .LBE2112: 21356 .LBB2114: 21357 .LBB2115: 21358 00b2 D1F800B0 ldr fp, [r1] @ unaligned 21359 .LVL3471: 21360 .LBE2115: ARM GAS /tmp/ccJrAs6S.s page 823 21361 .LBE2114: 21362 .LBB2116: 21363 .LBB2117: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 21364 .loc 6 2014 0 21365 .syntax unified 21366 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21367 00b6 CAFBCB32 smlald r3, r2, r10, fp 21368 @ 0 "" 2 21369 .LVL3472: 21370 .thumb 21371 .syntax unified 21372 .LBE2117: 21373 .LBE2116: 21374 .LBB2118: 21375 .LBB2119: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 21376 .loc 3 928 0 21377 00ba D0F804A0 ldr r10, [r0, #4] @ unaligned 21378 .LVL3473: 21379 .LBE2119: 21380 .LBE2118: 21381 .LBB2120: 21382 .LBB2121: 21383 00be D1F804B0 ldr fp, [r1, #4] @ unaligned 21384 00c2 0830 adds r0, r0, #8 21385 .LVL3474: 21386 00c4 0831 adds r1, r1, #8 21387 .LVL3475: 21388 .LBE2121: 21389 .LBE2120: 21390 .LBB2122: 21391 .LBB2123: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 21392 .loc 6 2014 0 21393 .syntax unified 21394 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21395 00c6 CAFBCB32 smlald r3, r2, r10, fp 21396 @ 0 "" 2 21397 .LVL3476: 21398 .thumb 21399 .syntax unified 21400 .LBE2123: 21401 .LBE2122: 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21402 .loc 43 395 0 21403 00ca A942 cmp r1, r5 21404 00cc EFD1 bne .L1519 21405 00ce 0EEB0401 add r1, lr, r4 21406 .LVL3477: 21407 .L1518: 21408 00d2 023F subs r7, r7, #2 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21409 .loc 43 388 0 21410 00d4 3446 mov r4, r6 21411 00d6 BDE7 b .L1517 21412 .LVL3478: ARM GAS /tmp/ccJrAs6S.s page 824 21413 .L1594: 21414 00d8 049A ldr r2, [sp, #16] 21415 00da 029B ldr r3, [sp, #8] 21416 .LVL3479: 21417 00dc 03FB0423 mla r3, r3, r4, r2 21418 00e0 0493 str r3, [sp, #16] 21419 .LVL3480: 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement loop counter */ 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** blockSize1--; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* -------------------------- 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Initializations of stage2 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * ------------------------*/ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * .... 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Working pointer of inputA */ 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = pIn1; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Working pointer of inputB */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** py = pIn2; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* count is the index by which the pointer pIn1 to be incremented */ 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** count = 0U; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* ------------------- 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Stage2 process 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * ------------------*/ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * So, to loop unroll over blockSize2, 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * srcBLen should be greater than or equal to 4 */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** if (srcBLen >= 4U) 21420 .loc 43 463 0 21421 00e2 099B ldr r3, [sp, #36] 21422 00e4 032B cmp r3, #3 21423 00e6 40F26581 bls .L1516 21424 .LVL3481: 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** blkCnt = blockSize2 >> 2U; 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** while (blkCnt > 0U) 21425 .loc 43 468 0 21426 00ea 0B9B ldr r3, [sp, #44] 21427 00ec 9908 lsrs r1, r3, #2 21428 .LVL3482: 21429 00ee 1391 str r1, [sp, #76] 21430 00f0 00F0F081 beq .L1552 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Set all accumulators to zero */ ARM GAS /tmp/ccJrAs6S.s page 825 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc0 = 0; 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc1 = 0; 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc2 = 0; 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc3 = 0; 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* read x[0], x[1] samples */ 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** x0 = read_q15x2 ((q15_t *) px); 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* read x[1], x[2] samples */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** x1 = read_q15x2 ((q15_t *) px + 1); 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px += 2U; 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k = srcBLen >> 2U; 21431 .loc 43 484 0 21432 00f4 0998 ldr r0, [sp, #36] 21433 00f6 039C ldr r4, [sp, #12] 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** do 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read the first two inputB samples using SIMD: 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * y[0] and y[1] */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** c0 = read_q15x2_ia ((q15_t **) &py); 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* acc0 += x[0] * y[0] + x[1] * y[1] */ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc0 = __SMLALD(x0, c0, acc0); 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* acc1 += x[1] * y[0] + x[2] * y[1] */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc1 = __SMLALD(x1, c0, acc1); 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read x[2], x[3] */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** x2 = read_q15x2 ((q15_t *) px); 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read x[3], x[4] */ 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** x3 = read_q15x2 ((q15_t *) px + 1); 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* acc2 += x[2] * y[0] + x[3] * y[1] */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc2 = __SMLALD(x2, c0, acc2); 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* acc3 += x[3] * y[0] + x[4] * y[1] */ 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc3 = __SMLALD(x3, c0, acc3); 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read y[2] and y[3] */ 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** c0 = read_q15x2_ia ((q15_t **) &py); 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* acc0 += x[2] * y[2] + x[3] * y[3] */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc0 = __SMLALD(x2, c0, acc0); 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* acc1 += x[3] * y[2] + x[4] * y[3] */ 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc1 = __SMLALD(x3, c0, acc1); 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read x[4], x[5] */ 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** x0 = read_q15x2 ((q15_t *) px + 2); 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read x[5], x[6] */ ARM GAS /tmp/ccJrAs6S.s page 826 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** x1 = read_q15x2 ((q15_t *) px + 3); 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px += 4U; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* acc2 += x[4] * y[2] + x[5] * y[3] */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc2 = __SMLALD(x0, c0, acc2); 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* acc3 += x[5] * y[2] + x[6] * y[3] */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc3 = __SMLALD(x1, c0, acc3); 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } while (--k); 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ** No loop unrolling is used. */ 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k = srcBLen % 0x4U; 21434 .loc 43 538 0 21435 00f8 0691 str r1, [sp, #24] 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21436 .loc 43 484 0 21437 00fa 8308 lsrs r3, r0, #2 21438 00fc 0C93 str r3, [sp, #48] 21439 00fe DB00 lsls r3, r3, #3 21440 0100 A3F10802 sub r2, r3, #8 21441 0104 A218 adds r2, r4, r2 21442 0106 0D92 str r2, [sp, #52] 21443 0108 1A1D adds r2, r3, #4 21444 010a 043B subs r3, r3, #4 21445 010c 0F93 str r3, [sp, #60] 21446 .loc 43 538 0 21447 010e 00F00303 and r3, r0, #3 21448 0112 0793 str r3, [sp, #28] 21449 0114 029B ldr r3, [sp, #8] 21450 0116 1092 str r2, [sp, #64] 21451 0118 03EB4302 add r2, r3, r3, lsl #1 21452 011c 9B00 lsls r3, r3, #2 21453 011e 0A93 str r3, [sp, #40] 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21454 .loc 43 448 0 21455 0120 089B ldr r3, [sp, #32] 21456 0122 0193 str r3, [sp, #4] 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21457 .loc 43 424 0 21458 0124 049B ldr r3, [sp, #16] 21459 0126 0E92 str r2, [sp, #56] 21460 0128 0593 str r3, [sp, #20] 21461 .LVL3483: 21462 .L1539: 21463 .LBB2124: 21464 .LBB2125: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 21465 .loc 3 909 0 21466 012a 019C ldr r4, [sp, #4] 21467 .LBE2125: 21468 .LBE2124: 21469 .LBB2127: 21470 .LBB2128: 21471 012c DDF80C90 ldr r9, [sp, #12] 21472 .LBE2128: ARM GAS /tmp/ccJrAs6S.s page 827 21473 .LBE2127: 21474 .LBB2130: 21475 .LBB2126: 21476 0130 D4F800E0 ldr lr, [r4] @ unaligned 21477 .LVL3484: 21478 .LBE2126: 21479 .LBE2130: 21480 .LBB2131: 21481 .LBB2129: 21482 0134 D4F80280 ldr r8, [r4, #2] @ unaligned 21483 .LVL3485: 21484 .LBE2129: 21485 .LBE2131: 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21486 .loc 43 474 0 21487 0138 0023 movs r3, #0 21488 013a 04F1040C add ip, r4, #4 21489 .LVL3486: 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21490 .loc 43 484 0 21491 013e 0C9C ldr r4, [sp, #48] 21492 0140 0094 str r4, [sp] 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21493 .loc 43 474 0 21494 0142 9B46 mov fp, r3 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc3 = 0; 21495 .loc 43 473 0 21496 0144 1A46 mov r2, r3 21497 0146 1846 mov r0, r3 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc2 = 0; 21498 .loc 43 472 0 21499 0148 1D46 mov r5, r3 21500 014a 9A46 mov r10, r3 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc1 = 0; 21501 .loc 43 471 0 21502 014c 1946 mov r1, r3 21503 014e 1E46 mov r6, r3 21504 .LVL3487: 21505 .L1535: 21506 .LBB2132: 21507 .LBB2133: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 21508 .loc 3 928 0 discriminator 1 21509 0150 D9F80040 ldr r4, [r9] @ unaligned 21510 .LVL3488: 21511 .LBE2133: 21512 .LBE2132: 21513 .LBB2134: 21514 .LBB2135: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 21515 .loc 6 2014 0 discriminator 1 21516 .syntax unified 21517 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21518 0154 CEFBC416 smlald r1, r6, lr, r4 21519 @ 0 "" 2 21520 .LVL3489: 21521 .thumb ARM GAS /tmp/ccJrAs6S.s page 828 21522 .syntax unified 21523 .LBE2135: 21524 .LBE2134: 21525 .LBB2136: 21526 .LBB2137: 21527 .syntax unified 21528 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21529 0158 C8FBC45A smlald r5, r10, r8, r4 21530 @ 0 "" 2 21531 .LVL3490: 21532 .thumb 21533 .syntax unified 21534 .LBE2137: 21535 .LBE2136: 21536 .LBB2138: 21537 .LBB2139: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 21538 .loc 3 909 0 discriminator 1 21539 015c DCF800E0 ldr lr, [ip] @ unaligned 21540 .LVL3491: 21541 .LBE2139: 21542 .LBE2138: 21543 .LBB2140: 21544 .LBB2141: 21545 0160 DCF80270 ldr r7, [ip, #2] @ unaligned 21546 .LVL3492: 21547 .LBE2141: 21548 .LBE2140: 21549 .LBB2142: 21550 .LBB2143: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 21551 .loc 6 2014 0 discriminator 1 21552 .syntax unified 21553 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21554 0164 CEFBC420 smlald r2, r0, lr, r4 21555 @ 0 "" 2 21556 .LVL3493: 21557 .thumb 21558 .syntax unified 21559 .LBE2143: 21560 .LBE2142: 21561 .LBB2144: 21562 .LBB2145: 21563 .syntax unified 21564 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21565 0168 C7FBC43B smlald r3, fp, r7, r4 21566 @ 0 "" 2 21567 .LVL3494: 21568 .thumb 21569 .syntax unified 21570 .LBE2145: 21571 .LBE2144: 21572 .LBB2146: 21573 .LBB2147: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 21574 .loc 3 928 0 discriminator 1 21575 016c D9F80440 ldr r4, [r9, #4] @ unaligned ARM GAS /tmp/ccJrAs6S.s page 829 21576 .LVL3495: 21577 0170 09F10809 add r9, r9, #8 21578 .LVL3496: 21579 .LBE2147: 21580 .LBE2146: 21581 .LBB2148: 21582 .LBB2149: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 21583 .loc 6 2014 0 discriminator 1 21584 .syntax unified 21585 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21586 0174 CEFBC416 smlald r1, r6, lr, r4 21587 @ 0 "" 2 21588 .LVL3497: 21589 .thumb 21590 .syntax unified 21591 .LBE2149: 21592 .LBE2148: 21593 .LBB2150: 21594 .LBB2151: 21595 .syntax unified 21596 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21597 0178 C7FBC45A smlald r5, r10, r7, r4 21598 @ 0 "" 2 21599 .LVL3498: 21600 .thumb 21601 .syntax unified 21602 .LBE2151: 21603 .LBE2150: 21604 .LBB2152: 21605 .LBB2153: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 21606 .loc 3 909 0 discriminator 1 21607 017c DCF804E0 ldr lr, [ip, #4] @ unaligned 21608 .LVL3499: 21609 .LBE2153: 21610 .LBE2152: 21611 .LBB2154: 21612 .LBB2155: 21613 0180 DCF80680 ldr r8, [ip, #6] @ unaligned 21614 .LVL3500: 21615 .LBE2155: 21616 .LBE2154: 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21617 .loc 43 526 0 discriminator 1 21618 0184 0CF1080C add ip, ip, #8 21619 .LVL3501: 21620 .LBB2156: 21621 .LBB2157: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 21622 .loc 6 2014 0 discriminator 1 21623 .syntax unified 21624 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21625 0188 CEFBC420 smlald r2, r0, lr, r4 21626 @ 0 "" 2 21627 .LVL3502: 21628 .thumb ARM GAS /tmp/ccJrAs6S.s page 830 21629 .syntax unified 21630 .LBE2157: 21631 .LBE2156: 21632 .LBB2158: 21633 .LBB2159: 21634 .syntax unified 21635 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21636 018c C8FBC43B smlald r3, fp, r8, r4 21637 @ 0 "" 2 21638 .LVL3503: 21639 .thumb 21640 .syntax unified 21641 .LBE2159: 21642 .LBE2158: 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21643 .loc 43 534 0 discriminator 1 21644 0190 009C ldr r4, [sp] 21645 0192 013C subs r4, r4, #1 21646 .LVL3504: 21647 0194 0094 str r4, [sp] 21648 0196 DBD1 bne .L1535 21649 0198 019F ldr r7, [sp, #4] 21650 019a 109C ldr r4, [sp, #64] 21651 .LVL3505: 21652 019c BC46 mov ip, r7 21653 .LVL3506: 21654 019e 3C19 adds r4, r7, r4 21655 01a0 0F9F ldr r7, [sp, #60] 21656 01a2 BC44 add ip, ip, r7 21657 .LVL3507: 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** if (k == 1U) 21658 .loc 43 540 0 21659 01a4 079F ldr r7, [sp, #28] 21660 01a6 012F cmp r7, #1 21661 01a8 00F05B81 beq .L1595 21662 .LVL3508: 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read y[4] */ 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** c0 = *py; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** c0 = c0 << 16U; 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #else 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** c0 = c0 & 0x0000FFFF; 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read x[7] */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** x3 = read_q15x2 ((q15_t *) px); 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px++; 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Perform the multiply-accumulate */ 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc0 = __SMLALD (x0, c0, acc0); 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc1 = __SMLALD (x1, c0, acc1); 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc2 = __SMLALDX(x1, c0, acc2); 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc3 = __SMLALDX(x3, c0, acc3); 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 831 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** if (k == 2U) 21663 .loc 43 561 0 21664 01ac 022F cmp r7, #2 21665 01ae 40F06981 bne .L1538 21666 .LVL3509: 21667 .LBB2160: 21668 .LBB2161: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 21669 .loc 3 909 0 21670 01b2 0D9F ldr r7, [sp, #52] 21671 .LBE2161: 21672 .LBE2160: 21673 .LBB2163: 21674 .LBB2164: 21675 01b4 D4F800C0 ldr ip, [r4] @ unaligned 21676 .LBE2164: 21677 .LBE2163: 21678 .LBB2165: 21679 .LBB2162: 21680 01b8 BF68 ldr r7, [r7, #8] @ unaligned 21681 .LVL3510: 21682 .LBE2162: 21683 .LBE2165: 21684 .LBB2166: 21685 .LBB2167: 21686 01ba D4F80290 ldr r9, [r4, #2] @ unaligned 21687 .LVL3511: 21688 .LBE2167: 21689 .LBE2166: 21690 .LBB2168: 21691 .LBB2169: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 21692 .loc 6 2014 0 21693 .syntax unified 21694 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21695 01be CEFBC716 smlald r1, r6, lr, r7 21696 @ 0 "" 2 21697 .LVL3512: 21698 .thumb 21699 .syntax unified 21700 .LBE2169: 21701 .LBE2168: 21702 .LBB2170: 21703 .LBB2171: 21704 01c2 5446 mov r4, r10 21705 .LVL3513: 21706 .syntax unified 21707 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21708 01c4 C8FBC754 smlald r5, r4, r8, r7 21709 @ 0 "" 2 21710 .LVL3514: 21711 .thumb 21712 .syntax unified 21713 .LBE2171: 21714 .LBE2170: 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read y[4], y[5] */ ARM GAS /tmp/ccJrAs6S.s page 832 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** c0 = read_q15x2 ((q15_t *) py); 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read x[7], x[8] */ 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** x3 = read_q15x2 ((q15_t *) px); 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read x[9] */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** x2 = read_q15x2 ((q15_t *) px + 1); 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px += 2U; 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Perform the multiply-accumulate */ 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc0 = __SMLALD(x0, c0, acc0); 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc1 = __SMLALD(x1, c0, acc1); 21715 .loc 43 575 0 21716 01c8 A246 mov r10, r4 21717 .LVL3515: 21718 .LBB2172: 21719 .LBB2173: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 21720 .loc 6 2014 0 21721 .syntax unified 21722 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21723 01ca CCFBC720 smlald r2, r0, ip, r7 21724 @ 0 "" 2 21725 .LVL3516: 21726 .thumb 21727 .syntax unified 21728 .LBE2173: 21729 .LBE2172: 21730 .LBB2174: 21731 .LBB2175: 21732 .syntax unified 21733 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 21734 01ce C9FBC73B smlald r3, fp, r9, r7 21735 @ 0 "" 2 21736 .LVL3517: 21737 .thumb 21738 .syntax unified 21739 .L1537: 21740 .LBE2175: 21741 .LBE2174: 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc2 = __SMLALD(x3, c0, acc2); 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc3 = __SMLALD(x2, c0, acc3); 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** if (k == 3U) 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read y[4], y[5] */ 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** c0 = read_q15x2_ia ((q15_t **) &py); 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read x[7], x[8] */ 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** x3 = read_q15x2 ((q15_t *) px); 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read x[9] */ 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** x2 = read_q15x2 ((q15_t *) px + 1); 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Perform the multiply-accumulate */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc0 = __SMLALD(x0, c0, acc0); ARM GAS /tmp/ccJrAs6S.s page 833 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc1 = __SMLALD(x1, c0, acc1); 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc2 = __SMLALD(x3, c0, acc2); 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc3 = __SMLALD(x2, c0, acc3); 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** c0 = (*py); 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read y[6] */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** c0 = c0 << 16U; 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #else 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** c0 = c0 & 0x0000FFFF; 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Read x[10] */ 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** x3 = read_q15x2 ((q15_t *) px + 2); 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px += 3U; 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Perform the multiply-accumulates */ 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc0 = __SMLALDX(x1, c0, acc0); 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc1 = __SMLALD (x2, c0, acc1); 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc2 = __SMLALDX(x2, c0, acc2); 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc3 = __SMLALDX(x3, c0, acc3); 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pOut = (q15_t) (__SSAT(acc0 >> 15, 16)); 21742 .loc 43 618 0 21743 01d2 059C ldr r4, [sp, #20] 21744 .LBB2176: 21745 01d4 C90B lsrs r1, r1, #15 21746 .LVL3518: 21747 .LBE2176: 21748 .LBB2177: 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pOut = (q15_t) (__SSAT(acc1 >> 15, 16)); 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pOut = (q15_t) (__SSAT(acc2 >> 15, 16)); 21749 .loc 43 625 0 21750 01d6 D20B lsrs r2, r2, #15 21751 .LVL3519: 21752 01d8 42EA4042 orr r2, r2, r0, lsl #17 21753 .LBE2177: 21754 .LBB2178: 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 21755 .loc 43 618 0 21756 01dc 41EA4641 orr r1, r1, r6, lsl #17 21757 .LBE2178: 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pOut = (q15_t) (__SSAT(acc3 >> 15, 16)); 21758 .loc 43 628 0 21759 01e0 0E98 ldr r0, [sp, #56] 21760 .LBB2179: 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ ARM GAS /tmp/ccJrAs6S.s page 834 21761 .loc 43 618 0 21762 .syntax unified 21763 @ 618 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 21764 01e2 01F30F01 ssat r1, #16, r1 21765 @ 0 "" 2 21766 .thumb 21767 .syntax unified 21768 .LBE2179: 21769 01e6 2180 strh r1, [r4] @ movhi 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 21770 .loc 43 622 0 21771 01e8 2146 mov r1, r4 21772 01ea 029C ldr r4, [sp, #8] 21773 .LBB2180: 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 21774 .loc 43 625 0 21775 .syntax unified 21776 @ 625 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 21777 01ec 02F30F02 ssat r2, #16, r2 21778 @ 0 "" 2 21779 .thumb 21780 .syntax unified 21781 .LBE2180: 21782 .LBB2181: 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 21783 .loc 43 622 0 21784 01f0 ED0B lsrs r5, r5, #15 21785 .LVL3520: 21786 .LBE2181: 21787 .LBB2182: 21788 .loc 43 628 0 21789 01f2 DB0B lsrs r3, r3, #15 21790 .LVL3521: 21791 .LBE2182: 21792 .LBB2183: 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 21793 .loc 43 622 0 21794 01f4 45EA4A45 orr r5, r5, r10, lsl #17 21795 .LBE2183: 21796 .LBB2184: 21797 .loc 43 628 0 21798 01f8 43EA4B43 orr r3, r3, fp, lsl #17 21799 .LBE2184: 21800 .LBB2185: 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 21801 .loc 43 622 0 21802 .syntax unified 21803 @ 622 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 21804 01fc 05F30F05 ssat r5, #16, r5 21805 @ 0 "" 2 21806 .LVL3522: 21807 .thumb 21808 .syntax unified 21809 .LBE2185: 21810 .LBB2186: 21811 .loc 43 628 0 21812 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 835 21813 @ 628 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 21814 0200 03F30F03 ssat r3, #16, r3 21815 @ 0 "" 2 21816 .thumb 21817 .syntax unified 21818 .LBE2186: 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 21819 .loc 43 622 0 21820 0204 0D53 strh r5, [r1, r4] @ movhi 21821 .LVL3523: 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 21822 .loc 43 625 0 21823 0206 21F81420 strh r2, [r1, r4, lsl #1] @ movhi 21824 .LVL3524: 21825 .loc 43 628 0 21826 020a 0B52 strh r3, [r1, r0] @ movhi 21827 020c 0A9B ldr r3, [sp, #40] 21828 .LVL3525: 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Increment the count by 4 as 4 output values are computed */ 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** count += 4U; 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = pIn1 + count; 21829 .loc 43 635 0 21830 020e 019A ldr r2, [sp, #4] 21831 .LVL3526: 21832 0210 CB18 adds r3, r1, r3 21833 0212 0593 str r3, [sp, #20] 21834 .LVL3527: 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21835 .loc 43 468 0 21836 0214 069B ldr r3, [sp, #24] 21837 .LVL3528: 21838 .loc 43 635 0 21839 0216 0832 adds r2, r2, #8 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21840 .loc 43 468 0 21841 0218 013B subs r3, r3, #1 21842 .LVL3529: 21843 .loc 43 635 0 21844 021a 0192 str r2, [sp, #4] 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21845 .loc 43 468 0 21846 021c 0693 str r3, [sp, #24] 21847 021e 84D1 bne .L1539 21848 0220 139B ldr r3, [sp, #76] 21849 .LVL3530: 21850 0222 0498 ldr r0, [sp, #16] 21851 0224 0A99 ldr r1, [sp, #40] 21852 0226 01FB0302 mla r2, r1, r3, r0 21853 022a 0899 ldr r1, [sp, #32] 21854 022c 0492 str r2, [sp, #16] 21855 022e 1A46 mov r2, r3 21856 0230 01EBC200 add r0, r1, r2, lsl #3 21857 0234 9B00 lsls r3, r3, #2 ARM GAS /tmp/ccJrAs6S.s page 836 21858 .LVL3531: 21859 .L1534: 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** py = pIn2; 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement loop counter */ 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** blkCnt--; 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ** No loop unrolling is used. */ 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** blkCnt = blockSize2 % 0x4U; 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** while (blkCnt > 0U) 21860 .loc 43 646 0 21861 0236 0B9A ldr r2, [sp, #44] 21862 0238 12F00302 ands r2, r2, #3 21863 .LVL3532: 21864 023c 0692 str r2, [sp, #24] 21865 023e 6CD0 beq .L1525 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Accumulator is made zero for every iteration */ 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum = 0; 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k = srcBLen >> 2U; 21866 .loc 43 652 0 21867 0240 0999 ldr r1, [sp, #36] 21868 0242 089C ldr r4, [sp, #32] 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** while (k > 0U) 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Perform the multiply-accumulates */ 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q63_t) *px++ * *py++); 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q63_t) *px++ * *py++); 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q63_t) *px++ * *py++); 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q63_t) *px++ * *py++); 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement loop counter */ 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k--; 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ** No loop unrolling is used. */ 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k = srcBLen % 0x4U; 21869 .loc 43 670 0 21870 0244 DDF81080 ldr r8, [sp, #16] 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21871 .loc 43 652 0 21872 0248 4FEA910A lsr r10, r1, #2 21873 024c 0AF1005B add fp, r10, #536870912 21874 0250 5E1C adds r6, r3, #1 21875 0252 0BF1FF3B add fp, fp, #-1 21876 0256 1344 add r3, r3, r2 21877 .LVL3533: 21878 .loc 43 670 0 ARM GAS /tmp/ccJrAs6S.s page 837 21879 0258 01F00309 and r9, r1, #3 21880 025c A21C adds r2, r4, #2 21881 .LVL3534: 21882 025e 0399 ldr r1, [sp, #12] 21883 0260 4FEACB0B lsl fp, fp, #3 21884 0264 02EB4303 add r3, r2, r3, lsl #1 21885 0268 01EB0B07 add r7, r1, fp 21886 026c 04EB4606 add r6, r4, r6, lsl #1 21887 .LVL3535: 21888 0270 0593 str r3, [sp, #20] 21889 0272 01F1080E add lr, r1, #8 21890 .LVL3536: 21891 .L1542: 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21892 .loc 43 649 0 21893 0276 CDE90006 strd r0, r6, [sp] 21894 027a 00F10802 add r2, r0, #8 21895 027e 7346 mov r3, lr 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21896 .loc 43 652 0 21897 0280 5146 mov r1, r10 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21898 .loc 43 649 0 21899 0282 0024 movs r4, #0 21900 0284 0025 movs r5, #0 21901 .LVL3537: 21902 .L1540: 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q63_t) *px++ * *py++); 21903 .loc 43 659 0 21904 0286 33F808CC ldrh ip, [r3, #-8] 21905 028a 32F8080C ldrh r0, [r2, #-8] 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q63_t) *px++ * *py++); 21906 .loc 43 661 0 21907 028e 33F8046C ldrh r6, [r3, #-4] 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q63_t) *px++ * *py++); 21908 .loc 43 659 0 21909 0292 C0FB8C45 smlalbb r4, r5, r0, ip 21910 .LVL3538: 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q63_t) *px++ * *py++); 21911 .loc 43 660 0 21912 0296 32F8060C ldrh r0, [r2, #-6] 21913 029a 33F806CC ldrh ip, [r3, #-6] 21914 029e C0FB8C45 smlalbb r4, r5, r0, ip 21915 .LVL3539: 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q63_t) *px++ * *py++); 21916 .loc 43 661 0 21917 02a2 32F8040C ldrh r0, [r2, #-4] 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21918 .loc 43 662 0 21919 02a6 32F802CC ldrh ip, [r2, #-2] 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q63_t) *px++ * *py++); 21920 .loc 43 661 0 21921 02aa C0FB8645 smlalbb r4, r5, r0, r6 21922 .LVL3540: 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21923 .loc 43 662 0 21924 02ae 33F8020C ldrh r0, [r3, #-2] ARM GAS /tmp/ccJrAs6S.s page 838 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21925 .loc 43 656 0 21926 02b2 0139 subs r1, r1, #1 21927 .LVL3541: 21928 02b4 02F10802 add r2, r2, #8 21929 .LVL3542: 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 21930 .loc 43 662 0 21931 02b8 CCFB8045 smlalbb r4, r5, ip, r0 21932 .LVL3543: 21933 02bc 03F10803 add r3, r3, #8 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21934 .loc 43 656 0 21935 02c0 E1D1 bne .L1540 21936 02c2 DDE90006 ldrd r0, r6, [sp] 21937 02c6 5844 add r0, r0, fp 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** while (k > 0U) 21938 .loc 43 672 0 21939 02c8 B9F1000F cmp r9, #0 21940 02cc 11D0 beq .L1541 21941 .LVL3544: 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Perform the multiply-accumulates */ 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q63_t) *px++ * *py++); 21942 .loc 43 675 0 21943 02ce 0289 ldrh r2, [r0, #8] 21944 .LVL3545: 21945 02d0 3B89 ldrh r3, [r7, #8] 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21946 .loc 43 672 0 21947 02d2 B9F1010F cmp r9, #1 21948 .loc 43 675 0 21949 02d6 C2FB8345 smlalbb r4, r5, r2, r3 21950 .LVL3546: 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21951 .loc 43 672 0 21952 02da 0AD0 beq .L1541 21953 .loc 43 675 0 21954 02dc 4289 ldrh r2, [r0, #10] 21955 02de 7B89 ldrh r3, [r7, #10] 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21956 .loc 43 672 0 21957 02e0 B9F1020F cmp r9, #2 21958 .loc 43 675 0 21959 02e4 C2FB8345 smlalbb r4, r5, r2, r3 21960 .LVL3547: 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21961 .loc 43 672 0 21962 02e8 03D0 beq .L1541 21963 .loc 43 675 0 21964 02ea 8289 ldrh r2, [r0, #12] 21965 02ec BB89 ldrh r3, [r7, #12] 21966 02ee C2FB8345 smlalbb r4, r5, r2, r3 21967 .LVL3548: 21968 .L1541: 21969 .LBB2187: ARM GAS /tmp/ccJrAs6S.s page 839 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement the loop counter */ 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k--; 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pOut = (q15_t) (__SSAT(sum >> 15, 16)); 21970 .loc 43 682 0 21971 02f2 E30B lsrs r3, r4, #15 21972 02f4 43EA4543 orr r3, r3, r5, lsl #17 21973 .syntax unified 21974 @ 682 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 21975 02f8 03F30F03 ssat r3, #16, r3 21976 @ 0 "" 2 21977 .LVL3549: 21978 .thumb 21979 .syntax unified 21980 .LBE2187: 21981 02fc A8F80030 strh r3, [r8] @ movhi 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 21982 .loc 43 684 0 21983 0300 029B ldr r3, [sp, #8] 21984 .LVL3550: 21985 0302 9844 add r8, r8, r3 21986 .LVL3551: 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21987 .loc 43 646 0 21988 0304 059B ldr r3, [sp, #20] 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Increment count by 1, as one output value is computed */ 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** count++; 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = pIn1 + count; 21989 .loc 43 690 0 21990 0306 3046 mov r0, r6 21991 0308 0236 adds r6, r6, #2 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 21992 .loc 43 646 0 21993 030a B342 cmp r3, r6 21994 030c B3D1 bne .L1542 21995 030e 0499 ldr r1, [sp, #16] 21996 0310 069B ldr r3, [sp, #24] 21997 0312 029A ldr r2, [sp, #8] 21998 0314 02FB0313 mla r3, r2, r3, r1 21999 0318 0493 str r3, [sp, #16] 22000 .LVL3552: 22001 .L1525: 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** py = pIn2; 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement the loop counter */ 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** blkCnt--; 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** else 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 840 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* If the srcBLen is not a multiple of 4, 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * the blockSize2 loop cannot be unrolled by 4 */ 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** blkCnt = blockSize2; 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** while (blkCnt > 0U) 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Accumulator is made zero for every iteration */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum = 0; 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* srcBLen number of MACS should be performed */ 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k = srcBLen; 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** while (k > 0U) 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Perform the multiply-accumulate */ 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q63_t) *px++ * *py++); 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement the loop counter */ 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k--; 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pOut = (q15_t) (__SSAT(sum >> 15, 16)); 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Increment the MAC count */ 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** count++; 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = pIn1 + count; 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** py = pIn2; 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement the loop counter */ 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** blkCnt--; 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* -------------------------- 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Initializations of stage3 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * -------------------------*/ 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLe 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLe 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * .... 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * sum += x[srcALen-1] * y[0] 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** */ 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** The count variable holds the number of MAC operations performed */ 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** count = srcBLen - 1U; 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Working pointer of inputA */ 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); 22002 .loc 43 754 0 ARM GAS /tmp/ccJrAs6S.s page 841 22003 031a 089B ldr r3, [sp, #32] 22004 031c 0B9A ldr r2, [sp, #44] 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = pSrc1; 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Working pointer of inputB */ 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** py = pIn2; 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* ------------------- 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * Stage3 process 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * ------------------*/ 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** while (blockSize3 > 0U) 22005 .loc 43 764 0 22006 031e 119F ldr r7, [sp, #68] 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = pSrc1; 22007 .loc 43 754 0 22008 0320 03EB4203 add r3, r3, r2, lsl #1 22009 .LVL3553: 22010 .loc 43 764 0 22011 0324 002F cmp r7, #0 22012 0326 42D0 beq .L1513 22013 0328 DDE9028E ldrd r8, lr, [sp, #8] 22014 032c DDF810C0 ldr ip, [sp, #16] 22015 .LVL3554: 22016 .L1548: 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Accumulator is made zero for every iteration */ 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum = 0; 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k = count >> 2U; 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** while (k > 0U) 22017 .loc 43 774 0 22018 0330 BE08 lsrs r6, r7, #2 22019 .LVL3555: 22020 0332 7ED0 beq .L1553 22021 .L1596: 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22022 .loc 43 767 0 22023 0334 0021 movs r1, #0 22024 0336 0A46 mov r2, r1 22025 .loc 43 774 0 22026 0338 7446 mov r4, lr 22027 033a 1846 mov r0, r3 22028 033c 3546 mov r5, r6 22029 .LVL3556: 22030 .L1544: 22031 .LBB2188: 22032 .LBB2189: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 22033 .loc 3 928 0 22034 033e D0F80090 ldr r9, [r0] @ unaligned 22035 .LVL3557: 22036 .LBE2189: ARM GAS /tmp/ccJrAs6S.s page 842 22037 .LBE2188: 22038 .LBB2190: 22039 .LBB2191: 22040 0342 D4F800A0 ldr r10, [r4] @ unaligned 22041 .LVL3558: 22042 .LBE2191: 22043 .LBE2190: 22044 .LBB2192: 22045 .LBB2193: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 22046 .loc 6 2014 0 22047 .syntax unified 22048 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22049 0346 C9FBCA12 smlald r1, r2, r9, r10 22050 @ 0 "" 2 22051 .LVL3559: 22052 .thumb 22053 .syntax unified 22054 .LBE2193: 22055 .LBE2192: 22056 .LBB2194: 22057 .LBB2195: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 22058 .loc 3 928 0 22059 034a D0F80490 ldr r9, [r0, #4] @ unaligned 22060 .LVL3560: 22061 .LBE2195: 22062 .LBE2194: 22063 .LBB2196: 22064 .LBB2197: 22065 034e D4F804A0 ldr r10, [r4, #4] @ unaligned 22066 0352 0830 adds r0, r0, #8 22067 .LVL3561: 22068 0354 0834 adds r4, r4, #8 22069 .LVL3562: 22070 .LBE2197: 22071 .LBE2196: 22072 .LBB2198: 22073 .LBB2199: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 22074 .loc 6 2014 0 22075 .syntax unified 22076 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22077 0356 C9FBCA12 smlald r1, r2, r9, r10 22078 @ 0 "" 2 22079 .LVL3563: 22080 .thumb 22081 .syntax unified 22082 .LBE2199: 22083 .LBE2198: 22084 .loc 43 774 0 22085 035a 013D subs r5, r5, #1 22086 .LVL3564: 22087 035c EFD1 bne .L1544 22088 035e F600 lsls r6, r6, #3 22089 0360 9819 adds r0, r3, r6 22090 .LVL3565: ARM GAS /tmp/ccJrAs6S.s page 843 22091 0362 7644 add r6, r6, lr 22092 .LVL3566: 22093 .L1543: 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Perform the multiply-accumulate */ 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */ 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */ 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement loop counter */ 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k--; 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* If the count is not a multiple of 4, compute any remaining MACs here. 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** ** No loop unrolling is used. */ 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k = count % 0x4U; 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** while (k > 0U) 22094 .loc 43 790 0 22095 0364 17F00304 ands r4, r7, #3 22096 .LVL3567: 22097 0368 15D0 beq .L1545 22098 .LVL3568: 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Perform the multiply-accumulate */ 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum = __SMLALD(*px++, *py++, sum); 22099 .loc 43 793 0 22100 036a B0F90050 ldrsh r5, [r0] 22101 .LVL3569: 22102 036e B6F90090 ldrsh r9, [r6] 22103 .LVL3570: 22104 .LBB2200: 22105 .LBB2201: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 22106 .loc 6 2014 0 22107 .syntax unified 22108 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22109 0372 C5FBC912 smlald r1, r2, r5, r9 22110 @ 0 "" 2 22111 .LVL3571: 22112 .thumb 22113 .syntax unified 22114 .LBE2201: 22115 .LBE2200: 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22116 .loc 43 790 0 22117 0376 012C cmp r4, #1 22118 0378 0DD0 beq .L1545 22119 .LVL3572: 22120 .loc 43 793 0 22121 037a B0F90250 ldrsh r5, [r0, #2] 22122 .LVL3573: 22123 037e B6F90290 ldrsh r9, [r6, #2] 22124 .LVL3574: 22125 .LBB2204: 22126 .LBB2202: ARM GAS /tmp/ccJrAs6S.s page 844 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 22127 .loc 6 2014 0 22128 .syntax unified 22129 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22130 0382 C5FBC912 smlald r1, r2, r5, r9 22131 @ 0 "" 2 22132 .LVL3575: 22133 .thumb 22134 .syntax unified 22135 .LBE2202: 22136 .LBE2204: 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22137 .loc 43 790 0 22138 0386 022C cmp r4, #2 22139 0388 05D0 beq .L1545 22140 .LVL3576: 22141 .loc 43 793 0 22142 038a B0F90400 ldrsh r0, [r0, #4] 22143 .LVL3577: 22144 038e B6F90440 ldrsh r4, [r6, #4] 22145 .LVL3578: 22146 .LBB2205: 22147 .LBB2203: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 22148 .loc 6 2014 0 22149 .syntax unified 22150 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22151 0392 C0FBC412 smlald r1, r2, r0, r4 22152 @ 0 "" 2 22153 .LVL3579: 22154 .thumb 22155 .syntax unified 22156 .L1545: 22157 .LBE2203: 22158 .LBE2205: 22159 .LBB2206: 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement loop counter */ 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** k--; 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Store the result in the accumulator in the destination buffer. */ 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pOut = (q15_t) (__SSAT((sum >> 15), 16)); 22160 .loc 43 800 0 22161 0396 C90B lsrs r1, r1, #15 22162 .LVL3580: 22163 .LBE2206: 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22164 .loc 43 764 0 22165 0398 013F subs r7, r7, #1 22166 .LVL3581: 22167 .LBB2207: 22168 .loc 43 800 0 22169 039a 41EA4241 orr r1, r1, r2, lsl #17 22170 .LBE2207: 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pOut += inc; ARM GAS /tmp/ccJrAs6S.s page 845 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = ++pSrc1; 22171 .loc 43 805 0 22172 039e 03F10203 add r3, r3, #2 22173 .LVL3582: 22174 .LBB2208: 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 22175 .loc 43 800 0 22176 .syntax unified 22177 @ 800 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 22178 03a2 01F30F01 ssat r1, #16, r1 22179 @ 0 "" 2 22180 .LVL3583: 22181 .thumb 22182 .syntax unified 22183 .LBE2208: 22184 03a6 ACF80010 strh r1, [ip] @ movhi 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22185 .loc 43 802 0 22186 03aa C444 add ip, ip, r8 22187 .LVL3584: 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22188 .loc 43 764 0 22189 03ac C0D1 bne .L1548 22190 .LVL3585: 22191 .L1513: 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** py = pIn2; 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement MAC count */ 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** count--; 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Decrement loop counter */ 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** blockSize3--; 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *pIn1 = pSrcA; /* InputA pointer */ 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** const q15_t *pIn2 = pSrcB + (srcBLen - 1U); /* InputB pointer */ 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** q63_t sum; /* Accumulators */ 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t i = 0U, j; /* Loop counters */ 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t inv = 0U; /* Reverse order flag */ 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** uint32_t tot = 0U; /* Length */ 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* srcB is always made to slide across srcA. */ 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* But CORR(x, y) is reverse of CORR(y, x) */ 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* and a varaible, inv is set to 1 */ 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* If lengths are not equal then zero pad has to be done to make the two 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * inputs of same length. But to improve the performance, we include zeroes 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * in the output instead of zero padding either of the the inputs*/ 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * starting of the output buffer */ 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the ARM GAS /tmp/ccJrAs6S.s page 846 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * ending of the output buffer */ 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Once the zero padding is done the remaining of the output is calcualted 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** * using convolution but with the shorter signal time shifted. */ 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Calculate the length of the remaining sequence */ 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** tot = ((srcALen + srcBLen) - 2U); 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** if (srcALen > srcBLen) 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Calculating the number of zeros to be padded to the output */ 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** j = srcALen - srcBLen; 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Initialise the pointer after zero padding */ 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst += j; 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** else if (srcALen < srcBLen) 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Initialization to inputB pointer */ 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pIn1 = pSrcB; 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Initialization to the end of inputA pointer */ 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pIn2 = pSrcA + (srcALen - 1U); 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Initialisation of the pointer after zero padding */ 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** pDst = pDst + tot; 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Swapping the lengths */ 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** j = srcALen; 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** srcALen = srcBLen; 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** srcBLen = j; 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Setting the reverse flag */ 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** inv = 1; 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Loop to calculate convolution for output length number of values */ 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** for (i = 0U; i <= tot; i++) 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Initialize sum with zero to carry on MAC operations */ 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum = 0; 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Loop to perform MAC operations according to convolution equation */ 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** for (j = 0U; j <= i; j++) 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Check the array limitations */ 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** if (((i - j) < srcBLen) && (j < srcALen)) 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* z[i] += x[i-j] * y[j] */ 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]); 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Store the output in the destination buffer */ 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** if (inv == 1) 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst-- = (q15_t) __SSAT((sum >> 15U), 16U); 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** else ARM GAS /tmp/ccJrAs6S.s page 847 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** *pDst++ = (q15_t) __SSAT((sum >> 15U), 16U); 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** } 22192 .loc 43 898 0 22193 03ae 15B0 add sp, sp, #84 22194 .LCFI125: 22195 .cfi_remember_state 22196 .cfi_def_cfa_offset 36 22197 @ sp needed 22198 03b0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 22199 .LVL3586: 22200 .L1516: 22201 .LCFI126: 22202 .cfi_restore_state 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22203 .loc 43 703 0 22204 03b4 0B9B ldr r3, [sp, #44] 22205 03b6 002B cmp r3, #0 22206 03b8 AFD0 beq .L1525 22207 03ba 099A ldr r2, [sp, #36] 22208 03bc 002A cmp r2, #0 22209 03be 00F0A480 beq .L1551 22210 03c2 022A cmp r2, #2 22211 03c4 00F0B580 beq .L1527 22212 03c8 119A ldr r2, [sp, #68] 22213 03ca 002A cmp r2, #0 22214 03cc 00F08580 beq .L1528 22215 03d0 089A ldr r2, [sp, #32] 22216 03d2 049C ldr r4, [sp, #16] 22217 03d4 DDE902C0 ldrd ip, r0, [sp, #8] 22218 03d8 5B00 lsls r3, r3, #1 22219 03da D518 adds r5, r2, r3 22220 .LVL3587: 22221 .L1529: 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22222 .loc 43 714 0 22223 03dc B2F90270 ldrsh r7, [r2, #2] 22224 03e0 B0F90260 ldrsh r6, [r0, #2] 22225 03e4 B2F80090 ldrh r9, [r2] 22226 03e8 B0F80080 ldrh r8, [r0] 22227 03ec B2F804E0 ldrh lr, [r2, #4] 22228 03f0 8188 ldrh r1, [r0, #4] 22229 03f2 87FB0667 smull r6, r7, r7, r6 22230 03f6 C9FB8867 smlalbb r6, r7, r9, r8 22231 .LVL3588: 22232 03fa CEFB8167 smlalbb r6, r7, lr, r1 22233 .LVL3589: 22234 03fe 0232 adds r2, r2, #2 22235 .LVL3590: 22236 .LBB2209: 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 22237 .loc 43 721 0 22238 0400 F10B lsrs r1, r6, #15 22239 .LBE2209: ARM GAS /tmp/ccJrAs6S.s page 848 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22240 .loc 43 703 0 22241 0402 AA42 cmp r2, r5 22242 .LBB2210: 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 22243 .loc 43 721 0 22244 0404 41EA4741 orr r1, r1, r7, lsl #17 22245 .syntax unified 22246 @ 721 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 22247 0408 01F30F01 ssat r1, #16, r1 22248 @ 0 "" 2 22249 .LVL3591: 22250 .thumb 22251 .syntax unified 22252 .LBE2210: 22253 040c 2180 strh r1, [r4] @ movhi 22254 .LVL3592: 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22255 .loc 43 723 0 22256 040e 6444 add r4, r4, ip 22257 .LVL3593: 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22258 .loc 43 703 0 22259 0410 E4D1 bne .L1529 22260 .LVL3594: 22261 .L1593: 22262 0412 0299 ldr r1, [sp, #8] 22263 .LVL3595: 22264 0414 0498 ldr r0, [sp, #16] 22265 0416 0B9A ldr r2, [sp, #44] 22266 .LVL3596: 22267 0418 01FB0202 mla r2, r1, r2, r0 22268 041c 0492 str r2, [sp, #16] 22269 041e 9446 mov ip, r2 22270 0420 8846 mov r8, r1 22271 .LVL3597: 22272 .L1533: 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = pSrc1; 22273 .loc 43 754 0 22274 0422 089A ldr r2, [sp, #32] 22275 0424 119F ldr r7, [sp, #68] 22276 0426 DDF80CE0 ldr lr, [sp, #12] 22277 042a 1A44 add r2, r2, r3 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22278 .loc 43 774 0 22279 042c BE08 lsrs r6, r7, #2 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = pSrc1; 22280 .loc 43 754 0 22281 042e 1346 mov r3, r2 22282 .LVL3598: 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22283 .loc 43 774 0 22284 0430 80D1 bne .L1596 22285 .LVL3599: 22286 .L1553: 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22287 .loc 43 767 0 ARM GAS /tmp/ccJrAs6S.s page 849 22288 0432 3146 mov r1, r6 22289 0434 3246 mov r2, r6 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22290 .loc 43 774 0 22291 0436 1846 mov r0, r3 22292 0438 7646 mov r6, lr 22293 .LVL3600: 22294 043a 93E7 b .L1543 22295 .LVL3601: 22296 .L1514: 22297 043c 1D46 mov r5, r3 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22298 .loc 43 339 0 22299 043e 03F10043 add r3, r3, #-2147483648 22300 .LVL3602: 22301 0442 023B subs r3, r3, #2 22302 0444 089C ldr r4, [sp, #32] 22303 0446 0B44 add r3, r3, r1 22304 0448 02EB4303 add r3, r2, r3, lsl #1 22305 044c 0846 mov r0, r1 22306 .LVL3603: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22307 .loc 43 327 0 22308 044e 0399 ldr r1, [sp, #12] 22309 .LVL3604: 22310 0450 0891 str r1, [sp, #32] 22311 .LVL3605: 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22312 .loc 43 330 0 22313 0452 CDE90343 strd r4, r3, [sp, #12] 22314 .LVL3606: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22315 .loc 43 339 0 22316 0456 6FF00103 mvn r3, #1 22317 045a 2946 mov r1, r5 22318 .LVL3607: 22319 045c 0293 str r3, [sp, #8] 22320 045e 0990 str r0, [sp, #36] 22321 0460 DFE5 b .L1515 22322 .LVL3608: 22323 .L1595: 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 22324 .loc 43 543 0 22325 0462 0D9C ldr r4, [sp, #52] 22326 .LBB2211: 22327 .LBB2212: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 22328 .loc 3 909 0 22329 0464 DCF808C0 ldr ip, [ip, #8] @ unaligned 22330 .LBE2212: 22331 .LBE2211: 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 22332 .loc 43 543 0 22333 0468 B4F90870 ldrsh r7, [r4, #8] 22334 .LVL3609: 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 22335 .loc 43 547 0 ARM GAS /tmp/ccJrAs6S.s page 850 22336 046c BFB2 uxth r7, r7 22337 .LVL3610: 22338 .LBB2213: 22339 .LBB2214: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 22340 .loc 6 2014 0 22341 .syntax unified 22342 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22343 046e CEFBC716 smlald r1, r6, lr, r7 22344 @ 0 "" 2 22345 .LVL3611: 22346 .thumb 22347 .syntax unified 22348 .LBE2214: 22349 .LBE2213: 22350 .LBB2215: 22351 .LBB2216: 22352 0472 5446 mov r4, r10 22353 .LVL3612: 22354 .syntax unified 22355 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22356 0474 C8FBC754 smlald r5, r4, r8, r7 22357 @ 0 "" 2 22358 .LVL3613: 22359 .thumb 22360 .syntax unified 22361 .LBE2216: 22362 .LBE2215: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc2 = __SMLALDX(x1, c0, acc2); 22363 .loc 43 556 0 22364 0478 A246 mov r10, r4 22365 .LVL3614: 22366 .LBB2217: 22367 .LBB2218: 22368 .loc 6 2031 0 22369 .syntax unified 22370 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22371 047a C8FBD720 smlaldx r2, r0, r8, r7 22372 @ 0 "" 2 22373 .LVL3615: 22374 .thumb 22375 .syntax unified 22376 .LBE2218: 22377 .LBE2217: 22378 .LBB2219: 22379 .LBB2220: 22380 .syntax unified 22381 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22382 047e CCFBD73B smlaldx r3, fp, ip, r7 22383 @ 0 "" 2 22384 .LVL3616: 22385 .thumb 22386 .syntax unified 22387 0482 A6E6 b .L1537 22388 .LVL3617: 22389 .L1538: 22390 .LBE2220: ARM GAS /tmp/ccJrAs6S.s page 851 22391 .LBE2219: 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22392 .loc 43 580 0 22393 0484 032F cmp r7, #3 22394 0486 7FF4A4AE bne .L1537 22395 .LVL3618: 22396 .LBB2221: 22397 .LBB2222: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 22398 .loc 3 928 0 22399 048a 0D9F ldr r7, [sp, #52] 22400 048c 0097 str r7, [sp] 22401 048e D7F808C0 ldr ip, [r7, #8] @ unaligned 22402 .LVL3619: 22403 .LBE2222: 22404 .LBE2221: 22405 .LBB2223: 22406 .LBB2224: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 22407 .loc 3 909 0 22408 0492 D4F80090 ldr r9, [r4] @ unaligned 22409 .LVL3620: 22410 .LBE2224: 22411 .LBE2223: 22412 .LBB2225: 22413 .LBB2226: 22414 0496 D4F80270 ldr r7, [r4, #2] @ unaligned 22415 .LVL3621: 22416 .LBE2226: 22417 .LBE2225: 22418 .LBB2227: 22419 .LBB2228: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 22420 .loc 6 2014 0 22421 .syntax unified 22422 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22423 049a CEFBCC16 smlald r1, r6, lr, ip 22424 @ 0 "" 2 22425 .LVL3622: 22426 .thumb 22427 .syntax unified 22428 049e 1291 str r1, [sp, #72] 22429 .LVL3623: 22430 .LBE2228: 22431 .LBE2227: 22432 .LBB2229: 22433 .LBB2230: 22434 04a0 D646 mov lr, r10 22435 .syntax unified 22436 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22437 04a2 C8FBCC5E smlald r5, lr, r8, ip 22438 @ 0 "" 2 22439 .LVL3624: 22440 .thumb 22441 .syntax unified 22442 .LBE2230: 22443 .LBE2229: ARM GAS /tmp/ccJrAs6S.s page 852 22444 .LBB2231: 22445 .LBB2232: 22446 .syntax unified 22447 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22448 04a6 C9FBCC20 smlald r2, r0, r9, ip 22449 @ 0 "" 2 22450 .LVL3625: 22451 .thumb 22452 .syntax unified 22453 .LBE2232: 22454 .LBE2231: 22455 .LBB2233: 22456 .LBB2234: 22457 .syntax unified 22458 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22459 04aa C7FBCC3B smlald r3, fp, r7, ip 22460 @ 0 "" 2 22461 .LVL3626: 22462 .thumb 22463 .syntax unified 22464 .LBE2234: 22465 .LBE2233: 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22466 .loc 43 597 0 22467 04ae 0099 ldr r1, [sp] 22468 .LBB2235: 22469 .LBB2236: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 22470 .loc 3 909 0 22471 04b0 D4F80490 ldr r9, [r4, #4] @ unaligned 22472 .LBE2236: 22473 .LBE2235: 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22474 .loc 43 597 0 22475 04b4 B1F90CC0 ldrsh ip, [r1, #12] 22476 .LVL3627: 22477 .LBB2237: 22478 .LBB2238: 22479 .loc 6 2031 0 22480 04b8 1299 ldr r1, [sp, #72] 22481 .LBE2238: 22482 .LBE2237: 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** #endif /* #ifdef ARM_MATH_BIG_ENDIAN */ 22483 .loc 43 603 0 22484 04ba 1FFA8CFC uxth ip, ip 22485 .LVL3628: 22486 .LBB2240: 22487 .LBB2239: 22488 .loc 6 2031 0 22489 .syntax unified 22490 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22491 04be C8FBDC16 smlaldx r1, r6, r8, ip 22492 @ 0 "" 2 22493 .LVL3629: 22494 .thumb 22495 .syntax unified 22496 .LBE2239: ARM GAS /tmp/ccJrAs6S.s page 853 22497 .LBE2240: 22498 .LBB2241: 22499 .LBB2242: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 22500 .loc 6 2014 0 22501 04c2 7446 mov r4, lr 22502 .LVL3630: 22503 .syntax unified 22504 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22505 04c4 C7FBCC54 smlald r5, r4, r7, ip 22506 @ 0 "" 2 22507 .LVL3631: 22508 .thumb 22509 .syntax unified 22510 .LBE2242: 22511 .LBE2241: 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** acc2 = __SMLALDX(x2, c0, acc2); 22512 .loc 43 612 0 22513 04c8 A246 mov r10, r4 22514 .LVL3632: 22515 .LBB2243: 22516 .LBB2244: 22517 .loc 6 2031 0 22518 .syntax unified 22519 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22520 04ca C7FBDC20 smlaldx r2, r0, r7, ip 22521 @ 0 "" 2 22522 .LVL3633: 22523 .thumb 22524 .syntax unified 22525 .LBE2244: 22526 .LBE2243: 22527 .LBB2245: 22528 .LBB2246: 22529 .syntax unified 22530 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 22531 04ce C9FBDC3B smlaldx r3, fp, r9, ip 22532 @ 0 "" 2 22533 .LVL3634: 22534 .thumb 22535 .syntax unified 22536 04d2 7EE6 b .L1537 22537 .LVL3635: 22538 .L1552: 22539 04d4 0B46 mov r3, r1 22540 .LBE2246: 22541 .LBE2245: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22542 .loc 43 448 0 22543 04d6 0898 ldr r0, [sp, #32] 22544 04d8 ADE6 b .L1534 22545 .LVL3636: 22546 .L1528: 22547 04da 089C ldr r4, [sp, #32] 22548 04dc 1A46 mov r2, r3 22549 04de DDE90267 ldrd r6, r7, [sp, #8] 22550 04e2 04EB4201 add r1, r4, r2, lsl #1 ARM GAS /tmp/ccJrAs6S.s page 854 22551 04e6 049A ldr r2, [sp, #16] 22552 04e8 0D46 mov r5, r1 22553 .LVL3637: 22554 .L1530: 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22555 .loc 43 714 0 22556 04ea 34F9023B ldrsh r3, [r4], #2 22557 .LVL3638: 22558 04ee B7F90000 ldrsh r0, [r7] 22559 04f2 80FB0301 smull r0, r1, r0, r3 22560 .LBB2247: 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 22561 .loc 43 721 0 22562 04f6 C30B lsrs r3, r0, #15 22563 .LBE2247: 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22564 .loc 43 703 0 22565 04f8 AC42 cmp r4, r5 22566 .LBB2248: 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 22567 .loc 43 721 0 22568 04fa 43EA4143 orr r3, r3, r1, lsl #17 22569 .syntax unified 22570 @ 721 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 22571 04fe 03F30F03 ssat r3, #16, r3 22572 @ 0 "" 2 22573 .LVL3639: 22574 .thumb 22575 .syntax unified 22576 .LBE2248: 22577 0502 1380 strh r3, [r2] @ movhi 22578 .LVL3640: 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22579 .loc 43 723 0 22580 0504 3244 add r2, r2, r6 22581 .LVL3641: 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22582 .loc 43 703 0 22583 0506 F0D1 bne .L1530 22584 0508 51E7 b .L1513 22585 .LVL3642: 22586 .L1551: 22587 050a 1A46 mov r2, r3 22588 .LBB2249: 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 22589 .loc 43 721 0 22590 050c 0298 ldr r0, [sp, #8] 22591 .LBE2249: 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22592 .loc 43 703 0 22593 050e 049B ldr r3, [sp, #16] 22594 .LVL3643: 22595 .LBB2250: 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 22596 .loc 43 721 0 22597 0510 0999 ldr r1, [sp, #36] 22598 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 855 22599 @ 721 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 22600 0512 01F30F01 ssat r1, #16, r1 22601 @ 0 "" 2 22602 .LVL3644: 22603 .thumb 22604 .syntax unified 22605 .L1526: 22606 .LBE2250: 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22607 .loc 43 703 0 22608 0516 013A subs r2, r2, #1 22609 .LVL3645: 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 22610 .loc 43 721 0 22611 0518 1980 strh r1, [r3] @ movhi 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22612 .loc 43 723 0 22613 051a 0344 add r3, r3, r0 22614 .LVL3646: 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22615 .loc 43 703 0 22616 051c FBD1 bne .L1526 22617 051e 0B9B ldr r3, [sp, #44] 22618 .LVL3647: 22619 0520 0299 ldr r1, [sp, #8] 22620 .LVL3648: 22621 0522 0498 ldr r0, [sp, #16] 22622 0524 01FB0302 mla r2, r1, r3, r0 22623 0528 0492 str r2, [sp, #16] 22624 052a 5B00 lsls r3, r3, #1 22625 052c 9446 mov ip, r2 22626 052e 8846 mov r8, r1 22627 0530 77E7 b .L1533 22628 .LVL3649: 22629 .L1527: 22630 0532 089A ldr r2, [sp, #32] 22631 0534 049C ldr r4, [sp, #16] 22632 0536 DDE902E0 ldrd lr, r0, [sp, #8] 22633 053a 5B00 lsls r3, r3, #1 22634 .LVL3650: 22635 053c D518 adds r5, r2, r3 22636 .LVL3651: 22637 .L1532: 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22638 .loc 43 714 0 22639 053e B2F90060 ldrsh r6, [r2] 22640 0542 B0F90070 ldrsh r7, [r0] 22641 0546 32F8021F ldrh r1, [r2, #2]! 22642 .LVL3652: 22643 054a B0F802C0 ldrh ip, [r0, #2] 22644 054e 87FB0667 smull r6, r7, r7, r6 22645 0552 CCFB8167 smlalbb r6, r7, ip, r1 22646 .LBB2251: 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 22647 .loc 43 721 0 22648 0556 F10B lsrs r1, r6, #15 22649 .LBE2251: ARM GAS /tmp/ccJrAs6S.s page 856 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22650 .loc 43 703 0 22651 0558 AA42 cmp r2, r5 22652 .LBB2252: 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** /* Destination pointer is updated according to the address modifier, inc */ 22653 .loc 43 721 0 22654 055a 41EA4741 orr r1, r1, r7, lsl #17 22655 .syntax unified 22656 @ 721 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 22657 055e 01F30F01 ssat r1, #16, r1 22658 @ 0 "" 2 22659 .LVL3653: 22660 .thumb 22661 .syntax unified 22662 .LBE2252: 22663 0562 2180 strh r1, [r4] @ movhi 22664 .LVL3654: 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22665 .loc 43 723 0 22666 0564 7444 add r4, r4, lr 22667 .LVL3655: 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22668 .loc 43 703 0 22669 0566 EAD1 bne .L1532 22670 0568 53E7 b .L1593 22671 .LVL3656: 22672 .L1550: 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** 22673 .loc 43 388 0 22674 056a 2346 mov r3, r4 22675 .LVL3657: 22676 056c 2246 mov r2, r4 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** px = pIn1; 22677 .loc 43 427 0 22678 056e 3D46 mov r5, r7 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c **** { 22679 .loc 43 395 0 22680 0570 7146 mov r1, lr 22681 .LVL3658: 22682 0572 AEE5 b .L1518 22683 .cfi_endproc 22684 .LFE188: 22686 .section .text.arm_correlate_q31,"ax",%progbits 22687 .align 1 22688 .p2align 2,,3 22689 .global arm_correlate_q31 22690 .syntax unified 22691 .thumb 22692 .thumb_func 22693 .fpu fpv4-sp-d16 22695 arm_correlate_q31: 22696 .LFB189: 22697 .file 44 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Title: arm_correlate_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Description: Correlation of Q31 sequences ARM GAS /tmp/ccJrAs6S.s page 857 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** @addtogroup Corr 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** @brief Correlation of Q31 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** @param[out] pDst points to the location where the output result is written. Length 2 * 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** The function is implemented using an internal 64-bit accumulator. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** The accumulator has a 2.62 format and maintains full precision of the intermedia 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** There is no saturation on intermediate additions. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** Thus, if the accumulator overflows it wraps around and distorts the result. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** The input signals should be scaled down to avoid intermediate overflows. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** maximum of min(srcALen, srcBLen) number of additions is carried internally. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** @remark 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** Refer to \ref arm_correlate_fast_q31() for a faster but less precise implementat 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ ARM GAS /tmp/ccJrAs6S.s page 858 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #if defined(ARM_MATH_MVEI) 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #include "arm_helium_utils.h" 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #include "arm_vec_filtering.h" 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** void arm_correlate_q31( 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t * pSrcA, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t srcALen, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t * pSrcB, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t srcBLen, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** q31_t * pDst) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *pIn1 = pSrcA; /* inputA pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Loop to perform MAC operations according to correlation equation 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *pX; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *pY; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *pA; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *pB; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int32_t i = 0U, j = 0; /* loop counters */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int32_t inv = 4; /* Reverse order flag */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t tot = 0U; /* Length */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int32_t block1, block2, block3; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int32_t incr; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** tot = ((srcALen + srcBLen) - 2U); 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** if (srcALen > srcBLen) 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Calculating the number of zeros to be padded to the output 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** j = srcALen - srcBLen; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Initialize the pointer after zero padding 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += j; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** else if (srcALen < srcBLen) 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Initialization to inputB pointer 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pIn1 = pSrcB; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Initialization to the end of inputA pointer 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pIn2 = pSrcA + (srcALen - 1U); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Initialization of the pointer after zero padding 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst = pDst + tot; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Swapping the lengths 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** j = srcALen; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** srcALen = srcBLen; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** srcBLen = j; ARM GAS /tmp/ccJrAs6S.s page 859 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Setting the reverse flag 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** inv = -4; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** block1 = srcBLen - 1; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** block2 = srcALen - srcBLen + 1; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** block3 = srcBLen - 1; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pA = pIn1; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pB = pIn2; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** incr = inv / 4; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** for (i = 0U; i <= block1 - 2; i += 2) 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t count = i + 1; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc0 = 0LL; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc1 = 0LL; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* compute 2 accumulators per loop */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* size is incrementing for second accumulator */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Y pointer is decrementing for second accumulator */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pX = pA; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pY = pB; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q31(acc0, acc1, pX, pY, count); 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc0; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc1; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pB -= 2; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** for (; i < block1; i++) 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t count = i + 1; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc = 0LL; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pX = pA; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pY = pB; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** MVE_INTR_CORR_SINGLE_Q31(acc, pX, pY, count); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pB--; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** for (i = 0U; i <= block2 - 4; i += 4) 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc0 = 0LL; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc1 = 0LL; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc2 = 0LL; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc3 = 0LL; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pX = pA; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pY = pB; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* compute 4 accumulators per loop */ ARM GAS /tmp/ccJrAs6S.s page 860 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* size is fixed for all accumulators */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* X pointer is incrementing for successive accumulators */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q31(acc0, acc1, acc2, acc3, pX, pY, srcBLen); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc0; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc1; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc2; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc3; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pA += 4; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** for (; i <= block2 - 2; i += 2) 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc0 = 0LL; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc1 = 0LL; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pX = pA; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pY = pB; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* compute 2 accumulators per loop */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* size is fixed for all accumulators */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* X pointer is incrementing for second accumulator */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q31(acc0, acc1, pX, pY, srcBLen); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc0; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc1; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pA += 2; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** if (block2 & 1) 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc = 0LL; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pX = pA; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pY = pB; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** MVE_INTR_CORR_SINGLE_Q31(acc, pX, pY, srcBLen); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pA++; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** for (i = block3 - 1; i >= 0; i -= 2) 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t count = (i + 1); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc0 = 0LL; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc1 = 0LL; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pX = pA; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pY = pB; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* compute 2 accumulators per loop */ ARM GAS /tmp/ccJrAs6S.s page 861 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* size is decrementing for second accumulator */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* X pointer is incrementing for second accumulator */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q31(acc0, acc1, pX, pY, count); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc0; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc1; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pA += 2; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** for (; i >= 0; i--) 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t count = (i + 1); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int64_t acc = 0LL; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pX = pA; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pY = pB; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** MVE_INTR_CORR_SINGLE_Q31(acc, pX, pY, count); 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst = (q31_t) acc; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += incr; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pA++; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #else 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** void arm_correlate_q31( 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t * pSrcA, 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t srcALen, 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t * pSrcB, 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t srcBLen, 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** q31_t * pDst) 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22698 .loc 44 265 0 22699 .cfi_startproc 22700 @ args = 4, pretend = 0, frame = 24 22701 @ frame_needed = 0, uses_anonymous_args = 0 22702 .LVL3659: 22703 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 22704 .LCFI127: 22705 .cfi_def_cfa_offset 36 22706 .cfi_offset 4, -36 22707 .cfi_offset 5, -32 22708 .cfi_offset 6, -28 22709 .cfi_offset 7, -24 22710 .cfi_offset 8, -20 22711 .cfi_offset 9, -16 22712 .cfi_offset 10, -12 22713 .cfi_offset 11, -8 22714 .cfi_offset 14, -4 22715 0004 1C46 mov r4, r3 22716 0006 87B0 sub sp, sp, #28 22717 .LCFI128: 22718 .cfi_def_cfa_offset 64 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #if (1) 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** //#if !defined(ARM_MATH_CM0_FAMILY) ARM GAS /tmp/ccJrAs6S.s page 862 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *pIn1; /* InputA pointer */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *pIn2; /* InputB pointer */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** q31_t *pOut = pDst; /* Output pointer */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *px; /* Intermediate inputA pointer */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *py; /* Intermediate inputB pointer */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *pSrc1; /* Intermediate pointers */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** q63_t sum; /* Accumulators */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t j, k, count, blkCnt; /* Loop counters */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t outBlockSize; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** int32_t inc = 1; /* Destination address modifier */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** q63_t acc0, acc1, acc2; /* Accumulators */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** q31_t x0, x1, x2, c0; /* Temporary variables for holding input and 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #endif 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* srcB is always made to slide across srcA. */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* But CORR(x, y) is reverse of CORR(y, x) */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* and the destination pointer modifier, inc is set to -1 */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* But to improve the performance, 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * we include zeroes in the output instead of zero padding either of the the inputs*/ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* If srcALen > srcBLen, 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* If srcALen < srcBLen, 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** if (srcALen >= srcBLen) 22719 .loc 44 300 0 22720 0008 A142 cmp r1, r4 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 22721 .loc 44 265 0 22722 000a 0193 str r3, [sp, #4] 22723 000c 8346 mov fp, r0 22724 000e 109B ldr r3, [sp, #64] 22725 .LVL3660: 22726 .loc 44 300 0 22727 0010 C0F0B980 bcc .L1598 22728 .LVL3661: 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialization of inputA pointer */ 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pIn1 = pSrcA; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialization of inputB pointer */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pIn2 = pSrcB; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Number of output samples is calculated */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** outBlockSize = (2U * srcALen) - 1U; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* When srcALen > srcBLen, zero padding is done to srcB 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * to make their lengths equal. 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Instead, (outBlockSize - (srcALen + srcBLen - 1)) 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * number of output samples are made zero */ ARM GAS /tmp/ccJrAs6S.s page 863 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** j = outBlockSize - (srcALen + (srcBLen - 1U)); 22729 .loc 44 315 0 22730 0014 081B subs r0, r1, r4 22731 .LVL3662: 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Updating the pointer position to non zero value */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pOut += j; 22732 .loc 44 318 0 22733 0016 03EB8003 add r3, r3, r0, lsl #2 22734 .LVL3663: 22735 001a 4FF0040E mov lr, #4 22736 .LVL3664: 22737 .L1599: 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** else 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialization of inputA pointer */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pIn1 = pSrcB; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialization of inputB pointer */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pIn2 = pSrcA; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** j = srcBLen; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** srcBLen = srcALen; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** srcALen = j; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* CORR(x, y) = Reverse order(CORR(y, x)) */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Hence set the destination pointer to point to the last output sample */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pOut = pDst + ((srcALen + srcBLen) - 2U); 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination address modifier is set to -1 */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** inc = -1; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* The function is internally 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * divided into three stages according to the number of multiplications that has to be 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * taken place between inputA samples and inputB samples. In the first stage of the 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * algorithm, the multiplications increase by one for every iteration. 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * In the third stage of the algorithm, the multiplications decrease by one 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * for every iteration. */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* The algorithm is implemented in three stages. 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** The loop counters of each stage is initiated here. */ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blockSize1 = srcBLen - 1U; 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blockSize2 = srcALen - (srcBLen - 1U); 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blockSize3 = blockSize1; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* -------------------------- 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Initializations of stage1 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * -------------------------*/ 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* sum = x[0] * y[srcBlen - 1] 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * .... 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] ARM GAS /tmp/ccJrAs6S.s page 864 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** The count variable holds the number of MAC operations performed */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** count = 1U; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Working pointer of inputA */ 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** px = pIn1; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Working pointer of inputB */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pSrc1 = pIn2 + (srcBLen - 1U); 22738 .loc 44 373 0 22739 001e 04F18040 add r0, r4, #1073741824 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blockSize3 = blockSize1; 22740 .loc 44 352 0 22741 0022 0131 adds r1, r1, #1 22742 .LVL3665: 22743 0024 091B subs r1, r1, r4 22744 .LVL3666: 22745 .loc 44 373 0 22746 0026 0138 subs r0, r0, #1 22747 0028 8000 lsls r0, r0, #2 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blockSize3 = blockSize1; 22748 .loc 44 352 0 22749 002a 0291 str r1, [sp, #8] 22750 .LVL3667: 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** py = pSrc1; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* ------------------------ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Stage1 process 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * ----------------------*/ 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* The first stage starts here */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (blockSize1 > 0U) 22751 .loc 44 382 0 22752 002c 611E subs r1, r4, #1 22753 .LVL3668: 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** py = pSrc1; 22754 .loc 44 373 0 22755 002e 02EB0009 add r9, r2, r0 22756 .LVL3669: 22757 .loc 44 382 0 22758 0032 72D0 beq .L1600 22759 0034 0430 adds r0, r0, #4 22760 0036 0BEB0007 add r7, fp, r0 22761 003a 0BF10408 add r8, fp, #4 22762 003e 9A46 mov r10, r3 22763 0040 0393 str r3, [sp, #12] 22764 0042 8C46 mov ip, r1 22765 .LVL3670: 22766 .L1602: 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Accumulator is made zero for every iteration */ 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum = 0; 22767 .loc 44 385 0 22768 0044 0025 movs r5, #0 ARM GAS /tmp/ccJrAs6S.s page 865 22769 0046 0026 movs r6, #0 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22770 .loc 44 382 0 22771 0048 4C46 mov r4, r9 22772 004a 5B46 mov r3, fp 22773 .loc 44 385 0 22774 004c 2846 mov r0, r5 22775 004e 3146 mov r1, r6 22776 .LVL3671: 22777 .L1601: 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k = count >> 2U; 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (k > 0U) 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* x[0] * y[srcBLen - 4] */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * (*py++); 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* x[1] * y[srcBLen - 3] */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * (*py++); 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* x[2] * y[srcBLen - 2] */ 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * (*py++); 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* x[3] * y[srcBLen - 1] */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * (*py++); 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement loop counter */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k--; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Loop unrolling: Compute remaining outputs */ 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k = count % 0x4U; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #else 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialize k with number of samples */ 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k = count; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (k > 0U) 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Perform the multiply-accumulate */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* x[0] * y[srcBLen - 1] */ 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * (*py++); 22778 .loc 44 424 0 22779 0050 53F8046B ldr r6, [r3], #4 22780 .LVL3672: 22781 0054 54F8045B ldr r5, [r4], #4 22782 .LVL3673: 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22783 .loc 44 420 0 22784 0058 4345 cmp r3, r8 ARM GAS /tmp/ccJrAs6S.s page 866 22785 .loc 44 424 0 22786 005a C5FB0601 smlal r0, r1, r5, r6 22787 .LVL3674: 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22788 .loc 44 420 0 22789 005e F7D1 bne .L1601 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement loop counter */ 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k--; 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pOut = (q31_t) (sum >> 31); 22790 .loc 44 431 0 22791 0060 C00F lsrs r0, r0, #31 22792 .LVL3675: 22793 0062 03F10408 add r8, r3, #4 22794 0066 40EA4100 orr r0, r0, r1, lsl #1 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22795 .loc 44 382 0 22796 006a 4745 cmp r7, r8 22797 .loc 44 431 0 22798 006c CAF80000 str r0, [r10] 22799 0070 A9F10409 sub r9, r9, #4 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pOut += inc; 22800 .loc 44 433 0 22801 0074 F244 add r10, r10, lr 22802 .LVL3676: 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22803 .loc 44 382 0 22804 0076 E5D1 bne .L1602 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** py = pSrc1 - count; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** px = pIn1; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Increment MAC count */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** count++; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement loop counter */ 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blockSize1--; 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* -------------------------- 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Initializations of stage2 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * ------------------------*/ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * .... 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Working pointer of inputA */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** px = pIn1; 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 867 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Working pointer of inputB */ 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** py = pIn2; 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* count is index by which the pointer pIn1 to be incremented */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** count = 0U; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* ------------------- 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Stage2 process 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * ------------------*/ 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * So, to loop unroll over blockSize2, 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * srcBLen should be greater than or equal to 4 */ 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** if (srcBLen >= 4U) 22805 .loc 44 472 0 22806 0078 0198 ldr r0, [sp, #4] 22807 007a 039B ldr r3, [sp, #12] 22808 007c 0328 cmp r0, #3 22809 007e 6146 mov r1, ip 22810 0080 0EFB0C33 mla r3, lr, ip, r3 22811 .LVL3677: 22812 0084 49D9 bls .L1600 22813 .LVL3678: 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Loop unroll by 3 */ 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blkCnt = blockSize2 / 3; 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (blkCnt > 0U) 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Set all accumulators to zero */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc0 = 0; 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc1 = 0; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc2 = 0; 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* read x[0], x[1] samples */ 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** x0 = *px++; 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** x1 = *px++; 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Apply loop unrolling and compute 3 MACs simultaneously. */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k = srcBLen / 3; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* First part of the processing with loop unrolling. Compute 3 MACs at a time. 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** ** a second loop below computes MACs for the remaining 1 to 2 samples. */ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** do 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Read y[0] sample */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** c0 = *(py); 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Read x[2] sample */ 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** x2 = *(px); 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Perform the multiply-accumulate */ 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* acc0 += x[0] * y[0] */ 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc0 += ((q63_t) x0 * c0); 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* acc1 += x[1] * y[0] */ 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc1 += ((q63_t) x1 * c0); ARM GAS /tmp/ccJrAs6S.s page 868 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* acc2 += x[2] * y[0] */ 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc2 += ((q63_t) x2 * c0); 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Read y[1] sample */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** c0 = *(py + 1U); 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Read x[3] sample */ 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** x0 = *(px + 1U); 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Perform the multiply-accumulate */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* acc0 += x[1] * y[1] */ 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc0 += ((q63_t) x1 * c0); 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* acc1 += x[2] * y[1] */ 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc1 += ((q63_t) x2 * c0); 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* acc2 += x[3] * y[1] */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc2 += ((q63_t) x0 * c0); 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Read y[2] sample */ 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** c0 = *(py + 2U); 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Read x[4] sample */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** x1 = *(px + 2U); 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Perform the multiply-accumulate */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* acc0 += x[2] * y[2] */ 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc0 += ((q63_t) x2 * c0); 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* acc1 += x[3] * y[2] */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc1 += ((q63_t) x0 * c0); 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* acc2 += x[4] * y[2] */ 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc2 += ((q63_t) x1 * c0); 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* update scratch pointers */ 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** px += 3U; 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** py += 3U; 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } while (--k); 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* If the srcBLen is not a multiple of 3, compute any remaining MACs here. 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** ** No loop unrolling is used. */ 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k = srcBLen - (3 * (srcBLen / 3)); 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (k > 0U) 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Read y[4] sample */ 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** c0 = *(py++); 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Read x[7] sample */ 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** x2 = *(px++); 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Perform the multiply-accumulates */ 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* acc0 += x[4] * y[4] */ 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc0 += ((q63_t) x0 * c0); 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* acc1 += x[5] * y[4] */ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc1 += ((q63_t) x1 * c0); 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* acc2 += x[6] * y[4] */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** acc2 += ((q63_t) x2 * c0); 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Reuse the present samples for the next MAC */ 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** x0 = x1; ARM GAS /tmp/ccJrAs6S.s page 869 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** x1 = x2; 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement loop counter */ 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k--; 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pOut = (q31_t) (acc0 >> 31); 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pOut += inc; 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pOut = (q31_t) (acc1 >> 31); 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pOut += inc; 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pOut = (q31_t) (acc2 >> 31); 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pOut += inc; 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Increment the pointer pIn1 index, count by 3 */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** count += 3U; 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** px = pIn1 + count; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** py = pIn2; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement loop counter */ 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blkCnt--; 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Loop unrolling: Compute remaining outputs */ 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blkCnt = blockSize2 - 3 * (blockSize2 / 3); 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #else 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialize blkCnt with number of samples */ 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blkCnt = blockSize2; 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (blkCnt > 0U) 22814 .loc 44 602 0 22815 0086 0298 ldr r0, [sp, #8] 22816 0088 0028 cmp r0, #0 22817 008a 00F08C80 beq .L1642 22818 008e 8000 lsls r0, r0, #2 22819 0090 0390 str r0, [sp, #12] 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 22820 .loc 44 433 0 22821 0092 DDF80480 ldr r8, [sp, #4] 22822 0096 5844 add r0, fp, r0 22823 0098 CDE9043C strd r3, ip, [sp, #16] 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 22824 .loc 44 457 0 22825 009c D946 mov r9, fp 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 22826 .loc 44 433 0 22827 009e 9A46 mov r10, r3 22828 00a0 8446 mov ip, r0 ARM GAS /tmp/ccJrAs6S.s page 870 22829 .LVL3679: 22830 .L1614: 22831 00a2 4346 mov r3, r8 22832 00a4 1546 mov r5, r2 22833 00a6 4C46 mov r4, r9 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Accumulator is made zero for every iteration */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum = 0; 22834 .loc 44 605 0 22835 00a8 0020 movs r0, #0 22836 00aa 0021 movs r1, #0 22837 .LVL3680: 22838 .L1613: 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k = srcBLen >> 2U; 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (k > 0U) 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Perform the multiply-accumulates */ 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * *py++; 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * *py++; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * *py++; 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * *py++; 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement loop counter */ 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k--; 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Loop unrolling: Compute remaining outputs */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k = srcBLen % 0x4U; 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #else 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialize blkCnt with number of samples */ 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k = srcBLen; 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (k > 0U) 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Perform the multiply-accumulate */ 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * *py++; 22839 .loc 44 637 0 22840 00ac 54F8047B ldr r7, [r4], #4 22841 .LVL3681: 22842 00b0 55F8046B ldr r6, [r5], #4 22843 .LVL3682: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22844 .loc 44 634 0 22845 00b4 013B subs r3, r3, #1 22846 .LVL3683: 22847 .loc 44 637 0 22848 00b6 C6FB0701 smlal r0, r1, r6, r7 22849 .LVL3684: ARM GAS /tmp/ccJrAs6S.s page 871 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22850 .loc 44 634 0 22851 00ba F7D1 bne .L1613 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement the loop counter */ 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k--; 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pOut = (q31_t) (sum >> 31); 22852 .loc 44 644 0 22853 00bc C30F lsrs r3, r0, #31 22854 00be 09F10409 add r9, r9, #4 22855 00c2 43EA4103 orr r3, r3, r1, lsl #1 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22856 .loc 44 602 0 22857 00c6 CC45 cmp ip, r9 22858 .loc 44 644 0 22859 00c8 CAF80030 str r3, [r10] 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pOut += inc; 22860 .loc 44 646 0 22861 00cc F244 add r10, r10, lr 22862 .LVL3685: 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22863 .loc 44 602 0 22864 00ce E8D1 bne .L1614 22865 00d0 DDE90431 ldrd r3, r1, [sp, #16] 22866 00d4 0298 ldr r0, [sp, #8] 22867 .LVL3686: 22868 00d6 0EFB0033 mla r3, lr, r0, r3 22869 00da 0398 ldr r0, [sp, #12] 22870 .LVL3687: 22871 .L1604: 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Increment MAC count */ 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** count++; 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** px = pIn1 + count; 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** py = pIn2; 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement loop counter */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blkCnt--; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** else 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* If the srcBLen is not a multiple of 4, 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * the blockSize2 loop cannot be unrolled by 4 */ 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blkCnt = blockSize2; 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (blkCnt > 0U) 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Accumulator is made zero for every iteration */ 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum = 0; 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 872 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* srcBLen number of MACS should be performed */ 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k = srcBLen; 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (k > 0U) 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Perform the multiply-accumulate */ 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * *py++; 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement the loop counter */ 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k--; 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pOut = (q31_t) (sum >> 31); 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pOut += inc; 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Increment MAC count */ 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** count++; 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** px = pIn1 + count; 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** py = pIn2; 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement loop counter */ 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blkCnt--; 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* -------------------------- 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Initializations of stage3 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * -------------------------*/ 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLe 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLe 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * .... 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * sum += x[srcALen-1] * y[0] 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** */ 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** The count variable holds the number of MAC operations performed */ 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** count = srcBLen - 1U; 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Working pointer of inputA */ 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pSrc1 = pIn1 + (srcALen - (srcBLen - 1U)); 22872 .loc 44 716 0 22873 00dc 5844 add r0, r0, fp 22874 00de 8146 mov r9, r0 22875 .LVL3688: 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** px = pSrc1; 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Working pointer of inputB */ 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** py = pIn2; 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* ------------------- ARM GAS /tmp/ccJrAs6S.s page 873 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * Stage3 process 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * ------------------*/ 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (blockSize3 > 0U) 22876 .loc 44 726 0 22877 00e0 C1B1 cbz r1, .L1597 22878 00e2 9C46 mov ip, r3 22879 00e4 9046 mov r8, r2 22880 .LVL3689: 22881 .L1616: 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22882 .loc 44 665 0 22883 00e6 0846 mov r0, r1 22884 00e8 4746 mov r7, r8 22885 00ea 4E46 mov r6, r9 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Accumulator is made zero for every iteration */ 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum = 0; 22886 .loc 44 729 0 22887 00ec 0024 movs r4, #0 22888 00ee 0025 movs r5, #0 22889 .LVL3690: 22890 .L1615: 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k = count >> 2U; 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (k > 0U) 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Perform the multiply-accumulate */ 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* sum += x[srcALen - srcBLen + 4] * y[3] */ 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * *py++; 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* sum += x[srcALen - srcBLen + 3] * y[2] */ 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * *py++; 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* sum += x[srcALen - srcBLen + 2] * y[1] */ 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * *py++; 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* sum += x[srcALen - srcBLen + 1] * y[0] */ 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * *py++; 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement loop counter */ 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k--; 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Loop unrolling: Compute remaining outputs */ 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k = count % 0x4U; 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #else 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialize blkCnt with number of samples */ 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k = count; 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ ARM GAS /tmp/ccJrAs6S.s page 874 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** while (k > 0U) 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Perform the multiply-accumulate */ 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += (q63_t) *px++ * *py++; 22891 .loc 44 768 0 22892 00f0 56F8042B ldr r2, [r6], #4 22893 .LVL3691: 22894 00f4 57F8043B ldr r3, [r7], #4 22895 .LVL3692: 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22896 .loc 44 765 0 22897 00f8 0138 subs r0, r0, #1 22898 .LVL3693: 22899 .loc 44 768 0 22900 00fa C3FB0245 smlal r4, r5, r3, r2 22901 .LVL3694: 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22902 .loc 44 765 0 22903 00fe F7D1 bne .L1615 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement loop counter */ 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** k--; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Store the result in the accumulator in the destination buffer. */ 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pOut = (q31_t) (sum >> 31); 22904 .loc 44 775 0 22905 0100 E00F lsrs r0, r4, #31 22906 0102 40EA4500 orr r0, r0, r5, lsl #1 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22907 .loc 44 726 0 22908 0106 0139 subs r1, r1, #1 22909 .LVL3695: 22910 .loc 44 775 0 22911 0108 CCF80000 str r0, [ip] 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pOut += inc; 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** px = ++pSrc1; 22912 .loc 44 780 0 22913 010c 09F10409 add r9, r9, #4 22914 .LVL3696: 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 22915 .loc 44 777 0 22916 0110 F444 add ip, ip, lr 22917 .LVL3697: 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22918 .loc 44 726 0 22919 0112 E8D1 bne .L1616 22920 .LVL3698: 22921 .L1597: 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** py = pIn2; 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement MAC count */ 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** count--; ARM GAS /tmp/ccJrAs6S.s page 875 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Decrement loop counter */ 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** blockSize3--; 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #else 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* alternate version for CM0_FAMILY */ 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *pIn1 = pSrcA; /* InputA pointer */ 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** const q31_t *pIn2 = pSrcB + (srcBLen - 1U); /* InputB pointer */ 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** q63_t sum; /* Accumulators */ 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t i = 0U, j; /* Loop counters */ 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t inv = 0U; /* Reverse order flag */ 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** uint32_t tot = 0U; /* Length */ 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* srcB is always made to slide across srcA. */ 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* But CORR(x, y) is reverse of CORR(y, x) */ 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* and a varaible, inv is set to 1 */ 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* If lengths are not equal then zero pad has to be done to make the two 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * inputs of same length. But to improve the performance, we include zeroes 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * in the output instead of zero padding either of the the inputs*/ 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * starting of the output buffer */ 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * ending of the output buffer */ 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Once the zero padding is done the remaining of the output is calcualted 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** * using correlation but with the shorter signal time shifted. */ 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Calculate the length of the remaining sequence */ 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** tot = ((srcALen + srcBLen) - 2U); 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** if (srcALen > srcBLen) 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Calculating the number of zeros to be padded to the output */ 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** j = srcALen - srcBLen; 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialise the pointer after zero padding */ 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst += j; 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** else if (srcALen < srcBLen) 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialization to inputB pointer */ 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pIn1 = pSrcB; 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialization to the end of inputA pointer */ 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pIn2 = pSrcA + (srcALen - 1U); 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialisation of the pointer after zero padding */ 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** pDst = pDst + tot; 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Swapping the lengths */ 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** j = srcALen; 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** srcALen = srcBLen; ARM GAS /tmp/ccJrAs6S.s page 876 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** srcBLen = j; 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Setting the reverse flag */ 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** inv = 1; 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Loop to calculate correlation for output length number of times */ 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** for (i = 0U; i <= tot; i++) 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Initialize sum with zero to carry out MAC operations */ 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum = 0; 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Loop to perform MAC operations according to correlation equation */ 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** for (j = 0U; j <= i; j++) 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Check the array limitations */ 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** if (((i - j) < srcBLen) && (j < srcALen)) 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* z[i] += x[i-j] * y[j] */ 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - j)]); 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Store the output in the destination buffer */ 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** if (inv == 1) 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst-- = (q31_t) (sum >> 31U); 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** else 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** *pDst++ = (q31_t) (sum >> 31U); 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** } 22922 .loc 44 874 0 22923 0114 07B0 add sp, sp, #28 22924 .LCFI129: 22925 .cfi_remember_state 22926 .cfi_def_cfa_offset 36 22927 @ sp needed 22928 0116 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 22929 .LVL3699: 22930 .L1600: 22931 .LCFI130: 22932 .cfi_restore_state 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22933 .loc 44 665 0 22934 011a 0298 ldr r0, [sp, #8] 22935 011c 0028 cmp r0, #0 22936 011e 42D0 beq .L1642 22937 0120 0198 ldr r0, [sp, #4] 22938 0122 0028 cmp r0, #0 22939 0124 51D0 beq .L1618 22940 0126 0228 cmp r0, #2 22941 0128 5CD0 beq .L1606 22942 012a 0029 cmp r1, #0 22943 012c 3DD0 beq .L1607 22944 012e 0298 ldr r0, [sp, #8] ARM GAS /tmp/ccJrAs6S.s page 877 22945 0130 8000 lsls r0, r0, #2 22946 0132 0390 str r0, [sp, #12] 22947 0134 0BEB0009 add r9, fp, r0 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 22948 .loc 44 457 0 22949 0138 DC46 mov ip, fp 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22950 .loc 44 665 0 22951 013a 9846 mov r8, r3 22952 013c 9A46 mov r10, r3 22953 013e 0F46 mov r7, r1 22954 .LVL3700: 22955 .L1608: 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 22956 .loc 44 676 0 22957 0140 DCF80400 ldr r0, [ip, #4] 22958 0144 5168 ldr r1, [r2, #4] 22959 0146 DCF80060 ldr r6, [ip] 22960 014a 1568 ldr r5, [r2] 22961 014c DCF80840 ldr r4, [ip, #8] 22962 0150 9368 ldr r3, [r2, #8] 22963 0152 80FB0101 smull r0, r1, r0, r1 22964 0156 C5FB0601 smlal r0, r1, r5, r6 22965 .LVL3701: 22966 015a C3FB0401 smlal r0, r1, r3, r4 22967 .LVL3702: 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 22968 .loc 44 683 0 22969 015e C30F lsrs r3, r0, #31 22970 0160 0CF1040C add ip, ip, #4 22971 .LVL3703: 22972 0164 43EA4103 orr r3, r3, r1, lsl #1 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22973 .loc 44 665 0 22974 0168 CC45 cmp ip, r9 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 22975 .loc 44 683 0 22976 016a C8F80030 str r3, [r8] 22977 .LVL3704: 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 22978 .loc 44 685 0 22979 016e F044 add r8, r8, lr 22980 .LVL3705: 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 22981 .loc 44 665 0 22982 0170 E6D1 bne .L1608 22983 0172 0298 ldr r0, [sp, #8] 22984 0174 0EFB00A3 mla r3, lr, r0, r10 22985 0178 0398 ldr r0, [sp, #12] 22986 017a 3946 mov r1, r7 22987 .LVL3706: 22988 .L1612: 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** px = pSrc1; 22989 .loc 44 716 0 22990 017c 5844 add r0, r0, fp 22991 017e 8146 mov r9, r0 22992 .LVL3707: ARM GAS /tmp/ccJrAs6S.s page 878 22993 0180 9C46 mov ip, r3 22994 0182 9046 mov r8, r2 22995 0184 AFE7 b .L1616 22996 .LVL3708: 22997 .L1598: 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 22998 .loc 44 335 0 22999 0186 04F18040 add r0, r4, #1073741824 23000 .LVL3709: 23001 018a 0238 subs r0, r0, #2 23002 018c 2646 mov r6, r4 23003 018e 5D46 mov r5, fp 23004 0190 0844 add r0, r0, r1 23005 0192 0C46 mov r4, r1 23006 .LVL3710: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 23007 .loc 44 323 0 23008 0194 9346 mov fp, r2 23009 .LVL3711: 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 23010 .loc 44 335 0 23011 0196 03EB8003 add r3, r3, r0, lsl #2 23012 .LVL3712: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 23013 .loc 44 326 0 23014 019a 2A46 mov r2, r5 23015 .LVL3713: 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 23016 .loc 44 335 0 23017 019c 3146 mov r1, r6 23018 .LVL3714: 23019 019e 6FF0030E mvn lr, #3 23020 01a2 0194 str r4, [sp, #4] 23021 01a4 3BE7 b .L1599 23022 .LVL3715: 23023 .L1642: 23024 01a6 0390 str r0, [sp, #12] 23025 01a8 98E7 b .L1604 23026 .LVL3716: 23027 .L1607: 23028 01aa 0299 ldr r1, [sp, #8] 23029 .LVL3717: 23030 01ac 0BEB8104 add r4, fp, r1, lsl #2 23031 .LVL3718: 23032 .L1609: 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 23033 .loc 44 676 0 23034 01b0 1068 ldr r0, [r2] 23035 01b2 5BF8041B ldr r1, [fp], #4 23036 .LVL3719: 23037 01b6 80FB0156 smull r5, r6, r0, r1 23038 .LVL3720: 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 23039 .loc 44 683 0 23040 01ba E80F lsrs r0, r5, #31 23041 01bc 40EA4600 orr r0, r0, r6, lsl #1 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { ARM GAS /tmp/ccJrAs6S.s page 879 23042 .loc 44 665 0 23043 01c0 A345 cmp fp, r4 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 23044 .loc 44 683 0 23045 01c2 1860 str r0, [r3] 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 23046 .loc 44 685 0 23047 01c4 7344 add r3, r3, lr 23048 .LVL3721: 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 23049 .loc 44 665 0 23050 01c6 F3D1 bne .L1609 23051 01c8 A4E7 b .L1597 23052 .LVL3722: 23053 .L1618: 23054 01ca 029C ldr r4, [sp, #8] 23055 01cc 0546 mov r5, r0 23056 01ce 1846 mov r0, r3 23057 .LVL3723: 23058 .L1605: 23059 01d0 013C subs r4, r4, #1 23060 .LVL3724: 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 23061 .loc 44 683 0 23062 01d2 0560 str r5, [r0] 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 23063 .loc 44 685 0 23064 01d4 7044 add r0, r0, lr 23065 .LVL3725: 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 23066 .loc 44 665 0 23067 01d6 FBD1 bne .L1605 23068 01d8 0298 ldr r0, [sp, #8] 23069 .LVL3726: 23070 01da 0EFB0033 mla r3, lr, r0, r3 23071 01de 8000 lsls r0, r0, #2 23072 01e0 0390 str r0, [sp, #12] 23073 01e2 CBE7 b .L1612 23074 .LVL3727: 23075 .L1606: 23076 01e4 0298 ldr r0, [sp, #8] 23077 01e6 8000 lsls r0, r0, #2 23078 01e8 0390 str r0, [sp, #12] 23079 01ea 0BEB000C add ip, fp, r0 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 23080 .loc 44 457 0 23081 01ee 5E46 mov r6, fp 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 23082 .loc 44 665 0 23083 01f0 1F46 mov r7, r3 23084 01f2 9846 mov r8, r3 23085 01f4 0D46 mov r5, r1 23086 .LVL3728: 23087 .L1611: 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 23088 .loc 44 676 0 23089 01f6 3168 ldr r1, [r6] ARM GAS /tmp/ccJrAs6S.s page 880 23090 01f8 1068 ldr r0, [r2] 23091 01fa 56F8044F ldr r4, [r6, #4]! 23092 .LVL3729: 23093 01fe 5368 ldr r3, [r2, #4] 23094 0200 80FB0101 smull r0, r1, r0, r1 23095 0204 C4FB0301 smlal r0, r1, r4, r3 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 23096 .loc 44 683 0 23097 0208 C00F lsrs r0, r0, #31 23098 020a 40EA4100 orr r0, r0, r1, lsl #1 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 23099 .loc 44 665 0 23100 020e 6645 cmp r6, ip 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** /* Destination pointer is updated according to the address modifier, inc */ 23101 .loc 44 683 0 23102 0210 3860 str r0, [r7] 23103 .LVL3730: 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** 23104 .loc 44 685 0 23105 0212 7744 add r7, r7, lr 23106 .LVL3731: 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c **** { 23107 .loc 44 665 0 23108 0214 EFD1 bne .L1611 23109 0216 0298 ldr r0, [sp, #8] 23110 0218 2946 mov r1, r5 23111 021a 0EFB0083 mla r3, lr, r0, r8 23112 021e 0398 ldr r0, [sp, #12] 23113 0220 ACE7 b .L1612 23114 .cfi_endproc 23115 .LFE189: 23117 0222 00BF .section .text.arm_correlate_q7,"ax",%progbits 23118 .align 1 23119 .p2align 2,,3 23120 .global arm_correlate_q7 23121 .syntax unified 23122 .thumb 23123 .thumb_func 23124 .fpu fpv4-sp-d16 23126 arm_correlate_q7: 23127 .LFB190: 23128 .file 45 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Title: arm_correlate_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Description: Correlation of Q7 sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * ARM GAS /tmp/ccJrAs6S.s page 881 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** @addtogroup Corr 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** @brief Correlation of Q7 sequences. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** @param[in] pSrcA points to the first input sequence 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** @param[in] srcALen length of the first input sequence 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** @param[in] pSrcB points to the second input sequence 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** @param[in] srcBLen length of the second input sequence 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** @param[out] pDst points to the location where the output result is written. Length 2 * 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** The function is implemented using a 32-bit internal accumulator. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** Both the inputs are represented in 1.7 format and multiplications yield a 2.14 r 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 f 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** This approach provides 17 guard bits and there is no risk of overflow as long as 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits a 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** @remark 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** Refer to \ref arm_correlate_opt_q7() for a faster implementation of this functio 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #if defined(ARM_MATH_MVEI) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #include "arm_helium_utils.h" 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #include "arm_vec_filtering.h" 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** void arm_correlate_q7( 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t * pSrcA, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t srcALen, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t * pSrcB, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t srcBLen, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** q7_t * pDst) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t *pIn1 = pSrcA; /* inputA pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t *pX, *pY; ARM GAS /tmp/ccJrAs6S.s page 882 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t *pA, *pB; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t i = 0U, j = 0; /* loop counters */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t inv = 1U; /* Reverse order flag */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t tot = 0U; /* Length */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t block1, block2, block3; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t incr; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** tot = ((srcALen + srcBLen) - 2U); 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** if (srcALen > srcBLen) 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Calculating the number of zeros to be padded to the output 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** j = srcALen - srcBLen; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Initialize the pointer after zero padding 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += j; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** else if (srcALen < srcBLen) 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Initialization to inputB pointer 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pIn1 = pSrcB; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Initialization to the end of inputA pointer 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pIn2 = pSrcA + (srcALen - 1U); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Initialisation of the pointer after zero padding 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst = pDst + tot; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Swapping the lengths 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** j = srcALen; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** srcALen = srcBLen; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** srcBLen = j; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Setting the reverse flag 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** inv = -1; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** block1 = srcBLen - 1; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** block2 = srcALen - srcBLen + 1; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** block3 = srcBLen - 1; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pA = pIn1; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pB = pIn2; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** incr = inv; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** for (i = 0U; i <= block1 - 2; i += 2) 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t count = i + 1; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t acc0 = 0; ARM GAS /tmp/ccJrAs6S.s page 883 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t acc1 = 0; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * compute 2 accumulators per loop 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * size is incrementing for second accumulator 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Y pointer is decrementing for second accumulator 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pX = pA; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pY = pB; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q7(acc0, acc1, pX, pY, count); 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc0; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc1; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pB -= 2; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** for (; i < block1; i++) 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t count = i + 1; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t acc = 0; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pX = pA; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pY = pB; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** MVE_INTR_CORR_SINGLE_Q7(acc, pX, pY, count); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pB--; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** for (i = 0U; i <= block2 - 4; i += 4) 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t acc0 = 0; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t acc1 = 0; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t acc2 = 0; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t acc3 = 0; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pX = pA; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pY = pB; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * compute 4 accumulators per loop 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * size is fixed for all accumulators 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * X pointer is incrementing for successive accumulators 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q7(acc0, acc1, acc2, acc3, pX, pY, srcBLen); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc0; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc1; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc2; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc3; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pA += 4; ARM GAS /tmp/ccJrAs6S.s page 884 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** for (; i <= block2 - 2; i += 2) 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t acc0 = 0LL; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t acc1 = 0LL; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pX = pA; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pY = pB; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * compute 2 accumulators per loop 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * size is fixed for all accumulators 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * X pointer is incrementing for second accumulator 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q7(acc0, acc1, pX, pY, srcBLen); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc0; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc1; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pA += 2; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** if (block2 & 1) 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t acc = 0LL; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pX = pA; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pY = pB; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** MVE_INTR_CORR_SINGLE_Q7(acc, pX, pY, srcBLen); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pA++; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** for (i = block3 - 1; i >= 0; i -= 2) 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t count = (i + 1); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t acc0 = 0LL; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t acc1 = 0LL; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pX = pA; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pY = pB; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * compute 2 accumulators per loop 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * size is decrementing for second accumulator 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * X pointer is incrementing for second accumulator 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q7(acc0, acc1, pX, pY, count); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc0; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc1; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pA += 2; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 885 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** for (; i >= 0; i--) 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t count = (i + 1); 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int64_t acc = 0LL; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pX = pA; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pY = pB; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** MVE_INTR_CORR_SINGLE_Q7(acc, pX, pY, count); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst = (q7_t) acc; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += incr; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pA++; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #else 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** void arm_correlate_q7( 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t * pSrcA, 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t srcALen, 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t * pSrcB, 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t srcBLen, 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** q7_t * pDst) 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23129 .loc 45 267 0 23130 .cfi_startproc 23131 @ args = 4, pretend = 0, frame = 16 23132 @ frame_needed = 0, uses_anonymous_args = 0 23133 .LVL3732: 23134 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 23135 .LCFI131: 23136 .cfi_def_cfa_offset 36 23137 .cfi_offset 4, -36 23138 .cfi_offset 5, -32 23139 .cfi_offset 6, -28 23140 .cfi_offset 7, -24 23141 .cfi_offset 8, -20 23142 .cfi_offset 9, -16 23143 .cfi_offset 10, -12 23144 .cfi_offset 11, -8 23145 .cfi_offset 14, -4 23146 0004 9A46 mov r10, r3 23147 0006 85B0 sub sp, sp, #20 23148 .LCFI132: 23149 .cfi_def_cfa_offset 56 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #if (1) 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** //#if !defined(ARM_MATH_CM0_FAMILY) 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t *pIn1; /* InputA pointer */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t *pIn2; /* InputB pointer */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** q7_t *pOut = pDst; /* Output pointer */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t *px; /* Intermediate inputA pointer */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t *py; /* Intermediate inputB pointer */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t *pSrc1; /* Intermediate pointers */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** q31_t sum; /* Accumulators */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ ARM GAS /tmp/ccJrAs6S.s page 886 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t j, k, count, blkCnt; /* Loop counters */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t outBlockSize; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** int32_t inc = 1; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** q31_t acc0, acc1, acc2, acc3; /* Accumulators */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** q31_t input1, input2; /* Temporary input variables */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** q15_t in1, in2; /* Temporary input variables */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** q7_t x0, x1, x2, x3, c0, c1; /* Temporary variables for holding input and 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #endif 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* srcB is always made to slide across srcA. */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* But CORR(x, y) is reverse of CORR(y, x) */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* and the destination pointer modifier, inc is set to -1 */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* But to improve the performance, 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * we include zeroes in the output instead of zero padding either of the the inputs*/ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* If srcALen > srcBLen, 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* If srcALen < srcBLen, 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** if (srcALen >= srcBLen) 23150 .loc 45 304 0 23151 0008 5145 cmp r1, r10 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23152 .loc 45 267 0 23153 000a 0190 str r0, [sp, #4] 23154 000c 0E9B ldr r3, [sp, #56] 23155 .LVL3733: 23156 .loc 45 304 0 23157 000e C0F0A480 bcc .L1644 23158 .LVL3734: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialization of inputA pointer */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pIn1 = pSrcA; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialization of inputB pointer */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pIn2 = pSrcB; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Number of output samples is calculated */ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** outBlockSize = (2U * srcALen) - 1U; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* When srcALen > srcBLen, zero padding is done to srcB 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * to make their lengths equal. 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Instead, (outBlockSize - (srcALen + srcBLen - 1)) 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * number of output samples are made zero */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** j = outBlockSize - (srcALen + (srcBLen - 1U)); 23159 .loc 45 319 0 23160 0012 A1EB0A0E sub lr, r1, r10 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Updating the pointer position to non zero value */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pOut += j; 23161 .loc 45 322 0 23162 0016 9E44 add lr, lr, r3 ARM GAS /tmp/ccJrAs6S.s page 887 23163 .LVL3735: 23164 0018 4FF00109 mov r9, #1 23165 .LVL3736: 23166 .L1645: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** else 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialization of inputA pointer */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pIn1 = pSrcB; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialization of inputB pointer */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pIn2 = pSrcA; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* srcBLen is always considered as shorter or equal to srcALen */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** j = srcBLen; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** srcBLen = srcALen; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** srcALen = j; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* CORR(x, y) = Reverse order(CORR(y, x)) */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Hence set the destination pointer to point to the last output sample */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pOut = pDst + ((srcALen + srcBLen) - 2U); 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination address modifier is set to -1 */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** inc = -1; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* The function is internally 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * divided into three stages according to the number of multiplications that has to be 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * taken place between inputA samples and inputB samples. In the first stage of the 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * algorithm, the multiplications increase by one for every iteration. 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * In the second stage of the algorithm, srcBLen number of multiplications are done. 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * In the third stage of the algorithm, the multiplications decrease by one 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * for every iteration. */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* The algorithm is implemented in three stages. 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** The loop counters of each stage is initiated here. */ 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blockSize1 = srcBLen - 1U; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blockSize2 = srcALen - (srcBLen - 1U); 23167 .loc 45 356 0 23168 001c 0131 adds r1, r1, #1 23169 .LVL3737: 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blockSize2 = srcALen - (srcBLen - 1U); 23170 .loc 45 355 0 23171 001e 0AF1FF3C add ip, r10, #-1 23172 .LVL3738: 23173 .loc 45 356 0 23174 0022 A1EB0A03 sub r3, r1, r10 23175 0026 0293 str r3, [sp, #8] 23176 .LVL3739: 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blockSize3 = blockSize1; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* -------------------------- 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Initializations of stage1 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * -------------------------*/ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* sum = x[0] * y[srcBlen - 1] 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] ARM GAS /tmp/ccJrAs6S.s page 888 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * .... 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* In this stage the MAC operations are increased by 1 for every iteration. 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** The count variable holds the number of MAC operations performed */ 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** count = 1U; 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Working pointer of inputA */ 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** px = pIn1; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Working pointer of inputB */ 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pSrc1 = pIn2 + (srcBLen - 1U); 23177 .loc 45 377 0 23178 0028 02EB0C08 add r8, r2, ip 23179 .LVL3740: 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** py = pSrc1; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* ------------------------ 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Stage1 process 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * ----------------------*/ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* The first stage starts here */ 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (blockSize1 > 0U) 23180 .loc 45 385 0 23181 002c BCF1000F cmp ip, #0 23182 0030 67D0 beq .L1647 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23183 .loc 45 371 0 23184 0032 0123 movs r3, #1 23185 .LVL3741: 23186 0034 0392 str r2, [sp, #12] 23187 .loc 45 385 0 23188 0036 F346 mov fp, lr 23189 .LVL3742: 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23190 .loc 45 371 0 23191 0038 019A ldr r2, [sp, #4] 23192 .LVL3743: 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Accumulator is made zero for every iteration */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum = 0; 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k = count >> 2U; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (k > 0U) 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[0] , x[1] */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) *px++; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) *px++; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* y[srcBLen - 4] , y[srcBLen - 3] */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) *py++; ARM GAS /tmp/ccJrAs6S.s page 889 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) *py++; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[0] * y[srcBLen - 4] */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[1] * y[srcBLen - 3] */ 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum = __SMLAD(input1, input2, sum); 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[2] , x[3] */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) *px++; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) *px++; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* y[srcBLen - 2] , y[srcBLen - 1] */ 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) *py++; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) *py++; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[2] * y[srcBLen - 2] */ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[3] * y[srcBLen - 1] */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum = __SMLAD(input1, input2, sum); 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement loop counter */ 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k--; 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Loop unrolling: Compute remaining outputs */ 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k = count % 0x4U; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #else 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialize k with number of samples */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k = count; 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (k > 0U) 23193 .loc 45 439 0 23194 003a D3B1 cbz r3, .L1690 23195 .LVL3744: 23196 .L1650: 23197 003c 08EB0307 add r7, r8, r3 23198 0040 4146 mov r1, r8 23199 0042 1446 mov r4, r2 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23200 .loc 45 388 0 23201 0044 0020 movs r0, #0 23202 .LVL3745: 23203 .L1648: 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Perform the multiply-accumulate */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[0] * y[srcBLen - 1] */ 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum += (q31_t) ((q15_t) *px++ * *py++); 23204 .loc 45 443 0 23205 0046 11F9015B ldrsb r5, [r1], #1 23206 .LVL3746: 23207 004a 14F9016B ldrsb r6, [r4], #1 23208 .LVL3747: ARM GAS /tmp/ccJrAs6S.s page 890 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23209 .loc 45 439 0 23210 004e B942 cmp r1, r7 23211 .loc 45 443 0 23212 0050 16FB0500 smlabb r0, r6, r5, r0 23213 .LVL3748: 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23214 .loc 45 439 0 23215 0054 F7D1 bne .L1648 23216 0056 C011 asrs r0, r0, #7 23217 .LVL3749: 23218 .L1651: 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement loop counter */ 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k--; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pOut = (q7_t) (__SSAT(sum >> 7U, 8)); 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination pointer is updated according to the address modifier, inc */ 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pOut += inc; 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** py = pSrc1 - count; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** px = pIn1; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Increment MAC count */ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** count++; 23219 .loc 45 459 0 23220 0058 591C adds r1, r3, #1 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23221 .loc 45 385 0 23222 005a 8A45 cmp r10, r1 23223 .LBB2253: 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination pointer is updated according to the address modifier, inc */ 23224 .loc 45 450 0 23225 .syntax unified 23226 @ 450 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c" 1 23227 005c 00F30700 ssat r0, #8, r0 23228 @ 0 "" 2 23229 .LVL3750: 23230 .thumb 23231 .syntax unified 23232 0060 08F1FF38 add r8, r8, #-1 23233 .LBE2253: 23234 0064 8BF80000 strb r0, [fp] 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23235 .loc 45 452 0 23236 0068 CB44 add fp, fp, r9 23237 .LVL3751: 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23238 .loc 45 385 0 23239 006a 04D0 beq .L1649 23240 006c 0B46 mov r3, r1 23241 .LVL3752: 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23242 .loc 45 439 0 ARM GAS /tmp/ccJrAs6S.s page 891 23243 006e 002B cmp r3, #0 23244 0070 E4D1 bne .L1650 23245 .LVL3753: 23246 .L1690: 23247 0072 1846 mov r0, r3 23248 0074 F0E7 b .L1651 23249 .LVL3754: 23250 .L1649: 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement loop counter */ 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blockSize1--; 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* -------------------------- 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Initializations of stage2 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * ------------------------*/ 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * .... 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Working pointer of inputA */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** px = pIn1; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Working pointer of inputB */ 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** py = pIn2; 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* count is index by which the pointer pIn1 to be incremented */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** count = 0U; 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* ------------------- 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Stage2 process 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * ------------------*/ 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * So, to loop unroll over blockSize2, 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * srcBLen should be greater than or equal to 4 */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** if (srcBLen >= 4U) 23251 .loc 45 491 0 23252 0076 BAF1030F cmp r10, #3 23253 007a 039A ldr r2, [sp, #12] 23254 007c 09FB03EE mla lr, r9, r3, lr 23255 .LVL3755: 23256 0080 3FD9 bls .L1647 23257 .LVL3756: 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blkCnt = blockSize2 >> 2U; 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (blkCnt > 0U) 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Set all accumulators to zero */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc0 = 0; ARM GAS /tmp/ccJrAs6S.s page 892 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc1 = 0; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc2 = 0; 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc3 = 0; 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* read x[0], x[1], x[2] samples */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** x0 = *px++; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** x1 = *px++; 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** x2 = *px++; 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k = srcBLen >> 2U; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* First part of the processing with loop unrolling. Compute 4 MACs at a time. 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** ** a second loop below computes MACs for the remaining 1 to 3 samples. */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** do 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Read y[0] sample */ 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** c0 = *py++; 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Read y[1] sample */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** c1 = *py++; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Read x[3] sample */ 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** x3 = *px++; 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[0] and x[1] are packed */ 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) x0; 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) x1; 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* y[0] and y[1] are packed */ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) c0; 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) c1; 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* acc0 += x[0] * y[0] + x[1] * y[1] */ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc0 = __SMLAD(input1, input2, acc0); 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[1] and x[2] are packed */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) x1; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) x2; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* acc1 += x[1] * y[0] + x[2] * y[1] */ 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc1 = __SMLAD(input1, input2, acc1); 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[2] and x[3] are packed */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) x2; 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) x3; 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* acc2 += x[2] * y[0] + x[3] * y[1] */ 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc2 = __SMLAD(input1, input2, acc2); 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 893 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Read x[4] sample */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** x0 = *px++; 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[3] and x[4] are packed */ 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) x3; 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) x0; 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* acc3 += x[3] * y[0] + x[4] * y[1] */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc3 = __SMLAD(input1, input2, acc3); 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Read y[2] sample */ 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** c0 = *py++; 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Read y[3] sample */ 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** c1 = *py++; 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Read x[5] sample */ 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** x1 = *px++; 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[2] and x[3] are packed */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) x2; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) x3; 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* y[2] and y[3] are packed */ 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) c0; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) c1; 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* acc0 += x[2] * y[2] + x[3] * y[3] */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc0 = __SMLAD(input1, input2, acc0); 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[3] and x[4] are packed */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) x3; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) x0; 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* acc1 += x[3] * y[2] + x[4] * y[3] */ 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc1 = __SMLAD(input1, input2, acc1); 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[4] and x[5] are packed */ 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) x0; 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) x1; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* acc2 += x[4] * y[2] + x[5] * y[3] */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc2 = __SMLAD(input1, input2, acc2); 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Read x[6] sample */ 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** x2 = *px++; 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[5] and x[6] are packed */ ARM GAS /tmp/ccJrAs6S.s page 894 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) x1; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) x2; 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* acc3 += x[5] * y[2] + x[6] * y[3] */ 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc3 = __SMLAD(input1, input2, acc3); 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } while (--k); 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** ** No loop unrolling is used. */ 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k = srcBLen % 0x4U; 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (k > 0U) 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Read y[4] sample */ 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** c0 = *py++; 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Read x[7] sample */ 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** x3 = *px++; 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Perform the multiply-accumulates */ 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* acc0 += x[4] * y[4] */ 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc0 += ((q15_t) x0 * c0); 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* acc1 += x[5] * y[4] */ 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc1 += ((q15_t) x1 * c0); 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* acc2 += x[6] * y[4] */ 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc2 += ((q15_t) x2 * c0); 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* acc3 += x[7] * y[4] */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** acc3 += ((q15_t) x3 * c0); 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Reuse the present samples for the next MAC */ 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** x0 = x1; 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** x1 = x2; 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** x2 = x3; 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement loop counter */ 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k--; 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pOut = (q7_t) (__SSAT(acc0 >> 7, 8)); 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination pointer is updated according to the address modifier, inc */ 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pOut += inc; 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pOut = (q7_t) (__SSAT(acc1 >> 7, 8)); 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pOut += inc; 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pOut = (q7_t) (__SSAT(acc2 >> 7, 8)); 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pOut += inc; 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pOut = (q7_t) (__SSAT(acc3 >> 7, 8)); 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pOut += inc; 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** count += 4U; 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** px = pIn1 + count; ARM GAS /tmp/ccJrAs6S.s page 895 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** py = pIn2; 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement loop counter */ 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blkCnt--; 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Loop unrolling: Compute remaining outputs */ 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blkCnt = blockSize2 % 0x4U; 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #else 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialize blkCnt with number of samples */ 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blkCnt = blockSize2; 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (blkCnt > 0U) 23258 .loc 45 689 0 23259 0082 029B ldr r3, [sp, #8] 23260 0084 002B cmp r3, #0 23261 0086 75D0 beq .L1688 23262 0088 0198 ldr r0, [sp, #4] 23263 .LVL3757: 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23264 .loc 45 452 0 23265 008a F046 mov r8, lr 23266 008c C618 adds r6, r0, r3 23267 .LVL3758: 23268 .L1663: 23269 008e 8346 mov fp, r0 23270 0090 0AEB0007 add r7, r10, r0 23271 0094 1146 mov r1, r2 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Accumulator is made zero for every iteration */ 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum = 0; 23272 .loc 45 692 0 23273 0096 0023 movs r3, #0 23274 .LVL3759: 23275 .L1662: 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k = srcBLen >> 2U; 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (k > 0U) 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Reading two inputs of SrcA buffer and packing */ 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) *px++; 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) *px++; 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Reading two inputs of SrcB buffer and packing */ 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) *py++; 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) *py++; 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); ARM GAS /tmp/ccJrAs6S.s page 896 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Perform the multiply-accumulate */ 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum = __SMLAD(input1, input2, sum); 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Reading two inputs of SrcA buffer and packing */ 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) *px++; 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) *px++; 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Reading two inputs of SrcB buffer and packing */ 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) *py++; 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) *py++; 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Perform the multiply-accumulate */ 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum = __SMLAD(input1, input2, sum); 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement loop counter */ 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k--; 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Loop unrolling: Compute remaining outputs */ 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k = srcBLen % 0x4U; 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #else 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialize blkCnt with number of samples */ 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k = srcBLen; 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (k > 0U) 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Perform the multiply-accumulate */ 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum += ((q15_t) *px++ * *py++); 23276 .loc 45 745 0 23277 0098 10F9015B ldrsb r5, [r0], #1 23278 .LVL3760: 23279 009c 11F9014B ldrsb r4, [r1], #1 23280 .LVL3761: 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23281 .loc 45 742 0 23282 00a0 B842 cmp r0, r7 23283 .loc 45 745 0 23284 00a2 15FB0433 smlabb r3, r5, r4, r3 23285 .LVL3762: 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23286 .loc 45 742 0 23287 00a6 F7D1 bne .L1662 23288 .LVL3763: 23289 00a8 0BF10100 add r0, fp, #1 23290 .LVL3764: 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23291 .loc 45 689 0 23292 00ac B042 cmp r0, r6 23293 .LBB2254: 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 897 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement the loop counter */ 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k--; 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pOut = (q7_t) (__SSAT(sum >> 7U, 8)); 23294 .loc 45 752 0 23295 00ae 4FEAE313 asr r3, r3, #7 23296 .LVL3765: 23297 .syntax unified 23298 @ 752 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c" 1 23299 00b2 03F30703 ssat r3, #8, r3 23300 @ 0 "" 2 23301 .LVL3766: 23302 .thumb 23303 .syntax unified 23304 .LBE2254: 23305 00b6 88F80030 strb r3, [r8] 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination pointer is updated according to the address modifier, inc */ 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pOut += inc; 23306 .loc 45 754 0 23307 00ba C844 add r8, r8, r9 23308 .LVL3767: 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23309 .loc 45 689 0 23310 00bc E7D1 bne .L1663 23311 00be 029B ldr r3, [sp, #8] 23312 .LVL3768: 23313 00c0 09FB03EE mla lr, r9, r3, lr 23314 .LVL3769: 23315 .L1653: 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Increment the pointer pIn1 index, count by 1 */ 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** count++; 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** px = pIn1 + count; 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** py = pIn2; 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement the loop counter */ 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blkCnt--; 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** else 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* If the srcBLen is not a multiple of 4, 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * the blockSize2 loop cannot be unrolled by 4 */ 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blkCnt = blockSize2; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (blkCnt > 0U) 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Accumulator is made zero for every iteration */ 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum = 0; 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* srcBLen number of MACS should be performed */ 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k = srcBLen; 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 898 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (k > 0U) 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Perform the multiply-accumulate */ 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum += ((q15_t) *px++ * *py++); 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement the loop counter */ 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k--; 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pOut = (q7_t) (__SSAT(sum >> 7U, 8)); 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination pointer is updated according to the address modifier, inc */ 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pOut += inc; 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Increment the MAC count */ 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** count++; 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** px = pIn1 + count; 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** py = pIn2; 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement loop counter */ 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blkCnt--; 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* -------------------------- 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Initializations of stage3 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * -------------------------*/ 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLe 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLe 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * .... 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * sum += x[srcALen-1] * y[0] 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** */ 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* In this stage the MAC operations are decreased by 1 for every iteration. 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** The count variable holds the number of MAC operations performed */ 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** count = srcBLen - 1U; 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Working pointer of inputA */ 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pSrc1 = pIn1 + (srcALen - (srcBLen - 1U)); 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** px = pSrc1; 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Working pointer of inputB */ 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** py = pIn2; 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* ------------------- 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * Stage3 process 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * ------------------*/ 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (blockSize3 > 0U) 23316 .loc 45 834 0 23317 00c4 BCF1000F cmp ip, #0 23318 00c8 18D0 beq .L1643 ARM GAS /tmp/ccJrAs6S.s page 899 23319 .LVL3770: 23320 .L1665: 23321 00ca 06EB0C07 add r7, r6, ip 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23322 .loc 45 773 0 23323 00ce 1046 mov r0, r2 23324 00d0 3346 mov r3, r6 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Accumulator is made zero for every iteration */ 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum = 0; 23325 .loc 45 837 0 23326 00d2 0021 movs r1, #0 23327 .LVL3771: 23328 .L1664: 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k = count >> 2U; 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (k > 0U) 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2] */ 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) *px++; 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) *px++; 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* y[0] , y[1] */ 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) *py++; 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) *py++; 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* sum += x[srcALen - srcBLen + 1] * y[0] */ 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* sum += x[srcALen - srcBLen + 2] * y[1] */ 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum = __SMLAD(input1, input2, sum); 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */ 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) *px++; 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) *px++; 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* y[2] , y[3] */ 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in1 = (q15_t) *py++; 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** in2 = (q15_t) *py++; 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* sum += x[srcALen - srcBLen + 3] * y[2] */ 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* sum += x[srcALen - srcBLen + 4] * y[3] */ 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum = __SMLAD(input1, input2, sum); 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement loop counter */ 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k--; 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Loop unrolling: Compute remaining outputs */ 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k = count % 0x4U; 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 900 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #else 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialize blkCnt with number of samples */ 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k = count; 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** while (k > 0U) 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Perform the multiply-accumulate */ 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum += ((q15_t) *px++ * *py++); 23329 .loc 45 891 0 23330 00d4 13F9015B ldrsb r5, [r3], #1 23331 .LVL3772: 23332 00d8 10F9014B ldrsb r4, [r0], #1 23333 .LVL3773: 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23334 .loc 45 888 0 23335 00dc 9F42 cmp r7, r3 23336 .loc 45 891 0 23337 00de 15FB0411 smlabb r1, r5, r4, r1 23338 .LVL3774: 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23339 .loc 45 888 0 23340 00e2 F7D1 bne .L1664 23341 .LVL3775: 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23342 .loc 45 834 0 23343 00e4 BCF1010C subs ip, ip, #1 23344 .LVL3776: 23345 .LBB2255: 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement loop counter */ 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** k--; 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Store the result in the accumulator in the destination buffer. */ 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pOut = (q7_t) (__SSAT(sum >> 7U, 8)); 23346 .loc 45 898 0 23347 00e8 4FEAE111 asr r1, r1, #7 23348 .LVL3777: 23349 .LBE2255: 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination pointer is updated according to the address modifier, inc */ 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pOut += inc; 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Update the inputA and inputB pointers for next MAC calculation */ 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** px = ++pSrc1; 23350 .loc 45 903 0 23351 00ec 06F10106 add r6, r6, #1 23352 .LVL3778: 23353 .LBB2256: 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination pointer is updated according to the address modifier, inc */ 23354 .loc 45 898 0 23355 .syntax unified 23356 @ 898 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c" 1 23357 00f0 01F30701 ssat r1, #8, r1 23358 @ 0 "" 2 ARM GAS /tmp/ccJrAs6S.s page 901 23359 .LVL3779: 23360 .thumb 23361 .syntax unified 23362 .LBE2256: 23363 00f4 8EF80010 strb r1, [lr] 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23364 .loc 45 900 0 23365 00f8 CE44 add lr, lr, r9 23366 .LVL3780: 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23367 .loc 45 834 0 23368 00fa E6D1 bne .L1665 23369 .LVL3781: 23370 .L1643: 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** py = pIn2; 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement MAC count */ 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** count--; 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Decrement loop counter */ 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** blockSize3--; 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #else 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* alternate version for CM0_FAMILY */ 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t *pIn1 = pSrcA; /* InputA pointer */ 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** const q7_t *pIn2 = pSrcB + (srcBLen - 1U); /* InputB pointer */ 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** q31_t sum; /* Accumulator */ 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t i = 0U, j; /* Loop counters */ 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t inv = 0U; /* Reverse order flag */ 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** uint32_t tot = 0U; /* Length */ 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* The algorithm implementation is based on the lengths of the inputs. */ 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* srcB is always made to slide across srcA. */ 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* So srcBLen is always considered as shorter or equal to srcALen */ 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* But CORR(x, y) is reverse of CORR(y, x) */ 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* and a varaible, inv is set to 1 */ 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* If lengths are not equal then zero pad has to be done to make the two 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * inputs of same length. But to improve the performance, we include zeroes 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * in the output instead of zero padding either of the the inputs*/ 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * starting of the output buffer */ 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * ending of the output buffer */ 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Once the zero padding is done the remaining of the output is calcualted 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** * using convolution but with the shorter signal time shifted. */ 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Calculate the length of the remaining sequence */ 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** tot = ((srcALen + srcBLen) - 2U); 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** if (srcALen > srcBLen) 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Calculating the number of zeros to be padded to the output */ 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** j = srcALen - srcBLen; 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 902 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialise the pointer after zero padding */ 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst += j; 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** else if (srcALen < srcBLen) 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialization to inputB pointer */ 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pIn1 = pSrcB; 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialization to the end of inputA pointer */ 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pIn2 = pSrcA + (srcALen - 1U); 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialisation of the pointer after zero padding */ 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** pDst = pDst + tot; 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Swapping the lengths */ 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** j = srcALen; 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** srcALen = srcBLen; 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** srcBLen = j; 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Setting the reverse flag */ 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** inv = 1; 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Loop to calculate convolution for output length number of times */ 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** for (i = 0U; i <= tot; i++) 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Initialize sum with zero to carry out MAC operations */ 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum = 0; 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Loop to perform MAC operations according to convolution equation */ 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** for (j = 0U; j <= i; j++) 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Check the array limitations */ 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** if (((i - j) < srcBLen) && (j < srcALen)) 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* z[i] += x[i-j] * y[j] */ 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - j)]); 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Store the output in the destination buffer */ 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** if (inv == 1) 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst-- = (q7_t) __SSAT((sum >> 7U), 8U); 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** else 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** *pDst++ = (q7_t) __SSAT((sum >> 7U), 8U); 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** } 23371 .loc 45 997 0 23372 00fc 05B0 add sp, sp, #20 23373 .LCFI133: 23374 .cfi_remember_state 23375 .cfi_def_cfa_offset 36 23376 @ sp needed ARM GAS /tmp/ccJrAs6S.s page 903 23377 00fe BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 23378 .LVL3782: 23379 .L1647: 23380 .LCFI134: 23381 .cfi_restore_state 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23382 .loc 45 773 0 23383 0102 029B ldr r3, [sp, #8] 23384 0104 B3B3 cbz r3, .L1688 23385 0106 BAF1000F cmp r10, #0 23386 010a 4AD0 beq .L1668 23387 010c BAF1020F cmp r10, #2 23388 0110 57D0 beq .L1655 23389 0112 BCF1000F cmp ip, #0 23390 0116 2FD0 beq .L1656 23391 0118 019D ldr r5, [sp, #4] 23392 011a 7746 mov r7, lr 23393 011c EE18 adds r6, r5, r3 23394 .LVL3783: 23395 .L1657: 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23396 .loc 45 784 0 23397 011e 95F90010 ldrsb r1, [r5] 23398 .LVL3784: 23399 0122 92F90130 ldrsb r3, [r2, #1] 23400 0126 15F9010F ldrsb r0, [r5, #1]! 23401 .LVL3785: 23402 012a 92F90080 ldrsb r8, [r2] 23403 012e 92F90240 ldrsb r4, [r2, #2] 23404 0132 10FB03F0 smulbb r0, r0, r3 23405 0136 95F90130 ldrsb r3, [r5, #1] 23406 013a 11FB0801 smlabb r1, r1, r8, r0 23407 .LVL3786: 23408 013e 13FB0413 smlabb r3, r3, r4, r1 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23409 .loc 45 773 0 23410 0142 AE42 cmp r6, r5 23411 .LBB2257: 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination pointer is updated according to the address modifier, inc */ 23412 .loc 45 791 0 23413 0144 4FEAE313 asr r3, r3, #7 23414 .syntax unified 23415 @ 791 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c" 1 23416 0148 03F30703 ssat r3, #8, r3 23417 @ 0 "" 2 23418 .LVL3787: 23419 .thumb 23420 .syntax unified 23421 .LBE2257: 23422 014c 3B70 strb r3, [r7] 23423 .LVL3788: 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23424 .loc 45 793 0 23425 014e 4F44 add r7, r7, r9 23426 .LVL3789: 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23427 .loc 45 773 0 ARM GAS /tmp/ccJrAs6S.s page 904 23428 0150 E5D1 bne .L1657 23429 .LVL3790: 23430 .L1689: 23431 0152 029B ldr r3, [sp, #8] 23432 .LVL3791: 23433 0154 09FB03EE mla lr, r9, r3, lr 23434 0158 B7E7 b .L1665 23435 .LVL3792: 23436 .L1644: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23437 .loc 45 339 0 23438 015a AAF1020E sub lr, r10, #2 23439 015e 0446 mov r4, r0 23440 .LVL3793: 23441 0160 8E44 add lr, lr, r1 23442 0162 0846 mov r0, r1 23443 .LVL3794: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23444 .loc 45 327 0 23445 0164 0192 str r2, [sp, #4] 23446 .LVL3795: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23447 .loc 45 339 0 23448 0166 5146 mov r1, r10 23449 .LVL3796: 23450 0168 9E44 add lr, lr, r3 23451 .LVL3797: 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23452 .loc 45 330 0 23453 016a 2246 mov r2, r4 23454 .LVL3798: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23455 .loc 45 339 0 23456 016c 4FF0FF39 mov r9, #-1 23457 0170 8246 mov r10, r0 23458 0172 53E7 b .L1645 23459 .LVL3799: 23460 .L1688: 23461 0174 019E ldr r6, [sp, #4] 23462 0176 A5E7 b .L1653 23463 .L1656: 23464 0178 019B ldr r3, [sp, #4] 23465 017a 581E subs r0, r3, #1 23466 017c 029B ldr r3, [sp, #8] 23467 017e 0344 add r3, r3, r0 23468 0180 1C46 mov r4, r3 23469 .LVL3800: 23470 .L1658: 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23471 .loc 45 784 0 23472 0182 10F9011F ldrsb r1, [r0, #1]! 23473 .LVL3801: 23474 0186 92F90030 ldrsb r3, [r2] 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23475 .loc 45 773 0 23476 018a A042 cmp r0, r4 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 905 23477 .loc 45 784 0 23478 018c 13FB01F3 smulbb r3, r3, r1 23479 .LBB2258: 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination pointer is updated according to the address modifier, inc */ 23480 .loc 45 791 0 23481 0190 4FEAE313 asr r3, r3, #7 23482 .syntax unified 23483 @ 791 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c" 1 23484 0194 03F30703 ssat r3, #8, r3 23485 @ 0 "" 2 23486 .LVL3802: 23487 .thumb 23488 .syntax unified 23489 .LBE2258: 23490 0198 8EF80030 strb r3, [lr] 23491 .LVL3803: 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23492 .loc 45 793 0 23493 019c CE44 add lr, lr, r9 23494 .LVL3804: 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23495 .loc 45 773 0 23496 019e F0D1 bne .L1658 23497 01a0 ACE7 b .L1643 23498 .LVL3805: 23499 .L1668: 23500 01a2 1946 mov r1, r3 23501 01a4 7346 mov r3, lr 23502 .LBB2259: 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination pointer is updated according to the address modifier, inc */ 23503 .loc 45 791 0 23504 .syntax unified 23505 @ 791 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c" 1 23506 01a6 0AF3070A ssat r10, #8, r10 23507 @ 0 "" 2 23508 .LVL3806: 23509 .thumb 23510 .syntax unified 23511 .L1654: 23512 .LBE2259: 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23513 .loc 45 773 0 23514 01aa 0139 subs r1, r1, #1 23515 .LVL3807: 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination pointer is updated according to the address modifier, inc */ 23516 .loc 45 791 0 23517 01ac 83F800A0 strb r10, [r3] 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23518 .loc 45 793 0 23519 01b0 4B44 add r3, r3, r9 23520 .LVL3808: 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23521 .loc 45 773 0 23522 01b2 FAD1 bne .L1654 23523 01b4 029B ldr r3, [sp, #8] 23524 .LVL3809: 23525 01b6 0199 ldr r1, [sp, #4] ARM GAS /tmp/ccJrAs6S.s page 906 23526 01b8 1944 add r1, r1, r3 23527 01ba 09FB03EE mla lr, r9, r3, lr 23528 01be 0E46 mov r6, r1 23529 01c0 83E7 b .L1665 23530 .LVL3810: 23531 .L1655: 23532 01c2 019C ldr r4, [sp, #4] 23533 01c4 7546 mov r5, lr 23534 01c6 E618 adds r6, r4, r3 23535 .LVL3811: 23536 .L1660: 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23537 .loc 45 784 0 23538 01c8 94F90070 ldrsb r7, [r4] 23539 .LVL3812: 23540 01cc 92F90010 ldrsb r1, [r2] 23541 01d0 14F9010F ldrsb r0, [r4, #1]! 23542 .LVL3813: 23543 01d4 92F90130 ldrsb r3, [r2, #1] 23544 01d8 11FB07F1 smulbb r1, r1, r7 23545 01dc 13FB0013 smlabb r3, r3, r0, r1 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23546 .loc 45 773 0 23547 01e0 B442 cmp r4, r6 23548 .LBB2260: 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** /* Destination pointer is updated according to the address modifier, inc */ 23549 .loc 45 791 0 23550 01e2 4FEAE313 asr r3, r3, #7 23551 .syntax unified 23552 @ 791 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c" 1 23553 01e6 03F30703 ssat r3, #8, r3 23554 @ 0 "" 2 23555 .LVL3814: 23556 .thumb 23557 .syntax unified 23558 .LBE2260: 23559 01ea 2B70 strb r3, [r5] 23560 .LVL3815: 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** 23561 .loc 45 793 0 23562 01ec 4D44 add r5, r5, r9 23563 .LVL3816: 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c **** { 23564 .loc 45 773 0 23565 01ee EBD1 bne .L1660 23566 01f0 AFE7 b .L1689 23567 .cfi_endproc 23568 .LFE190: 23570 01f2 00BF .section .text.arm_fir_decimate_f32,"ax",%progbits 23571 .align 1 23572 .p2align 2,,3 23573 .global arm_fir_decimate_f32 23574 .syntax unified 23575 .thumb 23576 .thumb_func 23577 .fpu fpv4-sp-d16 23579 arm_fir_decimate_f32: ARM GAS /tmp/ccJrAs6S.s page 907 23580 .LFB191: 23581 .file 46 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Title: arm_fir_decimate_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Description: FIR decimation for floating-point sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** These functions combine an FIR filter together with a decimator. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** They are used in multirate systems for reducing the sample rate of a signal without introducing a 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** Conceptually, the functions are equivalent to the block diagram below: 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** \image html FIRDecimator.gif "Components included in the FIR Decimator functions" 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** When decimating by a factor of M, the signal should be prefiltered by a lowpass filt 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** cutoff frequency of 1/M in order to prevent aliasing distortion. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** The user of the function is responsible for providing the filter coefficients. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the deci 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** Instead of calculating all of the FIR filter outputs and discarding M-1 out of every 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** samples output by the decimator are computed. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** The functions operate on blocks of input and output data. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pSrc points to an array of blockSize input values and 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pDst points to an array of blockSize/M output values. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** In order to have an integer number of output samples blockSize 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** must always be a multiple of the decimation factor M. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** The library provides separate functions for Q15, Q31 and floating-point data types. ARM GAS /tmp/ccJrAs6S.s page 908 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @par Algorithm: 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** The FIR portion of the algorithm uses the standard form filter: 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 
  60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c ****       y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c ****
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** where, b[n] are the filter coefficients. 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @par 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** The pCoeffs points to a coefficient array of size numTaps 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]} 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @par 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pState points to a state array of size numTaps + blockSize - 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** Samples in the state buffer are stored in the order: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @par 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c ****       {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c ****
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** The state variables are updated after each block of data is processed, the coeff 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @par Instance Structure 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** The coefficients and state variables for a filter are stored together in an inst 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** A separate instance structure must be defined for each filter. 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** Coefficient arrays may be shared among several instances while state variable ar 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** There are separate instance structure declarations for each of the 3 supported d 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @par Initialization Functions 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** There is also an associated initialization function for each data type. 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** The initialization function performs the following operations: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** - Sets the values of the internal structure fields. 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** - Zeros out the values in the state buffer. 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** - Checks to make sure that the size of the input is a multiple of the decimation 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** To do this manually without calling the init function, assign the follow subfiel 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in p 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @par 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** Use of the initialization function is optional. 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** However, if the initialization function is used, then the instance structure can 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** To place an instance structure into a const data section, the instance structure 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** The code below statically initializes each of the 3 different data type filter i 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 
  99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c ****       arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};
 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c ****       arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};
 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c ****       arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};
 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c ****
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** where M is the decimation factor; numTaps is the numbe 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pCoeffs is the address of the coefficient buffer; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pState is the address of the state buffer. 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** Be sure to set the values in the state buffer to zeros when doing static initial 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @par Fixed-Point Behavior 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** Care must be taken when using the fixed-point versions of the FIR decimate filte 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** In particular, the overflow and saturation behavior of the accumulator used in e 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** Refer to the function specific documentation below for usage guidelines. 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ ARM GAS /tmp/ccJrAs6S.s page 909 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @addtogroup FIR_decimate 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @{ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @brief Processing function for floating-point FIR decimator. 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @param[in] S points to an instance of the floating-point FIR decimator structure 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @param[in] pSrc points to the block of input data 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @param[out] pDst points to the block of output data 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @param[in] blockSize number of samples to process 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** @return none 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #include "arm_helium_utils.h" 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** void arm_fir_decimate_f32( 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const arm_fir_decimate_instance_f32 * S, 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const float32_t * pSrc, 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t * pDst, 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** uint32_t blockSize) 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t *pState = S->pState; /* State pointer */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** uint32_t blkCntN4; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const float32_t *px0, *px1, *px2, *px3; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** f32x4_t accv, acc0v, acc1v, acc2v, acc3v; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** f32x4_t x0v, x1v, x2v, x3v; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** f32x4_t c0v; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * S->pState buffer contains previous frame (numTaps - 1) samples 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * pStateCurnt points to the location where the new input data should be written 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pStateCurnt = S->pState + (numTaps - 1U); 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Total number of output samples to be computed 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCnt = outBlockSize / 4; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCntN4 = outBlockSize - (4 * blkCnt); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (blkCnt > 0U) 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Copy 4 * decimation factor number of new input samples into the state buffer 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** i = (4 * S->M) >> 2; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** do 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** vst1q(pStateCurnt, vld1q((const float32_t *)pSrc)); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pSrc += 4; ARM GAS /tmp/ccJrAs6S.s page 910 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pStateCurnt += 4; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** i--; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (i > 0U); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Set accumulators to zero 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0v = vdupq_n_f32(0.0f); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc1v = vdupq_n_f32(0.0f); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc2v = vdupq_n_f32(0.0f); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc3v = vdupq_n_f32(0.0f); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Initialize state pointer for all the samples 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px0 = pState; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px1 = pState + S->M; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px2 = pState + 2 * S->M; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px3 = pState + 3 * S->M; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Initialize coeff pointer 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pb = pCoeffs; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Loop unrolling. Process 4 taps at a time. 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps >> 2; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Loop over the number of taps. Unroll by a factor of 4. 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Repeat until we've computed numTaps-4 coefficients. 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (tapCnt > 0U) 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Read the b[numTaps-1] coefficient 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0v = vld1q((const float32_t *)pb); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pb += 4; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Read x[n-numTaps-1] sample for acc0 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0v = vld1q(px0); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x1v = vld1q(px1); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x2v = vld1q(px2); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x3v = vld1q(px3); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px0 += 4; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px1 += 4; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px2 += 4; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px3 += 4; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0v = vfmaq(acc0v, x0v, c0v); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc1v = vfmaq(acc1v, x1v, c0v); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc2v = vfmaq(acc2v, x2v, c0v); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc3v = vfmaq(acc3v, x3v, c0v); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Decrement the loop counter ARM GAS /tmp/ccJrAs6S.s page 911 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt--; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * If the filter length is not a multiple of 4, compute the remaining filter taps 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * should be tail predicated 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps % 0x4U; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** if (tapCnt > 0U) 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** mve_pred16_t p0 = vctp32q(tapCnt); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Read the b[numTaps-1] coefficient 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0v = vldrwq_z_f32(pb, p0); 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pb += 4; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Read x[n-numTaps-1] sample for acc0 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0v = vld1q(px0); 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x1v = vld1q(px1); 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x2v = vld1q(px2); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x3v = vld1q(px3); 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px0 += 4; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px1 += 4; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px2 += 4; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px3 += 4; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0v = vfmaq_f32(acc0v, x0v, c0v); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc1v = vfmaq_f32(acc1v, x1v, c0v); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc2v = vfmaq_f32(acc2v, x2v, c0v); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc3v = vfmaq_f32(acc3v, x3v, c0v); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* reduction */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv[0] = vecAddAcrossF32Mve(acc0v); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv[1] = vecAddAcrossF32Mve(acc1v); 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv[2] = vecAddAcrossF32Mve(acc2v); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv[3] = vecAddAcrossF32Mve(acc3v); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Advance the state pointer by the decimation factor 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * to process the next group of decimation factor number samples 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pState = pState + 4 * S->M; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * The result is in the accumulator, store in the destination buffer. 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** vst1q(pDst, accv); 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pDst += 4; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Decrement the loop counter 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCnt--; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } ARM GAS /tmp/ccJrAs6S.s page 912 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (blkCntN4 > 0U) 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Copy decimation factor number of new input samples into the state buffer 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** i = S->M; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** do 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pStateCurnt++ = *pSrc++; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (--i); 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Set accumulator to zero 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0v = vdupq_n_f32(0.0f); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Initialize state pointer 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px = pState; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Initialize coeff pointer 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pb = pCoeffs; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Loop unrolling. Process 4 taps at a time. 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps >> 2; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Loop over the number of taps. Unroll by a factor of 4. 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Repeat until we've computed numTaps-4 coefficients. 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (tapCnt > 0U) 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0v = vldrwq_f32(pb); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0v = vldrwq_f32(px); 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pb += 4; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px += 4; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0v = vfmaq_f32(acc0v, x0v, c0v); 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Decrement the loop counter 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt--; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps % 0x4U; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** if (tapCnt > 0U) 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** mve_pred16_t p0 = vctp32q(tapCnt); 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0v = vldrwq_z_f32(pb, p0); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0v = vldrwq_f32(px); 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0v = vfmaq_f32(acc0v, x0v, c0v); 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv[0] = vecAddAcrossF32Mve(acc0v); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Advance the state pointer by the decimation factor 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * * to process the next group of decimation factor number samples ARM GAS /tmp/ccJrAs6S.s page 913 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pState = pState + S->M; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * The result is in the accumulator, store in the destination buffer. 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pDst++ = accv[0]; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Decrement the loop counter 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCntN4--; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Processing is complete. 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * Now copy the last numTaps - 1 samples to the start of the state buffer. 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * This prepares the state buffer for the next function call. 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** */ 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pStateCurnt = S->pState; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCnt =(numTaps - 1) >> 2; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (blkCnt > 0U) 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** vst1q(pStateCurnt, vldrwq_f32(pState)); 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pState += 4; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pStateCurnt += 4; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCnt--; 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCnt = (numTaps - 1) & 3; 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** if (blkCnt > 0U) 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** vstrwq_p_f32(pStateCurnt, vldrwq_f32(pState), p0); 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #else 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #if defined(ARM_MATH_NEON) 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** void arm_fir_decimate_f32( 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const arm_fir_decimate_instance_f32 * S, 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const float32_t * pSrc, 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t * pDst, 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** uint32_t blockSize) 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t *pState = S->pState; /* State pointer */ 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t *px; /* Temporary pointer for state buffer */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const float32_t *pb; /* Temporary pointer for coefficient buffer */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t sum0; /* Accumulator */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t x0, c0; /* Temporary variables to hold state and coefficie 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** uint32_t blkCntN4; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t *px0, *px1, *px2, *px3; 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t x1, x2, x3; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32x4_t accv,acc0v,acc1v,acc2v,acc3v; ARM GAS /tmp/ccJrAs6S.s page 914 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32x4_t x0v, x1v, x2v, x3v; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32x4_t c0v; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32x2_t temp; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32x4_t sum0v; 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* S->pState buffer contains previous frame (numTaps - 1) samples */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* pStateCurnt points to the location where the new input data should be written */ 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pStateCurnt = S->pState + (numTaps - 1U); 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Total number of output samples to be computed */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCnt = outBlockSize / 4; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCntN4 = outBlockSize - (4 * blkCnt); 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (blkCnt > 0U) 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Copy 4 * decimation factor number of new input samples into the state buffer */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** i = 4 * S->M; 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** do 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pStateCurnt++ = *pSrc++; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } while (--i); 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Set accumulators to zero */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0v = vdupq_n_f32(0.0); 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc1v = vdupq_n_f32(0.0); 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc2v = vdupq_n_f32(0.0); 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc3v = vdupq_n_f32(0.0); 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Initialize state pointer for all the samples */ 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px0 = pState; 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px1 = pState + S->M; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px2 = pState + 2 * S->M; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px3 = pState + 3 * S->M; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Initialize coeff pointer */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pb = pCoeffs; 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Process 4 taps at a time. */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps >> 2; 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Loop over the number of taps. 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** ** Repeat until we've computed numTaps-4 coefficients. */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (tapCnt > 0U) 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read the b[numTaps-1] coefficient */ 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0v = vld1q_f32(pb); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pb += 4; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read x[n-numTaps-1] sample for acc0 */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0v = vld1q_f32(px0); 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x1v = vld1q_f32(px1); 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x2v = vld1q_f32(px2); 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x3v = vld1q_f32(px3); 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 915 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px0 += 4; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px1 += 4; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px2 += 4; 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px3 += 4; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0v = vmlaq_f32(acc0v, x0v, c0v); 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc1v = vmlaq_f32(acc1v, x1v, c0v); 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc2v = vmlaq_f32(acc2v, x2v, c0v); 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc3v = vmlaq_f32(acc3v, x3v, c0v); 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement the loop counter */ 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt--; 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** temp = vpadd_f32(vget_low_f32(acc0v),vget_high_f32(acc0v)); 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv = vsetq_lane_f32(vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1),accv,0); 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** temp = vpadd_f32(vget_low_f32(acc1v),vget_high_f32(acc1v)); 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv = vsetq_lane_f32(vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1),accv,1); 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** temp = vpadd_f32(vget_low_f32(acc2v),vget_high_f32(acc2v)); 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv = vsetq_lane_f32(vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1),accv,2); 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** temp = vpadd_f32(vget_low_f32(acc3v),vget_high_f32(acc3v)); 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv = vsetq_lane_f32(vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1),accv,3); 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* If the filter length is not a multiple of 4, compute the remaining filter taps */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps % 0x4U; 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (tapCnt > 0U) 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read coefficients */ 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0 = *(pb++); 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Fetch state variables for acc0, acc1, acc2, acc3 */ 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0 = *(px0++); 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x1 = *(px1++); 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x2 = *(px2++); 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x3 = *(px3++); 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Perform the multiply-accumulate */ 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv = vsetq_lane_f32(vgetq_lane_f32(accv, 0) + x0 * c0,accv,0); 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv = vsetq_lane_f32(vgetq_lane_f32(accv, 1) + x1 * c0,accv,1); 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv = vsetq_lane_f32(vgetq_lane_f32(accv, 2) + x2 * c0,accv,2); 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** accv = vsetq_lane_f32(vgetq_lane_f32(accv, 3) + x3 * c0,accv,3); 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement the loop counter */ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt--; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Advance the state pointer by the decimation factor 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * to process the next group of decimation factor number samples */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pState = pState + 4 * S->M; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* The result is in the accumulator, store in the destination buffer. */ 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** vst1q_f32(pDst,accv); 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pDst += 4; ARM GAS /tmp/ccJrAs6S.s page 916 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement the loop counter */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCnt--; 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (blkCntN4 > 0U) 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Copy decimation factor number of new input samples into the state buffer */ 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** i = S->M; 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** do 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pStateCurnt++ = *pSrc++; 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } while (--i); 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Set accumulator to zero */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** sum0v = vdupq_n_f32(0.0); 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Initialize state pointer */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px = pState; 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Initialize coeff pointer */ 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pb = pCoeffs; 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Process 4 taps at a time. */ 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps >> 2; 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Loop over the number of taps. 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** ** Repeat until we've computed numTaps-4 coefficients. */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (tapCnt > 0U) 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0v = vld1q_f32(pb); 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pb += 4; 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0v = vld1q_f32(px); 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px += 4; 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** sum0v = vmlaq_f32(sum0v, x0v, c0v); 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement the loop counter */ 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt--; 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** temp = vpadd_f32(vget_low_f32(sum0v),vget_high_f32(sum0v)); 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** sum0 = vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1); 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* If the filter length is not a multiple of 4, compute the remaining filter taps */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps % 0x4U; 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (tapCnt > 0U) 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read coefficients */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0 = *(pb++); 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Fetch 1 state variable */ 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0 = *(px++); ARM GAS /tmp/ccJrAs6S.s page 917 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Perform the multiply-accumulate */ 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** sum0 += x0 * c0; 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement the loop counter */ 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt--; 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Advance the state pointer by the decimation factor 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * to process the next group of decimation factor number samples */ 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pState = pState + S->M; 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* The result is in the accumulator, store in the destination buffer. */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pDst++ = sum0; 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement the loop counter */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCntN4--; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Processing is complete. 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** ** This prepares the state buffer for the next function call. */ 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Points to the start of the state buffer */ 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pStateCurnt = S->pState; 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** i = (numTaps - 1U) >> 2; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Copy data */ 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (i > 0U) 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** sum0v = vld1q_f32(pState); 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** vst1q_f32(pStateCurnt,sum0v); 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pState += 4; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pStateCurnt += 4; 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement the loop counter */ 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** i--; 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** i = (numTaps - 1U) % 0x04U; 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Copy data */ 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (i > 0U) 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pStateCurnt++ = *pState++; 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement the loop counter */ 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** i--; 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #else 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** void arm_fir_decimate_f32( 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const arm_fir_decimate_instance_f32 * S, 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const float32_t * pSrc, 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t * pDst, 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** uint32_t blockSize) ARM GAS /tmp/ccJrAs6S.s page 918 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 23582 .loc 46 626 0 23583 .cfi_startproc 23584 @ args = 0, pretend = 0, frame = 0 23585 @ frame_needed = 0, uses_anonymous_args = 0 23586 .LVL3817: 23587 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 23588 .LCFI135: 23589 .cfi_def_cfa_offset 36 23590 .cfi_offset 4, -36 23591 .cfi_offset 5, -32 23592 .cfi_offset 6, -28 23593 .cfi_offset 7, -24 23594 .cfi_offset 8, -20 23595 .cfi_offset 9, -16 23596 .cfi_offset 10, -12 23597 .cfi_offset 11, -8 23598 .cfi_offset 14, -4 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t *pState = S->pState; /* State pointer */ 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t *pStateCur; /* Points to the current sample of the state 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t *px0; /* Temporary pointer for state buffer */ 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const float32_t *pb; /* Temporary pointer for coefficient buffer 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t x0, c0; /* Temporary variables to hold state and coe 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t acc0; /* Accumulator */ 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 23599 .loc 46 634 0 23600 0004 4588 ldrh r5, [r0, #2] 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t *pState = S->pState; /* State pointer */ 23601 .loc 46 627 0 23602 0006 D0F80880 ldr r8, [r0, #8] 23603 .LVL3818: 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ 23604 .loc 46 635 0 23605 000a 90F80090 ldrb r9, [r0] @ zero_extendqisi2 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t *pStateCur; /* Points to the current sample of the state 23606 .loc 46 628 0 23607 000e D0F804A0 ldr r10, [r0, #4] 23608 .LVL3819: 23609 .loc 46 635 0 23610 0012 B3FBF9F3 udiv r3, r3, r9 23611 .LVL3820: 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t *px1, *px2, *px3; 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t x1, x2, x3; 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** float32_t acc1, acc2, acc3; 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #endif 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* S->pState buffer contains previous frame (numTaps - 1) samples */ 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* pStateCur points to the location where the new input data should be written */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pStateCur = S->pState + (numTaps - 1U); 23612 .loc 46 645 0 23613 0016 05F18047 add r7, r5, #1073741824 23614 001a 013F subs r7, r7, #1 23615 001c 08EB8707 add r7, r8, r7, lsl #2 23616 .LVL3821: ARM GAS /tmp/ccJrAs6S.s page 919 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Loop unrolling: Compute 4 samples at a time */ 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCnt = outBlockSize >> 2U; 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Samples loop unrolled by 4 */ 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (blkCnt > 0U) 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Copy 4 * decimation factor number of new input samples into the state buffer */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** i = S->M * 4; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** do 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pStateCur++ = *pSrc++; 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } while (--i); 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Set accumulators to zero */ 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0 = 0.0f; 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc1 = 0.0f; 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc2 = 0.0f; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc3 = 0.0f; 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Initialize state pointer for all the samples */ 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px0 = pState; 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px1 = pState + S->M; 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px2 = pState + 2 * S->M; 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px3 = pState + 3 * S->M; 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Initialize coeff pointer */ 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pb = pCoeffs; 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Loop unrolling: Compute 4 taps at a time */ 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps >> 2U; 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (tapCnt > 0U) 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read the b[numTaps-1] coefficient */ 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0 = *(pb++); 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read x[n-numTaps-1] sample for acc0 */ 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0 = *(px0++); 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read x[n-numTaps-1] sample for acc1 */ 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x1 = *(px1++); 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read x[n-numTaps-1] sample for acc2 */ 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x2 = *(px2++); 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read x[n-numTaps-1] sample for acc3 */ 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x3 = *(px3++); 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Perform the multiply-accumulate */ 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0 += x0 * c0; 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc1 += x1 * c0; 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc2 += x2 * c0; 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc3 += x3 * c0; 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read the b[numTaps-2] coefficient */ ARM GAS /tmp/ccJrAs6S.s page 920 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0 = *(pb++); 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0 = *(px0++); 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x1 = *(px1++); 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x2 = *(px2++); 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x3 = *(px3++); 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Perform the multiply-accumulate */ 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0 += x0 * c0; 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc1 += x1 * c0; 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc2 += x2 * c0; 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc3 += x3 * c0; 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read the b[numTaps-3] coefficient */ 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0 = *(pb++); 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */ 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0 = *(px0++); 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x1 = *(px1++); 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x2 = *(px2++); 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x3 = *(px3++); 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Perform the multiply-accumulate */ 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0 += x0 * c0; 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc1 += x1 * c0; 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc2 += x2 * c0; 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc3 += x3 * c0; 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read the b[numTaps-4] coefficient */ 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0 = *(pb++); 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0 = *(px0++); 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x1 = *(px1++); 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x2 = *(px2++); 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x3 = *(px3++); 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Perform the multiply-accumulate */ 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0 += x0 * c0; 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc1 += x1 * c0; 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc2 += x2 * c0; 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc3 += x3 * c0; 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement loop counter */ 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt--; 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Loop unrolling: Compute remaining taps */ 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps % 0x4U; 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (tapCnt > 0U) 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read coefficients */ 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0 = *(pb++); 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Fetch state variables for acc0, acc1, acc2, acc3 */ ARM GAS /tmp/ccJrAs6S.s page 921 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0 = *(px0++); 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x1 = *(px1++); 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x2 = *(px2++); 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x3 = *(px3++); 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Perform the multiply-accumulate */ 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0 += x0 * c0; 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc1 += x1 * c0; 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc2 += x2 * c0; 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc3 += x3 * c0; 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement loop counter */ 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt--; 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Advance the state pointer by the decimation factor 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * to process the next group of decimation factor number samples */ 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pState = pState + S->M * 4; 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* The result is in the accumulator, store in the destination buffer. */ 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pDst++ = acc0; 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pDst++ = acc1; 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pDst++ = acc2; 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pDst++ = acc3; 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement loop counter */ 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCnt--; 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Loop unrolling: Compute remaining samples */ 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCnt = outBlockSize % 0x4U; 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #else 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Initialize blkCnt with number of samples */ 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCnt = outBlockSize; 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (blkCnt > 0U) 23617 .loc 46 799 0 23618 0020 6BB3 cbz r3, .L1699 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Copy decimation factor number of new input samples into the state buffer */ 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** i = S->M; 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** do 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pStateCur++ = *pSrc++; 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } while (--i); 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Set accumulator to zero */ 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0 = 0.0f; 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Initialize state pointer */ 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** px0 = pState; ARM GAS /tmp/ccJrAs6S.s page 922 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Initialize coeff pointer */ 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pb = pCoeffs; 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Loop unrolling: Compute 4 taps at a time */ 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps >> 2U; 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (tapCnt > 0U) 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read the b[numTaps-1] coefficient */ 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0 = *pb++; 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read x[n-numTaps-1] sample */ 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0 = *px0++; 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Perform the multiply-accumulate */ 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0 += x0 * c0; 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read the b[numTaps-2] coefficient */ 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0 = *pb++; 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read x[n-numTaps-2] sample */ 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0 = *px0++; 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Perform the multiply-accumulate */ 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0 += x0 * c0; 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read the b[numTaps-3] coefficient */ 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0 = *pb++; 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read x[n-numTaps-3] sample */ 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0 = *px0++; 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Perform the multiply-accumulate */ 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0 += x0 * c0; 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read the b[numTaps-4] coefficient */ 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0 = *pb++; 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read x[n-numTaps-4] sample */ 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0 = *px0++; 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Perform the multiply-accumulate */ 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0 += x0 * c0; 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement loop counter */ 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt--; 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Loop unrolling: Compute remaining taps */ 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps % 0x4U; 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #else 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Initialize tapCnt with number of taps */ ARM GAS /tmp/ccJrAs6S.s page 923 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = numTaps; 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (tapCnt > 0U) 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Read coefficients */ 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** c0 = *pb++; 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Fetch 1 state variable */ 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** x0 = *px0++; 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Perform the multiply-accumulate */ 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** acc0 += x0 * c0; 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement loop counter */ 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt--; 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Advance the state pointer by the decimation factor 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** * to process the next group of decimation factor number samples */ 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pState = pState + S->M; 23619 .loc 46 893 0 23620 0022 4FEA8906 lsl r6, r9, #2 23621 0026 9C46 mov ip, r3 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 23622 .loc 46 627 0 23623 0028 C646 mov lr, r8 23624 .LVL3822: 23625 .L1696: 23626 002a BB46 mov fp, r7 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 23627 .loc 46 802 0 23628 002c 4846 mov r0, r9 23629 002e 0C46 mov r4, r1 23630 .LVL3823: 23631 .L1693: 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 23632 .loc 46 806 0 discriminator 1 23633 0030 F4EC017A vldmia.32 r4!, {s15} 23634 .LVL3824: 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 23635 .loc 46 808 0 discriminator 1 23636 0034 0138 subs r0, r0, #1 23637 .LVL3825: 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 23638 .loc 46 806 0 discriminator 1 23639 0036 EBEC017A vstmia.32 fp!, {s15} 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 23640 .loc 46 808 0 discriminator 1 23641 003a F9D1 bne .L1693 23642 003c 3144 add r1, r1, r6 23643 003e 3744 add r7, r7, r6 23644 .LVL3826: 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 23645 .loc 46 811 0 23646 0040 DFED107A vldr.32 s15, .L1710 ARM GAS /tmp/ccJrAs6S.s page 924 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 23647 .loc 46 876 0 23648 0044 55B1 cbz r5, .L1694 23649 0046 2846 mov r0, r5 23650 .LVL3827: 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 23651 .loc 46 817 0 23652 0048 D346 mov fp, r10 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 23653 .loc 46 876 0 23654 004a 7446 mov r4, lr 23655 .LVL3828: 23656 .L1695: 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 23657 .loc 46 885 0 23658 004c FBEC016A vldmia.32 fp!, {s13} 23659 .LVL3829: 23660 0050 B4EC017A vldmia.32 r4!, {s14} 23661 .LVL3830: 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 23662 .loc 46 876 0 23663 0054 0138 subs r0, r0, #1 23664 .LVL3831: 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 23665 .loc 46 885 0 23666 0056 E6EE877A vfma.f32 s15, s13, s14 23667 .LVL3832: 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 23668 .loc 46 876 0 23669 005a F7D1 bne .L1695 23670 .LVL3833: 23671 .L1694: 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 23672 .loc 46 799 0 23673 005c BCF1010C subs ip, ip, #1 23674 .LVL3834: 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* The result is in the accumulator, store in the destination buffer. */ 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pDst++ = acc0; 23675 .loc 46 896 0 23676 0060 E2EC017A vstmia.32 r2!, {s15} 23677 .LVL3835: 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 23678 .loc 46 893 0 23679 0064 B644 add lr, lr, r6 23680 .LVL3836: 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 23681 .loc 46 799 0 23682 0066 E0D1 bne .L1696 23683 0068 03FB0683 mla r3, r3, r6, r8 23684 .LVL3837: 23685 006c 03E0 b .L1709 23686 .LVL3838: 23687 .L1698: 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement loop counter */ 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** blkCnt--; ARM GAS /tmp/ccJrAs6S.s page 925 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Processing is complete. 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** Now copy the last numTaps - 1 samples to the satrt of the state buffer. 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** This prepares the state buffer for the next function call. */ 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Points to the start of the state buffer */ 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** pStateCur = S->pState; 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Loop unrolling: Compute 4 taps at a time */ 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = (numTaps - 1U) >> 2U; 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Copy data */ 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (tapCnt > 0U) 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pStateCur++ = *pState++; 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pStateCur++ = *pState++; 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pStateCur++ = *pState++; 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pStateCur++ = *pState++; 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement loop counter */ 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt--; 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Loop unrolling: Compute remaining taps */ 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = (numTaps - 1U) % 0x04U; 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #else 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Initialize tapCnt with number of taps */ 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt = (numTaps - 1U); 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Copy data */ 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** while (tapCnt > 0U) 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** *pStateCur++ = *pState++; 23688 .loc 46 939 0 23689 006e 53F8042B ldr r2, [r3], #4 @ float 23690 .LVL3839: 23691 0072 48F8042B str r2, [r8], #4 @ float 23692 .LVL3840: 23693 .L1709: 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** { 23694 .loc 46 937 0 23695 0076 013D subs r5, r5, #1 23696 0078 F9D1 bne .L1698 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** /* Decrement loop counter */ 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** tapCnt--; 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** } 23697 .loc 46 945 0 ARM GAS /tmp/ccJrAs6S.s page 926 23698 007a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 23699 .LVL3841: 23700 .L1699: 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 23701 .loc 46 627 0 23702 007e 4346 mov r3, r8 23703 .LVL3842: 23704 0080 F9E7 b .L1709 23705 .L1711: 23706 0082 00BF .align 2 23707 .L1710: 23708 0084 00000000 .word 0 23709 .cfi_endproc 23710 .LFE191: 23712 .section .text.arm_fir_decimate_fast_q15,"ax",%progbits 23713 .align 1 23714 .p2align 2,,3 23715 .global arm_fir_decimate_fast_q15 23716 .syntax unified 23717 .thumb 23718 .thumb_func 23719 .fpu fpv4-sp-d16 23721 arm_fir_decimate_fast_q15: 23722 .LFB192: 23723 .file 47 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * Title: arm_fir_decimate_fast_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * Description: Fast Q15 FIR Decimator 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** @ingroup groupFilters ARM GAS /tmp/ccJrAs6S.s page 927 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** @addtogroup FIR_decimate 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** @brief Processing function for the Q15 FIR decimator (fast variant). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** @param[in] S points to an instance of the Q15 FIR decimator structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** @param[in] blockSize number of input samples to process per call 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** This fast version uses a 32-bit accumulator with 2.30 format. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** The accumulator maintains full precision of the intermediate multiplication resu 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** Thus, if the accumulator result overflows it wraps around and distorts the resul 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** In order to avoid overflows completely the input signal must be scaled down by l 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** @remark 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** Refer to \ref arm_fir_decimate_q15() for a slower implementation of this functio 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** Both the slow and the fast versions use the same instance structure. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** Use function \ref arm_fir_decimate_init_q15() to initialize the filter structure 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** #if defined (ARM_MATH_DSP) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** void arm_fir_decimate_fast_q15( 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** const arm_fir_decimate_instance_q15 * S, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** const q15_t * pSrc, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q15_t * pDst, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** uint32_t blockSize) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 23724 .loc 47 67 0 23725 .cfi_startproc 23726 @ args = 0, pretend = 0, frame = 32 23727 @ frame_needed = 0, uses_anonymous_args = 0 23728 .LVL3843: 23729 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 23730 .LCFI136: 23731 .cfi_def_cfa_offset 36 23732 .cfi_offset 4, -36 23733 .cfi_offset 5, -32 23734 .cfi_offset 6, -28 23735 .cfi_offset 7, -24 23736 .cfi_offset 8, -20 23737 .cfi_offset 9, -16 23738 .cfi_offset 10, -12 23739 .cfi_offset 11, -8 23740 .cfi_offset 14, -4 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q15_t *pState = S->pState; /* State pointer */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q15_t *pStateCur; /* Points to the current sample of the state 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q15_t *px; /* Temporary pointer for state buffer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** const q15_t *pb; /* Temporary pointer for coefficient buffer ARM GAS /tmp/ccJrAs6S.s page 928 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q31_t x0, x1, c0; /* Temporary variables to hold state and coe 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q31_t sum0; /* Accumulators */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q31_t acc0, acc1; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q15_t *px0, *px1; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** uint32_t blkCntN3; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** uint32_t numTaps = S->numTaps; /* Number of taps */ 23741 .loc 47 78 0 23742 0004 4488 ldrh r4, [r0, #2] 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q15_t *pState = S->pState; /* State pointer */ 23743 .loc 47 67 0 23744 0006 89B0 sub sp, sp, #36 23745 .LCFI137: 23746 .cfi_def_cfa_offset 72 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q15_t *pState = S->pState; /* State pointer */ 23747 .loc 47 67 0 23748 0008 8346 mov fp, r0 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q31_t c1; /* Temporary variables to hold state and coe 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** #endif 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* S->pState buffer contains previous frame (numTaps - 1) samples */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* pStateCur points to the location where the new input data should be written */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** pStateCur = S->pState + (numTaps - 1U); 23749 .loc 47 87 0 23750 000a 04F10047 add r7, r4, #-2147483648 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 23751 .loc 47 68 0 23752 000e 8068 ldr r0, [r0, #8] 23753 .LVL3844: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ 23754 .loc 47 78 0 23755 0010 0194 str r4, [sp, #4] 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ 23756 .loc 47 79 0 23757 0012 9BF800E0 ldrb lr, [fp] @ zero_extendqisi2 23758 0016 B3FBFEF3 udiv r3, r3, lr 23759 .LVL3845: 23760 001a 03F00104 and r4, r3, #1 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q15_t *pStateCur; /* Points to the current sample of the state 23761 .loc 47 69 0 23762 001e DBF80450 ldr r5, [fp, #4] 23763 0022 0694 str r4, [sp, #24] 23764 .loc 47 87 0 23765 0024 013F subs r7, r7, #1 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Total number of output samples to be computed */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** blkCnt = outBlockSize / 2; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** blkCntN3 = outBlockSize - (2 * blkCnt); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** while (blkCnt > 0U) 23766 .loc 47 93 0 23767 0026 5C08 lsrs r4, r3, #1 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 23768 .loc 47 68 0 23769 0028 0490 str r0, [sp, #16] ARM GAS /tmp/ccJrAs6S.s page 929 23770 .LVL3846: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q15_t *pStateCur; /* Points to the current sample of the state 23771 .loc 47 69 0 23772 002a 0395 str r5, [sp, #12] 23773 .LVL3847: 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** q15_t *pState = S->pState; /* State pointer */ 23774 .loc 47 67 0 23775 002c 0592 str r2, [sp, #20] 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 23776 .loc 47 87 0 23777 002e 00EB4707 add r7, r0, r7, lsl #1 23778 .LVL3848: 23779 .loc 47 93 0 23780 0032 0794 str r4, [sp, #28] 23781 0034 00F02281 beq .L1737 23782 0038 02F10408 add r8, r2, #4 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 23783 .loc 47 68 0 23784 003c 0346 mov r3, r0 23785 .LVL3849: 23786 .loc 47 93 0 23787 003e 0094 str r4, [sp] 23788 .LVL3850: 23789 .L1723: 23790 0040 381D adds r0, r7, #4 23791 0042 0A1D adds r2, r1, #4 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Copy 2 * decimation factor number of new input samples into the state buffer */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** i = S->M * 2; 23792 .loc 47 96 0 23793 0044 0224 movs r4, #2 23794 0046 9742 cmp r7, r2 23795 0048 38BF it cc 23796 004a 8142 cmpcc r1, r0 23797 004c 2546 mov r5, r4 @ movhi 23798 004e 1EFB04FC smulbb ip, lr, r4 23799 .LVL3851: 23800 0052 6BD3 bcc .L1714 23801 0054 BCF10D0F cmp ip, #13 23802 0058 68D9 bls .L1714 23803 005a 4FF0FF34 mov r4, #-1 23804 005e C1F34002 ubfx r2, r1, #1, #1 23805 0062 15FB0E4E smlabb lr, r5, lr, r4 23806 0066 002A cmp r2, #0 23807 0068 5CD0 beq .L1738 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** do 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** *pStateCur++ = *pSrc++; 23808 .loc 47 100 0 23809 006a B1F90000 ldrsh r0, [r1] 23810 006e 3880 strh r0, [r7] @ movhi 23811 0070 881C adds r0, r1, #2 23812 0072 0290 str r0, [sp, #8] 23813 .LVL3852: 23814 0074 07F1020A add r10, r7, #2 23815 .LVL3853: ARM GAS /tmp/ccJrAs6S.s page 930 23816 .L1715: 23817 0078 ACEB0209 sub r9, ip, r2 23818 007c A9F10204 sub r4, r9, #2 23819 0080 5200 lsls r2, r2, #1 23820 0082 6408 lsrs r4, r4, #1 23821 0084 8D18 adds r5, r1, r2 23822 0086 0134 adds r4, r4, #1 23823 0088 3A44 add r2, r2, r7 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 23824 .loc 47 96 0 23825 008a 0020 movs r0, #0 23826 .LVL3854: 23827 .L1716: 23828 008c 0130 adds r0, r0, #1 23829 .loc 47 100 0 discriminator 1 23830 008e 55F8046B ldr r6, [r5], #4 23831 0092 42F8046B str r6, [r2], #4 @ unaligned 23832 0096 8442 cmp r4, r0 23833 0098 F8D8 bhi .L1716 23834 009a 6000 lsls r0, r4, #1 23835 009c 029E ldr r6, [sp, #8] 23836 009e A200 lsls r2, r4, #2 23837 00a0 8145 cmp r9, r0 23838 00a2 06EB0205 add r5, r6, r2 23839 00a6 AEEB000E sub lr, lr, r0 23840 00aa 5244 add r2, r2, r10 23841 00ac 09D0 beq .L1719 23842 .LVL3855: 23843 .loc 47 100 0 is_stmt 0 23844 00ae 36F92400 ldrsh r0, [r6, r4, lsl #2] 23845 00b2 2AF82400 strh r0, [r10, r4, lsl #2] @ movhi 23846 .LVL3856: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** } while (--i); 23847 .loc 47 102 0 is_stmt 1 23848 00b6 BEF1010F cmp lr, #1 23849 00ba 02D0 beq .L1719 23850 .LVL3857: 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 23851 .loc 47 100 0 23852 00bc B5F90200 ldrsh r0, [r5, #2] 23853 00c0 5080 strh r0, [r2, #2] @ movhi 23854 .LVL3858: 23855 .L1719: 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Set accumulator to zero */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** acc0 = 0; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** acc1 = 0; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Initialize state pointer for all the samples */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** px0 = pState; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** px1 = pState + S->M; 23856 .loc 47 110 0 23857 00c2 9BF80090 ldrb r9, [fp] @ zero_extendqisi2 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Initialize coeff pointer */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** pb = pCoeffs; ARM GAS /tmp/ccJrAs6S.s page 931 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Loop unrolling: Compute 4 taps at a time */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** tapCnt = numTaps >> 2U; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** while (tapCnt > 0U) 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Read the b[numTaps-1] and b[numTaps-2] coefficients */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** c0 = read_q15x2_ia ((q15_t **) &pb); 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** x0 = read_q15x2_ia (&px0); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** x1 = read_q15x2_ia (&px1); 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Perform the multiply-accumulate */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** acc0 = __SMLAD(x0, c0, acc0); 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** acc1 = __SMLAD(x1, c0, acc1); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Read the b[numTaps-3] and b[numTaps-4] coefficient */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** c0 = read_q15x2_ia ((q15_t **) &pb); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** x0 = read_q15x2_ia (&px0); 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** x1 = read_q15x2_ia (&px1); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Perform the multiply-accumulate */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** acc0 = __SMLAD(x0, c0, acc0); 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** acc1 = __SMLAD(x1, c0, acc1); 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Decrement loop counter */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** tapCnt--; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** } 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Loop unrolling: Compute remaining taps */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** tapCnt = numTaps % 0x4U; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** #else 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Initialize tapCnt with number of taps */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** tapCnt = numTaps; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** while (tapCnt > 0U) 23858 .loc 47 158 0 23859 00c6 0198 ldr r0, [sp, #4] 23860 00c8 4FEA4C0C lsl ip, ip, #1 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 23861 .loc 47 110 0 23862 00cc 4FEA4909 lsl r9, r9, #1 23863 00d0 6744 add r7, r7, ip 23864 00d2 6144 add r1, r1, ip 23865 .LVL3859: 23866 00d4 03EB090A add r10, r3, r9 23867 .LVL3860: 23868 .loc 47 158 0 ARM GAS /tmp/ccJrAs6S.s page 932 23869 00d8 90B3 cbz r0, .L1739 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 23870 .loc 47 106 0 23871 00da 0022 movs r2, #0 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 23872 .loc 47 113 0 23873 00dc 039E ldr r6, [sp, #12] 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** acc1 = 0; 23874 .loc 47 105 0 23875 00de 1446 mov r4, r2 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 23876 .loc 47 110 0 23877 00e0 D446 mov ip, r10 23878 .LVL3861: 23879 .L1721: 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Read coefficients */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** c0 = *pb++; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Fetch state variables for acc0, acc1 */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** x0 = *px0++; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** x1 = *px1++; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Perform the multiply-accumulate */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** acc0 = __SMLAD(x0, c0, acc0); 23880 .loc 47 168 0 23881 00e2 36F9025B ldrsh r5, [r6], #2 23882 .LVL3862: 23883 00e6 33F902EB ldrsh lr, [r3], #2 23884 .LVL3863: 23885 .LBB2261: 23886 .LBB2262: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 23887 .loc 6 1993 0 23888 .syntax unified 23889 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 23890 00ea 2EFB0544 smlad r4, lr, r5, r4 23891 @ 0 "" 2 23892 .LVL3864: 23893 .thumb 23894 .syntax unified 23895 .LBE2262: 23896 .LBE2261: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** acc1 = __SMLAD(x1, c0, acc1); 23897 .loc 47 169 0 23898 00ee 3CF902EB ldrsh lr, [ip], #2 23899 .LVL3865: 23900 .LBB2263: 23901 .LBB2264: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 23902 .loc 6 1993 0 23903 .syntax unified 23904 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 23905 00f2 2EFB0522 smlad r2, lr, r5, r2 23906 @ 0 "" 2 23907 .LVL3866: 23908 .thumb ARM GAS /tmp/ccJrAs6S.s page 933 23909 .syntax unified 23910 .LBE2264: 23911 .LBE2263: 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 23912 .loc 47 158 0 23913 00f6 0138 subs r0, r0, #1 23914 .LVL3867: 23915 00f8 F3D1 bne .L1721 23916 00fa E413 asrs r4, r4, #15 23917 .LVL3868: 23918 00fc D213 asrs r2, r2, #15 23919 .LVL3869: 23920 .L1720: 23921 .LBB2265: 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Decrement loop counter */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** tapCnt--; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** } 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Advance the state pointer by the decimation factor 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * to process the next group of decimation factor number samples */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** pState = pState + S->M * 2; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Store filter output, smlad returns the values in 2.14 format */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* so downsacle by 15 to get output in 1.15 */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); 23922 .loc 47 182 0 23923 .syntax unified 23924 @ 182 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_ 23925 00fe 02F30F02 ssat r2, #16, r2 23926 @ 0 "" 2 23927 .thumb 23928 .syntax unified 23929 .LBE2265: 23930 0102 28F8022C strh r2, [r8, #-2] @ movhi 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 23931 .loc 47 93 0 23932 0106 009A ldr r2, [sp] 23933 .LBB2266: 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); 23934 .loc 47 181 0 23935 .syntax unified 23936 @ 181 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_ 23937 0108 04F30F04 ssat r4, #16, r4 23938 @ 0 "" 2 23939 .thumb 23940 .syntax unified 23941 .LBE2266: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 23942 .loc 47 93 0 23943 010c 013A subs r2, r2, #1 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); 23944 .loc 47 181 0 23945 010e 28F8044C strh r4, [r8, #-4] @ movhi 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 23946 .loc 47 177 0 ARM GAS /tmp/ccJrAs6S.s page 934 23947 0112 0AEB0903 add r3, r10, r9 23948 .LVL3870: 23949 0116 08F10408 add r8, r8, #4 23950 .LVL3871: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 23951 .loc 47 93 0 23952 011a 0092 str r2, [sp] 23953 011c 13D0 beq .L1722 23954 011e 9BF800E0 ldrb lr, [fp] @ zero_extendqisi2 23955 0122 8DE7 b .L1723 23956 .LVL3872: 23957 .L1738: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 23958 .loc 47 96 0 23959 0124 BA46 mov r10, r7 23960 0126 E646 mov lr, ip 23961 0128 0291 str r1, [sp, #8] 23962 012a A5E7 b .L1715 23963 .L1714: 23964 012c BC1E subs r4, r7, #2 23965 012e 6246 mov r2, ip 23966 0130 0846 mov r0, r1 23967 .LVL3873: 23968 .L1718: 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 23969 .loc 47 100 0 23970 0132 30F9025B ldrsh r5, [r0], #2 23971 .LVL3874: 23972 0136 24F8025F strh r5, [r4, #2]! @ movhi 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 23973 .loc 47 102 0 23974 013a 013A subs r2, r2, #1 23975 .LVL3875: 23976 013c F9D1 bne .L1718 23977 013e C0E7 b .L1719 23978 .LVL3876: 23979 .L1739: 23980 0140 0446 mov r4, r0 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 23981 .loc 47 158 0 23982 0142 0246 mov r2, r0 23983 0144 DBE7 b .L1720 23984 .LVL3877: 23985 .L1722: 23986 0146 059A ldr r2, [sp, #20] 23987 .LVL3878: 23988 0148 0798 ldr r0, [sp, #28] 23989 .LVL3879: 23990 014a 02EB8002 add r2, r2, r0, lsl #2 23991 014e 0592 str r2, [sp, #20] 23992 .LVL3880: 23993 .L1713: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Decrement loop counter */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** blkCnt--; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** } 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 935 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** while (blkCntN3 > 0U) 23994 .loc 47 188 0 23995 0150 069A ldr r2, [sp, #24] 23996 0152 002A cmp r2, #0 23997 0154 58D0 beq .L1724 23998 .LVL3881: 23999 0156 0C1D adds r4, r1, #4 24000 0158 381D adds r0, r7, #4 24001 015a 8142 cmp r1, r0 24002 015c 38BF it cc 24003 015e A742 cmpcc r7, r4 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Copy decimation factor number of new input samples into the state buffer */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** i = S->M; 24004 .loc 47 191 0 24005 0160 9BF80020 ldrb r2, [fp] @ zero_extendqisi2 24006 .LVL3882: 24007 0164 7ED3 bcc .L1725 24008 0166 0D2A cmp r2, #13 24009 0168 7CD9 bls .L1725 24010 016a C1F3400E ubfx lr, r1, #1, #1 24011 016e 0EF10104 add r4, lr, #1 24012 0172 501E subs r0, r2, #1 24013 0174 A042 cmp r0, r4 24014 0176 28D3 bcc .L1726 24015 0178 BEF1000F cmp lr, #0 24016 017c 6ED0 beq .L1740 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** do 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** *pStateCur++ = *pSrc++; 24017 .loc 47 195 0 24018 017e B1F90040 ldrsh r4, [r1] 24019 0182 3C80 strh r4, [r7] @ movhi 24020 0184 8E1C adds r6, r1, #2 24021 .LVL3883: 24022 0186 BD1C adds r5, r7, #2 24023 .LVL3884: 24024 .L1727: 24025 0188 A2EB0E04 sub r4, r2, lr 24026 018c A4F1020C sub ip, r4, #2 24027 0190 4FEA4E0E lsl lr, lr, #1 24028 0194 4FEA5C0C lsr ip, ip, #1 24029 0198 7144 add r1, r1, lr 24030 019a 7744 add r7, r7, lr 24031 019c 0CF1010C add ip, ip, #1 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 24032 .loc 47 191 0 24033 01a0 0022 movs r2, #0 24034 01a2 9E46 mov lr, r3 24035 .LVL3885: 24036 .L1728: 24037 01a4 0132 adds r2, r2, #1 24038 .loc 47 195 0 discriminator 1 24039 01a6 51F8043B ldr r3, [r1], #4 24040 01aa 47F8043B str r3, [r7], #4 @ unaligned 24041 01ae 9445 cmp ip, r2 ARM GAS /tmp/ccJrAs6S.s page 936 24042 01b0 F8D8 bhi .L1728 24043 01b2 7346 mov r3, lr 24044 01b4 4FEA4C0E lsl lr, ip, #1 24045 .LVL3886: 24046 01b8 4FEA8C07 lsl r7, ip, #2 24047 01bc 7445 cmp r4, lr 24048 01be 06EB0701 add r1, r6, r7 24049 01c2 A0EB0E02 sub r2, r0, lr 24050 01c6 2F44 add r7, r7, r5 24051 01c8 07D0 beq .L1731 24052 .L1726: 24053 .LVL3887: 24054 .loc 47 195 0 is_stmt 0 24055 01ca B1F90000 ldrsh r0, [r1] 24056 01ce 3880 strh r0, [r7] @ movhi 24057 .LVL3888: 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** } while (--i); 24058 .loc 47 197 0 is_stmt 1 24059 01d0 012A cmp r2, #1 24060 01d2 02D0 beq .L1731 24061 .LVL3889: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 24062 .loc 47 195 0 24063 01d4 B1F90220 ldrsh r2, [r1, #2] 24064 .LVL3890: 24065 01d8 7A80 strh r2, [r7, #2] @ movhi 24066 .LVL3891: 24067 .L1731: 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Set accumulator to zero */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** sum0 = 0; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Initialize state pointer */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** px = pState; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Initialize coeff pointer */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** pb = pCoeffs; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Loop unrolling: Compute 4 taps at a time */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** tapCnt = numTaps >> 2U; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** while (tapCnt > 0U) 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Read the b[numTaps-1] and b[numTaps-2] coefficients */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** c0 = read_q15x2_ia ((q15_t **) &pb); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** x0 = read_q15x2_ia (&px); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Read the b[numTaps-3] and b[numTaps-4] coefficients */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** c1 = read_q15x2_ia ((q15_t **) &pb); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Perform the multiply-accumulate */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** sum0 = __SMLAD(x0, c0, sum0); ARM GAS /tmp/ccJrAs6S.s page 937 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** x0 = read_q15x2_ia (&px); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Perform the multiply-accumulate */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** sum0 = __SMLAD(x0, c1, sum0); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Decrement loop counter */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** tapCnt--; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** } 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Loop unrolling: Compute remaining taps */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** tapCnt = numTaps % 0x4U; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** #else 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Initialize tapCnt with number of taps */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** tapCnt = numTaps; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** while (tapCnt > 0U) 24068 .loc 47 247 0 24069 01da 019A ldr r2, [sp, #4] 24070 01dc 002A cmp r2, #0 24071 01de 4BD0 beq .L1741 24072 .LVL3892: 24073 .L1783: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 24074 .loc 47 200 0 24075 01e0 039C ldr r4, [sp, #12] 24076 .loc 47 247 0 24077 01e2 1846 mov r0, r3 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 24078 .loc 47 200 0 24079 01e4 0021 movs r1, #0 24080 .LVL3893: 24081 .L1733: 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Read coefficients */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** c0 = *pb++; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Fetch 1 state variable */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** x0 = *px++; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Perform the multiply-accumulate */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** sum0 = __SMLAD(x0, c0, sum0); 24082 .loc 47 256 0 24083 01e6 30F9025B ldrsh r5, [r0], #2 24084 .LVL3894: 24085 01ea 34F9026B ldrsh r6, [r4], #2 24086 .LVL3895: 24087 .LBB2267: 24088 .LBB2268: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 24089 .loc 6 1993 0 24090 .syntax unified ARM GAS /tmp/ccJrAs6S.s page 938 24091 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 24092 01ee 25FB0611 smlad r1, r5, r6, r1 24093 @ 0 "" 2 24094 .LVL3896: 24095 .thumb 24096 .syntax unified 24097 .LBE2268: 24098 .LBE2267: 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 24099 .loc 47 247 0 24100 01f2 013A subs r2, r2, #1 24101 .LVL3897: 24102 01f4 F7D1 bne .L1733 24103 01f6 C913 asrs r1, r1, #15 24104 .LVL3898: 24105 .L1732: 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Decrement loop counter */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** tapCnt--; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** } 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Advance the state pointer by the decimation factor 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** * to process the next group of decimation factor number samples */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** pState = pState + S->M; 24106 .loc 47 264 0 24107 01f8 9BF80020 ldrb r2, [fp] @ zero_extendqisi2 24108 .LVL3899: 24109 .LBB2269: 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Store filter output, smlad returns the values in 2.14 format */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* so downsacle by 15 to get output in 1.15 */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); 24110 .loc 47 268 0 24111 .syntax unified 24112 @ 268 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_ 24113 01fc 01F30F01 ssat r1, #16, r1 24114 @ 0 "" 2 24115 .thumb 24116 .syntax unified 24117 .LBE2269: 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 24118 .loc 47 264 0 24119 0200 03EB4203 add r3, r3, r2, lsl #1 24120 .LVL3900: 24121 .loc 47 268 0 24122 0204 059A ldr r2, [sp, #20] 24123 0206 1180 strh r1, [r2] @ movhi 24124 .LVL3901: 24125 .L1724: 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Decrement loop counter */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** blkCntN3--; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** } 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Processing is complete. 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** Now copy the last numTaps - 1 samples to the satrt of the state buffer. 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** This prepares the state buffer for the next function call. */ ARM GAS /tmp/ccJrAs6S.s page 939 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Points to the start of the state buffer */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** pStateCur = S->pState; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** i = (numTaps - 1U) >> 2U; 24126 .loc 47 281 0 24127 0208 019A ldr r2, [sp, #4] 24128 020a 013A subs r2, r2, #1 24129 .LVL3902: 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* copy data */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** while (i > 0U) 24130 .loc 47 284 0 24131 020c 9608 lsrs r6, r2, #2 24132 .LVL3903: 24133 020e 11D0 beq .L1734 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 24134 .loc 47 279 0 24135 0210 0498 ldr r0, [sp, #16] 24136 .loc 47 284 0 24137 0212 1946 mov r1, r3 24138 0214 3446 mov r4, r6 24139 .LVL3904: 24140 .L1735: 24141 .LBB2270: 24142 .LBB2271: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 24143 .loc 3 928 0 24144 0216 0D68 ldr r5, [r1] @ unaligned 24145 .LVL3905: 24146 .LBE2271: 24147 .LBE2270: 24148 .LBB2272: 24149 .LBB2273: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 24150 .loc 3 969 0 24151 0218 0560 str r5, [r0] @ unaligned 24152 .LVL3906: 24153 .LBE2273: 24154 .LBE2272: 24155 .LBB2274: 24156 .LBB2275: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 24157 .loc 3 928 0 24158 021a 4D68 ldr r5, [r1, #4] @ unaligned 24159 .LVL3907: 24160 .LBE2275: 24161 .LBE2274: 24162 .LBB2276: 24163 .LBB2277: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 24164 .loc 3 969 0 24165 021c 4560 str r5, [r0, #4] @ unaligned 24166 .LBE2277: 24167 .LBE2276: 24168 .loc 47 284 0 24169 021e 013C subs r4, r4, #1 ARM GAS /tmp/ccJrAs6S.s page 940 24170 .LVL3908: 24171 0220 01F10801 add r1, r1, #8 24172 .LVL3909: 24173 0224 00F10800 add r0, r0, #8 24174 .LVL3910: 24175 0228 F5D1 bne .L1735 24176 022a 0499 ldr r1, [sp, #16] 24177 .LVL3911: 24178 022c F600 lsls r6, r6, #3 24179 022e 3144 add r1, r1, r6 24180 0230 3344 add r3, r3, r6 24181 0232 0491 str r1, [sp, #16] 24182 .LVL3912: 24183 .L1734: 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Decrement loop counter */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** i--; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** } 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** i = (numTaps - 1U) % 0x04U; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Copy data */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** while (i > 0U) 24184 .loc 47 296 0 24185 0234 12F00302 ands r2, r2, #3 24186 .LVL3913: 24187 0238 0DD0 beq .L1712 24188 .LVL3914: 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** *pStateCur++ = *pState++; 24189 .loc 47 298 0 24190 023a 0498 ldr r0, [sp, #16] 24191 023c B3F90010 ldrsh r1, [r3] 24192 0240 0180 strh r1, [r0] @ movhi 24193 .LVL3915: 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 24194 .loc 47 296 0 24195 0242 012A cmp r2, #1 24196 0244 07D0 beq .L1712 24197 .LVL3916: 24198 .loc 47 298 0 24199 0246 B3F90210 ldrsh r1, [r3, #2] 24200 024a 4180 strh r1, [r0, #2] @ movhi 24201 .LVL3917: 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 24202 .loc 47 296 0 24203 024c 022A cmp r2, #2 24204 .LVL3918: 24205 .loc 47 298 0 24206 024e 1CBF itt ne 24207 0250 B3F90430 ldrshne r3, [r3, #4] 24208 .LVL3919: 24209 0254 8380 strhne r3, [r0, #4] @ movhi 24210 .LVL3920: ARM GAS /tmp/ccJrAs6S.s page 941 24211 .L1712: 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** /* Decrement loop counter */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** i--; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** } 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** } 24212 .loc 47 304 0 24213 0256 09B0 add sp, sp, #36 24214 .LCFI138: 24215 .cfi_remember_state 24216 .cfi_def_cfa_offset 36 24217 @ sp needed 24218 0258 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 24219 .LVL3921: 24220 .L1740: 24221 .LCFI139: 24222 .cfi_restore_state 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 24223 .loc 47 191 0 24224 025c 3D46 mov r5, r7 24225 025e 1046 mov r0, r2 24226 0260 0E46 mov r6, r1 24227 0262 91E7 b .L1727 24228 .L1725: 24229 0264 023F subs r7, r7, #2 24230 .LVL3922: 24231 .L1730: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 24232 .loc 47 195 0 24233 0266 31F9020B ldrsh r0, [r1], #2 24234 .LVL3923: 24235 026a 27F8020F strh r0, [r7, #2]! @ movhi 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** 24236 .loc 47 197 0 24237 026e 013A subs r2, r2, #1 24238 .LVL3924: 24239 0270 F9D1 bne .L1730 24240 .LVL3925: 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c **** { 24241 .loc 47 247 0 24242 0272 019A ldr r2, [sp, #4] 24243 .LVL3926: 24244 0274 002A cmp r2, #0 24245 0276 B3D1 bne .L1783 24246 .LVL3927: 24247 .L1741: 24248 0278 1146 mov r1, r2 24249 027a BDE7 b .L1732 24250 .LVL3928: 24251 .L1737: 24252 027c 0346 mov r3, r0 24253 .LVL3929: 24254 027e 67E7 b .L1713 24255 .cfi_endproc 24256 .LFE192: 24258 .section .text.arm_fir_decimate_fast_q31,"ax",%progbits ARM GAS /tmp/ccJrAs6S.s page 942 24259 .align 1 24260 .p2align 2,,3 24261 .global arm_fir_decimate_fast_q31 24262 .syntax unified 24263 .thumb 24264 .thumb_func 24265 .fpu fpv4-sp-d16 24267 arm_fir_decimate_fast_q31: 24268 .LFB193: 24269 .file 48 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * Title: arm_fir_decimate_fast_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * Description: Fast Q31 FIR Decimator 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** @addtogroup FIR_decimate 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** @brief Processing function for the Q31 FIR decimator (fast variant). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** @param[in] S points to an instance of the Q31 FIR decimator structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 943 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** This function is optimized for speed at the expense of fixed-point precision and 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** These intermediate results are added to a 2.30 accumulator. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** Finally, the accumulator is saturated and converted to a 1.31 result. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** The fast version has the same overflow behavior as the standard version and prov 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** In order to avoid overflows completely the input signal must be scaled down by l 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** @remark 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** Refer to \ref arm_fir_decimate_q31() for a slower implementation of this functio 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** Both the slow and the fast versions use the same instance structure. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** Use function \ref arm_fir_decimate_init_q31() to initialize the filter structure 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** void arm_fir_decimate_fast_q31( 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** const arm_fir_decimate_instance_q31 * S, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** const q31_t * pSrc, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** q31_t * pDst, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** uint32_t blockSize) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 24270 .loc 48 67 0 24271 .cfi_startproc 24272 @ args = 0, pretend = 0, frame = 16 24273 @ frame_needed = 0, uses_anonymous_args = 0 24274 .LVL3930: 24275 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 24276 .LCFI140: 24277 .cfi_def_cfa_offset 36 24278 .cfi_offset 4, -36 24279 .cfi_offset 5, -32 24280 .cfi_offset 6, -28 24281 .cfi_offset 7, -24 24282 .cfi_offset 8, -20 24283 .cfi_offset 9, -16 24284 .cfi_offset 10, -12 24285 .cfi_offset 11, -8 24286 .cfi_offset 14, -4 24287 0004 85B0 sub sp, sp, #20 24288 .LCFI141: 24289 .cfi_def_cfa_offset 56 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** q31_t *pState = S->pState; /* State pointer */ 24290 .loc 48 68 0 24291 0006 8568 ldr r5, [r0, #8] 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** q31_t *pStateCur; /* Points to the current sample of the state 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** q31_t *px0; /* Temporary pointer for state buffer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** const q31_t *pb; /* Temporary pointer for coefficient buffer 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** q31_t x0, c0; /* Temporary variables to hold state and coe 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** q63_t acc0; /* Accumulator */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 24292 .loc 48 75 0 24293 0008 4688 ldrh r6, [r0, #2] 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** q31_t *pState = S->pState; /* State pointer */ 24294 .loc 48 68 0 24295 000a 0295 str r5, [sp, #8] 24296 .LVL3931: 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** q31_t *pState = S->pState; /* State pointer */ ARM GAS /tmp/ccJrAs6S.s page 944 24297 .loc 48 67 0 24298 000c 8E46 mov lr, r1 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ 24299 .loc 48 76 0 24300 000e 0178 ldrb r1, [r0] @ zero_extendqisi2 24301 .LVL3932: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 24302 .loc 48 69 0 24303 0010 4068 ldr r0, [r0, #4] 24304 .LVL3933: 24305 .loc 48 76 0 24306 0012 B3FBF1F4 udiv r4, r3, r1 24307 0016 0091 str r1, [sp] 24308 0018 0394 str r4, [sp, #12] 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 24309 .loc 48 69 0 24310 001a 0190 str r0, [sp, #4] 24311 .LVL3934: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** q31_t *px1, *px2, *px3; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** q31_t x1, x2, x3; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** q63_t acc1, acc2, acc3; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** #endif 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* S->pState buffer contains previous frame (numTaps - 1) samples */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* pStateCur points to the location where the new input data should be written */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** pStateCur = S->pState + (numTaps - 1U); 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Loop unrolling: Compute 4 samples at a time */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** blkCnt = outBlockSize >> 2U; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Samples loop unrolled by 4 */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** while (blkCnt > 0U) 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Copy 4 * decimation factor number of new input samples into the state buffer */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** i = S->M * 4; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** do 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** *pStateCur++ = *pSrc++; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** } while (--i); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Set accumulators to zero */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc0 = 0; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc1 = 0; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc2 = 0; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc3 = 0; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Initialize state pointer for all the samples */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** px0 = pState; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** px1 = pState + S->M; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** px2 = pState + 2 * S->M; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** px3 = pState + 3 * S->M; ARM GAS /tmp/ccJrAs6S.s page 945 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Initialize coeff pointer */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** pb = pCoeffs; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Loop unrolling: Compute 4 taps at a time */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt = numTaps >> 2U; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** while (tapCnt > 0U) 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read the b[numTaps-1] coefficient */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** c0 = *(pb++); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read x[n-numTaps-1] sample for acc0 */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x0 = *(px0++); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read x[n-numTaps-1] sample for acc1 */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x1 = *(px1++); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read x[n-numTaps-1] sample for acc2 */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x2 = *(px2++); 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read x[n-numTaps-1] sample for acc3 */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x3 = *(px3++); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Perform the multiply-accumulate */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read the b[numTaps-2] coefficient */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** c0 = *(pb++); 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x0 = *(px0++); 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x1 = *(px1++); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x2 = *(px2++); 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x3 = *(px3++); 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Perform the multiply-accumulate */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read the b[numTaps-3] coefficient */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** c0 = *(pb++); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x0 = *(px0++); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x1 = *(px1++); 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x2 = *(px2++); 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x3 = *(px3++); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Perform the multiply-accumulate */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 946 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read the b[numTaps-4] coefficient */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** c0 = *(pb++); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x0 = *(px0++); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x1 = *(px1++); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x2 = *(px2++); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x3 = *(px3++); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Perform the multiply-accumulate */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Decrement loop counter */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt--; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** } 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Loop unrolling: Compute remaining taps */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt = numTaps % 0x4U; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** while (tapCnt > 0U) 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read coefficients */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** c0 = *(pb++); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Fetch state variables for acc0, acc1, acc2, acc3 */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x0 = *(px0++); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x1 = *(px1++); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x2 = *(px2++); 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x3 = *(px3++); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Perform the multiply-accumulate */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Decrement loop counter */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt--; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** } 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Advance the state pointer by the decimation factor 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * to process the next group of decimation factor number samples */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** pState = pState + S->M * 4; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* The result is in the accumulator, store in the destination buffer. */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** *pDst++ = (q31_t) (acc0 << 1); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** *pDst++ = (q31_t) (acc1 << 1); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** *pDst++ = (q31_t) (acc2 << 1); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** *pDst++ = (q31_t) (acc3 << 1); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Decrement loop counter */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** blkCnt--; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** } 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 947 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Loop unrolling: Compute remaining samples */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** blkCnt = outBlockSize % 0x4U; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** #else 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Initialize blkCnt with number of samples */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** blkCnt = outBlockSize; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** while (blkCnt > 0U) 24312 .loc 48 240 0 24313 001c 002C cmp r4, #0 24314 001e 3ED0 beq .L1792 24315 0020 06F18043 add r3, r6, #1073741824 24316 .LVL3935: 24317 0024 013B subs r3, r3, #1 24318 .LVL3936: 24319 0026 9B00 lsls r3, r3, #2 24320 .LVL3937: 24321 0028 2046 mov r0, r4 24322 .LVL3938: 24323 002a 043B subs r3, r3, #4 24324 002c 05EB030C add ip, r5, r3 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Copy decimation factor number of new input samples into the state buffer */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** i = S->M; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** do 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** *pStateCur++ = *pSrc++; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** } while (--i); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Set accumulator to zero */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc0 = 0; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Initialize state pointer */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** px0 = pState; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Initialize coeff pointer */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** pb = pCoeffs; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Loop unrolling: Compute 4 taps at a time */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt = numTaps >> 2U; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** while (tapCnt > 0U) 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read the b[numTaps-1] coefficient */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** c0 = *pb++; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read x[n-numTaps-1] sample */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x0 = *px0++; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Perform the multiply-accumulate */ ARM GAS /tmp/ccJrAs6S.s page 948 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read the b[numTaps-2] coefficient */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** c0 = *pb++; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read x[n-numTaps-2] sample */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x0 = *px0++; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Perform the multiply-accumulate */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read the b[numTaps-3] coefficient */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** c0 = *pb++; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read x[n-numTaps-3] sample */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x0 = *px0++; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Perform the multiply-accumulate */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read the b[numTaps-4] coefficient */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** c0 = *pb++; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read x[n-numTaps-4] sample */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x0 = *px0++; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Perform the multiply-accumulate */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Decrement loop counter */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt--; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** } 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Loop unrolling: Compute remaining taps */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt = numTaps % 0x4U; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** #else 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Initialize tapCnt with number of taps */ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt = numTaps; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** while (tapCnt > 0U) 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Read coefficients */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** c0 = *pb++; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Fetch 1 state variable */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** x0 = *px0++; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Perform the multiply-accumulate */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Decrement loop counter */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt--; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** } ARM GAS /tmp/ccJrAs6S.s page 949 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Advance the state pointer by the decimation factor 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** * to process the next group of decimation factor number samples */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** pState = pState + S->M; 24325 .loc 48 334 0 24326 0030 8F00 lsls r7, r1, #2 24327 0032 8046 mov r8, r0 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 24328 .loc 48 68 0 24329 0034 A946 mov r9, r5 24330 .LVL3939: 24331 .L1789: 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 24332 .loc 48 243 0 24333 0036 009B ldr r3, [sp] 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 24334 .loc 48 68 0 24335 0038 6046 mov r0, ip 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 24336 .loc 48 243 0 24337 003a 7146 mov r1, lr 24338 .LVL3940: 24339 .L1786: 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 24340 .loc 48 247 0 discriminator 1 24341 003c 51F8044B ldr r4, [r1], #4 24342 .LVL3941: 24343 0040 40F8044F str r4, [r0, #4]! 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 24344 .loc 48 249 0 discriminator 1 24345 0044 013B subs r3, r3, #1 24346 .LVL3942: 24347 0046 F9D1 bne .L1786 24348 0048 BE44 add lr, lr, r7 24349 .LVL3943: 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 24350 .loc 48 317 0 24351 004a 3346 mov r3, r6 24352 .LVL3944: 24353 004c 7EB1 cbz r6, .L1787 24354 .LVL3945: 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 24355 .loc 48 258 0 24356 004e 019D ldr r5, [sp, #4] 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 24357 .loc 48 317 0 24358 0050 4C46 mov r4, r9 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 24359 .loc 48 252 0 24360 0052 4FF0000A mov r10, #0 24361 .LVL3946: 24362 .L1788: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 24363 .loc 48 326 0 24364 0056 5146 mov r1, r10 24365 0058 54F804BB ldr fp, [r4], #4 24366 .LVL3947: ARM GAS /tmp/ccJrAs6S.s page 950 24367 005c 55F804AB ldr r10, [r5], #4 24368 .LVL3948: 24369 0060 0020 movs r0, #0 24370 0062 CAFB0B01 smlal r0, r1, r10, fp 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 24371 .loc 48 317 0 24372 0066 013B subs r3, r3, #1 24373 .LVL3949: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 24374 .loc 48 326 0 24375 0068 8A46 mov r10, r1 24376 .LVL3950: 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 24377 .loc 48 317 0 24378 006a F4D1 bne .L1788 24379 006c 4B00 lsls r3, r1, #1 24380 .LVL3951: 24381 .L1787: 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 24382 .loc 48 240 0 24383 006e B8F10108 subs r8, r8, #1 24384 .LVL3952: 24385 .loc 48 334 0 24386 0072 B944 add r9, r9, r7 24387 .LVL3953: 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* The result is in the accumulator, store in the destination buffer. */ 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** *pDst++ = (q31_t) (acc0 << 1); 24388 .loc 48 337 0 24389 0074 42F8043B str r3, [r2], #4 24390 .LVL3954: 24391 0078 BC44 add ip, ip, r7 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 24392 .loc 48 240 0 24393 007a DCD1 bne .L1789 24394 007c DDE90223 ldrd r2, r3, [sp, #8] 24395 .LVL3955: 24396 0080 03FB0727 mla r7, r3, r7, r2 24397 .LVL3956: 24398 .L1785: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Decrement loop counter */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** blkCnt--; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** } 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Processing is complete. 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** Now copy the last numTaps - 1 samples to the satrt of the state buffer. 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** This prepares the state buffer for the next function call. */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Points to the start of the state buffer */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** pStateCur = S->pState; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Loop unrolling: Compute 4 taps at a time */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt = (numTaps - 1U) >> 2U; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 951 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Copy data */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** while (tapCnt > 0U) 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** *pStateCur++ = *pState++; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** *pStateCur++ = *pState++; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** *pStateCur++ = *pState++; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** *pStateCur++ = *pState++; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Decrement loop counter */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt--; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** } 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Loop unrolling: Compute remaining taps */ 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt = (numTaps - 1U) % 0x04U; 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** #else 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Initialize tapCnt with number of taps */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt = (numTaps - 1U); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Copy data */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** while (tapCnt > 0U) 24399 .loc 48 378 0 24400 0084 013E subs r6, r6, #1 24401 .LVL3957: 24402 0086 07D0 beq .L1784 24403 0088 029B ldr r3, [sp, #8] 24404 008a 043B subs r3, r3, #4 24405 .LVL3958: 24406 .L1791: 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** *pStateCur++ = *pState++; 24407 .loc 48 380 0 24408 008c 57F8042B ldr r2, [r7], #4 24409 .LVL3959: 24410 0090 43F8042F str r2, [r3, #4]! 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** { 24411 .loc 48 378 0 24412 0094 013E subs r6, r6, #1 24413 .LVL3960: 24414 0096 F9D1 bne .L1791 24415 .LVL3961: 24416 .L1784: 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** /* Decrement loop counter */ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** tapCnt--; 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** } 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c **** } 24417 .loc 48 386 0 24418 0098 05B0 add sp, sp, #20 24419 .LCFI142: 24420 .cfi_remember_state 24421 .cfi_def_cfa_offset 36 24422 @ sp needed ARM GAS /tmp/ccJrAs6S.s page 952 24423 009a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 24424 .LVL3962: 24425 .L1792: 24426 .LCFI143: 24427 .cfi_restore_state 24428 009e 2F46 mov r7, r5 24429 00a0 F0E7 b .L1785 24430 .cfi_endproc 24431 .LFE193: 24433 00a2 00BF .section .text.arm_fir_decimate_init_f32,"ax",%progbits 24434 .align 1 24435 .p2align 2,,3 24436 .global arm_fir_decimate_init_f32 24437 .syntax unified 24438 .thumb 24439 .thumb_func 24440 .fpu fpv4-sp-d16 24442 arm_fir_decimate_init_f32: 24443 .LFB194: 24444 .file 49 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_i 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * Title: arm_fir_decimate_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * Description: Floating-point FIR Decimator initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** @addtogroup FIR_decimate 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** @{ ARM GAS /tmp/ccJrAs6S.s page 953 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** @brief Initialization function for the floating-point FIR decimator. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** @param[in,out] S points to an instance of the floating-point FIR decimator structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** @param[in] numTaps number of coefficients in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** @param[in] M decimation factor 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** @param[in] pCoeffs points to the filter coefficients 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** @param[in] pState points to the state buffer 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** @param[in] blockSize number of input samples to process per call 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** @return execution status 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of pCoeffs points to the array of filter coefficients stored in time r 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c ****       {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** pState points to the array of state variables. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** pState is of length numTaps+blockSize-1 words where M is the decimation factor. 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** arm_status arm_fir_decimate_init_f32( 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** arm_fir_decimate_instance_f32 * S, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** uint16_t numTaps, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** uint8_t M, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** const float32_t * pCoeffs, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** float32_t * pState, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** uint32_t blockSize) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** { 24445 .loc 49 70 0 24446 .cfi_startproc 24447 @ args = 8, pretend = 0, frame = 0 24448 @ frame_needed = 0, uses_anonymous_args = 0 24449 .LVL3963: 24450 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 24451 .LCFI144: 24452 .cfi_def_cfa_offset 24 24453 .cfi_offset 3, -24 24454 .cfi_offset 4, -20 24455 .cfi_offset 5, -16 24456 .cfi_offset 6, -12 24457 .cfi_offset 7, -8 24458 .cfi_offset 14, -4 24459 .loc 49 70 0 24460 0002 DDE9067C ldrd r7, ip, [sp, #24] 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** arm_status status; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** /* The size of the input block must be a multiple of the decimation factor */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** if ((blockSize % M) != 0U) 24461 .loc 49 74 0 24462 0006 BCFBF2F4 udiv r4, ip, r2 24463 000a 02FB14C4 mls r4, r2, r4, ip 24464 000e 84B9 cbnz r4, .L1804 ARM GAS /tmp/ccJrAs6S.s page 954 24465 0010 1646 mov r6, r2 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** { 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** /* Set status as ARM_MATH_LENGTH_ERROR */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** status = ARM_MATH_LENGTH_ERROR; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** } 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** else 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** /* Assign filter taps */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** S->numTaps = numTaps; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** /* Assign coefficient pointer */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** S->pCoeffs = pCoeffs; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t)); 24466 .loc 49 88 0 24467 0012 01F18042 add r2, r1, #1073741824 24468 .LVL3964: 24469 0016 013A subs r2, r2, #1 24470 0018 0546 mov r5, r0 24471 001a 6244 add r2, r2, ip 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 24472 .loc 49 82 0 24473 001c 4180 strh r1, [r0, #2] @ movhi 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 24474 .loc 49 85 0 24475 001e 4360 str r3, [r0, #4] 24476 .loc 49 88 0 24477 0020 9200 lsls r2, r2, #2 24478 0022 2146 mov r1, r4 24479 .LVL3965: 24480 0024 3846 mov r0, r7 24481 .LVL3966: 24482 0026 FFF7FEFF bl memset 24483 .LVL3967: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** /* Assign state pointer */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** S->pState = pState; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** /* Assign Decimation Factor */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** S->M = M; 24484 .loc 49 94 0 24485 002a 2E70 strb r6, [r5] 24486 .LVL3968: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 24487 .loc 49 91 0 24488 002c AF60 str r7, [r5, #8] 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** status = ARM_MATH_SUCCESS; 24489 .loc 49 96 0 24490 002e 2046 mov r0, r4 24491 .LVL3969: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** } 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** return (status); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** } ARM GAS /tmp/ccJrAs6S.s page 955 24492 .loc 49 101 0 24493 0030 F8BD pop {r3, r4, r5, r6, r7, pc} 24494 .LVL3970: 24495 .L1804: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c **** } 24496 .loc 49 77 0 24497 0032 6FF00100 mvn r0, #1 24498 .LVL3971: 24499 .loc 49 101 0 24500 0036 F8BD pop {r3, r4, r5, r6, r7, pc} 24501 .cfi_endproc 24502 .LFE194: 24504 .section .text.arm_fir_decimate_init_q15,"ax",%progbits 24505 .align 1 24506 .p2align 2,,3 24507 .global arm_fir_decimate_init_q15 24508 .syntax unified 24509 .thumb 24510 .thumb_func 24511 .fpu fpv4-sp-d16 24513 arm_fir_decimate_init_q15: 24514 .LFB195: 24515 .file 50 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_i 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * Title: arm_fir_decimate_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * Description: Initialization function for the Q15 FIR Decimator 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 956 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** @addtogroup FIR_decimate 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** @brief Initialization function for the Q15 FIR decimator. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** @param[in,out] S points to an instance of the Q15 FIR decimator structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** @param[in] numTaps number of coefficients in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** @param[in] M decimation factor 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** @param[in] pCoeffs points to the filter coefficients 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** @param[in] pState points to the state buffer 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** @param[in] blockSize number of input samples to process 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** @return execution status 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of pCoeffs points to the array of filter coefficients stored in time r 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c ****       {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** pState points to the array of state variables. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** pState is of length numTaps+blockSize-1 words where arm_fir_decimate_q15(). 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** M is the decimation factor. 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** arm_status arm_fir_decimate_init_q15( 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** arm_fir_decimate_instance_q15 * S, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** uint16_t numTaps, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** uint8_t M, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** const q15_t * pCoeffs, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** q15_t * pState, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** uint32_t blockSize) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** { 24516 .loc 50 71 0 24517 .cfi_startproc 24518 @ args = 8, pretend = 0, frame = 0 24519 @ frame_needed = 0, uses_anonymous_args = 0 24520 .LVL3972: 24521 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 24522 .LCFI145: 24523 .cfi_def_cfa_offset 24 24524 .cfi_offset 3, -24 24525 .cfi_offset 4, -20 24526 .cfi_offset 5, -16 24527 .cfi_offset 6, -12 24528 .cfi_offset 7, -8 24529 .cfi_offset 14, -4 24530 .loc 50 71 0 24531 0002 DDE9067C ldrd r7, ip, [sp, #24] 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** arm_status status; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** /* The size of the input block must be a multiple of the decimation factor */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** if ((blockSize % M) != 0U) ARM GAS /tmp/ccJrAs6S.s page 957 24532 .loc 50 75 0 24533 0006 BCFBF2F4 udiv r4, ip, r2 24534 000a 02FB14C4 mls r4, r2, r4, ip 24535 000e 84B9 cbnz r4, .L1808 24536 0010 1646 mov r6, r2 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** { 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** /* Set status as ARM_MATH_LENGTH_ERROR */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** status = ARM_MATH_LENGTH_ERROR; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** } 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** else 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** { 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** /* Assign filter taps */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** S->numTaps = numTaps; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** /* Assign coefficient pointer */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** S->pCoeffs = pCoeffs; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t)); 24537 .loc 50 89 0 24538 0012 01F10042 add r2, r1, #-2147483648 24539 .LVL3973: 24540 0016 013A subs r2, r2, #1 24541 0018 0546 mov r5, r0 24542 001a 6244 add r2, r2, ip 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 24543 .loc 50 83 0 24544 001c 4180 strh r1, [r0, #2] @ movhi 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 24545 .loc 50 86 0 24546 001e 4360 str r3, [r0, #4] 24547 .loc 50 89 0 24548 0020 5200 lsls r2, r2, #1 24549 0022 2146 mov r1, r4 24550 .LVL3974: 24551 0024 3846 mov r0, r7 24552 .LVL3975: 24553 0026 FFF7FEFF bl memset 24554 .LVL3976: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** /* Assign state pointer */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** S->pState = pState; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** /* Assign Decimation Factor */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** S->M = M; 24555 .loc 50 95 0 24556 002a 2E70 strb r6, [r5] 24557 .LVL3977: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 24558 .loc 50 92 0 24559 002c AF60 str r7, [r5, #8] 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** status = ARM_MATH_SUCCESS; 24560 .loc 50 97 0 24561 002e 2046 mov r0, r4 24562 .LVL3978: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** } ARM GAS /tmp/ccJrAs6S.s page 958 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** return (status); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** } 24563 .loc 50 102 0 24564 0030 F8BD pop {r3, r4, r5, r6, r7, pc} 24565 .LVL3979: 24566 .L1808: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c **** } 24567 .loc 50 78 0 24568 0032 6FF00100 mvn r0, #1 24569 .LVL3980: 24570 .loc 50 102 0 24571 0036 F8BD pop {r3, r4, r5, r6, r7, pc} 24572 .cfi_endproc 24573 .LFE195: 24575 .section .text.arm_fir_decimate_init_q31,"ax",%progbits 24576 .align 1 24577 .p2align 2,,3 24578 .global arm_fir_decimate_init_q31 24579 .syntax unified 24580 .thumb 24581 .thumb_func 24582 .fpu fpv4-sp-d16 24584 arm_fir_decimate_init_q31: 24585 .LFB196: 24586 .file 51 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_i 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * Title: arm_fir_decimate_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * Description: Initialization function for Q31 FIR Decimation filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 959 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** @addtogroup FIR_decimate 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** @brief Initialization function for the Q31 FIR decimator. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** @param[in,out] S points to an instance of the Q31 FIR decimator structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** @param[in] numTaps number of coefficients in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** @param[in] M decimation factor 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** @param[in] pCoeffs points to the filter coefficients 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** @param[in] pState points to the state buffer 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** @param[in] blockSize number of input samples to process 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** @return execution status 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of pCoeffs points to the array of filter coefficients stored in time r 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c ****       {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** pState points to the array of state variables. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** pState is of length numTaps+blockSize-1 words where M is the decimation factor. 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** arm_status arm_fir_decimate_init_q31( 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** arm_fir_decimate_instance_q31 * S, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** uint16_t numTaps, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** uint8_t M, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** const q31_t * pCoeffs, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** q31_t * pState, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** uint32_t blockSize) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** { 24587 .loc 51 70 0 24588 .cfi_startproc 24589 @ args = 8, pretend = 0, frame = 0 24590 @ frame_needed = 0, uses_anonymous_args = 0 24591 .LVL3981: 24592 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 24593 .LCFI146: 24594 .cfi_def_cfa_offset 24 24595 .cfi_offset 3, -24 24596 .cfi_offset 4, -20 24597 .cfi_offset 5, -16 24598 .cfi_offset 6, -12 24599 .cfi_offset 7, -8 24600 .cfi_offset 14, -4 24601 .loc 51 70 0 24602 0002 DDE9067C ldrd r7, ip, [sp, #24] 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** arm_status status; ARM GAS /tmp/ccJrAs6S.s page 960 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** /* The size of the input block must be a multiple of the decimation factor */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** if ((blockSize % M) != 0U) 24603 .loc 51 74 0 24604 0006 BCFBF2F4 udiv r4, ip, r2 24605 000a 02FB14C4 mls r4, r2, r4, ip 24606 000e 84B9 cbnz r4, .L1812 24607 0010 1646 mov r6, r2 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** { 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** /* Set status as ARM_MATH_LENGTH_ERROR */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** status = ARM_MATH_LENGTH_ERROR; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** } 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** else 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** /* Assign filter taps */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** S->numTaps = numTaps; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** /* Assign coefficient pointer */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** S->pCoeffs = pCoeffs; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t)); 24608 .loc 51 88 0 24609 0012 01F18042 add r2, r1, #1073741824 24610 .LVL3982: 24611 0016 013A subs r2, r2, #1 24612 0018 0546 mov r5, r0 24613 001a 6244 add r2, r2, ip 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 24614 .loc 51 82 0 24615 001c 4180 strh r1, [r0, #2] @ movhi 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 24616 .loc 51 85 0 24617 001e 4360 str r3, [r0, #4] 24618 .loc 51 88 0 24619 0020 9200 lsls r2, r2, #2 24620 0022 2146 mov r1, r4 24621 .LVL3983: 24622 0024 3846 mov r0, r7 24623 .LVL3984: 24624 0026 FFF7FEFF bl memset 24625 .LVL3985: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** /* Assign state pointer */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** S->pState = pState; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** /* Assign Decimation Factor */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** S->M = M; 24626 .loc 51 94 0 24627 002a 2E70 strb r6, [r5] 24628 .LVL3986: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 24629 .loc 51 91 0 24630 002c AF60 str r7, [r5, #8] 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** status = ARM_MATH_SUCCESS; 24631 .loc 51 96 0 ARM GAS /tmp/ccJrAs6S.s page 961 24632 002e 2046 mov r0, r4 24633 .LVL3987: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** } 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** return (status); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** } 24634 .loc 51 101 0 24635 0030 F8BD pop {r3, r4, r5, r6, r7, pc} 24636 .LVL3988: 24637 .L1812: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c **** } 24638 .loc 51 77 0 24639 0032 6FF00100 mvn r0, #1 24640 .LVL3989: 24641 .loc 51 101 0 24642 0036 F8BD pop {r3, r4, r5, r6, r7, pc} 24643 .cfi_endproc 24644 .LFE196: 24646 .section .text.arm_fir_decimate_q15,"ax",%progbits 24647 .align 1 24648 .p2align 2,,3 24649 .global arm_fir_decimate_q15 24650 .syntax unified 24651 .thumb 24652 .thumb_func 24653 .fpu fpv4-sp-d16 24655 arm_fir_decimate_q15: 24656 .LFB197: 24657 .file 52 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Title: arm_fir_decimate_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Description: Q15 FIR Decimator 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ ARM GAS /tmp/ccJrAs6S.s page 962 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** @addtogroup FIR_decimate 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** @brief Processing function for the Q15 FIR decimator. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** @param[in] S points to an instance of the Q15 FIR decimator structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** @param[in] blockSize number of input samples to process per call 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** The function is implemented using a 64-bit internal accumulator. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** Both coefficients and state variables are represented in 1.15 format and multipl 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 f 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** There is no risk of internal overflow with this approach and the full precision 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** After all additions have been performed, the accumulator is truncated to 34.15 f 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** Lastly, the accumulator is saturated to yield a result in 1.15 format. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** @remark 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** Refer to \ref arm_fir_decimate_fast_q15() for a faster but less precise implemen 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #if defined(ARM_MATH_MVEI) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #include "arm_helium_utils.h" 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** void arm_fir_decimate_q15( 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** const arm_fir_decimate_instance_q15 * S, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** const q15_t * pSrc, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t * pDst, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** uint32_t blockSize) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t *pState = S->pState; /* State pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** const q15_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** uint32_t blkCntN4; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** const q15_t *px0, *px1, *px2, *px3; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q63_t acc0v, acc1v, acc2v, acc3v; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15x8_t x0v, x1v, x2v, x3v; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15x8_t c0v; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * S->pState buffer contains previous frame (numTaps - 1) samples 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * pStateCurnt points to the location where the new input data should be written ARM GAS /tmp/ccJrAs6S.s page 963 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pStateCurnt = S->pState + (numTaps - 1U); 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Total number of output samples to be computed 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** blkCnt = outBlockSize / 4; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** blkCntN4 = outBlockSize - (4 * blkCnt); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (blkCnt > 0U) 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Need extra temp variables as 4 * S->M is not necessarily a multiple of 8 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * and cause final tail predicated post incremented pointers to jump ahead 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** const q15_t *pSrcTmp = pSrc; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t *pStateCurntTmp = pStateCurnt; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Copy 4 * decimation factor number of new input samples into the state buffer 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** i = (4 * S->M) >> 3; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (i > 0U) 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** vstrhq_s16(pStateCurntTmp, vldrhq_s16(pSrcTmp)); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pSrcTmp += 8; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pStateCurntTmp += 8; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** i--; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** i = (4 * S->M) & 7; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** if (i > 0U) 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** mve_pred16_t p0 = vctp16q(i); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** vstrhq_p_s16(pStateCurntTmp, vldrhq_s16(pSrcTmp), p0); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pSrc += (4 * S->M); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pStateCurnt += (4 * S->M); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Clear all accumulators 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc0v = 0LL; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc1v = 0LL; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc2v = 0LL; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc3v = 0LL; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Initialize state pointer for all the samples 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px0 = pState; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px1 = pState + S->M; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px2 = pState + 2 * S->M; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px3 = pState + 3 * S->M; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Initialize coeff. pointer 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pb = pCoeffs; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 964 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt = numTaps >> 3; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Loop over the number of taps. Unroll by a factor of 4. 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Repeat until we've computed numTaps-4 coefficients. 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (tapCnt > 0U) 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Read the b[numTaps-1] coefficient 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** c0v = vldrhq_s16(pb); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pb += 8; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Read x[n-numTaps-1] sample for acc0 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x0v = vld1q(px0); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x1v = vld1q(px1); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x2v = vld1q(px2); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x3v = vld1q(px3); 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px0 += 8; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px1 += 8; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px2 += 8; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px3 += 8; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc0v = vmlaldavaq(acc0v, x0v, c0v); 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc1v = vmlaldavaq(acc1v, x1v, c0v); 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc2v = vmlaldavaq(acc2v, x2v, c0v); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc3v = vmlaldavaq(acc3v, x3v, c0v); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Decrement the loop counter 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt--; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * If the filter length is not a multiple of 4, compute the remaining filter taps 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * should be tail predicated 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt = numTaps & 7; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** if (tapCnt > 0U) 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** mve_pred16_t p0 = vctp16q(tapCnt); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Read the b[numTaps-1] coefficient 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** c0v = vldrhq_z_s16(pb, p0); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pb += 8; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Read x[n-numTaps-1] sample for acc0 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x0v = vld1q(px0); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x1v = vld1q(px1); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x2v = vld1q(px2); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x3v = vld1q(px3); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px0 += 8; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px1 += 8; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px2 += 8; ARM GAS /tmp/ccJrAs6S.s page 965 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px3 += 8; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc0v = vmlaldavaq(acc0v, x0v, c0v); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc1v = vmlaldavaq(acc1v, x1v, c0v); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc2v = vmlaldavaq(acc2v, x2v, c0v); 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc3v = vmlaldavaq(acc3v, x3v, c0v); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc0v = asrl(acc0v, 15); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc1v = asrl(acc1v, 15); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc2v = asrl(acc2v, 15); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc3v = asrl(acc3v, 15); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * store in the destination buffer. 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pDst++ = (q15_t) __SSAT((q31_t) acc0v, 16); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pDst++ = (q15_t) __SSAT((q31_t) acc1v, 16);; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pDst++ = (q15_t) __SSAT((q31_t) acc2v, 16);; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pDst++ = (q15_t) __SSAT((q31_t) acc3v, 16);; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Advance the state pointer by the decimation factor 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * to process the next group of decimation factor number samples 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pState = pState + 4 * S->M; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Decrement the loop counter 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** blkCnt--; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (blkCntN4 > 0U) 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Copy decimation factor number of new input samples into the state buffer 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** i = S->M; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** do 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pStateCurnt++ = *pSrc++; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (--i); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Set accumulator to zero 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc0v = 0LL; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Initialize state pointer 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px = pState; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Initialize coeff. pointer 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pb = pCoeffs; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt = numTaps >> 3; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (tapCnt > 0U) ARM GAS /tmp/ccJrAs6S.s page 966 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** c0v = vldrhq_s16(pb); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x0v = vldrhq_s16(px); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pb += 8; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px += 8; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc0v = vmlaldavaq(acc0v, x0v, c0v); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Decrement the loop counter 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt--; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt = numTaps & 7; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** if (tapCnt > 0U) 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** mve_pred16_t p0 = vctp16q(tapCnt); 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** c0v = vldrhq_z_s16(pb, p0); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x0v = vldrhq_z_s16(px, p0); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc0v = vmlaldavaq_p(acc0v, x0v, c0v, p0); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc0v = asrl(acc0v, 15); 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Advance the state pointer by the decimation factor 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * to process the next group of decimation factor number samples 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pState = pState + S->M; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * The result is in the accumulator, store in the destination buffer. 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pDst++ = (q15_t) __SSAT((q31_t) acc0v, 16); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Decrement the loop counter 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** blkCntN4--; 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Processing is complete. 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * Now copy the last numTaps - 1 samples to the start of the state buffer. 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * This prepares the state buffer for the next function call. 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** */ 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pStateCurnt = S->pState; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** blkCnt = (numTaps - 1) >> 3; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (blkCnt > 0U) 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** vstrhq_s16(pStateCurnt, vldrhq_s16(pState)); 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pState += 8; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pStateCurnt += 8; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** blkCnt--; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** blkCnt = (numTaps - 1) & 7; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** if (blkCnt > 0U) 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); ARM GAS /tmp/ccJrAs6S.s page 967 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** vstrhq_p_s16(pStateCurnt, vldrhq_s16(pState), p0); 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #else 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #if defined (ARM_MATH_DSP) 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** void arm_fir_decimate_q15( 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** const arm_fir_decimate_instance_q15 * S, 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** const q15_t * pSrc, 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t * pDst, 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** uint32_t blockSize) 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 24658 .loc 52 324 0 24659 .cfi_startproc 24660 @ args = 0, pretend = 0, frame = 40 24661 @ frame_needed = 0, uses_anonymous_args = 0 24662 .LVL3990: 24663 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 24664 .LCFI147: 24665 .cfi_def_cfa_offset 36 24666 .cfi_offset 4, -36 24667 .cfi_offset 5, -32 24668 .cfi_offset 6, -28 24669 .cfi_offset 7, -24 24670 .cfi_offset 8, -20 24671 .cfi_offset 9, -16 24672 .cfi_offset 10, -12 24673 .cfi_offset 11, -8 24674 .cfi_offset 14, -4 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t *pState = S->pState; /* State pointer */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t *pStateCur; /* Points to the current sample of the state 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t *px; /* Temporary pointer for state buffer */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** const q15_t *pb; /* Temporary pointer for coefficient buffer 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q31_t x0, x1, c0; /* Temporary variables to hold state and coe 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q63_t sum0; /* Accumulators */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q63_t acc0, acc1; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t *px0, *px1; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** uint32_t blkCntN3; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** uint32_t numTaps = S->numTaps; /* Number of taps */ 24675 .loc 52 335 0 24676 0004 4688 ldrh r6, [r0, #2] 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t *pState = S->pState; /* State pointer */ 24677 .loc 52 325 0 24678 0006 8568 ldr r5, [r0, #8] 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ 24679 .loc 52 336 0 24680 0008 0778 ldrb r7, [r0] @ zero_extendqisi2 24681 000a B3FBF7F3 udiv r3, r3, r7 24682 .LVL3991: 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t *pState = S->pState; /* State pointer */ 24683 .loc 52 324 0 24684 000e 8BB0 sub sp, sp, #44 24685 .LCFI148: 24686 .cfi_def_cfa_offset 80 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) ARM GAS /tmp/ccJrAs6S.s page 968 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q31_t c1; /* Temporary variables to hold state and coe 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #endif 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* S->pState buffer contains previous frame (numTaps - 1) samples */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* pStateCur points to the location where the new input data should be written */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pStateCur = S->pState + (numTaps - 1U); 24687 .loc 52 344 0 24688 0010 06F10049 add r9, r6, #-2147483648 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t *pState = S->pState; /* State pointer */ 24689 .loc 52 324 0 24690 0014 0090 str r0, [sp] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t *pStateCur; /* Points to the current sample of the state 24691 .loc 52 326 0 24692 0016 4068 ldr r0, [r0, #4] 24693 .LVL3992: 24694 0018 0590 str r0, [sp, #20] 24695 .loc 52 344 0 24696 001a 09F1FF39 add r9, r9, #-1 24697 001e 03F00100 and r0, r3, #1 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Total number of output samples to be computed */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** blkCnt = outBlockSize / 2; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** blkCntN3 = outBlockSize - (2 * blkCnt); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (blkCnt > 0U) 24698 .loc 52 350 0 24699 0022 5B08 lsrs r3, r3, #1 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ 24700 .loc 52 335 0 24701 0024 0496 str r6, [sp, #16] 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 24702 .loc 52 325 0 24703 0026 0795 str r5, [sp, #28] 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** q15_t *pState = S->pState; /* State pointer */ 24704 .loc 52 324 0 24705 0028 0692 str r2, [sp, #24] 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24706 .loc 52 344 0 24707 002a 05EB4909 add r9, r5, r9, lsl #1 24708 002e 0890 str r0, [sp, #32] 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 24709 .loc 52 325 0 24710 0030 AA46 mov r10, r5 24711 .LVL3993: 24712 .loc 52 350 0 24713 0032 0993 str r3, [sp, #36] 24714 0034 00F09180 beq .L1815 24715 0038 0432 adds r2, r2, #4 24716 .LVL3994: 24717 003a CDE90132 strd r3, r2, [sp, #4] 24718 .LVL3995: 24719 .L1825: 24720 003e 09F10402 add r2, r9, #4 24721 0042 0B1D adds r3, r1, #4 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Copy 2 * decimation factor number of new input samples into the state buffer */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** i = S->M * 2; ARM GAS /tmp/ccJrAs6S.s page 969 24722 .loc 52 353 0 24723 0044 0220 movs r0, #2 24724 0046 9945 cmp r9, r3 24725 0048 38BF it cc 24726 004a 9142 cmpcc r1, r2 24727 004c 0446 mov r4, r0 @ movhi 24728 004e 17FB00F6 smulbb r6, r7, r0 24729 .LVL3996: 24730 0052 72D3 bcc .L1816 24731 0054 0D2E cmp r6, #13 24732 0056 70D9 bls .L1816 24733 0058 4FF0FF30 mov r0, #-1 24734 005c C1F34003 ubfx r3, r1, #1, #1 24735 0060 14FB0707 smlabb r7, r4, r7, r0 24736 0064 002B cmp r3, #0 24737 0066 64D0 beq .L1839 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** do 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pStateCur++ = *pSrc++; 24738 .loc 52 357 0 24739 0068 B1F90020 ldrsh r2, [r1] 24740 006c A9F80020 strh r2, [r9] @ movhi 24741 0070 01F10208 add r8, r1, #2 24742 .LVL3997: 24743 0074 09F1020E add lr, r9, #2 24744 .LVL3998: 24745 .L1817: 24746 0078 A6EB030C sub ip, r6, r3 24747 007c ACF10200 sub r0, ip, #2 24748 0080 5B00 lsls r3, r3, #1 24749 0082 4008 lsrs r0, r0, #1 24750 0084 CC18 adds r4, r1, r3 24751 0086 0130 adds r0, r0, #1 24752 0088 4B44 add r3, r3, r9 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24753 .loc 52 353 0 24754 008a 0022 movs r2, #0 24755 .LVL3999: 24756 .L1818: 24757 008c 0132 adds r2, r2, #1 24758 .loc 52 357 0 discriminator 1 24759 008e 54F8045B ldr r5, [r4], #4 24760 0092 43F8045B str r5, [r3], #4 @ unaligned 24761 0096 9042 cmp r0, r2 24762 0098 F8D8 bhi .L1818 24763 009a 4200 lsls r2, r0, #1 24764 009c 8300 lsls r3, r0, #2 24765 009e 9445 cmp ip, r2 24766 00a0 08EB0304 add r4, r8, r3 24767 00a4 A7EB0207 sub r7, r7, r2 24768 00a8 7344 add r3, r3, lr 24769 00aa 08D0 beq .L1821 24770 .LVL4000: 24771 .loc 52 357 0 is_stmt 0 24772 00ac 38F92020 ldrsh r2, [r8, r0, lsl #2] 24773 00b0 2EF82020 strh r2, [lr, r0, lsl #2] @ movhi ARM GAS /tmp/ccJrAs6S.s page 970 24774 .LVL4001: 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } while (--i); 24775 .loc 52 359 0 is_stmt 1 24776 00b4 012F cmp r7, #1 24777 00b6 02D0 beq .L1821 24778 .LVL4002: 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24779 .loc 52 357 0 24780 00b8 B4F90220 ldrsh r2, [r4, #2] 24781 00bc 5A80 strh r2, [r3, #2] @ movhi 24782 .LVL4003: 24783 .L1821: 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Set accumulator to zero */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc0 = 0; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc1 = 0; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Initialize state pointer for all the samples */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px0 = pState; 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px1 = pState + S->M; 24784 .loc 52 367 0 24785 00be 009B ldr r3, [sp] 24786 00c0 7600 lsls r6, r6, #1 24787 00c2 1B78 ldrb r3, [r3] @ zero_extendqisi2 24788 00c4 0393 str r3, [sp, #12] 24789 00c6 B144 add r9, r9, r6 24790 00c8 3144 add r1, r1, r6 24791 .LVL4004: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Initialize coeff pointer */ 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pb = pCoeffs; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Loop unrolling: Compute 4 taps at a time */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt = numTaps >> 2U; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (tapCnt > 0U) 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Read the b[numTaps-1] and b[numTaps-2] coefficients */ 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** c0 = read_q15x2_ia ((q15_t **) &pb); 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x0 = read_q15x2_ia (&px0); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x1 = read_q15x2_ia (&px1); 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Perform the multiply-accumulate */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc0 = __SMLALD(x0, c0, acc0); 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc1 = __SMLALD(x1, c0, acc1); 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Read the b[numTaps-3] and b[numTaps-4] coefficient */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** c0 = read_q15x2_ia ((q15_t **) &pb); 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */ 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x0 = read_q15x2_ia (&px0); 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x1 = read_q15x2_ia (&px1); ARM GAS /tmp/ccJrAs6S.s page 971 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Perform the multiply-accumulate */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc0 = __SMLALD(x0, c0, acc0); 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc1 = __SMLALD(x1, c0, acc1); 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Decrement loop counter */ 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt--; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Loop unrolling: Compute remaining taps */ 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt = numTaps % 0x4U; 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #else 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Initialize tapCnt with number of taps */ 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt = numTaps; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (tapCnt > 0U) 24792 .loc 52 415 0 24793 00ca 049E ldr r6, [sp, #16] 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24794 .loc 52 367 0 24795 00cc 0AEB430C add ip, r10, r3, lsl #1 24796 .LVL4005: 24797 .loc 52 415 0 24798 00d0 002E cmp r6, #0 24799 00d2 00F0C580 beq .L1840 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24800 .loc 52 363 0 24801 00d6 0022 movs r2, #0 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24802 .loc 52 370 0 24803 00d8 DDF814E0 ldr lr, [sp, #20] 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24804 .loc 52 363 0 24805 00dc 1346 mov r3, r2 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc1 = 0; 24806 .loc 52 362 0 24807 00de 1046 mov r0, r2 24808 00e0 1446 mov r4, r2 24809 .loc 52 415 0 24810 00e2 D046 mov r8, r10 24811 .LVL4006: 24812 .L1823: 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Read coefficients */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** c0 = *pb++; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Fetch state variables for acc0, acc1 */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x0 = *px0++; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x1 = *px1++; 24813 .loc 52 422 0 24814 00e4 3CF9027B ldrsh r7, [ip], #2 24815 .LVL4007: 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 972 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Perform the multiply-accumulate */ 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc0 = __SMLALD(x0, c0, acc0); 24816 .loc 52 425 0 24817 00e8 38F902BB ldrsh fp, [r8], #2 24818 .LVL4008: 24819 00ec 3EF9025B ldrsh r5, [lr], #2 24820 .LVL4009: 24821 .LBB2278: 24822 .LBB2279: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 24823 .loc 6 2014 0 24824 .syntax unified 24825 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 24826 00f0 CBFBC504 smlald r0, r4, fp, r5 24827 @ 0 "" 2 24828 .LVL4010: 24829 .thumb 24830 .syntax unified 24831 .LBE2279: 24832 .LBE2278: 24833 .LBB2280: 24834 .LBB2281: 24835 .syntax unified 24836 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 24837 00f4 C7FBC523 smlald r2, r3, r7, r5 24838 @ 0 "" 2 24839 .LVL4011: 24840 .thumb 24841 .syntax unified 24842 .LBE2281: 24843 .LBE2280: 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 24844 .loc 52 415 0 24845 00f8 013E subs r6, r6, #1 24846 .LVL4012: 24847 00fa F3D1 bne .L1823 24848 00fc C00B lsrs r0, r0, #15 24849 .LVL4013: 24850 00fe D20B lsrs r2, r2, #15 24851 .LVL4014: 24852 0100 40EA4444 orr r4, r0, r4, lsl #17 24853 0104 42EA4343 orr r3, r2, r3, lsl #17 24854 .LVL4015: 24855 .L1822: 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** acc1 = __SMLALD(x1, c0, acc1); 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Decrement loop counter */ 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt--; 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Advance the state pointer by the decimation factor 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * to process the next group of decimation factor number samples */ 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pState = pState + S->M * 2; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Store filter output, smlad returns the values in 2.14 format */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* so downsacle by 15 to get output in 1.15 */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); ARM GAS /tmp/ccJrAs6S.s page 973 24856 .loc 52 438 0 24857 0108 029A ldr r2, [sp, #8] 24858 .LBB2282: 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); 24859 .loc 52 439 0 24860 .syntax unified 24861 @ 439 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c 24862 010a 03F30F03 ssat r3, #16, r3 24863 @ 0 "" 2 24864 .thumb 24865 .syntax unified 24866 .LBE2282: 24867 010e 22F8023C strh r3, [r2, #-2] @ movhi 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24868 .loc 52 434 0 24869 0112 039B ldr r3, [sp, #12] 24870 .LBB2283: 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); 24871 .loc 52 438 0 24872 .syntax unified 24873 @ 438 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c 24874 0114 04F30F04 ssat r4, #16, r4 24875 @ 0 "" 2 24876 .thumb 24877 .syntax unified 24878 .LBE2283: 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24879 .loc 52 434 0 24880 0118 0AEB830A add r10, r10, r3, lsl #2 24881 .LVL4016: 24882 011c 131D adds r3, r2, #4 24883 011e 0293 str r3, [sp, #8] 24884 .LVL4017: 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 24885 .loc 52 350 0 24886 0120 019B ldr r3, [sp, #4] 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); 24887 .loc 52 438 0 24888 0122 22F8044C strh r4, [r2, #-4] @ movhi 24889 .LVL4018: 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 24890 .loc 52 350 0 24891 0126 013B subs r3, r3, #1 24892 .LVL4019: 24893 0128 0193 str r3, [sp, #4] 24894 012a 11D0 beq .L1824 24895 012c 009B ldr r3, [sp] 24896 .LVL4020: 24897 012e 1F78 ldrb r7, [r3] @ zero_extendqisi2 24898 0130 85E7 b .L1825 24899 .LVL4021: 24900 .L1839: 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24901 .loc 52 353 0 24902 0132 CE46 mov lr, r9 24903 0134 3746 mov r7, r6 24904 0136 8846 mov r8, r1 ARM GAS /tmp/ccJrAs6S.s page 974 24905 0138 9EE7 b .L1817 24906 .L1816: 24907 013a A9F10200 sub r0, r9, #2 24908 013e 3346 mov r3, r6 24909 0140 0A46 mov r2, r1 24910 .LVL4022: 24911 .L1820: 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24912 .loc 52 357 0 24913 0142 32F9024B ldrsh r4, [r2], #2 24914 .LVL4023: 24915 0146 20F8024F strh r4, [r0, #2]! @ movhi 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24916 .loc 52 359 0 24917 014a 013B subs r3, r3, #1 24918 .LVL4024: 24919 014c F9D1 bne .L1820 24920 014e B6E7 b .L1821 24921 .LVL4025: 24922 .L1824: 24923 0150 069B ldr r3, [sp, #24] 24924 .LVL4026: 24925 0152 099A ldr r2, [sp, #36] 24926 .LVL4027: 24927 0154 03EB8203 add r3, r3, r2, lsl #2 24928 0158 0693 str r3, [sp, #24] 24929 .LVL4028: 24930 .L1815: 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Decrement loop counter */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** blkCnt--; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (blkCntN3 > 0U) 24931 .loc 52 445 0 24932 015a 089B ldr r3, [sp, #32] 24933 015c 002B cmp r3, #0 24934 015e 56D0 beq .L1826 24935 .LVL4029: 24936 0160 081D adds r0, r1, #4 24937 0162 09F10402 add r2, r9, #4 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Copy decimation factor number of new input samples into the state buffer */ 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** i = S->M; 24938 .loc 52 448 0 24939 0166 009B ldr r3, [sp] 24940 0168 9142 cmp r1, r2 24941 016a 38BF it cc 24942 016c 8145 cmpcc r9, r0 24943 016e 1B78 ldrb r3, [r3] @ zero_extendqisi2 24944 .LVL4030: 24945 0170 7DD3 bcc .L1827 24946 0172 0D2B cmp r3, #13 24947 0174 7BD9 bls .L1827 24948 0176 C1F34007 ubfx r7, r1, #1, #1 24949 017a 781C adds r0, r7, #1 24950 017c 5A1E subs r2, r3, #1 ARM GAS /tmp/ccJrAs6S.s page 975 24951 017e 9042 cmp r0, r2 24952 0180 21D8 bhi .L1828 24953 0182 002F cmp r7, #0 24954 0184 6FD0 beq .L1841 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** do 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pStateCur++ = *pSrc++; 24955 .loc 52 452 0 24956 0186 B1F90000 ldrsh r0, [r1] 24957 018a A9F80000 strh r0, [r9] @ movhi 24958 018e 8D1C adds r5, r1, #2 24959 .LVL4031: 24960 0190 09F10204 add r4, r9, #2 24961 .LVL4032: 24962 .L1829: 24963 0194 D81B subs r0, r3, r7 24964 0196 861E subs r6, r0, #2 24965 0198 7F00 lsls r7, r7, #1 24966 019a 7608 lsrs r6, r6, #1 24967 019c 3944 add r1, r1, r7 24968 019e B944 add r9, r9, r7 24969 01a0 0136 adds r6, r6, #1 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24970 .loc 52 448 0 24971 01a2 0023 movs r3, #0 24972 .LVL4033: 24973 .L1830: 24974 01a4 0133 adds r3, r3, #1 24975 .loc 52 452 0 discriminator 1 24976 01a6 51F8047B ldr r7, [r1], #4 24977 01aa 49F8047B str r7, [r9], #4 @ unaligned 24978 01ae 9E42 cmp r6, r3 24979 01b0 F8D8 bhi .L1830 24980 01b2 7700 lsls r7, r6, #1 24981 01b4 4FEA8609 lsl r9, r6, #2 24982 01b8 8742 cmp r7, r0 24983 01ba 05EB0901 add r1, r5, r9 24984 01be A2EB0703 sub r3, r2, r7 24985 01c2 A144 add r9, r9, r4 24986 01c4 09D0 beq .L1833 24987 .L1828: 24988 .LVL4034: 24989 .loc 52 452 0 is_stmt 0 24990 01c6 B1F90020 ldrsh r2, [r1] 24991 01ca A9F80020 strh r2, [r9] @ movhi 24992 .LVL4035: 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } while (--i); 24993 .loc 52 454 0 is_stmt 1 24994 01ce 012B cmp r3, #1 24995 01d0 03D0 beq .L1833 24996 .LVL4036: 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 24997 .loc 52 452 0 24998 01d2 B1F90230 ldrsh r3, [r1, #2] 24999 .LVL4037: ARM GAS /tmp/ccJrAs6S.s page 976 25000 01d6 A9F80230 strh r3, [r9, #2] @ movhi 25001 .LVL4038: 25002 .L1833: 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Set accumulator to zero */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** sum0 = 0; 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Initialize state pointer */ 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** px = pState; 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Initialize coeff pointer */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pb = pCoeffs; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Loop unrolling: Compute 4 taps at a time */ 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt = numTaps >> 2U; 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (tapCnt > 0U) 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Read the b[numTaps-1] and b[numTaps-2] coefficients */ 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** c0 = read_q15x2_ia ((q15_t **) &pb); 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x0 = read_q15x2_ia (&px); 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Read the b[numTaps-3] and b[numTaps-4] coefficients */ 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** c1 = read_q15x2_ia ((q15_t **) &pb); 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Perform the multiply-accumulate */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** sum0 = __SMLALD(x0, c0, sum0); 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x0 = read_q15x2_ia (&px); 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Perform the multiply-accumulate */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** sum0 = __SMLALD(x0, c1, sum0); 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Decrement loop counter */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt--; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Loop unrolling: Compute remaining taps */ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt = numTaps % 0x4U; 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #else 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Initialize tapCnt with number of taps */ 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt = numTaps; 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (tapCnt > 0U) 25003 .loc 52 504 0 25004 01da 0498 ldr r0, [sp, #16] 25005 01dc 0028 cmp r0, #0 25006 01de 51D0 beq .L1842 ARM GAS /tmp/ccJrAs6S.s page 977 25007 .LVL4039: 25008 .L1887: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 25009 .loc 52 457 0 25010 01e0 0023 movs r3, #0 25011 .loc 52 504 0 25012 01e2 059E ldr r6, [sp, #20] 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 25013 .loc 52 457 0 25014 01e4 1946 mov r1, r3 25015 .loc 52 504 0 25016 01e6 5546 mov r5, r10 25017 .LVL4040: 25018 .L1835: 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Read coefficients */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** c0 = *pb++; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Fetch 1 state variable */ 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** x0 = *px++; 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Perform the multiply-accumulate */ 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** sum0 = __SMLALD(x0, c0, sum0); 25019 .loc 52 513 0 25020 01e8 35F9022B ldrsh r2, [r5], #2 25021 .LVL4041: 25022 01ec 36F9024B ldrsh r4, [r6], #2 25023 .LVL4042: 25024 .LBB2284: 25025 .LBB2285: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 25026 .loc 6 2014 0 25027 .syntax unified 25028 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 25029 01f0 C2FBC431 smlald r3, r1, r2, r4 25030 @ 0 "" 2 25031 .LVL4043: 25032 .thumb 25033 .syntax unified 25034 .LBE2285: 25035 .LBE2284: 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 25036 .loc 52 504 0 25037 01f4 0138 subs r0, r0, #1 25038 .LVL4044: 25039 01f6 F7D1 bne .L1835 25040 01f8 DA0B lsrs r2, r3, #15 25041 01fa 42EA4143 orr r3, r2, r1, lsl #17 25042 .LVL4045: 25043 .L1834: 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Decrement loop counter */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** tapCnt--; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Advance the state pointer by the decimation factor 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** * to process the next group of decimation factor number samples */ ARM GAS /tmp/ccJrAs6S.s page 978 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pState = pState + S->M; 25044 .loc 52 521 0 25045 01fe 009A ldr r2, [sp] 25046 .LBB2286: 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Store filter output, smlad returns the values in 2.14 format */ 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* so downsacle by 15 to get output in 1.15 */ 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); 25047 .loc 52 525 0 25048 .syntax unified 25049 @ 525 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c 25050 0200 03F30F03 ssat r3, #16, r3 25051 @ 0 "" 2 25052 .thumb 25053 .syntax unified 25054 .LBE2286: 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 25055 .loc 52 521 0 25056 0204 1278 ldrb r2, [r2] @ zero_extendqisi2 25057 0206 0AEB420A add r10, r10, r2, lsl #1 25058 .LVL4046: 25059 .loc 52 525 0 25060 020a 069A ldr r2, [sp, #24] 25061 020c 1380 strh r3, [r2] @ movhi 25062 .LVL4047: 25063 .L1826: 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Decrement loop counter */ 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** blkCntN3--; 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Processing is complete. 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** Now copy the last numTaps - 1 samples to the satrt of the state buffer. 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** This prepares the state buffer for the next function call. */ 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Points to the start of the state buffer */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** pStateCur = S->pState; 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** i = (numTaps - 1U) >> 2U; 25064 .loc 52 538 0 25065 020e 049B ldr r3, [sp, #16] 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 25066 .loc 52 536 0 25067 0210 0799 ldr r1, [sp, #28] 25068 .loc 52 538 0 25069 0212 013B subs r3, r3, #1 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* copy data */ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (i > 0U) 25070 .loc 52 541 0 25071 0214 9D08 lsrs r5, r3, #2 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 25072 .loc 52 536 0 25073 0216 0A46 mov r2, r1 25074 .LVL4048: 25075 .loc 52 541 0 25076 0218 0FD0 beq .L1836 ARM GAS /tmp/ccJrAs6S.s page 979 25077 021a 5246 mov r2, r10 25078 021c 2846 mov r0, r5 25079 .LVL4049: 25080 .L1837: 25081 .LBB2287: 25082 .LBB2288: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 25083 .loc 3 928 0 25084 021e 1468 ldr r4, [r2] @ unaligned 25085 .LVL4050: 25086 .LBE2288: 25087 .LBE2287: 25088 .LBB2289: 25089 .LBB2290: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 25090 .loc 3 969 0 25091 0220 0C60 str r4, [r1] @ unaligned 25092 .LVL4051: 25093 .LBE2290: 25094 .LBE2289: 25095 .LBB2291: 25096 .LBB2292: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 25097 .loc 3 928 0 25098 0222 5468 ldr r4, [r2, #4] @ unaligned 25099 .LVL4052: 25100 .LBE2292: 25101 .LBE2291: 25102 .LBB2293: 25103 .LBB2294: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 25104 .loc 3 969 0 25105 0224 4C60 str r4, [r1, #4] @ unaligned 25106 .LBE2294: 25107 .LBE2293: 25108 .loc 52 541 0 25109 0226 0138 subs r0, r0, #1 25110 .LVL4053: 25111 0228 02F10802 add r2, r2, #8 25112 .LVL4054: 25113 022c 01F10801 add r1, r1, #8 25114 .LVL4055: 25115 0230 F5D1 bne .L1837 25116 0232 079A ldr r2, [sp, #28] 25117 .LVL4056: 25118 0234 ED00 lsls r5, r5, #3 25119 0236 AA44 add r10, r10, r5 25120 0238 2A44 add r2, r2, r5 25121 .LVL4057: 25122 .L1836: 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Decrement loop counter */ 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** i--; 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } ARM GAS /tmp/ccJrAs6S.s page 980 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** i = (numTaps - 1U) % 0x04U; 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Copy data */ 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** while (i > 0U) 25123 .loc 52 553 0 25124 023a 13F00303 ands r3, r3, #3 25125 .LVL4058: 25126 023e 0CD0 beq .L1814 25127 .LVL4059: 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** *pStateCur++ = *pState++; 25128 .loc 52 555 0 25129 0240 BAF90010 ldrsh r1, [r10] 25130 0244 1180 strh r1, [r2] @ movhi 25131 .LVL4060: 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 25132 .loc 52 553 0 25133 0246 012B cmp r3, #1 25134 0248 07D0 beq .L1814 25135 .LVL4061: 25136 .loc 52 555 0 25137 024a BAF90210 ldrsh r1, [r10, #2] 25138 024e 5180 strh r1, [r2, #2] @ movhi 25139 .LVL4062: 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 25140 .loc 52 553 0 25141 0250 022B cmp r3, #2 25142 .LVL4063: 25143 .loc 52 555 0 25144 0252 1CBF itt ne 25145 0254 BAF90430 ldrshne r3, [r10, #4] 25146 0258 9380 strhne r3, [r2, #4] @ movhi 25147 .LVL4064: 25148 .L1814: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** /* Decrement loop counter */ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** i--; 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** } 25149 .loc 52 561 0 25150 025a 0BB0 add sp, sp, #44 25151 .LCFI149: 25152 .cfi_remember_state 25153 .cfi_def_cfa_offset 36 25154 .LVL4065: 25155 @ sp needed 25156 025c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 25157 .LVL4066: 25158 .L1840: 25159 .LCFI150: 25160 .cfi_restore_state 25161 0260 3446 mov r4, r6 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 25162 .loc 52 415 0 25163 0262 3346 mov r3, r6 ARM GAS /tmp/ccJrAs6S.s page 981 25164 0264 50E7 b .L1822 25165 .LVL4067: 25166 .L1841: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 25167 .loc 52 448 0 25168 0266 4C46 mov r4, r9 25169 0268 1A46 mov r2, r3 25170 026a 0D46 mov r5, r1 25171 026c 92E7 b .L1829 25172 .L1827: 25173 026e A9F10209 sub r9, r9, #2 25174 .LVL4068: 25175 .L1832: 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 25176 .loc 52 452 0 25177 0272 31F9022B ldrsh r2, [r1], #2 25178 .LVL4069: 25179 0276 29F8022F strh r2, [r9, #2]! @ movhi 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** 25180 .loc 52 454 0 25181 027a 013B subs r3, r3, #1 25182 .LVL4070: 25183 027c F9D1 bne .L1832 25184 .LVL4071: 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c **** { 25185 .loc 52 504 0 25186 027e 0498 ldr r0, [sp, #16] 25187 0280 0028 cmp r0, #0 25188 0282 ADD1 bne .L1887 25189 .LVL4072: 25190 .L1842: 25191 0284 0346 mov r3, r0 25192 0286 BAE7 b .L1834 25193 .cfi_endproc 25194 .LFE197: 25196 .section .text.arm_fir_decimate_q31,"ax",%progbits 25197 .align 1 25198 .p2align 2,,3 25199 .global arm_fir_decimate_q31 25200 .syntax unified 25201 .thumb 25202 .thumb_func 25203 .fpu fpv4-sp-d16 25205 arm_fir_decimate_q31: 25206 .LFB198: 25207 .file 53 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Title: arm_fir_decimate_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Description: Q31 FIR Decimator 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* ARM GAS /tmp/ccJrAs6S.s page 982 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** @addtogroup FIR_decimate 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** @brief Processing function for the Q31 FIR decimator. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** @param[in] S points to an instance of the Q31 FIR decimator structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** The function is implemented using an internal 64-bit accumulator. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** The accumulator has a 2.62 format and maintains full precision of the intermedia 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** Thus, if the accumulator result overflows it wraps around rather than clip. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** In order to avoid overflows completely the input signal must be scaled down by l 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** After all multiply-accumulates are performed, the 2.62 accumulator is truncated 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** @remark 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** Refer to \ref arm_fir_decimate_fast_q31() for a faster but less precise implemen 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #if defined(ARM_MATH_MVEI) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #include "arm_helium_utils.h" 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** void arm_fir_decimate_q31( 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const arm_fir_decimate_instance_q31 * S, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const q31_t * pSrc, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31_t * pDst, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** uint32_t blockSize) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { ARM GAS /tmp/ccJrAs6S.s page 983 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31_t *pState = S->pState; /* State pointer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31_t *pStateCurnt; /* Points to the current sample of the state */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const q31_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** uint32_t blkCntN4; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const q31_t *px0, *px1, *px2, *px3; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q63_t acc0v, acc1v, acc2v, acc3v; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31x4_t x0v, x1v, x2v, x3v; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31x4_t c0v; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * S->pState buffer contains previous frame (numTaps - 1) samples 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * pStateCurnt points to the location where the new input data should be written 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pStateCurnt = S->pState + (numTaps - 1U); 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Total number of output samples to be computed 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** blkCnt = outBlockSize / 4; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** blkCntN4 = outBlockSize - (4 * blkCnt); 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (blkCnt > 0U) 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Copy 4 * decimation factor number of new input samples into the state buffer 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** i = (4 * S->M) >> 2; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** do 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** vst1q(pStateCurnt, vldrwq_s32(pSrc)); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pSrc += 4; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pStateCurnt += 4; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** i--; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (i > 0U); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Clear all accumulators 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0v = 0LL; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc1v = 0LL; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc2v = 0LL; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc3v = 0LL; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Initialize state pointer for all the samples 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px0 = pState; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px1 = pState + S->M; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px2 = pState + 2 * S->M; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px3 = pState + 3 * S->M; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Initialize coeff. pointer 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pb = pCoeffs; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* ARM GAS /tmp/ccJrAs6S.s page 984 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Loop unrolling. Process 4 taps at a time. 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt = numTaps >> 2; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Loop over the number of taps. Unroll by a factor of 4. 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Repeat until we've computed numTaps-4 coefficients. 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (tapCnt > 0U) 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Read the b[numTaps-1] coefficient 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0v = vldrwq_s32(pb); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pb += 4; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Read x[n-numTaps-1] sample for acc0 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0v = vld1q(px0); 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x1v = vld1q(px1); 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x2v = vld1q(px2); 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x3v = vld1q(px3); 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px0 += 4; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px1 += 4; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px2 += 4; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px3 += 4; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0v = vrmlaldavhaq(acc0v, x0v, c0v); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc1v = vrmlaldavhaq(acc1v, x1v, c0v); 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc2v = vrmlaldavhaq(acc2v, x2v, c0v); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc3v = vrmlaldavhaq(acc3v, x3v, c0v); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Decrement the loop counter 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt--; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * If the filter length is not a multiple of 4, compute the remaining filter taps 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * should be tail predicated 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt = numTaps % 0x4U; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** if (tapCnt > 0U) 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** mve_pred16_t p0 = vctp32q(tapCnt); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Read the b[numTaps-1] coefficient 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0v = vldrwq_z_s32(pb, p0); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pb += 4; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Read x[n-numTaps-1] sample for acc0 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0v = vld1q(px0); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x1v = vld1q(px1); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x2v = vld1q(px2); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x3v = vld1q(px3); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px0 += 4; ARM GAS /tmp/ccJrAs6S.s page 985 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px1 += 4; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px2 += 4; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px3 += 4; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0v = vrmlaldavhaq(acc0v, x0v, c0v); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc1v = vrmlaldavhaq(acc1v, x1v, c0v); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc2v = vrmlaldavhaq(acc2v, x2v, c0v); 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc3v = vrmlaldavhaq(acc3v, x3v, c0v); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0v = asrl(acc0v, 31 - 8); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc1v = asrl(acc1v, 31 - 8); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc2v = asrl(acc2v, 31 - 8); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc3v = asrl(acc3v, 31 - 8); 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * store in the destination buffer. 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pDst++ = (q31_t) acc0v; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pDst++ = (q31_t) acc1v; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pDst++ = (q31_t) acc2v; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pDst++ = (q31_t) acc3v; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Advance the state pointer by the decimation factor 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * to process the next group of decimation factor number samples 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pState = pState + 4 * S->M; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Decrement the loop counter 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** blkCnt--; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (blkCntN4 > 0U) 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Copy decimation factor number of new input samples into the state buffer 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** i = S->M; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** do 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pStateCurnt++ = *pSrc++; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (--i); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Set accumulator to zero 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0v = 0LL; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Initialize state pointer 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px = pState; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Initialize coeff. pointer 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pb = pCoeffs; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* ARM GAS /tmp/ccJrAs6S.s page 986 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Loop unrolling. Process 4 taps at a time. 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt = numTaps >> 2; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Loop over the number of taps. Unroll by a factor of 4. 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Repeat until we've computed numTaps-4 coefficients. 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (tapCnt > 0U) 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0v = vldrwq_s32(pb); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0v = vldrwq_s32(px); 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pb += 4; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px += 4; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0v = vrmlaldavhaq(acc0v, x0v, c0v); 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Decrement the loop counter 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt--; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt = numTaps % 0x4U; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** if (tapCnt > 0U) 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** mve_pred16_t p0 = vctp32q(tapCnt); 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0v = vldrwq_z_s32(pb, p0); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0v = vldrwq_z_s32(px, p0); 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0v = vrmlaldavhaq_p(acc0v, x0v, c0v, p0); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0v = asrl(acc0v, 31 - 8); 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Advance the state pointer by the decimation factor 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * * to process the next group of decimation factor number samples 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pState = pState + S->M; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * The result is in the accumulator, store in the destination buffer. 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pDst++ = (q31_t) acc0v; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Decrement the loop counter 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** blkCntN4--; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Processing is complete. 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * Now copy the last numTaps - 1 samples to the start of the state buffer. 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * This prepares the state buffer for the next function call. 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pStateCurnt = S->pState; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** blkCnt = (numTaps - 1) >> 2; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (blkCnt > 0U) 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** vst1q(pStateCurnt, vldrwq_s32(pState)); 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pState += 4; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pStateCurnt += 4; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** blkCnt--; ARM GAS /tmp/ccJrAs6S.s page 987 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** blkCnt = (numTaps - 1) & 3; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** if (blkCnt > 0U) 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** vstrwq_p_s32(pStateCurnt, vldrwq_s32(pState), p0); 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #else 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** void arm_fir_decimate_q31( 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const arm_fir_decimate_instance_q31 * S, 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const q31_t * pSrc, 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31_t * pDst, 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** uint32_t blockSize) 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 25208 .loc 53 311 0 25209 .cfi_startproc 25210 @ args = 0, pretend = 0, frame = 16 25211 @ frame_needed = 0, uses_anonymous_args = 0 25212 .LVL4073: 25213 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 25214 .LCFI151: 25215 .cfi_def_cfa_offset 36 25216 .cfi_offset 4, -36 25217 .cfi_offset 5, -32 25218 .cfi_offset 6, -28 25219 .cfi_offset 7, -24 25220 .cfi_offset 8, -20 25221 .cfi_offset 9, -16 25222 .cfi_offset 10, -12 25223 .cfi_offset 11, -8 25224 .cfi_offset 14, -4 25225 0004 85B0 sub sp, sp, #20 25226 .LCFI152: 25227 .cfi_def_cfa_offset 56 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31_t *pState = S->pState; /* State pointer */ 25228 .loc 53 312 0 25229 0006 8568 ldr r5, [r0, #8] 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31_t *pStateCur; /* Points to the current sample of the state 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31_t *px0; /* Temporary pointer for state buffer */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const q31_t *pb; /* Temporary pointer for coefficient buffer 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31_t x0, c0; /* Temporary variables to hold state and coe 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q63_t acc0; /* Accumulator */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 25230 .loc 53 319 0 25231 0008 B0F802C0 ldrh ip, [r0, #2] 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31_t *pState = S->pState; /* State pointer */ 25232 .loc 53 312 0 25233 000c 0295 str r5, [sp, #8] 25234 .LVL4074: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31_t *pState = S->pState; /* State pointer */ 25235 .loc 53 311 0 25236 000e 8946 mov r9, r1 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ 25237 .loc 53 320 0 25238 0010 0178 ldrb r1, [r0] @ zero_extendqisi2 ARM GAS /tmp/ccJrAs6S.s page 988 25239 .LVL4075: 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 25240 .loc 53 313 0 25241 0012 4068 ldr r0, [r0, #4] 25242 .LVL4076: 25243 .loc 53 320 0 25244 0014 B3FBF1F4 udiv r4, r3, r1 25245 0018 0091 str r1, [sp] 25246 001a 0394 str r4, [sp, #12] 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 25247 .loc 53 313 0 25248 001c 0190 str r0, [sp, #4] 25249 .LVL4077: 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31_t *px1, *px2, *px3; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q31_t x1, x2, x3; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** q63_t acc1, acc2, acc3; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #endif 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* S->pState buffer contains previous frame (numTaps - 1) samples */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* pStateCur points to the location where the new input data should be written */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pStateCur = S->pState + (numTaps - 1U); 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Loop unrolling: Compute 4 samples at a time */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** blkCnt = outBlockSize >> 2U; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Samples loop unrolled by 4 */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (blkCnt > 0U) 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Copy 4 * decimation factor number of new input samples into the state buffer */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** i = S->M * 4; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** do 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pStateCur++ = *pSrc++; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } while (--i); 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Set accumulators to zero */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0 = 0; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc1 = 0; 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc2 = 0; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc3 = 0; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Initialize state pointer for all the samples */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px0 = pState; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px1 = pState + S->M; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px2 = pState + 2 * S->M; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px3 = pState + 3 * S->M; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Initialize coeff pointer */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pb = pCoeffs; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Loop unrolling: Compute 4 taps at a time */ ARM GAS /tmp/ccJrAs6S.s page 989 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt = numTaps >> 2U; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (tapCnt > 0U) 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read the b[numTaps-1] coefficient */ 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0 = *(pb++); 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read x[n-numTaps-1] sample for acc0 */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0 = *(px0++); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read x[n-numTaps-1] sample for acc1 */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x1 = *(px1++); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read x[n-numTaps-1] sample for acc2 */ 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x2 = *(px2++); 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read x[n-numTaps-1] sample for acc3 */ 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x3 = *(px3++); 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Perform the multiply-accumulate */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0 += (q63_t) x0 * c0; 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc1 += (q63_t) x1 * c0; 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc2 += (q63_t) x2 * c0; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc3 += (q63_t) x3 * c0; 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read the b[numTaps-2] coefficient */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0 = *(pb++); 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0 = *(px0++); 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x1 = *(px1++); 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x2 = *(px2++); 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x3 = *(px3++); 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Perform the multiply-accumulate */ 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0 += (q63_t) x0 * c0; 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc1 += (q63_t) x1 * c0; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc2 += (q63_t) x2 * c0; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc3 += (q63_t) x3 * c0; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read the b[numTaps-3] coefficient */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0 = *(pb++); 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */ 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0 = *(px0++); 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x1 = *(px1++); 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x2 = *(px2++); 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x3 = *(px3++); 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Perform the multiply-accumulate */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0 += (q63_t) x0 * c0; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc1 += (q63_t) x1 * c0; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc2 += (q63_t) x2 * c0; 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc3 += (q63_t) x3 * c0; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read the b[numTaps-4] coefficient */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0 = *(pb++); 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0 = *(px0++); ARM GAS /tmp/ccJrAs6S.s page 990 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x1 = *(px1++); 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x2 = *(px2++); 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x3 = *(px3++); 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Perform the multiply-accumulate */ 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0 += (q63_t) x0 * c0; 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc1 += (q63_t) x1 * c0; 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc2 += (q63_t) x2 * c0; 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc3 += (q63_t) x3 * c0; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Decrement loop counter */ 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt--; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Loop unrolling: Compute remaining taps */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt = numTaps % 0x4U; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (tapCnt > 0U) 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read coefficients */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0 = *(pb++); 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Fetch state variables for acc0, acc1, acc2, acc3 */ 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0 = *(px0++); 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x1 = *(px1++); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x2 = *(px2++); 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x3 = *(px3++); 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Perform the multiply-accumulate */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0 += (q63_t) x0 * c0; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc1 += (q63_t) x1 * c0; 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc2 += (q63_t) x2 * c0; 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc3 += (q63_t) x3 * c0; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Decrement loop counter */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt--; 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Advance the state pointer by the decimation factor 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * to process the next group of decimation factor number samples */ 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pState = pState + S->M * 4; 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* The result is in the accumulator, store in the destination buffer. */ 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pDst++ = (q31_t) (acc0 >> 31); 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pDst++ = (q31_t) (acc1 >> 31); 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pDst++ = (q31_t) (acc2 >> 31); 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pDst++ = (q31_t) (acc3 >> 31); 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Decrement loop counter */ 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** blkCnt--; 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Loop unrolling: Compute remaining samples */ 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** blkCnt = outBlockSize % 0x4U; 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #else 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 991 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Initialize blkCnt with number of samples */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** blkCnt = outBlockSize; 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (blkCnt > 0U) 25250 .loc 53 484 0 25251 001e 002C cmp r4, #0 25252 0020 42D0 beq .L1896 25253 0022 0CF18043 add r3, ip, #1073741824 25254 .LVL4078: 25255 0026 013B subs r3, r3, #1 25256 .LVL4079: 25257 0028 9B00 lsls r3, r3, #2 25258 .LVL4080: 25259 002a 2046 mov r0, r4 25260 .LVL4081: 25261 002c 043B subs r3, r3, #4 25262 002e 05EB0308 add r8, r5, r3 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Copy decimation factor number of new input samples into the state buffer */ 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** i = S->M; 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** do 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pStateCur++ = *pSrc++; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } while (--i); 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Set accumulator to zero */ 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0 = 0; 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Initialize state pointer */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** px0 = pState; 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Initialize coeff pointer */ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pb = pCoeffs; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Loop unrolling: Compute 4 taps at a time */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt = numTaps >> 2U; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (tapCnt > 0U) 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read the b[numTaps-1] coefficient */ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0 = *pb++; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read x[n-numTaps-1] sample */ 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0 = *px0++; 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Perform the multiply-accumulate */ 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0 += (q63_t) x0 * c0; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read the b[numTaps-2] coefficient */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0 = *pb++; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 992 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read x[n-numTaps-2] sample */ 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0 = *px0++; 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Perform the multiply-accumulate */ 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0 += (q63_t) x0 * c0; 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read the b[numTaps-3] coefficient */ 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0 = *pb++; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read x[n-numTaps-3] sample */ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0 = *px0++; 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Perform the multiply-accumulate */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0 += (q63_t) x0 * c0; 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read the b[numTaps-4] coefficient */ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0 = *pb++; 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read x[n-numTaps-4] sample */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0 = *px0++; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Perform the multiply-accumulate */ 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0 += (q63_t) x0 * c0; 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Decrement loop counter */ 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt--; 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Loop unrolling: Compute remaining taps */ 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt = numTaps % 0x4U; 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #else 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Initialize tapCnt with number of taps */ 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt = numTaps; 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (tapCnt > 0U) 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Read coefficients */ 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** c0 = *pb++; 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Fetch 1 state variable */ 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** x0 = *px0++; 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Perform the multiply-accumulate */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** acc0 += (q63_t) x0 * c0; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Decrement loop counter */ 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt--; 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Advance the state pointer by the decimation factor 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** * to process the next group of decimation factor number samples */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pState = pState + S->M; 25263 .loc 53 578 0 ARM GAS /tmp/ccJrAs6S.s page 993 25264 0032 4FEA810E lsl lr, r1, #2 25265 0036 8246 mov r10, r0 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 25266 .loc 53 312 0 25267 0038 AB46 mov fp, r5 25268 .LVL4082: 25269 .L1893: 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 25270 .loc 53 487 0 25271 003a 009B ldr r3, [sp] 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 25272 .loc 53 312 0 25273 003c 4046 mov r0, r8 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 25274 .loc 53 487 0 25275 003e 4946 mov r1, r9 25276 .LVL4083: 25277 .L1890: 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 25278 .loc 53 491 0 discriminator 1 25279 0040 51F8044B ldr r4, [r1], #4 25280 .LVL4084: 25281 0044 40F8044F str r4, [r0, #4]! 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 25282 .loc 53 493 0 discriminator 1 25283 0048 013B subs r3, r3, #1 25284 .LVL4085: 25285 004a F9D1 bne .L1890 25286 004c F144 add r9, r9, lr 25287 .LVL4086: 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 25288 .loc 53 561 0 25289 004e 6346 mov r3, ip 25290 .LVL4087: 25291 0050 BCF1000F cmp ip, #0 25292 0054 0ED0 beq .L1891 25293 .LVL4088: 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 25294 .loc 53 502 0 25295 0056 019D ldr r5, [sp, #4] 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 25296 .loc 53 561 0 25297 0058 5C46 mov r4, fp 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 25298 .loc 53 496 0 25299 005a 0020 movs r0, #0 25300 005c 0021 movs r1, #0 25301 .LVL4089: 25302 .L1892: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 25303 .loc 53 570 0 25304 005e 54F8047B ldr r7, [r4], #4 25305 .LVL4090: 25306 0062 55F8046B ldr r6, [r5], #4 25307 .LVL4091: 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 25308 .loc 53 561 0 ARM GAS /tmp/ccJrAs6S.s page 994 25309 0066 013B subs r3, r3, #1 25310 .LVL4092: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 25311 .loc 53 570 0 25312 0068 C6FB0701 smlal r0, r1, r6, r7 25313 .LVL4093: 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 25314 .loc 53 561 0 25315 006c F7D1 bne .L1892 25316 006e C30F lsrs r3, r0, #31 25317 0070 43EA4103 orr r3, r3, r1, lsl #1 25318 .LVL4094: 25319 .L1891: 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 25320 .loc 53 484 0 25321 0074 BAF1010A subs r10, r10, #1 25322 .LVL4095: 25323 .loc 53 578 0 25324 0078 F344 add fp, fp, lr 25325 .LVL4096: 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* The result is in the accumulator, store in the destination buffer. */ 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pDst++ = (q31_t) (acc0 >> 31); 25326 .loc 53 581 0 25327 007a 42F8043B str r3, [r2], #4 25328 .LVL4097: 25329 007e F044 add r8, r8, lr 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 25330 .loc 53 484 0 25331 0080 DBD1 bne .L1893 25332 0082 DDE90223 ldrd r2, r3, [sp, #8] 25333 .LVL4098: 25334 0086 03FB0E2E mla lr, r3, lr, r2 25335 .LVL4099: 25336 .L1889: 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Decrement loop counter */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** blkCnt--; 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Processing is complete. 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** Now copy the last numTaps - 1 samples to the satrt of the state buffer. 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** This prepares the state buffer for the next function call. */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Points to the start of the state buffer */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** pStateCur = S->pState; 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Loop unrolling: Compute 4 taps at a time */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt = (numTaps - 1U) >> 2U; 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Copy data */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (tapCnt > 0U) 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pStateCur++ = *pState++; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pStateCur++ = *pState++; ARM GAS /tmp/ccJrAs6S.s page 995 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pStateCur++ = *pState++; 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pStateCur++ = *pState++; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Decrement loop counter */ 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt--; 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Loop unrolling: Compute remaining taps */ 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt = (numTaps - 1U) % 0x04U; 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #else 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Initialize tapCnt with number of taps */ 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt = (numTaps - 1U); 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Copy data */ 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** while (tapCnt > 0U) 25337 .loc 53 622 0 25338 008a BCF1010C subs ip, ip, #1 25339 .LVL4100: 25340 008e 08D0 beq .L1888 25341 0090 029B ldr r3, [sp, #8] 25342 0092 043B subs r3, r3, #4 25343 .LVL4101: 25344 .L1895: 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** *pStateCur++ = *pState++; 25345 .loc 53 624 0 25346 0094 5EF8042B ldr r2, [lr], #4 25347 .LVL4102: 25348 0098 43F8042F str r2, [r3, #4]! 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** { 25349 .loc 53 622 0 25350 009c BCF1010C subs ip, ip, #1 25351 .LVL4103: 25352 00a0 F8D1 bne .L1895 25353 .LVL4104: 25354 .L1888: 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** /* Decrement loop counter */ 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** tapCnt--; 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c **** } 25355 .loc 53 630 0 25356 00a2 05B0 add sp, sp, #20 25357 .LCFI153: 25358 .cfi_remember_state 25359 .cfi_def_cfa_offset 36 25360 @ sp needed 25361 00a4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 25362 .LVL4105: 25363 .L1896: 25364 .LCFI154: 25365 .cfi_restore_state ARM GAS /tmp/ccJrAs6S.s page 996 25366 00a8 AE46 mov lr, r5 25367 00aa EEE7 b .L1889 25368 .cfi_endproc 25369 .LFE198: 25371 .section .text.arm_fir_f32,"ax",%progbits 25372 .align 1 25373 .p2align 2,,3 25374 .global arm_fir_f32 25375 .syntax unified 25376 .thumb 25377 .thumb_func 25378 .fpu fpv4-sp-d16 25380 arm_fir_f32: 25381 .LFB199: 25382 .file 54 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * Title: arm_fir_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * Description: Floating-point FIR filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @defgroup FIR Finite Impulse Response (FIR) Filters 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** This set of functions implements Finite Impulse Response (FIR) filters 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** for Q7, Q15, Q31, and floating-point data types. Fast versions of Q15 and Q31 are also provided. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** The functions operate on blocks of input and output data and each call to the function processes 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blockSize samples through the filter. pSrc and 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pDst points to input and output arrays containing blockSize values. ARM GAS /tmp/ccJrAs6S.s page 997 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @par Algorithm 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) o 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** Each filter coefficient b[n] is multiplied by a state variable whic 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 
  48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c ****       y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c ****
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @par 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** \image html FIR.GIF "Finite Impulse Response filter" 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @par 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pCoeffs points to a coefficient array of size numTaps. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** Coefficients are stored in time reversed order. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @par 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c ****       {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c ****
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @par 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pState points to a state array of size numTaps + blockSize - 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** Samples in the state buffer are stored in the following order. 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @par 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c ****       {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c ****
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @par 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** Note that the length of the state buffer exceeds the length of the coefficient a 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** The increased state buffer length allows circular addressing, which is tradition 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** to be avoided and yields a significant speed improvement. 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** The state variables are updated after each block of data is processed; the coeff 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @par Instance Structure 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** The coefficients and state variables for a filter are stored together in an inst 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** A separate instance structure must be defined for each filter. 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** Coefficient arrays may be shared among several instances while state variable ar 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** There are separate instance structure declarations for each of the 4 supported d 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @par Initialization Functions 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** There is also an associated initialization function for each data type. 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** The initialization function performs the following operations: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** - Sets the values of the internal structure fields. 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** - Zeros out the values in the state buffer. 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** To do this manually without calling the init function, assign the follow subfiel 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** numTaps, pCoeffs, pState. Also set all of the values in pState to zero. 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @par 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** Use of the initialization function is optional. 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** However, if the initialization function is used, then the instance structure can 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** To place an instance structure into a const data section, the instance structure 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** Set the values in the state buffer to zeros before static initialization. 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** The code below statically initializes each of the 4 different data type filter i 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 
  92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c ****       arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};
  93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c ****       arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};
  94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c ****       arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};
  95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c ****       arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};
  96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c ****
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** where numTaps is the number of filter coefficients in the filter; < 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pCoeffs is the address of the coefficient buffer. 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @par Initialization of Helium version ARM GAS /tmp/ccJrAs6S.s page 998 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** For Helium version the array of coefficients must be a multiple of 16 even if less 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** then 16 coefficients are used. The additional coefficients must be set to 0. 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** It does not mean that all the coefficients will be used in the filter (numTaps 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** is still set to its right value in the init function.) It just means that 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** the implementation may require to read more coefficients due to the vectorization 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** to avoid having to manage too many different cases in the code. 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @par Fixed-Point Behavior 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** Care must be taken when using the fixed-point versions of the FIR filter functio 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** In particular, the overflow and saturation behavior of the accumulator used in e 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** Refer to the function specific documentation below for usage guidelines. 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @addtogroup FIR 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @{ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @brief Processing function for floating-point FIR filter. 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @param[in] S points to an instance of the floating-point FIR filter structure 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @param[in] pSrc points to the block of input data 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @param[out] pDst points to the block of output data 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @param[in] blockSize number of samples to process 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** @return none 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** static void arm_fir_f32_1_4_mve(const arm_fir_instance_f32 * S, const float32_t * pSrc, float32_t * 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pState = S->pState; /* State pointer */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pStateCur; /* Points to the current sample of the state */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pSamples; /* Temporary pointer to the sample buffer */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pOutput; /* Temporary pointer to the output buffer */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pTempSrc; /* Temporary pointer to the source data */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pTempDest; /* Temporary pointer to the destination buffer */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t blkCnt; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** f32x4_t vecIn0; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** f32x4_t vecAcc0; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t c0, c1, c2, c3; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * pState points to state array which contains previous frame (numTaps - 1) samples 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * pStateCur points to the location where the new input data should be written 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCur = &(pState[(numTaps - 1u)]); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSamples = pState; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc = pSrc; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pOutput = pDst; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** if (((numTaps - 1) / 4) == 0) 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pCoeffsCur = pCoeffs; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 999 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *pCoeffsCur++; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c1 = *pCoeffsCur++; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c2 = *pCoeffsCur++; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c3 = *pCoeffsCur++; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = blockSize >> 2; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (blkCnt > 0U) 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * Save 4 input samples in the history buffer 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q(pStateCur, vld1q(pTempSrc)); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCur += 4; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc += 4; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(pSamples); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vmulq(vecIn0, c0); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[1]); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[2]); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[3]); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q(pOutput, vecAcc0); 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pOutput += 4; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSamples += 4; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt--; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = blockSize & 3; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** if (blkCnt > 0U) 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vstrwq_p_f32(pStateCur, vld1q(pTempSrc),p0); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCur += blkCnt; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc += blkCnt; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(pSamples); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vmulq(vecIn0, c0); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[1]); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[2]); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[3]); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vstrwq_p_f32(pOutput, vecAcc0, p0); ARM GAS /tmp/ccJrAs6S.s page 1000 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * Copy the samples back into the history buffer start 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc = &S->pState[blockSize]; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempDest = S->pState; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = numTaps >> 2; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (blkCnt > 0U) 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q(pTempDest, vld1q(pTempSrc)); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc += 4; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempDest += 4; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt--; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = numTaps & 3; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** if (blkCnt > 0U) 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vstrwq_p_f32(pTempDest, vld1q(pTempSrc), p0); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** static void arm_fir_f32_5_8_mve(const arm_fir_instance_f32 * S, const float32_t * pSrc, float32_t * 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pState = S->pState; /* State pointer */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pStateCur; /* Points to the current sample of the state */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pSamples; /* Temporary pointer to the sample buffer */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pOutput; /* Temporary pointer to the output buffer */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pTempSrc; /* Temporary pointer to the source data */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pTempDest; /* Temporary pointer to the destination buffer */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t blkCnt; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** f32x4_t vecIn0; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** f32x4_t vecAcc0; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t c0, c1, c2, c3; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t c4, c5, c6, c7; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pCoeffsCur = pCoeffs; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * pState points to state array which contains previous frame (numTaps - 1) samples 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * pStateCur points to the location where the new input data should be written 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCur = &(pState[(numTaps - 1u)]); 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc = pSrc; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSamples = pState; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pOutput = pDst; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *pCoeffsCur++; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c1 = *pCoeffsCur++; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c2 = *pCoeffsCur++; ARM GAS /tmp/ccJrAs6S.s page 1001 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c3 = *pCoeffsCur++; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c4 = *pCoeffsCur++; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c5 = *pCoeffsCur++; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c6 = *pCoeffsCur++; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c7 = *pCoeffsCur++; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = blockSize >> 2; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (blkCnt > 0U) 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * Save 4 input samples in the history buffer 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q(pStateCur, vld1q(pTempSrc)); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCur += 4; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc += 4; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(pSamples); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vmulq(vecIn0, c0); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[1]); 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[2]); 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[3]); 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[4]); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[5]); 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[6]); 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[7]); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q(pOutput, vecAcc0); 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pOutput += 4; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSamples += 4; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt--; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = blockSize & 3; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** if (blkCnt > 0U) 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vstrwq_p_f32(pStateCur, vld1q(pTempSrc),p0); 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCur += blkCnt; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc += blkCnt; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1002 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(pSamples); 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vmulq(vecIn0, c0); 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[1]); 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[2]); 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[3]); 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[4]); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[5]); 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[6]); 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[7]); 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vstrwq_p_f32(pOutput, vecAcc0, p0); 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * Copy the samples back into the history buffer start 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc = &S->pState[blockSize]; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempDest = S->pState; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = numTaps >> 2; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (blkCnt > 0U) 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q(pTempDest, vld1q(pTempSrc)); 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc += 4; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempDest += 4; 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt--; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = numTaps & 3; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** if (blkCnt > 0U) 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vstrwq_p_f32(pTempDest, vld1q(pTempSrc), p0); 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** void arm_fir_f32( 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const arm_fir_instance_f32 * S, 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t * pSrc, 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t * pDst, 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t blockSize) 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { ARM GAS /tmp/ccJrAs6S.s page 1003 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pState = S->pState; /* State pointer */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pStateCur; /* Points to the current sample of the state */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pSamples; /* Temporary pointer to the sample buffer */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pOutput; /* Temporary pointer to the output buffer */ 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pTempSrc; /* Temporary pointer to the source data */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pTempDest; /* Temporary pointer to the destination buffer */ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t blkCnt; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** int32_t numCnt; 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** f32x4_t vecIn0; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** f32x4_t vecAcc0; 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t c0, c1, c2, c3; 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t c4, c5, c6, c7; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * [1 to 8 taps] specialized routines 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** if (blockSize >= 8) 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** if (numTaps <= 4) 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** arm_fir_f32_1_4_mve(S, pSrc, pDst, blockSize); 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** return; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** if (blockSize >= 8) 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** if (numTaps <= 8) 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** arm_fir_f32_5_8_mve(S, pSrc, pDst, blockSize); 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** return; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** if (blockSize >= 8) 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * pState points to state array which contains previous frame (numTaps - 1) samples 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * pStateCur points to the location where the new input data should be written 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCur = &(pState[(numTaps - 1u)]); 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc = pSrc; 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSamples = pState; 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pOutput = pDst; 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = blockSize >> 2; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (blkCnt > 0U) 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** int32_t i; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pCoeffsCur = pCoeffs; 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *pCoeffsCur++; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c1 = *pCoeffsCur++; 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c2 = *pCoeffsCur++; 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c3 = *pCoeffsCur++; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c4 = *pCoeffsCur++; ARM GAS /tmp/ccJrAs6S.s page 1004 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c5 = *pCoeffsCur++; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c6 = *pCoeffsCur++; 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c7 = *pCoeffsCur++; 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q(pStateCur, vld1q(pTempSrc)); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCur += 4; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc += 4; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(pSamples); 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vmulq(vecIn0, c0); 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[1]); 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[2]); 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[3]); 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[4]); 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[5]); 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[6]); 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[7]); 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSamples += 8; 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** numCnt = ((int32_t)numTaps - 8) / 8; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** for (i = 0; i < numCnt; i++) 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *pCoeffsCur++; 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c1 = *pCoeffsCur++; 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c2 = *pCoeffsCur++; 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c3 = *pCoeffsCur++; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c4 = *pCoeffsCur++; 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c5 = *pCoeffsCur++; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c6 = *pCoeffsCur++; 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c7 = *pCoeffsCur++; 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(pSamples); 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c0); 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[1]); 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[2]); 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[3]); ARM GAS /tmp/ccJrAs6S.s page 1005 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[4]); 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[5]); 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[6]); 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[7]); 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSamples += 8; 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** numCnt = ((int32_t)numTaps - 8) & 7; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (numCnt > 0) 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *pCoeffsCur++; 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(pSamples); 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c0); 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSamples ++; 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** numCnt --; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q(pOutput, vecAcc0); 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pOutput += 4; 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSamples = pSamples - numTaps + 4; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt--; 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = blockSize & 3; 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** if (blkCnt > 0U) 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** int32_t i; 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pCoeffsCur = pCoeffs; 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q(pStateCur, vld1q(pTempSrc)); 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCur += 4; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc += 4; 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *pCoeffsCur++; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c1 = *pCoeffsCur++; 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c2 = *pCoeffsCur++; 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c3 = *pCoeffsCur++; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c4 = *pCoeffsCur++; 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c5 = *pCoeffsCur++; 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c6 = *pCoeffsCur++; 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c7 = *pCoeffsCur++; 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(pSamples); ARM GAS /tmp/ccJrAs6S.s page 1006 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vmulq(vecIn0, c0); 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[1]); 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[2]); 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[3]); 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[4]); 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[5]); 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[6]); 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[7]); 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSamples += 8; 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** numCnt = ((int32_t)numTaps - 8) / 8; 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** for (i = 0; i < numCnt; i++) 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *pCoeffsCur++; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c1 = *pCoeffsCur++; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c2 = *pCoeffsCur++; 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c3 = *pCoeffsCur++; 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c4 = *pCoeffsCur++; 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c5 = *pCoeffsCur++; 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c6 = *pCoeffsCur++; 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c7 = *pCoeffsCur++; 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(pSamples); 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c0); 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[1]); 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[2]); 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[3]); 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[4]); 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[5]); 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[6]); ARM GAS /tmp/ccJrAs6S.s page 1007 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(&pSamples[7]); 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSamples += 8; 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** numCnt = ((int32_t)numTaps - 8) & 7; 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (numCnt > 0) 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *pCoeffsCur++; 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecIn0 = vld1q(pSamples); 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vecAcc0 = vfmaq(vecAcc0, vecIn0, c0); 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSamples ++; 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** numCnt --; 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vstrwq_p_f32(pOutput, vecAcc0, p0); 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** else 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *px; /* Temporary pointer for state buffer */ 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pb; /* Temporary pointer for coefficient buffer 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t acc0; /* Accumulator */ 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t i, blkCnt; /* Loop counters */ 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = blockSize; 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (blkCnt > 0U) 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Copy one sample at a time into state buffer */ 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pSrc++; 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Set the accumulator to zero */ 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 = 0.0f; 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Initialize state pointer */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** px = pState; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Initialize Coefficient pointer */ 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pb = pCoeffs; 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** i = numTaps; 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulates */ 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (i > 0U) 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 += *px++ * *pb++; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** i--; ARM GAS /tmp/ccJrAs6S.s page 1008 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Store result in destination buffer. */ 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pDst++ = acc0; 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Advance state pointer by 1 for the next sample */ 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pState = pState + 1U; 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Decrement loop counter */ 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt--; 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * Copy the samples back into the history buffer start 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc = &S->pState[blockSize]; 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempDest = S->pState; 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = numTaps >> 2; 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (blkCnt > 0U) 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q(pTempDest, vld1q(pTempSrc)); 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempSrc += 4; 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pTempDest += 4; 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt--; 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = numTaps & 3; 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** if (blkCnt > 0U) 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vstrwq_p_f32(pTempDest, vld1q(pTempSrc), p0); 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #else 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #if defined(ARM_MATH_NEON) 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** void arm_fir_f32( 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const arm_fir_instance_f32 * S, 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t * pSrc, 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t * pDst, 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t blockSize) 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pState = S->pState; /* State pointer */ 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state */ 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *px; /* Temporary pointers for state buffer */ 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pb; /* Temporary pointers for coefficient buffer */ 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t i, tapCnt, blkCnt; /* Loop counters */ 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32x4_t accv0,accv1,samples0,samples1,x0,x1,x2,xa,xb,b; 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t acc; 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1009 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* pStateCurnt points to the location where the new input data should be written */ 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Loop unrolling */ 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = blockSize >> 3; 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (blkCnt > 0U) 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Copy 8 samples at a time into state buffers */ 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** samples0 = vld1q_f32(pSrc); 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q_f32(pStateCurnt,samples0); 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCurnt += 4; 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSrc += 4 ; 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** samples1 = vld1q_f32(pSrc); 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q_f32(pStateCurnt,samples1); 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCurnt += 4; 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pSrc += 4 ; 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Set the accumulators to zero */ 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv0 = vdupq_n_f32(0); 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv1 = vdupq_n_f32(0); 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Initialize state pointer */ 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** px = pState; 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Initialize coefficient pointer */ 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pb = pCoeffs; 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Loop unroling */ 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** i = numTaps >> 2; 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulates */ 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x0 = vld1q_f32(px); 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x1 = vld1q_f32(px + 4); 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while(i > 0) 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x2 = vld1q_f32(px + 8); 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** b = vld1q_f32(pb); 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xa = x0; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xb = x1; 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv0 = vmlaq_n_f32(accv0,xa,vgetq_lane_f32(b, 0)); 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv1 = vmlaq_n_f32(accv1,xb,vgetq_lane_f32(b, 0)); 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xa = vextq_f32(x0,x1,1); 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xb = vextq_f32(x1,x2,1); 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv0 = vmlaq_n_f32(accv0,xa,vgetq_lane_f32(b, 1)); 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv1 = vmlaq_n_f32(accv1,xb,vgetq_lane_f32(b, 1)); 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xa = vextq_f32(x0,x1,2); 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xb = vextq_f32(x1,x2,2); ARM GAS /tmp/ccJrAs6S.s page 1010 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv0 = vmlaq_n_f32(accv0,xa,vgetq_lane_f32(b, 2)); 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv1 = vmlaq_n_f32(accv1,xb,vgetq_lane_f32(b, 2)); 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xa = vextq_f32(x0,x1,3); 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xb = vextq_f32(x1,x2,3); 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv0 = vmlaq_n_f32(accv0,xa,vgetq_lane_f32(b, 3)); 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv1 = vmlaq_n_f32(accv1,xb,vgetq_lane_f32(b, 3)); 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pb += 4; 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x0 = x1; 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x1 = x2; 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** px += 4; 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** i--; 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Tail */ 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** i = numTaps & 3; 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x2 = vld1q_f32(px + 8); 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulates */ 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** switch(i) 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** case 3: 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv0 = vmlaq_n_f32(accv0,x0,*pb); 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv1 = vmlaq_n_f32(accv1,x1,*pb); 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pb++; 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xa = vextq_f32(x0,x1,1); 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xb = vextq_f32(x1,x2,1); 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv0 = vmlaq_n_f32(accv0,xa,*pb); 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv1 = vmlaq_n_f32(accv1,xb,*pb); 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pb++; 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xa = vextq_f32(x0,x1,2); 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xb = vextq_f32(x1,x2,2); 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv0 = vmlaq_n_f32(accv0,xa,*pb); 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv1 = vmlaq_n_f32(accv1,xb,*pb); 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** break; 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** case 2: 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv0 = vmlaq_n_f32(accv0,x0,*pb); 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv1 = vmlaq_n_f32(accv1,x1,*pb); 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pb++; 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xa = vextq_f32(x0,x1,1); 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** xb = vextq_f32(x1,x2,1); ARM GAS /tmp/ccJrAs6S.s page 1011 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv0 = vmlaq_n_f32(accv0,xa,*pb); 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv1 = vmlaq_n_f32(accv1,xb,*pb); 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** break; 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** case 1: 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv0 = vmlaq_n_f32(accv0,x0,*pb); 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** accv1 = vmlaq_n_f32(accv1,x1,*pb); 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** break; 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** default: 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** break; 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* The result is stored in the destination buffer. */ 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q_f32(pDst,accv0); 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pDst += 4; 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** vst1q_f32(pDst,accv1); 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pDst += 4; 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Advance state pointer by 8 for the next 8 samples */ 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pState = pState + 8; 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt--; 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Tail */ 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = blockSize & 0x7; 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (blkCnt > 0U) 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Copy one sample at a time into state buffer */ 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pSrc++; 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Set the accumulator to zero */ 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc = 0.0f; 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Initialize state pointer */ 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** px = pState; 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Initialize Coefficient pointer */ 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pb = pCoeffs; 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** i = numTaps; 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulates */ 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** do 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc += *px++ * *pb++; 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** i--; 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } while (i > 0U); ARM GAS /tmp/ccJrAs6S.s page 1012 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* The result is stored in the destination buffer. */ 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pDst++ = acc; 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Advance state pointer by 1 for the next sample */ 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pState = pState + 1; 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt--; 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Processing is complete. 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** ** Now copy the last numTaps - 1 samples to the starting of the state buffer. 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** ** This prepares the state buffer for the next function call. */ 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Points to the start of the state buffer */ 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCurnt = S->pState; 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Copy numTaps number of values */ 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** tapCnt = numTaps - 1U; 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Copy data */ 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (tapCnt > 0U) 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pState++; 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Decrement the loop counter */ 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** tapCnt--; 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #else 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** void arm_fir_f32( 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const arm_fir_instance_f32 * S, 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t * pSrc, 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t * pDst, 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t blockSize) 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 25383 .loc 54 934 0 25384 .cfi_startproc 25385 @ args = 0, pretend = 0, frame = 0 25386 @ frame_needed = 0, uses_anonymous_args = 0 25387 .LVL4106: 25388 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} 25389 .LCFI155: 25390 .cfi_def_cfa_offset 28 25391 .cfi_offset 4, -28 25392 .cfi_offset 5, -24 25393 .cfi_offset 6, -20 25394 .cfi_offset 7, -16 25395 .cfi_offset 8, -12 25396 .cfi_offset 9, -8 25397 .cfi_offset 14, -4 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pState = S->pState; /* State pointer */ 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *px; /* Temporary pointer for state buffer */ 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pb; /* Temporary pointer for coefficient buffer ARM GAS /tmp/ccJrAs6S.s page 1013 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t acc0; /* Accumulator */ 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 25398 .loc 54 941 0 25399 0004 0688 ldrh r6, [r0] 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state 25400 .loc 54 936 0 25401 0006 D0E90189 ldrd r8, r9, [r0, #4] 25402 .LVL4107: 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** uint32_t i, tapCnt, blkCnt; /* Loop counters */ 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t acc1, acc2, acc3, acc4, acc5, acc6, acc7; /* Accumulators */ 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t x0, x1, x2, x3, x4, x5, x6, x7; /* Temporary variables to hold stat 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** float32_t c0; /* Temporary variable to hold coeff 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #endif 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* pStateCurnt points to the location where the new input data should be written */ 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 25403 .loc 54 952 0 25404 000a 06F18047 add r7, r6, #1073741824 25405 000e 013F subs r7, r7, #1 25406 0010 08EB8707 add r7, r8, r7, lsl #2 25407 .LVL4108: 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Loop unrolling: Compute 8 output values simultaneously. 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * The variables acc0 ... acc7 hold output values that are being computed: 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n- 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n- 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n- 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n- 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = blockSize >> 3U; 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (blkCnt > 0U) 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Copy 4 new input samples into the state buffer. */ 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pSrc++; 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pSrc++; 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pSrc++; 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pSrc++; 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Set all accumulators to zero */ 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 = 0.0f; 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc1 = 0.0f; 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc2 = 0.0f; 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc3 = 0.0f; 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc4 = 0.0f; 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc5 = 0.0f; 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc6 = 0.0f; 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc7 = 0.0f; 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Initialize state pointer */ ARM GAS /tmp/ccJrAs6S.s page 1014 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** px = pState; 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Initialize coefficient pointer */ 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pb = pCoeffs; 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* This is separated from the others to avoid 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** * a call to __aeabi_memmove which would be slower 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** */ 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pSrc++; 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pSrc++; 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pSrc++; 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pSrc++; 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read the first 7 samples from the state buffer: x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x0 = *px++; 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x1 = *px++; 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x2 = *px++; 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x3 = *px++; 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x4 = *px++; 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x5 = *px++; 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x6 = *px++; 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Loop unrolling: process 8 taps at a time. */ 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** tapCnt = numTaps >> 3U; 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (tapCnt > 0U) 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read the b[numTaps-1] coefficient */ 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *(pb++); 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read x[n-numTaps-3] sample */ 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x7 = *(px++); 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* acc0 += b[numTaps-1] * x[n-numTaps] */ 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 += x0 * c0; 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* acc1 += b[numTaps-1] * x[n-numTaps-1] */ 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc1 += x1 * c0; 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* acc2 += b[numTaps-1] * x[n-numTaps-2] */ 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc2 += x2 * c0; 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* acc3 += b[numTaps-1] * x[n-numTaps-3] */ 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc3 += x3 * c0; 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* acc4 += b[numTaps-1] * x[n-numTaps-4] */ 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc4 += x4 * c0; 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* acc1 += b[numTaps-1] * x[n-numTaps-5] */ 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc5 += x5 * c0; 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* acc2 += b[numTaps-1] * x[n-numTaps-6] */ 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc6 += x6 * c0; 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* acc3 += b[numTaps-1] * x[n-numTaps-7] */ 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc7 += x7 * c0; 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1015 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read the b[numTaps-2] coefficient */ 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *(pb++); 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read x[n-numTaps-4] sample */ 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x0 = *(px++); 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulate */ 1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 += x1 * c0; 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc1 += x2 * c0; 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc2 += x3 * c0; 1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc3 += x4 * c0; 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc4 += x5 * c0; 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc5 += x6 * c0; 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc6 += x7 * c0; 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc7 += x0 * c0; 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read the b[numTaps-3] coefficient */ 1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *(pb++); 1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read x[n-numTaps-5] sample */ 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x1 = *(px++); 1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulates */ 1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 += x2 * c0; 1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc1 += x3 * c0; 1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc2 += x4 * c0; 1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc3 += x5 * c0; 1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc4 += x6 * c0; 1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc5 += x7 * c0; 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc6 += x0 * c0; 1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc7 += x1 * c0; 1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read the b[numTaps-4] coefficient */ 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *(pb++); 1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read x[n-numTaps-6] sample */ 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x2 = *(px++); 1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulates */ 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 += x3 * c0; 1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc1 += x4 * c0; 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc2 += x5 * c0; 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc3 += x6 * c0; 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc4 += x7 * c0; 1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc5 += x0 * c0; 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc6 += x1 * c0; 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc7 += x2 * c0; 1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read the b[numTaps-4] coefficient */ 1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *(pb++); 1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read x[n-numTaps-6] sample */ 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x3 = *(px++); 1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulates */ 1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 += x4 * c0; 1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc1 += x5 * c0; 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc2 += x6 * c0; ARM GAS /tmp/ccJrAs6S.s page 1016 1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc3 += x7 * c0; 1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc4 += x0 * c0; 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc5 += x1 * c0; 1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc6 += x2 * c0; 1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc7 += x3 * c0; 1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read the b[numTaps-4] coefficient */ 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *(pb++); 1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read x[n-numTaps-6] sample */ 1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x4 = *(px++); 1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulates */ 1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 += x5 * c0; 1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc1 += x6 * c0; 1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc2 += x7 * c0; 1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc3 += x0 * c0; 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc4 += x1 * c0; 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc5 += x2 * c0; 1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc6 += x3 * c0; 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc7 += x4 * c0; 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read the b[numTaps-4] coefficient */ 1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *(pb++); 1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read x[n-numTaps-6] sample */ 1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x5 = *(px++); 1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulates */ 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 += x6 * c0; 1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc1 += x7 * c0; 1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc2 += x0 * c0; 1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc3 += x1 * c0; 1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc4 += x2 * c0; 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc5 += x3 * c0; 1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc6 += x4 * c0; 1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc7 += x5 * c0; 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read the b[numTaps-4] coefficient */ 1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *(pb++); 1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read x[n-numTaps-6] sample */ 1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x6 = *(px++); 1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulates */ 1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 += x7 * c0; 1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc1 += x0 * c0; 1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc2 += x1 * c0; 1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc3 += x2 * c0; 1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc4 += x3 * c0; 1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc5 += x4 * c0; 1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc6 += x5 * c0; 1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc7 += x6 * c0; 1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Decrement loop counter */ 1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** tapCnt--; 1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } ARM GAS /tmp/ccJrAs6S.s page 1017 1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Loop unrolling: Compute remaining outputs */ 1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** tapCnt = numTaps % 0x8U; 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (tapCnt > 0U) 1162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 1163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Read coefficients */ 1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** c0 = *(pb++); 1165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Fetch 1 state variable */ 1167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x7 = *(px++); 1168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulates */ 1170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 += x0 * c0; 1171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc1 += x1 * c0; 1172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc2 += x2 * c0; 1173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc3 += x3 * c0; 1174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc4 += x4 * c0; 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc5 += x5 * c0; 1176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc6 += x6 * c0; 1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc7 += x7 * c0; 1178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Reuse the present sample states for next sample */ 1180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x0 = x1; 1181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x1 = x2; 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x2 = x3; 1183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x3 = x4; 1184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x4 = x5; 1185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x5 = x6; 1186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** x6 = x7; 1187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Decrement loop counter */ 1189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** tapCnt--; 1190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 1191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Advance the state pointer by 8 to process the next group of 8 samples */ 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pState = pState + 8; 1194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* The results in the 8 accumulators, store in the destination buffer. */ 1196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pDst++ = acc0; 1197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pDst++ = acc1; 1198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pDst++ = acc2; 1199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pDst++ = acc3; 1200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pDst++ = acc4; 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pDst++ = acc5; 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pDst++ = acc6; 1203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pDst++ = acc7; 1204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Decrement loop counter */ 1207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt--; 1208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Loop unrolling: Compute remaining output samples */ 1211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = blockSize % 0x8U; 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #else ARM GAS /tmp/ccJrAs6S.s page 1018 1214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Initialize blkCnt with number of taps */ 1216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt = blockSize; 1217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 1219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (blkCnt > 0U) 25408 .loc 54 1220 0 25409 0014 3BB3 cbz r3, .L1913 25410 0016 9C46 mov ip, r3 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 25411 .loc 54 935 0 25412 0018 C646 mov lr, r8 25413 .LVL4109: 25414 .L1910: 1221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Copy one sample at a time into state buffer */ 1223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pSrc++; 25415 .loc 54 1223 0 25416 001a 51F8040B ldr r0, [r1], #4 @ float 25417 .LVL4110: 25418 001e 47F8040B str r0, [r7], #4 @ float 25419 .LVL4111: 1224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Set the accumulator to zero */ 1226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 = 0.0f; 25420 .loc 54 1226 0 25421 0022 DFED127A vldr.32 s15, .L1922 1227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Initialize state pointer */ 1229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** px = pState; 1230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Initialize Coefficient pointer */ 1232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pb = pCoeffs; 1233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** i = numTaps; 1235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Perform the multiply-accumulates */ 1237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (i > 0U) 25422 .loc 54 1237 0 25423 0026 56B1 cbz r6, .L1908 25424 0028 3046 mov r0, r6 1232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 25425 .loc 54 1232 0 25426 002a 4D46 mov r5, r9 25427 .loc 54 1237 0 25428 002c 7446 mov r4, lr 25429 .LVL4112: 25430 .L1909: 1238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 1239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n- 1240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** acc0 += *px++ * *pb++; 25431 .loc 54 1240 0 25432 002e F4EC016A vldmia.32 r4!, {s13} 25433 .LVL4113: 25434 0032 B5EC017A vldmia.32 r5!, {s14} 25435 .LVL4114: ARM GAS /tmp/ccJrAs6S.s page 1019 1237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 25436 .loc 54 1237 0 25437 0036 0138 subs r0, r0, #1 25438 .LVL4115: 25439 .loc 54 1240 0 25440 0038 E6EE877A vfma.f32 s15, s13, s14 25441 .LVL4116: 1237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 25442 .loc 54 1237 0 25443 003c F7D1 bne .L1909 25444 .LVL4117: 25445 .L1908: 1220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 25446 .loc 54 1220 0 25447 003e BCF1010C subs ip, ip, #1 25448 .LVL4118: 1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** i--; 1243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 1244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Store result in destination buffer. */ 1246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pDst++ = acc0; 25449 .loc 54 1246 0 25450 0042 E2EC017A vstmia.32 r2!, {s15} 25451 .LVL4119: 1247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Advance state pointer by 1 for the next sample */ 1249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pState = pState + 1U; 25452 .loc 54 1249 0 25453 0046 0EF1040E add lr, lr, #4 25454 .LVL4120: 1220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 25455 .loc 54 1220 0 25456 004a E6D1 bne .L1910 25457 004c 08EB8301 add r1, r8, r3, lsl #2 25458 .LVL4121: 25459 .L1907: 1250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Decrement loop counter */ 1252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** blkCnt--; 1253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 1254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Processing is complete. 1256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** Now copy the last numTaps - 1 samples to the start of the state buffer. 1257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** This prepares the state buffer for the next function call. */ 1258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Points to the start of the state buffer */ 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** pStateCurnt = S->pState; 1261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 1263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Loop unrolling: Compute 4 taps at a time */ 1265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** tapCnt = (numTaps - 1U) >> 2U; 1266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Copy data */ 1268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (tapCnt > 0U) 1269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { ARM GAS /tmp/ccJrAs6S.s page 1020 1270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pState++; 1271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pState++; 1272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pState++; 1273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pState++; 1274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Decrement loop counter */ 1276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** tapCnt--; 1277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 1278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Calculate remaining number of copies */ 1280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** tapCnt = (numTaps - 1U) % 0x4U; 1281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #else 1283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Initialize tapCnt with number of taps */ 1285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** tapCnt = (numTaps - 1U); 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 1288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Copy remaining data */ 1290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** while (tapCnt > 0U) 25460 .loc 54 1290 0 25461 0050 731E subs r3, r6, #1 25462 .LVL4122: 25463 0052 06D0 beq .L1906 25464 0054 4246 mov r2, r8 25465 .LVL4123: 25466 .L1912: 1291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 1292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** *pStateCurnt++ = *pState++; 25467 .loc 54 1292 0 25468 0056 51F8040B ldr r0, [r1], #4 @ float 25469 .LVL4124: 25470 005a 42F8040B str r0, [r2], #4 @ float 1290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** { 25471 .loc 54 1290 0 25472 005e 013B subs r3, r3, #1 25473 .LVL4125: 25474 0060 F9D1 bne .L1912 25475 .LVL4126: 25476 .L1906: 1293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** /* Decrement loop counter */ 1295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** tapCnt--; 1296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 1297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** 1298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** } 25477 .loc 54 1298 0 25478 0062 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} 25479 .LVL4127: 25480 .L1913: 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 25481 .loc 54 935 0 25482 0066 4146 mov r1, r8 25483 .LVL4128: 25484 0068 F2E7 b .L1907 25485 .L1923: ARM GAS /tmp/ccJrAs6S.s page 1021 25486 006a 00BF .align 2 25487 .L1922: 25488 006c 00000000 .word 0 25489 .cfi_endproc 25490 .LFE199: 25492 .section .text.arm_fir_fast_q15,"ax",%progbits 25493 .align 1 25494 .p2align 2,,3 25495 .global arm_fir_fast_q15 25496 .syntax unified 25497 .thumb 25498 .thumb_func 25499 .fpu fpv4-sp-d16 25501 arm_fir_fast_q15: 25502 .LFB200: 25503 .file 55 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * Title: arm_fir_fast_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * Description: Q15 Fast FIR filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** @addtogroup FIR 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** @brief Processing function for the Q15 FIR filter (fast version). ARM GAS /tmp/ccJrAs6S.s page 1022 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** @param[in] S points to an instance of the Q15 FIR filter structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** This fast version uses a 32-bit accumulator with 2.30 format. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** The accumulator maintains full precision of the intermediate multiplication resu 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** Thus, if the accumulator result overflows it wraps around and distorts the resul 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** In order to avoid overflows completely the input signal must be scaled down by l 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** @remark 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** Refer to \ref arm_fir_q15() for a slower implementation of this function which u 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** Use function \ref arm_fir_init_q15() to initialize the filter structure. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** void arm_fir_fast_q15( 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** const arm_fir_instance_q15 * S, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** const q15_t * pSrc, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** q15_t * pDst, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** uint32_t blockSize) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 25504 .loc 55 65 0 25505 .cfi_startproc 25506 @ args = 0, pretend = 0, frame = 16 25507 @ frame_needed = 0, uses_anonymous_args = 0 25508 .LVL4129: 25509 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 25510 .LCFI156: 25511 .cfi_def_cfa_offset 36 25512 .cfi_offset 4, -36 25513 .cfi_offset 5, -32 25514 .cfi_offset 6, -28 25515 .cfi_offset 7, -24 25516 .cfi_offset 8, -20 25517 .cfi_offset 9, -16 25518 .cfi_offset 10, -12 25519 .cfi_offset 11, -8 25520 .cfi_offset 14, -4 25521 0004 85B0 sub sp, sp, #20 25522 .LCFI157: 25523 .cfi_def_cfa_offset 56 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** q15_t *pState = S->pState; /* State pointer */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** q15_t *px; /* Temporary pointer for state buffer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** const q15_t *pb; /* Temporary pointer for coefficient buffer 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** q31_t acc0; /* Accumulators */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 25524 .loc 55 72 0 25525 0006 0488 ldrh r4, [r0] 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** q31_t acc1, acc2, acc3; /* Accumulators */ ARM GAS /tmp/ccJrAs6S.s page 1023 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** q31_t x0, x1, x2, c0; /* Temporary variables to hold state and coe 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #endif 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* pStateCurnt points to the location where the new input data should be written */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Loop unrolling: Compute 4 output values simultaneously. 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * The variables acc0 ... acc3 hold output values that are being computed: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n- 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n- 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n- 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n- 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** blkCnt = blockSize >> 2U; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** while (blkCnt > 0U) 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Copy 4 new input samples into the state buffer. */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** *pStateCurnt++ = *pSrc++; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** *pStateCurnt++ = *pSrc++; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** *pStateCurnt++ = *pSrc++; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** *pStateCurnt++ = *pSrc++; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Set all accumulators to zero */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc0 = 0; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc1 = 0; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc2 = 0; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc3 = 0; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** px = pState; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** pb = pCoeffs; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x0 = read_q15x2_ia (&px); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x2 = read_q15x2_ia (&px); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Loop over the number of taps. Unroll by a factor of 4. 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** Repeat until we've computed numTaps-(numTaps%4) coefficients. */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** tapCnt = numTaps >> 2U; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** while (tapCnt > 0U) 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** c0 = read_q15x2_ia ((q15_t **) &pb); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc0 = __SMLAD(x0, c0, acc0); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1024 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* acc2 += b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc2 = __SMLAD(x2, c0, acc2); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* pack x[n-N-1] and x[n-N-2] */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x1 = __PKHBT(x2, x0, 0); 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #else 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x1 = __PKHBT(x0, x2, 0); 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #endif 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Read state x[n-N-4], x[n-N-5] */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x0 = read_q15x2_ia (&px); 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc1 = __SMLADX(x1, c0, acc1); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* pack x[n-N-3] and x[n-N-4] */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x1 = __PKHBT(x0, x2, 0); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #else 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x1 = __PKHBT(x2, x0, 0); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #endif 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* acc3 += b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc3 = __SMLADX(x1, c0, acc3); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Read coefficients b[N-2], b[N-3] */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** c0 = read_q15x2_ia ((q15_t **) &pb); 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc0 = __SMLAD(x2, c0, acc0); 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Read state x[n-N-6], x[n-N-7] with offset */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x2 = read_q15x2_ia (&px); 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc2 = __SMLAD(x0, c0, acc2); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* acc1 += b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc1 = __SMLADX(x1, c0, acc1); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* pack x[n-N-5] and x[n-N-6] */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x1 = __PKHBT(x2, x0, 0); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #else 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x1 = __PKHBT(x0, x2, 0); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #endif 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc3 = __SMLADX(x1, c0, acc3); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Decrement tap count */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** tapCnt--; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** } 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* If the filter length is not a multiple of 4, compute the remaining filter taps. 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** This is always be 2 taps since the filter length is even. */ ARM GAS /tmp/ccJrAs6S.s page 1025 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** if ((numTaps & 0x3U) != 0U) 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Read last two coefficients */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** c0 = read_q15x2_ia ((q15_t **) &pb); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Perform the multiply-accumulates */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc0 = __SMLAD(x0, c0, acc0); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc2 = __SMLAD(x2, c0, acc2); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* pack state variables */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x1 = __PKHBT(x2, x0, 0); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #else 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x1 = __PKHBT(x0, x2, 0); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #endif 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Read last state variables */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x0 = read_q15x2 (px); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Perform the multiply-accumulates */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc1 = __SMLADX(x1, c0, acc1); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* pack state variables */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x1 = __PKHBT(x0, x2, 0); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #else 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** x1 = __PKHBT(x2, x0, 0); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #endif 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Perform the multiply-accumulates */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc3 = __SMLADX(x1, c0, acc3); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** } 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation. 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** Then store the 4 outputs in the destination buffer. */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #else 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Advance the state pointer by 4 to process the next group of 4 samples */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** pState = pState + 4U; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Decrement loop counter */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** blkCnt--; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** } 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Loop unrolling: Compute remaining output samples */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** blkCnt = blockSize % 0x4U; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #else 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Initialize blkCnt with number of taps */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** blkCnt = blockSize; ARM GAS /tmp/ccJrAs6S.s page 1026 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** while (blkCnt > 0U) 25526 .loc 55 251 0 25527 0008 0393 str r3, [sp, #12] 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state 25528 .loc 55 67 0 25529 000a D0E901A5 ldrd r10, r5, [r0, #4] 25530 .LVL4130: 25531 .loc 55 251 0 25532 000e 002B cmp r3, #0 25533 0010 00F09280 beq .L1936 25534 0014 04F10040 add r0, r4, #-2147483648 25535 .LVL4131: 25536 0018 0138 subs r0, r0, #1 25537 .LVL4132: 25538 001a 4000 lsls r0, r0, #1 25539 .LVL4133: 25540 001c 0238 subs r0, r0, #2 25541 001e 0AEB000E add lr, r10, r0 25542 0022 05F1040B add fp, r5, #4 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Copy two samples into state buffer */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** *pStateCurnt++ = *pSrc++; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Set the accumulator to zero */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc0 = 0; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Use SIMD to hold states and coefficients */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** px = pState; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** pb = pCoeffs; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** tapCnt = numTaps >> 1U; 25543 .loc 55 263 0 25544 0026 6008 lsrs r0, r4, #1 25545 0028 0AF10409 add r9, r10, #4 25546 002c 9846 mov r8, r3 25547 002e 5546 mov r5, r10 25548 .LVL4134: 25549 .L1927: 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 25550 .loc 55 254 0 25551 0030 31F9023B ldrsh r3, [r1], #2 25552 .LVL4135: 25553 0034 2EF8023F strh r3, [lr, #2]! @ movhi 25554 .LVL4136: 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 25555 .loc 55 257 0 25556 0038 CDE90112 strd r1, r2, [sp, #4] 25557 .loc 55 263 0 25558 003c 8446 mov ip, r0 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 25559 .loc 55 257 0 25560 003e 8246 mov r10, r0 25561 0040 5F46 mov r7, fp 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1027 25562 .loc 55 254 0 25563 0042 4E46 mov r6, r9 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 25564 .loc 55 257 0 25565 0044 0023 movs r3, #0 25566 0046 2046 mov r0, r4 25567 .LVL4137: 25568 .L1926: 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** do 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc0 += (q31_t) *px++ * *pb++; 25569 .loc 55 267 0 discriminator 1 25570 0048 36F8042C ldrh r2, [r6, #-4] 25571 004c 37F8041C ldrh r1, [r7, #-4] 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc0 += (q31_t) *px++ * *pb++; 25572 .loc 55 268 0 discriminator 1 25573 0050 36F8024C ldrh r4, [r6, #-2] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** acc0 += (q31_t) *px++ * *pb++; 25574 .loc 55 267 0 discriminator 1 25575 0054 12FB0133 smlabb r3, r2, r1, r3 25576 .LVL4138: 25577 .loc 55 268 0 discriminator 1 25578 0058 37F8022C ldrh r2, [r7, #-2] 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** tapCnt--; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** } 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** while (tapCnt > 0U); 25579 .loc 55 272 0 discriminator 1 25580 005c BCF1010C subs ip, ip, #1 25581 .LVL4139: 25582 0060 06F10406 add r6, r6, #4 25583 .LVL4140: 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 25584 .loc 55 268 0 discriminator 1 25585 0064 14FB0233 smlabb r3, r4, r2, r3 25586 .LVL4141: 25587 0068 07F10407 add r7, r7, #4 25588 .loc 55 272 0 discriminator 1 25589 006c ECD1 bne .L1926 25590 .LVL4142: 25591 006e DDE90112 ldrd r1, r2, [sp, #4] 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 25592 .loc 55 251 0 25593 0072 B8F10108 subs r8, r8, #1 25594 .LVL4143: 25595 0076 0446 mov r4, r0 25596 .LBB2295: 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* The result is in 2.30 format. Convert to 1.15 with saturation. 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** Then store the output in the destination buffer. */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); 25597 .loc 55 276 0 25598 0078 4FEAE333 asr r3, r3, #15 25599 .LVL4144: 25600 007c 5046 mov r0, r10 25601 .LVL4145: ARM GAS /tmp/ccJrAs6S.s page 1028 25602 .syntax unified 25603 @ 276 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c" 1 25604 007e 03F30F03 ssat r3, #16, r3 25605 @ 0 "" 2 25606 .LVL4146: 25607 .thumb 25608 .syntax unified 25609 0082 09F10209 add r9, r9, #2 25610 .LBE2295: 25611 0086 22F8023B strh r3, [r2], #2 @ movhi 25612 .LVL4147: 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 25613 .loc 55 251 0 25614 008a D1D1 bne .L1927 25615 008c 039B ldr r3, [sp, #12] 25616 .LVL4148: 25617 008e AA46 mov r10, r5 25618 0090 05EB4303 add r3, r5, r3, lsl #1 25619 .LVL4149: 25620 .L1925: 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Advance state pointer by 1 for the next sample */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** pState = pState + 1U; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Decrement loop counter */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** blkCnt--; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** } 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Processing is complete. 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** Now copy the last numTaps - 1 samples to the start of the state buffer. 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** This prepares the state buffer for the next function call. */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Points to the start of the state buffer */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** pStateCurnt = S->pState; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Loop unrolling: Compute 4 taps at a time */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** tapCnt = (numTaps - 1U) >> 2U; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Copy data */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** while (tapCnt > 0U) 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** *pStateCurnt++ = *pState++; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** *pStateCurnt++ = *pState++; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** *pStateCurnt++ = *pState++; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** *pStateCurnt++ = *pState++; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Decrement loop counter */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** tapCnt--; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** } 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Calculate remaining number of copies */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** tapCnt = (numTaps - 1U) % 0x4U; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #else 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1029 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Initialize tapCnt with number of taps */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** tapCnt = (numTaps - 1U); 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Copy remaining data */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** while (tapCnt > 0U) 25621 .loc 55 320 0 25622 0094 611E subs r1, r4, #1 25623 .LVL4150: 25624 0096 3DD0 beq .L1924 25625 0098 1A1D adds r2, r3, #4 25626 .LVL4151: 25627 009a 0AF10400 add r0, r10, #4 25628 009e 8342 cmp r3, r0 25629 00a0 38BF it cc 25630 00a2 9245 cmpcc r10, r2 25631 00a4 3DD3 bcc .L1929 25632 00a6 0D29 cmp r1, #13 25633 00a8 3BD9 bls .L1929 25634 00aa C3F34002 ubfx r2, r3, #1, #1 25635 00ae 002A cmp r2, #0 25636 00b0 A4F10200 sub r0, r4, #2 25637 00b4 0CBF ite eq 25638 00b6 0124 moveq r4, #1 25639 .LVL4152: 25640 00b8 0224 movne r4, #2 25641 00ba A042 cmp r0, r4 25642 00bc 20D3 bcc .L1930 25643 00be 62B3 cbz r2, .L1937 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** *pStateCurnt++ = *pState++; 25644 .loc 55 322 0 25645 00c0 B3F90040 ldrsh r4, [r3] 25646 00c4 AAF80040 strh r4, [r10] @ movhi 25647 00c8 9E1C adds r6, r3, #2 25648 .LVL4153: 25649 00ca 0AF10205 add r5, r10, #2 25650 .LVL4154: 25651 .L1931: 25652 00ce 8C1A subs r4, r1, r2 25653 00d0 A11E subs r1, r4, #2 25654 .LVL4155: 25655 00d2 5200 lsls r2, r2, #1 25656 00d4 4908 lsrs r1, r1, #1 25657 00d6 1344 add r3, r3, r2 25658 00d8 9244 add r10, r10, r2 25659 00da 0131 adds r1, r1, #1 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 25660 .loc 55 320 0 25661 00dc 0022 movs r2, #0 25662 .LVL4156: 25663 .L1932: 25664 00de 0132 adds r2, r2, #1 25665 .loc 55 322 0 25666 00e0 53F8047B ldr r7, [r3], #4 25667 00e4 4AF8047B str r7, [r10], #4 @ unaligned ARM GAS /tmp/ccJrAs6S.s page 1030 25668 00e8 8A42 cmp r2, r1 25669 00ea F8D3 bcc .L1932 25670 00ec 4A00 lsls r2, r1, #1 25671 00ee 4FEA810A lsl r10, r1, #2 25672 00f2 9442 cmp r4, r2 25673 00f4 06EB0A03 add r3, r6, r10 25674 00f8 A0EB0201 sub r1, r0, r2 25675 00fc AA44 add r10, r10, r5 25676 00fe 09D0 beq .L1924 25677 .L1930: 25678 .LVL4157: 25679 0100 B3F90020 ldrsh r2, [r3] 25680 0104 AAF80020 strh r2, [r10] @ movhi 25681 .LVL4158: 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 25682 .loc 55 320 0 25683 0108 0129 cmp r1, #1 25684 010a 03D0 beq .L1924 25685 .LVL4159: 25686 .loc 55 322 0 25687 010c B3F90230 ldrsh r3, [r3, #2] 25688 .LVL4160: 25689 0110 AAF80230 strh r3, [r10, #2] @ movhi 25690 .LVL4161: 25691 .L1924: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** /* Decrement loop counter */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** tapCnt--; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** } 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** } 25692 .loc 55 328 0 25693 0114 05B0 add sp, sp, #20 25694 .LCFI158: 25695 .cfi_remember_state 25696 .cfi_def_cfa_offset 36 25697 @ sp needed 25698 0116 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 25699 .LVL4162: 25700 .L1937: 25701 .LCFI159: 25702 .cfi_restore_state 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 25703 .loc 55 320 0 25704 011a 0846 mov r0, r1 25705 .LVL4163: 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 25706 .loc 55 66 0 25707 011c 5546 mov r5, r10 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 25708 .loc 55 320 0 25709 011e 1E46 mov r6, r3 25710 0120 D5E7 b .L1931 25711 .LVL4164: 25712 .L1929: 25713 0122 AAF1020A sub r10, r10, #2 25714 .LVL4165: ARM GAS /tmp/ccJrAs6S.s page 1031 25715 .L1934: 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** 25716 .loc 55 322 0 25717 0126 33F9022B ldrsh r2, [r3], #2 25718 .LVL4166: 25719 012a 2AF8022F strh r2, [r10, #2]! @ movhi 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** { 25720 .loc 55 320 0 25721 012e 0139 subs r1, r1, #1 25722 .LVL4167: 25723 0130 F9D1 bne .L1934 25724 .loc 55 328 0 25725 0132 05B0 add sp, sp, #20 25726 .LCFI160: 25727 .cfi_remember_state 25728 .cfi_def_cfa_offset 36 25729 @ sp needed 25730 0134 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 25731 .LVL4168: 25732 .L1936: 25733 .LCFI161: 25734 .cfi_restore_state 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 25735 .loc 55 66 0 25736 0138 5346 mov r3, r10 25737 .LVL4169: 25738 013a ABE7 b .L1925 25739 .cfi_endproc 25740 .LFE200: 25742 .section .text.arm_fir_fast_q31,"ax",%progbits 25743 .align 1 25744 .p2align 2,,3 25745 .global arm_fir_fast_q31 25746 .syntax unified 25747 .thumb 25748 .thumb_func 25749 .fpu fpv4-sp-d16 25751 arm_fir_fast_q31: 25752 .LFB201: 25753 .file 56 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * Title: arm_fir_fast_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * Description: Processing function for the Q31 Fast FIR filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * not use this file except in compliance with the License. ARM GAS /tmp/ccJrAs6S.s page 1032 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** @addtogroup FIR 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** @brief Processing function for the Q31 FIR filter (fast version). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** @param[in] S points to an instance of the Q31 structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** This function is optimized for speed at the expense of fixed-point precision and 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** These intermediate results are added to a 2.30 accumulator. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** Finally, the accumulator is saturated and converted to a 1.31 result. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** The fast version has the same overflow behavior as the standard version and prov 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** In order to avoid overflows completely the input signal must be scaled down by l 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** @remark 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** Refer to \ref arm_fir_q31() for a slower implementation of this function which u 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** Use function \ref arm_fir_init_q31() to initialize the filter structure. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** IAR_ONLY_LOW_OPTIMIZATION_ENTER 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** void arm_fir_fast_q31( 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** const arm_fir_instance_q31 * S, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** const q31_t * pSrc, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** q31_t * pDst, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** uint32_t blockSize) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** { 25754 .loc 56 67 0 25755 .cfi_startproc 25756 @ args = 0, pretend = 0, frame = 8 25757 @ frame_needed = 0, uses_anonymous_args = 0 25758 .LVL4170: 25759 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 25760 .LCFI162: ARM GAS /tmp/ccJrAs6S.s page 1033 25761 .cfi_def_cfa_offset 36 25762 .cfi_offset 4, -36 25763 .cfi_offset 5, -32 25764 .cfi_offset 6, -28 25765 .cfi_offset 7, -24 25766 .cfi_offset 8, -20 25767 .cfi_offset 9, -16 25768 .cfi_offset 10, -12 25769 .cfi_offset 11, -8 25770 .cfi_offset 14, -4 25771 0004 83B0 sub sp, sp, #12 25772 .LCFI163: 25773 .cfi_def_cfa_offset 48 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** q31_t *pState = S->pState; /* State pointer */ 25774 .loc 56 68 0 25775 0006 4468 ldr r4, [r0, #4] 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** q31_t *pStateCurnt; /* Points to the current sample of the state 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** q31_t *px; /* Temporary pointer for state buffer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** const q31_t *pb; /* Temporary pointer for coefficient buffer 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** q31_t acc0; /* Accumulators */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 25776 .loc 56 74 0 25777 0008 B0F80080 ldrh r8, [r0] 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** q31_t *pState = S->pState; /* State pointer */ 25778 .loc 56 68 0 25779 000c 0094 str r4, [sp] 25780 .LVL4171: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 25781 .loc 56 69 0 25782 000e D0F80890 ldr r9, [r0, #8] 25783 .LVL4172: 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** uint32_t i, tapCnt, blkCnt; /* Loop counters */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** q31_t acc1, acc2, acc3; /* Accumulators */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coe 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** #endif 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* pStateCurnt points to the location where the new input data should be written */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Loop unrolling: Compute 4 output values simultaneously. 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * The variables acc0 ... acc3 hold output values that are being computed: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n- 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n- 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n- 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n- 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** blkCnt = blockSize >> 2U; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** while (blkCnt > 0U) 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** { ARM GAS /tmp/ccJrAs6S.s page 1034 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Copy 4 new input samples into the state buffer. */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pStateCurnt++ = *pSrc++; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pStateCurnt++ = *pSrc++; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pStateCurnt++ = *pSrc++; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pStateCurnt++ = *pSrc++; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Set all accumulators to zero */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** acc0 = 0; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** acc1 = 0; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** acc2 = 0; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** acc3 = 0; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Initialize state pointer */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** px = pState; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Initialize coefficient pointer */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** pb = pCoeffs; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Read the first 3 samples from the state buffer: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** * x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** x0 = *px++; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** x1 = *px++; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** x2 = *px++; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Loop unrolling. Process 4 taps at a time. */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** tapCnt = numTaps >> 2U; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Loop over the number of taps. Unroll by a factor of 4. 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** Repeat until we've computed numTaps-4 coefficients. */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** while (tapCnt > 0U) 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** { 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Read the b[numTaps] coefficient */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** c0 = *pb; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Read x[n-numTaps-3] sample */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** x3 = *px; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* acc0 += b[numTaps] * x[n-numTaps] */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc0, x0, c0); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* acc1 += b[numTaps] * x[n-numTaps-1] */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc1, x1, c0); 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* acc2 += b[numTaps] * x[n-numTaps-2] */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc2, x2, c0); 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* acc3 += b[numTaps] * x[n-numTaps-3] */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc3, x3, c0); 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Read the b[numTaps-1] coefficient */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** c0 = *(pb + 1U); 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Read x[n-numTaps-4] sample */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** x0 = *(px + 1U); 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Perform the multiply-accumulates */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc0, x1, c0); ARM GAS /tmp/ccJrAs6S.s page 1035 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc1, x2, c0); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc2, x3, c0); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc3, x0, c0); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Read the b[numTaps-2] coefficient */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** c0 = *(pb + 2U); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Read x[n-numTaps-5] sample */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** x1 = *(px + 2U); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Perform the multiply-accumulates */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc0, x2, c0); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc1, x3, c0); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc2, x0, c0); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc3, x1, c0); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Read the b[numTaps-3] coefficients */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** c0 = *(pb + 3U); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Read x[n-numTaps-6] sample */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** x2 = *(px + 3U); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Perform the multiply-accumulates */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc0, x3, c0); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc1, x0, c0); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc2, x1, c0); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc3, x2, c0); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* update coefficient pointer */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** pb += 4U; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** px += 4U; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Decrement loop counter */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** tapCnt--; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** } 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* If the filter length is not a multiple of 4, compute the remaining filter taps */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** tapCnt = numTaps % 0x4U; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** while (tapCnt > 0U) 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** { 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Read coefficients */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** c0 = *(pb++); 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Fetch 1 state variable */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** x3 = *(px++); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Perform the multiply-accumulates */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc0, x0, c0); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc1, x1, c0); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc2, x2, c0); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc3, x3, c0); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Reuse the present sample states for next sample */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** x0 = x1; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** x1 = x2; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** x2 = x3; ARM GAS /tmp/ccJrAs6S.s page 1036 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Decrement loop counter */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** tapCnt--; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** } 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* The results in the 4 accumulators are in 2.30 format. Convert to 1.31 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** Then store the 4 outputs in the destination buffer. */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pDst++ = (q31_t) (acc0 << 1); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pDst++ = (q31_t) (acc1 << 1); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pDst++ = (q31_t) (acc2 << 1); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pDst++ = (q31_t) (acc3 << 1); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Advance the state pointer by 4 to process the next group of 4 samples */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** pState = pState + 4U; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Decrement loop counter */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** blkCnt--; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** } 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Loop unrolling: Compute remaining output samples */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** blkCnt = blockSize % 0x4U; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** #else 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Initialize blkCnt with number of taps */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** blkCnt = blockSize; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** while (blkCnt > 0U) 25784 .loc 56 243 0 25785 0012 0193 str r3, [sp, #4] 25786 0014 E3B3 cbz r3, .L1961 25787 0016 8C46 mov ip, r1 25788 0018 08F18041 add r1, r8, #1073741824 25789 .LVL4173: 25790 001c 0139 subs r1, r1, #1 25791 .LVL4174: 25792 001e 8900 lsls r1, r1, #2 25793 .LVL4175: 25794 0020 0439 subs r1, r1, #4 25795 0022 6618 adds r6, r4, r1 25796 0024 9E46 mov lr, r3 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 25797 .loc 56 68 0 25798 0026 2746 mov r7, r4 25799 .LVL4176: 25800 .L1958: 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** { 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Copy one sample at a time into state buffer */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pStateCurnt++ = *pSrc++; 25801 .loc 56 246 0 25802 0028 5CF8043B ldr r3, [ip], #4 25803 .LVL4177: 25804 002c 46F8043F str r3, [r6, #4]! 25805 .LVL4178: 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1037 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Set the accumulator to zero */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** acc0 = 0; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Initialize state pointer */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** px = pState; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Initialize Coefficient pointer */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** pb = pCoeffs; 25806 .loc 56 255 0 25807 0030 4D46 mov r5, r9 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** i = numTaps; 25808 .loc 56 257 0 25809 0032 4346 mov r3, r8 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 25810 .loc 56 246 0 25811 0034 3C46 mov r4, r7 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 25812 .loc 56 249 0 25813 0036 4FF0000A mov r10, #0 25814 .LVL4179: 25815 .L1957: 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Perform the multiply-accumulates */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** do 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** { 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** multAcc_32x32_keep32_R(acc0, (*px++), (*pb++)); 25816 .loc 56 262 0 discriminator 1 25817 003a 5146 mov r1, r10 25818 003c 54F804BB ldr fp, [r4], #4 25819 .LVL4180: 25820 0040 55F804AB ldr r10, [r5], #4 25821 .LVL4181: 25822 0044 0020 movs r0, #0 25823 0046 CAFB0B01 smlal r0, r1, r10, fp 25824 004a 8246 mov r10, r0 25825 004c 1AF10040 adds r0, r10, #-2147483648 25826 0050 41F10001 adc r1, r1, #0 25827 .LVL4182: 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** i--; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** } while (i > 0U); 25828 .loc 56 264 0 discriminator 1 25829 0054 013B subs r3, r3, #1 25830 .LVL4183: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** i--; 25831 .loc 56 262 0 discriminator 1 25832 0056 8A46 mov r10, r1 25833 .LVL4184: 25834 .loc 56 264 0 discriminator 1 25835 0058 EFD1 bne .L1957 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* The result is in 2.30 format. Convert to 1.31 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** Then store the output in the destination buffer. */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pDst++ = (q31_t) (acc0 << 1); 25836 .loc 56 268 0 25837 005a 4B00 lsls r3, r1, #1 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** { ARM GAS /tmp/ccJrAs6S.s page 1038 25838 .loc 56 243 0 25839 005c BEF1010E subs lr, lr, #1 25840 .LVL4185: 25841 .loc 56 268 0 25842 0060 42F8043B str r3, [r2], #4 25843 .LVL4186: 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Advance state pointer by 1 for the next sample */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** pState = pState + 1U; 25844 .loc 56 271 0 25845 0064 07F10407 add r7, r7, #4 25846 .LVL4187: 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** { 25847 .loc 56 243 0 25848 0068 DED1 bne .L1958 25849 006a DDE90032 ldrd r3, r2, [sp] 25850 .LVL4188: 25851 006e 03EB8202 add r2, r3, r2, lsl #2 25852 .LVL4189: 25853 .L1956: 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Decrement loop counter */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** blkCnt--; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** } 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Processing is complete. 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** Now copy the last numTaps - 1 samples to the start of the state buffer. 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** This prepares the state buffer for the next function call. */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Points to the start of the state buffer */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** pStateCurnt = S->pState; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Loop unrolling: Compute 4 taps at a time */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** tapCnt = (numTaps - 1U) >> 2U; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Copy data */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** while (tapCnt > 0U) 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** { 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pStateCurnt++ = *pState++; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pStateCurnt++ = *pState++; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pStateCurnt++ = *pState++; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pStateCurnt++ = *pState++; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Decrement loop counter */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** tapCnt--; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** } 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Calculate remaining number of copies */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** tapCnt = (numTaps - 1U) % 0x4U; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** #else 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Initialize tapCnt with number of taps */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** tapCnt = (numTaps - 1U); 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1039 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Copy remaining data */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** while (tapCnt > 0U) 25854 .loc 56 312 0 25855 0072 B8F10108 subs r8, r8, #1 25856 .LVL4190: 25857 0076 08D0 beq .L1955 25858 0078 009B ldr r3, [sp] 25859 007a 043B subs r3, r3, #4 25860 .LVL4191: 25861 .L1960: 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** { 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** *pStateCurnt++ = *pState++; 25862 .loc 56 314 0 25863 007c 52F8041B ldr r1, [r2], #4 25864 .LVL4192: 25865 0080 43F8041F str r1, [r3, #4]! 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** { 25866 .loc 56 312 0 25867 0084 B8F10108 subs r8, r8, #1 25868 .LVL4193: 25869 0088 F8D1 bne .L1960 25870 .LVL4194: 25871 .L1955: 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** /* Decrement the loop counter */ 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** tapCnt--; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** } 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c **** } 25872 .loc 56 320 0 25873 008a 03B0 add sp, sp, #12 25874 .LCFI164: 25875 .cfi_remember_state 25876 .cfi_def_cfa_offset 36 25877 @ sp needed 25878 008c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 25879 .LVL4195: 25880 .L1961: 25881 .LCFI165: 25882 .cfi_restore_state 25883 0090 2246 mov r2, r4 25884 .LVL4196: 25885 0092 EEE7 b .L1956 25886 .cfi_endproc 25887 .LFE201: 25889 .section .text.arm_fir_init_f32,"ax",%progbits 25890 .align 1 25891 .p2align 2,,3 25892 .global arm_fir_init_f32 25893 .syntax unified 25894 .thumb 25895 .thumb_func 25896 .fpu fpv4-sp-d16 25898 arm_fir_init_f32: 25899 .LFB202: ARM GAS /tmp/ccJrAs6S.s page 1040 25900 .file 57 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * Title: arm_fir_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * Description: Floating-point FIR filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @addtogroup FIR 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @brief Initialization function for the floating-point FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @param[in,out] S points to an instance of the floating-point FIR filter structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @param[in] numTaps number of filter coefficients in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @param[in] pCoeffs points to the filter coefficients buffer 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @param[in] pState points to the state buffer 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @param[in] blockSize number of samples processed per call 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @par Details 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** pCoeffs points to the array of filter coefficients stored in time r 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** 
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c ****       {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @par 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** pState points to the array of state variables. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** pState is of length numTaps+blockSize-1 samples, where ARM GAS /tmp/ccJrAs6S.s page 1041 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** @par Initialization of Helium version 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** For Helium version the array of coefficients must be a multiple of 16 even if less 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** then 16 coefficients are used. The additional coefficients must be set to 0. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** It does not mean that all the coefficients will be used in the filter (numTaps 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** is still set to its right value in the init function.) It just means that 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** the implementation may require to read more coefficients due to the vectorization 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** to avoid having to manage too many different cases in the code. 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** void arm_fir_init_f32( 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** arm_fir_instance_f32 * S, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** uint16_t numTaps, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** const float32_t * pCoeffs, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** float32_t * pState, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** uint32_t blockSize) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** { 25901 .loc 57 73 0 25902 .cfi_startproc 25903 @ args = 4, pretend = 0, frame = 0 25904 @ frame_needed = 0, uses_anonymous_args = 0 25905 .LVL4197: 25906 0000 38B5 push {r3, r4, r5, lr} 25907 .LCFI166: 25908 .cfi_def_cfa_offset 16 25909 .cfi_offset 3, -16 25910 .cfi_offset 4, -12 25911 .cfi_offset 5, -8 25912 .cfi_offset 14, -4 25913 .loc 57 73 0 25914 0002 049C ldr r4, [sp, #16] 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** /* Assign filter taps */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** S->numTaps = numTaps; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** /* Assign coefficient pointer */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** S->pCoeffs = pCoeffs; 25915 .loc 57 78 0 25916 0004 8260 str r2, [r0, #8] 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** /* Clear state buffer. The size is always (blockSize + numTaps - 1) */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t)); 25917 .loc 57 81 0 25918 0006 04F18044 add r4, r4, #1073741824 25919 000a 013C subs r4, r4, #1 25920 000c 0C44 add r4, r4, r1 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** 25921 .loc 57 75 0 25922 000e 0180 strh r1, [r0] @ movhi 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** /* Assign filter taps */ 25923 .loc 57 73 0 25924 0010 0546 mov r5, r0 25925 .loc 57 81 0 25926 0012 A200 lsls r2, r4, #2 25927 .LVL4198: 25928 0014 1846 mov r0, r3 25929 .LVL4199: 25930 0016 0021 movs r1, #0 ARM GAS /tmp/ccJrAs6S.s page 1042 25931 .LVL4200: 25932 0018 FFF7FEFF bl memset 25933 .LVL4201: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** /* Assign state pointer */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** S->pState = pState; 25934 .loc 57 84 0 25935 001c 6860 str r0, [r5, #4] 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c **** } 25936 .loc 57 85 0 25937 001e 38BD pop {r3, r4, r5, pc} 25938 .cfi_endproc 25939 .LFE202: 25941 .section .text.arm_fir_init_q15,"ax",%progbits 25942 .align 1 25943 .p2align 2,,3 25944 .global arm_fir_init_q15 25945 .syntax unified 25946 .thumb 25947 .thumb_func 25948 .fpu fpv4-sp-d16 25950 arm_fir_init_q15: 25951 .LFB203: 25952 .file 58 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * Title: arm_fir_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * Description: Q15 FIR filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** */ ARM GAS /tmp/ccJrAs6S.s page 1043 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** @addtogroup FIR 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** @brief Initialization function for the Q15 FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** @param[in,out] S points to an instance of the Q15 FIR filter structure. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** @param[in] numTaps number of filter coefficients in the filter. Must be even and greater tha 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** @param[in] pCoeffs points to the filter coefficients buffer. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** @param[in] pState points to the state buffer. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** @param[in] blockSize number of samples processed per call. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** @return execution status 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** - \ref ARM_MATH_ARGUMENT_ERROR : numTaps is not greater than or equ 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** @par Details 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** pCoeffs points to the array of filter coefficients stored in time r 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c ****       {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** Note that numTaps must be even and greater than or equal to 4. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** To implement an odd length filter simply increase numTaps by 1 and 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** For example, to implement a filter with numTaps=3 and coefficients 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 
  60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c ****       {0.3, -0.8, 0.3}
  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c ****
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** set numTaps=4 and use the coefficients: 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c ****       {0.3, -0.8, 0.3, 0}.
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c ****
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** Similarly, to implement a two point filter 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c ****       {0.3, -0.3}
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** set numTaps=4 and use the coefficients: 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c ****       {0.3, -0.3, 0, 0}.
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c ****
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** pState points to the array of state variables. 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** pState is of length numTaps+blockSize, when running on 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** arm_status arm_fir_init_q15( 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** arm_fir_instance_q15 * S, 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** uint16_t numTaps, 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** const q15_t * pCoeffs, 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** q15_t * pState, 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** uint32_t blockSize) 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** { 25953 .loc 58 84 0 25954 .cfi_startproc 25955 @ args = 4, pretend = 0, frame = 0 25956 @ frame_needed = 0, uses_anonymous_args = 0 25957 .LVL4202: 25958 0000 70B5 push {r4, r5, r6, lr} ARM GAS /tmp/ccJrAs6S.s page 1044 25959 .LCFI167: 25960 .cfi_def_cfa_offset 16 25961 .cfi_offset 4, -16 25962 .cfi_offset 5, -12 25963 .cfi_offset 6, -8 25964 .cfi_offset 14, -4 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** arm_status status; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** #if defined (ARM_MATH_DSP) 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /* The Number of filter coefficients in the filter must be even and at least 4 */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** if (numTaps & 0x1U) 25965 .loc 58 90 0 25966 0002 11F00105 ands r5, r1, #1 25967 0006 0DD1 bne .L1973 25968 0008 1646 mov r6, r2 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** status = ARM_MATH_ARGUMENT_ERROR; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** } 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** else 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** { 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /* Assign filter taps */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** S->numTaps = numTaps; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /* Assign coefficient pointer */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** S->pCoeffs = pCoeffs; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /* Clear the state buffer. The size is always (blockSize + numTaps ) */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t)); 25969 .loc 58 103 0 25970 000a 049A ldr r2, [sp, #16] 25971 .LVL4203: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 25972 .loc 58 97 0 25973 000c 0180 strh r1, [r0] @ movhi 25974 .loc 58 103 0 25975 000e 8A18 adds r2, r1, r2 25976 0010 0446 mov r4, r0 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 25977 .loc 58 100 0 25978 0012 8660 str r6, [r0, #8] 25979 .loc 58 103 0 25980 0014 5200 lsls r2, r2, #1 25981 0016 2946 mov r1, r5 25982 .LVL4204: 25983 0018 1846 mov r0, r3 25984 .LVL4205: 25985 001a FFF7FEFF bl memset 25986 .LVL4206: 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /* Assign state pointer */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** S->pState = pState; 25987 .loc 58 106 0 25988 001e 6060 str r0, [r4, #4] 25989 .LVL4207: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** status = ARM_MATH_SUCCESS; ARM GAS /tmp/ccJrAs6S.s page 1045 25990 .loc 58 108 0 25991 0020 2846 mov r0, r5 25992 .LVL4208: 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** } 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** return (status); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** #else 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /* Assign filter taps */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** S->numTaps = numTaps; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /* Assign coefficient pointer */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** S->pCoeffs = pCoeffs; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /* Clear state buffer. The size is always (blockSize + numTaps - 1) */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t)); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** /* Assign state pointer */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** S->pState = pState; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** status = ARM_MATH_SUCCESS; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** return (status); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** } 25993 .loc 58 133 0 25994 0022 70BD pop {r4, r5, r6, pc} 25995 .LVL4209: 25996 .L1973: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c **** } 25997 .loc 58 92 0 25998 0024 4FF0FF30 mov r0, #-1 25999 .LVL4210: 26000 .loc 58 133 0 26001 0028 70BD pop {r4, r5, r6, pc} 26002 .cfi_endproc 26003 .LFE203: 26005 002a 00BF .section .text.arm_fir_init_q31,"ax",%progbits 26006 .align 1 26007 .p2align 2,,3 26008 .global arm_fir_init_q31 26009 .syntax unified 26010 .thumb 26011 .thumb_func 26012 .fpu fpv4-sp-d16 26014 arm_fir_init_q31: 26015 .LFB204: 26016 .file 59 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * Title: arm_fir_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * Description: Q31 FIR filter initialization function. 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * $Date: 18. March 2019 ARM GAS /tmp/ccJrAs6S.s page 1046 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** @addtogroup FIR 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** @brief Initialization function for the Q31 FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** @param[in,out] S points to an instance of the Q31 FIR filter structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** @param[in] numTaps number of filter coefficients in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** @param[in] pCoeffs points to the filter coefficients buffer 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** @param[in] pState points to the state buffer 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** @param[in] blockSize number of samples processed 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** @par Details 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** pCoeffs points to the array of filter coefficients stored in time r 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** 
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c ****       {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** pState points to the array of state variables. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** pState is of length numTaps+blockSize-1 samples, where 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** void arm_fir_init_q31( 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** arm_fir_instance_q31 * S, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** uint16_t numTaps, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** const q31_t * pCoeffs, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** q31_t * pState, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** uint32_t blockSize) ARM GAS /tmp/ccJrAs6S.s page 1047 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** { 26017 .loc 59 64 0 26018 .cfi_startproc 26019 @ args = 4, pretend = 0, frame = 0 26020 @ frame_needed = 0, uses_anonymous_args = 0 26021 .LVL4211: 26022 0000 38B5 push {r3, r4, r5, lr} 26023 .LCFI168: 26024 .cfi_def_cfa_offset 16 26025 .cfi_offset 3, -16 26026 .cfi_offset 4, -12 26027 .cfi_offset 5, -8 26028 .cfi_offset 14, -4 26029 .loc 59 64 0 26030 0002 049C ldr r4, [sp, #16] 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** /* Assign filter taps */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** S->numTaps = numTaps; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** /* Assign coefficient pointer */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** S->pCoeffs = pCoeffs; 26031 .loc 59 69 0 26032 0004 8260 str r2, [r0, #8] 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** /* Clear state buffer. The size is always (blockSize + numTaps - 1) */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t)); 26033 .loc 59 72 0 26034 0006 04F18044 add r4, r4, #1073741824 26035 000a 013C subs r4, r4, #1 26036 000c 0C44 add r4, r4, r1 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** 26037 .loc 59 66 0 26038 000e 0180 strh r1, [r0] @ movhi 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** /* Assign filter taps */ 26039 .loc 59 64 0 26040 0010 0546 mov r5, r0 26041 .loc 59 72 0 26042 0012 A200 lsls r2, r4, #2 26043 .LVL4212: 26044 0014 1846 mov r0, r3 26045 .LVL4213: 26046 0016 0021 movs r1, #0 26047 .LVL4214: 26048 0018 FFF7FEFF bl memset 26049 .LVL4215: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** /* Assign state pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** S->pState = pState; 26050 .loc 59 75 0 26051 001c 6860 str r0, [r5, #4] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c **** } 26052 .loc 59 76 0 26053 001e 38BD pop {r3, r4, r5, pc} 26054 .cfi_endproc 26055 .LFE204: 26057 .section .text.arm_fir_init_q7,"ax",%progbits 26058 .align 1 26059 .p2align 2,,3 ARM GAS /tmp/ccJrAs6S.s page 1048 26060 .global arm_fir_init_q7 26061 .syntax unified 26062 .thumb 26063 .thumb_func 26064 .fpu fpv4-sp-d16 26066 arm_fir_init_q7: 26067 .LFB205: 26068 .file 60 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * Title: arm_fir_init_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * Description: Q7 FIR filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** @addtogroup FIR 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** @brief Initialization function for the Q7 FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** @param[in,out] S points to an instance of the Q7 FIR filter structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** @param[in] numTaps number of filter coefficients in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** @param[in] pCoeffs points to the filter coefficients buffer 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** @param[in] pState points to the state buffer 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** @param[in] blockSize number of samples processed 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** @par Details ARM GAS /tmp/ccJrAs6S.s page 1049 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** pCoeffs points to the array of filter coefficients stored in time r 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** 
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c ****       {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** @par 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** pState points to the array of state variables. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** pState is of length numTaps+blockSize-1 samples, where 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** void arm_fir_init_q7( 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** arm_fir_instance_q7 * S, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** uint16_t numTaps, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** const q7_t * pCoeffs, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** q7_t * pState, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** uint32_t blockSize) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** { 26069 .loc 60 65 0 26070 .cfi_startproc 26071 @ args = 4, pretend = 0, frame = 0 26072 @ frame_needed = 0, uses_anonymous_args = 0 26073 .LVL4216: 26074 0000 38B5 push {r3, r4, r5, lr} 26075 .LCFI169: 26076 .cfi_def_cfa_offset 16 26077 .cfi_offset 3, -16 26078 .cfi_offset 4, -12 26079 .cfi_offset 5, -8 26080 .cfi_offset 14, -4 26081 .loc 60 65 0 26082 0002 049D ldr r5, [sp, #16] 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** /* Assign filter taps */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** S->numTaps = numTaps; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** /* Assign coefficient pointer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** S->pCoeffs = pCoeffs; 26083 .loc 60 70 0 26084 0004 8260 str r2, [r0, #8] 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** /* Clear state buffer. The size is always (blockSize + numTaps - 1) */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q7_t)); 26085 .loc 60 73 0 26086 0006 013D subs r5, r5, #1 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** 26087 .loc 60 67 0 26088 0008 0180 strh r1, [r0] @ movhi 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** /* Assign filter taps */ 26089 .loc 60 65 0 26090 000a 0446 mov r4, r0 26091 .loc 60 73 0 26092 000c 6A18 adds r2, r5, r1 26093 .LVL4217: 26094 000e 1846 mov r0, r3 26095 .LVL4218: 26096 0010 0021 movs r1, #0 26097 .LVL4219: 26098 0012 FFF7FEFF bl memset 26099 .LVL4220: ARM GAS /tmp/ccJrAs6S.s page 1050 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** /* Assign state pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** S->pState = pState; 26100 .loc 60 76 0 26101 0016 6060 str r0, [r4, #4] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c **** } 26102 .loc 60 77 0 26103 0018 38BD pop {r3, r4, r5, pc} 26104 .cfi_endproc 26105 .LFE205: 26107 001a 00BF .section .text.arm_fir_interpolate_f32,"ax",%progbits 26108 .align 1 26109 .p2align 2,,3 26110 .global arm_fir_interpolate_f32 26111 .syntax unified 26112 .thumb 26113 .thumb_func 26114 .fpu fpv4-sp-d16 26116 arm_fir_interpolate_f32: 26117 .LFB206: 26118 .file 61 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolat 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Title: arm_fir_interpolate_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Description: Floating-point FIR interpolation sequences 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** These functions combine an upsampler (zero stuffer) and an FIR filter. 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** They are used in multirate systems for increasing the sample rate of a signal without introducing 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** Conceptually, the functions are equivalent to the block diagram below: ARM GAS /tmp/ccJrAs6S.s page 1051 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions" 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** After upsampling by a factor of L, the signal should be filtered by a lowpass filter 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** cutoff frequency of 1/L in order to eliminate high frequency copies of the spectrum. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** The user of the function is responsible for providing the filter coefficients. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR fi 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** The upsampler inserts L-1 zeros between each sample. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** Instead of multiplying by these zero values, the FIR filter is designed to skip them. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** This leads to an efficient implementation without any wasted effort. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** The functions operate on blocks of input and output data. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pSrc points to an array of blockSize input values and 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pDst points to an array of blockSize*L output values. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** The library provides separate functions for Q15, Q31, and floating-point data types. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @par Algorithm 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** The functions use a polyphase filter structure: 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****       y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****       y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****       ...
  58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****       y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phase
  59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** This approach is more efficient than straightforward upsample-then-filter algori 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** With this method the computation is reduced by a factor of 1/L when 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @par 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pCoeffs points to a coefficient array of size numTaps. 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** numTaps must be a multiple of the interpolation factor LphaseLength=numTaps/L. 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** Coefficients are stored in time reversed order. 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****       {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @par 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pState points to a state array of size blockSize + phaseLengt 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** Samples in the state buffer are stored in the order: 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****      {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], .
  77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @par 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** The state variables are updated after each block of data is processed, the coeff 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @par Instance Structure 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** The coefficients and state variables for a filter are stored together in an inst 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** A separate instance structure must be defined for each filter. 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** Coefficient arrays may be shared among several instances while state variable ar 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** There are separate instance structure declarations for each of the 3 supported d 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @par Initialization Functions 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** There is also an associated initialization function for each data type. 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** The initialization function performs the following operations: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** - Sets the values of the internal structure fields. 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** - Zeros out the values in the state buffer. 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** - Checks to make sure that the length of the filter is a multiple of the interpo 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** To do this manually without calling the init function, assign the follow subfiel ARM GAS /tmp/ccJrAs6S.s page 1052 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set a 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @par 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** Use of the initialization function is optional. 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** However, if the initialization function is used, then the instance structure can 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** To place an instance structure into a const data section, the instance structure 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** The code below statically initializes each of the 3 different data type filter i 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 
 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****       arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};
 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****       arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};
 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****       arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};
 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c ****
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @par 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** where L is the interpolation factor; phaseLength=numTaps/LpCoeffs is the address of the coefficient buffer; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pState is the address of the state buffer. 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** Be sure to set the values in the state buffer to zeros when doing static initial 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @par Fixed-Point Behavior 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** Care must be taken when using the fixed-point versions of the FIR interpolate fi 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** In particular, the overflow and saturation behavior of the accumulator used in e 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** Refer to the function specific documentation below for usage guidelines. 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @addtogroup FIR_Interpolate 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @{ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @brief Processing function for floating-point FIR interpolator. 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @param[in] S points to an instance of the floating-point FIR interpolator structure 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @param[in] pSrc points to the block of input data 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @param[out] pDst points to the block of output data 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @param[in] blockSize number of samples to process 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** @return none 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #include "arm_helium_utils.h" 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** static void arm_fir_interpolate2_f32_mve( 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const arm_fir_interpolate_instance_f32 * S, 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t * pSrc, 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t * pDst, 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t blockSize) 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *pState = S->pState; /* State pointer */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t tapCnt; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t blkCnt; /* Loop counters */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t strides[4] = { 0, 1 * 2, 2 * 2, 3 * 2 }; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32x4_t vec_strides0 = *(uint32x4_t *) strides; ARM GAS /tmp/ccJrAs6S.s page 1053 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32x4_t vec_strides1 = vec_strides0 + 1; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** f32x4_t acc0, acc1; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * S->pState buffer contains previous frame (phaseLen - 1) samples 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * pStateCurnt points to the location where the new input data should be written 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCurnt = S->pState + (phaseLen - 1U); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Total number of intput samples 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt = blockSize; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Loop over the blockSize. 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (blkCnt > 0U) 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Copy new input sample into the state buffer 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCurnt++ = *pSrc++; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Initialize state pointer 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr1 = pState; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc0 = vdupq_n_f32(0.0f); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc1 = vdupq_n_f32(0.0f); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Initialize coefficient pointer 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 = pCoeffs; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen >> 2; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** f32x4_t vecCoef, vecState; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecState = vldrwq_f32(ptr1); 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_f32(ptr2, vec_strides1); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc1 = vfmaq_f32(acc1, vecState, vecCoef); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_f32(ptr2, vec_strides0); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc0 = vfmaq_f32(acc0, vecState, vecCoef); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += 4 * 2; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr1 += 4; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Decrement the loop counter 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen & 3; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** if (tapCnt > 0U) 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { ARM GAS /tmp/ccJrAs6S.s page 1054 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** mve_pred16_t p0 = vctp32q(tapCnt); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** f32x4_t vecCoef, vecState; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecState = vldrwq_z_f32(ptr1, p0); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_z_f32(ptr2, vec_strides1, p0); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc1 = vfmaq_f32(acc1, vecState, vecCoef); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_z_f32(ptr2, vec_strides0, p0); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc0 = vfmaq_f32(acc0, vecState, vecCoef); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pDst++ = vecAddAcrossF32Mve(acc1); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pDst++ = vecAddAcrossF32Mve(acc0); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Advance the state pointer by 1 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * * to process the next group of interpolation factor number samples 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pState = pState + 1; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Decrement the loop counter 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt--; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Processing is complete. 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * ** Now copy the last phaseLen - 1 samples to the start of the state buffer. 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * ** This prepares the state buffer for the next function call. 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Points to the start of the state buffer 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCurnt = S->pState; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt = (phaseLen - 1U) >> 2; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (blkCnt > 0U) 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vst1q(pStateCurnt, vldrwq_f32(pState)); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pState += 4; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCurnt += 4; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt--; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt = (phaseLen - 1U) & 3; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** if (blkCnt > 0U) 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vstrwq_p_f32(pStateCurnt, vldrwq_f32(pState), p0); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** void arm_fir_interpolate_f32( 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const arm_fir_interpolate_instance_f32 * S, 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t * pSrc, 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t * pDst, 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t blockSize) 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { ARM GAS /tmp/ccJrAs6S.s page 1055 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *pState = S->pState; /* State pointer */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t tapCnt; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t i, blkCnt; /* Loop counters */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t strides[4] = { 0, 1 * S->L, 2 * S->L, 3 * S->L }; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t stridesM[4] = { 4, 3, 2, 1 }; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32x4_t vec_stridesM = *(uint32x4_t *) stridesM; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32x4_t vec_strides = *(uint32x4_t *) strides; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** f32x4_t acc; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** if ( S->L == 2 ) { 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** arm_fir_interpolate2_f32_mve(S, pSrc, pDst, blockSize); 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** return; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * S->pState buffer contains previous frame (phaseLen - 1) samples 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * pStateCurnt points to the location where the new input data should be written 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCurnt = S->pState + (phaseLen - 1U); 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Total number of intput samples 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt = blockSize; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Loop over the blockSize. 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (blkCnt > 0U) 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Copy new input sample into the state buffer 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCurnt++ = *pSrc++; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Loop over the Interpolation factor. 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i = S->L; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (i > 0U) 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Initialize state pointer 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr1 = pState; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** if (i >= 4) 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t state0, state1, state2, state3; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc = vdupq_n_f32(0.0f); 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Initialize coefficient pointer 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 = pCoeffs + (i - 1U) - 4; ARM GAS /tmp/ccJrAs6S.s page 1056 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen >> 2; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** f32x4_t vecCoef; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t *pCoef = ptr2; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** state0 = ptr1[0]; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** state1 = ptr1[1]; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** state2 = ptr1[2]; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** state3 = ptr1[3]; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr1 += 4; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_f32(pCoef, vec_stridesM); 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pCoef += S->L; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc = vfmaq_n_f32(acc, vecCoef, state0); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_f32(pCoef, vec_stridesM); 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pCoef += S->L; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc = vfmaq_n_f32(acc, vecCoef, state1); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_f32(pCoef, vec_stridesM); 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pCoef += S->L; 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc = vfmaq_n_f32(acc, vecCoef, state2); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_f32(pCoef, vec_stridesM); 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pCoef += S->L; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc = vfmaq_n_f32(acc, vecCoef, state3); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 = ptr2 + 4 * S->L; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Decrement the loop counter 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen & 3; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** if (tapCnt > 0U) 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** mve_pred16_t p0 = vctp32q(tapCnt); 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** f32x4_t vecCoef; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t *pCoef = ptr2; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** state0 = ptr1[0]; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** state1 = ptr1[1]; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** state2 = ptr1[2]; 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** state3 = ptr1[3]; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_z_f32(pCoef, vec_stridesM, p0); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pCoef += S->L; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc = vfmaq_n_f32(acc, vecCoef, state0); 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_z_f32(pCoef, vec_stridesM, p0); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pCoef += S->L; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc = vfmaq_n_f32(acc, vecCoef, state1); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_z_f32(pCoef, vec_stridesM, p0); 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pCoef += S->L; ARM GAS /tmp/ccJrAs6S.s page 1057 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc = vfmaq_n_f32(acc, vecCoef, state2); 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_z_f32(pCoef, vec_stridesM, p0); 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pCoef += S->L; 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc = vfmaq_n_f32(acc, vecCoef, state3); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vst1q(pDst, acc); 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pDst += 4; 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i -= 4; 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** else 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc = vdupq_n_f32(0.0f); 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Initialize coefficient pointer 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 = pCoeffs + (i - 1U); 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen >> 2; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** f32x4_t vecCoef, vecState; 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecState = vldrwq_f32(ptr1); 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr1 += 4; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_f32(ptr2, vec_strides); 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += 4 * S->L; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc = vfmaq_f32(acc, vecState, vecCoef); 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Decrement the loop counter 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen & 3; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** if (tapCnt > 0U) 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** mve_pred16_t p0 = vctp32q(tapCnt); 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** f32x4_t vecCoef, vecState; 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecState = vldrwq_z_f32(ptr1, p0); 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vecCoef = vldrwq_gather_shifted_offset_z_f32(ptr2, vec_strides, p0); 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc = vfmaq_f32(acc, vecState, vecCoef); 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pDst++ = vecAddAcrossF32Mve(acc); 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Decrement the loop counter 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i--; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Advance the state pointer by 1 ARM GAS /tmp/ccJrAs6S.s page 1058 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * * to process the next group of interpolation factor number samples 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pState = pState + 1; 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Decrement the loop counter 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt--; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Processing is complete. 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * ** Now copy the last phaseLen - 1 samples to the start of the state buffer. 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * ** This prepares the state buffer for the next function call. 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Points to the start of the state buffer 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** */ 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCurnt = S->pState; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt = (phaseLen - 1U) >> 2; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (blkCnt > 0U) 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vst1q(pStateCurnt, vldrwq_f32(pState)); 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pState += 4; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCurnt += 4; 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt--; 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt = (phaseLen - 1U) & 3; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** if (blkCnt > 0U) 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vstrwq_p_f32(pStateCurnt, vldrwq_f32(pState), p0); 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #else 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #if defined(ARM_MATH_NEON) 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** void arm_fir_interpolate_f32( 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const arm_fir_interpolate_instance_f32 * S, 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t * pSrc, 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t * pDst, 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t blockSize) 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *pState = S->pState; /* State pointer */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *ptr1; /* Temporary pointers for state buffer */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t *ptr2; /* Temporary pointers for coefficient buffer */ 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t sum0; /* Accumulators */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t c0; /* Temporary variables to hold state and coefficient v 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t i, blkCnt, j; /* Loop counters */ 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t blkCntN4; 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t c1, c2, c3; 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32x4_t sum0v; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32x4_t accV0,accV1; ARM GAS /tmp/ccJrAs6S.s page 1059 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32x4_t x0v,x1v,x2v,xa,xb; 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32x2_t tempV; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* S->pState buffer contains previous frame (phaseLen - 1) samples */ 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* pStateCurnt points to the location where the new input data should be written */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCurnt = S->pState + (phaseLen - 1U); 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialise blkCnt */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt = blockSize >> 3; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCntN4 = blockSize & 7; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop unrolling */ 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (blkCnt > 0U) 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Copy new input samples into the state buffer */ 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0v = vld1q_f32(pSrc); 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vst1q_f32(pStateCurnt,sum0v); 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pSrc += 4; 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCurnt += 4; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0v = vld1q_f32(pSrc); 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vst1q_f32(pStateCurnt,sum0v); 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pSrc += 4; 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCurnt += 4; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Address modifier index of coefficient buffer */ 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** j = 1U; 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop over the Interpolation factor. */ 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i = (S->L); 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (i > 0U) 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Set accumulator to zero */ 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV0 = vdupq_n_f32(0.0); 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV1 = vdupq_n_f32(0.0); 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize state pointer */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr1 = pState; 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize coefficient pointer */ 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 = pCoeffs + (S->L - j); 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop over the polyPhase length. Unroll by a factor of 4. 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ** Repeat until we've computed numTaps-(4*S->L) coefficients. */ 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen >> 2U; 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x0v = vld1q_f32(ptr1); 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x1v = vld1q_f32(ptr1 + 4); 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the input samples */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x2v = vld1q_f32(ptr1 + 8); 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficients */ 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c0 = *(ptr2); ARM GAS /tmp/ccJrAs6S.s page 1060 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Perform the multiply-accumulate */ 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV0 = vmlaq_n_f32(accV0,x0v,c0); 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV1 = vmlaq_n_f32(accV1,x1v,c0); 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficients, inputs and perform multiply-accumulate */ 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c1 = *(ptr2 + S->L); 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** xa = vextq_f32(x0v,x1v,1); 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** xb = vextq_f32(x1v,x2v,1); 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV0 = vmlaq_n_f32(accV0,xa,c1); 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV1 = vmlaq_n_f32(accV1,xb,c1); 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficients, inputs and perform multiply-accumulate */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c2 = *(ptr2 + S->L * 2); 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** xa = vextq_f32(x0v,x1v,2); 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** xb = vextq_f32(x1v,x2v,2); 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV0 = vmlaq_n_f32(accV0,xa,c2); 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV1 = vmlaq_n_f32(accV1,xb,c2); 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficients, inputs and perform multiply-accumulate */ 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c3 = *(ptr2 + S->L * 3); 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** xa = vextq_f32(x0v,x1v,3); 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** xb = vextq_f32(x1v,x2v,3); 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV0 = vmlaq_n_f32(accV0,xa,c3); 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV1 = vmlaq_n_f32(accV1,xb,c3); 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Upsampling is done by stuffing L-1 zeros between each sample. 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * So instead of multiplying zeros with coefficients, 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Increment the coefficient pointer by interpolation factor times. */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += 4 * S->L; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr1 += 4; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x0v = x1v; 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x1v = x2v; 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement the loop counter */ 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen % 0x4U; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x2v = vld1q_f32(ptr1 + 8); 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** switch (tapCnt) 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** case 3: 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c0 = *(ptr2); 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV0 = vmlaq_n_f32(accV0,x0v,c0); 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV1 = vmlaq_n_f32(accV1,x1v,c0); 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1061 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c0 = *(ptr2); 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** xa = vextq_f32(x0v,x1v,1); 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** xb = vextq_f32(x1v,x2v,1); 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV0 = vmlaq_n_f32(accV0,xa,c0); 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV1 = vmlaq_n_f32(accV1,xb,c0); 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c0 = *(ptr2); 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** xa = vextq_f32(x0v,x1v,2); 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** xb = vextq_f32(x1v,x2v,2); 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV0 = vmlaq_n_f32(accV0,xa,c0); 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV1 = vmlaq_n_f32(accV1,xb,c0); 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** break; 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** case 2: 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c0 = *(ptr2); 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV0 = vmlaq_n_f32(accV0,x0v,c0); 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV1 = vmlaq_n_f32(accV1,x1v,c0); 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c0 = *(ptr2); 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** xa = vextq_f32(x0v,x1v,1); 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** xb = vextq_f32(x1v,x2v,1); 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV0 = vmlaq_n_f32(accV0,xa,c0); 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV1 = vmlaq_n_f32(accV1,xb,c0); 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** break; 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** case 1: 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c0 = *(ptr2); 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV0 = vmlaq_n_f32(accV0,x0v,c0); 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** accV1 = vmlaq_n_f32(accV1,x1v,c0); 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** break; 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** default: 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** break; 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* The result is in the accumulator, store in the destination buffer. */ 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pDst = vgetq_lane_f32(accV0, 0); 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *(pDst + S->L) = vgetq_lane_f32(accV0, 1); 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *(pDst + 2 * S->L) = vgetq_lane_f32(accV0, 2); 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *(pDst + 3 * S->L) = vgetq_lane_f32(accV0, 3); 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *(pDst + 4 * S->L) = vgetq_lane_f32(accV1, 0); ARM GAS /tmp/ccJrAs6S.s page 1062 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *(pDst + 5 * S->L) = vgetq_lane_f32(accV1, 1); 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *(pDst + 6 * S->L) = vgetq_lane_f32(accV1, 2); 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *(pDst + 7 * S->L) = vgetq_lane_f32(accV1, 3); 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pDst++; 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Increment the address modifier index of coefficient buffer */ 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** j++; 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement the loop counter */ 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i--; 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Advance the state pointer by 1 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * to process the next group of interpolation factor number samples */ 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pState = pState + 8; 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pDst += S->L * 7; 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement the loop counter */ 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt--; 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ** No loop unrolling is used. */ 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (blkCntN4 > 0U) 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Copy new input sample into the state buffer */ 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCurnt++ = *pSrc++; 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Address modifier index of coefficient buffer */ 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** j = 1U; 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop over the Interpolation factor. */ 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i = S->L; 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (i > 0U) 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Set accumulator to zero */ 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0v = vdupq_n_f32(0.0); 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize state pointer */ 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr1 = pState; 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize coefficient pointer */ 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 = pCoeffs + (S->L - j); 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop over the polyPhase length. Unroll by a factor of 4. 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ** Repeat until we've computed numTaps-(4*S->L) coefficients. */ 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen >> 2U; 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficient */ 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x1v = vsetq_lane_f32(*(ptr2),x1v,0); 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1063 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Upsampling is done by stuffing L-1 zeros between each sample. 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * So instead of multiplying zeros with coefficients, 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Increment the coefficient pointer by interpolation factor times. */ 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the input sample */ 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x0v = vld1q_f32(ptr1); 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr1 += 4; 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficient */ 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x1v = vsetq_lane_f32(*(ptr2),x1v,1); 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Increment the coefficient pointer by interpolation factor times. */ 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficient */ 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x1v = vsetq_lane_f32(*(ptr2),x1v,2); 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Increment the coefficient pointer by interpolation factor times. */ 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficient */ 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x1v = vsetq_lane_f32(*(ptr2),x1v,3); 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Increment the coefficient pointer by interpolation factor times. */ 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0v = vmlaq_f32(sum0v,x0v,x1v); 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement the loop counter */ 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tempV = vpadd_f32(vget_low_f32(sum0v),vget_high_f32(sum0v)); 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0 = vget_lane_f32(tempV, 0) + vget_lane_f32(tempV, 1); 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen % 0x4U; 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Perform the multiply-accumulate */ 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0 += *(ptr1++) * (*ptr2); 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Increment the coefficient pointer by interpolation factor times. */ 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement the loop counter */ 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* The result is in the accumulator, store in the destination buffer. */ 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pDst++ = sum0; 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Increment the address modifier index of coefficient buffer */ 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** j++; 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1064 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement the loop counter */ 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i--; 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Advance the state pointer by 1 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * to process the next group of interpolation factor number samples */ 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pState = pState + 1; 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement the loop counter */ 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCntN4--; 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Processing is complete. 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer. 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ** This prepares the state buffer for the next function call. */ 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Points to the start of the state buffer */ 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCurnt = S->pState; 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = (phaseLen - 1U) >> 2U; 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Copy data */ 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0v = vld1q_f32(pState); 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** vst1q_f32(pStateCurnt,sum0v); 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pState += 4; 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCurnt += 4; 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement the loop counter */ 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = (phaseLen - 1U) % 0x04U; 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* copy data */ 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCurnt++ = *pState++; 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement the loop counter */ 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #else 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** void arm_fir_interpolate_f32( 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const arm_fir_interpolate_instance_f32 * S, 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t * pSrc, 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t * pDst, 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t blockSize) 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 26119 .loc 61 830 0 26120 .cfi_startproc 26121 @ args = 0, pretend = 0, frame = 8 26122 @ frame_needed = 0, uses_anonymous_args = 0 ARM GAS /tmp/ccJrAs6S.s page 1065 26123 .LVL4221: 26124 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 26125 .LCFI170: 26126 .cfi_def_cfa_offset 36 26127 .cfi_offset 4, -36 26128 .cfi_offset 5, -32 26129 .cfi_offset 6, -28 26130 .cfi_offset 7, -24 26131 .cfi_offset 8, -20 26132 .cfi_offset 9, -16 26133 .cfi_offset 10, -12 26134 .cfi_offset 11, -8 26135 .cfi_offset 14, -4 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #if (1) 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** //#if !defined(ARM_MATH_CM0_FAMILY) 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *pState = S->pState; /* State pointer */ 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 26136 .loc 61 835 0 26137 0004 D0E90165 ldrd r6, r5, [r0, #4] 26138 .LVL4222: 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *pStateCur; /* Points to the current sample of the state 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *ptr1; /* Temporary pointer for state buffer */ 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t *ptr2; /* Temporary pointer for coefficient buffer 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t sum0; /* Accumulators */ 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t i, blkCnt, tapCnt; /* Loop counters */ 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component 26139 .loc 61 841 0 26140 0008 4788 ldrh r7, [r0, #2] 26141 .LVL4223: 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #if (1) 26142 .loc 61 830 0 26143 000a 83B0 sub sp, sp, #12 26144 .LCFI171: 26145 .cfi_def_cfa_offset 48 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t j; 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t acc0, acc1, acc2, acc3; 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t x0, x1, x2, x3; 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t c0, c1, c2, c3; 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #endif 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* S->pState buffer contains previous frame (phaseLen - 1) samples */ 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* pStateCur points to the location where the new input data should be written */ 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCur = S->pState + (phaseLen - 1U); 26146 .loc 61 852 0 26147 000c 6FF04044 mvn r4, #-1073741824 26148 0010 07EB040E add lr, r7, r4 26149 0014 0095 str r5, [sp] 26150 0016 05EB8E09 add r9, r5, lr, lsl #2 26151 .LVL4224: 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt = blockSize >> 2U; ARM GAS /tmp/ccJrAs6S.s page 1066 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (blkCnt > 0U) 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Copy new input sample into the state buffer */ 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCur++ = *pSrc++; 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCur++ = *pSrc++; 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCur++ = *pSrc++; 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCur++ = *pSrc++; 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Address modifier index of coefficient buffer */ 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** j = 1U; 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop over the Interpolation factor. */ 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i = (S->L); 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (i > 0U) 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Set accumulator to zero */ 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc0 = 0.0f; 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc1 = 0.0f; 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc2 = 0.0f; 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc3 = 0.0f; 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize state pointer */ 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr1 = pState; 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize coefficient pointer */ 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 = pCoeffs + (S->L - j); 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop over the polyPhase length. Unroll by a factor of 4. 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** Repeat until we've computed numTaps-(4*S->L) coefficients. */ 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen >> 2U; 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x0 = *(ptr1++); 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x1 = *(ptr1++); 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x2 = *(ptr1++); 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the input sample */ 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x3 = *(ptr1++); 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficient */ 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c0 = *(ptr2); 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Perform the multiply-accumulate */ 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc0 += x0 * c0; 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc1 += x1 * c0; 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc2 += x2 * c0; 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc3 += x3 * c0; 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficient */ 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c1 = *(ptr2 + S->L); 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the input sample */ 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x0 = *(ptr1++); 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1067 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Perform the multiply-accumulate */ 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc0 += x1 * c1; 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc1 += x2 * c1; 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc2 += x3 * c1; 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc3 += x0 * c1; 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficient */ 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c2 = *(ptr2 + S->L * 2); 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the input sample */ 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x1 = *(ptr1++); 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Perform the multiply-accumulate */ 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc0 += x2 * c2; 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc1 += x3 * c2; 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc2 += x0 * c2; 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc3 += x1 * c2; 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficient */ 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c3 = *(ptr2 + S->L * 3); 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the input sample */ 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x2 = *(ptr1++); 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Perform the multiply-accumulate */ 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc0 += x3 * c3; 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc1 += x0 * c3; 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc2 += x1 * c3; 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc3 += x2 * c3; 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Upsampling is done by stuffing L-1 zeros between each sample. 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * So instead of multiplying zeros with coefficients, 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Increment the coefficient pointer by interpolation factor times. */ 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += 4 * S->L; 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement loop counter */ 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen % 0x4U; 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the input sample */ 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x3 = *(ptr1++); 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Read the coefficient */ 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** c0 = *(ptr2); 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Perform the multiply-accumulate */ 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc0 += x0 * c0; 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc1 += x1 * c0; 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc2 += x2 * c0; 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** acc3 += x3 * c0; 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1068 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Increment the coefficient pointer by interpolation factor times. */ 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* update states for next sample processing */ 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x0 = x1; 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x1 = x2; 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** x2 = x3; 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement loop counter */ 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* The result is in the accumulator, store in the destination buffer. */ 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *(pDst ) = acc0; 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *(pDst + S->L) = acc1; 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *(pDst + 2 * S->L) = acc2; 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *(pDst + 3 * S->L) = acc3; 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pDst++; 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Increment the address modifier index of coefficient buffer */ 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** j++; 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement loop counter */ 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i--; 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Advance the state pointer by 1 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * to process the next group of interpolation factor number samples */ 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pState = pState + 4; 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pDst += S->L * 3; 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement loop counter */ 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt--; 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop unrolling: Compute remaining outputs */ 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt = blockSize % 0x4U; 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #else 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize blkCnt with number of samples */ 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt = blockSize; 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (blkCnt > 0U) 26152 .loc 61 1019 0 26153 001a 0193 str r3, [sp, #4] 26154 001c E3B3 cbz r3, .L1988 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Copy new input sample into the state buffer */ 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCur++ = *pSrc++; 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Address modifier index of coefficient buffer */ 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** j = 1U; ARM GAS /tmp/ccJrAs6S.s page 1069 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop over the Interpolation factor. */ 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i = S->L; 26155 .loc 61 1028 0 26156 001e 90F800A0 ldrb r10, [r0] @ zero_extendqisi2 26157 0022 5444 add r4, r4, r10 26158 0024 AC46 mov ip, r5 26159 0026 06EB840B add fp, r6, r4, lsl #2 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (i > 0U) 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Set accumulator to zero */ 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0 = 0.0f; 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize state pointer */ 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr1 = pState; 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize coefficient pointer */ 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 = pCoeffs + (S->L - j); 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop over the polyPhase length. 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** Repeat until we've computed numTaps-(4*S->L) coefficients. */ 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen >> 2U; 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Perform the multiply-accumulate */ 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0 += *ptr1++ * *ptr2; 1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Upsampling is done by stuffing L-1 zeros between each sample. 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * So instead of multiplying zeros with coefficients, 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Increment the coefficient pointer by interpolation factor times. */ 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0 += *ptr1++ * *ptr2; 1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0 += *ptr1++ * *ptr2; 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0 += *ptr1++ * *ptr2; 1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement loop counter */ 1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop unrolling: Compute remaining outputs */ 1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen % 0x4U; 1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #else 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize tapCnt with number of samples */ ARM GAS /tmp/ccJrAs6S.s page 1070 1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen; 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Perform the multiply-accumulate */ 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0 += *ptr1++ * *ptr2; 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Upsampling is done by stuffing L-1 zeros between each sample. 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * So instead of multiplying zeros with coefficients, 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * Increment the coefficient pointer by interpolation factor times. */ 1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 26160 .loc 61 1090 0 26161 002a 4FEA8A05 lsl r5, r10, #2 26162 002e 9846 mov r8, r3 26163 .LVL4225: 26164 .L1985: 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 26165 .loc 61 1022 0 26166 0030 51F8043B ldr r3, [r1], #4 @ float 26167 .LVL4226: 26168 0034 49F8043B str r3, [r9], #4 @ float 26169 .LVL4227: 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 26170 .loc 61 1030 0 26171 0038 BAF1000F cmp r10, #0 26172 003c 17D0 beq .L1981 26173 003e 02EB050E add lr, r2, r5 26174 0042 5E46 mov r6, fp 26175 .LVL4228: 26176 .L1984: 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 26177 .loc 61 1039 0 26178 0044 3346 mov r3, r6 26179 .LVL4229: 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 26180 .loc 61 1033 0 26181 0046 DFED157A vldr.32 s15, .L2001 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 26182 .loc 61 1082 0 26183 004a 57B1 cbz r7, .L1982 26184 004c 3846 mov r0, r7 26185 004e 6446 mov r4, ip 26186 .LVL4230: 26187 .L1983: 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 26188 .loc 61 1085 0 26189 0050 93ED007A vldr.32 s14, [r3] 26190 0054 F4EC016A vldmia.32 r4!, {s13} 26191 .LVL4231: 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 26192 .loc 61 1082 0 26193 0058 0138 subs r0, r0, #1 26194 .LVL4232: 26195 .loc 61 1090 0 26196 005a 2B44 add r3, r3, r5 ARM GAS /tmp/ccJrAs6S.s page 1071 26197 .LVL4233: 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 26198 .loc 61 1085 0 26199 005c E6EE877A vfma.f32 s15, s13, s14 26200 .LVL4234: 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 26201 .loc 61 1082 0 26202 0060 F6D1 bne .L1983 26203 .LVL4235: 26204 .L1982: 1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement loop counter */ 1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* The result is in the accumulator, store in the destination buffer. */ 1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pDst++ = sum0; 26205 .loc 61 1097 0 26206 0062 E2EC017A vstmia.32 r2!, {s15} 26207 .LVL4236: 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 26208 .loc 61 1030 0 26209 0066 9645 cmp lr, r2 26210 0068 A6F10406 sub r6, r6, #4 26211 006c EAD1 bne .L1984 26212 .LVL4237: 26213 .L1981: 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 26214 .loc 61 1019 0 26215 006e B8F10108 subs r8, r8, #1 26216 .LVL4238: 1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Increment the address modifier index of coefficient buffer */ 1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** j++; 1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement the loop counter */ 1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i--; 1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Advance the state pointer by 1 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * to process the next group of interpolation factor number samples */ 1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pState = pState + 1; 26217 .loc 61 1108 0 26218 0072 0CF1040C add ip, ip, #4 26219 .LVL4239: 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 26220 .loc 61 1019 0 26221 0076 DBD1 bne .L1985 26222 0078 DDE90032 ldrd r3, r2, [sp] 26223 .LVL4240: 26224 007c 03EB8202 add r2, r3, r2, lsl #2 26225 .LVL4241: 26226 .L1980: 1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement the loop counter */ 1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt--; 1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } ARM GAS /tmp/ccJrAs6S.s page 1072 1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Processing is complete. 1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** Now copy the last phaseLen - 1 samples to the satrt of the state buffer. 1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** This prepares the state buffer for the next function call. */ 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Points to the start of the state buffer */ 1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCur = S->pState; 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = (phaseLen - 1U) >> 2U; 1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* copy data */ 1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCur++ = *pState++; 1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCur++ = *pState++; 1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCur++ = *pState++; 1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCur++ = *pState++; 1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement loop counter */ 1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop unrolling: Compute remaining outputs */ 1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = (phaseLen - 1U) % 0x04U; 1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #else 1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize tapCnt with number of samples */ 1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = (phaseLen - 1U); 1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Copy data */ 1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 26227 .loc 61 1149 0 26228 0080 013F subs r7, r7, #1 26229 .LVL4242: 26230 0082 06D0 beq .L1979 26231 0084 009B ldr r3, [sp] 26232 .LVL4243: 26233 .L1987: 1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCur++ = *pState++; 26234 .loc 61 1151 0 26235 0086 52F8041B ldr r1, [r2], #4 @ float 26236 .LVL4244: 26237 008a 43F8041B str r1, [r3], #4 @ float 1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 26238 .loc 61 1149 0 26239 008e 013F subs r7, r7, #1 26240 .LVL4245: 26241 0090 F9D1 bne .L1987 26242 .LVL4246: 26243 .L1979: ARM GAS /tmp/ccJrAs6S.s page 1073 1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement loop counter */ 1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #else 1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* alternate version for CM0_FAMILY */ 1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *pState = S->pState; /* State pointer */ 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 1162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *pStateCur; /* Points to the current sample of the state * 1163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t *ptr1; /* Temporary pointer for state buffer */ 1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** const float32_t *ptr2; /* Temporary pointer for coefficient buffer 1165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** float32_t sum0; /* Accumulators */ 1166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t i, blkCnt, tapCnt; /* Loop counters */ 1167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component 1168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* S->pState buffer contains previous frame (phaseLen - 1) samples */ 1170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* pStateCur points to the location where the new input data should be written */ 1171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCur = S->pState + (phaseLen - 1U); 1172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Total number of intput samples */ 1174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt = blockSize; 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop over the blockSize. */ 1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (blkCnt > 0U) 1178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 1179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Copy new input sample into the state buffer */ 1180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCur++ = *pSrc++; 1181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop over the Interpolation factor. */ 1183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i = S->L; 1184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (i > 0U) 1186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 1187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Set accumulator to zero */ 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0 = 0.0f; 1189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize state pointer */ 1191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr1 = pState; 1192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Initialize coefficient pointer */ 1194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 = pCoeffs + (i - 1U); 1195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Loop over the polyPhase length */ 1197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen; 1198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 1200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Perform the multiply-accumulate */ 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** sum0 += *ptr1++ * *ptr2; 1203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Increment the coefficient pointer by interpolation factor times. */ 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ptr2 += S->L; 1206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement the loop counter */ 1208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; ARM GAS /tmp/ccJrAs6S.s page 1074 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 1210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* The result is in the accumulator, store in the destination buffer. */ 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pDst++ = sum0; 1213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement loop counter */ 1215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** i--; 1216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 1217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Advance the state pointer by 1 1219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** * to process the next group of interpolation factor number samples */ 1220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pState = pState + 1; 1221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement loop counter */ 1223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** blkCnt--; 1224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 1225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Processing is complete. 1227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ** Now copy the last phaseLen - 1 samples to the start of the state buffer. 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** ** This prepares the state buffer for the next function call. */ 1229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Points to the start of the state buffer */ 1231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** pStateCur = S->pState; 1232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt = phaseLen - 1U; 1234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Copy data */ 1236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** while (tapCnt > 0U) 1237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** { 1238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** *pStateCur++ = *pState++; 1239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** /* Decrement loop counter */ 1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** tapCnt--; 1242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 1243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 1245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** 1246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c **** } 26244 .loc 61 1246 0 26245 0092 03B0 add sp, sp, #12 26246 .LCFI172: 26247 .cfi_remember_state 26248 .cfi_def_cfa_offset 36 26249 @ sp needed 26250 0094 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 26251 .LVL4247: 26252 .L1988: 26253 .LCFI173: 26254 .cfi_restore_state 26255 0098 2A46 mov r2, r5 26256 .LVL4248: 26257 009a F1E7 b .L1980 26258 .L2002: 26259 .align 2 26260 .L2001: 26261 009c 00000000 .word 0 26262 .cfi_endproc ARM GAS /tmp/ccJrAs6S.s page 1075 26263 .LFE206: 26265 .section .text.arm_fir_interpolate_init_f32,"ax",%progbits 26266 .align 1 26267 .p2align 2,,3 26268 .global arm_fir_interpolate_init_f32 26269 .syntax unified 26270 .thumb 26271 .thumb_func 26272 .fpu fpv4-sp-d16 26274 arm_fir_interpolate_init_f32: 26275 .LFB207: 26276 .file 62 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolat 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * Title: arm_fir_interpolate_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * Description: Floating-point FIR interpolator initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @addtogroup FIR_Interpolate 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @brief Initialization function for the floating-point FIR interpolator. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @param[in,out] S points to an instance of the floating-point FIR interpolator structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @param[in] L upsample factor 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @param[in] numTaps number of filter coefficients in the filter 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @param[in] pCoeffs points to the filter coefficient buffer ARM GAS /tmp/ccJrAs6S.s page 1076 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @param[in] pState points to the state buffer 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @param[in] blockSize number of input samples to process per call 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @return execution status 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : filter length numTaps is not a mul 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @par Details 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** pCoeffs points to the array of filter coefficients stored in time r 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c ****       {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** The length of the filter numTaps must be a multiple of the interpol 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** @par 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** pState points to the array of state variables. 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** pState is of length (numTaps/L)+blockSize-1 words 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** where blockSize is the number of input samples processed by each ca 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** arm_status arm_fir_interpolate_init_f32( 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** arm_fir_interpolate_instance_f32 * S, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** uint8_t L, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** uint16_t numTaps, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** const float32_t * pCoeffs, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** float32_t * pState, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** uint32_t blockSize) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** { 26277 .loc 62 72 0 26278 .cfi_startproc 26279 @ args = 8, pretend = 0, frame = 0 26280 @ frame_needed = 0, uses_anonymous_args = 0 26281 .LVL4249: 26282 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 26283 .LCFI174: 26284 .cfi_def_cfa_offset 24 26285 .cfi_offset 3, -24 26286 .cfi_offset 4, -20 26287 .cfi_offset 5, -16 26288 .cfi_offset 6, -12 26289 .cfi_offset 7, -8 26290 .cfi_offset 14, -4 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** arm_status status; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** /* The filter length must be a multiple of the interpolation factor */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** if ((numTaps % L) != 0U) 26291 .loc 62 76 0 26292 0002 92FBF1F6 sdiv r6, r2, r1 26293 0006 01FB1624 mls r4, r1, r6, r2 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** arm_status status; 26294 .loc 62 72 0 26295 000a 069F ldr r7, [sp, #24] 26296 .loc 62 76 0 26297 000c 84B9 cbnz r4, .L2005 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** { 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** /* Set status as ARM_MATH_LENGTH_ERROR */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** status = ARM_MATH_LENGTH_ERROR; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** } ARM GAS /tmp/ccJrAs6S.s page 1077 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** else 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** { 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** /* Assign coefficient pointer */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** S->pCoeffs = pCoeffs; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** /* Assign Interpolation factor */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** S->L = L; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** /* Assign polyPhaseLength */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** S->phaseLength = numTaps / L; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(float32_t)); 26298 .loc 62 93 0 26299 000e 079A ldr r2, [sp, #28] 26300 .LVL4250: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 26301 .loc 62 84 0 26302 0010 4360 str r3, [r0, #4] 26303 .loc 62 93 0 26304 0012 02F18042 add r2, r2, #1073741824 26305 0016 013A subs r2, r2, #1 26306 0018 0546 mov r5, r0 26307 001a 3244 add r2, r2, r6 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 26308 .loc 62 87 0 26309 001c 0170 strb r1, [r0] 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 26310 .loc 62 90 0 26311 001e 4680 strh r6, [r0, #2] @ movhi 26312 .loc 62 93 0 26313 0020 9200 lsls r2, r2, #2 26314 0022 2146 mov r1, r4 26315 .LVL4251: 26316 0024 3846 mov r0, r7 26317 .LVL4252: 26318 0026 FFF7FEFF bl memset 26319 .LVL4253: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** /* Assign state pointer */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** S->pState = pState; 26320 .loc 62 96 0 26321 002a AF60 str r7, [r5, #8] 26322 .LVL4254: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** status = ARM_MATH_SUCCESS; 26323 .loc 62 98 0 26324 002c 2046 mov r0, r4 26325 .LVL4255: 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** } 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** return (status); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** } 26326 .loc 62 102 0 26327 002e F8BD pop {r3, r4, r5, r6, r7, pc} 26328 .LVL4256: 26329 .L2005: ARM GAS /tmp/ccJrAs6S.s page 1078 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c **** } 26330 .loc 62 79 0 26331 0030 6FF00100 mvn r0, #1 26332 .LVL4257: 26333 .loc 62 102 0 26334 0034 F8BD pop {r3, r4, r5, r6, r7, pc} 26335 .cfi_endproc 26336 .LFE207: 26338 0036 00BF .section .text.arm_fir_interpolate_init_q15,"ax",%progbits 26339 .align 1 26340 .p2align 2,,3 26341 .global arm_fir_interpolate_init_q15 26342 .syntax unified 26343 .thumb 26344 .thumb_func 26345 .fpu fpv4-sp-d16 26347 arm_fir_interpolate_init_q15: 26348 .LFB208: 26349 .file 63 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolat 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * Title: arm_fir_interpolate_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * Description: Q15 FIR interpolator initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @addtogroup FIR_Interpolate 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** */ ARM GAS /tmp/ccJrAs6S.s page 1079 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @brief Initialization function for the Q15 FIR interpolator. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @param[in,out] S points to an instance of the Q15 FIR interpolator structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @param[in] L upsample factor 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @param[in] numTaps number of filter coefficients in the filter 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @param[in] pCoeffs points to the filter coefficient buffer 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @param[in] pState points to the state buffer 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @param[in] blockSize number of input samples to process per call 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @return execution status 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** - \ref ARM_MATH_ARGUMENT_ERROR : filter length numTaps is not a mul 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @par Details 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** pCoeffs points to the array of filter coefficients stored in time r 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c ****       {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c ****
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** The length of the filter numTaps must be a multiple of the interpol 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** @par 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** pState points to the array of state variables. 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** pState is of length (numTaps/L)+blockSize-1 words 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** where blockSize is the number of input samples processed by each ca 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** arm_status arm_fir_interpolate_init_q15( 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** arm_fir_interpolate_instance_q15 * S, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** uint8_t L, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** uint16_t numTaps, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** const q15_t * pCoeffs, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** q15_t * pState, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** uint32_t blockSize) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** { 26350 .loc 63 72 0 26351 .cfi_startproc 26352 @ args = 8, pretend = 0, frame = 0 26353 @ frame_needed = 0, uses_anonymous_args = 0 26354 .LVL4258: 26355 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 26356 .LCFI175: 26357 .cfi_def_cfa_offset 24 26358 .cfi_offset 3, -24 26359 .cfi_offset 4, -20 26360 .cfi_offset 5, -16 26361 .cfi_offset 6, -12 26362 .cfi_offset 7, -8 26363 .cfi_offset 14, -4 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** arm_status status; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** /* The filter length must be a multiple of the interpolation factor */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** if ((numTaps % L) != 0U) 26364 .loc 63 76 0 26365 0002 92FBF1F6 sdiv r6, r2, r1 26366 0006 01FB1624 mls r4, r1, r6, r2 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** arm_status status; 26367 .loc 63 72 0 ARM GAS /tmp/ccJrAs6S.s page 1080 26368 000a 069F ldr r7, [sp, #24] 26369 .loc 63 76 0 26370 000c 84B9 cbnz r4, .L2009 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** { 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** /* Set status as ARM_MATH_LENGTH_ERROR */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** status = ARM_MATH_LENGTH_ERROR; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** } 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** else 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** { 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** /* Assign coefficient pointer */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** S->pCoeffs = pCoeffs; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** /* Assign Interpolation factor */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** S->L = L; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** /* Assign polyPhaseLength */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** S->phaseLength = numTaps / L; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q15_t)); 26371 .loc 63 93 0 26372 000e 079A ldr r2, [sp, #28] 26373 .LVL4259: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 26374 .loc 63 84 0 26375 0010 4360 str r3, [r0, #4] 26376 .loc 63 93 0 26377 0012 02F10042 add r2, r2, #-2147483648 26378 0016 013A subs r2, r2, #1 26379 0018 0546 mov r5, r0 26380 001a 3244 add r2, r2, r6 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 26381 .loc 63 87 0 26382 001c 0170 strb r1, [r0] 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 26383 .loc 63 90 0 26384 001e 4680 strh r6, [r0, #2] @ movhi 26385 .loc 63 93 0 26386 0020 5200 lsls r2, r2, #1 26387 0022 2146 mov r1, r4 26388 .LVL4260: 26389 0024 3846 mov r0, r7 26390 .LVL4261: 26391 0026 FFF7FEFF bl memset 26392 .LVL4262: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** /* Assign state pointer */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** S->pState = pState; 26393 .loc 63 96 0 26394 002a AF60 str r7, [r5, #8] 26395 .LVL4263: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** status = ARM_MATH_SUCCESS; 26396 .loc 63 98 0 26397 002c 2046 mov r0, r4 26398 .LVL4264: 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** } ARM GAS /tmp/ccJrAs6S.s page 1081 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** return (status); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** } 26399 .loc 63 102 0 26400 002e F8BD pop {r3, r4, r5, r6, r7, pc} 26401 .LVL4265: 26402 .L2009: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c **** } 26403 .loc 63 79 0 26404 0030 6FF00100 mvn r0, #1 26405 .LVL4266: 26406 .loc 63 102 0 26407 0034 F8BD pop {r3, r4, r5, r6, r7, pc} 26408 .cfi_endproc 26409 .LFE208: 26411 0036 00BF .section .text.arm_fir_interpolate_init_q31,"ax",%progbits 26412 .align 1 26413 .p2align 2,,3 26414 .global arm_fir_interpolate_init_q31 26415 .syntax unified 26416 .thumb 26417 .thumb_func 26418 .fpu fpv4-sp-d16 26420 arm_fir_interpolate_init_q31: 26421 .LFB209: 26422 .file 64 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolat 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * Title: arm_fir_interpolate_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * Description: Q31 FIR interpolator initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** /** ARM GAS /tmp/ccJrAs6S.s page 1082 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @addtogroup FIR_Interpolate 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @brief Initialization function for the Q31 FIR interpolator. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @param[in,out] S points to an instance of the Q31 FIR interpolator structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @param[in] L upsample factor 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @param[in] numTaps number of filter coefficients in the filter 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @param[in] pCoeffs points to the filter coefficient buffer 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @param[in] pState points to the state buffer 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @param[in] blockSize number of input samples to process per call 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @return execution status 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** - \ref ARM_MATH_ARGUMENT_ERROR : filter length numTaps is not a mul 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @par Details 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** pCoeffs points to the array of filter coefficients stored in time r 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c ****       {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** The length of the filter numTaps must be a multiple of the interpol 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** @par 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** pState points to the array of state variables. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** pState is of length (numTaps/L)+blockSize-1 words 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** where blockSize is the number of input samples processed by each ca 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** arm_status arm_fir_interpolate_init_q31( 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** arm_fir_interpolate_instance_q31 * S, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** uint8_t L, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** uint16_t numTaps, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** const q31_t * pCoeffs, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** q31_t * pState, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** uint32_t blockSize) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** { 26423 .loc 64 71 0 26424 .cfi_startproc 26425 @ args = 8, pretend = 0, frame = 0 26426 @ frame_needed = 0, uses_anonymous_args = 0 26427 .LVL4267: 26428 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 26429 .LCFI176: 26430 .cfi_def_cfa_offset 24 26431 .cfi_offset 3, -24 26432 .cfi_offset 4, -20 26433 .cfi_offset 5, -16 26434 .cfi_offset 6, -12 26435 .cfi_offset 7, -8 26436 .cfi_offset 14, -4 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** arm_status status; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** /* The filter length must be a multiple of the interpolation factor */ ARM GAS /tmp/ccJrAs6S.s page 1083 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** if ((numTaps % L) != 0U) 26437 .loc 64 75 0 26438 0002 92FBF1F6 sdiv r6, r2, r1 26439 0006 01FB1624 mls r4, r1, r6, r2 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** arm_status status; 26440 .loc 64 71 0 26441 000a 069F ldr r7, [sp, #24] 26442 .loc 64 75 0 26443 000c 84B9 cbnz r4, .L2013 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** { 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** /* Set status as ARM_MATH_LENGTH_ERROR */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** status = ARM_MATH_LENGTH_ERROR; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** } 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** else 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** { 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** /* Assign coefficient pointer */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** S->pCoeffs = pCoeffs; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** /* Assign Interpolation factor */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** S->L = L; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** /* Assign polyPhaseLength */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** S->phaseLength = numTaps / L; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q31_t)); 26444 .loc 64 92 0 26445 000e 079A ldr r2, [sp, #28] 26446 .LVL4268: 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 26447 .loc 64 83 0 26448 0010 4360 str r3, [r0, #4] 26449 .loc 64 92 0 26450 0012 02F18042 add r2, r2, #1073741824 26451 0016 013A subs r2, r2, #1 26452 0018 0546 mov r5, r0 26453 001a 3244 add r2, r2, r6 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 26454 .loc 64 86 0 26455 001c 0170 strb r1, [r0] 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 26456 .loc 64 89 0 26457 001e 4680 strh r6, [r0, #2] @ movhi 26458 .loc 64 92 0 26459 0020 9200 lsls r2, r2, #2 26460 0022 2146 mov r1, r4 26461 .LVL4269: 26462 0024 3846 mov r0, r7 26463 .LVL4270: 26464 0026 FFF7FEFF bl memset 26465 .LVL4271: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** /* Assign state pointer */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** S->pState = pState; 26466 .loc 64 95 0 26467 002a AF60 str r7, [r5, #8] 26468 .LVL4272: ARM GAS /tmp/ccJrAs6S.s page 1084 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** status = ARM_MATH_SUCCESS; 26469 .loc 64 97 0 26470 002c 2046 mov r0, r4 26471 .LVL4273: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** } 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** return (status); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** } 26472 .loc 64 101 0 26473 002e F8BD pop {r3, r4, r5, r6, r7, pc} 26474 .LVL4274: 26475 .L2013: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c **** } 26476 .loc 64 78 0 26477 0030 6FF00100 mvn r0, #1 26478 .LVL4275: 26479 .loc 64 101 0 26480 0034 F8BD pop {r3, r4, r5, r6, r7, pc} 26481 .cfi_endproc 26482 .LFE209: 26484 0036 00BF .section .text.arm_fir_interpolate_q15,"ax",%progbits 26485 .align 1 26486 .p2align 2,,3 26487 .global arm_fir_interpolate_q15 26488 .syntax unified 26489 .thumb 26490 .thumb_func 26491 .fpu fpv4-sp-d16 26493 arm_fir_interpolate_q15: 26494 .LFB210: 26495 .file 65 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolat 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Title: arm_fir_interpolate_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Description: Q15 FIR interpolation 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * See the License for the specific language governing permissions and ARM GAS /tmp/ccJrAs6S.s page 1085 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** @addtogroup FIR_Interpolate 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** @brief Processing function for the Q15 FIR interpolator. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** @param[in] S points to an instance of the Q15 FIR interpolator structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** The function is implemented using a 64-bit internal accumulator. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** Both coefficients and state variables are represented in 1.15 format and multipl 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 f 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** There is no risk of internal overflow with this approach and the full precision 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** After all additions have been performed, the accumulator is truncated to 34.15 f 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** Lastly, the accumulator is saturated to yield a result in 1.15 format. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #if defined(ARM_MATH_MVEI) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #include "arm_helium_utils.h" 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** void arm_fir_interpolate_q15( 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** const arm_fir_interpolate_instance_q15 * S, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** const q15_t * pSrc, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t * pDst, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint32_t blockSize) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t *pState = S->pState; /* State pointer */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** const q15_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint32_t i, blkCnt; /* Loop counters */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint16_t strides[8] = { 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 0, 1 * S->L, 2 * S->L, 3 * S->L, 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 4 * S->L, 5 * S->L, 6 * S->L, 7 * S->L 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** }; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint16x8_t vec_strides0 = *(uint16x8_t *) strides; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint16x8_t vec_strides1 = vec_strides0 + 1; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint16x8_t vec_strides2 = vec_strides0 + 2; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint16x8_t vec_strides3 = vec_strides0 + 3; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15x8_t vecState, vecCoef; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1086 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * S->pState buffer contains previous frame (phaseLen - 1) samples 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * pStateCurnt points to the location where the new input data should be written 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pStateCurnt = S->pState + ((q15_t) phaseLen - 1); 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Total number of intput samples 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** blkCnt = blockSize; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Loop over the blockSize. 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (blkCnt > 0U) 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Copy new input sample into the state buffer 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pStateCurnt++ = *pSrc++; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Loop over the Interpolation factor. 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** i = S->L; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (i > 0U) 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Initialize state pointer 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr1 = pState; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** if (i >= 4) 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Initialize coefficient pointer 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 = pCoeffs + (i - 1 - 3U); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t acc0 = 0LL; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t acc1 = 0LL; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t acc2 = 0LL; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t acc3 = 0LL; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint32_t tapCnt = phaseLen >> 3; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (tapCnt > 0U) 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecState = vldrhq_s16(ptr1); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides3); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = vmlaldavaq(acc0, vecState, vecCoef); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides2); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 = vmlaldavaq(acc1, vecState, vecCoef); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc2 = vmlaldavaq(acc2, vecState, vecCoef); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0); 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc3 = vmlaldavaq(acc3, vecState, vecCoef); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1087 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr1 += 8; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 = ptr2 + S->L * 8; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt--; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = phaseLen & 7; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** if (tapCnt > 0U) 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** mve_pred16_t p0 = vctp16q(tapCnt); 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecState = vldrhq_z_s16(ptr1, p0); 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides3, p0); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = vmlaldavaq(acc0, vecState, vecCoef); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides2, p0); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 = vmlaldavaq(acc1, vecState, vecCoef); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc2 = vmlaldavaq(acc2, vecState, vecCoef); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0); 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc3 = vmlaldavaq(acc3, vecState, vecCoef); 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = asrl(acc0, 15); 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 = asrl(acc1, 15); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc2 = asrl(acc2, 15); 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc3 = asrl(acc3, 15); 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pDst++ = (q15_t) __SSAT(acc0, 16); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pDst++ = (q15_t) __SSAT(acc1, 16); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pDst++ = (q15_t) __SSAT(acc2, 16); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pDst++ = (q15_t) __SSAT(acc3, 16); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** i -= 4; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** else if (i >= 3) 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Initialize coefficient pointer 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 = pCoeffs + (i - 1U - 2); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t acc0 = 0LL; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t acc1 = 0LL; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t acc2 = 0LL; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint32_t tapCnt = phaseLen >> 3; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (tapCnt > 0U) 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecState = vldrhq_s16(ptr1); 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides2); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = vmlaldavaq(acc0, vecState, vecCoef); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 = vmlaldavaq(acc1, vecState, vecCoef); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1088 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc2 = vmlaldavaq(acc2, vecState, vecCoef); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr1 += 8; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 = ptr2 + S->L * 8; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt--; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = phaseLen & 7; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** if (tapCnt > 0U) 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** mve_pred16_t p0 = vctp16q(tapCnt); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecState = vldrhq_z_s16(ptr1, p0); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides2, p0); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = vmlaldavaq(acc0, vecState, vecCoef); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 = vmlaldavaq(acc1, vecState, vecCoef); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc2 = vmlaldavaq(acc2, vecState, vecCoef); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = asrl(acc0, 15); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 = asrl(acc1, 15); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc2 = asrl(acc2, 15); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pDst++ = (q15_t) __SSAT(acc0, 16);; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pDst++ = (q15_t) __SSAT(acc1, 16);; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pDst++ = (q15_t) __SSAT(acc2, 16);; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** i -= 3; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** else if (i >= 2) 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Initialize coefficient pointer 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 = pCoeffs + (i - 1U - 1); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t acc0 = 0LL; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t acc1 = 0LL; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint32_t tapCnt = phaseLen >> 3; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (tapCnt > 0U) 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecState = vldrhq_s16(ptr1); 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = vmlaldavaq(acc0, vecState, vecCoef); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0); 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 = vmlaldavaq(acc1, vecState, vecCoef); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr1 += 8; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 = ptr2 + S->L * 8; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt--; ARM GAS /tmp/ccJrAs6S.s page 1089 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = phaseLen & 7; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** if (tapCnt > 0U) 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** mve_pred16_t p0 = vctp16q(tapCnt); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecState = vldrhq_z_s16(ptr1, p0); 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0); 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = vmlaldavaq(acc0, vecState, vecCoef); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 = vmlaldavaq(acc1, vecState, vecCoef); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = asrl(acc0, 15); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 = asrl(acc1, 15); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pDst++ = (q15_t) __SSAT(acc0, 16); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pDst++ = (q15_t) __SSAT(acc1, 16); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** i -= 2; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** else 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Initialize coefficient pointer 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 = pCoeffs + (i - 1U); 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t acc0 = 0LL; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint32_t tapCnt = phaseLen >> 3; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (tapCnt > 0U) 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecState = vldrhq_s16(ptr1); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0); 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = vmlaldavaq(acc0, vecState, vecCoef); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr1 += 8; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 = ptr2 + S->L * 8; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt--; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = phaseLen & 7; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** if (tapCnt > 0U) 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** mve_pred16_t p0 = vctp16q(tapCnt); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecState = vldrhq_z_s16(ptr1, p0); 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = vmlaldavaq(acc0, vecState, vecCoef); 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = asrl(acc0, 15); 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pDst++ = (q15_t) __SSAT(acc0, 16); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Decrement the loop counter ARM GAS /tmp/ccJrAs6S.s page 1090 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** i--; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Advance the state pointer by 1 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * * to process the next group of interpolation factor number samples 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pState = pState + 1; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Decrement the loop counter 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** blkCnt--; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Processing is complete. 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Now copy the last phaseLen - 1 samples to the satrt of the state buffer. 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * This prepares the state buffer for the next function call. 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Points to the start of the state buffer 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pStateCurnt = S->pState; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** blkCnt = (phaseLen - 1U) >> 3; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (blkCnt > 0U) 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vstrhq_s16(pStateCurnt, vldrhq_s16(pState)); 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pState += 8; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pStateCurnt += 8; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** blkCnt--; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** blkCnt = (phaseLen - 1U) & 7; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** if (blkCnt > 0U) 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** vstrhq_p_s16(pStateCurnt, vldrhq_s16(pState), p0); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #else 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** void arm_fir_interpolate_q15( 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** const arm_fir_interpolate_instance_q15 * S, 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** const q15_t * pSrc, 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t * pDst, 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint32_t blockSize) 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26496 .loc 65 357 0 26497 .cfi_startproc 26498 @ args = 0, pretend = 0, frame = 32 26499 @ frame_needed = 0, uses_anonymous_args = 0 26500 .LVL4276: 26501 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 26502 .LCFI177: 26503 .cfi_def_cfa_offset 36 26504 .cfi_offset 4, -36 26505 .cfi_offset 5, -32 ARM GAS /tmp/ccJrAs6S.s page 1091 26506 .cfi_offset 6, -28 26507 .cfi_offset 7, -24 26508 .cfi_offset 8, -20 26509 .cfi_offset 9, -16 26510 .cfi_offset 10, -12 26511 .cfi_offset 11, -8 26512 .cfi_offset 14, -4 26513 0004 8346 mov fp, r0 26514 0006 89B0 sub sp, sp, #36 26515 .LCFI178: 26516 .cfi_def_cfa_offset 72 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #if (1) 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** //#if !defined(ARM_MATH_CM0_FAMILY) 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t *pState = S->pState; /* State pointer */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t *pStateCur; /* Points to the current sample of the state 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t *ptr1; /* Temporary pointer for state buffer */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** const q15_t *ptr2; /* Temporary pointer for coefficient buffer 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t sum0; /* Accumulators */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint32_t i, blkCnt, tapCnt; /* Loop counters */ 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component 26517 .loc 65 368 0 26518 0008 B0F802E0 ldrh lr, [r0, #2] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #if (1) 26519 .loc 65 357 0 26520 000c 0491 str r1, [sp, #16] 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t *pStateCur; /* Points to the current sample of the state 26521 .loc 65 362 0 26522 000e DBF80410 ldr r1, [fp, #4] 26523 .LVL4277: 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 26524 .loc 65 361 0 26525 0012 8068 ldr r0, [r0, #8] 26526 .LVL4278: 26527 0014 0690 str r0, [sp, #24] 26528 .LVL4279: 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #if (1) 26529 .loc 65 357 0 26530 0016 CDE90012 strd r1, r2, [sp] 26531 .LVL4280: 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint32_t j; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t acc0, acc1, acc2, acc3; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t x0, x1, x2, x3; 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t c0, c1, c2, c3; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #endif 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* S->pState buffer contains previous frame (phaseLen - 1) samples */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* pStateCur points to the location where the new input data should be written */ 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pStateCur = S->pState + (phaseLen - 1U); 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** blkCnt = blockSize >> 2U; ARM GAS /tmp/ccJrAs6S.s page 1092 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (blkCnt > 0U) 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Copy new input sample into the state buffer */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pStateCur++ = *pSrc++; 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pStateCur++ = *pSrc++; 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pStateCur++ = *pSrc++; 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pStateCur++ = *pSrc++; 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Address modifier index of coefficient buffer */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** j = 1U; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop over the Interpolation factor. */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** i = (S->L); 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (i > 0U) 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Set accumulator to zero */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 = 0; 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 = 0; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc2 = 0; 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc3 = 0; 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Initialize state pointer */ 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr1 = pState; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Initialize coefficient pointer */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 = pCoeffs + (S->L - j); 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop over the polyPhase length. Unroll by a factor of 4. 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** Repeat until we've computed numTaps-(4*S->L) coefficients. */ 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = phaseLen >> 2U; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** x0 = *(ptr1++); 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** x1 = *(ptr1++); 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** x2 = *(ptr1++); 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (tapCnt > 0U) 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Read the input sample */ 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** x3 = *(ptr1++); 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Read the coefficient */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** c0 = *(ptr2); 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Perform the multiply-accumulate */ 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 += (q63_t) x0 * c0; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 += (q63_t) x1 * c0; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc2 += (q63_t) x2 * c0; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc3 += (q63_t) x3 * c0; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Read the coefficient */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** c1 = *(ptr2 + S->L); 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Read the input sample */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** x0 = *(ptr1++); 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1093 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Perform the multiply-accumulate */ 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 += (q63_t) x1 * c1; 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 += (q63_t) x2 * c1; 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc2 += (q63_t) x3 * c1; 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc3 += (q63_t) x0 * c1; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Read the coefficient */ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** c2 = *(ptr2 + S->L * 2); 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Read the input sample */ 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** x1 = *(ptr1++); 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Perform the multiply-accumulate */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 += (q63_t) x2 * c2; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 += (q63_t) x3 * c2; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc2 += (q63_t) x0 * c2; 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc3 += (q63_t) x1 * c2; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Read the coefficient */ 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** c3 = *(ptr2 + S->L * 3); 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Read the input sample */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** x2 = *(ptr1++); 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Perform the multiply-accumulate */ 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 += (q63_t) x3 * c3; 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 += (q63_t) x0 * c3; 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc2 += (q63_t) x1 * c3; 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc3 += (q63_t) x2 * c3; 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Upsampling is done by stuffing L-1 zeros between each sample. 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * So instead of multiplying zeros with coefficients, 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Increment the coefficient pointer by interpolation factor times. */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 += 4 * S->L; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement loop counter */ 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt--; 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = phaseLen % 0x4U; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (tapCnt > 0U) 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Read the input sample */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** x3 = *(ptr1++); 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Read the coefficient */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** c0 = *(ptr2); 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Perform the multiply-accumulate */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc0 += (q63_t) x0 * c0; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc1 += (q63_t) x1 * c0; 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc2 += (q63_t) x2 * c0; 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** acc3 += (q63_t) x3 * c0; 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1094 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Increment the coefficient pointer by interpolation factor times. */ 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 += S->L; 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* update states for next sample processing */ 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** x0 = x1; 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** x1 = x2; 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** x2 = x3; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement loop counter */ 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt--; 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* The result is in the accumulator, store in the destination buffer. */ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *(pDst ) = (q15_t) (__SSAT((acc0 >> 15), 16)); 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *(pDst + S->L) = (q15_t) (__SSAT((acc1 >> 15), 16)); 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *(pDst + 2 * S->L) = (q15_t) (__SSAT((acc2 >> 15), 16)); 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *(pDst + 3 * S->L) = (q15_t) (__SSAT((acc3 >> 15), 16)); 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pDst++; 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Increment the address modifier index of coefficient buffer */ 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** j++; 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement loop counter */ 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** i--; 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Advance the state pointer by 1 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * to process the next group of interpolation factor number samples */ 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pState = pState + 4; 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pDst += S->L * 3; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement loop counter */ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** blkCnt--; 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop unrolling: Compute remaining outputs */ 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** blkCnt = blockSize % 0x4U; 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #else 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Initialize blkCnt with number of samples */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** blkCnt = blockSize; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (blkCnt > 0U) 26532 .loc 65 546 0 26533 001a 0793 str r3, [sp, #28] 26534 001c 002B cmp r3, #0 26535 001e 00F0AF80 beq .L2031 26536 0022 0EF10041 add r1, lr, #-2147483648 26537 0026 0139 subs r1, r1, #1 26538 0028 4900 lsls r1, r1, #1 26539 002a 0239 subs r1, r1, #2 26540 002c 4218 adds r2, r0, r1 ARM GAS /tmp/ccJrAs6S.s page 1095 26541 .LVL4281: 26542 002e CDE90232 strd r3, r2, [sp, #8] 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 26543 .loc 65 361 0 26544 0032 8146 mov r9, r0 26545 .LVL4282: 26546 .L2022: 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Copy new input sample into the state buffer */ 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pStateCur++ = *pSrc++; 26547 .loc 65 549 0 26548 0034 049A ldr r2, [sp, #16] 26549 0036 32F9023B ldrsh r3, [r2], #2 26550 003a 0492 str r2, [sp, #16] 26551 .LVL4283: 26552 003c 039A ldr r2, [sp, #12] 26553 .LVL4284: 26554 003e 22F8023F strh r3, [r2, #2]! @ movhi 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Address modifier index of coefficient buffer */ 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** j = 1U; 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop over the Interpolation factor. */ 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** i = S->L; 26555 .loc 65 555 0 26556 0042 9BF80070 ldrb r7, [fp] @ zero_extendqisi2 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 26557 .loc 65 549 0 26558 0046 0392 str r2, [sp, #12] 26559 .LVL4285: 26560 .loc 65 555 0 26561 0048 0597 str r7, [sp, #20] 26562 .LVL4286: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (i > 0U) 26563 .loc 65 556 0 26564 004a 002F cmp r7, #0 26565 004c 3DD0 beq .L2017 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 26566 .loc 65 552 0 26567 004e 4FF0010C mov ip, #1 26568 .LVL4287: 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Set accumulator to zero */ 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** sum0 = 0; 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Initialize state pointer */ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr1 = pState; 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Initialize coefficient pointer */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 = pCoeffs + (S->L - j); 26569 .loc 65 565 0 26570 0052 009A ldr r2, [sp] 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26571 .loc 65 556 0 26572 0054 DDF80480 ldr r8, [sp, #4] 26573 .LVL4288: 26574 .loc 65 565 0 ARM GAS /tmp/ccJrAs6S.s page 1096 26575 0058 A7EB0C03 sub r3, r7, ip 26576 005c 07F1010A add r10, r7, #1 26577 0060 02EB4303 add r3, r2, r3, lsl #1 26578 .LVL4289: 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop over the polyPhase length. 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** Repeat until we've computed numTaps-(4*S->L) coefficients. */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = phaseLen >> 2U; 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (tapCnt > 0U) 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Perform the multiply-accumulate */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** sum0 += (q63_t) *ptr1++ * *ptr2; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Upsampling is done by stuffing L-1 zeros between each sample. 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * So instead of multiplying zeros with coefficients, 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Increment the coefficient pointer by interpolation factor times. */ 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 += S->L; 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** sum0 += (q63_t) *ptr1++ * *ptr2; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 += S->L; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** sum0 += (q63_t) *ptr1++ * *ptr2; 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 += S->L; 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** sum0 += (q63_t) *ptr1++ * *ptr2; 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 += S->L; 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement loop counter */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt--; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop unrolling: Compute remaining outputs */ 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = phaseLen % 0x4U; 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #else 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Initialize tapCnt with number of samples */ 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = phaseLen; 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (tapCnt > 0U) 26579 .loc 65 608 0 26580 0064 BEF1000F cmp lr, #0 26581 0068 21D0 beq .L2032 26582 .LVL4290: 26583 .L2054: 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Perform the multiply-accumulate */ 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** sum0 += (q63_t) *ptr1++ * *ptr2; 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Upsampling is done by stuffing L-1 zeros between each sample. ARM GAS /tmp/ccJrAs6S.s page 1097 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * So instead of multiplying zeros with coefficients, 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * Increment the coefficient pointer by interpolation factor times. */ 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 += S->L; 26584 .loc 65 616 0 26585 006a 7F00 lsls r7, r7, #1 26586 006c 7246 mov r2, lr 26587 006e 4C46 mov r4, r9 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 26588 .loc 65 559 0 26589 0070 0020 movs r0, #0 26590 0072 0021 movs r1, #0 26591 .LVL4291: 26592 .L2019: 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 26593 .loc 65 611 0 26594 0074 1D88 ldrh r5, [r3] 26595 0076 34F8026B ldrh r6, [r4], #2 26596 .LVL4292: 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26597 .loc 65 608 0 26598 007a 013A subs r2, r2, #1 26599 .LVL4293: 26600 .loc 65 616 0 26601 007c 3B44 add r3, r3, r7 26602 .LVL4294: 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 26603 .loc 65 611 0 26604 007e C6FB8501 smlalbb r0, r1, r6, r5 26605 .LVL4295: 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26606 .loc 65 608 0 26607 0082 F7D1 bne .L2019 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement loop counter */ 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt--; 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* The result is in the accumulator, store in the destination buffer. */ 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Increment the address modifier index of coefficient buffer */ 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** j++; 26608 .loc 65 626 0 26609 0084 0CF1010C add ip, ip, #1 26610 .LVL4296: 26611 0088 C30B lsrs r3, r0, #15 26612 .LVL4297: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26613 .loc 65 556 0 26614 008a D445 cmp ip, r10 26615 008c 43EA4143 orr r3, r3, r1, lsl #17 26616 .LVL4298: 26617 .LBB2296: 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 26618 .loc 65 623 0 26619 .syntax unified 26620 @ 623 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q1 ARM GAS /tmp/ccJrAs6S.s page 1098 26621 0090 03F30F03 ssat r3, #16, r3 26622 @ 0 "" 2 26623 .LVL4299: 26624 .thumb 26625 .syntax unified 26626 .LBE2296: 26627 0094 28F8023B strh r3, [r8], #2 @ movhi 26628 .LVL4300: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26629 .loc 65 556 0 26630 0098 12D0 beq .L2020 26631 .LVL4301: 26632 .L2055: 26633 009a 9BF80070 ldrb r7, [fp] @ zero_extendqisi2 26634 .LVL4302: 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 26635 .loc 65 565 0 26636 009e 009A ldr r2, [sp] 26637 00a0 A7EB0C03 sub r3, r7, ip 26638 .LVL4303: 26639 00a4 02EB4303 add r3, r2, r3, lsl #1 26640 .LVL4304: 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26641 .loc 65 608 0 26642 00a8 BEF1000F cmp lr, #0 26643 00ac DDD1 bne .L2054 26644 .L2032: 26645 .loc 65 626 0 26646 00ae 0CF1010C add ip, ip, #1 26647 .LVL4305: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26648 .loc 65 556 0 26649 00b2 D445 cmp ip, r10 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26650 .loc 65 608 0 26651 00b4 7346 mov r3, lr 26652 .LVL4306: 26653 .LBB2297: 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 26654 .loc 65 623 0 26655 .syntax unified 26656 @ 623 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q1 26657 00b6 03F30F03 ssat r3, #16, r3 26658 @ 0 "" 2 26659 .LVL4307: 26660 .thumb 26661 .syntax unified 26662 .LBE2297: 26663 00ba 28F8023B strh r3, [r8], #2 @ movhi 26664 .LVL4308: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26665 .loc 65 556 0 26666 00be ECD1 bne .L2055 26667 .LVL4309: 26668 .L2020: 26669 00c0 019B ldr r3, [sp, #4] 26670 .LVL4310: ARM GAS /tmp/ccJrAs6S.s page 1099 26671 00c2 059A ldr r2, [sp, #20] 26672 00c4 03EB4203 add r3, r3, r2, lsl #1 26673 00c8 0193 str r3, [sp, #4] 26674 .LVL4311: 26675 .L2017: 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26676 .loc 65 546 0 26677 00ca 029B ldr r3, [sp, #8] 26678 00cc 013B subs r3, r3, #1 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement the loop counter */ 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** i--; 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Advance the state pointer by 1 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * to process the next group of interpolation factor number samples */ 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pState = pState + 1; 26679 .loc 65 634 0 26680 00ce 09F10209 add r9, r9, #2 26681 .LVL4312: 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26682 .loc 65 546 0 26683 00d2 0293 str r3, [sp, #8] 26684 00d4 AED1 bne .L2022 26685 00d6 DDE90632 ldrd r3, r2, [sp, #24] 26686 .LVL4313: 26687 00da 03EB4203 add r3, r3, r2, lsl #1 26688 .LVL4314: 26689 .L2016: 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement the loop counter */ 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** blkCnt--; 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Processing is complete. 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** Now copy the last phaseLen - 1 samples to the satrt of the state buffer. 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** This prepares the state buffer for the next function call. */ 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Points to the start of the state buffer */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pStateCur = S->pState; 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = (phaseLen - 1U) >> 2U; 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* copy data */ 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (tapCnt > 0U) 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement loop counter */ 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt--; 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop unrolling: Compute remaining outputs */ ARM GAS /tmp/ccJrAs6S.s page 1100 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = (phaseLen - 1U) % 0x04U; 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #else 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Initialize tapCnt with number of samples */ 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = (phaseLen - 1U); 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Copy data */ 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (tapCnt > 0U) 26690 .loc 65 673 0 26691 00de BEF10101 subs r1, lr, #1 26692 .LVL4315: 26693 00e2 3BD0 beq .L2015 26694 00e4 069C ldr r4, [sp, #24] 26695 00e6 1A1D adds r2, r3, #4 26696 00e8 201D adds r0, r4, #4 26697 00ea 8342 cmp r3, r0 26698 00ec 38BF it cc 26699 00ee 9442 cmpcc r4, r2 26700 00f0 3BD3 bcc .L2024 26701 00f2 0D29 cmp r1, #13 26702 00f4 39D9 bls .L2024 26703 00f6 C3F34002 ubfx r2, r3, #1, #1 26704 00fa 002A cmp r2, #0 26705 00fc AEF1020E sub lr, lr, #2 26706 0100 0CBF ite eq 26707 0102 0120 moveq r0, #1 26708 0104 0220 movne r0, #2 26709 0106 8645 cmp lr, r0 26710 0108 1FD3 bcc .L2025 26711 010a 52B3 cbz r2, .L2033 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pStateCur++ = *pState++; 26712 .loc 65 675 0 26713 010c B3F90000 ldrsh r0, [r3] 26714 0110 2080 strh r0, [r4] @ movhi 26715 0112 9E1C adds r6, r3, #2 26716 .LVL4316: 26717 0114 A51C adds r5, r4, #2 26718 .LVL4317: 26719 .L2026: 26720 0116 8C1A subs r4, r1, r2 26721 0118 0699 ldr r1, [sp, #24] 26722 011a 5200 lsls r2, r2, #1 26723 011c A01E subs r0, r4, #2 26724 011e 1144 add r1, r1, r2 26725 0120 4008 lsrs r0, r0, #1 26726 0122 1344 add r3, r3, r2 26727 0124 0130 adds r0, r0, #1 26728 0126 0A46 mov r2, r1 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26729 .loc 65 673 0 26730 0128 0021 movs r1, #0 26731 .LVL4318: 26732 .L2027: ARM GAS /tmp/ccJrAs6S.s page 1101 26733 012a 0131 adds r1, r1, #1 26734 .loc 65 675 0 26735 012c 53F8047B ldr r7, [r3], #4 26736 0130 42F8047B str r7, [r2], #4 @ unaligned 26737 0134 8142 cmp r1, r0 26738 0136 F8D3 bcc .L2027 26739 0138 4200 lsls r2, r0, #1 26740 013a 8000 lsls r0, r0, #2 26741 013c 3318 adds r3, r6, r0 26742 013e 9442 cmp r4, r2 26743 0140 2844 add r0, r5, r0 26744 0142 AEEB0201 sub r1, lr, r2 26745 0146 0690 str r0, [sp, #24] 26746 0148 08D0 beq .L2015 26747 .L2025: 26748 .LVL4319: 26749 014a 0698 ldr r0, [sp, #24] 26750 014c B3F90020 ldrsh r2, [r3] 26751 0150 0280 strh r2, [r0] @ movhi 26752 .LVL4320: 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26753 .loc 65 673 0 26754 0152 0129 cmp r1, #1 26755 0154 02D0 beq .L2015 26756 .LVL4321: 26757 .loc 65 675 0 26758 0156 B3F90230 ldrsh r3, [r3, #2] 26759 .LVL4322: 26760 015a 4380 strh r3, [r0, #2] @ movhi 26761 .LVL4323: 26762 .L2015: 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement loop counter */ 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt--; 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #else 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* alternate version for CM0_FAMILY */ 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t *pState = S->pState; /* State pointer */ 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t *pStateCur; /* Points to the current sample of the state 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q15_t *ptr1; /* Temporary pointer for state buffer */ 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** const q15_t *ptr2; /* Temporary pointer for coefficient buffer 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** q63_t sum0; /* Accumulators */ 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint32_t i, blkCnt, tapCnt; /* Loop counters */ 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* S->pState buffer contains previous frame (phaseLen - 1) samples */ 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* pStateCur points to the location where the new input data should be written */ 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pStateCur = S->pState + (phaseLen - 1U); 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Total number of intput samples */ 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** blkCnt = blockSize; 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop over the blockSize. */ 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (blkCnt > 0U) ARM GAS /tmp/ccJrAs6S.s page 1102 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Copy new input sample into the state buffer */ 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pStateCur++ = *pSrc++; 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop over the Interpolation factor. */ 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** i = S->L; 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (i > 0U) 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Set accumulator to zero */ 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** sum0 = 0; 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Initialize state pointer */ 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr1 = pState; 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Initialize coefficient pointer */ 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 = pCoeffs + (i - 1U); 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Loop over the polyPhase length */ 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = phaseLen; 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (tapCnt > 0U) 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Perform the multiply-accumulate */ 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** sum0 += ((q63_t) *ptr1++ * *ptr2); 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Increment the coefficient pointer by interpolation factor times. */ 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ptr2 += S->L; 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement the loop counter */ 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt--; 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Store the result after converting to 1.15 format in the destination buffer. */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement loop counter */ 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** i--; 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Advance the state pointer by 1 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** * to process the next group of interpolation factor number samples */ 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pState = pState + 1; 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement loop counter */ 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** blkCnt--; 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Processing is complete. 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ** Now copy the last phaseLen - 1 samples to the start of the state buffer. 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ** This prepares the state buffer for the next function call. */ 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Points to the start of the state buffer */ 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** pStateCur = S->pState; 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt = phaseLen - 1U; 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1103 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Copy data */ 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** while (tapCnt > 0U) 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** *pStateCur++ = *pState++; 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** /* Decrement loop counter */ 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** tapCnt--; 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** } 26763 .loc 65 770 0 26764 015c 09B0 add sp, sp, #36 26765 .LCFI179: 26766 .cfi_remember_state 26767 .cfi_def_cfa_offset 36 26768 @ sp needed 26769 015e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 26770 .LVL4324: 26771 .L2033: 26772 .LCFI180: 26773 .cfi_restore_state 26774 0162 2546 mov r5, r4 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26775 .loc 65 673 0 26776 0164 8E46 mov lr, r1 26777 0166 1E46 mov r6, r3 26778 0168 D5E7 b .L2026 26779 .L2024: 26780 016a 069A ldr r2, [sp, #24] 26781 016c 023A subs r2, r2, #2 26782 .LVL4325: 26783 .L2029: 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** 26784 .loc 65 675 0 26785 016e 33F9020B ldrsh r0, [r3], #2 26786 .LVL4326: 26787 0172 22F8020F strh r0, [r2, #2]! @ movhi 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c **** { 26788 .loc 65 673 0 26789 0176 0139 subs r1, r1, #1 26790 .LVL4327: 26791 0178 F9D1 bne .L2029 26792 .loc 65 770 0 26793 017a 09B0 add sp, sp, #36 26794 .LCFI181: 26795 .cfi_remember_state 26796 .cfi_def_cfa_offset 36 26797 @ sp needed 26798 017c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 26799 .LVL4328: 26800 .L2031: 26801 .LCFI182: 26802 .cfi_restore_state 26803 0180 0346 mov r3, r0 26804 .LVL4329: ARM GAS /tmp/ccJrAs6S.s page 1104 26805 0182 ACE7 b .L2016 26806 .cfi_endproc 26807 .LFE210: 26809 .section .text.arm_fir_interpolate_q31,"ax",%progbits 26810 .align 1 26811 .p2align 2,,3 26812 .global arm_fir_interpolate_q31 26813 .syntax unified 26814 .thumb 26815 .thumb_func 26816 .fpu fpv4-sp-d16 26818 arm_fir_interpolate_q31: 26819 .LFB211: 26820 .file 66 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolat 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Title: arm_fir_interpolate_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Description: Q31 FIR interpolation 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** @addtogroup FIR_Interpolate 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** @brief Processing function for the Q31 FIR interpolator. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** @param[in] S points to an instance of the Q31 FIR interpolator structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** @param[in] pSrc points to the block of input data ARM GAS /tmp/ccJrAs6S.s page 1105 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** The function is implemented using an internal 64-bit accumulator. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** The accumulator has a 2.62 format and maintains full precision of the intermedia 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** Thus, if the accumulator result overflows it wraps around rather than clip. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** In order to avoid overflows completely the input signal must be scaled down by < 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** since numTaps/L additions occur per output sample. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** After all multiply-accumulates are performed, the 2.62 accumulator is truncated 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #if defined(ARM_MATH_MVEI) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #include "arm_helium_utils.h" 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** void arm_fir_interpolate_q31( 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const arm_fir_interpolate_instance_q31 * S, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const q31_t * pSrc, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t * pDst, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t blockSize) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t *pState = S->pState; /* State pointer */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t *pStateCurnt; /* Points to the current sample of the state */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const q31_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t i, blkCnt; /* Loop counters */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t strides[4] = { 0, 1 * S->L, 2 * S->L, 3 * S->L }; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32x4_t vec_strides0 = *(uint32x4_t *) strides; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32x4_t vec_strides1 = vec_strides0 + 1; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32x4_t vec_strides2 = vec_strides0 + 2; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32x4_t vec_strides3 = vec_strides0 + 3; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31x4_t vecState, vecCoef; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * S->pState buffer contains previous frame (phaseLen - 1) samples 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * pStateCurnt points to the location where the new input data should be written 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pStateCurnt = S->pState + ((q31_t) phaseLen - 1); 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Total number of intput samples 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** blkCnt = blockSize; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Loop over the blockSize. 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (blkCnt > 0U) 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Copy new input sample into the state buffer 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCurnt++ = *pSrc++; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Loop over the Interpolation factor. 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ ARM GAS /tmp/ccJrAs6S.s page 1106 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** i = S->L; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (i > 0U) 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Initialize state pointer 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr1 = pState; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** if (i >= 4) 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Initialize coefficient pointer 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 = pCoeffs + (i - 1 - 3U); 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t acc0 = 0LL; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t acc1 = 0LL; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t acc2 = 0LL; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t acc3 = 0LL; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t tapCnt = phaseLen >> 2; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (tapCnt > 0U) 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecState = vldrwq_s32(ptr1); 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides3); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides2); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 = vrmlaldavhaq(acc1, vecState, vecCoef); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides1); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc2 = vrmlaldavhaq(acc2, vecState, vecCoef); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides0); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc3 = vrmlaldavhaq(acc3, vecState, vecCoef); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr1 += 4; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 = ptr2 + S->L * 4; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt--; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = phaseLen & 3; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** if (tapCnt > 0U) 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** mve_pred16_t p0 = vctp32q(tapCnt); 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecState = vldrwq_z_s32(ptr1, p0); 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides3, p0); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides2, p0); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 = vrmlaldavhaq(acc1, vecState, vecCoef); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides1, p0); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc2 = vrmlaldavhaq(acc2, vecState, vecCoef); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides0, p0); ARM GAS /tmp/ccJrAs6S.s page 1107 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc3 = vrmlaldavhaq(acc3, vecState, vecCoef); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = asrl(acc0, 31 - 8); 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 = asrl(acc1, 31 - 8); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc2 = asrl(acc2, 31 - 8); 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc3 = asrl(acc3, 31 - 8); 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pDst++ = (q31_t) acc0; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pDst++ = (q31_t) acc1; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pDst++ = (q31_t) acc2; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pDst++ = (q31_t) acc3; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** i -= 4; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** else if (i >= 3) 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Initialize coefficient pointer 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 = pCoeffs + (i - 1U - 2); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t acc0 = 0LL; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t acc1 = 0LL; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t acc2 = 0LL; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t tapCnt = phaseLen >> 2; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (tapCnt > 0U) 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecState = vldrwq_s32(ptr1); 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides2); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides1); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 = vrmlaldavhaq(acc1, vecState, vecCoef); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides0); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc2 = vrmlaldavhaq(acc2, vecState, vecCoef); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr1 += 4; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 = ptr2 + S->L * 4; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt--; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = phaseLen & 3; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** if (tapCnt > 0U) 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** mve_pred16_t p0 = vctp32q(tapCnt); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecState = vldrwq_z_s32(ptr1, p0); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides2, p0); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides1, p0); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 = vrmlaldavhaq(acc1, vecState, vecCoef); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides0, p0); ARM GAS /tmp/ccJrAs6S.s page 1108 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc2 = vrmlaldavhaq(acc2, vecState, vecCoef); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = asrl(acc0, 31 - 8); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 = asrl(acc1, 31 - 8); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc2 = asrl(acc2, 31 - 8); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pDst++ = (q31_t) acc0; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pDst++ = (q31_t) acc1; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pDst++ = (q31_t) acc2; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** i -= 3; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** else if (i >= 2) 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Initialize coefficient pointer 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 = pCoeffs + (i - 1U - 1); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t acc0 = 0LL; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t acc1 = 0LL; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t tapCnt = phaseLen >> 2; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (tapCnt > 0U) 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecState = vldrwq_s32(ptr1); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides1); 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides0); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 = vrmlaldavhaq(acc1, vecState, vecCoef); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr1 += 4; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 = ptr2 + S->L * 4; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt--; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = phaseLen & 3; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** if (tapCnt > 0U) 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** mve_pred16_t p0 = vctp32q(tapCnt); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecState = vldrwq_z_s32(ptr1, p0); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides1, p0); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides0, p0); 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 = vrmlaldavhaq(acc1, vecState, vecCoef); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = asrl(acc0, 31 - 8); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 = asrl(acc1, 31 - 8); 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pDst++ = (q31_t) acc0; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pDst++ = (q31_t) acc1; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** i -= 2; ARM GAS /tmp/ccJrAs6S.s page 1109 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** else 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Initialize coefficient pointer 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 = pCoeffs + (i - 1U); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t acc0 = 0LL; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t tapCnt = phaseLen >> 2; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (tapCnt > 0U) 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecState = vldrwq_s32(ptr1); 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides0); 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr1 += 4; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 = ptr2 + S->L * 4; 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt--; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = phaseLen & 3; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** if (tapCnt > 0U) 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** mve_pred16_t p0 = vctp32q(tapCnt); 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecState = vldrwq_z_s32(ptr1, p0); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides0, p0); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = asrl(acc0, 31 - 8); 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pDst++ = (q31_t) acc0; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Decrement the loop counter 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** i--; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Advance the state pointer by 1 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * * to process the next group of interpolation factor number samples 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pState = pState + 1; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Decrement the loop counter 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** blkCnt--; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Processing is complete. 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer. 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * ** This prepares the state buffer for the next function call. 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1110 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Points to the start of the state buffer 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pStateCurnt = S->pState; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** blkCnt = (phaseLen - 1U) >> 2; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (blkCnt > 0U) 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vst1q(pStateCurnt, vldrwq_s32(pState)); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pState += 4; 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pStateCurnt += 4; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** blkCnt--; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** blkCnt = (phaseLen - 1U) & 3; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** if (blkCnt > 0U) 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** vstrwq_p_s32(pStateCurnt, vldrwq_s32(pState), p0); 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #else 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** void arm_fir_interpolate_q31( 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const arm_fir_interpolate_instance_q31 * S, 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const q31_t * pSrc, 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t * pDst, 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t blockSize) 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 26821 .loc 66 354 0 26822 .cfi_startproc 26823 @ args = 0, pretend = 0, frame = 24 26824 @ frame_needed = 0, uses_anonymous_args = 0 26825 .LVL4330: 26826 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 26827 .LCFI183: 26828 .cfi_def_cfa_offset 36 26829 .cfi_offset 4, -36 26830 .cfi_offset 5, -32 26831 .cfi_offset 6, -28 26832 .cfi_offset 7, -24 26833 .cfi_offset 8, -20 26834 .cfi_offset 9, -16 26835 .cfi_offset 10, -12 26836 .cfi_offset 11, -8 26837 .cfi_offset 14, -4 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #if (1) 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** //#if !defined(ARM_MATH_CM0_FAMILY) 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t *pState = S->pState; /* State pointer */ 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t *pStateCur; /* Points to the current sample of the state 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t *ptr1; /* Temporary pointer for state buffer */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const q31_t *ptr2; /* Temporary pointer for coefficient buffer 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t sum0; /* Accumulators */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t i, blkCnt, tapCnt; /* Loop counters */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component 26838 .loc 66 365 0 26839 0004 B0F80290 ldrh r9, [r0, #2] 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ ARM GAS /tmp/ccJrAs6S.s page 1111 26840 .loc 66 358 0 26841 0008 8768 ldr r7, [r0, #8] 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t *pStateCur; /* Points to the current sample of the state 26842 .loc 66 359 0 26843 000a 4668 ldr r6, [r0, #4] 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #if (1) 26844 .loc 66 354 0 26845 000c 87B0 sub sp, sp, #28 26846 .LCFI184: 26847 .cfi_def_cfa_offset 64 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t j; 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t acc0, acc1, acc2, acc3; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t x0, x1, x2, x3; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t c0, c1, c2, c3; 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #endif 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* S->pState buffer contains previous frame (phaseLen - 1) samples */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* pStateCur points to the location where the new input data should be written */ 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pStateCur = S->pState + (phaseLen - 1U); 26848 .loc 66 376 0 26849 000e 6FF04045 mvn r5, #-1073741824 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 26850 .loc 66 358 0 26851 0012 0497 str r7, [sp, #16] 26852 .LVL4331: 26853 .loc 66 376 0 26854 0014 09EB0504 add r4, r9, r5 26855 .LVL4332: 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** blkCnt = blockSize >> 2U; 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (blkCnt > 0U) 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Copy new input sample into the state buffer */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCur++ = *pSrc++; 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCur++ = *pSrc++; 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCur++ = *pSrc++; 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCur++ = *pSrc++; 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Address modifier index of coefficient buffer */ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** j = 1U; 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop over the Interpolation factor. */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** i = (S->L); 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (i > 0U) 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Set accumulator to zero */ 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 = 0; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 = 0; 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc2 = 0; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc3 = 0; ARM GAS /tmp/ccJrAs6S.s page 1112 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Initialize state pointer */ 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr1 = pState; 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Initialize coefficient pointer */ 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 = pCoeffs + (S->L - j); 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop over the polyPhase length. Unroll by a factor of 4. 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** Repeat until we've computed numTaps-(4*S->L) coefficients. */ 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = phaseLen >> 2U; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** x0 = *(ptr1++); 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** x1 = *(ptr1++); 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** x2 = *(ptr1++); 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (tapCnt > 0U) 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Read the input sample */ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** x3 = *(ptr1++); 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Read the coefficient */ 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** c0 = *(ptr2); 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Perform the multiply-accumulate */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 += (q63_t) x0 * c0; 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 += (q63_t) x1 * c0; 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc2 += (q63_t) x2 * c0; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc3 += (q63_t) x3 * c0; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Read the coefficient */ 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** c1 = *(ptr2 + S->L); 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Read the input sample */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** x0 = *(ptr1++); 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Perform the multiply-accumulate */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 += (q63_t) x1 * c1; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 += (q63_t) x2 * c1; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc2 += (q63_t) x3 * c1; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc3 += (q63_t) x0 * c1; 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Read the coefficient */ 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** c2 = *(ptr2 + S->L * 2); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Read the input sample */ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** x1 = *(ptr1++); 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Perform the multiply-accumulate */ 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 += (q63_t) x2 * c2; 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 += (q63_t) x3 * c2; 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc2 += (q63_t) x0 * c2; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc3 += (q63_t) x1 * c2; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Read the coefficient */ 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** c3 = *(ptr2 + S->L * 3); 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Read the input sample */ ARM GAS /tmp/ccJrAs6S.s page 1113 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** x2 = *(ptr1++); 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Perform the multiply-accumulate */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 += (q63_t) x3 * c3; 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 += (q63_t) x0 * c3; 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc2 += (q63_t) x1 * c3; 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc3 += (q63_t) x2 * c3; 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Upsampling is done by stuffing L-1 zeros between each sample. 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * So instead of multiplying zeros with coefficients, 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Increment the coefficient pointer by interpolation factor times. */ 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 += 4 * S->L; 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement loop counter */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt--; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = phaseLen % 0x4U; 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (tapCnt > 0U) 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Read the input sample */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** x3 = *(ptr1++); 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Read the coefficient */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** c0 = *(ptr2); 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Perform the multiply-accumulate */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc0 += (q63_t) x0 * c0; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc1 += (q63_t) x1 * c0; 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc2 += (q63_t) x2 * c0; 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** acc3 += (q63_t) x3 * c0; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Increment the coefficient pointer by interpolation factor times. */ 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 += S->L; 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* update states for next sample processing */ 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** x0 = x1; 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** x1 = x2; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** x2 = x3; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement loop counter */ 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt--; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* The result is in the accumulator, store in the destination buffer. */ 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *(pDst ) = (q31_t) (acc0 >> 31); 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *(pDst + S->L) = (q31_t) (acc1 >> 31); 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *(pDst + 2 * S->L) = (q31_t) (acc2 >> 31); 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *(pDst + 3 * S->L) = (q31_t) (acc3 >> 31); 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pDst++; 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Increment the address modifier index of coefficient buffer */ 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** j++; ARM GAS /tmp/ccJrAs6S.s page 1114 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement loop counter */ 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** i--; 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Advance the state pointer by 1 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * to process the next group of interpolation factor number samples */ 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pState = pState + 4; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pDst += S->L * 3; 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement loop counter */ 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** blkCnt--; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop unrolling: Compute remaining outputs */ 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** blkCnt = blockSize % 0x4U; 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #else 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Initialize blkCnt with number of samples */ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** blkCnt = blockSize; 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (blkCnt > 0U) 26856 .loc 66 543 0 26857 0018 0593 str r3, [sp, #20] 26858 001a 002B cmp r3, #0 26859 001c 50D0 beq .L2065 26860 001e 9646 mov lr, r2 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Copy new input sample into the state buffer */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCur++ = *pSrc++; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Address modifier index of coefficient buffer */ 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** j = 1U; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop over the Interpolation factor. */ 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** i = S->L; 26861 .loc 66 552 0 26862 0020 0278 ldrb r2, [r0] @ zero_extendqisi2 26863 .LVL4333: 26864 0022 0292 str r2, [sp, #8] 26865 0024 A400 lsls r4, r4, #2 26866 .LVL4334: 26867 0026 1544 add r5, r5, r2 26868 0028 1346 mov r3, r2 26869 .LVL4335: 26870 002a 043C subs r4, r4, #4 26871 .LVL4336: 26872 002c 06EB8502 add r2, r6, r5, lsl #2 26873 0030 0392 str r2, [sp, #12] 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (i > 0U) 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Set accumulator to zero */ 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** sum0 = 0; ARM GAS /tmp/ccJrAs6S.s page 1115 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Initialize state pointer */ 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr1 = pState; 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Initialize coefficient pointer */ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 = pCoeffs + (S->L - j); 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop over the polyPhase length. 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** Repeat until we've computed numTaps-(4*S->L) coefficients. */ 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = phaseLen >> 2U; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (tapCnt > 0U) 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Perform the multiply-accumulate */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** sum0 += (q63_t) *ptr1++ * *ptr2; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Upsampling is done by stuffing L-1 zeros between each sample. 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * So instead of multiplying zeros with coefficients, 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Increment the coefficient pointer by interpolation factor times. */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 += S->L; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** sum0 += (q63_t) *ptr1++ * *ptr2; 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 += S->L; 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** sum0 += (q63_t) *ptr1++ * *ptr2; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 += S->L; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** sum0 += (q63_t) *ptr1++ * *ptr2; 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 += S->L; 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement loop counter */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt--; 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop unrolling: Compute remaining outputs */ 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = phaseLen % 0x4U; 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #else 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Initialize tapCnt with number of samples */ 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = phaseLen; 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (tapCnt > 0U) 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Perform the multiply-accumulate */ 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** sum0 += (q63_t) *ptr1++ * *ptr2; 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Upsampling is done by stuffing L-1 zeros between each sample. 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * So instead of multiplying zeros with coefficients, 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * Increment the coefficient pointer by interpolation factor times. */ 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 += S->L; ARM GAS /tmp/ccJrAs6S.s page 1116 26874 .loc 66 613 0 26875 0032 4FEA830C lsl ip, r3, #2 26876 0036 3A19 adds r2, r7, r4 26877 0038 059B ldr r3, [sp, #20] 26878 003a 0092 str r2, [sp] 26879 003c 0193 str r3, [sp, #4] 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 26880 .loc 66 358 0 26881 003e BA46 mov r10, r7 26882 0040 8B46 mov fp, r1 26883 .LVL4337: 26884 .L2062: 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 26885 .loc 66 546 0 26886 0042 009A ldr r2, [sp] 26887 0044 5BF8043B ldr r3, [fp], #4 26888 .LVL4338: 26889 0048 42F8043F str r3, [r2, #4]! 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (i > 0U) 26890 .loc 66 553 0 26891 004c 029B ldr r3, [sp, #8] 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 26892 .loc 66 546 0 26893 004e 0092 str r2, [sp] 26894 .LVL4339: 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (i > 0U) 26895 .loc 66 553 0 26896 0050 DBB1 cbz r3, .L2058 26897 0052 039F ldr r7, [sp, #12] 26898 0054 0EEB0C08 add r8, lr, ip 26899 .LVL4340: 26900 .L2061: 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 26901 .loc 66 562 0 26902 0058 3B46 mov r3, r7 26903 .LVL4341: 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 26904 .loc 66 605 0 26905 005a B9F1000F cmp r9, #0 26906 005e 2DD0 beq .L2066 26907 0060 4A46 mov r2, r9 26908 0062 5446 mov r4, r10 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 26909 .loc 66 556 0 26910 0064 0020 movs r0, #0 26911 0066 0021 movs r1, #0 26912 .LVL4342: 26913 .L2060: 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 26914 .loc 66 608 0 26915 0068 1D68 ldr r5, [r3] 26916 006a 54F8046B ldr r6, [r4], #4 26917 .LVL4343: 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 26918 .loc 66 605 0 26919 006e 013A subs r2, r2, #1 26920 .LVL4344: ARM GAS /tmp/ccJrAs6S.s page 1117 26921 .loc 66 613 0 26922 0070 6344 add r3, r3, ip 26923 .LVL4345: 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 26924 .loc 66 608 0 26925 0072 C5FB0601 smlal r0, r1, r5, r6 26926 .LVL4346: 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 26927 .loc 66 605 0 26928 0076 F7D1 bne .L2060 26929 0078 C30F lsrs r3, r0, #31 26930 .LVL4347: 26931 007a 43EA4103 orr r3, r3, r1, lsl #1 26932 .LVL4348: 26933 .L2059: 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement loop counter */ 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt--; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* The result is in the accumulator, store in the destination buffer. */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pDst++ = (q31_t) (sum0 >> 31); 26934 .loc 66 620 0 26935 007e 4EF8043B str r3, [lr], #4 26936 .LVL4349: 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 26937 .loc 66 553 0 26938 0082 F045 cmp r8, lr 26939 0084 A7F10407 sub r7, r7, #4 26940 0088 E6D1 bne .L2061 26941 .L2058: 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 26942 .loc 66 543 0 26943 008a 019B ldr r3, [sp, #4] 26944 008c 013B subs r3, r3, #1 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Increment the address modifier index of coefficient buffer */ 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** j++; 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement the loop counter */ 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** i--; 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Advance the state pointer by 1 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * to process the next group of interpolation factor number samples */ 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pState = pState + 1; 26945 .loc 66 631 0 26946 008e 0AF1040A add r10, r10, #4 26947 .LVL4350: 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 26948 .loc 66 543 0 26949 0092 0193 str r3, [sp, #4] 26950 0094 D5D1 bne .L2062 26951 0096 DDE90432 ldrd r3, r2, [sp, #16] 26952 .LVL4351: 26953 009a 03EB8202 add r2, r3, r2, lsl #2 26954 .LVL4352: ARM GAS /tmp/ccJrAs6S.s page 1118 26955 .L2057: 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement the loop counter */ 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** blkCnt--; 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Processing is complete. 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** Now copy the last phaseLen - 1 samples to the satrt of the state buffer. 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** This prepares the state buffer for the next function call. */ 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Points to the start of the state buffer */ 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pStateCur = S->pState; 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = (phaseLen - 1U) >> 2U; 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* copy data */ 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (tapCnt > 0U) 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCur++ = *pState++; 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCur++ = *pState++; 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCur++ = *pState++; 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCur++ = *pState++; 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement loop counter */ 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt--; 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop unrolling: Compute remaining outputs */ 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = (phaseLen - 1U) % 0x04U; 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #else 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Initialize tapCnt with number of samples */ 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = (phaseLen - 1U); 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Copy data */ 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (tapCnt > 0U) 26956 .loc 66 672 0 26957 009e B9F10109 subs r9, r9, #1 26958 .LVL4353: 26959 00a2 08D0 beq .L2056 26960 00a4 049B ldr r3, [sp, #16] 26961 00a6 043B subs r3, r3, #4 26962 .LVL4354: 26963 .L2064: 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCur++ = *pState++; 26964 .loc 66 674 0 26965 00a8 52F8041B ldr r1, [r2], #4 26966 .LVL4355: 26967 00ac 43F8041F str r1, [r3, #4]! 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { ARM GAS /tmp/ccJrAs6S.s page 1119 26968 .loc 66 672 0 26969 00b0 B9F10109 subs r9, r9, #1 26970 .LVL4356: 26971 00b4 F8D1 bne .L2064 26972 .LVL4357: 26973 .L2056: 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement loop counter */ 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt--; 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #else 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* alternate version for CM0_FAMILY */ 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t *pState = S->pState; /* State pointer */ 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t *pStateCur; /* Points to the current sample of the state 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q31_t *ptr1; /* Temporary pointer for state buffer */ 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** const q31_t *ptr2; /* Temporary pointer for coefficient buffer 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** q63_t sum0; /* Accumulators */ 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t i, blkCnt, tapCnt; /* Loop counters */ 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* S->pState buffer contains previous frame (phaseLen - 1) samples */ 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* pStateCur points to the location where the new input data should be written */ 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pStateCur = S->pState + (phaseLen - 1U); 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Total number of intput samples */ 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** blkCnt = blockSize; 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop over the blockSize. */ 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (blkCnt > 0U) 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Copy new input sample into the state buffer */ 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCur++ = *pSrc++; 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop over the Interpolation factor. */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** i = S->L; 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (i > 0U) 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Set accumulator to zero */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** sum0 = 0; 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Initialize state pointer */ 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr1 = pState; 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Initialize coefficient pointer */ 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 = pCoeffs + (i - 1U); 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Loop over the polyPhase length */ 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = phaseLen; 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (tapCnt > 0U) 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Perform the multiply-accumulate */ 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** sum0 += ((q63_t) *ptr1++ * *ptr2); ARM GAS /tmp/ccJrAs6S.s page 1120 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Increment the coefficient pointer by interpolation factor times. */ 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ptr2 += S->L; 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement the loop counter */ 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt--; 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* The result is in the accumulator, store in the destination buffer. */ 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pDst++ = (q31_t) (sum0 >> 31); 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement loop counter */ 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** i--; 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Advance the state pointer by 1 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** * to process the next group of interpolation factor number samples */ 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pState = pState + 1; 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement loop counter */ 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** blkCnt--; 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Processing is complete. 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ** Now copy the last phaseLen - 1 samples to the start of the state buffer. 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** ** This prepares the state buffer for the next function call. */ 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Points to the start of the state buffer */ 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** pStateCur = S->pState; 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt = phaseLen - 1U; 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Copy data */ 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** while (tapCnt > 0U) 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** *pStateCur++ = *pState++; 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** /* Decrement loop counter */ 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** tapCnt--; 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** } 26974 .loc 66 769 0 26975 00b6 07B0 add sp, sp, #28 26976 .LCFI185: 26977 .cfi_remember_state 26978 .cfi_def_cfa_offset 36 26979 @ sp needed 26980 00b8 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 26981 .LVL4358: 26982 .L2066: 26983 .LCFI186: 26984 .cfi_restore_state 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c **** { 26985 .loc 66 605 0 ARM GAS /tmp/ccJrAs6S.s page 1121 26986 00bc 4B46 mov r3, r9 26987 .LVL4359: 26988 00be DEE7 b .L2059 26989 .LVL4360: 26990 .L2065: 26991 00c0 3A46 mov r2, r7 26992 .LVL4361: 26993 00c2 ECE7 b .L2057 26994 .cfi_endproc 26995 .LFE211: 26997 .section .text.arm_fir_lattice_f32,"ax",%progbits 26998 .align 1 26999 .p2align 2,,3 27000 .global arm_fir_lattice_f32 27001 .syntax unified 27002 .thumb 27003 .thumb_func 27004 .fpu fpv4-sp-d16 27006 arm_fir_lattice_f32: 27007 .LFB212: 27008 .file 67 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f3 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * Title: arm_fir_lattice_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * Description: Processing function for floating-point FIR Lattice filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters ARM GAS /tmp/ccJrAs6S.s page 1122 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** This set of functions implements Finite Impulse Response (FIR) lattice filters 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** for Q15, Q31 and floating-point data types. Lattice filters are used in a 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** variety of adaptive filter applications. The filter structure is feedforward and 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** the net impulse response is finite length. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** The functions operate on blocks 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** of input and output data and each call to the function processes 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** blockSize samples through the filter. pSrc and 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** pDst point to input and output arrays containing blockSize values. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @par Algorithm 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** \image html FIRLattice.gif "Finite Impulse Response Lattice filter" 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** The following difference equation is implemented: 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @par 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c ****       f0[n] = g0[n] = x[n]
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c ****       fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c ****       gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c ****       y[n] = fM[n]
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** pCoeffs points to tha array of reflection coefficients of size 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** {k1, k2, ..., kM} 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** where M is number of stages 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @par 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** pState points to a state array of size numStages. 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** The state variables (g values) hold previous inputs and are stored in the follow 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c ****     {g0[n], g1[n], g2[n] ...gM-1[n]}
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c ****
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** The state variables are updated after each block of data is processed; the coeff 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @par Instance Structure 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** The coefficients and state variables for a filter are stored together in an inst 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** A separate instance structure must be defined for each filter. 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** Coefficient arrays may be shared among several instances while state variable ar 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** There are separate instance structure declarations for each of the 3 supported d 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @par Initialization Functions 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** There is also an associated initialization function for each data type. 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** The initialization function performs the following operations: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** - Sets the values of the internal structure fields. 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** - Zeros out the values in the state buffer. 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** To do this manually without calling the init function, assign the follow subfiel 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** numStages, pCoeffs, pState. Also set all of the values in pState to zero. 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @par 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** Use of the initialization function is optional. 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** However, if the initialization function is used, then the instance structure can 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** To place an instance structure into a const data section, the instance structure 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** Set the values in the state buffer to zeros and then manually initialize the ins 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 
  92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c ****       arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};
  93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c ****       arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};
ARM GAS  /tmp/ccJrAs6S.s 			page 1123


  94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c ****       arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};
  95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c ****
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @par 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** where numStages is the number of stages in the filter; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** pState is the address of the state buffer; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** pCoeffs is the address of the coefficient buffer. 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @par Fixed-Point Behavior 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** Care must be taken when using the fixed-point versions of the FIR Lattice filter 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** In particular, the overflow and saturation behavior of the accumulator used in e 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** Refer to the function specific documentation below for usage guidelines. 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @addtogroup FIR_Lattice 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @{ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @brief Processing function for the floating-point FIR lattice filter. 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @param[in] S points to an instance of the floating-point FIR lattice structure 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @param[in] pSrc points to the block of input data 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @param[out] pDst points to the block of output data 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @param[in] blockSize number of samples to process 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** @return none 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** void arm_fir_lattice_f32( 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** const arm_fir_lattice_instance_f32 * S, 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** const float32_t * pSrc, 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** float32_t * pDst, 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** uint32_t blockSize) 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** { 27009 .loc 67 126 0 27010 .cfi_startproc 27011 @ args = 0, pretend = 0, frame = 0 27012 @ frame_needed = 0, uses_anonymous_args = 0 27013 .LVL4362: 27014 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} 27015 .LCFI187: 27016 .cfi_def_cfa_offset 24 27017 .cfi_offset 4, -24 27018 .cfi_offset 5, -20 27019 .cfi_offset 6, -16 27020 .cfi_offset 7, -12 27021 .cfi_offset 8, -8 27022 .cfi_offset 14, -4 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** float32_t *pState = S->pState; /* State pointer */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 27023 .loc 67 128 0 27024 0004 D0E9016C ldrd r6, ip, [r0, #4] 27025 .LVL4363: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** float32_t *px; /* Temporary state pointer */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** const float32_t *pk; /* Temporary coefficient pointer */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** uint32_t numStages = S->numStages; /* Number of stages in the filter */ 27026 .loc 67 131 0 27027 0008 0788 ldrh r7, [r0] ARM GAS /tmp/ccJrAs6S.s page 1124 27028 .LVL4364: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** uint32_t blkCnt, stageCnt; /* Loop counters */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** float32_t fcurr0, fnext0, gnext0, gcurr0; /* Temporary variables */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** float32_t fcurr1, fnext1, gnext1; /* Temporary variables for second sample in 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** float32_t fcurr2, fnext2, gnext2; /* Temporary variables for third sample in l 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** float32_t fcurr3, fnext3, gnext3; /* Temporary variables for fourth sample in 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** #endif 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gcurr0 = 0.0f; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** blkCnt = blockSize >> 2U; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** while (blkCnt > 0U) 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** { 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Read two samples from input buffer */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* f0(n) = x(n) */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr0 = *pSrc++; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr1 = *pSrc++; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Initialize state pointer */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** px = pState; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Initialize coeff pointer */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** pk = pCoeffs; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Read g0(n-1) from state buffer */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gcurr0 = *px; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process first sample for first tap */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* f1(n) = f0(n) + K1 * g0(n-1) */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext0 = (gcurr0 * (*pk)) + fcurr0; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext0 = (fcurr0 * (*pk)) + gcurr0; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process second sample for first tap */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext1 = (fcurr0 * (*pk)) + fcurr1; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext1 = (fcurr1 * (*pk)) + fcurr0; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Read next two samples from input buffer */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* f0(n+2) = x(n+2) */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr2 = *pSrc++; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr3 = *pSrc++; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process third sample for first tap */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext2 = (fcurr1 * (*pk)) + fcurr2; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext2 = (fcurr2 * (*pk)) + fcurr1; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process fourth sample for first tap */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext3 = (fcurr2 * (*pk )) + fcurr3; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext3 = (fcurr3 * (*pk++)) + fcurr2; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1125 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Copy only last input sample into the state buffer 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** which will be used for next samples processing */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *px++ = fcurr3; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Update of f values for next coefficient set processing */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr0 = fnext0; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr1 = fnext1; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr2 = fnext2; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr3 = fnext3; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Loop unrolling. Process 4 taps at a time . */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** stageCnt = (numStages - 1U) >> 2U; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Loop over the number of taps. Unroll by a factor of 4. 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** Repeat until we've computed numStages-3 coefficients. */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process 2nd, 3rd, 4th and 5th taps ... here */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** while (stageCnt > 0U) 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** { 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Read g1(n-1), g3(n-1) .... from state */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gcurr0 = *px; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* save g1(n) in state buffer */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *px++ = gnext3; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process first sample for 2nd, 6th .. tap */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Sample processing for K2, K6.... */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* f2(n) = f1(n) + K2 * g1(n-1) */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext0 = (gcurr0 * (*pk)) + fcurr0; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process second sample for 2nd, 6th .. tap */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* for sample 2 processing */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext1 = (gnext0 * (*pk)) + fcurr1; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process third sample for 2nd, 6th .. tap */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext2 = (gnext1 * (*pk)) + fcurr2; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process fourth sample for 2nd, 6th .. tap */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext3 = (gnext2 * (*pk)) + fcurr3; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* g2(n) = f1(n) * K2 + g1(n-1) */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Calculation of state values for next stage */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext3 = (fcurr3 * (*pk)) + gnext2; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext2 = (fcurr2 * (*pk)) + gnext1; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext1 = (fcurr1 * (*pk)) + gnext0; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext0 = (fcurr0 * (*pk++)) + gcurr0; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Read g2(n-1), g4(n-1) .... from state */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gcurr0 = *px; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* save g2(n) in state buffer */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *px++ = gnext3; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1126 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Sample processing for K3, K7.... */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process first sample for 3rd, 7th .. tap */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* f3(n) = f2(n) + K3 * g2(n-1) */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr0 = (gcurr0 * (*pk)) + fnext0; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process second sample for 3rd, 7th .. tap */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr1 = (gnext0 * (*pk)) + fnext1; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process third sample for 3rd, 7th .. tap */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr2 = (gnext1 * (*pk)) + fnext2; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process fourth sample for 3rd, 7th .. tap */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr3 = (gnext2 * (*pk)) + fnext3; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Calculation of state values for next stage */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* g3(n) = f2(n) * K3 + g2(n-1) */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext3 = (fnext3 * (*pk)) + gnext2; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext2 = (fnext2 * (*pk)) + gnext1; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext1 = (fnext1 * (*pk)) + gnext0; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext0 = (fnext0 * (*pk++)) + gcurr0; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Read g1(n-1), g3(n-1) .... from state */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gcurr0 = *px; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* save g3(n) in state buffer */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *px++ = gnext3; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Sample processing for K4, K8.... */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process first sample for 4th, 8th .. tap */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* f4(n) = f3(n) + K4 * g3(n-1) */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext0 = (gcurr0 * (*pk)) + fcurr0; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process second sample for 4th, 8th .. tap */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* for sample 2 processing */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext1 = (gnext0 * (*pk)) + fcurr1; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process third sample for 4th, 8th .. tap */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext2 = (gnext1 * (*pk)) + fcurr2; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process fourth sample for 4th, 8th .. tap */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext3 = (gnext2 * (*pk)) + fcurr3; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* g4(n) = f3(n) * K4 + g3(n-1) */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Calculation of state values for next stage */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext3 = (fcurr3 * (*pk)) + gnext2; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext2 = (fcurr2 * (*pk)) + gnext1; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext1 = (fcurr1 * (*pk)) + gnext0; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext0 = (fcurr0 * (*pk++)) + gcurr0; 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1127 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Read g2(n-1), g4(n-1) .... from state */ 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gcurr0 = *px; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* save g4(n) in state buffer */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *px++ = gnext3; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Sample processing for K5, K9.... */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process first sample for 5th, 9th .. tap */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* f5(n) = f4(n) + K5 * g4(n-1) */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr0 = (gcurr0 * (*pk)) + fnext0; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process second sample for 5th, 9th .. tap */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr1 = (gnext0 * (*pk)) + fnext1; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process third sample for 5th, 9th .. tap */ 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr2 = (gnext1 * (*pk)) + fnext2; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process fourth sample for 5th, 9th .. tap */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr3 = (gnext2 * (*pk)) + fnext3; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Calculation of state values for next stage */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* g5(n) = f4(n) * K5 + g4(n-1) */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext3 = (fnext3 * (*pk)) + gnext2; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext2 = (fnext2 * (*pk)) + gnext1; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext1 = (fnext1 * (*pk)) + gnext0; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext0 = (fnext0 * (*pk++)) + gcurr0; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** stageCnt--; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** } 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** stageCnt = (numStages - 1U) % 0x4U; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** while (stageCnt > 0U) 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** { 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gcurr0 = *px; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* save g value in state buffer */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *px++ = gnext3; 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Process four samples for last three taps here */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext0 = (gcurr0 * (*pk)) + fcurr0; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext1 = (gnext0 * (*pk)) + fcurr1; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext2 = (gnext1 * (*pk)) + fcurr2; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext3 = (gnext2 * (*pk)) + fcurr3; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext3 = (fcurr3 * (*pk)) + gnext2; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext2 = (fcurr2 * (*pk)) + gnext1; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1128 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext1 = (fcurr1 * (*pk)) + gnext0; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext0 = (fcurr0 * (*pk++)) + gcurr0; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Update of f values for next coefficient set processing */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr0 = fnext0; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr1 = fnext1; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr2 = fnext2; 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr3 = fnext3; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** stageCnt--; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** } 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* The results in the 4 accumulators, store in the destination buffer. */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* y(n) = fN(n) */ 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *pDst++ = fcurr0; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *pDst++ = fcurr1; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *pDst++ = fcurr2; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *pDst++ = fcurr3; 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** blkCnt--; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** } 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Loop unrolling: Compute remaining outputs */ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** blkCnt = blockSize % 0x4U; 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** #else 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Initialize blkCnt with number of samples */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** blkCnt = blockSize; 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** while (blkCnt > 0U) 27029 .loc 67 392 0 27030 000a 63B3 cbz r3, .L2078 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** { 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* f0(n) = x(n) */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr0 = *pSrc++; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Initialize state pointer */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** px = pState; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Initialize coeff pointer */ 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** pk = pCoeffs; 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* read g2(n) from state buffer */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gcurr0 = *px; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* for sample 1 processing */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* f1(n) = f0(n) + K1 * g0(n-1) */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext0 = (gcurr0 * (*pk)) + fcurr0; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext0 = (fcurr0 * (*pk++)) + gcurr0; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* save g1(n) in state buffer */ ARM GAS /tmp/ccJrAs6S.s page 1129 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *px++ = fcurr0; 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* f1(n) is saved in fcurr0 for next stage processing */ 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr0 = fnext0; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** stageCnt = (numStages - 1U); 27031 .loc 67 419 0 27032 000c 013F subs r7, r7, #1 27033 .LVL4365: 27034 000e 0CF10408 add r8, ip, #4 27035 0012 06F1040E add lr, r6, #4 27036 .LVL4366: 27037 .L2082: 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 27038 .loc 67 395 0 27039 0016 B1EC017A vldmia.32 r1!, {s14} 27040 .LVL4367: 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 27041 .loc 67 404 0 27042 001a D6ED006A vldr.32 s13, [r6] 27043 .LVL4368: 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 27044 .loc 67 408 0 27045 001e 9CED006A vldr.32 s12, [ip] 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 27046 .loc 67 414 0 27047 0022 86ED007A vstr.32 s14, [r6] 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 27048 .loc 67 408 0 27049 0026 F0EE477A vmov.f32 s15, s14 27050 002a E6EE267A vfma.f32 s15, s12, s13 27051 .LVL4369: 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 27052 .loc 67 411 0 27053 002e E6EE076A vfma.f32 s13, s12, s14 27054 .LVL4370: 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* stage loop */ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** while (stageCnt > 0U) 27055 .loc 67 422 0 27056 0032 D7B1 cbz r7, .L2083 27057 0034 3C46 mov r4, r7 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 27058 .loc 67 411 0 27059 0036 4546 mov r5, r8 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 27060 .loc 67 414 0 27061 0038 7046 mov r0, lr 27062 .LVL4371: 27063 .L2081: 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** { 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* read g2(n) from state buffer */ 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gcurr0 = *px; 27064 .loc 67 425 0 27065 003a 90ED007A vldr.32 s14, [r0] 27066 .LVL4372: 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1130 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* save g1(n) in state buffer */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *px++ = gnext0; 27067 .loc 67 428 0 27068 003e E0EC016A vstmia.32 r0!, {s13} 27069 .LVL4373: 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* Sample processing for K2, K3.... */ 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* f2(n) = f1(n) + K2 * g1(n-1) */ 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fnext0 = (gcurr0 * (*pk)) + fcurr0; 27070 .loc 67 432 0 27071 0042 F5EC016A vldmia.32 r5!, {s13} 27072 .LVL4374: 27073 0046 B0EE676A vmov.f32 s12, s15 27074 004a A6EE876A vfma.f32 s12, s13, s14 27075 .LVL4375: 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** { 27076 .loc 67 422 0 27077 004e 013C subs r4, r4, #1 27078 .LVL4376: 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* g2(n) = f1(n) * K2 + g1(n-1) */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** gnext0 = (fcurr0 * (*pk++)) + gcurr0; 27079 .loc 67 435 0 27080 0050 A6EEA77A vfma.f32 s14, s13, s15 27081 .LVL4377: 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 27082 .loc 67 432 0 27083 0054 F0EE467A vmov.f32 s15, s12 27084 .LVL4378: 27085 .loc 67 435 0 27086 0058 F0EE476A vmov.f32 s13, s14 27087 .LVL4379: 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** { 27088 .loc 67 422 0 27089 005c EDD1 bne .L2081 27090 .LVL4380: 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** { 27091 .loc 67 392 0 27092 005e 013B subs r3, r3, #1 27093 .LVL4381: 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* f1(n) is saved in fcurr0 for next stage processing */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** fcurr0 = fnext0; 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** stageCnt--; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** } 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** /* y(n) = fN(n) */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** *pDst++ = fcurr0; 27094 .loc 67 444 0 27095 0060 A2EC016A vstmia.32 r2!, {s12} 27096 .LVL4382: 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** { 27097 .loc 67 392 0 27098 0064 D7D1 bne .L2082 27099 .LVL4383: 27100 .L2078: ARM GAS /tmp/ccJrAs6S.s page 1131 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** blkCnt--; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** } 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** } 27101 .loc 67 449 0 27102 0066 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 27103 .LVL4384: 27104 .L2083: 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 27105 .loc 67 417 0 27106 006a B0EE676A vmov.f32 s12, s15 27107 .LVL4385: 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** { 27108 .loc 67 392 0 27109 006e 013B subs r3, r3, #1 27110 .LVL4386: 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** 27111 .loc 67 444 0 27112 0070 A2EC016A vstmia.32 r2!, {s12} 27113 .LVL4387: 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c **** { 27114 .loc 67 392 0 27115 0074 CFD1 bne .L2082 27116 .LVL4388: 27117 0076 F6E7 b .L2078 27118 .cfi_endproc 27119 .LFE212: 27121 .section .text.arm_fir_lattice_init_f32,"ax",%progbits 27122 .align 1 27123 .p2align 2,,3 27124 .global arm_fir_lattice_init_f32 27125 .syntax unified 27126 .thumb 27127 .thumb_func 27128 .fpu fpv4-sp-d16 27130 arm_fir_lattice_init_f32: 27131 .LFB213: 27132 .file 68 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_in 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * Title: arm_fir_lattice_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * Description: Floating-point FIR Lattice filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * You may obtain a copy of the License at ARM GAS /tmp/ccJrAs6S.s page 1132 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** @addtogroup FIR_Lattice 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** @brief Initialization function for the floating-point FIR lattice filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** @param[in] S points to an instance of the floating-point FIR lattice structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** @param[in] numStages number of filter stages 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** @param[in] pState points to the state buffer. The array is of length numStages 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** void arm_fir_lattice_init_f32( 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** arm_fir_lattice_instance_f32 * S, 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** uint16_t numStages, 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** const float32_t * pCoeffs, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** float32_t * pState) 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** { 27133 .loc 68 54 0 27134 .cfi_startproc 27135 @ args = 0, pretend = 0, frame = 0 27136 @ frame_needed = 0, uses_anonymous_args = 0 27137 .LVL4389: 27138 0000 10B5 push {r4, lr} 27139 .LCFI188: 27140 .cfi_def_cfa_offset 8 27141 .cfi_offset 4, -8 27142 .cfi_offset 14, -4 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** /* Assign filter taps */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** S->numStages = numStages; 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** /* Assign coefficient pointer */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** S->pCoeffs = pCoeffs; 27143 .loc 68 59 0 27144 0002 8260 str r2, [r0, #8] 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** 27145 .loc 68 56 0 27146 0004 0180 strh r1, [r0] @ movhi 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** /* Assign filter taps */ ARM GAS /tmp/ccJrAs6S.s page 1133 27147 .loc 68 54 0 27148 0006 0446 mov r4, r0 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** /* Clear state buffer and size is always numStages */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** memset(pState, 0, (numStages) * sizeof(float32_t)); 27149 .loc 68 62 0 27150 0008 8A00 lsls r2, r1, #2 27151 .LVL4390: 27152 000a 1846 mov r0, r3 27153 .LVL4391: 27154 000c 0021 movs r1, #0 27155 .LVL4392: 27156 000e FFF7FEFF bl memset 27157 .LVL4393: 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** /* Assign state pointer */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** S->pState = pState; 27158 .loc 68 65 0 27159 0012 6060 str r0, [r4, #4] 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c **** } 27160 .loc 68 66 0 27161 0014 10BD pop {r4, pc} 27162 .cfi_endproc 27163 .LFE213: 27165 0016 00BF .section .text.arm_fir_lattice_init_q15,"ax",%progbits 27166 .align 1 27167 .p2align 2,,3 27168 .global arm_fir_lattice_init_q15 27169 .syntax unified 27170 .thumb 27171 .thumb_func 27172 .fpu fpv4-sp-d16 27174 arm_fir_lattice_init_q15: 27175 .LFB214: 27176 .file 69 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_in 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * Title: arm_fir_lattice_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * Description: Q15 FIR Lattice filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * Unless required by applicable law or agreed to in writing, software ARM GAS /tmp/ccJrAs6S.s page 1134 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** @addtogroup FIR_Lattice 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** @brief Initialization function for the Q15 FIR lattice filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** @param[in] S points to an instance of the Q15 FIR lattice structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** @param[in] numStages number of filter stages 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** @param[in] pState points to the state buffer. The array is of length numStages 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** void arm_fir_lattice_init_q15( 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** arm_fir_lattice_instance_q15 * S, 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** uint16_t numStages, 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** const q15_t * pCoeffs, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** q15_t * pState) 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** { 27177 .loc 69 54 0 27178 .cfi_startproc 27179 @ args = 0, pretend = 0, frame = 0 27180 @ frame_needed = 0, uses_anonymous_args = 0 27181 .LVL4394: 27182 0000 10B5 push {r4, lr} 27183 .LCFI189: 27184 .cfi_def_cfa_offset 8 27185 .cfi_offset 4, -8 27186 .cfi_offset 14, -4 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** /* Assign filter taps */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** S->numStages = numStages; 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** /* Assign coefficient pointer */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** S->pCoeffs = pCoeffs; 27187 .loc 69 59 0 27188 0002 8260 str r2, [r0, #8] 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** 27189 .loc 69 56 0 27190 0004 0180 strh r1, [r0] @ movhi 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** /* Assign filter taps */ 27191 .loc 69 54 0 27192 0006 0446 mov r4, r0 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** /* Clear state buffer and size is always numStages */ ARM GAS /tmp/ccJrAs6S.s page 1135 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** memset(pState, 0, (numStages) * sizeof(q15_t)); 27193 .loc 69 62 0 27194 0008 4A00 lsls r2, r1, #1 27195 .LVL4395: 27196 000a 1846 mov r0, r3 27197 .LVL4396: 27198 000c 0021 movs r1, #0 27199 .LVL4397: 27200 000e FFF7FEFF bl memset 27201 .LVL4398: 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** /* Assign state pointer */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** S->pState = pState; 27202 .loc 69 65 0 27203 0012 6060 str r0, [r4, #4] 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c **** } 27204 .loc 69 66 0 27205 0014 10BD pop {r4, pc} 27206 .cfi_endproc 27207 .LFE214: 27209 0016 00BF .section .text.arm_fir_lattice_init_q31,"ax",%progbits 27210 .align 1 27211 .p2align 2,,3 27212 .global arm_fir_lattice_init_q31 27213 .syntax unified 27214 .thumb 27215 .thumb_func 27216 .fpu fpv4-sp-d16 27218 arm_fir_lattice_init_q31: 27219 .LFB215: 27220 .file 70 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_in 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * Title: arm_fir_lattice_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * Description: Q31 FIR lattice filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** * limitations under the License. ARM GAS /tmp/ccJrAs6S.s page 1136 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** @addtogroup FIR_Lattice 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** @brief Initialization function for the Q31 FIR lattice filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** @param[in] S points to an instance of the Q31 FIR lattice structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** @param[in] numStages number of filter stages 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** @param[in] pState points to the state buffer. The array is of length numStages 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** void arm_fir_lattice_init_q31( 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** arm_fir_lattice_instance_q31 * S, 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** uint16_t numStages, 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** const q31_t * pCoeffs, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** q31_t * pState) 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** { 27221 .loc 70 54 0 27222 .cfi_startproc 27223 @ args = 0, pretend = 0, frame = 0 27224 @ frame_needed = 0, uses_anonymous_args = 0 27225 .LVL4399: 27226 0000 10B5 push {r4, lr} 27227 .LCFI190: 27228 .cfi_def_cfa_offset 8 27229 .cfi_offset 4, -8 27230 .cfi_offset 14, -4 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** /* Assign filter taps */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** S->numStages = numStages; 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** /* Assign coefficient pointer */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** S->pCoeffs = pCoeffs; 27231 .loc 70 59 0 27232 0002 8260 str r2, [r0, #8] 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** 27233 .loc 70 56 0 27234 0004 0180 strh r1, [r0] @ movhi 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** /* Assign filter taps */ 27235 .loc 70 54 0 27236 0006 0446 mov r4, r0 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** /* Clear state buffer and size is always numStages */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** memset(pState, 0, (numStages) * sizeof(q31_t)); 27237 .loc 70 62 0 27238 0008 8A00 lsls r2, r1, #2 27239 .LVL4400: ARM GAS /tmp/ccJrAs6S.s page 1137 27240 000a 1846 mov r0, r3 27241 .LVL4401: 27242 000c 0021 movs r1, #0 27243 .LVL4402: 27244 000e FFF7FEFF bl memset 27245 .LVL4403: 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** /* Assign state pointer */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** S->pState = pState; 27246 .loc 70 65 0 27247 0012 6060 str r0, [r4, #4] 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c **** } 27248 .loc 70 66 0 27249 0014 10BD pop {r4, pc} 27250 .cfi_endproc 27251 .LFE215: 27253 0016 00BF .section .text.arm_fir_lattice_q15,"ax",%progbits 27254 .align 1 27255 .p2align 2,,3 27256 .global arm_fir_lattice_q15 27257 .syntax unified 27258 .thumb 27259 .thumb_func 27260 .fpu fpv4-sp-d16 27262 arm_fir_lattice_q15: 27263 .LFB216: 27264 .file 71 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q1 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * Title: arm_fir_lattice_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * Description: Q15 FIR lattice filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1138 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** @addtogroup FIR_Lattice 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** @brief Processing function for Q15 FIR lattice filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** @param[in] S points to an instance of the Q15 FIR lattice structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** void arm_fir_lattice_q15( 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** const arm_fir_lattice_instance_q15 * S, 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** const q15_t * pSrc, 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** q15_t * pDst, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** uint32_t blockSize) 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 27265 .loc 71 54 0 27266 .cfi_startproc 27267 @ args = 0, pretend = 0, frame = 8 27268 @ frame_needed = 0, uses_anonymous_args = 0 27269 .LVL4404: 27270 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 27271 .LCFI191: 27272 .cfi_def_cfa_offset 36 27273 .cfi_offset 4, -36 27274 .cfi_offset 5, -32 27275 .cfi_offset 6, -28 27276 .cfi_offset 7, -24 27277 .cfi_offset 8, -20 27278 .cfi_offset 9, -16 27279 .cfi_offset 10, -12 27280 .cfi_offset 11, -8 27281 .cfi_offset 14, -4 27282 0004 9146 mov r9, r2 27283 0006 83B0 sub sp, sp, #12 27284 .LCFI192: 27285 .cfi_def_cfa_offset 48 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** q15_t *pState = S->pState; /* State pointer */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 27286 .loc 71 56 0 27287 0008 D0E9018A ldrd r8, r10, [r0, #4] 27288 .LVL4405: 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** q15_t *px; /* Temporary state pointer */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** const q15_t *pk; /* Temporary coefficient pointer */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** uint32_t numStages = S->numStages; /* Number of stages in the filter */ 27289 .loc 71 59 0 27290 000c 0288 ldrh r2, [r0] 27291 .LVL4406: 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** uint32_t blkCnt, stageCnt; /* Loop counters */ ARM GAS /tmp/ccJrAs6S.s page 1139 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** q31_t fcurr0, fnext0, gnext0, gcurr0; /* Temporary variables */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** #if (1) 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** //#if !defined(ARM_MATH_CM0_FAMILY) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** q31_t fcurr1, fnext1, gnext1; /* Temporary variables for second sample in loop u 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** q31_t fcurr2, fnext2, gnext2; /* Temporary variables for third sample in loop un 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** q31_t fcurr3, fnext3, gnext3; /* Temporary variables for fourth sample in loop u 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** #endif 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gcurr0 = 0; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** blkCnt = blockSize >> 2U; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** while (blkCnt > 0U) 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Read two samples from input buffer */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f0(n) = x(n) */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = *pSrc++; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr1 = *pSrc++; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Initialize state pointer */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** px = pState; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Initialize coeff pointer */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** pk = pCoeffs; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Read g0(n-1) from state buffer */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gcurr0 = *px; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process first sample for first tap */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f1(n) = f0(n) + K1 * g0(n-1) */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext0, 16); 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + gcurr0; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process second sample for first tap */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext1 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + fcurr1; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext1 = __SSAT(fnext1, 16); 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr0; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext1 = __SSAT(gnext1, 16); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Read next two samples from input buffer */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f0(n+2) = x(n+2) */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr2 = *pSrc++; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr3 = *pSrc++; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process third sample for first tap */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext2 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr2; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext2 = __SSAT(fnext2, 16); ARM GAS /tmp/ccJrAs6S.s page 1140 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + fcurr1; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext2 = __SSAT(gnext2, 16); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process fourth sample for first tap */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext3 = (q31_t) ((fcurr2 * (*pk )) >> 15U) + fcurr3; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext3 = __SSAT(fnext3, 16); 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext3 = (q31_t) ((fcurr3 * (*pk++)) >> 15U) + fcurr2; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext3 = __SSAT(gnext3, 16); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Copy only last input sample into the state buffer 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** which will be used for next samples processing */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** *px++ = (q15_t) fcurr3; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Update of f values for next coefficient set processing */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = fnext0; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr1 = fnext1; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr2 = fnext2; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr3 = fnext3; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Loop unrolling. Process 4 taps at a time . */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** stageCnt = (numStages - 1U) >> 2U; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Loop over the number of taps. Unroll by a factor of 4. 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** Repeat until we've computed numStages-3 coefficients. */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process 2nd, 3rd, 4th and 5th taps ... here */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** while (stageCnt > 0U) 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Read g1(n-1), g3(n-1) .... from state */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gcurr0 = *px; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* save g1(n) in state buffer */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** *px++ = (q15_t) gnext3; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process first sample for 2nd, 6th .. tap */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Sample processing for K2, K6.... */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f1(n) = f0(n) + K1 * g0(n-1) */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext0, 16); 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process second sample for 2nd, 6th .. tap */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* for sample 2 processing */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext1 = __SSAT(fnext1, 16); 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process third sample for 2nd, 6th .. tap */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext2 = __SSAT(fnext2, 16); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process fourth sample for 2nd, 6th .. tap */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext3 = __SSAT(fnext3, 16); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Calculation of state values for next stage */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext3 = __SSAT(gnext3, 16); ARM GAS /tmp/ccJrAs6S.s page 1141 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext2 = __SSAT(gnext2, 16); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext1 = __SSAT(gnext1, 16); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Read g2(n-1), g4(n-1) .... from state */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gcurr0 = *px; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* save g1(n) in state buffer */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** *px++ = (q15_t) gnext3; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Sample processing for K3, K7.... */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process first sample for 3rd, 7th .. tap */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f3(n) = f2(n) + K3 * g2(n-1) */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = __SSAT(fcurr0, 16); 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process second sample for 3rd, 7th .. tap */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr1 = __SSAT(fcurr1, 16); 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process third sample for 3rd, 7th .. tap */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr2 = __SSAT(fcurr2, 16); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process fourth sample for 3rd, 7th .. tap */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr3 = __SSAT(fcurr3, 16); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Calculation of state values for next stage */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* g3(n) = f2(n) * K3 + g2(n-1) */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext3 = __SSAT(gnext3, 16); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext2 = __SSAT(gnext2, 16); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext1 = __SSAT(gnext1, 16); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Read g1(n-1), g3(n-1) .... from state */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gcurr0 = *px; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* save g1(n) in state buffer */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** *px++ = (q15_t) gnext3; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Sample processing for K4, K8.... */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process first sample for 4th, 8th .. tap */ ARM GAS /tmp/ccJrAs6S.s page 1142 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f4(n) = f3(n) + K4 * g3(n-1) */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext0, 16); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process second sample for 4th, 8th .. tap */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* for sample 2 processing */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext1 = __SSAT(fnext1, 16); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process third sample for 4th, 8th .. tap */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext2 = __SSAT(fnext2, 16); 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process fourth sample for 4th, 8th .. tap */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext3 = __SSAT(fnext3, 16); 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* g4(n) = f3(n) * K4 + g3(n-1) */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Calculation of state values for next stage */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext3 = __SSAT(gnext3, 16); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext2 = __SSAT(gnext2, 16); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext1 = __SSAT(gnext1, 16); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Read g2(n-1), g4(n-1) .... from state */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gcurr0 = *px; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* save g4(n) in state buffer */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** *px++ = (q15_t) gnext3; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Sample processing for K5, K9.... */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process first sample for 5th, 9th .. tap */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f5(n) = f4(n) + K5 * g4(n-1) */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = __SSAT(fcurr0, 16); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process second sample for 5th, 9th .. tap */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr1 = __SSAT(fcurr1, 16); 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process third sample for 5th, 9th .. tap */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr2 = __SSAT(fcurr2, 16); 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process fourth sample for 5th, 9th .. tap */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr3 = __SSAT(fcurr3, 16); 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Calculation of state values for next stage */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* g5(n) = f4(n) * K5 + g4(n-1) */ ARM GAS /tmp/ccJrAs6S.s page 1143 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext3 = __SSAT(gnext3, 16); 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext2 = __SSAT(gnext2, 16); 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext1 = __SSAT(gnext1, 16); 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** stageCnt--; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** } 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */ 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** stageCnt = (numStages - 1U) % 0x4U; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** while (stageCnt > 0U) 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gcurr0 = *px; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* save g value in state buffer */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** *px++ = (q15_t) gnext3; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Process four samples for last three taps here */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext0, 16); 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext1 = __SSAT(fnext1, 16); 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext2 = __SSAT(fnext2, 16); 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext3 = __SSAT(fnext3, 16); 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext3 = __SSAT(gnext3, 16); 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext2 = __SSAT(gnext2, 16); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext1 = __SSAT(gnext1, 16); 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0; 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Update of f values for next coefficient set processing */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = fnext0; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr1 = fnext1; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr2 = fnext2; 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr3 = fnext3; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1144 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** stageCnt--; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** } 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* The results in the 4 accumulators, store in the destination buffer. */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* y(n) = fN(n) */ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** write_q15x2_ia (&pDst, __PKHBT(fcurr0, fcurr1, 16)); 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** write_q15x2_ia (&pDst, __PKHBT(fcurr2, fcurr3, 16)); 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** #else 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** write_q15x2_ia (&pDst, __PKHBT(fcurr1, fcurr0, 16)); 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** write_q15x2_ia (&pDst, __PKHBT(fcurr3, fcurr2, 16)); 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** blkCnt--; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** } 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Loop unrolling: Compute remaining outputs */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** blkCnt = blockSize % 0x4U; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** #else 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Initialize blkCnt with number of samples */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** blkCnt = blockSize; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** while (blkCnt > 0U) 27292 .loc 71 373 0 27293 000e CBB3 cbz r3, .L2096 27294 0010 08F10200 add r0, r8, #2 27295 .LVL4407: 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f0(n) = x(n) */ 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = *pSrc++; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Initialize state pointer */ 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** px = pState; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Initialize coeff pointer */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** pk = pCoeffs; 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* read g2(n) from state buffer */ 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gcurr0 = *px; 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* for sample 1 processing */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f1(n) = f0(n) + K1 * g0(n-1) */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0; 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext0, 16); 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* save g1(n) in state buffer */ 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** *px++ = (q15_t) fcurr0; 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1145 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f1(n) is saved in fcurr0 for next stage processing */ 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = fnext0; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** stageCnt = (numStages - 1U); 27296 .loc 71 402 0 27297 0014 013A subs r2, r2, #1 27298 .LVL4408: 27299 0016 0AF1020B add fp, r10, #2 27300 001a 0190 str r0, [sp, #4] 27301 .LVL4409: 27302 .L2100: 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 27303 .loc 71 376 0 27304 001c 31F9025B ldrsh r5, [r1], #2 27305 .LVL4410: 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext0, 16); 27306 .loc 71 389 0 27307 0020 BAF90000 ldrsh r0, [r10] 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 27308 .loc 71 385 0 27309 0024 B8F90040 ldrsh r4, [r8] 27310 .LVL4411: 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 27311 .loc 71 397 0 27312 0028 A8F80050 strh r5, [r8] @ movhi 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 27313 .loc 71 393 0 27314 002c 00FB05F6 mul r6, r0, r5 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext0, 16); 27315 .loc 71 389 0 27316 0030 00FB04F0 mul r0, r0, r4 27317 .LVL4412: 27318 0034 05EBE035 add r5, r5, r0, asr #15 27319 .LVL4413: 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 27320 .loc 71 393 0 27321 0038 04EBE634 add r4, r4, r6, asr #15 27322 .LVL4414: 27323 .LBB2298: 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 27324 .loc 71 390 0 27325 .syntax unified 27326 @ 390 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c" 27327 003c 05F30F05 ssat r5, #16, r5 27328 @ 0 "" 2 27329 .LVL4415: 27330 .thumb 27331 .syntax unified 27332 .LBE2298: 27333 .LBB2299: 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 27334 .loc 71 394 0 27335 .syntax unified 27336 @ 394 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c" 27337 0040 04F30F04 ssat r4, #16, r4 27338 @ 0 "" 2 27339 .LVL4416: ARM GAS /tmp/ccJrAs6S.s page 1146 27340 .thumb 27341 .syntax unified 27342 .LBE2299: 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* stage loop */ 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** while (stageCnt > 0U) 27343 .loc 71 405 0 27344 0044 0AB3 cbz r2, .L2101 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 27345 .loc 71 397 0 27346 0046 019F ldr r7, [sp, #4] 27347 .loc 71 405 0 27348 0048 9446 mov ip, r2 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 27349 .loc 71 393 0 27350 004a DE46 mov lr, fp 27351 .LVL4417: 27352 .L2099: 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* read g2(n) from state buffer */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gcurr0 = *px; 27353 .loc 71 408 0 27354 004c B7F90000 ldrsh r0, [r7] 27355 .LVL4418: 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* save g1(n) in state buffer */ 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** *px++ = (q15_t) gnext0; 27356 .loc 71 411 0 27357 0050 27F8024B strh r4, [r7], #2 @ movhi 27358 .LVL4419: 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Sample processing for K2, K3.... */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f2(n) = f1(n) + K2 * g1(n-1) */ 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0; 27359 .loc 71 415 0 27360 0054 3EF9024B ldrsh r4, [lr], #2 27361 .LVL4420: 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 27362 .loc 71 405 0 27363 0058 BCF1010C subs ip, ip, #1 27364 .LVL4421: 27365 .loc 71 415 0 27366 005c 04FB00F6 mul r6, r4, r0 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext0, 16); 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* g2(n) = f1(n) * K2 + g1(n-1) */ 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0; 27367 .loc 71 419 0 27368 0060 05FB04F4 mul r4, r5, r4 27369 .LVL4422: 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext0, 16); 27370 .loc 71 415 0 27371 0064 05EBE636 add r6, r5, r6, asr #15 27372 .loc 71 419 0 27373 0068 00EBE430 add r0, r0, r4, asr #15 27374 .LVL4423: 27375 .LBB2300: ARM GAS /tmp/ccJrAs6S.s page 1147 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext0, 16); 27376 .loc 71 416 0 27377 .syntax unified 27378 @ 416 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c" 27379 006c 06F30F06 ssat r6, #16, r6 27380 @ 0 "" 2 27381 .LVL4424: 27382 .thumb 27383 .syntax unified 27384 .LBE2300: 27385 .LBB2301: 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 27386 .loc 71 420 0 27387 .syntax unified 27388 @ 420 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c" 27389 0070 00F30F04 ssat r4, #16, r0 27390 @ 0 "" 2 27391 .LVL4425: 27392 .thumb 27393 .syntax unified 27394 .LBE2301: 27395 .LBB2302: 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext0, 16); 27396 .loc 71 416 0 27397 0074 3546 mov r5, r6 27398 .LBE2302: 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 27399 .loc 71 405 0 27400 0076 E9D1 bne .L2099 27401 .LVL4426: 27402 .LBB2303: 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f1(n) is saved in fcurr0 for next stage processing */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = fnext0; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** stageCnt--; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** } 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* y(n) = fN(n) */ 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** *pDst++ = __SSAT(fcurr0, 16); 27403 .loc 71 429 0 27404 .syntax unified 27405 @ 429 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c" 27406 0078 06F30F06 ssat r6, #16, r6 27407 @ 0 "" 2 27408 .LVL4427: 27409 .thumb 27410 .syntax unified 27411 .LBE2303: 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 27412 .loc 71 373 0 27413 007c 013B subs r3, r3, #1 27414 .LVL4428: 27415 .loc 71 429 0 27416 007e 29F8026B strh r6, [r9], #2 @ movhi 27417 .LVL4429: 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 1148 27418 .loc 71 373 0 27419 0082 CBD1 bne .L2100 27420 .LVL4430: 27421 .L2096: 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** blkCnt--; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** } 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** #else 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* alternate version for CM0_FAMILY */ 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** blkCnt = blockSize; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** while (blkCnt > 0U) 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f0(n) = x(n) */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = *pSrc++; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Initialize state pointer */ 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** px = pState; 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Initialize coeff pointer */ 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** pk = pCoeffs; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* read g0(n-1) from state buffer */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gcurr0 = *px; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* for sample 1 processing */ 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f1(n) = f0(n) + K1 * g0(n-1) */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext, 16); 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* save f0(n) in state buffer */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** *px++ = (q15_t) fcurr0; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f1(n) is saved in fcurr for next stage processing */ 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = fnext0; 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** stageCnt = (numStages - 1U); 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* stage loop */ 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** while (stageCnt > 0U) 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* read g1(n-1) from state buffer */ 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gcurr0 = *px; 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* save g0(n-1) in state buffer */ 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** *px++ = (q15_t) gnext0; 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* Sample processing for K2, K3.... */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f2(n) = f1(n) + K2 * g1(n-1) */ 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0; 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fnext0 = __SSAT(fnext0, 16); ARM GAS /tmp/ccJrAs6S.s page 1149 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* g2(n) = f1(n) * K2 + g1(n-1) */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** gnext0 = __SSAT(gnext0, 16); 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* f1(n) is saved in fcurr0 for next stage processing */ 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** fcurr0 = fnext0; 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** stageCnt--; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** } 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** /* y(n) = fN(n) */ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** *pDst++ = __SSAT(fcurr0, 16); 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** blkCnt--; 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** } 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** } 27422 .loc 71 502 0 27423 0084 03B0 add sp, sp, #12 27424 .LCFI193: 27425 .cfi_remember_state 27426 .cfi_def_cfa_offset 36 27427 @ sp needed 27428 0086 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 27429 .LVL4431: 27430 .L2101: 27431 .LCFI194: 27432 .cfi_restore_state 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 27433 .loc 71 373 0 27434 008a 013B subs r3, r3, #1 27435 .LVL4432: 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 27436 .loc 71 400 0 27437 008c 2E46 mov r6, r5 27438 .LVL4433: 27439 .LBB2304: 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** 27440 .loc 71 429 0 27441 .syntax unified 27442 @ 429 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c" 27443 008e 06F30F06 ssat r6, #16, r6 27444 @ 0 "" 2 27445 .LVL4434: 27446 .thumb 27447 .syntax unified 27448 .LBE2304: 27449 0092 29F8026B strh r6, [r9], #2 @ movhi 27450 .LVL4435: 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c **** { 27451 .loc 71 373 0 27452 0096 C1D1 bne .L2100 27453 0098 F4E7 b .L2096 27454 .cfi_endproc ARM GAS /tmp/ccJrAs6S.s page 1150 27455 .LFE216: 27457 009a 00BF .section .text.arm_fir_lattice_q31,"ax",%progbits 27458 .align 1 27459 .p2align 2,,3 27460 .global arm_fir_lattice_q31 27461 .syntax unified 27462 .thumb 27463 .thumb_func 27464 .fpu fpv4-sp-d16 27466 arm_fir_lattice_q31: 27467 .LFB217: 27468 .file 72 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q3 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * Title: arm_fir_lattice_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * Description: Q31 FIR lattice filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** @addtogroup FIR_Lattice 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** @brief Processing function for the Q31 FIR lattice filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** @param[in] S points to an instance of the Q31 FIR lattice structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** @param[in] blockSize number of samples to process ARM GAS /tmp/ccJrAs6S.s page 1151 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** In order to avoid overflows the input signal must be scaled down by 2*log2(numSt 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** */ 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** void arm_fir_lattice_q31( 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** const arm_fir_lattice_instance_q31 * S, 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** const q31_t * pSrc, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** q31_t * pDst, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** uint32_t blockSize) 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 27469 .loc 72 57 0 27470 .cfi_startproc 27471 @ args = 0, pretend = 0, frame = 16 27472 @ frame_needed = 0, uses_anonymous_args = 0 27473 .LVL4436: 27474 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 27475 .LCFI195: 27476 .cfi_def_cfa_offset 36 27477 .cfi_offset 4, -36 27478 .cfi_offset 5, -32 27479 .cfi_offset 6, -28 27480 .cfi_offset 7, -24 27481 .cfi_offset 8, -20 27482 .cfi_offset 9, -16 27483 .cfi_offset 10, -12 27484 .cfi_offset 11, -8 27485 .cfi_offset 14, -4 27486 0004 8C46 mov ip, r1 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** q31_t *pState = S->pState; /* State pointer */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 27487 .loc 72 59 0 27488 0006 D0E90151 ldrd r5, r1, [r0, #4] 27489 .LVL4437: 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** q31_t *pState = S->pState; /* State pointer */ 27490 .loc 72 57 0 27491 000a 85B0 sub sp, sp, #20 27492 .LCFI196: 27493 .cfi_def_cfa_offset 56 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** q31_t *px; /* Temporary state pointer */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** const q31_t *pk; /* Temporary coefficient pointer */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** uint32_t numStages = S->numStages; /* Number of stages in the filter */ 27494 .loc 72 62 0 27495 000c B0F800E0 ldrh lr, [r0] 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** q31_t *px; /* Temporary state pointer */ 27496 .loc 72 59 0 27497 0010 0191 str r1, [sp, #4] 27498 .LVL4438: 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** uint32_t blkCnt, stageCnt; /* Loop counters */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** q31_t fcurr0, fnext0, gnext0, gcurr0; /* Temporary variables */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** #if (1) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** //#if !defined(ARM_MATH_CM0_FAMILY) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** q31_t fcurr1, fnext1, gnext1; /* Temporary variables for second sample in ARM GAS /tmp/ccJrAs6S.s page 1152 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** q31_t fcurr2, fnext2, gnext2; /* Temporary variables for third sample in l 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** q31_t fcurr3, fnext3, gnext3; /* Temporary variables for fourth sample in 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** #endif 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gcurr0 = 0; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** blkCnt = blockSize >> 2U; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** while (blkCnt > 0U) 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Read two samples from input buffer */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f0(n) = x(n) */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = *pSrc++; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr1 = *pSrc++; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Initialize state pointer */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** px = pState; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Initialize coeff pointer */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** pk = pCoeffs; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Read g0(n-1) from state buffer */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gcurr0 = *px; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process first sample for first tap */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f1(n) = f0(n) + K1 * g0(n-1) */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext0 << 1U) + fcurr0; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U); 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (gnext0 << 1U) + gcurr0; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process second sample for first tap */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext1 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext1 = (fnext1 << 1U) + fcurr1; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U); 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext1 = (gnext1 << 1U) + fcurr0; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Read next two samples from input buffer */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f0(n+2) = x(n+2) */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr2 = *pSrc++; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr3 = *pSrc++; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process third sample for first tap */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext2 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext2 = (fnext2 << 1U) + fcurr2; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext2 = (gnext2 << 1U) + fcurr1; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process fourth sample for first tap */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext3 = (q31_t) (((q63_t) fcurr2 * (*pk )) >> 32U); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext3 = (fnext3 << 1U) + fcurr3; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk++)) >> 32U); ARM GAS /tmp/ccJrAs6S.s page 1153 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext3 = (gnext3 << 1U) + fcurr2; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Copy only last input sample into the state buffer 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** which will be used for next samples processing */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *px++ = fcurr3; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Update of f values for next coefficient set processing */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = fnext0; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr1 = fnext1; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr2 = fnext2; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr3 = fnext3; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Loop unrolling. Process 4 taps at a time . */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** stageCnt = (numStages - 1U) >> 2U; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Loop over the number of taps. Unroll by a factor of 4. 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** Repeat until we've computed numStages-3 coefficients. */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process 2nd, 3rd, 4th and 5th taps ... here */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** while (stageCnt > 0U) 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Read g1(n-1), g3(n-1) .... from state */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gcurr0 = *px; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* save g1(n) in state buffer */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *px++ = gnext3; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process first sample for 2nd, 6th .. tap */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Sample processing for K2, K6.... */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f1(n) = f0(n) + K1 * g0(n-1) */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext0 << 1U) + fcurr0; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process second sample for 2nd, 6th .. tap */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* for sample 2 processing */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U); 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext1 = (fnext1 << 1U) + fcurr1; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process third sample for 2nd, 6th .. tap */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U); 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext2 = (fnext2 << 1U) + fcurr2; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process fourth sample for 2nd, 6th .. tap */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext3 = (fnext3 << 1U) + fcurr3; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Calculation of state values for next stage */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext3 = (gnext3 << 1U) + gnext2; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext2 = (gnext2 << 1U) + gnext1; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext1 = (gnext1 << 1U) + gnext0; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1154 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (gnext0 << 1U) + gcurr0; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Read g2(n-1), g4(n-1) .... from state */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gcurr0 = *px; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* save g1(n) in state buffer */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *px++ = gnext3; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Sample processing for K3, K7.... */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process first sample for 3rd, 7th .. tap */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f3(n) = f2(n) + K3 * g2(n-1) */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = (fcurr0 << 1U) + fnext0; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process second sample for 3rd, 7th .. tap */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr1 = (fcurr1 << 1U) + fnext1; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process third sample for 3rd, 7th .. tap */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr2 = (fcurr2 << 1U) + fnext2; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process fourth sample for 3rd, 7th .. tap */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr3 = (fcurr3 << 1U) + fnext3; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Calculation of state values for next stage */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* g3(n) = f2(n) * K3 + g2(n-1) */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext3 = (gnext3 << 1U) + gnext2; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext2 = (gnext2 << 1U) + gnext1; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext1 = (gnext1 << 1U) + gnext0; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (gnext0 << 1U) + gcurr0; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Read g1(n-1), g3(n-1) .... from state */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gcurr0 = *px; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* save g1(n) in state buffer */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *px++ = gnext3; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Sample processing for K4, K8.... */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process first sample for 4th, 8th .. tap */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f4(n) = f3(n) + K4 * g3(n-1) */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext0 << 1U) + fcurr0; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process second sample for 4th, 8th .. tap */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* for sample 2 processing */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U); ARM GAS /tmp/ccJrAs6S.s page 1155 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext1 = (fnext1 << 1U) + fcurr1; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process third sample for 4th, 8th .. tap */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext2 = (fnext2 << 1U) + fcurr2; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process fourth sample for 4th, 8th .. tap */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext3 = (fnext3 << 1U) + fcurr3; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* g4(n) = f3(n) * K4 + g3(n-1) */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Calculation of state values for next stage */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U); 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext3 = (gnext3 << 1U) + gnext2; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext2 = (gnext2 << 1U) + gnext1; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U); 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext1 = (gnext1 << 1U) + gnext0; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (gnext0 << 1U) + gcurr0; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Read g2(n-1), g4(n-1) .... from state */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gcurr0 = *px; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* save g4(n) in state buffer */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *px++ = gnext3; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Sample processing for K5, K9.... */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process first sample for 5th, 9th .. tap */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f5(n) = f4(n) + K5 * g4(n-1) */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = (fcurr0 << 1U) + fnext0; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process second sample for 5th, 9th .. tap */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U); 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr1 = (fcurr1 << 1U) + fnext1; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process third sample for 5th, 9th .. tap */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr2 = (fcurr2 << 1U) + fnext2; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process fourth sample for 5th, 9th .. tap */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr3 = (fcurr3 << 1U) + fnext3; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Calculation of state values for next stage */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* g5(n) = f4(n) * K5 + g4(n-1) */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U); 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext3 = (gnext3 << 1U) + gnext2; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U); 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext2 = (gnext2 << 1U) + gnext1; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U); ARM GAS /tmp/ccJrAs6S.s page 1156 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext1 = (gnext1 << 1U) + gnext0; 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U); 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (gnext0 << 1U) + gcurr0; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** stageCnt--; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** } 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** stageCnt = (numStages - 1U) % 0x4U; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** while (stageCnt > 0U) 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gcurr0 = *px; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* save g value in state buffer */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *px++ = gnext3; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Process four samples for last three taps here */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext0 << 1U) + fcurr0; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U); 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext1 = (fnext1 << 1U) + fcurr1; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U); 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext2 = (fnext2 << 1U) + fcurr2; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U); 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext3 = (fnext3 << 1U) + fcurr3; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U); 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext3 = (gnext3 << 1U) + gnext2; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U); 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext2 = (gnext2 << 1U) + gnext1; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U); 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext1 = (gnext1 << 1U) + gnext0; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (gnext0 << 1U) + gcurr0; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Update of f values for next coefficient set processing */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = fnext0; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr1 = fnext1; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr2 = fnext2; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr3 = fnext3; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** stageCnt--; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** } 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* The results in the 4 accumulators, store in the destination buffer. */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* y(n) = fN(n) */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *pDst++ = fcurr0; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *pDst++ = fcurr1; ARM GAS /tmp/ccJrAs6S.s page 1157 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *pDst++ = fcurr2; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *pDst++ = fcurr3; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** blkCnt--; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** } 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Loop unrolling: Compute remaining outputs */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** blkCnt = blockSize % 0x4U; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** #else 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Initialize blkCnt with number of samples */ 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** blkCnt = blockSize; 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** while (blkCnt > 0U) 27499 .loc 72 372 0 27500 0012 8BB3 cbz r3, .L2108 27501 0014 0431 adds r1, r1, #4 27502 .LVL4439: 27503 0016 0291 str r1, [sp, #8] 27504 0018 291D adds r1, r5, #4 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f0(n) = x(n) */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = *pSrc++; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Initialize state pointer */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** px = pState; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Initialize coeff pointer */ 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** pk = pCoeffs; 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* read g2(n) from state buffer */ 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gcurr0 = *px; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* for sample 1 processing */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f1(n) = f0(n) + K1 * g0(n-1) */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext0 << 1U) + fcurr0; 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (gnext0 << 1U) + gcurr0; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* save g1(n) in state buffer */ 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *px++ = fcurr0; 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f1(n) is saved in fcurr0 for next stage processing */ 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = fnext0; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** stageCnt = (numStages - 1U); 27505 .loc 72 401 0 27506 001a 0EF1FF3E add lr, lr, #-1 27507 .LVL4440: 27508 001e 0391 str r1, [sp, #12] 27509 .LVL4441: ARM GAS /tmp/ccJrAs6S.s page 1158 27510 .L2112: 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext0 << 1U) + fcurr0; 27511 .loc 72 388 0 27512 0020 0199 ldr r1, [sp, #4] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 27513 .loc 72 375 0 27514 0022 5CF8044B ldr r4, [ip], #4 27515 .LVL4442: 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 27516 .loc 72 384 0 27517 0026 D5F80080 ldr r8, [r5] 27518 .LVL4443: 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext0 << 1U) + fcurr0; 27519 .loc 72 388 0 27520 002a 0868 ldr r0, [r1] 27521 .LVL4444: 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 27522 .loc 72 396 0 27523 002c 2C60 str r4, [r5] 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext0 << 1U) + fcurr0; 27524 .loc 72 388 0 27525 002e 88FB0067 smull r6, r7, r8, r0 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (gnext0 << 1U) + gcurr0; 27526 .loc 72 392 0 27527 0032 80FB0401 smull r0, r1, r0, r4 27528 .LVL4445: 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 27529 .loc 72 393 0 27530 0036 08EB4100 add r0, r8, r1, lsl #1 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 27531 .loc 72 389 0 27532 003a 04EB4704 add r4, r4, r7, lsl #1 27533 .LVL4446: 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* stage loop */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** while (stageCnt > 0U) 27534 .loc 72 404 0 27535 003e BEF1000F cmp lr, #0 27536 0042 1CD0 beq .L2113 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 27537 .loc 72 396 0 27538 0044 DDE902B8 ldrd fp, r8, [sp, #8] 27539 .LVL4447: 27540 .loc 72 404 0 27541 0048 F146 mov r9, lr 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 27542 .loc 72 396 0 27543 004a 5F46 mov r7, fp 27544 .LVL4448: 27545 .L2111: 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* read g2(n) from state buffer */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gcurr0 = *px; 27546 .loc 72 407 0 27547 004c D8F80060 ldr r6, [r8] 27548 .LVL4449: 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1159 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* save g1(n) in state buffer */ 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *px++ = gnext0; 27549 .loc 72 410 0 27550 0050 48F8040B str r0, [r8], #4 27551 .LVL4450: 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Sample processing for K2, K3.... */ 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f2(n) = f1(n) + K2 * g1(n-1) */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); 27552 .loc 72 414 0 27553 0054 57F8040B ldr r0, [r7], #4 27554 .LVL4451: 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext0 << 1U) + fcurr0; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* g2(n) = f1(n) * K2 + g1(n-1) */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); 27555 .loc 72 418 0 27556 0058 80FB04AB smull r10, fp, r0, r4 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext0 << 1U) + fcurr0; 27557 .loc 72 414 0 27558 005c 86FB0001 smull r0, r1, r6, r0 27559 .LVL4452: 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext0 << 1U) + fcurr0; 27560 .loc 72 415 0 27561 0060 04EB4101 add r1, r4, r1, lsl #1 27562 .LVL4453: 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 27563 .loc 72 404 0 27564 0064 B9F10109 subs r9, r9, #1 27565 .LVL4454: 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (gnext0 << 1U) + gcurr0; 27566 .loc 72 419 0 27567 0068 06EB4B00 add r0, r6, fp, lsl #1 27568 .LVL4455: 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 27569 .loc 72 415 0 27570 006c 0C46 mov r4, r1 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 27571 .loc 72 404 0 27572 006e EDD1 bne .L2111 27573 .LVL4456: 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 27574 .loc 72 372 0 27575 0070 013B subs r3, r3, #1 27576 .LVL4457: 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f1(n) is saved in fcurr0 for next stage processing */ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = fnext0; 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** stageCnt--; 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** } 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* y(n) = fN(n) */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *pDst++ = fcurr0; 27577 .loc 72 428 0 27578 0072 42F8041B str r1, [r2], #4 27579 .LVL4458: ARM GAS /tmp/ccJrAs6S.s page 1160 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 27580 .loc 72 372 0 27581 0076 D3D1 bne .L2112 27582 .LVL4459: 27583 .L2108: 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** blkCnt--; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** } 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** #else 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* alternate version for CM0_FAMILY */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** blkCnt = blockSize; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** while (blkCnt > 0U) 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f0(n) = x(n) */ 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = *pSrc++; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Initialize state pointer */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** px = pState; 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Initialize coeff pointer */ 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** pk = pCoeffs; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* read g0(n-1) from state buffer */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gcurr0 = *px; 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* for sample 1 processing */ 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f1(n) = f0(n) + K1 * g0(n-1) */ 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext << 1U) + fcurr0; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* g1(n) = f0(n) * K1 + g0(n-1) */ 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (gnext0 << 1U) + gcurr0; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* save f0(n) in state buffer */ 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *px++ = fcurr0; 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f1(n) is saved in fcurr for next stage processing */ 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = fnext0; 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** stageCnt = (numStages - 1U); 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* stage loop */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** while (stageCnt > 0U) 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* read g1(n-1) from state buffer */ 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gcurr0 = *px; 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* save g0(n-1) in state buffer */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *px++ = gnext0; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* Sample processing for K2, K3.... */ 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f2(n) = f1(n) + K2 * g1(n-1) */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); ARM GAS /tmp/ccJrAs6S.s page 1161 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fnext0 = (fnext0 << 1U) + fcurr0; 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* g2(n) = f1(n) * K2 + g1(n-1) */ 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** gnext0 = (gnext0 << 1U) + gcurr0; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* f1(n) is saved in fcurr0 for next stage processing */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** fcurr0 = fnext0; 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** stageCnt--; 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** } 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** /* y(n) = fN(n) */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** *pDst++ = fcurr0; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** blkCnt--; 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** } 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** #endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** } 27584 .loc 72 501 0 27585 0078 05B0 add sp, sp, #20 27586 .LCFI197: 27587 .cfi_remember_state 27588 .cfi_def_cfa_offset 36 27589 @ sp needed 27590 007a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 27591 .LVL4460: 27592 .L2113: 27593 .LCFI198: 27594 .cfi_restore_state 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 27595 .loc 72 399 0 27596 007e 2146 mov r1, r4 27597 .LVL4461: 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 27598 .loc 72 372 0 27599 0080 013B subs r3, r3, #1 27600 .LVL4462: 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** 27601 .loc 72 428 0 27602 0082 42F8041B str r1, [r2], #4 27603 .LVL4463: 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c **** { 27604 .loc 72 372 0 27605 0086 CBD1 bne .L2112 27606 .LVL4464: 27607 0088 F6E7 b .L2108 27608 .cfi_endproc 27609 .LFE217: 27611 008a 00BF .section .text.arm_fir_q15,"ax",%progbits 27612 .align 1 27613 .p2align 2,,3 27614 .global arm_fir_q15 27615 .syntax unified 27616 .thumb ARM GAS /tmp/ccJrAs6S.s page 1162 27617 .thumb_func 27618 .fpu fpv4-sp-d16 27620 arm_fir_q15: 27621 .LFB218: 27622 .file 73 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Title: arm_fir_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Description: Q15 FIR filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** @addtogroup FIR 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** @brief Processing function for the Q15 FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** @param[in] S points to an instance of the Q15 FIR filter structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** The function is implemented using a 64-bit internal accumulator. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** Both coefficients and state variables are represented in 1.15 format and multipl 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 f 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** There is no risk of internal overflow with this approach and the full precision ARM GAS /tmp/ccJrAs6S.s page 1163 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** After all additions have been performed, the accumulator is truncated to 34.15 f 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** Lastly, the accumulator is saturated to yield a result in 1.15 format. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** @remark 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** Refer to \ref arm_fir_fast_q15() for a faster but less precise implementation of 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #if defined(ARM_MATH_MVEI) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #define MVE_ASRL_SAT16(acc, shift) ((sqrshrl_sat48(acc, -(32-shift)) >> 32) & 0xffffffff) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** static void arm_fir_q15_1_8_mve(const arm_fir_instance_q15 * S, const q15_t * pSrc, q15_t * pDst, u 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *pState = S->pState; /* State pointer */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *pStateCur; /* Points to the current sample of the state */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pSamples; /* Temporary pointer to the sample buffer */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *pOutput; /* Temporary pointer to the output buffer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pTempSrc; /* Temporary pointer to the source data */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *pTempDest; /* Temporary pointer to the destination buffer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t blkCnt; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15x8_t vecIn0; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * load 8 coefs 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15x8_t vecCoeffs = *(q15x8_t *) pCoeffs; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * pState points to state array which contains previous frame (numTaps - 1) samples 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * pStateCur points to the location where the new input data should be written 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCur = &(pState[(numTaps - 1u)]); 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc = pSrc; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pSamples = pState; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pOutput = pDst; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q63_t acc0, acc1, acc2, acc3; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt = blockSize >> 2; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (blkCnt > 0U) 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pSamplesTmp = pSamples; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Save 4 input samples in the history buffer 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vst1q(pStateCur, vld1q(pTempSrc)); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCur += 8; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc += 8; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(pSamplesTmp); 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = vmlaldavq(vecIn0, vecCoeffs); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = vmlaldavq(vecIn0, vecCoeffs); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1164 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(&pSamplesTmp[2]); 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc2 = vmlaldavq(vecIn0, vecCoeffs); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(&pSamplesTmp[3]); 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc3 = vmlaldavq(vecIn0, vecCoeffs); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc1, 15); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc2, 15); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc3, 15); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pSamples += 4; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Decrement the sample block loop counter 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt--; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t residual = blockSize & 3; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** switch (residual) 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** case 3: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pSamplesTmp = pSamples; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = 0LL; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = 0LL; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc2 = 0LL; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Save 4 input samples in the history buffer 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *(q15x8_t *) pStateCur = *(q15x8_t *) pTempSrc; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCur += 8; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc += 8; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(pSamplesTmp); 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = vmlaldavq(vecIn0, vecCoeffs); 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = vmlaldavq(vecIn0, vecCoeffs); 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(&pSamplesTmp[2]); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc2 = vmlaldavq(vecIn0, vecCoeffs); 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc1, 15); 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc2, 15); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** break; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** case 2: 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pSamplesTmp = pSamples; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = 0LL; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = 0LL; ARM GAS /tmp/ccJrAs6S.s page 1165 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Save 4 input samples in the history buffer 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vst1q(pStateCur, vld1q(pTempSrc)); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCur += 8; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc += 8; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(pSamplesTmp); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = vmlaldavq(vecIn0, vecCoeffs); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = vmlaldavq(vecIn0, vecCoeffs); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc1, 15); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** break; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** case 1: 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pSamplesTmp = pSamples; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = 0LL; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Save 4 input samples in the history buffer 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vst1q(pStateCur, vld1q(pTempSrc)); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCur += 8; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc += 8; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(pSamplesTmp); 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = vmlaldavq(vecIn0, vecCoeffs); 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pSamplesTmp += 4; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** break; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Copy the samples back into the history buffer start 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc = &S->pState[blockSize]; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempDest = S->pState; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt = numTaps >> 3; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (blkCnt > 0U) 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vst1q(pTempDest, vld1q(pTempSrc)); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc += 8; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempDest += 8; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt--; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt = numTaps & 7; ARM GAS /tmp/ccJrAs6S.s page 1166 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** if (blkCnt > 0U) 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vstrhq_p_s16(pTempDest, vld1q(pTempSrc), p0); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** void arm_fir_q15( 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const arm_fir_instance_q15 * S, 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t * pSrc, 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t * pDst, 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t blockSize) 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *pState = S->pState; /* State pointer */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *pStateCur; /* Points to the current sample of the state */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pSamples; /* Temporary pointer to the sample buffer */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *pOutput; /* Temporary pointer to the output buffer */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pTempSrc; /* Temporary pointer to the source data */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *pTempDest; /* Temporary pointer to the destination buffer */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t blkCnt; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15x8_t vecIn0; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t tapsBlkCnt = (numTaps + 7) / 8; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q63_t acc0, acc1, acc2, acc3; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** if (blockSize >= 12) 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** if(numTaps <= 8) { 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* [1 to 8 taps] specialized routine */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** arm_fir_q15_1_8_mve(S,pSrc, pDst, blockSize); 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** return; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** if (blockSize >= 12) 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * pState points to state array which contains previous frame (numTaps - 1) samples 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * pStateCur points to the location where the new input data should be written 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCur = &(pState[(numTaps - 1u)]); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc = pSrc; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pSamples = pState; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pOutput = pDst; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt = blockSize >> 2; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (blkCnt > 0U) 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pCoeffsTmp = pCoeffs; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pSamplesTmp = pSamples; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = 0LL; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = 0LL; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc2 = 0LL; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc3 = 0LL; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1167 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Save 8 input samples in the history buffer 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vst1q(pStateCur, vld1q(pTempSrc)); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCur += 8; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc += 8; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t i = tapsBlkCnt; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (i > 0U) 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * load 8 coefs 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15x8_t vecCoeffs = *(q15x8_t *) pCoeffsTmp; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(pSamplesTmp); 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = vmlaldavaq(acc0, vecIn0, vecCoeffs); 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = vmlaldavaq(acc1, vecIn0, vecCoeffs); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(&pSamplesTmp[2]); 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc2 = vmlaldavaq(acc2, vecIn0, vecCoeffs); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(&pSamplesTmp[3]); 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc3 = vmlaldavaq(acc3, vecIn0, vecCoeffs); 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pSamplesTmp += 8; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pCoeffsTmp += 8; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Decrement the taps block loop counter 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** i--; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc1, 15); 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc2, 15); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc3, 15); 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pSamples += 4; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Decrement the sample block loop counter 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt--; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t residual = blockSize & 3; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** switch (residual) 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** case 3: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pCoeffsTmp = pCoeffs; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pSamplesTmp = pSamples; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = 0LL; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = 0LL; ARM GAS /tmp/ccJrAs6S.s page 1168 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc2 = 0LL; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Save 8 input samples in the history buffer 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *(q15x8_t *) pStateCur = *(q15x8_t *) pTempSrc; 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCur += 8; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc += 8; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t i = tapsBlkCnt; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (i > 0U) 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * load 8 coefs 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15x8_t vecCoeffs = *(q15x8_t *) pCoeffsTmp; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(pSamplesTmp); 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = vmlaldavaq(acc0, vecIn0, vecCoeffs); 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = vmlaldavaq(acc1, vecIn0, vecCoeffs); 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(&pSamplesTmp[2]); 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc2 = vmlaldavaq(acc2, vecIn0, vecCoeffs); 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pSamplesTmp += 8; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pCoeffsTmp += 8; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Decrement the taps block loop counter 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** i--; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc1, 15); 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc2, 15); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** break; 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** case 2: 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pCoeffsTmp = pCoeffs; 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pSamplesTmp = pSamples; 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = 0LL; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = 0LL; 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Save 8 input samples in the history buffer 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vst1q(pStateCur, vld1q(pTempSrc)); 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCur += 8; 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc += 8; 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t i = tapsBlkCnt; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (i > 0U) ARM GAS /tmp/ccJrAs6S.s page 1169 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * load 8 coefs 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15x8_t vecCoeffs = *(q15x8_t *) pCoeffsTmp; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(pSamplesTmp); 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = vmlaldavaq(acc0, vecIn0, vecCoeffs); 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = vmlaldavaq(acc1, vecIn0, vecCoeffs); 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pSamplesTmp += 8; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pCoeffsTmp += 8; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Decrement the taps block loop counter 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** i--; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc1, 15); 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** break; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** case 1: 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pCoeffsTmp = pCoeffs; 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pSamplesTmp = pSamples; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = 0LL; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Save 8 input samples in the history buffer 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vst1q(pStateCur, vld1q(pTempSrc)); 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCur += 8; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc += 8; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t i = tapsBlkCnt; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (i > 0U) 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * load 8 coefs 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15x8_t vecCoeffs = *(q15x8_t *) pCoeffsTmp; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vecIn0 = vld1q(pSamplesTmp); 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = vmlaldavaq(acc0, vecIn0, vecCoeffs); 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pSamplesTmp += 8; 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pCoeffsTmp += 8; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Decrement the taps block loop counter 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** i--; 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } ARM GAS /tmp/ccJrAs6S.s page 1170 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** break; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** else 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *px; /* Temporary pointer for state buffer */ 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pb; /* Temporary pointer for coefficient buf 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q63_t acc0; /* Accumulator */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t blkCnt,tapCnt; /* Loop counters */ 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt = blockSize; 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (blkCnt > 0U) 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Copy two samples into state buffer */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pStateCurnt++ = *pSrc++; 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Set the accumulator to zero */ 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = 0; 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Use SIMD to hold states and coefficients */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** px = pState; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pb = pCoeffs; 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** tapCnt = numTaps >> 1U; 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (tapCnt > 0U) 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 += (q15_t) *px++ * *pb++; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 += (q15_t) *px++ * *pb++; 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** tapCnt--; 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* The result is in 2.30 format. Convert to 1.15 with saturation. 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** Then store the output in the destination buffer. */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Advance state pointer by 1 for the next sample */ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pState = pState + 1U; 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Decrement loop counter */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt--; 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * Copy the samples back into the history buffer start 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc = &S->pState[blockSize]; 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempDest = S->pState; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt = numTaps >> 3; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (blkCnt > 0U) ARM GAS /tmp/ccJrAs6S.s page 1171 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vst1q(pTempDest, vld1q(pTempSrc)); 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempSrc += 8; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pTempDest += 8; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt--; 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt = numTaps & 7; 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** if (blkCnt > 0U) 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** vstrhq_p_s16(pTempDest, vld1q(pTempSrc), p0); 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #else 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** void arm_fir_q15( 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const arm_fir_instance_q15 * S, 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t * pSrc, 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t * pDst, 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t blockSize) 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 27623 .loc 73 529 0 27624 .cfi_startproc 27625 @ args = 0, pretend = 0, frame = 24 27626 @ frame_needed = 0, uses_anonymous_args = 0 27627 .LVL4465: 27628 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 27629 .LCFI199: 27630 .cfi_def_cfa_offset 36 27631 .cfi_offset 4, -36 27632 .cfi_offset 5, -32 27633 .cfi_offset 6, -28 27634 .cfi_offset 7, -24 27635 .cfi_offset 8, -20 27636 .cfi_offset 9, -16 27637 .cfi_offset 10, -12 27638 .cfi_offset 11, -8 27639 .cfi_offset 14, -4 27640 0004 87B0 sub sp, sp, #28 27641 .LCFI200: 27642 .cfi_def_cfa_offset 64 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *pState = S->pState; /* State pointer */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *px; /* Temporary pointer for state buffer */ 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pb; /* Temporary pointer for coefficient buffer 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q63_t acc0; /* Accumulators */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 27643 .loc 73 536 0 27644 0006 0488 ldrh r4, [r0] 27645 0008 0394 str r4, [sp, #12] 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state 27646 .loc 73 531 0 27647 000a D0E90185 ldrd r8, r5, [r0, #4] 27648 .LVL4466: 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1172 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q63_t acc1, acc2, acc3; /* Accumulators */ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** q31_t x0, x1, x2, c0; /* Temporary variables to hold state and coe 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #endif 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* pStateCurnt points to the location where the new input data should be written */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Loop unrolling: Compute 4 output values simultaneously. 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * The variables acc0 ... acc3 hold output values that are being computed: 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n- 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n- 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n- 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n- 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** */ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt = blockSize >> 2U; 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (blkCnt > 0U) 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Copy 4 new input samples into the state buffer. */ 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pStateCurnt++ = *pSrc++; 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pStateCurnt++ = *pSrc++; 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pStateCurnt++ = *pSrc++; 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pStateCurnt++ = *pSrc++; 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Set all accumulators to zero */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = 0; 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = 0; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc2 = 0; 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc3 = 0; 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** px = pState; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pb = pCoeffs; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */ 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x0 = read_q15x2_ia (&px); 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x2 = read_q15x2_ia (&px); 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Loop over the number of taps. Unroll by a factor of 4. 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** Repeat until we've computed numTaps-(numTaps%4) coefficients. */ 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** tapCnt = numTaps >> 2U; 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (tapCnt > 0U) 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */ 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** c0 = read_q15x2_ia ((q15_t **) &pb); 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */ ARM GAS /tmp/ccJrAs6S.s page 1173 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = __SMLALD(x0, c0, acc0); 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* acc2 += b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */ 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc2 = __SMLALD(x2, c0, acc2); 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* pack x[n-N-1] and x[n-N-2] */ 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x1 = __PKHBT(x2, x0, 0); 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #else 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x1 = __PKHBT(x0, x2, 0); 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #endif 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Read state x[n-N-4], x[n-N-5] */ 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x0 = read_q15x2_ia (&px); 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */ 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = __SMLALDX(x1, c0, acc1); 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* pack x[n-N-3] and x[n-N-4] */ 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x1 = __PKHBT(x0, x2, 0); 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #else 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x1 = __PKHBT(x2, x0, 0); 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #endif 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* acc3 += b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */ 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc3 = __SMLALDX(x1, c0, acc3); 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Read coefficients b[N-2], b[N-3] */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** c0 = read_q15x2_ia ((q15_t **) &pb); 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */ 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = __SMLALD(x2, c0, acc0); 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Read state x[n-N-6], x[n-N-7] with offset */ 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x2 = read_q15x2_ia (&px); 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */ 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc2 = __SMLALD(x0, c0, acc2); 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* acc1 += b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */ 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = __SMLALDX(x1, c0, acc1); 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* pack x[n-N-5] and x[n-N-6] */ 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x1 = __PKHBT(x2, x0, 0); 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #else 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x1 = __PKHBT(x0, x2, 0); 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #endif 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */ 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc3 = __SMLALDX(x1, c0, acc3); 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Decrement tap count */ 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** tapCnt--; 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1174 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* If the filter length is not a multiple of 4, compute the remaining filter taps. 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** This is always be 2 taps since the filter length is even. */ 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** if ((numTaps & 0x3U) != 0U) 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Read last two coefficients */ 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** c0 = read_q15x2_ia ((q15_t **) &pb); 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Perform the multiply-accumulates */ 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = __SMLALD(x0, c0, acc0); 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc2 = __SMLALD(x2, c0, acc2); 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* pack state variables */ 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x1 = __PKHBT(x2, x0, 0); 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #else 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x1 = __PKHBT(x0, x2, 0); 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #endif 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Read last state variables */ 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x0 = read_q15x2 (px); 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Perform the multiply-accumulates */ 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc1 = __SMLALDX(x1, c0, acc1); 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* pack state variables */ 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x1 = __PKHBT(x0, x2, 0); 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #else 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** x1 = __PKHBT(x2, x0, 0); 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #endif 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Perform the multiply-accumulates */ 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc3 = __SMLALDX(x1, c0, acc3); 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation. 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** Then store the 4 outputs in the destination buffer. */ 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #else 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Advance the state pointer by 4 to process the next group of 4 samples */ 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pState = pState + 4U; 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Decrement loop counter */ 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt--; 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Loop unrolling: Compute remaining output samples */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt = blockSize % 0x4U; 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #else 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1175 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Initialize blkCnt with number of taps */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt = blockSize; 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (blkCnt > 0U) 27649 .loc 73 715 0 27650 000e 0493 str r3, [sp, #16] 27651 0010 002B cmp r3, #0 27652 0012 00F09980 beq .L2133 27653 0016 04F10040 add r0, r4, #-2147483648 27654 .LVL4467: 27655 001a 0138 subs r0, r0, #1 27656 .LVL4468: 27657 001c 4000 lsls r0, r0, #1 27658 .LVL4469: 27659 001e 0238 subs r0, r0, #2 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Copy two samples into state buffer */ 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pStateCurnt++ = *pSrc++; 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Set the accumulator to zero */ 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 = 0; 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Use SIMD to hold states and coefficients */ 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** px = pState; 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pb = pCoeffs; 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** tapCnt = numTaps >> 1U; 27660 .loc 73 727 0 27661 0020 4FEA540A lsr r10, r4, #1 27662 0024 08EB000E add lr, r8, r0 27663 0028 08F1040C add ip, r8, #4 27664 002c CDF81480 str r8, [sp, #20] 27665 0030 4FEA8A0B lsl fp, r10, #2 27666 0034 9946 mov r9, r3 27667 0036 A846 mov r8, r5 27668 .LVL4470: 27669 .L2124: 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 27670 .loc 73 718 0 27671 0038 31F9023B ldrsh r3, [r1], #2 27672 .LVL4471: 27673 003c 2EF8023F strh r3, [lr, #2]! @ movhi 27674 .LVL4472: 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (tapCnt > 0U) 27675 .loc 73 729 0 27676 0040 BAF1000F cmp r10, #0 27677 0044 6FD0 beq .L2134 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 27678 .loc 73 721 0 27679 0046 CDE90112 strd r1, r2, [sp, #4] 27680 004a 08F10400 add r0, r8, #4 27681 004e 0BEB0C07 add r7, fp, ip 27682 .loc 73 729 0 27683 0052 6346 mov r3, ip ARM GAS /tmp/ccJrAs6S.s page 1176 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 27684 .loc 73 721 0 27685 0054 0024 movs r4, #0 27686 0056 0025 movs r5, #0 27687 .LVL4473: 27688 .L2123: 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 += (q31_t) *px++ * *pb++; 27689 .loc 73 731 0 27690 0058 33F8042C ldrh r2, [r3, #-4] 27691 005c 30F8041C ldrh r1, [r0, #-4] 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 += (q31_t) *px++ * *pb++; 27692 .loc 73 732 0 27693 0060 33F8026C ldrh r6, [r3, #-2] 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** acc0 += (q31_t) *px++ * *pb++; 27694 .loc 73 731 0 27695 0064 C2FB8145 smlalbb r4, r5, r2, r1 27696 .LVL4474: 27697 0068 0433 adds r3, r3, #4 27698 .LVL4475: 27699 .loc 73 732 0 27700 006a 30F8022C ldrh r2, [r0, #-2] 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 27701 .loc 73 729 0 27702 006e BB42 cmp r3, r7 27703 .loc 73 732 0 27704 0070 C6FB8245 smlalbb r4, r5, r6, r2 27705 .LVL4476: 27706 0074 00F10400 add r0, r0, #4 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 27707 .loc 73 729 0 27708 0078 EED1 bne .L2123 27709 007a DDE90112 ldrd r1, r2, [sp, #4] 27710 007e E30B lsrs r3, r4, #15 27711 .LVL4477: 27712 0080 43EA4543 orr r3, r3, r5, lsl #17 27713 .LVL4478: 27714 .L2122: 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 27715 .loc 73 715 0 27716 0084 B9F10109 subs r9, r9, #1 27717 .LVL4479: 27718 .LBB2305: 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** tapCnt--; 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* The result is in 2.30 format. Convert to 1.15 with saturation. 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** Then store the output in the destination buffer. */ 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); 27719 .loc 73 740 0 27720 .syntax unified 27721 @ 740 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c" 1 27722 0088 03F30F03 ssat r3, #16, r3 27723 @ 0 "" 2 27724 .LVL4480: ARM GAS /tmp/ccJrAs6S.s page 1177 27725 .thumb 27726 .syntax unified 27727 008c 0CF1020C add ip, ip, #2 27728 .LBE2305: 27729 0090 22F8023B strh r3, [r2], #2 @ movhi 27730 .LVL4481: 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 27731 .loc 73 715 0 27732 0094 D0D1 bne .L2124 27733 0096 DDE90438 ldrd r3, r8, [sp, #16] 27734 .LVL4482: 27735 009a 039C ldr r4, [sp, #12] 27736 009c 08EB4303 add r3, r8, r3, lsl #1 27737 .LVL4483: 27738 .L2121: 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Advance state pointer by 1 for the next sample */ 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pState = pState + 1U; 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Decrement loop counter */ 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** blkCnt--; 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Processing is complete. 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** Now copy the last numTaps - 1 samples to the start of the state buffer. 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** This prepares the state buffer for the next function call. */ 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Points to the start of the state buffer */ 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** pStateCurnt = S->pState; 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Loop unrolling: Compute 4 taps at a time */ 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** tapCnt = (numTaps - 1U) >> 2U; 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Copy data */ 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (tapCnt > 0U) 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pStateCurnt++ = *pState++; 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pStateCurnt++ = *pState++; 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pStateCurnt++ = *pState++; 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pStateCurnt++ = *pState++; 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Decrement loop counter */ 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** tapCnt--; 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Calculate remaining number of copies */ 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** tapCnt = (numTaps - 1U) % 0x4U; 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #else 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Initialize tapCnt with number of taps */ 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** tapCnt = (numTaps - 1U); 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1178 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Copy remaining data */ 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** while (tapCnt > 0U) 27739 .loc 73 784 0 27740 00a0 611E subs r1, r4, #1 27741 .LVL4484: 27742 00a2 3DD0 beq .L2120 27743 00a4 1A1D adds r2, r3, #4 27744 .LVL4485: 27745 00a6 08F10400 add r0, r8, #4 27746 00aa 8342 cmp r3, r0 27747 00ac 38BF it cc 27748 00ae 9045 cmpcc r8, r2 27749 00b0 3FD3 bcc .L2126 27750 00b2 0D29 cmp r1, #13 27751 00b4 3DD9 bls .L2126 27752 00b6 C3F34002 ubfx r2, r3, #1, #1 27753 00ba 002A cmp r2, #0 27754 00bc A4F10200 sub r0, r4, #2 27755 00c0 0CBF ite eq 27756 00c2 0124 moveq r4, #1 27757 00c4 0224 movne r4, #2 27758 00c6 A042 cmp r0, r4 27759 00c8 20D3 bcc .L2127 27760 00ca 72B3 cbz r2, .L2135 27761 .LVL4486: 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** *pStateCurnt++ = *pState++; 27762 .loc 73 786 0 27763 00cc B3F90040 ldrsh r4, [r3] 27764 00d0 A8F80040 strh r4, [r8] @ movhi 27765 00d4 9E1C adds r6, r3, #2 27766 .LVL4487: 27767 00d6 08F10205 add r5, r8, #2 27768 .LVL4488: 27769 .L2128: 27770 00da 8C1A subs r4, r1, r2 27771 00dc A11E subs r1, r4, #2 27772 00de 5200 lsls r2, r2, #1 27773 00e0 4908 lsrs r1, r1, #1 27774 00e2 1344 add r3, r3, r2 27775 00e4 9044 add r8, r8, r2 27776 00e6 0131 adds r1, r1, #1 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 27777 .loc 73 784 0 27778 00e8 0022 movs r2, #0 27779 .LVL4489: 27780 .L2129: 27781 00ea 0132 adds r2, r2, #1 27782 .loc 73 786 0 27783 00ec 53F8047B ldr r7, [r3], #4 27784 00f0 48F8047B str r7, [r8], #4 @ unaligned 27785 00f4 8A42 cmp r2, r1 27786 00f6 F8D3 bcc .L2129 27787 00f8 4A00 lsls r2, r1, #1 27788 00fa 4FEA8108 lsl r8, r1, #2 27789 00fe 9442 cmp r4, r2 27790 0100 06EB0803 add r3, r6, r8 ARM GAS /tmp/ccJrAs6S.s page 1179 27791 0104 A0EB0201 sub r1, r0, r2 27792 0108 A844 add r8, r8, r5 27793 010a 09D0 beq .L2120 27794 .L2127: 27795 .LVL4490: 27796 010c B3F90020 ldrsh r2, [r3] 27797 0110 A8F80020 strh r2, [r8] @ movhi 27798 .LVL4491: 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 27799 .loc 73 784 0 27800 0114 0129 cmp r1, #1 27801 0116 03D0 beq .L2120 27802 .LVL4492: 27803 .loc 73 786 0 27804 0118 B3F90230 ldrsh r3, [r3, #2] 27805 .LVL4493: 27806 011c A8F80230 strh r3, [r8, #2] @ movhi 27807 .LVL4494: 27808 .L2120: 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** /* Decrement loop counter */ 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** tapCnt--; 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** } 27809 .loc 73 792 0 27810 0120 07B0 add sp, sp, #28 27811 .LCFI201: 27812 .cfi_remember_state 27813 .cfi_def_cfa_offset 36 27814 @ sp needed 27815 0122 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 27816 .LVL4495: 27817 .L2134: 27818 .LCFI202: 27819 .cfi_restore_state 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 27820 .loc 73 729 0 27821 0126 5346 mov r3, r10 27822 0128 ACE7 b .L2122 27823 .LVL4496: 27824 .L2135: 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 27825 .loc 73 784 0 27826 012a 0846 mov r0, r1 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 27827 .loc 73 530 0 27828 012c 4546 mov r5, r8 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 27829 .loc 73 784 0 27830 012e 1E46 mov r6, r3 27831 0130 D3E7 b .L2128 27832 .L2126: 27833 0132 A8F10208 sub r8, r8, #2 27834 .LVL4497: 27835 .L2131: 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1180 27836 .loc 73 786 0 27837 0136 33F9022B ldrsh r2, [r3], #2 27838 .LVL4498: 27839 013a 28F8022F strh r2, [r8, #2]! @ movhi 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** { 27840 .loc 73 784 0 27841 013e 0139 subs r1, r1, #1 27842 .LVL4499: 27843 0140 F9D1 bne .L2131 27844 .loc 73 792 0 27845 0142 07B0 add sp, sp, #28 27846 .LCFI203: 27847 .cfi_remember_state 27848 .cfi_def_cfa_offset 36 27849 @ sp needed 27850 0144 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 27851 .LVL4500: 27852 .L2133: 27853 .LCFI204: 27854 .cfi_restore_state 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 27855 .loc 73 530 0 27856 0148 4346 mov r3, r8 27857 .LVL4501: 27858 014a A9E7 b .L2121 27859 .cfi_endproc 27860 .LFE218: 27862 .section .text.arm_fir_q31,"ax",%progbits 27863 .align 1 27864 .p2align 2,,3 27865 .global arm_fir_q31 27866 .syntax unified 27867 .thumb 27868 .thumb_func 27869 .fpu fpv4-sp-d16 27871 arm_fir_q31: 27872 .LFB219: 27873 .file 74 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Title: arm_fir_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Description: Q31 FIR filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * ARM GAS /tmp/ccJrAs6S.s page 1181 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** @addtogroup FIR 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** @brief Processing function for Q31 FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** @param[in] S points to an instance of the Q31 FIR filter structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** The function is implemented using an internal 64-bit accumulator. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** The accumulator has a 2.62 format and maintains full precision of the intermedia 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** Thus, if the accumulator result overflows it wraps around rather than clip. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** In order to avoid overflows completely the input signal must be scaled down by l 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** After all multiply-accumulates are performed, the 2.62 accumulator is right shif 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** @remark 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** Refer to \ref arm_fir_fast_q31() for a faster but less precise implementation of 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** #if defined(ARM_MATH_MVEI) 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** #include "arm_helium_utils.h" 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** static void arm_fir_q31_1_4_mve(const arm_fir_instance_q31 * S, const q31_t * pSrc, q31_t * pDst, u 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pState = S->pState; /* State pointer */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pStateCur; /* Points to the current sample of the state */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pSamples; /* Temporary pointer to the sample buffer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pOutput; /* Temporary pointer to the output buffer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pTempSrc; /* Temporary pointer to the source data */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pTempDest; /* Temporary pointer to the destination buffer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t blkCnt; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31x4_t vecIn0; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1182 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * pState points to state array which contains previous frame (numTaps - 1) samples 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * pStateCur points to the location where the new input data should be written 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur = &(pState[(numTaps - 1u)]); 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc = pSrc; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamples = pState; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pOutput = pDst; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q63_t acc0, acc1, acc2, acc3; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * load 4 coefs 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31x4_t vecCoeffs = *(q31x4_t *) pCoeffs; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = blockSize >> 2; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (blkCnt > 0U) 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pSamplesTmp = pSamples; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Save 4 input samples in the history buffer 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vst1q(pStateCur, vld1q(pTempSrc)); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur += 4; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(pSamplesTmp); 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhq(vecIn0, vecCoeffs); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = vrmlaldavhq(vecIn0, vecCoeffs); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[2]); 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = vrmlaldavhq(vecIn0, vecCoeffs); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[3]); 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc3 = vrmlaldavhq(vecIn0, vecCoeffs); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = asrl(acc0, 23); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = asrl(acc1, 23); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = asrl(acc2, 23); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc3 = asrl(acc3, 23); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc0; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc1; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc2; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc3; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamples += 4; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Decrement the sample block loop counter 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt--; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t residual = blockSize & 3; ARM GAS /tmp/ccJrAs6S.s page 1183 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** switch (residual) 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** case 3: 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Save 4 input samples in the history buffer 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *(q31x4_t *) pStateCur = *(q31x4_t *) pTempSrc; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur += 4; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(pSamples); 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhq(vecIn0, vecCoeffs); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamples[1]); 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = vrmlaldavhq(vecIn0, vecCoeffs); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamples[2]); 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = vrmlaldavhq(vecIn0, vecCoeffs); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = asrl(acc0, 23); 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = asrl(acc1, 23); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = asrl(acc2, 23); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc0; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc1; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc2; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** break; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** case 2: 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Save 4 input samples in the history buffer 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vst1q(pStateCur, vld1q(pTempSrc)); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur += 4; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(pSamples); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhq(vecIn0, vecCoeffs); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamples[1]); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = vrmlaldavhq(vecIn0, vecCoeffs); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = asrl(acc0, 23); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = asrl(acc1, 23); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc0; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc1; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** break; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** case 1: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { ARM GAS /tmp/ccJrAs6S.s page 1184 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Save 4 input samples in the history buffer 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vst1q(pStateCur, vld1q(pTempSrc)); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur += 4; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(pSamples); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhq(vecIn0, vecCoeffs); 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = asrl(acc0, 23); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc0; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** break; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Copy the samples back into the history buffer start 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc = &S->pState[blockSize]; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempDest = S->pState; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = numTaps >> 2; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (blkCnt > 0U) 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vst1q(pTempDest, vld1q(pTempSrc)); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempDest += 4; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt--; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = numTaps & 3; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** if (blkCnt > 0U) 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vstrwq_p_s32(pTempDest, vld1q(pTempSrc), p0); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** static void arm_fir_q31_5_8_mve(const arm_fir_instance_q31 * S, const q31_t * pSrc, q31_t * pDst, u 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pState = S->pState; /* State pointer */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pStateCur; /* Points to the current sample of the state */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pSamples; /* Temporary pointer to the sample buffer */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pOutput; /* Temporary pointer to the output buffer */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pTempSrc; /* Temporary pointer to the source data */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pTempDest; /* Temporary pointer to the destination buffer */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t blkCnt; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31x4_t vecIn0; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q63_t acc0, acc1, acc2, acc3; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31x4_t vecCoeffs1_4, vecCoeffs5_8; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * pState points to state array which contains previous frame (numTaps - 1) samples ARM GAS /tmp/ccJrAs6S.s page 1185 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * pStateCur points to the location where the new input data should be written 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur = &(pState[(numTaps - 1u)]); 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc = pSrc; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamples = pState; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pOutput = pDst; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * load 8 coefs 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecCoeffs1_4 = *(q31x4_t *) pCoeffs; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecCoeffs5_8 = *(q31x4_t *) (pCoeffs + 4); 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = blockSize >> 2; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (blkCnt > 0U) 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pSamplesTmp = pSamples; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Save 4 input samples in the history buffer 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vst1q(pStateCur, vld1q(pTempSrc)); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(pSamplesTmp); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhq(vecIn0, vecCoeffs1_4); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = vrmlaldavhq(vecIn0, vecCoeffs1_4); 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[2]); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = vrmlaldavhq(vecIn0, vecCoeffs1_4); 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[3]); 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc3 = vrmlaldavhq(vecIn0, vecCoeffs1_4); 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[4]); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs5_8); 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[5]); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs5_8); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[6]); 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs5_8); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[7]); 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs5_8); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = asrl(acc0, 23); 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = asrl(acc1, 23); 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = asrl(acc2, 23); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc3 = asrl(acc3, 23); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc0; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc1; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc2; ARM GAS /tmp/ccJrAs6S.s page 1186 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc3; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamples += 4; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur += 4; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Decrement the sample block loop counter 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt--; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t residual = blockSize & 3; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** switch (residual) 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** case 3: 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Save 4 input samples in the history buffer 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *(q31x4_t *) pStateCur = *(q31x4_t *) pTempSrc; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur += 4; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(pSamples); 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhq(vecIn0, vecCoeffs1_4); 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamples[1]); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = vrmlaldavhq(vecIn0, vecCoeffs1_4); 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamples[2]); 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = vrmlaldavhq(vecIn0, vecCoeffs1_4); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamples[4]); 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs5_8); 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamples[5]); 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs5_8); 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamples[6]); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs5_8); 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = asrl(acc0, 23); 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = asrl(acc1, 23); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = asrl(acc2, 23); 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc0; 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc1; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc2; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** break; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** case 2: 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Save 4 input samples in the history buffer 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ ARM GAS /tmp/ccJrAs6S.s page 1187 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vst1q(pStateCur, vld1q(pTempSrc)); 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur += 4; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(pSamples); 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhq(vecIn0, vecCoeffs1_4); 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamples[1]); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = vrmlaldavhq(vecIn0, vecCoeffs1_4); 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamples[4]); 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs5_8); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamples[5]); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs5_8); 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = asrl(acc0, 23); 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = asrl(acc1, 23); 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc0; 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc1; 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** break; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** case 1: 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Save 4 input samples in the history buffer 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vst1q(pStateCur, vld1q(pTempSrc)); 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur += 4; 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(pSamples); 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhq(vecIn0, vecCoeffs1_4); 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamples[4]); 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs5_8); 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = asrl(acc0, 23); 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc0; 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** break; 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Copy the samples back into the history buffer start 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc = &S->pState[blockSize]; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempDest = S->pState; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = numTaps >> 2; 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (blkCnt > 0U) 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vst1q(pTempDest, vld1q(pTempSrc)); 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; ARM GAS /tmp/ccJrAs6S.s page 1188 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempDest += 4; 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt--; 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = numTaps & 3; 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** if (blkCnt > 0U) 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vstrwq_p_s32(pTempDest, vld1q(pTempSrc), p0); 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** void arm_fir_q31( 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const arm_fir_instance_q31 * S, 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t * pSrc, 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t * pDst, 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t blockSize) 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pState = S->pState; /* State pointer */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pStateCur; /* Points to the current sample of the state */ 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pSamples; /* Temporary pointer to the sample buffer */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pOutput; /* Temporary pointer to the output buffer */ 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pTempSrc; /* Temporary pointer to the source data */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pTempDest; /* Temporary pointer to the destination buffer */ 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t blkCnt; 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31x4_t vecIn0; 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t tapsBlkCnt = (numTaps + 3) / 4; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q63_t acc0, acc1, acc2, acc3; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31x4_t vecCoeffs; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * [1 to 8 taps] specialized routines 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** if (blockSize >= 8) 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** if (numTaps <= 4) 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** arm_fir_q31_1_4_mve(S, pSrc, pDst, blockSize); 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** return; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** else if (numTaps <= 8) 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** arm_fir_q31_5_8_mve(S, pSrc, pDst, blockSize); 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** return; 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * pState points to state array which contains previous frame (numTaps - 1) samples 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * pStateCur points to the location where the new input data should be written 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** if (blockSize >= 8) 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur = &(pState[(numTaps - 1u)]); ARM GAS /tmp/ccJrAs6S.s page 1189 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamples = pState; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc = pSrc; 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pOutput = pDst; 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = blockSize >> 2; 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (blkCnt > 0U) 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pCoeffsTmp = pCoeffs; 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pSamplesTmp = pSamples; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = 0LL; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = 0LL; 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = 0LL; 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc3 = 0LL; 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Save 4 input samples in the history buffer 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vst1q(pStateCur, vld1q(pTempSrc)); 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur += 4; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapsBlkCnt = (numTaps ) / 4; 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t i = tapsBlkCnt ; 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (i > 0U) 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * load 4 coefs 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecCoeffs = *(q31x4_t *) pCoeffsTmp; 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(pSamplesTmp); 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs); 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs); 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[2]); 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs); 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[3]); 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs); 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamplesTmp += 4; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pCoeffsTmp += 4; 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Decrement the taps block loop counter 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i--; 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapsBlkCnt = (numTaps ) & 3; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i = tapsBlkCnt ; 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (i > 0U) 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * load 4 coefs 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ ARM GAS /tmp/ccJrAs6S.s page 1190 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 += ((q63_t) *pSamplesTmp * *pCoeffsTmp) >> 8; 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 += ((q63_t) pSamplesTmp[1] * *pCoeffsTmp) >> 8; 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 += ((q63_t) pSamplesTmp[2] * *pCoeffsTmp) >> 8; 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc3 += ((q63_t) pSamplesTmp[3] * *pCoeffsTmp) >> 8; 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamplesTmp += 1; 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pCoeffsTmp += 1; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Decrement the taps block loop counter 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i--; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* .54-> .31 conversion and store accumulators */ 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = asrl(acc0, 23); 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = asrl(acc1, 23); 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = asrl(acc2, 23); 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc3 = asrl(acc3, 23); 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc0; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc1; 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc2; 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc3; 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamples += 4; 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Decrement the sample block loop counter 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt--; 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t residual = blockSize & 3; 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** switch (residual) 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** case 3: 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pCoeffsTmp = pCoeffs; 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pSamplesTmp = pSamples; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = 0LL; 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = 0LL; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = 0LL; 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Save 4 input samples in the history buffer 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *(q31x4_t *) pStateCur = *(q31x4_t *) pTempSrc; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur += 4; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapsBlkCnt = numTaps / 4; ARM GAS /tmp/ccJrAs6S.s page 1191 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t i = tapsBlkCnt; 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (i > 0U) 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecCoeffs = *(q31x4_t *) pCoeffsTmp; 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(pSamplesTmp); 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs); 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs); 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[2]); 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs); 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamplesTmp += 4; 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pCoeffsTmp += 4; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i--; 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapsBlkCnt = (numTaps ) & 3; 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i = tapsBlkCnt ; 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (i > 0U) 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[num 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 += ((q63_t) *pSamplesTmp * *pCoeffsTmp) >> 8; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 += ((q63_t) pSamplesTmp[1] * *pCoeffsTmp) >> 8; 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 += ((q63_t) pSamplesTmp[2] * *pCoeffsTmp) >> 8; 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamplesTmp += 1; 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pCoeffsTmp += 1; 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Decrement the taps block loop counter 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i--; 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = asrl(acc0, 23); 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = asrl(acc1, 23); 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = asrl(acc2, 23); 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc0; 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc1; 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc2; 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** break; 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** case 2: 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pCoeffsTmp = pCoeffs; 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pSamplesTmp = pSamples; 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = 0LL; 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = 0LL; 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1192 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Save 4 input samples in the history buffer 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vst1q(pStateCur, vld1q(pTempSrc)); 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur += 4; 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapsBlkCnt = (numTaps ) / 4; 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t i = tapsBlkCnt; 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (i > 0U) 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecCoeffs = *(q31x4_t *) pCoeffsTmp; 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(pSamplesTmp); 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs); 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs); 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamplesTmp += 4; 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pCoeffsTmp += 4; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i--; 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapsBlkCnt = (numTaps ) & 3; 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i = tapsBlkCnt ; 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (i > 0U) 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[num 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 += ((q63_t) *pSamplesTmp * *pCoeffsTmp) >> 8; 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 += ((q63_t) pSamplesTmp[1] * *pCoeffsTmp) >> 8; 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamplesTmp += 1; 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pCoeffsTmp += 1; 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Decrement the taps block loop counter 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i--; 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = asrl(acc0, 23); 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = asrl(acc1, 23); 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc0; 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc1; 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** break; 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** case 1: 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pCoeffsTmp = pCoeffs; 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pSamplesTmp = pSamples; 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = 0LL; 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1193 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Save 4 input samples in the history buffer 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vst1q(pStateCur, vld1q(pTempSrc)); 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCur += 4; 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapsBlkCnt = (numTaps ) / 4; 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t i = tapsBlkCnt; 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (i > 0U) 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecCoeffs = *(q31x4_t *) pCoeffsTmp; 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vecIn0 = vld1q(pSamplesTmp); 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs); 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamplesTmp += 4; 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pCoeffsTmp += 4; 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i--; 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapsBlkCnt = (numTaps ) & 3; 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i = tapsBlkCnt ; 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (i > 0U) 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[num 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 += ((q63_t) *pSamplesTmp * *pCoeffsTmp) >> 8; 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pSamplesTmp += 1; 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pCoeffsTmp += 1; 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Decrement the taps block loop counter 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i--; 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = asrl(acc0, 23); 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pOutput++ = (q31_t) acc0; 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** break; 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** else 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pStateCurnt; /* Points to the current sample of t 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *px; /* Temporary pointer for state buffe 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pb; /* Temporary pointer for coefficient 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q63_t acc0; /* Accumulator */ 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t i, blkCnt; /* Loop counters */ 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = blockSize; 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (blkCnt > 0U) ARM GAS /tmp/ccJrAs6S.s page 1194 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Copy one sample at a time into state buffer */ 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pStateCurnt++ = *pSrc++; 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Set the accumulator to zero */ 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = 0; 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Initialize state pointer */ 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** px = pState; 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Initialize Coefficient pointer */ 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pb = pCoeffs; 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i = numTaps; 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Perform the multiply-accumulates */ 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** do 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 += (q63_t) *px++ * *pb++; 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i--; 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } while (i > 0U); 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Result is in 2.62 format. Convert to 1.31 and store in destination buffer. */ 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pDst++ = (q31_t) (acc0 >> 31U); 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Advance state pointer by 1 for the next sample */ 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pState = pState + 1U; 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Decrement loop counter */ 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt--; 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * Copy the samples back into the history buffer start 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc = &S->pState[blockSize]; 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempDest = S->pState; 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = numTaps >> 2; 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (blkCnt > 0U) 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vst1q(pTempDest, vld1q(pTempSrc)); 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempSrc += 4; 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pTempDest += 4; 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt--; 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = numTaps & 3; 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** if (blkCnt > 0U) 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** vstrwq_p_s32(pTempDest, vld1q(pTempSrc), p0); 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1195 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** #else 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** void arm_fir_q31( 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const arm_fir_instance_q31 * S, 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t * pSrc, 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t * pDst, 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t blockSize) 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 27874 .loc 74 824 0 27875 .cfi_startproc 27876 @ args = 0, pretend = 0, frame = 8 27877 @ frame_needed = 0, uses_anonymous_args = 0 27878 .LVL4502: 27879 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 27880 .LCFI205: 27881 .cfi_def_cfa_offset 36 27882 .cfi_offset 4, -36 27883 .cfi_offset 5, -32 27884 .cfi_offset 6, -28 27885 .cfi_offset 7, -24 27886 .cfi_offset 8, -20 27887 .cfi_offset 9, -16 27888 .cfi_offset 10, -12 27889 .cfi_offset 11, -8 27890 .cfi_offset 14, -4 27891 0004 83B0 sub sp, sp, #12 27892 .LCFI206: 27893 .cfi_def_cfa_offset 48 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pState = S->pState; /* State pointer */ 27894 .loc 74 825 0 27895 0006 4468 ldr r4, [r0, #4] 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pStateCurnt; /* Points to the current sample of the state 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *px; /* Temporary pointer for state buffer */ 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pb; /* Temporary pointer for coefficient buffer 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q63_t acc0; /* Accumulator */ 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 27896 .loc 74 831 0 27897 0008 B0F800C0 ldrh ip, [r0] 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t *pState = S->pState; /* State pointer */ 27898 .loc 74 825 0 27899 000c 0094 str r4, [sp] 27900 .LVL4503: 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 27901 .loc 74 826 0 27902 000e D0F808A0 ldr r10, [r0, #8] 27903 .LVL4504: 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** uint32_t i, tapCnt, blkCnt; /* Loop counters */ 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q63_t acc1, acc2; /* Accumulators */ 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t x0, x1, x2; /* Temporary variables to hold state values 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** q31_t c0; /* Temporary variable to hold coefficient va 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** #endif 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* pStateCurnt points to the location where the new input data should be written */ 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); ARM GAS /tmp/ccJrAs6S.s page 1196 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Loop unrolling: Compute 4 output values simultaneously. 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * The variables acc0 ... acc3 hold output values that are being computed: 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n- 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n- 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n- 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n- 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** */ 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = blockSize / 3; 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (blkCnt > 0U) 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Copy 3 new input samples into the state buffer. */ 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pStateCurnt++ = *pSrc++; 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pStateCurnt++ = *pSrc++; 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pStateCurnt++ = *pSrc++; 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Set all accumulators to zero */ 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = 0; 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 = 0; 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 = 0; 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Initialize state pointer */ 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** px = pState; 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Initialize coefficient pointer */ 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pb = pCoeffs; 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Read the first 2 samples from the state buffer: x[n-numTaps], x[n-numTaps-1] */ 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** x0 = *px++; 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** x1 = *px++; 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Loop unrolling: process 3 taps at a time. */ 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapCnt = numTaps / 3; 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (tapCnt > 0U) 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Read the b[numTaps] coefficient */ 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** c0 = *pb; 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Read x[n-numTaps-2] sample */ 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** x2 = *(px++); 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Perform the multiply-accumulates */ 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 += ((q63_t) x0 * c0); 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 += ((q63_t) x1 * c0); 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 += ((q63_t) x2 * c0); 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Read the coefficient and state */ 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** c0 = *(pb + 1U); 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** x0 = *(px++); 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Perform the multiply-accumulates */ ARM GAS /tmp/ccJrAs6S.s page 1197 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 += ((q63_t) x1 * c0); 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 += ((q63_t) x2 * c0); 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 += ((q63_t) x0 * c0); 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Read the coefficient and state */ 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** c0 = *(pb + 2U); 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** x1 = *(px++); 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* update coefficient pointer */ 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pb += 3U; 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Perform the multiply-accumulates */ 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 += ((q63_t) x2 * c0); 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 += ((q63_t) x0 * c0); 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 += ((q63_t) x1 * c0); 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Decrement loop counter */ 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapCnt--; 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Loop unrolling: Compute remaining outputs */ 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapCnt = numTaps % 0x3U; 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (tapCnt > 0U) 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Read coefficients */ 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** c0 = *(pb++); 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Fetch 1 state variable */ 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** x2 = *(px++); 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Perform the multiply-accumulates */ 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 += ((q63_t) x0 * c0); 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc1 += ((q63_t) x1 * c0); 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc2 += ((q63_t) x2 * c0); 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Reuse the present sample states for next sample */ 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** x0 = x1; 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** x1 = x2; 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Decrement loop counter */ 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapCnt--; 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Advance the state pointer by 3 to process the next group of 3 samples */ 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pState = pState + 3; 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* The result is in 2.30 format. Convert to 1.31 and store in destination buffer. */ 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pDst++ = (q31_t) (acc0 >> 31U); 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pDst++ = (q31_t) (acc1 >> 31U); 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pDst++ = (q31_t) (acc2 >> 31U); 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Decrement loop counter */ 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt--; 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Loop unrolling: Compute remaining output samples */ ARM GAS /tmp/ccJrAs6S.s page 1198 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = blockSize % 0x3U; 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** #else 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Initialize blkCnt with number of taps */ 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt = blockSize; 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (blkCnt > 0U) 27904 .loc 74 966 0 27905 0012 0193 str r3, [sp, #4] 27906 0014 C3B3 cbz r3, .L2159 27907 0016 8946 mov r9, r1 27908 0018 0CF18041 add r1, ip, #1073741824 27909 .LVL4505: 27910 001c 0139 subs r1, r1, #1 27911 .LVL4506: 27912 001e 8900 lsls r1, r1, #2 27913 .LVL4507: 27914 0020 1846 mov r0, r3 27915 .LVL4508: 27916 0022 0439 subs r1, r1, #4 27917 0024 04EB010E add lr, r4, r1 27918 0028 8346 mov fp, r0 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 27919 .loc 74 825 0 27920 002a A046 mov r8, r4 27921 .LVL4509: 27922 .L2156: 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Copy one sample at a time into state buffer */ 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pStateCurnt++ = *pSrc++; 27923 .loc 74 969 0 27924 002c 59F8043B ldr r3, [r9], #4 27925 .LVL4510: 27926 0030 4EF8043F str r3, [lr, #4]! 27927 .LVL4511: 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Set the accumulator to zero */ 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 = 0; 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Initialize state pointer */ 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** px = pState; 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Initialize Coefficient pointer */ 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pb = pCoeffs; 27928 .loc 74 978 0 27929 0034 5546 mov r5, r10 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i = numTaps; 27930 .loc 74 980 0 27931 0036 6346 mov r3, ip 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 27932 .loc 74 969 0 27933 0038 4446 mov r4, r8 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1199 27934 .loc 74 972 0 27935 003a 0020 movs r0, #0 27936 003c 0021 movs r1, #0 27937 .LVL4512: 27938 .L2155: 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Perform the multiply-accumulates */ 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** do 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n- 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** acc0 += (q63_t) *px++ * *pb++; 27939 .loc 74 986 0 discriminator 1 27940 003e 54F8047B ldr r7, [r4], #4 27941 .LVL4513: 27942 0042 55F8046B ldr r6, [r5], #4 27943 .LVL4514: 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** i--; 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } while (i > 0U); 27944 .loc 74 989 0 discriminator 1 27945 0046 013B subs r3, r3, #1 27946 .LVL4515: 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 27947 .loc 74 986 0 discriminator 1 27948 0048 C6FB0701 smlal r0, r1, r6, r7 27949 .LVL4516: 27950 .loc 74 989 0 discriminator 1 27951 004c F7D1 bne .L2155 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Result is in 2.62 format. Convert to 1.31 and store in destination buffer. */ 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pDst++ = (q31_t) (acc0 >> 31U); 27952 .loc 74 992 0 27953 004e C30F lsrs r3, r0, #31 27954 0050 43EA4103 orr r3, r3, r1, lsl #1 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 27955 .loc 74 966 0 27956 0054 BBF1010B subs fp, fp, #1 27957 .LVL4517: 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Advance state pointer by 1 for the next sample */ 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pState = pState + 1U; 27958 .loc 74 995 0 27959 0058 08F10408 add r8, r8, #4 27960 .LVL4518: 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 27961 .loc 74 992 0 27962 005c 42F8043B str r3, [r2], #4 27963 .LVL4519: 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 27964 .loc 74 966 0 27965 0060 E4D1 bne .L2156 27966 0062 DDE90032 ldrd r3, r2, [sp] 27967 .LVL4520: 27968 0066 03EB8202 add r2, r3, r2, lsl #2 27969 .LVL4521: 27970 .L2154: 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1200 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Decrement loop counter */ 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** blkCnt--; 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Processing is complete. 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** Now copy the last numTaps - 1 samples to the start of the state buffer. 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** This prepares the state buffer for the next function call. */ 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Points to the start of the state buffer */ 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** pStateCurnt = S->pState; 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Loop unrolling: Compute 4 taps at a time */ 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapCnt = (numTaps - 1U) >> 2U; 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Copy data */ 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (tapCnt > 0U) 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pStateCurnt++ = *pState++; 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pStateCurnt++ = *pState++; 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pStateCurnt++ = *pState++; 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pStateCurnt++ = *pState++; 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Decrement loop counter */ 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapCnt--; 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Calculate remaining number of copies */ 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapCnt = (numTaps - 1U) % 0x4U; 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** #else 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Initialize tapCnt with number of taps */ 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapCnt = (numTaps - 1U); 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Copy remaining data */ 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** while (tapCnt > 0U) 27971 .loc 74 1036 0 27972 006a BCF1010C subs ip, ip, #1 27973 .LVL4522: 27974 006e 08D0 beq .L2153 27975 0070 009B ldr r3, [sp] 27976 0072 043B subs r3, r3, #4 27977 .LVL4523: 27978 .L2158: 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** *pStateCurnt++ = *pState++; 27979 .loc 74 1038 0 27980 0074 52F8041B ldr r1, [r2], #4 27981 .LVL4524: 27982 0078 43F8041F str r1, [r3, #4]! 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** { 27983 .loc 74 1036 0 27984 007c BCF1010C subs ip, ip, #1 ARM GAS /tmp/ccJrAs6S.s page 1201 27985 .LVL4525: 27986 0080 F8D1 bne .L2158 27987 .LVL4526: 27988 .L2153: 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** /* Decrement loop counter */ 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** tapCnt--; 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c **** } 27989 .loc 74 1044 0 27990 0082 03B0 add sp, sp, #12 27991 .LCFI207: 27992 .cfi_remember_state 27993 .cfi_def_cfa_offset 36 27994 @ sp needed 27995 0084 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 27996 .LVL4527: 27997 .L2159: 27998 .LCFI208: 27999 .cfi_restore_state 28000 0088 2246 mov r2, r4 28001 .LVL4528: 28002 008a EEE7 b .L2154 28003 .cfi_endproc 28004 .LFE219: 28006 .section .text.arm_fir_q7,"ax",%progbits 28007 .align 1 28008 .p2align 2,,3 28009 .global arm_fir_q7 28010 .syntax unified 28011 .thumb 28012 .thumb_func 28013 .fpu fpv4-sp-d16 28015 arm_fir_q7: 28016 .LFB220: 28017 .file 75 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Title: arm_fir_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Description: Q7 FIR filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * www.apache.org/licenses/LICENSE-2.0 ARM GAS /tmp/ccJrAs6S.s page 1202 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** @addtogroup FIR 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** @brief Processing function for Q7 FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** @param[in] S points to an instance of the Q7 FIR filter structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** The function is implemented using a 32-bit internal accumulator. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** Both coefficients and state variables are represented in 1.7 format and multipli 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 f 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** There is no risk of internal overflow with this approach and the full precision 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** The accumulator is converted to 18.7 format by discarding the low 7 bits. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** Finally, the result is truncated to 1.7 format. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** #if defined(ARM_MATH_MVEI) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** void arm_fir_q7_1_16_mve(const arm_fir_instance_q7 * S, const q7_t * pSrc, q7_t * pDst, uint32_t bl 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pState = S->pState; /* State pointer */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pStateCur; /* Points to the current sample of the state */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pSamples; /* Temporary pointer to the sample buffer */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pOutput; /* Temporary pointer to the output buffer */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pTempSrc; /* Temporary pointer to the source data */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pTempDest; /* Temporary pointer to the destination buffer */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t blkCnt; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7x16_t vecIn0; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q31_t acc0, acc1, acc2, acc3; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7x16_t vecCoeffs; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * pState points to state array which contains previous frame (numTaps - 1) samples 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * pStateCur points to the location where the new input data should be written 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ ARM GAS /tmp/ccJrAs6S.s page 1203 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCur = &(pState[(numTaps - 1u)]); 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pSamples = pState; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc = pSrc; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pOutput = pDst; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt = blockSize >> 2; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * load 16 coefs 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecCoeffs = *(q7x16_t *) pCoeffs; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (blkCnt > 0U) 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Save 16 input samples in the history buffer 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vst1q(pStateCur, vld1q(pTempSrc)); 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCur += 16; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc += 16; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(pSamples); 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = vmladavq(vecIn0, vecCoeffs); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(&pSamples[1]);; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 = vmladavq(vecIn0, vecCoeffs); 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(&pSamples[2]);; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 = vmladavq(vecIn0, vecCoeffs); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(&pSamples[3]); 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc3 = vmladavq(vecIn0, vecCoeffs); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Store the 1.7 format filter output in destination buffer 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8); 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc1 >> 7U), 8); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc2 >> 7U), 8); 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc3 >> 7U), 8); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pSamples += 4; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Decrement the sample block loop counter 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt--; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t residual = blockSize & 3; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** switch (residual) 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** case 3: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vst1q(pStateCur, vld1q(pTempSrc)); 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCur += 16; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc += 16; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(pSamples); ARM GAS /tmp/ccJrAs6S.s page 1204 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = vmladavq(vecIn0, vecCoeffs); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(&pSamples[1]); 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 = vmladavq(vecIn0, vecCoeffs); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(&pSamples[2]); 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 = vmladavq(vecIn0, vecCoeffs); 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8); 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc1 >> 7U), 8); 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc2 >> 7U), 8); 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** break; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** case 2: 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vst1q(pStateCur, vld1q(pTempSrc)); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCur += 16; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc += 16; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(pSamples); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = vmladavq(vecIn0, vecCoeffs); 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(&pSamples[1]); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 = vmladavq(vecIn0, vecCoeffs); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8); 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc1 >> 7U), 8); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** break; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** case 1: 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vst1q(pStateCur, vld1q(pTempSrc)); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCur += 16; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc += 16; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(pSamples); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = vmladavq(vecIn0, vecCoeffs); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** break; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Copy the samples back into the history buffer start 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc = &pState[blockSize]; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempDest = pState; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt = numTaps >> 4; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (blkCnt > 0U) 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vst1q(pTempDest, vld1q(pTempSrc)); 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc += 16; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempDest += 16; ARM GAS /tmp/ccJrAs6S.s page 1205 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt--; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt = numTaps & 0xF; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** if (blkCnt > 0U) 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** mve_pred16_t p0 = vctp8q(blkCnt); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vstrbq_p_s8(pTempDest, vld1q(pTempSrc), p0); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** void arm_fir_q7( 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const arm_fir_instance_q7 * S, 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t * pSrc, 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t * pDst, 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t blockSize) 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pState = S->pState; /* State pointer */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pStateCur; /* Points to the current sample of the state */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pSamples; /* Temporary pointer to the sample buffer */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pOutput; /* Temporary pointer to the output buffer */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pTempSrc; /* Temporary pointer to the source data */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pTempDest; /* Temporary pointer to the destination buffer */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t blkCnt; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7x16_t vecIn0; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t tapsBlkCnt = (numTaps + 15) / 16; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q31_t acc0, acc1, acc2, acc3; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7x16_t vecCoeffs; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** if (blockSize >= 20) 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** if (numTaps <= 16) 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * [1 to 16 taps] specialized routine 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** arm_fir_q7_1_16_mve(S, pSrc, pDst, blockSize); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** return; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** if (blockSize >= 20) 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * pState points to state array which contains previous frame (numTaps - 1) samples 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * pStateCur points to the location where the new input data should be written 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCur = &(pState[(numTaps - 1u)]); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pSamples = pState; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc = pSrc; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pOutput = pDst; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt = blockSize >> 2; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * outer samples loop 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ ARM GAS /tmp/ccJrAs6S.s page 1206 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (blkCnt > 0U) 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pCoeffsTmp = pCoeffs; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pSamplesTmp = pSamples; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = 0; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 = 0; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 = 0; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc3 = 0; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Save 16 input samples in the history buffer 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vst1q(pStateCur, vld1q(pTempSrc)); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCur += 16; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc += 16; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * inner coefficients loop 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t i = tapsBlkCnt; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (i > 0U) 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * load 16 coefs 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecCoeffs = *(q7x16_t *) pCoeffsTmp; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(pSamplesTmp); 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = vmladavaq(acc0, vecIn0, vecCoeffs); 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 = vmladavaq(acc1, vecIn0, vecCoeffs); 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(&pSamplesTmp[2]); 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 = vmladavaq(acc2, vecIn0, vecCoeffs); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(&pSamplesTmp[3]); 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc3 = vmladavaq(acc3, vecIn0, vecCoeffs); 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pSamplesTmp += 16; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pCoeffsTmp += 16; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Decrement the taps block loop counter 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** i--; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Store the 1.7 format filter output in destination buffer 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8); 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc1 >> 7U), 8); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc2 >> 7U), 8); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc3 >> 7U), 8); 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pSamples += 4; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Decrement the sample block loop counter ARM GAS /tmp/ccJrAs6S.s page 1207 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt--; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t residual = blockSize & 3; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** switch (residual) 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** case 3: 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pCoeffsTmp = pCoeffs; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pSamplesTmp = pSamples; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = 0; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 = 0; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 = 0; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Save 16 input samples in the history buffer 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vst1q(pStateCur, vld1q(pTempSrc)); 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCur += 16; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc += 16; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t i = tapsBlkCnt; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (i > 0U) 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecCoeffs = *(q7x16_t *) pCoeffsTmp; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(pSamplesTmp); 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = vmladavaq(acc0, vecIn0, vecCoeffs); 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 = vmladavaq(acc1, vecIn0, vecCoeffs); 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(&pSamplesTmp[2]); 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 = vmladavaq(acc2, vecIn0, vecCoeffs); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pSamplesTmp += 16; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pCoeffsTmp += 16; 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** i--; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8); 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc1 >> 7U), 8); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc2 >> 7U), 8); 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** break; 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** case 2: 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pCoeffsTmp = pCoeffs; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pSamplesTmp = pSamples; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = 0; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 = 0; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Save 16 input samples in the history buffer 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ ARM GAS /tmp/ccJrAs6S.s page 1208 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vst1q(pStateCur, vld1q(pTempSrc)); 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCur += 16; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc += 16; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t i = tapsBlkCnt; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (i > 0U) 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecCoeffs = *(q7x16_t *) pCoeffsTmp; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(pSamplesTmp); 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = vmladavaq(acc0, vecIn0, vecCoeffs); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(&pSamplesTmp[1]); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 = vmladavaq(acc1, vecIn0, vecCoeffs); 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pSamplesTmp += 16; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pCoeffsTmp += 16; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** i--; 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc1 >> 7U), 8); 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** break; 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** case 1: 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pCoeffsTmp = pCoeffs; 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pSamplesTmp = pSamples; 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = 0; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Save 16 input samples in the history buffer 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vst1q(pStateCur, vld1q(pTempSrc)); 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCur += 16; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc += 16; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t i = tapsBlkCnt; 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (i > 0U) 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecCoeffs = *(q7x16_t *) pCoeffsTmp; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vecIn0 = vld1q(pSamplesTmp); 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = vmladavaq(acc0, vecIn0, vecCoeffs); 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pSamplesTmp += 16; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pCoeffsTmp += 16; 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** i--; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8); 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** break; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** else 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { ARM GAS /tmp/ccJrAs6S.s page 1209 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pStateCurnt; /* Points to the current sample of the state 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *px; /* Temporary pointer for state buffer */ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pb; /* Temporary pointer for coefficient buff 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q31_t acc0; /* Accumulator */ 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t i,blkCnt; /* Loop counters */ 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt = blockSize; 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (blkCnt > 0U) 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Copy one sample at a time into state buffer */ 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pStateCurnt++ = *pSrc++; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Set the accumulator to zero */ 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = 0; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Initialize state pointer */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** px = pState; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Initialize Coefficient pointer */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pb = pCoeffs; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** i = numTaps; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Perform the multiply-accumulates */ 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (i > 0U) 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 += (q15_t) * (px++) * (*(pb++)); 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** i--; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* The result is in 2.14 format. Convert to 1.7 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** Then store the output in the destination buffer. */ 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pDst++ = __SSAT((acc0 >> 7U), 8); 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Advance state pointer by 1 for the next sample */ 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pState = pState + 1U; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Decrement loop counter */ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt--; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * Copy the samples back into the history buffer start 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc = &S->pState[blockSize]; 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempDest = S->pState; 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt = numTaps >> 4; 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (blkCnt > 0U) 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vst1q(pTempDest, vld1q(pTempSrc)); 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempSrc += 16; 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pTempDest += 16; 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt--; 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt = numTaps & 0xF; ARM GAS /tmp/ccJrAs6S.s page 1210 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** if (blkCnt > 0U) 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** mve_pred16_t p0 = vctp8q(blkCnt); 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** vstrbq_p_s8(pTempDest, vld1q(pTempSrc), p0); 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** #else 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** void arm_fir_q7( 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const arm_fir_instance_q7 * S, 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t * pSrc, 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t * pDst, 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t blockSize) 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28018 .loc 75 489 0 28019 .cfi_startproc 28020 @ args = 0, pretend = 0, frame = 16 28021 @ frame_needed = 0, uses_anonymous_args = 0 28022 .LVL4529: 28023 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 28024 .LCFI209: 28025 .cfi_def_cfa_offset 36 28026 .cfi_offset 4, -36 28027 .cfi_offset 5, -32 28028 .cfi_offset 6, -28 28029 .cfi_offset 7, -24 28030 .cfi_offset 8, -20 28031 .cfi_offset 9, -16 28032 .cfi_offset 10, -12 28033 .cfi_offset 11, -8 28034 .cfi_offset 14, -4 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pState = S->pState; /* State pointer */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pStateCurnt; /* Points to the current sample of the state 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *px; /* Temporary pointer for state buffer */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pb; /* Temporary pointer for coefficient buffer 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q31_t acc0; /* Accumulators */ 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 28035 .loc 75 496 0 28036 0004 B0F80080 ldrh r8, [r0] 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pState = S->pState; /* State pointer */ 28037 .loc 75 489 0 28038 0008 85B0 sub sp, sp, #20 28039 .LCFI210: 28040 .cfi_def_cfa_offset 56 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** uint32_t i, tapCnt, blkCnt; /* Loop counters */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q31_t acc1, acc2, acc3; /* Accumulators */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t x0, x1, x2, x3, c0; /* Temporary variables to hold state */ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** #endif 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* pStateCurnt points to the location where the new input data should be written */ 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 28041 .loc 75 506 0 28042 000a 08F1FF3A add r10, r8, #-1 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pState = S->pState; /* State pointer */ ARM GAS /tmp/ccJrAs6S.s page 1211 28043 .loc 75 489 0 28044 000e 0190 str r0, [sp, #4] 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Loop unrolling: Compute 4 output values simultaneously. 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * The variables acc0 ... acc3 hold output values that are being computed: 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n- 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n- 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n- 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n- 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** */ 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt = blockSize >> 2U; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (blkCnt > 0U) 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Copy 4 new input samples into the state buffer. */ 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pStateCurnt++ = *pSrc++; 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pStateCurnt++ = *pSrc++; 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pStateCurnt++ = *pSrc++; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pStateCurnt++ = *pSrc++; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Set all accumulators to zero */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = 0; 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 = 0; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 = 0; 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc3 = 0; 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Initialize state pointer */ 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** px = pState; 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Initialize coefficient pointer */ 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pb = pCoeffs; 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Read the first 3 samples from the state buffer: 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** * x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** x0 = *px++; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** x1 = *px++; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** x2 = *px++; 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Loop unrolling. Process 4 taps at a time. */ 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** tapCnt = numTaps >> 2U; 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Loop over the number of taps. Unroll by a factor of 4. 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** Repeat until we've computed numTaps-4 coefficients. */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (tapCnt > 0U) 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Read the b[numTaps] coefficient */ 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** c0 = *pb; 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Read x[n-numTaps-3] sample */ 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** x3 = *px; 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* acc0 += b[numTaps] * x[n-numTaps] */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 += ((q15_t) x0 * c0); 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 1212 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* acc1 += b[numTaps] * x[n-numTaps-1] */ 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 += ((q15_t) x1 * c0); 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* acc2 += b[numTaps] * x[n-numTaps-2] */ 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 += ((q15_t) x2 * c0); 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* acc3 += b[numTaps] * x[n-numTaps-3] */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc3 += ((q15_t) x3 * c0); 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Read the b[numTaps-1] coefficient */ 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** c0 = *(pb + 1U); 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Read x[n-numTaps-4] sample */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** x0 = *(px + 1U); 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Perform the multiply-accumulates */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 += ((q15_t) x1 * c0); 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 += ((q15_t) x2 * c0); 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 += ((q15_t) x3 * c0); 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc3 += ((q15_t) x0 * c0); 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Read the b[numTaps-2] coefficient */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** c0 = *(pb + 2U); 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Read x[n-numTaps-5] sample */ 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** x1 = *(px + 2U); 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Perform the multiply-accumulates */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 += ((q15_t) x2 * c0); 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 += ((q15_t) x3 * c0); 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 += ((q15_t) x0 * c0); 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc3 += ((q15_t) x1 * c0); 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Read the b[numTaps-3] coefficients */ 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** c0 = *(pb + 3U); 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Read x[n-numTaps-6] sample */ 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** x2 = *(px + 3U); 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Perform the multiply-accumulates */ 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 += ((q15_t) x3 * c0); 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 += ((q15_t) x0 * c0); 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 += ((q15_t) x1 * c0); 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc3 += ((q15_t) x2 * c0); 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* update coefficient pointer */ 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pb += 4U; 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** px += 4U; 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Decrement loop counter */ 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** tapCnt--; 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* If the filter length is not a multiple of 4, compute the remaining filter taps */ 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** tapCnt = numTaps % 0x4U; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (tapCnt > 0U) ARM GAS /tmp/ccJrAs6S.s page 1213 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Read coefficients */ 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** c0 = *(pb++); 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Fetch 1 state variable */ 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** x3 = *(px++); 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Perform the multiply-accumulates */ 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 += ((q15_t) x0 * c0); 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 += ((q15_t) x1 * c0); 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 += ((q15_t) x2 * c0); 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc3 += ((q15_t) x3 * c0); 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Reuse the present sample states for next sample */ 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** x0 = x1; 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** x1 = x2; 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** x2 = x3; 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Decrement loop counter */ 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** tapCnt--; 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* The results in the 4 accumulators are in 2.62 format. Convert to 1.31 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** Then store the 4 outputs in the destination buffer. */ 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = __SSAT((acc0 >> 7U), 8); 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pDst++ = acc0; 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc1 = __SSAT((acc1 >> 7U), 8); 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pDst++ = acc1; 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc2 = __SSAT((acc2 >> 7U), 8); 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pDst++ = acc2; 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc3 = __SSAT((acc3 >> 7U), 8); 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pDst++ = acc3; 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Advance the state pointer by 4 to process the next group of 4 samples */ 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pState = pState + 4U; 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Decrement loop counter */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt--; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Loop unrolling: Compute remaining output samples */ 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt = blockSize % 0x4U; 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** #else 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Initialize blkCnt with number of taps */ 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt = blockSize; 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (blkCnt > 0U) 28045 .loc 75 669 0 28046 0010 0293 str r3, [sp, #8] 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** q7_t *pStateCurnt; /* Points to the current sample of the state 28047 .loc 75 491 0 28048 0012 D0E901C0 ldrd ip, r0, [r0, #4] 28049 .LVL4530: ARM GAS /tmp/ccJrAs6S.s page 1214 28050 .loc 75 669 0 28051 0016 002B cmp r3, #0 28052 0018 00F0AD80 beq .L2181 28053 001c A8F10209 sub r9, r8, #2 28054 0020 E144 add r9, r9, ip 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 28055 .loc 75 490 0 28056 0022 E646 mov lr, ip 28057 0024 CDF80CC0 str ip, [sp, #12] 28058 0028 01EB030B add fp, r1, r3 28059 002c 8446 mov ip, r0 28060 .LVL4531: 28061 .L2171: 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Copy one sample at a time into state buffer */ 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pStateCurnt++ = *pSrc++; 28062 .loc 75 672 0 28063 002e 11F9013B ldrsb r3, [r1], #1 28064 .LVL4532: 28065 0032 09F8013F strb r3, [r9, #1]! 28066 .LVL4533: 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Set the accumulator to zero */ 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 = 0; 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Initialize state pointer */ 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** px = pState; 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Initialize Coefficient pointer */ 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pb = pCoeffs; 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** i = numTaps; 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Perform the multiply-accumulates */ 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (i > 0U) 28067 .loc 75 686 0 28068 0036 B8F1000F cmp r8, #0 28069 003a 00F08B80 beq .L2182 28070 003e 0EEB0807 add r7, lr, r8 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 28071 .loc 75 681 0 28072 0042 6446 mov r4, ip 28073 .loc 75 686 0 28074 0044 7346 mov r3, lr 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 28075 .loc 75 675 0 28076 0046 0020 movs r0, #0 28077 .LVL4534: 28078 .L2170: 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** acc0 += (q15_t) * (px++) * (*(pb++)); 28079 .loc 75 688 0 28080 0048 13F9016B ldrsb r6, [r3], #1 28081 .LVL4535: 28082 004c 14F9015B ldrsb r5, [r4], #1 28083 .LVL4536: 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { ARM GAS /tmp/ccJrAs6S.s page 1215 28084 .loc 75 686 0 28085 0050 BB42 cmp r3, r7 28086 .loc 75 688 0 28087 0052 16FB0500 smlabb r0, r6, r5, r0 28088 .LVL4537: 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28089 .loc 75 686 0 28090 0056 F7D1 bne .L2170 28091 0058 C011 asrs r0, r0, #7 28092 .LVL4538: 28093 .L2169: 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28094 .loc 75 669 0 28095 005a 5945 cmp r1, fp 28096 .LBB2306: 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** i--; 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* The result is in 2.14 format. Convert to 1.7 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** Then store the output in the destination buffer. */ 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pDst++ = __SSAT((acc0 >> 7U), 8); 28097 .loc 75 694 0 28098 .syntax unified 28099 @ 694 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c" 1 28100 005c 00F30700 ssat r0, #8, r0 28101 @ 0 "" 2 28102 .LVL4539: 28103 .thumb 28104 .syntax unified 28105 .LBE2306: 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Advance state pointer by 1 for the next sample */ 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pState = pState + 1U; 28106 .loc 75 697 0 28107 0060 0EF1010E add lr, lr, #1 28108 .LVL4540: 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 28109 .loc 75 694 0 28110 0064 02F8010B strb r0, [r2], #1 28111 .LVL4541: 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28112 .loc 75 669 0 28113 0068 E1D1 bne .L2171 28114 006a DDE9023C ldrd r3, ip, [sp, #8] 28115 .LVL4542: 28116 006e 9C44 add ip, ip, r3 28117 0070 019B ldr r3, [sp, #4] 28118 0072 5A68 ldr r2, [r3, #4] 28119 .LVL4543: 28120 .L2168: 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Decrement loop counter */ 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** blkCnt--; 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Processing is complete. 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** Now copy the last numTaps - 1 samples to the start of the state buffer. ARM GAS /tmp/ccJrAs6S.s page 1216 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** This prepares the state buffer for the next function call. */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Points to the start of the state buffer */ 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** pStateCurnt = S->pState; 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Loop unrolling: Compute 4 taps at a time */ 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** tapCnt = (numTaps - 1U) >> 2U; 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Copy data */ 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (tapCnt > 0U) 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pStateCurnt++ = *pState++; 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pStateCurnt++ = *pState++; 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pStateCurnt++ = *pState++; 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pStateCurnt++ = *pState++; 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Decrement loop counter */ 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** tapCnt--; 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Calculate remaining number of copies */ 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** tapCnt = (numTaps - 1U) % 0x4U; 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** #else 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Initialize tapCnt with number of taps */ 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** tapCnt = (numTaps - 1U); 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Copy remaining data */ 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** while (tapCnt > 0U) 28121 .loc 75 738 0 28122 0074 BAF1000F cmp r10, #0 28123 0078 69D0 beq .L2167 28124 007a 0CF10403 add r3, ip, #4 28125 007e 111D adds r1, r2, #4 28126 .LVL4544: 28127 0080 8C45 cmp ip, r1 28128 0082 38BF it cc 28129 0084 9A42 cmpcc r2, r3 28130 0086 6BD3 bcc .L2173 28131 0088 BAF10B0F cmp r10, #11 28132 008c 68D9 bls .L2173 28133 008e CCF10003 rsb r3, ip, #0 28134 0092 03F00303 and r3, r3, #3 28135 0096 D91C adds r1, r3, #3 28136 0098 A8F10200 sub r0, r8, #2 28137 009c 8842 cmp r0, r1 28138 009e 35D3 bcc .L2174 28139 00a0 002B cmp r3, #0 28140 00a2 59D0 beq .L2183 28141 .LVL4545: 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** *pStateCurnt++ = *pState++; ARM GAS /tmp/ccJrAs6S.s page 1217 28142 .loc 75 740 0 28143 00a4 9CF90010 ldrsb r1, [ip] 28144 00a8 1170 strb r1, [r2] 28145 00aa 012B cmp r3, #1 28146 00ac 0CF10105 add r5, ip, #1 28147 .LVL4546: 28148 00b0 02F10104 add r4, r2, #1 28149 .LVL4547: 28150 00b4 12D0 beq .L2175 28151 .LVL4548: 28152 00b6 9CF90110 ldrsb r1, [ip, #1] 28153 00ba 5170 strb r1, [r2, #1] 28154 00bc 032B cmp r3, #3 28155 00be 0CF10205 add r5, ip, #2 28156 .LVL4549: 28157 00c2 02F10204 add r4, r2, #2 28158 .LVL4550: 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** /* Decrement the loop counter */ 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** tapCnt--; 28159 .loc 75 743 0 28160 00c6 A8F10300 sub r0, r8, #3 28161 .LVL4551: 28162 00ca 07D1 bne .L2175 28163 .LVL4552: 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 28164 .loc 75 740 0 28165 00cc 9CF90210 ldrsb r1, [ip, #2] 28166 00d0 9170 strb r1, [r2, #2] 28167 .loc 75 743 0 28168 00d2 A8F10400 sub r0, r8, #4 28169 .LVL4553: 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 28170 .loc 75 740 0 28171 00d6 0CF10305 add r5, ip, #3 28172 .LVL4554: 28173 00da D41C adds r4, r2, #3 28174 .LVL4555: 28175 .L2175: 28176 00dc AAEB0306 sub r6, r10, r3 28177 00e0 311F subs r1, r6, #4 28178 00e2 8908 lsrs r1, r1, #2 28179 00e4 9C44 add ip, ip, r3 28180 00e6 0131 adds r1, r1, #1 28181 00e8 1344 add r3, r3, r2 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28182 .loc 75 738 0 28183 00ea 0022 movs r2, #0 28184 .L2177: 28185 00ec 0132 adds r2, r2, #1 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 28186 .loc 75 740 0 28187 00ee 5CF8047B ldr r7, [ip], #4 28188 00f2 43F8047B str r7, [r3], #4 @ unaligned 28189 00f6 9142 cmp r1, r2 28190 00f8 F8D8 bhi .L2177 28191 00fa 8900 lsls r1, r1, #2 ARM GAS /tmp/ccJrAs6S.s page 1218 28192 00fc 8E42 cmp r6, r1 28193 00fe 05EB010C add ip, r5, r1 28194 0102 04EB0102 add r2, r4, r1 28195 0106 A0EB010A sub r10, r0, r1 28196 010a 20D0 beq .L2167 28197 .L2174: 28198 .LVL4556: 28199 010c 9CF90030 ldrsb r3, [ip] 28200 0110 1370 strb r3, [r2] 28201 .LVL4557: 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28202 .loc 75 738 0 28203 0112 BAF1010F cmp r10, #1 28204 0116 1AD0 beq .L2167 28205 .LVL4558: 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 28206 .loc 75 740 0 28207 0118 9CF90130 ldrsb r3, [ip, #1] 28208 011c 5370 strb r3, [r2, #1] 28209 .LVL4559: 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28210 .loc 75 738 0 28211 011e BAF1020F cmp r10, #2 28212 0122 14D0 beq .L2167 28213 .LVL4560: 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 28214 .loc 75 740 0 28215 0124 9CF90230 ldrsb r3, [ip, #2] 28216 0128 9370 strb r3, [r2, #2] 28217 .LVL4561: 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28218 .loc 75 738 0 28219 012a BAF1030F cmp r10, #3 28220 012e 0ED0 beq .L2167 28221 .LVL4562: 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 28222 .loc 75 740 0 28223 0130 9CF90330 ldrsb r3, [ip, #3] 28224 0134 D370 strb r3, [r2, #3] 28225 .LVL4563: 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28226 .loc 75 738 0 28227 0136 BAF1040F cmp r10, #4 28228 013a 08D0 beq .L2167 28229 .LVL4564: 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 28230 .loc 75 740 0 28231 013c 9CF90430 ldrsb r3, [ip, #4] 28232 0140 1371 strb r3, [r2, #4] 28233 .LVL4565: 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28234 .loc 75 738 0 28235 0142 BAF1050F cmp r10, #5 28236 0146 02D0 beq .L2167 28237 .LVL4566: 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 28238 .loc 75 740 0 ARM GAS /tmp/ccJrAs6S.s page 1219 28239 0148 9CF90530 ldrsb r3, [ip, #5] 28240 014c 5371 strb r3, [r2, #5] 28241 .LVL4567: 28242 .L2167: 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** } 28243 .loc 75 746 0 28244 014e 05B0 add sp, sp, #20 28245 .LCFI211: 28246 .cfi_remember_state 28247 .cfi_def_cfa_offset 36 28248 @ sp needed 28249 0150 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 28250 .LVL4568: 28251 .L2182: 28252 .LCFI212: 28253 .cfi_restore_state 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28254 .loc 75 686 0 28255 0154 4046 mov r0, r8 28256 0156 80E7 b .L2169 28257 .LVL4569: 28258 .L2183: 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28259 .loc 75 738 0 28260 0158 5046 mov r0, r10 28261 015a 1446 mov r4, r2 28262 015c 6546 mov r5, ip 28263 015e BDE7 b .L2175 28264 .L2173: 28265 0160 531E subs r3, r2, #1 28266 0162 E244 add r10, r10, ip 28267 .LVL4570: 28268 .L2179: 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** 28269 .loc 75 740 0 28270 0164 1CF9012B ldrsb r2, [ip], #1 28271 .LVL4571: 28272 0168 03F8012F strb r2, [r3, #1]! 28273 .LVL4572: 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { 28274 .loc 75 738 0 28275 016c D445 cmp ip, r10 28276 016e F9D1 bne .L2179 28277 .loc 75 746 0 28278 0170 05B0 add sp, sp, #20 28279 .LCFI213: 28280 .cfi_remember_state 28281 .cfi_def_cfa_offset 36 28282 @ sp needed 28283 0172 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 28284 .LVL4573: 28285 .L2181: 28286 .LCFI214: 28287 .cfi_restore_state 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c **** { ARM GAS /tmp/ccJrAs6S.s page 1220 28288 .loc 75 669 0 28289 0176 6246 mov r2, ip 28290 .LVL4574: 28291 0178 7CE7 b .L2168 28292 .cfi_endproc 28293 .LFE220: 28295 017a 00BF .section .text.arm_fir_sparse_f32,"ax",%progbits 28296 .align 1 28297 .p2align 2,,3 28298 .global arm_fir_sparse_f32 28299 .syntax unified 28300 .thumb 28301 .thumb_func 28302 .fpu fpv4-sp-d16 28304 arm_fir_sparse_f32: 28305 .LFB221: 28306 .file 76 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * Title: arm_fir_sparse_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * Description: Floating-point sparse FIR filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** This group of functions implements sparse FIR filters. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients ar 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** Sparse filters are used for simulating reflections in communications and audio applications. ARM GAS /tmp/ccJrAs6S.s page 1221 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** There are separate functions for Q7, Q15, Q31, and floating-point data types. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** The functions operate on blocks of input and output data and each call to the function processes 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blockSize samples through the filter. pSrc and 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** pDst points to input and output arrays respectively containing blockSizepTapD 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** This is in addition to the coefficient array b. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** The implementation essentially skips the multiplications by zero and leads to an 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c ****       y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ 
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @par 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** \image html FIRSparse.gif "Sparse FIR filter. b[n] represents the filter coeffi 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @par 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** pCoeffs points to a coefficient array of size numTaps; 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** pTapDelay points to an array of nonzero indices and is also of size 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** pState points to a state array of size maxDelay + blockSizemaxDelay is the largest offset value that is ever used in the 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay}; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay}; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay}; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** arm_fir_sparse_instance_q7 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay}; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @par Fixed-Point Behavior 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** Care must be taken when using the fixed-point versions of the sparse FIR filter 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** In particular, the overflow and saturation behavior of the accumulator used in e 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** Refer to the function specific documentation below for usage guidelines. 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @addtogroup FIR_Sparse 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @{ ARM GAS /tmp/ccJrAs6S.s page 1222 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @brief Processing function for the floating-point sparse FIR filter. 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @param[in] S points to an instance of the floating-point sparse FIR structure 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @param[in] pSrc points to the block of input data 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @param[out] pDst points to the block of output data 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @param[in] pScratchIn points to a temporary buffer of size blockSize 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @param[in] blockSize number of input samples to process 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** @return none 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** void arm_fir_sparse_f32( 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** arm_fir_sparse_instance_f32 * S, 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** const float32_t * pSrc, 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** float32_t * pDst, 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** float32_t * pScratchIn, 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** uint32_t blockSize) 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 28307 .loc 76 116 0 28308 .cfi_startproc 28309 @ args = 4, pretend = 0, frame = 8 28310 @ frame_needed = 0, uses_anonymous_args = 0 28311 .LVL4575: 28312 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 28313 .LCFI215: 28314 .cfi_def_cfa_offset 36 28315 .cfi_offset 4, -36 28316 .cfi_offset 5, -32 28317 .cfi_offset 6, -28 28318 .cfi_offset 7, -24 28319 .cfi_offset 8, -20 28320 .cfi_offset 9, -16 28321 .cfi_offset 10, -12 28322 .cfi_offset 11, -8 28323 .cfi_offset 14, -4 28324 0004 83B0 sub sp, sp, #12 28325 .LCFI216: 28326 .cfi_def_cfa_offset 48 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** float32_t *pState = S->pState; /* State pointer */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 28327 .loc 76 118 0 28328 0006 D0F808E0 ldr lr, [r0, #8] 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** float32_t *pState = S->pState; /* State pointer */ 28329 .loc 76 116 0 28330 000a 0C9F ldr r7, [sp, #48] 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** float32_t *px; /* Scratch buffer pointer */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** float32_t *py = pState; /* Temporary pointers for state buffer */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** float32_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** float32_t *pOut; /* Destination pointer */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** uint32_t delaySize = S->maxDelay + blockSize; /* state length */ 28331 .loc 76 124 0 28332 000c 8489 ldrh r4, [r0, #12] 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 28333 .loc 76 125 0 28334 000e 0588 ldrh r5, [r0] ARM GAS /tmp/ccJrAs6S.s page 1223 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** int32_t readIndex; /* Read index of the state buffer */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** uint32_t tapCnt, blkCnt; /* loop counters */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** float32_t coeff = *pCoeffs++; /* Read the first coefficient value */ 28335 .loc 76 128 0 28336 0010 9EED007A vldr.32 s14, [lr] 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 28337 .loc 76 117 0 28338 0014 4668 ldr r6, [r0, #4] 28339 .LVL4576: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** uint32_t delaySize = S->maxDelay + blockSize; /* state length */ 28340 .loc 76 123 0 28341 0016 D0F81080 ldr r8, [r0, #16] 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** int32_t readIndex; /* Read index of the state buffer */ 28342 .loc 76 125 0 28343 001a 0195 str r5, [sp, #4] 28344 .LBB2307: 28345 .LBB2308: 1203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type. 1207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t arm_recip_q31( 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t in, 1210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * dst, 1211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pRecipTable) 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t out; 1214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t tempVal; 1215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t index, i; 1216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t signBits; 1217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (in > 0) 1219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** signBits = ((uint32_t) (__CLZ( in) - 1)); 1221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 1223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** signBits = ((uint32_t) (__CLZ(-in) - 1)); 1225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Convert input sample to 1.31 format */ 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** in = (in << signBits); 1229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* calculation of index for initial approximated Val */ 1231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (uint32_t)(in >> 24); 1232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (index & INDEX_MASK); 1233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31 with exp 1 */ 1235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = pRecipTable[index]; 1236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* calculation of reciprocal value */ 1238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* running approximation for two iterations */ 1239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** for (i = 0U; i < 2U; i++) 1240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = (uint32_t) (((q63_t) in * out) >> 31); 1242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = 0x7FFFFFFFu - tempVal; ARM GAS /tmp/ccJrAs6S.s page 1224 1243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31 with exp 1 */ 1244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */ 1245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30); 1246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* write output */ 1249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *dst = out; 1250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return num of signbits of out = 1/in value */ 1252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (signBits + 1U); 1253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type. 1258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t arm_recip_q15( 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t in, 1261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * dst, 1262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pRecipTable) 1263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t out = 0; 1265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t tempVal = 0; 1266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t index = 0, i = 0; 1267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t signBits = 0; 1268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (in > 0) 1270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** signBits = ((uint32_t)(__CLZ( in) - 17)); 1272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 1274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** signBits = ((uint32_t)(__CLZ(-in) - 17)); 1276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Convert input sample to 1.15 format */ 1279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** in = (in << signBits); 1280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* calculation of index for initial approximated Val */ 1282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (uint32_t)(in >> 8); 1283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (index & INDEX_MASK); 1284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.15 with exp 1 */ 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = pRecipTable[index]; 1287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* calculation of reciprocal value */ 1289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* running approximation for two iterations */ 1290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** for (i = 0U; i < 2U; i++) 1291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = (uint32_t) (((q31_t) in * out) >> 15); 1293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = 0x7FFFu - tempVal; 1294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.15 with exp 1 */ 1295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = (q15_t) (((q31_t) out * tempVal) >> 14); 1296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */ 1297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* write output */ ARM GAS /tmp/ccJrAs6S.s page 1225 1300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *dst = out; 1301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return num of signbits of out = 1/in value */ 1303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (signBits + 1); 1304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Integer exponentiation 1308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x value 1309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nb integer exponent >= 1 1310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return x^nb 1311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 1312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_INLINE float32_t arm_exponent_f32(float32_t x, int32_t nb) 1314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t r = x; 1316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** nb --; 1317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while(nb > 0) 1318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = r * x; 1320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** nb--; 1321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return(r); 1323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit to 32-bit unsigned normalization 1327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] in is input unsigned long long value 1328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] normalized is the 32-bit normalized value 1329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] norm is norm scale 1330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_INLINE void arm_norm_64_to_32u(uint64_t in, int32_t * normalized, int32_t *norm) 1332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t n1; 1334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t hi = (int32_t) (in >> 32); 1335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t lo = (int32_t) ((in << 32) >> 32); 1336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** n1 = __CLZ(hi) - 32; 1338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (!n1) 1339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * input fits in 32-bit 1342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** n1 = __CLZ(lo); 1344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (!n1) 1345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * MSB set, need to scale down by 1 1348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *norm = -1; 1350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *normalized = (((uint32_t) lo) >> 1); 1351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } else 1352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (n1 == 32) 1354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * input is zero ARM GAS /tmp/ccJrAs6S.s page 1226 1357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *norm = 0; 1359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *normalized = 0; 1360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } else 1361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 32-bit normalization 1364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *norm = n1 - 1; 1366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *normalized = lo << *norm; 1367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } else 1370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * input fits in 64-bit 1373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** n1 = 1 - n1; 1375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *norm = -n1; 1376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 64 bit normalization 1378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *normalized = (((uint32_t) lo) >> n1) | (hi << (32 - n1)); 1380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) 1384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t result; 1386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint64_t absNum; 1387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t normalized; 1388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t norm; 1389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * if sum fits in 32bits 1392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * avoid costly 64-bit division 1393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** absNum = num > 0 ? num : -num; 1395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_norm_64_to_32u(absNum, &normalized, &norm); 1396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (norm > 0) 1397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 32-bit division 1399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** result = (q31_t) num / den; 1401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 1402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 64-bit division 1404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** result = (q31_t) (num / den); 1406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return result; 1408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined intrinsic functions 1413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccJrAs6S.s page 1227 1414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if !defined (ARM_MATH_DSP) 1415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QADD8 1418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __QADD8( 1420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s, t, u; 1424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; 1426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; 1427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** t = __SSAT(((((q31_t)x << 8) >> 24) + (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; 1428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** u = __SSAT(((((q31_t)x ) >> 24) + (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; 1429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); 1431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QSUB8 1436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __QSUB8( 1438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s, t, u; 1442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; 1444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; 1445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** t = __SSAT(((((q31_t)x << 8) >> 24) - (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; 1446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** u = __SSAT(((((q31_t)x ) >> 24) - (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; 1447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); 1449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QADD16 1454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __QADD16( 1456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* q31_t r, s; without initialisation 'arm_offset_q15 test' fails but 'intrinsic' tests pass 1460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r = 0, s = 0; 1461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; 1463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; 1464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SHADD16 ARM GAS /tmp/ccJrAs6S.s page 1228 1471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SHADD16( 1473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = (((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QSUB16 1487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __QSUB16( 1489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; 1495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; 1496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SHSUB16 1503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SHSUB16( 1505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = (((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QASX 1519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __QASX( 1521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; 1527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; ARM GAS /tmp/ccJrAs6S.s page 1229 1528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SHASX 1535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SHASX( 1537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = (((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = (((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QSAX 1551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __QSAX( 1553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; 1559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; 1560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SHSAX 1567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SHSAX( 1569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = (((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = (((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMUSDX 1583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMUSDX( ARM GAS /tmp/ccJrAs6S.s page 1230 1585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - 1589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) )); 1590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMUADX 1594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMUADX( 1596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + 1600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) )); 1601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QADD 1606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE int32_t __QADD( 1608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t x, 1609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t y) 1610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y))); 1612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QSUB 1617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE int32_t __QSUB( 1619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t x, 1620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t y) 1621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y))); 1623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMLAD 1628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMLAD( 1630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y, 1632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t sum) 1633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + 1635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) + 1636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ( ((q31_t)sum ) ) )); 1637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMLADX ARM GAS /tmp/ccJrAs6S.s page 1231 1642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMLADX( 1644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y, 1646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t sum) 1647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + 1649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + 1650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ( ((q31_t)sum ) ) )); 1651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMLSDX 1656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMLSDX( 1658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y, 1660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t sum) 1661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - 1663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + 1664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ( ((q31_t)sum ) ) )); 1665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMLALD 1670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint64_t __SMLALD( 1672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y, 1674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint64_t sum) 1675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */ 1677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + 1678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) + 1679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ( ((q63_t)sum ) ) )); 1680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMLALDX 1685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint64_t __SMLALDX( 1687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y, 1689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint64_t sum) 1690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */ 1692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + 1693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + 1694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ( ((q63_t)sum ) ) )); 1695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* ARM GAS /tmp/ccJrAs6S.s page 1232 1699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMUAD 1700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMUAD( 1702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + 1706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) )); 1707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMUSD 1712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMUSD( 1714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) - 1718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) )); 1719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SXTB16 1724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SXTB16( 1726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x) 1727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) | 1729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x << 8) >> 8) & (q31_t)0xFFFF0000) )); 1730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMMLA 1734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE int32_t __SMMLA( 1736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t x, 1737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t y, 1738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t sum) 1739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (sum + (int32_t) (((int64_t) x * y) >> 32)); 1741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif /* !defined (ARM_MATH_DSP) */ 1744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q7 FIR filter. 1748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of filter coefficients in the filter. */ 1752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t *pState; /**< points to the state variable array. The array is of length 1753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t *pCoeffs; /**< points to the coefficient array. The array is of length num 1754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_instance_q7; 1755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 1233 1756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 FIR filter. 1758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of filter coefficients in the filter. */ 1762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t *pState; /**< points to the state variable array. The array is of length 1763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length nu 1764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_instance_q15; 1765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 FIR filter. 1768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of filter coefficients in the filter. */ 1772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t *pState; /**< points to the state variable array. The array is of length 1773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length nu 1774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_instance_q31; 1775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point FIR filter. 1778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of filter coefficients in the filter. */ 1782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pState; /**< points to the state variable array. The array is of length num 1783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTap 1784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_instance_f32; 1785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q7 FIR filter. 1788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q7 FIR filter structure. 1789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 1790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_q7( 1794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_instance_q7 * S, 1795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 1796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 1797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q7 FIR filter. 1801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q7 FIR structure. 1802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numTaps Number of filter coefficients in the filter. 1803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 1804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 1805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples that are processed. 1806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_init_q7( 1808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_fir_instance_q7 * S, 1809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps, 1810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pCoeffs, 1811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pState, 1812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); ARM GAS /tmp/ccJrAs6S.s page 1234 1813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q15 FIR filter. 1816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q15 FIR structure. 1817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 1818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_q15( 1822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_instance_q15 * S, 1823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 1824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 1825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the fast Q15 FIR filter (fast version). 1829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q15 FIR filter structure. 1830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 1831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_fast_q15( 1835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_instance_q15 * S, 1836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 1837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 1838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q15 FIR filter. 1842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q15 FIR filter structure. 1843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greate 1844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 1845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 1846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples that are processed at a time. 1847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 1848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SUCCESS if initialization was successful or 1849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_ARGUMENT_ERROR if numTaps is not a supported value. 1850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_fir_init_q15( 1852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_fir_instance_q15 * S, 1853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps, 1854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pCoeffs, 1855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pState, 1856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q31 FIR filter. 1860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 FIR filter structure. 1861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 1862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_q31( 1866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_instance_q31 * S, 1867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 1868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 1869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); ARM GAS /tmp/ccJrAs6S.s page 1235 1870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the fast Q31 FIR filter (fast version). 1873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 FIR filter structure. 1874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 1875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_fast_q31( 1879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_instance_q31 * S, 1880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 1881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 1882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q31 FIR filter. 1886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q31 FIR structure. 1887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numTaps Number of filter coefficients in the filter. 1888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 1889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 1890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples that are processed at a time. 1891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_init_q31( 1893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_fir_instance_q31 * S, 1894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps, 1895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pCoeffs, 1896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pState, 1897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the floating-point FIR filter. 1901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the floating-point FIR structure. 1902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 1903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_f32( 1907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_instance_f32 * S, 1908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 1909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 1910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the floating-point FIR filter. 1914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the floating-point FIR filter structure. 1915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numTaps Number of filter coefficients in the filter. 1916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 1917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 1918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples that are processed at a time. 1919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_init_f32( 1921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_fir_instance_f32 * S, 1922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps, 1923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pCoeffs, 1924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pState, 1925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 1236 1927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 Biquad cascade filter. 1929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 1933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t *pState; /**< Points to the array of state coefficients. The array is of 1934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of lengt 1935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t postShift; /**< Additional shift, in bits, applied to each output sample. * 1936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_biquad_casd_df1_inst_q15; 1937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 Biquad cascade filter. 1940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 1944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t *pState; /**< Points to the array of state coefficients. The array is of 1945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of lengt 1946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. * 1947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_biquad_casd_df1_inst_q31; 1948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point Biquad cascade filter. 1951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 1955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pState; /**< Points to the array of state coefficients. The array is of 1956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of lengt 1957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_biquad_casd_df1_inst_f32; 1958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 1960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the modified Biquad coefs required by vectorized code. 1962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t coeffs[8][4]; /**< Points to the array of modified coefficients. The array is of l 1966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_biquad_mod_coef_f32; 1967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q15 Biquad cascade filter. 1971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q15 Biquad cascade structure. 1972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 1973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_q15( 1977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_biquad_casd_df1_inst_q15 * S, 1978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 1979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 1980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q15 Biquad cascade filter. ARM GAS /tmp/ccJrAs6S.s page 1237 1984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q15 Biquad cascade structure. 1985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numStages number of 2nd order stages in the filter. 1986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 1987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 1988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] postShift Shift to be applied to the output. Varies according to the coefficie 1989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_init_q15( 1991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_biquad_casd_df1_inst_q15 * S, 1992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t numStages, 1993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pCoeffs, 1994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pState, 1995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t postShift); 1996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex- 1999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q15 Biquad cascade structure. 2000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 2001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 2002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 2003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_fast_q15( 2005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_biquad_casd_df1_inst_q15 * S, 2006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 2007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 2008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q31 Biquad cascade filter 2012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 Biquad cascade structure. 2013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 2014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 2015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 2016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_q31( 2018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_biquad_casd_df1_inst_q31 * S, 2019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 2020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 2021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex- 2025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 Biquad cascade structure. 2026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 2027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 2028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 2029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_fast_q31( 2031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_biquad_casd_df1_inst_q31 * S, 2032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 2033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 2034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q31 Biquad cascade filter. 2038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q31 Biquad cascade structure. 2039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numStages number of 2nd order stages in the filter. 2040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. ARM GAS /tmp/ccJrAs6S.s page 1238 2041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 2042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] postShift Shift to be applied to the output. Varies according to the coefficie 2043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_init_q31( 2045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_biquad_casd_df1_inst_q31 * S, 2046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t numStages, 2047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pCoeffs, 2048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pState, 2049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t postShift); 2050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the floating-point Biquad cascade filter. 2053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the floating-point Biquad cascade structure. 2054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 2055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 2056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 2057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_f32( 2059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_biquad_casd_df1_inst_f32 * S, 2060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 2061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 2062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the floating-point Biquad cascade filter. 2066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the floating-point Biquad cascade structure 2067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numStages number of 2nd order stages in the filter. 2068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 2069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffsMod points to the modified filter coefficients (only MVE version). 2070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 2071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 2073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_mve_init_f32( 2074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_biquad_casd_df1_inst_f32 * S, 2075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t numStages, 2076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pCoeffs, 2077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_biquad_mod_coef_f32 * pCoeffsMod, 2078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pState); 2079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 2080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_init_f32( 2082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_biquad_casd_df1_inst_f32 * S, 2083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t numStages, 2084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pCoeffs, 2085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pState); 2086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise AND of two fixed-point vectors. 2090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_and_u16( 2097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrcA, ARM GAS /tmp/ccJrAs6S.s page 1239 2098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrcB, 2099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t * pDst, 2100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise AND of two fixed-point vectors. 2104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_and_u32( 2111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrcA, 2112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrcB, 2113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t * pDst, 2114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise AND of two fixed-point vectors. 2118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_and_u8( 2125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrcA, 2126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrcB, 2127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t * pDst, 2128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise OR of two fixed-point vectors. 2132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_or_u16( 2139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrcA, 2140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrcB, 2141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t * pDst, 2142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise OR of two fixed-point vectors. 2146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_or_u32( 2153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrcA, 2154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrcB, ARM GAS /tmp/ccJrAs6S.s page 1240 2155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t * pDst, 2156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise OR of two fixed-point vectors. 2160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_or_u8( 2167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrcA, 2168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrcB, 2169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t * pDst, 2170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise NOT of a fixed-point vector. 2174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to input vector 2175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_not_u16( 2180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrc, 2181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t * pDst, 2182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise NOT of a fixed-point vector. 2186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to input vector 2187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_not_u32( 2192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrc, 2193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t * pDst, 2194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise NOT of a fixed-point vector. 2198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to input vector 2199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_not_u8( 2204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrc, 2205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t * pDst, 2206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise XOR of two fixed-point vectors. 2210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B ARM GAS /tmp/ccJrAs6S.s page 1241 2212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_xor_u16( 2217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrcA, 2218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrcB, 2219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t * pDst, 2220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise XOR of two fixed-point vectors. 2224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_xor_u32( 2231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrcA, 2232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrcB, 2233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t * pDst, 2234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise XOR of two fixed-point vectors. 2238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_xor_u8( 2245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrcA, 2246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrcB, 2247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t * pDst, 2248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Struct for specifying sorting algorithm 2252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum 2254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_BITONIC = 0, 2256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Bitonic sort */ 2257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_BUBBLE = 1, 2258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Bubble sort */ 2259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_HEAP = 2, 2260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Heap sort */ 2261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_INSERTION = 3, 2262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Insertion sort */ 2263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_QUICK = 4, 2264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Quick sort */ 2265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_SELECTION = 5 2266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Selection sort */ 2267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_sort_alg; 2268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 1242 2269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Struct for specifying sorting algorithm 2271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum 2273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_DESCENDING = 0, 2275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Descending order (9 to 0) */ 2276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_ASCENDING = 1 2277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Ascending order (0 to 9) */ 2278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_sort_dir; 2279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the sorting algorithms. 2282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_alg alg; /**< Sorting algorithm selected */ 2286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_dir dir; /**< Sorting order (direction) */ 2287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_sort_instance_f32; 2288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the sorting structure. 2291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 2292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 2293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 2294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_sort_f32( 2296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_sort_instance_f32 * S, 2297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pSrc, 2298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 2299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the sorting structure. 2303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] alg Selected algorithm. 2304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] dir Sorting order. 2305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_sort_init_f32( 2307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_instance_f32 * S, 2308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_alg alg, 2309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_dir dir); 2310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the sorting algorithms. 2313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_dir dir; /**< Sorting order (direction) */ 2317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * buffer; /**< Working buffer */ 2318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_merge_sort_instance_f32; 2319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the sorting structure. 2322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] pSrc points to the block of input data. 2323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 2324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 2325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccJrAs6S.s page 1243 2326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_merge_sort_f32( 2327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_merge_sort_instance_f32 * S, 2328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pSrc, 2329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pDst, 2330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the sorting structure. 2334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] dir Sorting order. 2335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] buffer Working buffer. 2336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_merge_sort_init_f32( 2338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_merge_sort_instance_f32 * S, 2339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_dir dir, 2340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * buffer); 2341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Struct for specifying cubic spline type 2344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum 2346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SPLINE_NATURAL = 0, /**< Natural spline */ 2348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SPLINE_PARABOLIC_RUNOUT = 1 /**< Parabolic runout spline */ 2349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_spline_type; 2350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point cubic spline interpolation. 2353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_spline_type type; /**< Type (boundary conditions) */ 2357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * x; /**< x values */ 2358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * y; /**< y values */ 2359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t n_x; /**< Number of known data points */ 2360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * coeffs; /**< Coefficients buffer (b,c, and d) */ 2361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_spline_instance_f32; 2362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the floating-point cubic spline interpolation. 2365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the floating-point spline structure. 2366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] xq points to the x values ot the interpolated data points. 2367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 2368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples of output data. 2369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_spline_f32( 2371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_spline_instance_f32 * S, 2372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * xq, 2373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 2374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the floating-point cubic spline interpolation. 2378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the floating-point spline structure. 2379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] type type of cubic spline interpolation (boundary conditions) 2380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x points to the x values of the known data points. 2381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] y points to the y values of the known data points. 2382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] n number of known data points. ARM GAS /tmp/ccJrAs6S.s page 1244 2383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] coeffs coefficients array for b, c, and d 2384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] tempBuffer buffer array for internal computations 2385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_spline_init_f32( 2387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_spline_instance_f32 * S, 2388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_spline_type type, 2389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * x, 2390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * y, 2391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t n, 2392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * coeffs, 2393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * tempBuffer); 2394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point matrix structure. 2397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows of the matrix. */ 2401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns of the matrix. */ 2402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pData; /**< points to the data of the matrix. */ 2403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_matrix_instance_f32; 2404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point matrix structure. 2407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows of the matrix. */ 2411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns of the matrix. */ 2412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float64_t *pData; /**< points to the data of the matrix. */ 2413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_matrix_instance_f64; 2414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 matrix structure. 2417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows of the matrix. */ 2421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns of the matrix. */ 2422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t *pData; /**< points to the data of the matrix. */ 2423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_matrix_instance_q15; 2424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 matrix structure. 2427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows of the matrix. */ 2431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns of the matrix. */ 2432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t *pData; /**< points to the data of the matrix. */ 2433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_matrix_instance_q31; 2434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix addition. 2437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure ARM GAS /tmp/ccJrAs6S.s page 1245 2440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_add_f32( 2444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcA, 2445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcB, 2446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * pDst); 2447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix addition. 2450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_add_q15( 2457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcA, 2458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcB, 2459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst); 2460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix addition. 2463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_add_q31( 2470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcA, 2471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcB, 2472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point, complex, matrix multiplication. 2476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_cmplx_mult_f32( 2483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcA, 2484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcB, 2485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * pDst); 2486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15, complex, matrix multiplication. 2489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_cmplx_mult_q15( 2496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcA, ARM GAS /tmp/ccJrAs6S.s page 1246 2497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcB, 2498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst, 2499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch); 2500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31, complex, matrix multiplication. 2503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_cmplx_mult_q31( 2510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcA, 2511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcB, 2512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix transpose. 2516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input matrix 2517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output matrix 2518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either ARM_MATH_SIZE_MISMATCH 2519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * or ARM_MATH_SUCCESS based on the outcome of size checking. 2520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_trans_f32( 2522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrc, 2523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * pDst); 2524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix transpose. 2527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input matrix 2528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output matrix 2529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either ARM_MATH_SIZE_MISMATCH 2530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * or ARM_MATH_SUCCESS based on the outcome of size checking. 2531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_trans_q15( 2533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrc, 2534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst); 2535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix transpose. 2538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input matrix 2539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output matrix 2540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either ARM_MATH_SIZE_MISMATCH 2541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * or ARM_MATH_SUCCESS based on the outcome of size checking. 2542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_trans_q31( 2544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrc, 2545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix multiplication 2549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s ARM GAS /tmp/ccJrAs6S.s page 1247 2554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_mult_f32( 2556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcA, 2557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcB, 2558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * pDst); 2559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix multiplication 2562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the array for storing intermediate results 2566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_mult_q15( 2570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcA, 2571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcB, 2572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst, 2573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pState); 2574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 2577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the array for storing intermediate results 2581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_mult_fast_q15( 2585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcA, 2586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcB, 2587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst, 2588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pState); 2589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix multiplication 2592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_mult_q31( 2599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcA, 2600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcB, 2601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 2605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccJrAs6S.s page 1248 2611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_mult_fast_q31( 2612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcA, 2613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcB, 2614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix subtraction 2618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_sub_f32( 2625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcA, 2626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcB, 2627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * pDst); 2628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix subtraction 2631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_sub_q15( 2638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcA, 2639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcB, 2640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst); 2641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix subtraction 2644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_sub_q31( 2651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcA, 2652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcB, 2653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix scaling. 2657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input matrix 2658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scale scale factor 2659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output matrix 2660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_scale_f32( 2664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrc, 2665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t scale, 2666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * pDst); 2667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 1249 2668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix scaling. 2670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to input matrix 2671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scaleFract fractional portion of the scale factor 2672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shift number of bits to shift the result by 2673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix 2674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_scale_q15( 2678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrc, 2679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t scaleFract, 2680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t shift, 2681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst); 2682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix scaling. 2685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to input matrix 2686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scaleFract fractional portion of the scale factor 2687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shift number of bits to shift the result by 2688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_scale_q31( 2693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrc, 2694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t scaleFract, 2695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t shift, 2696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix initialization. 2700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the floating-point matrix structure. 2701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nRows number of rows in the matrix. 2702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nColumns number of columns in the matrix. 2703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pData points to the matrix data array. 2704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mat_init_q31( 2706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * S, 2707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t nRows, 2708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t nColumns, 2709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pData); 2710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix initialization. 2713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the floating-point matrix structure. 2714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nRows number of rows in the matrix. 2715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nColumns number of columns in the matrix. 2716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pData points to the matrix data array. 2717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mat_init_q15( 2719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * S, 2720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t nRows, 2721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t nColumns, 2722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pData); 2723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** ARM GAS /tmp/ccJrAs6S.s page 1250 2725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix initialization. 2726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the floating-point matrix structure. 2727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nRows number of rows in the matrix. 2728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nColumns number of columns in the matrix. 2729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pData points to the matrix data array. 2730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mat_init_f32( 2732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * S, 2733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t nRows, 2734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t nColumns, 2735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pData); 2736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 PID Control. 2740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ 2744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if !defined (ARM_MATH_DSP) 2745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t A1; 2746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t A2; 2747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/ 2749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 2750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t state[3]; /**< The state array of length 3. */ 2751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t Kp; /**< The proportional gain. */ 2752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t Ki; /**< The integral gain. */ 2753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t Kd; /**< The derivative gain. */ 2754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_pid_instance_q15; 2755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 PID Control. 2758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ 2762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */ 2763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t A2; /**< The derived gain, A2 = Kd . */ 2764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t state[3]; /**< The state array of length 3. */ 2765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Kp; /**< The proportional gain. */ 2766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ki; /**< The integral gain. */ 2767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Kd; /**< The derivative gain. */ 2768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_pid_instance_q31; 2769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point PID Control. 2772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ 2776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */ 2777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t A2; /**< The derived gain, A2 = Kd . */ 2778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t state[3]; /**< The state array of length 3. */ 2779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Kp; /**< The proportional gain. */ 2780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ki; /**< The integral gain. */ 2781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Kd; /**< The derivative gain. */ ARM GAS /tmp/ccJrAs6S.s page 1251 2782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_pid_instance_f32; 2783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the floating-point PID Control. 2788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the PID structure. 2789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the s 2790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_pid_init_f32( 2792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_f32 * S, 2793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t resetStateFlag); 2794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Reset function for the floating-point PID Control. 2798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S is an instance of the floating-point PID Control structure 2799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_pid_reset_f32( 2801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_f32 * S); 2802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q31 PID Control. 2806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q15 PID structure. 2807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the s 2808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_pid_init_q31( 2810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_q31 * S, 2811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t resetStateFlag); 2812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Reset function for the Q31 PID Control. 2816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q31 PID Control structure 2817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_pid_reset_q31( 2820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_q31 * S); 2821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q15 PID Control. 2825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q15 PID structure. 2826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the s 2827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_pid_init_q15( 2829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_q15 * S, 2830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t resetStateFlag); 2831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Reset function for the Q15 PID Control. 2835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the q15 PID Control structure 2836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_pid_reset_q15( 2838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_q15 * S); ARM GAS /tmp/ccJrAs6S.s page 1252 2839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point Linear Interpolate function. 2843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t nValues; /**< nValues */ 2847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t x1; /**< x1 */ 2848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t xSpacing; /**< xSpacing */ 2849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pYData; /**< pointer to the table of Y values */ 2850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_linear_interp_instance_f32; 2851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point bilinear interpolation function. 2854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows in the data table. */ 2858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns in the data table. */ 2859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pData; /**< points to the data table. */ 2860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_bilinear_interp_instance_f32; 2861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 bilinear interpolation function. 2864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows in the data table. */ 2868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns in the data table. */ 2869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t *pData; /**< points to the data table. */ 2870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_bilinear_interp_instance_q31; 2871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 bilinear interpolation function. 2874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows in the data table. */ 2878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns in the data table. */ 2879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t *pData; /**< points to the data table. */ 2880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_bilinear_interp_instance_q15; 2881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 bilinear interpolation function. 2884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows in the data table. */ 2888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns in the data table. */ 2889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t *pData; /**< points to the data table. */ 2890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_bilinear_interp_instance_q7; 2891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q7 vector multiplication. 2895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector ARM GAS /tmp/ccJrAs6S.s page 1253 2896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 2897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 2898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mult_q7( 2901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 2902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 2903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 2904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 vector multiplication. 2909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 2910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 2911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 2912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mult_q15( 2915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 2916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 2917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 2918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 vector multiplication. 2923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 2924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 2925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 2926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mult_q31( 2929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 2930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 2931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 2932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point vector multiplication. 2937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 2938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 2939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 2940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mult_f32( 2943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcA, 2944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcB, 2945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 2946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 CFFT/CIFFT function. 2951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct ARM GAS /tmp/ccJrAs6S.s page 1254 2953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 2955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse ( 2956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (b 2957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pTwiddle; /**< points to the Sin twiddle factor table. */ 2958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 2959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports differen 2960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevFactor; /**< bit reversal modifier that supports different size 2961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_radix2_instance_q15; 2962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 2964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_radix2_init_q15( 2965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix2_instance_q15 * S, 2966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen, 2967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 2968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 2969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 2971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_radix2_q15( 2972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_radix2_instance_q15 * S, 2973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pSrc); 2974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 CFFT/CIFFT function. 2978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 2982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse ( 2983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (b 2984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pTwiddle; /**< points to the twiddle factor table. */ 2985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 2986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports differen 2987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevFactor; /**< bit reversal modifier that supports different size 2988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_radix4_instance_q15; 2989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 2991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_radix4_init_q15( 2992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_q15 * S, 2993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen, 2994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 2995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 2996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 2998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_radix4_q15( 2999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_radix4_instance_q15 * S, 3000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pSrc); 3001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function. 3004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse ( 3009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (b ARM GAS /tmp/ccJrAs6S.s page 1255 3010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pTwiddle; /**< points to the Twiddle factor table. */ 3011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports differen 3013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevFactor; /**< bit reversal modifier that supports different size 3014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_radix2_instance_q31; 3015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_radix2_init_q31( 3018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix2_instance_q31 * S, 3019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen, 3020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_radix2_q31( 3025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_radix2_instance_q31 * S, 3026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pSrc); 3027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 CFFT/CIFFT function. 3030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse ( 3035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (b 3036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pTwiddle; /**< points to the twiddle factor table. */ 3037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports differen 3039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevFactor; /**< bit reversal modifier that supports different size 3040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_radix4_instance_q31; 3041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_radix4_q31( 3044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_radix4_instance_q31 * S, 3045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pSrc); 3046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_radix4_init_q31( 3049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_q31 * S, 3050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen, 3051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point CFFT/CIFFT function. 3056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse 3061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables 3062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pTwiddle; /**< points to the Twiddle factor table. */ 3063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports differ 3065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevFactor; /**< bit reversal modifier that supports different siz 3066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t onebyfftLen; /**< value of 1/fftLen. */ ARM GAS /tmp/ccJrAs6S.s page 1256 3067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_radix2_instance_f32; 3068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_radix2_init_f32( 3071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix2_instance_f32 * S, 3072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen, 3073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_radix2_f32( 3078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_radix2_instance_f32 * S, 3079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pSrc); 3080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point CFFT/CIFFT function. 3083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse 3088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables 3089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pTwiddle; /**< points to the Twiddle factor table. */ 3090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports differ 3092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevFactor; /**< bit reversal modifier that supports different siz 3093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t onebyfftLen; /**< value of 1/fftLen. */ 3094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_radix4_instance_f32; 3095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_radix4_init_f32( 3098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_f32 * S, 3099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen, 3100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_radix4_f32( 3105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_radix4_instance_f32 * S, 3106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pSrc); 3107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the fixed-point CFFT/CIFFT function. 3110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pTwiddle; /**< points to the Twiddle factor table. */ 3115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevLength; /**< bit reversal table length. */ 3117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEI) 3118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle poin 3119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle poin 3120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle poin 3121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ 3122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ 3123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *rearranged_twiddle_stride3; ARM GAS /tmp/ccJrAs6S.s page 1257 3124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 3125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_instance_q15; 3126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_init_q15( 3128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_q15 * S, 3129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen); 3130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_q15( 3132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_instance_q15 * S, 3133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * p1, 3134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the fixed-point CFFT/CIFFT function. 3139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pTwiddle; /**< points to the Twiddle factor table. */ 3144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevLength; /**< bit reversal table length. */ 3146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEI) 3147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle poin 3148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle poin 3149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle poin 3150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ 3151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ 3152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *rearranged_twiddle_stride3; 3153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 3154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_instance_q31; 3155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_init_q31( 3157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_q31 * S, 3158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen); 3159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_q31( 3161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_instance_q31 * S, 3162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * p1, 3163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point CFFT/CIFFT function. 3168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pTwiddle; /**< points to the Twiddle factor table. */ 3173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevLength; /**< bit reversal table length. */ 3175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 3176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle poin 3177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle poin 3178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle poin 3179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ 3180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ ARM GAS /tmp/ccJrAs6S.s page 1258 3181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *rearranged_twiddle_stride3; 3182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 3183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_instance_f32; 3184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_init_f32( 3187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_f32 * S, 3188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen); 3189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_f32( 3191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_instance_f32 * S, 3192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * p1, 3193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Double Precision Floating-point CFFT/CIFFT function. 3199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float64_t *pTwiddle; /**< points to the Twiddle factor table. */ 3204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevLength; /**< bit reversal table length. */ 3206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_instance_f64; 3207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_f64( 3209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_instance_f64 * S, 3210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float64_t * p1, 3211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 RFFT/RIFFT function. 3216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t fftLenReal; /**< length of the real FFT. */ 3220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or 3221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or d 3222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports 3223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. * 3224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. * 3225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEI) 3226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_q15 cfftInst; 3227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_instance_q15 *pCfft; /**< points to the complex FFT instance. */ 3229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 3230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_rfft_instance_q15; 3231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_rfft_init_q15( 3233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_q15 * S, 3234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t fftLenReal, 3235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t ifftFlagR, 3236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t bitReverseFlag); 3237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 1259 3238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_rfft_q15( 3239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_rfft_instance_q15 * S, 3240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pSrc, 3241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst); 3242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 RFFT/RIFFT function. 3245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t fftLenReal; /**< length of the real FFT. */ 3249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) 3250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or 3251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that suppor 3252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. 3253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. 3254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEI) 3255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_q31 cfftInst; 3256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_instance_q31 *pCfft; /**< points to the complex FFT instance. */ 3258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 3259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_rfft_instance_q31; 3260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_rfft_init_q31( 3262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_q31 * S, 3263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t fftLenReal, 3264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t ifftFlagR, 3265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t bitReverseFlag); 3266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_rfft_q31( 3268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_rfft_instance_q31 * S, 3269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pSrc, 3270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst); 3271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point RFFT/RIFFT function. 3274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t fftLenReal; /**< length of the real FFT. */ 3278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLenBy2; /**< length of the complex FFT. */ 3279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) 3280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or 3281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that su 3282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. 3283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. 3284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */ 3285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_rfft_instance_f32; 3286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_rfft_init_f32( 3288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_f32 * S, 3289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_f32 * S_CFFT, 3290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t fftLenReal, 3291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t ifftFlagR, 3292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t bitReverseFlag); 3293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_rfft_f32( ARM GAS /tmp/ccJrAs6S.s page 1260 3295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_rfft_instance_f32 * S, 3296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pSrc, 3297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst); 3298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Double Precision Floating-point RFFT/RIFFT function. 3301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_f64 Sint; /**< Internal CFFT structure. */ 3305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLenRFFT; /**< length of the real sequence */ 3306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float64_t * pTwiddleRFFT; /**< Twiddle factors real stage */ 3307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_rfft_fast_instance_f64 ; 3308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_rfft_fast_init_f64 ( 3310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_fast_instance_f64 * S, 3311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen); 3312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_rfft_fast_f64( 3315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_fast_instance_f64 * S, 3316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float64_t * p, float64_t * pOut, 3317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag); 3318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point RFFT/RIFFT function. 3322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_f32 Sint; /**< Internal CFFT structure. */ 3326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLenRFFT; /**< length of the real sequence */ 3327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pTwiddleRFFT; /**< Twiddle factors real stage */ 3328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_rfft_fast_instance_f32 ; 3329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_rfft_fast_init_f32 ( 3331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_fast_instance_f32 * S, 3332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen); 3333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_rfft_fast_f32( 3336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_rfft_fast_instance_f32 * S, 3337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * p, float32_t * pOut, 3338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag); 3339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point DCT4/IDCT4 function. 3342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t N; /**< length of the DCT4. */ 3346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t Nby2; /**< half of the length of the DCT4. */ 3347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t normalize; /**< normalizing factor. */ 3348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pTwiddle; /**< points to the twiddle factor table. */ 3349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pCosFactor; /**< points to the cosFactor table. */ 3350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */ 3351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */ ARM GAS /tmp/ccJrAs6S.s page 1261 3352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_dct4_instance_f32; 3353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the floating-point DCT4/IDCT4. 3357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of floating-point DCT4/IDCT4 structure. 3358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S_RFFT points to an instance of floating-point RFFT/RIFFT structure. 3359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S_CFFT points to an instance of floating-point CFFT/CIFFT structure. 3360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] N length of the DCT4. 3361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Nby2 half of the length of the DCT4. 3362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] normalize normalizing factor. 3363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or A 3364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_dct4_init_f32( 3366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_dct4_instance_f32 * S, 3367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_f32 * S_RFFT, 3368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_f32 * S_CFFT, 3369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t N, 3370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t Nby2, 3371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t normalize); 3372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the floating-point DCT4/IDCT4. 3376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the floating-point DCT4/IDCT4 structure 3377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to state buffer. 3378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] pInlineBuffer points to the in-place input and output buffer. 3379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dct4_f32( 3381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_dct4_instance_f32 * S, 3382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pState, 3383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pInlineBuffer); 3384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 DCT4/IDCT4 function. 3388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t N; /**< length of the DCT4. */ 3392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t Nby2; /**< half of the length of the DCT4. */ 3393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t normalize; /**< normalizing factor. */ 3394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pTwiddle; /**< points to the twiddle factor table. */ 3395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pCosFactor; /**< points to the cosFactor table. */ 3396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */ 3397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */ 3398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_dct4_instance_q31; 3399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q31 DCT4/IDCT4. 3403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of Q31 DCT4/IDCT4 structure. 3404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S_RFFT points to an instance of Q31 RFFT/RIFFT structure 3405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S_CFFT points to an instance of Q31 CFFT/CIFFT structure 3406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] N length of the DCT4. 3407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Nby2 half of the length of the DCT4. 3408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] normalize normalizing factor. ARM GAS /tmp/ccJrAs6S.s page 1262 3409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or A 3410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_dct4_init_q31( 3412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_dct4_instance_q31 * S, 3413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_q31 * S_RFFT, 3414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_q31 * S_CFFT, 3415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t N, 3416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t Nby2, 3417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t normalize); 3418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q31 DCT4/IDCT4. 3422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 DCT4 structure. 3423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to state buffer. 3424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] pInlineBuffer points to the in-place input and output buffer. 3425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dct4_q31( 3427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_dct4_instance_q31 * S, 3428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pState, 3429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pInlineBuffer); 3430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 DCT4/IDCT4 function. 3434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t N; /**< length of the DCT4. */ 3438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t Nby2; /**< half of the length of the DCT4. */ 3439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t normalize; /**< normalizing factor. */ 3440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pTwiddle; /**< points to the twiddle factor table. */ 3441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pCosFactor; /**< points to the cosFactor table. */ 3442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */ 3443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */ 3444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_dct4_instance_q15; 3445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q15 DCT4/IDCT4. 3449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of Q15 DCT4/IDCT4 structure. 3450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S_RFFT points to an instance of Q15 RFFT/RIFFT structure. 3451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S_CFFT points to an instance of Q15 CFFT/CIFFT structure. 3452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] N length of the DCT4. 3453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Nby2 half of the length of the DCT4. 3454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] normalize normalizing factor. 3455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or A 3456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_dct4_init_q15( 3458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_dct4_instance_q15 * S, 3459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_q15 * S_RFFT, 3460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_q15 * S_CFFT, 3461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t N, 3462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t Nby2, 3463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t normalize); 3464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 1263 3466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q15 DCT4/IDCT4. 3468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q15 DCT4 structure. 3469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to state buffer. 3470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] pInlineBuffer points to the in-place input and output buffer. 3471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dct4_q15( 3473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_dct4_instance_q15 * S, 3474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pState, 3475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pInlineBuffer); 3476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point vector addition. 3480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_add_f32( 3486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcA, 3487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcB, 3488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q7 vector addition. 3494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_add_q7( 3500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 3501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 3502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 vector addition. 3508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_add_q15( 3514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 3515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 3516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 vector addition. 3522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector ARM GAS /tmp/ccJrAs6S.s page 1264 3523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_add_q31( 3528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 3529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 3530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point vector subtraction. 3536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_sub_f32( 3542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcA, 3543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcB, 3544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q7 vector subtraction. 3550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_sub_q7( 3556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 3557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 3558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 vector subtraction. 3564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_sub_q15( 3570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 3571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 3572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 vector subtraction. 3578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector ARM GAS /tmp/ccJrAs6S.s page 1265 3580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_sub_q31( 3584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 3585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 3586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Multiplies a floating-point vector by a scalar. 3592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scale scale factor to be applied 3594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_scale_f32( 3598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 3599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t scale, 3600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Multiplies a Q7 vector by a scalar. 3606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scaleFract fractional portion of the scale value 3608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shift number of bits to shift the result by 3609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_scale_q7( 3613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 3614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t scaleFract, 3615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t shift, 3616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Multiplies a Q15 vector by a scalar. 3622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scaleFract fractional portion of the scale value 3624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shift number of bits to shift the result by 3625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_scale_q15( 3629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 3630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t scaleFract, 3631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t shift, 3632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** ARM GAS /tmp/ccJrAs6S.s page 1266 3637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Multiplies a Q31 vector by a scalar. 3638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scaleFract fractional portion of the scale value 3640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shift number of bits to shift the result by 3641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_scale_q31( 3645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 3646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t scaleFract, 3647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t shift, 3648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q7 vector absolute value. 3654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input buffer 3655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output buffer 3656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_abs_q7( 3659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 3660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point vector absolute value. 3666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input buffer 3667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output buffer 3668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_abs_f32( 3671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 3672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 vector absolute value. 3678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input buffer 3679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output buffer 3680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_abs_q15( 3683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 3684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 vector absolute value. 3690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input buffer 3691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output buffer 3692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccJrAs6S.s page 1267 3694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_abs_q31( 3695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 3696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Dot product of floating-point vectors. 3702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] result output result returned here 3706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dot_prod_f32( 3708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcA, 3709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcB, 3710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize, 3711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * result); 3712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Dot product of Q7 vectors. 3716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] result output result returned here 3720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dot_prod_q7( 3722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 3723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 3724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize, 3725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * result); 3726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Dot product of Q15 vectors. 3730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] result output result returned here 3734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dot_prod_q15( 3736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 3737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 3738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize, 3739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t * result); 3740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Dot product of Q31 vectors. 3744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] result output result returned here 3748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dot_prod_q31( 3750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, ARM GAS /tmp/ccJrAs6S.s page 1268 3751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 3752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize, 3753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t * result); 3754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Shifts the elements of a Q7 vector a specified number of bits. 3758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative valu 3760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_shift_q7( 3764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 3765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t shiftBits, 3766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Shifts the elements of a Q15 vector a specified number of bits. 3772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative valu 3774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_shift_q15( 3778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 3779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t shiftBits, 3780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Shifts the elements of a Q31 vector a specified number of bits. 3786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative valu 3788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_shift_q31( 3792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 3793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t shiftBits, 3794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Adds a constant offset to a floating-point vector. 3800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] offset is the offset to be added 3802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_offset_f32( 3806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 3807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t offset, ARM GAS /tmp/ccJrAs6S.s page 1269 3808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Adds a constant offset to a Q7 vector. 3814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] offset is the offset to be added 3816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_offset_q7( 3820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 3821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t offset, 3822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Adds a constant offset to a Q15 vector. 3828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] offset is the offset to be added 3830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_offset_q15( 3834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 3835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t offset, 3836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Adds a constant offset to a Q31 vector. 3842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] offset is the offset to be added 3844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_offset_q31( 3848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 3849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t offset, 3850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Negates the elements of a floating-point vector. 3856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_negate_f32( 3861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 3862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 1270 3865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Negates the elements of a Q7 vector. 3868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_negate_q7( 3873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 3874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Negates the elements of a Q15 vector. 3880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_negate_q15( 3885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 3886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Negates the elements of a Q31 vector. 3892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_negate_q31( 3897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 3898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Copies the elements of a floating-point vector. 3904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc input pointer 3905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_copy_f32( 3909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 3910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Copies the elements of a Q7 vector. 3916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc input pointer 3917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_copy_q7( 3921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, ARM GAS /tmp/ccJrAs6S.s page 1271 3922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Copies the elements of a Q15 vector. 3928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc input pointer 3929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_copy_q15( 3933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 3934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Copies the elements of a Q31 vector. 3940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc input pointer 3941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_copy_q31( 3945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 3946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fills a constant value into a floating-point vector. 3952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] value input value to be filled 3953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fill_f32( 3957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t value, 3958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fills a constant value into a Q7 vector. 3964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] value input value to be filled 3965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fill_q7( 3969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t value, 3970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fills a constant value into a Q15 vector. 3976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] value input value to be filled 3977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process ARM GAS /tmp/ccJrAs6S.s page 1272 3979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fill_q15( 3981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t value, 3982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fills a constant value into a Q31 vector. 3988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] value input value to be filled 3989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fill_q31( 3993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value, 3994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of floating-point sequences. 4000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the location where the output result is written. Length srcALen+ 4005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_f32( 4007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcA, 4008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcB, 4010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst); 4012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q15 sequences. 4016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, 4022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). 4023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_opt_q15( 4025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch1, 4031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch2); 4032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q15 sequences. ARM GAS /tmp/ccJrAs6S.s page 1273 4036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the location where the output result is written. Length srcALen+ 4041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_q15( 4043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst); 4048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 4052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_fast_q15( 4059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst); 4064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 4068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, 4074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). 4075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_fast_opt_q15( 4077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch1, 4083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch2); 4084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q31 sequences. 4088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. ARM GAS /tmp/ccJrAs6S.s page 1274 4093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_q31( 4095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 4096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 4098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst); 4100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 4104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_fast_q31( 4111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 4112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 4114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst); 4116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q7 sequences. 4120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 4126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). 4127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_opt_q7( 4129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 4130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 4132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 4134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch1, 4135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch2); 4136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q7 sequences. 4140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_q7( 4147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 4148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, ARM GAS /tmp/ccJrAs6S.s page 1275 4150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst); 4152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of floating-point sequences. 4156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_f32( 4166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcA, 4167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcB, 4169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 4171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints); 4173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q15 sequences. 4177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen 4185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). 4186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_opt_q15( 4189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints, 4196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch1, 4197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch2); 4198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q15 sequences. 4202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data ARM GAS /tmp/ccJrAs6S.s page 1276 4207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_q15( 4212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints); 4219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 4223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_fast_q15( 4233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints); 4240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 4244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen 4252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). 4253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_fast_opt_q15( 4256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints, 4263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch1, ARM GAS /tmp/ccJrAs6S.s page 1277 4264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch2); 4265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q31 sequences. 4269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_q31( 4279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 4280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 4282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 4284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints); 4286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 4290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_fast_q31( 4300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 4301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 4303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 4305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints); 4307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q7 sequences 4311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) 4319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen) 4320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM ARM GAS /tmp/ccJrAs6S.s page 1278 4321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_opt_q7( 4323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 4324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 4326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 4328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints, 4330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch1, 4331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch2); 4332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q7 sequences. 4336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_q7( 4346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 4347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 4349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 4351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints); 4353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 FIR decimator. 4357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 4359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 4360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t M; /**< decimation factor. */ 4361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of coefficients in the filter. */ 4362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length 4363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t *pState; /**< points to the state variable array. The array is of leng 4364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_decimate_instance_q15; 4365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 FIR decimator. 4368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 4370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 4371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t M; /**< decimation factor. */ 4372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of coefficients in the filter. */ 4373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length 4374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t *pState; /**< points to the state variable array. The array is of leng 4375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_decimate_instance_q31; 4376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** ARM GAS /tmp/ccJrAs6S.s page 1279 4378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Instance structure for floating-point FIR decimator. 4379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 4381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 4382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t M; /**< decimation factor. */ 4383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of coefficients in the filter. */ 4384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length 4385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pState; /**< points to the state variable array. The array is of leng 4386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_decimate_instance_f32; 4387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Processing function for floating-point FIR decimator. 4391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] S points to an instance of the floating-point FIR decimator structure 4392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pSrc points to the block of input data 4393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pDst points to the block of output data 4394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] blockSize number of samples to process 4395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_decimate_f32( 4397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_decimate_instance_f32 * S, 4398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 4399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 4400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 4401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Initialization function for the floating-point FIR decimator. 4405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in,out] S points to an instance of the floating-point FIR decimator structure 4406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] numTaps number of coefficients in the filter 4407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] M decimation factor 4408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pCoeffs points to the filter coefficients 4409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pState points to the state buffer 4410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] blockSize number of input samples to process per call 4411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return execution status 4412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** - \ref ARM_MATH_SUCCESS : Operation successful 4413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of blockSize is not a multiple of M. 4462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_fir_decimate_init_q15( 4464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_fir_decimate_instance_q15 * S, 4465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps, 4466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t M, 4467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pCoeffs, 4468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pState, 4469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 4470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q31 FIR decimator. 4474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 FIR decimator structure. 4475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 4476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of input samples to process per call. 4478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_decimate_q31( 4480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_decimate_instance_q31 * S, 4481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 4482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 4483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 4484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M 4487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 FIR decimator structure. 4488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 4489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of input samples to process per call. 4491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccJrAs6S.s page 1281 4492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_decimate_fast_q31( 4493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_decimate_instance_q31 * S, 4494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 4495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 4496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 4497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q31 FIR decimator. 4501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q31 FIR decimator structure. 4502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numTaps number of coefficients in the filter. 4503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] M decimation factor. 4504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 4505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 4506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of input samples to process per call. 4507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_L 4508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * blockSize is not a multiple of M. 4509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_fir_decimate_init_q31( 4511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_fir_decimate_instance_q31 * S, 4512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps, 4513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t M, 4514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pCoeffs, 4515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pState, 4516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 4517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 FIR interpolator. 4521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 4523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 4524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t L; /**< upsample factor. */ 4525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t phaseLength; /**< length of each polyphase filter component. */ 4526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pCoeffs; /**< points to the coefficient array. The array is of lengt 4527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t *pState; /**< points to the state variable array. The array is of le 4528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_interpolate_instance_q15; 4529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 FIR interpolator. 4532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 4534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 4535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t L; /**< upsample factor. */ 4536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t phaseLength; /**< length of each polyphase filter component. */ 4537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pCoeffs; /**< points to the coefficient array. The array is of lengt 4538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t *pState; /**< points to the state variable array. The array is of le 4539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_interpolate_instance_q31; 4540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point FIR interpolator. 4543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 4545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 4546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t L; /**< upsample factor. */ 4547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t phaseLength; /**< length of each polyphase filter component. */ 4548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length ARM GAS /tmp/ccJrAs6S.s page 1282 4549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pState; /**< points to the state variable array. The array is of len 4550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_interpolate_instance_f32; 4551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q15 FIR interpolator. 4555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q15 FIR interpolator structure. 4556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 4557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 4558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of input samples to process per call. 4559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_interpolate_q15( 4561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_interpolate_instance_q15 * S, 4562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 4563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 4565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q15 FIR interpolator. 4569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q15 FIR interpolator structure. 4570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] L upsample factor. 4571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numTaps number of filter coefficients in the filter. 4572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficient buffer. 4573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 4574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of input samples to process per call. 4575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MA 4576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the filter length numTaps is not a multiple of the interpolation factor LnumTaps is not a multiple of the interpolation factor LnumTaps is not a multiple of the interpolation factor LS points to an instance of the PID control data structure. in 5833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * is the input sample value. The functions return the output value. 5834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Algorithm: 5836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
5837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
5838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *    A0 = Kp + Ki + Kd
5839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *    A1 = (-Kp ) - (2 * Kd )
5840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *    A2 = Kd
5841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *
5842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 5844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative const 5845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 5847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html PID.gif "Proportional Integral Derivative Controller" 5848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 5850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The PID controller calculates an "error" value as the difference between 5851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the measured output and the reference input. 5852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The controller attempts to minimize the error by adjusting the process control inputs. 5853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The proportional value determines the reaction to the current error, 5854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the integral value determines the reaction based on the sum of recent errors, 5855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and the derivative value determines the reaction based on the rate at which the error has been 5856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Instance Structure 5858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instan 5859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * A separate instance structure must be defined for each PID Controller. ARM GAS /tmp/ccJrAs6S.s page 1305 5860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are separate instance structure declarations for each of the 3 supported data types. 5861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Reset Functions 5863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is also an associated reset function for each data type which clears the state array. 5864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Initialization Functions 5866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is also an associated initialization function for each data type. 5867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The initialization function performs the following operations: 5868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains. 5869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Zeros out the values in the state buffer. 5870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 5872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Instance structure cannot be placed into a const data section and it is recommended to use the 5873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Fixed-Point Behavior 5875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Care must be taken when using the fixed-point versions of the PID Controller functions. 5876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In particular, the overflow and saturation behavior of the accumulator used in each function m 5877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to the function specific documentation below for usage guidelines. 5878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 5879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 5881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @addtogroup PID 5882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @{ 5883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 5884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 5886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Process function for the floating-point PID Control. 5887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S is an instance of the floating-point PID Control structure 5888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] in input sample to process 5889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return processed output sample. 5890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 5891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE float32_t arm_pid_f32( 5892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_f32 * S, 5893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t in) 5894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 5895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t out; 5896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2] */ 5898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = (S->A0 * in) + 5899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]); 5900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update state */ 5902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[1] = S->state[0]; 5903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[0] = in; 5904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[2] = out; 5905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return to application */ 5907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (out); 5908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 5910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 5912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Process function for the Q31 PID Control. 5913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in,out] S points to an instance of the Q31 PID Control structure 5914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] in input sample to process 5915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return processed output sample. 5916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 1306 5917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \par Scaling and Overflow Behavior 5918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The function is implemented using an internal 64-bit accumulator. 5919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The accumulator has a 2.62 format and maintains full precision of the intermediate multipl 5920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** Thus, if the accumulator result overflows it wraps around rather than clip. 5921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** In order to avoid overflows completely the input signal must be scaled down by 2 bits as t 5922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 fo 5923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 5924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t arm_pid_q31( 5925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_q31 * S, 5926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t in) 5927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 5928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t acc; 5929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t out; 5930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc = A0 * x[n] */ 5932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc = (q63_t) S->A0 * in; 5933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc += A1 * x[n-1] */ 5935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc += (q63_t) S->A1 * S->state[0]; 5936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc += A2 * x[n-2] */ 5938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc += (q63_t) S->A2 * S->state[1]; 5939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* convert output to 1.31 format to add y[n-1] */ 5941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = (q31_t) (acc >> 31U); 5942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* out += y[n-1] */ 5944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out += S->state[2]; 5945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update state */ 5947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[1] = S->state[0]; 5948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[0] = in; 5949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[2] = out; 5950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return to application */ 5952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (out); 5953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 5954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 5957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Process function for the Q15 PID Control. 5958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in,out] S points to an instance of the Q15 PID Control structure 5959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] in input sample to process 5960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return processed output sample. 5961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \par Scaling and Overflow Behavior 5963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The function is implemented using a 64-bit internal accumulator. 5964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** Both Gains and state variables are represented in 1.15 format and multiplications yield a 5965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. 5966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** There is no risk of internal overflow with this approach and the full precision of interme 5967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** After all additions have been performed, the accumulator is truncated to 34.15 format by d 5968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** Lastly, the accumulator is saturated to yield a result in 1.15 format. 5969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 5970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q15_t arm_pid_q15( 5971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_q15 * S, 5972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t in) 5973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { ARM GAS /tmp/ccJrAs6S.s page 1307 5974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t acc; 5975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t out; 5976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_DSP) 5978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Implementation of PID controller */ 5979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc = A0 * x[n] */ 5981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in); 5982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc += A1 * x[n-1] + A2 * x[n-2] */ 5984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)read_q15x2 (S->state), (uint64_t)acc); 5985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc = A0 * x[n] */ 5987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc = ((q31_t) S->A0) * in; 5988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc += A1 * x[n-1] + A2 * x[n-2] */ 5990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc += (q31_t) S->A1 * S->state[0]; 5991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc += (q31_t) S->A2 * S->state[1]; 5992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 5993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc += y[n-1] */ 5995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc += (q31_t) S->state[2] << 15; 5996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* saturate the output */ 5998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = (q15_t) (__SSAT((q31_t)(acc >> 15), 16)); 5999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update state */ 6001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[1] = S->state[0]; 6002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[0] = in; 6003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[2] = out; 6004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return to application */ 6006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (out); 6007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of PID group 6011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix inverse. 6016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] src points to the instance of the input floating-point matrix structure. 6017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] dst points to the instance of the output floating-point matrix structure. 6018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. 6019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If the input matrix is singular (does not have an inverse), then the algorithm terminates and 6020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_inverse_f32( 6022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * src, 6023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * dst); 6024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix inverse. 6028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] src points to the instance of the input floating-point matrix structure. 6029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] dst points to the instance of the output floating-point matrix structure. 6030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. ARM GAS /tmp/ccJrAs6S.s page 1308 6031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If the input matrix is singular (does not have an inverse), then the algorithm terminates and 6032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_inverse_f64( 6034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f64 * src, 6035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f64 * dst); 6036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @ingroup groupController 6041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup clarke Vector Clarke Transform 6045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time i 6046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calcula 6047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * in the two-phase orthogonal stator axis Ialpha and Ibeta. 6048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * When Ialpha is superposed with Ia as shown in the figure below 6049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html clarke.gif Stator current space vector and its components in (a,b). 6050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and Ia + Ib + Ic = 0, in this condition Ialpha and IbetaIa and Ib. 6052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The function operates on a single sample of data and each call to the function returns the pro 6054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library provides separate functions for Q31 and floating-point data types. 6055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Algorithm 6056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html clarkeFormula.gif 6057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where Ia and Ib are the instantaneous stator phases and 6058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * pIalpha and pIbeta are the two coordinates of time invariant vector. 6059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Fixed-Point Behavior 6060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Care must be taken when using the Q31 version of the Clarke transform. 6061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In particular, the overflow and saturation behavior of the accumulator used must be considered 6062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to the function specific documentation below for usage guidelines. 6063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @addtogroup clarke 6067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @{ 6068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point Clarke transform 6073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Ia input three-phase coordinate a 6074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Ib input three-phase coordinate b 6075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha 6076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pIbeta points to output two-phase orthogonal vector axis beta 6077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 6078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_clarke_f32( 6080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ia, 6081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ib, 6082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pIalpha, 6083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pIbeta) 6084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pIalpha using the equation, pIalpha = Ia */ 6086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIalpha = Ia; 6087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 1309 6088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */ 6089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib); 6090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Clarke transform for Q31 version 6095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] Ia input three-phase coordinate a 6096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] Ib input three-phase coordinate b 6097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pIalpha points to output two-phase orthogonal vector axis alpha 6098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pIbeta points to output two-phase orthogonal vector axis beta 6099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 6100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \par Scaling and Overflow Behavior 6102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The function is implemented using an internal 32-bit accumulator. 6103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate mult 6104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** There is saturation on the addition, hence there is no risk of overflow. 6105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_clarke_q31( 6107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ia, 6108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ib, 6109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pIalpha, 6110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pIbeta) 6111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t product1, product2; /* Temporary variables used to store intermediate 6113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculating pIalpha from Ia by equation pIalpha = Ia */ 6115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIalpha = Ia; 6116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */ 6118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30); 6119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (2/sqrt(3) * Ib) */ 6121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30); 6122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* pIbeta is calculated by adding the intermediate products */ 6124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIbeta = __QADD(product1, product2); 6125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of clarke group 6129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @ingroup groupController 6134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup inv_clarke Vector Inverse Clarke Transform 6138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous 6139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The function operates on a single sample of data and each call to the function returns the pro 6141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library provides separate functions for Q31 and floating-point data types. 6142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Algorithm 6143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html clarkeInvFormula.gif 6144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where pIa and pIb are the instantaneous stator phases and ARM GAS /tmp/ccJrAs6S.s page 1310 6145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Ialpha and Ibeta are the two coordinates of time invariant vector. 6146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Fixed-Point Behavior 6147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Care must be taken when using the Q31 version of the Clarke transform. 6148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In particular, the overflow and saturation behavior of the accumulator used must be considered 6149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to the function specific documentation below for usage guidelines. 6150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @addtogroup inv_clarke 6154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @{ 6155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point Inverse Clarke transform 6159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Ialpha input two-phase orthogonal vector axis alpha 6160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Ibeta input two-phase orthogonal vector axis beta 6161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pIa points to output three-phase coordinate a 6162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pIb points to output three-phase coordinate b 6163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 6164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_inv_clarke_f32( 6166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ialpha, 6167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ibeta, 6168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pIa, 6169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pIb) 6170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculating pIa from Ialpha by equation pIa = Ialpha */ 6172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIa = Ialpha; 6173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibet 6175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta; 6176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Inverse Clarke transform for Q31 version 6181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] Ialpha input two-phase orthogonal vector axis alpha 6182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] Ibeta input two-phase orthogonal vector axis beta 6183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pIa points to output three-phase coordinate a 6184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pIb points to output three-phase coordinate b 6185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 6186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \par Scaling and Overflow Behavior 6188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The function is implemented using an internal 32-bit accumulator. 6189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate mult 6190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** There is saturation on the subtraction, hence there is no risk of overflow. 6191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_inv_clarke_q31( 6193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ialpha, 6194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ibeta, 6195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pIa, 6196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pIb) 6197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t product1, product2; /* Temporary variables used to store intermediate 6199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculating pIa from Ialpha by equation pIa = Ialpha */ 6201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIa = Ialpha; ARM GAS /tmp/ccJrAs6S.s page 1311 6202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */ 6204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31); 6205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (1/sqrt(3) * pIb) */ 6207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31); 6208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* pIb is calculated by subtracting the products */ 6210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIb = __QSUB(product2, product1); 6211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of inv_clarke group 6215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @ingroup groupController 6221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup park Vector Park Transform 6225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Forward Park transform converts the input two-coordinate vector to flux and torque components. 6227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The Park transform can be used to realize the transformation of the Ialpha and th 6228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * from the stationary to the moving reference frame and control the spatial relationship between 6229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the stator vector current and rotor flux vector. 6230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If we consider the d axis aligned with the rotor flux, the diagram below shows the 6231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * current vector and the relationship from the two reference frames: 6232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q ro 6233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The function operates on a single sample of data and each call to the function returns the pro 6235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library provides separate functions for Q31 and floating-point data types. 6236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Algorithm 6237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html parkFormula.gif 6238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where Ialpha and Ibeta are the stator vector components, 6239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * pId and pIq are rotor vector components and cosVal and 6240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * cosine and sine values of theta (rotor flux position). 6241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Fixed-Point Behavior 6242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Care must be taken when using the Q31 version of the Park transform. 6243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In particular, the overflow and saturation behavior of the accumulator used must be considered 6244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to the function specific documentation below for usage guidelines. 6245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @addtogroup park 6249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @{ 6250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point Park transform 6254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Ialpha input two-phase vector coordinate alpha 6255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Ibeta input two-phase vector coordinate beta 6256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pId points to output rotor reference frame d 6257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pIq points to output rotor reference frame q 6258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] sinVal sine value of rotation angle theta ARM GAS /tmp/ccJrAs6S.s page 1312 6259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] cosVal cosine value of rotation angle theta 6260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 6261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The function implements the forward Park transform. 6263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_park_f32( 6266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ialpha, 6267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ibeta, 6268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pId, 6269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pIq, 6270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t sinVal, 6271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t cosVal) 6272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */ 6274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pId = Ialpha * cosVal + Ibeta * sinVal; 6275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */ 6277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIq = -Ialpha * sinVal + Ibeta * cosVal; 6278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Park transform for Q31 version 6283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] Ialpha input two-phase vector coordinate alpha 6284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] Ibeta input two-phase vector coordinate beta 6285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pId points to output rotor reference frame d 6286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pIq points to output rotor reference frame q 6287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] sinVal sine value of rotation angle theta 6288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] cosVal cosine value of rotation angle theta 6289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 6290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \par Scaling and Overflow Behavior 6292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The function is implemented using an internal 32-bit accumulator. 6293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate mult 6294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** There is saturation on the addition and subtraction, hence there is no risk of overflow. 6295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_park_q31( 6297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ialpha, 6298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ibeta, 6299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pId, 6300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pIq, 6301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t sinVal, 6302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t cosVal) 6303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t product1, product2; /* Temporary variables used to store intermediate 6305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t product3, product4; /* Temporary variables used to store intermediate 6306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Ialpha * cosVal) */ 6308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31); 6309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Ibeta * sinVal) */ 6311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31); 6312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Ialpha * sinVal) */ 6315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31); ARM GAS /tmp/ccJrAs6S.s page 1313 6316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Ibeta * cosVal) */ 6318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31); 6319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pId by adding the two intermediate products 1 and 2 */ 6321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pId = __QADD(product1, product2); 6322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pIq by subtracting the two intermediate products 3 from 4 */ 6324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIq = __QSUB(product4, product3); 6325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of park group 6329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @ingroup groupController 6334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup inv_park Vector Inverse Park transform 6338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Inverse Park transform converts the input flux and torque components to two-coordinate vector. 6339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The function operates on a single sample of data and each call to the function returns the pro 6341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library provides separate functions for Q31 and floating-point data types. 6342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Algorithm 6343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html parkInvFormula.gif 6344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where pIalpha and pIbeta are the stator vector components, 6345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Id and Iq are rotor vector components and cosVal and > 31); 6412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Iq * sinVal) */ 6414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31); 6415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Id * sinVal) */ 6418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31); 6419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Iq * cosVal) */ 6421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31); 6422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pIalpha by using the two intermediate products 1 and 2 */ 6424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIalpha = __QSUB(product1, product2); 6425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pIbeta by using the two intermediate products 3 and 4 */ 6427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIbeta = __QADD(product4, product3); 6428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 1315 6430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of Inverse park group 6432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @ingroup groupInterpolation 6437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup LinearInterpolate Linear Interpolation 6441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Linear interpolation is a method of curve fitting using linear polynomials. 6443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Linear interpolation works by effectively drawing a straight line between two neighboring samp 6444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html LinearInterp.gif "Linear interpolation" 6447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * A Linear Interpolate function calculates an output value(y), for the input(x) 6450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * using linear interpolation of the input values x0, x1( nearest input values) and the output va 6451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Algorithm: 6453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
6454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
6455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *       where x0, x1 are nearest values of input x
6456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *             y0, y1 are nearest values to output y
6457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *
6458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions implements Linear interpolation process 6461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * for Q7, Q15, Q31, and floating-point data types. The functions operate on a single 6462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * sample of data and each call to the function returns a single processed value. 6463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * S points to an instance of the Linear Interpolate function data structure. 6464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * x is the input sample value. The functions returns the output value. 6465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * if x is outside of the table boundary, Linear interpolation returns first value of the table 6468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * if x is below input range and returns last value of table if x is above range. 6469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @addtogroup LinearInterpolate 6473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @{ 6474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Process function for the floating-point Linear Interpolation Function. 6478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S is an instance of the floating-point Linear Interpolation structure 6479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x input sample to process 6480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return y processed output sample. 6481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE float32_t arm_linear_interp_f32( 6484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_linear_interp_instance_f32 * S, 6485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t x) 6486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { ARM GAS /tmp/ccJrAs6S.s page 1316 6487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t y; 6488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t x0, x1; /* Nearest input values */ 6489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t y0, y1; /* Nearest output values */ 6490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t xSpacing = S->xSpacing; /* spacing between input values */ 6491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t i; /* Index variable */ 6492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pYData = S->pYData; /* pointer to output table */ 6493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of index */ 6495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i = (int32_t) ((x - S->x1) / xSpacing); 6496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (i < 0) 6498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Iniatilize output for below specified range as least output value of table */ 6500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y = pYData[0]; 6501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if ((uint32_t)i >= (S->nValues - 1)) 6503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Iniatilize output for above specified range as last output value of table */ 6505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y = pYData[S->nValues - 1]; 6506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 6508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of nearest input values */ 6510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** x0 = S->x1 + i * xSpacing; 6511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** x1 = S->x1 + (i + 1) * xSpacing; 6512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Read of nearest output values */ 6514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y0 = pYData[i]; 6515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y1 = pYData[i + 1]; 6516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of output */ 6518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0)); 6519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* returns output value */ 6523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (y); 6524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Process function for the Q31 Linear Interpolation Function. 6530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pYData pointer to Q31 Linear Interpolation table 6531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x input sample to process 6532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nValues number of table values 6533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return y processed output sample. 6534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Input sample x is in 12.20 format which contains 12 bits for table index and 20 b 6537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This function can support maximum of table size 2^12. 6538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t arm_linear_interp_q31( 6541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pYData, 6542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x, 6543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t nValues) ARM GAS /tmp/ccJrAs6S.s page 1317 6544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t y; /* output */ 6546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t y0, y1; /* Nearest output values */ 6547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t fract; /* fractional part */ 6548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t index; /* Index to read nearest output values */ 6549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Input is in 12.20 format */ 6551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 12 bits for the table index */ 6552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Index value calculation */ 6553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = ((x & (q31_t)0xFFF00000) >> 20); 6554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (index >= (int32_t)(nValues - 1)) 6556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (pYData[nValues - 1]); 6558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (index < 0) 6560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (pYData[0]); 6562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 6564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 20 bits for the fractional part */ 6566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* shift left by 11 to keep fract in 1.31 format */ 6567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** fract = (x & 0x000FFFFF) << 11; 6568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Read two nearest output values from the index in 1.31(q31) format */ 6570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y0 = pYData[index]; 6571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y1 = pYData[index + 1]; 6572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of y0 * (1-fract) and y is in 2.30 format */ 6574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32)); 6575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */ 6577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y += ((q31_t) (((q63_t) y1 * fract) >> 32)); 6578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Convert y to 1.31 format */ 6580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (y << 1U); 6581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Process function for the Q15 Linear Interpolation Function. 6588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pYData pointer to Q15 Linear Interpolation table 6589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x input sample to process 6590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nValues number of table values 6591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return y processed output sample. 6592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Input sample x is in 12.20 format which contains 12 bits for table index and 20 b 6595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This function can support maximum of table size 2^12. 6596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q15_t arm_linear_interp_q15( 6599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pYData, 6600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x, ARM GAS /tmp/ccJrAs6S.s page 1318 6601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t nValues) 6602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t y; /* output */ 6604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t y0, y1; /* Nearest output values */ 6605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t fract; /* fractional part */ 6606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t index; /* Index to read nearest output values */ 6607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Input is in 12.20 format */ 6609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 12 bits for the table index */ 6610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Index value calculation */ 6611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = ((x & (int32_t)0xFFF00000) >> 20); 6612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (index >= (int32_t)(nValues - 1)) 6614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (pYData[nValues - 1]); 6616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (index < 0) 6618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (pYData[0]); 6620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 6622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 20 bits for the fractional part */ 6624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* fract is in 12.20 format */ 6625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** fract = (x & 0x000FFFFF); 6626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Read two nearest output values from the index */ 6628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y0 = pYData[index]; 6629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y1 = pYData[index + 1]; 6630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of y0 * (1-fract) and y is in 13.35 format */ 6632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y = ((q63_t) y0 * (0xFFFFF - fract)); 6633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */ 6635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y += ((q63_t) y1 * (fract)); 6636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* convert y to 1.15 format */ 6638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (q15_t) (y >> 20); 6639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Process function for the Q7 Linear Interpolation Function. 6646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pYData pointer to Q7 Linear Interpolation table 6647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x input sample to process 6648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nValues number of table values 6649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return y processed output sample. 6650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Input sample x is in 12.20 format which contains 12 bits for table index and 20 b 6653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This function can support maximum of table size 2^12. 6654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q7_t arm_linear_interp_q7( 6656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pYData, 6657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x, ARM GAS /tmp/ccJrAs6S.s page 1319 6658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t nValues) 6659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t y; /* output */ 6661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t y0, y1; /* Nearest output values */ 6662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t fract; /* fractional part */ 6663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t index; /* Index to read nearest output values */ 6664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Input is in 12.20 format */ 6666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 12 bits for the table index */ 6667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Index value calculation */ 6668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (x < 0) 6669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (pYData[0]); 6671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (x >> 20) & 0xfff; 6673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (index >= (nValues - 1)) 6675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (pYData[nValues - 1]); 6677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 6679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 20 bits for the fractional part */ 6681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* fract is in 12.20 format */ 6682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** fract = (x & 0x000FFFFF); 6683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Read two nearest output values from the index and are in 1.7(q7) format */ 6685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y0 = pYData[index]; 6686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y1 = pYData[index + 1]; 6687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */ 6689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y = ((y0 * (0xFFFFF - fract))); 6690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */ 6692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y += (y1 * fract); 6693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* convert y to 1.7(q7) format */ 6695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (q7_t) (y >> 20); 6696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of LinearInterpolate group 6701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast approximation to the trigonometric sine function for floating-point data. 6705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x input value in radians. 6706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return sin(x). 6707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t arm_sin_f32( 6709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t x); 6710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast approximation to the trigonometric sine function for Q31 data. 6714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x Scaled input value in radians. ARM GAS /tmp/ccJrAs6S.s page 1320 6715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return sin(x). 6716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t arm_sin_q31( 6718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x); 6719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast approximation to the trigonometric sine function for Q15 data. 6723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x Scaled input value in radians. 6724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return sin(x). 6725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t arm_sin_q15( 6727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t x); 6728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast approximation to the trigonometric cosine function for floating-point data. 6732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x input value in radians. 6733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return cos(x). 6734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t arm_cos_f32( 6736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t x); 6737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast approximation to the trigonometric cosine function for Q31 data. 6741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x Scaled input value in radians. 6742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return cos(x). 6743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t arm_cos_q31( 6745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x); 6746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast approximation to the trigonometric cosine function for Q15 data. 6750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x Scaled input value in radians. 6751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return cos(x). 6752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t arm_cos_q15( 6754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t x); 6755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Floating-point vector of log values. 6759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pSrc points to the input vector 6760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pDst points to the output vector 6761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] blockSize number of samples in each vector 6762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 6763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_vlog_f32( 6765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 6766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 6767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 6768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Floating-point vector of exp values. 6771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pSrc points to the input vector ARM GAS /tmp/ccJrAs6S.s page 1321 6772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pDst points to the output vector 6773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] blockSize number of samples in each vector 6774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 6775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_vexp_f32( 6777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 6778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 6779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 6780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @ingroup groupFastMath 6783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup SQRT Square Root 6788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Computes the square root of a number. 6790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are separate functions for Q15, Q31, and floating-point data types. 6791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The square root function is computed using the Newton-Raphson algorithm. 6792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This is an iterative algorithm of the form: 6793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
6794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *      x1 = x0 - f(x0)/f'(x0)
6795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *
6796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where x1 is the current estimate, 6797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * x0 is the previous estimate, and 6798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * f'(x0) is the derivative of f() evaluated at x0. 6799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * For the square root function, the algorithm reduces to: 6800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
6801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *     x0 = in/2                         [initial guess]
6802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
6803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *
6804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @addtogroup SQRT 6809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @{ 6810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Floating-point square root function. 6814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] in input value 6815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pOut square root of input value 6816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return execution status 6817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** - \ref ARM_MATH_SUCCESS : input value is positive 6818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0 6819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE arm_status arm_sqrt_f32( 6821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t in, 6822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pOut) 6823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (in >= 0.0f) 6825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM ) 6827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined __TARGET_FPU_VFP 6828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pOut = __sqrtf(in); ARM GAS /tmp/ccJrAs6S.s page 1322 6829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pOut = sqrtf(in); 6831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 6832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ ) 6834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined __ARMVFP__ 6835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in)); 6836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pOut = sqrtf(in); 6838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 6839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pOut = sqrtf(in); 6842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 6843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (ARM_MATH_SUCCESS); 6845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 6847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pOut = 0.0f; 6849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (ARM_MATH_ARGUMENT_ERROR); 6850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Q31 square root function. 6856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFF 6857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pOut points to square root of input value 6858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return execution status 6859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** - \ref ARM_MATH_SUCCESS : input value is positive 6860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0 6861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_sqrt_q31( 6863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t in, 6864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pOut); 6865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Q15 square root function. 6869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF 6870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pOut points to square root of input value 6871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return execution status 6872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** - \ref ARM_MATH_SUCCESS : input value is positive 6873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0 6874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_sqrt_q15( 6876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t in, 6877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pOut); 6878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Vector Floating-point square root function. 6881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pIn input vector. 6882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pOut vector of square roots of input elements. 6883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] len length of input vector. 6884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARG 6885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * in is negative value and returns zero output for negative values. ARM GAS /tmp/ccJrAs6S.s page 1323 6886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_vsqrt_f32( 6888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pIn, 6889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pOut, 6890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t len); 6891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_vsqrt_q31( 6893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pIn, 6894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pOut, 6895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t len); 6896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_vsqrt_q15( 6898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pIn, 6899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pOut, 6900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t len); 6901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of SQRT group 6904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief floating-point Circular write function. 6909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_circularWrite_f32( 6911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t * circBuffer, 6912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t L, 6913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t * writeOffset, 6914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t bufferInc, 6915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t * src, 6916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t srcInc, 6917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize) 6918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t i = 0U; 6920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t wOffset; 6921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Copy the value of Index pointer that points 6923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the current location where the input samples to be copied */ 6924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** wOffset = *writeOffset; 28346 .loc 3 6924 0 28347 001c B0F80290 ldrh r9, [r0, #2] 28348 .LVL4577: 28349 .LBE2308: 28350 .LBE2307: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 28351 .loc 76 124 0 28352 0020 3C44 add r4, r4, r7 28353 .LVL4578: 28354 .LBB2313: 28355 .LBB2309: 6925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Loop over the blockSize */ 6927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i = blockSize; 6928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while (i > 0U) 28356 .loc 3 6929 0 28357 0022 002F cmp r7, #0 ARM GAS /tmp/ccJrAs6S.s page 1324 28358 0024 00F08D80 beq .L2217 28359 0028 BC46 mov ip, r7 28360 .LVL4579: 28361 .L2219: 6930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* copy the input sample to the circular buffer */ 6932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** circBuffer[wOffset] = *src; 28362 .loc 3 6932 0 28363 002a 51F8045B ldr r5, [r1], #4 28364 .LVL4580: 28365 002e 46F82950 str r5, [r6, r9, lsl #2] 28366 .LVL4581: 6933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update the input pointer */ 6935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** src += srcInc; 6936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Circularly update wOffset. Watch out for positive and negative value */ 6938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** wOffset += bufferInc; 28367 .loc 3 6938 0 28368 0032 09F10109 add r9, r9, #1 28369 .LVL4582: 6939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (wOffset >= L) 28370 .loc 3 6939 0 28371 0036 4C45 cmp r4, r9 6940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** wOffset -= L; 28372 .loc 3 6940 0 28373 0038 D8BF it le 28374 003a A9EB0409 suble r9, r9, r4 28375 .LVL4583: 6929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 28376 .loc 3 6929 0 28377 003e BCF1010C subs ip, ip, #1 28378 .LVL4584: 28379 0042 F2D1 bne .L2219 28380 .LBE2309: 28381 .LBE2313: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* BlockSize of Input samples are copied into the state buffer */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* StateIndex points to the starting position to write in the state buffer */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1, (int32_t *) pSrc, 1, blockSiz 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Read Index, from where the state buffer should be read, is calculated. */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; 28382 .loc 76 136 0 28383 0044 1FFA89FC uxth ip, r9 28384 .LVL4585: 28385 0048 D8F80010 ldr r1, [r8] 28386 .LVL4586: 28387 .LBB2314: 28388 .LBB2310: 6941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Decrement the loop counter */ 6943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i--; 6944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update the index pointer */ ARM GAS /tmp/ccJrAs6S.s page 1325 6947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *writeOffset = (uint16_t)wOffset; 28389 .loc 3 6947 0 28390 004c A0F80290 strh r9, [r0, #2] @ movhi 28391 .LVL4587: 28392 .LBE2310: 28393 .LBE2314: 28394 .loc 76 136 0 28395 0050 ACEB070C sub ip, ip, r7 28396 .LVL4588: 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Wraparound of readIndex */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** if (readIndex < 0) 28397 .loc 76 139 0 28398 0054 BCEB0101 subs r1, ip, r1 28399 .LVL4589: 28400 0058 7BD4 bmi .L2240 28401 .LVL4590: 28402 .LBB2315: 28403 .LBB2316: 6948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief floating-point Circular Read function. 6954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_circularRead_f32( 6956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t * circBuffer, 6957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t L, 6958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t * readOffset, 6959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t bufferInc, 6960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t * dst, 6961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t * dst_base, 6962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t dst_length, 6963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t dstInc, 6964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize) 6965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t i = 0U; 6967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t rOffset; 6968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t* dst_end; 6969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Copy the value of Index pointer that points 6971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the current location from where the input samples to be read */ 6972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** rOffset = *readOffset; 6973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** dst_end = dst_base + dst_length; 28404 .loc 3 6973 0 28405 005a 03EB8709 add r9, r3, r7, lsl #2 28406 .LVL4591: 28407 .L2241: 28408 .LBE2316: 28409 .LBE2315: 28410 .LBB2319: 28411 .LBB2311: 6929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 28412 .loc 3 6929 0 28413 005e BB46 mov fp, r7 28414 0060 9A46 mov r10, r3 ARM GAS /tmp/ccJrAs6S.s page 1326 28415 .LVL4592: 28416 .L2224: 28417 .LBE2311: 28418 .LBE2319: 28419 .LBB2320: 28420 .LBB2317: 6974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Loop over the blockSize */ 6976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i = blockSize; 6977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while (i > 0U) 6979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* copy the sample from the circular buffer to the destination buffer */ 6981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *dst = circBuffer[rOffset]; 28421 .loc 3 6981 0 28422 0062 56F82100 ldr r0, [r6, r1, lsl #2] 28423 0066 4AF8040B str r0, [r10], #4 28424 .LVL4593: 6982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update the input pointer */ 6984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** dst += dstInc; 6985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (dst == dst_end) 6987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** dst = dst_base; 6989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Circularly update rOffset. Watch out for positive and negative value */ 6992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** rOffset += bufferInc; 28425 .loc 3 6992 0 28426 006a 0131 adds r1, r1, #1 28427 .LVL4594: 6988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 28428 .loc 3 6988 0 28429 006c D145 cmp r9, r10 28430 006e 08BF it eq 28431 0070 9A46 moveq r10, r3 28432 .LVL4595: 6993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (rOffset >= L) 28433 .loc 3 6994 0 28434 0072 8C42 cmp r4, r1 6995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** rOffset -= L; 28435 .loc 3 6996 0 28436 0074 D8BF it le 28437 0076 091B suble r1, r1, r4 28438 .LVL4596: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 28439 .loc 3 6978 0 28440 0078 BBF1010B subs fp, fp, #1 28441 .LVL4597: 28442 007c F1D1 bne .L2224 28443 007e 3946 mov r1, r7 28444 .LVL4598: 28445 .LBE2317: 28446 .LBE2320: ARM GAS /tmp/ccJrAs6S.s page 1327 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** readIndex += (int32_t) delaySize; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Working pointer for state buffer is updated */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** py = pState; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* blockSize samples are read from the state buffer */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize); 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Working pointer for the scratch buffer of state values */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** px = pb; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Working pointer for scratch buffer of output values */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** pOut = pDst; 28447 .loc 76 155 0 28448 0080 9246 mov r10, r2 28449 .LVL4599: 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 28450 .loc 76 152 0 28451 0082 1846 mov r0, r3 28452 .L2225: 28453 .LVL4600: 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt = blockSize >> 2U; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** while (blkCnt > 0U) 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Perform Multiplications and store in destination buffer */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ = *px++ * coeff; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ = *px++ * coeff; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ = *px++ * coeff; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ = *px++ * coeff; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Decrement loop counter */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt--; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Loop unrolling: Compute remaining outputs */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt = blockSize % 0x4U; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** #else 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Initialize blkCnt with number of samples */ 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt = blockSize; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** while (blkCnt > 0U) ARM GAS /tmp/ccJrAs6S.s page 1328 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Perform Multiplication and store in destination buffer */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ = *px++ * coeff; 28454 .loc 76 191 0 28455 0084 F0EC017A vldmia.32 r0!, {s15} 28456 .LVL4601: 28457 0088 67EE877A vmul.f32 s15, s15, s14 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 28458 .loc 76 188 0 28459 008c 0139 subs r1, r1, #1 28460 .LVL4602: 28461 .loc 76 191 0 28462 008e EAEC017A vstmia.32 r10!, {s15} 28463 .LVL4603: 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 28464 .loc 76 188 0 28465 0092 F7D1 bne .L2225 28466 .LVL4604: 28467 .L2221: 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Decrement loop counter */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt--; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Load the coefficient value and 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * increment the coefficient buffer for the next set of state values */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** coeff = *pCoeffs++; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Read Index, from where the state buffer should be read, is calculated. */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; 28468 .loc 76 202 0 28469 0094 D8F80410 ldr r1, [r8, #4] 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Wraparound of readIndex */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** if (readIndex < 0) 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** readIndex += (int32_t) delaySize; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Loop over the number of taps. */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** tapCnt = (uint32_t) numTaps - 2U; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** while (tapCnt > 0U) 28470 .loc 76 213 0 28471 0098 0198 ldr r0, [sp, #4] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 28472 .loc 76 199 0 28473 009a DEED016A vldr.32 s13, [lr, #4] 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 28474 .loc 76 205 0 28475 009e BCEB0101 subs r1, ip, r1 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 28476 .loc 76 207 0 28477 00a2 48BF it mi 28478 00a4 0919 addmi r1, r1, r4 28479 .loc 76 213 0 28480 00a6 B0F1020A subs r10, r0, #2 ARM GAS /tmp/ccJrAs6S.s page 1329 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 28481 .loc 76 202 0 28482 00aa 08F10808 add r8, r8, #8 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 28483 .loc 76 199 0 28484 00ae 0EF1080E add lr, lr, #8 28485 .LVL4605: 28486 .loc 76 213 0 28487 00b2 28D0 beq .L2228 28488 .L2227: 28489 .LVL4606: 28490 .LBB2321: 28491 .LBB2322: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 28492 .loc 3 6978 0 28493 00b4 E7B1 cbz r7, .L2234 28494 00b6 BB46 mov fp, r7 28495 00b8 1846 mov r0, r3 28496 .LVL4607: 28497 .L2231: 6981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 28498 .loc 3 6981 0 28499 00ba 56F82150 ldr r5, [r6, r1, lsl #2] 28500 00be 40F8045B str r5, [r0], #4 28501 .LVL4608: 6992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 28502 .loc 3 6992 0 28503 00c2 0131 adds r1, r1, #1 28504 .LVL4609: 6988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 28505 .loc 3 6988 0 28506 00c4 8145 cmp r9, r0 28507 00c6 08BF it eq 28508 00c8 1846 moveq r0, r3 28509 .LVL4610: 6994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 28510 .loc 3 6994 0 28511 00ca 8C42 cmp r4, r1 28512 .loc 3 6996 0 28513 00cc D8BF it le 28514 00ce 091B suble r1, r1, r4 28515 .LVL4611: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 28516 .loc 3 6978 0 28517 00d0 BBF1010B subs fp, fp, #1 28518 .LVL4612: 28519 00d4 F1D1 bne .L2231 28520 00d6 3846 mov r0, r7 28521 .LVL4613: 28522 .LBE2322: 28523 .LBE2321: 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Working pointer for state buffer is updated */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** py = pState; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* blockSize samples are read from the state buffer */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, ARM GAS /tmp/ccJrAs6S.s page 1330 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Working pointer for the scratch buffer of state values */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** px = pb; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Working pointer for scratch buffer of output values */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** pOut = pDst; 28524 .loc 76 226 0 28525 00d8 1146 mov r1, r2 28526 .LVL4614: 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 28527 .loc 76 223 0 28528 00da 1D46 mov r5, r3 28529 .L2232: 28530 .LVL4615: 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt = blockSize >> 2U; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** while (blkCnt > 0U) 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Perform Multiply-Accumulate */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ += *px++ * coeff; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ += *px++ * coeff; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ += *px++ * coeff; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ += *px++ * coeff; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Decrement loop counter */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt--; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Loop unrolling: Compute remaining outputs */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt = blockSize % 0x4U; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** #else 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Initialize blkCnt with number of samples */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt = blockSize; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** while (blkCnt > 0U) 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Perform Multiply-Accumulate */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ += *px++ * coeff; 28531 .loc 76 262 0 28532 00dc B5EC017A vldmia.32 r5!, {s14} 28533 .LVL4616: 28534 00e0 F1EC017A vldmia.32 r1!, {s15} 28535 .LVL4617: 28536 00e4 E7EE267A vfma.f32 s15, s14, s13 ARM GAS /tmp/ccJrAs6S.s page 1331 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 28537 .loc 76 259 0 28538 00e8 0138 subs r0, r0, #1 28539 .LVL4618: 28540 .loc 76 262 0 28541 00ea 41ED017A vstr.32 s15, [r1, #-4] 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 28542 .loc 76 259 0 28543 00ee F5D1 bne .L2232 28544 .LVL4619: 28545 .L2234: 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Decrement loop counter */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt--; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Load the coefficient value and 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** * increment the coefficient buffer for the next set of state values */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** coeff = *pCoeffs++; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Read Index, from where the state buffer should be read, is calculated. */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; 28546 .loc 76 273 0 28547 00f0 58F8041B ldr r1, [r8], #4 28548 .LVL4620: 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 28549 .loc 76 270 0 28550 00f4 FEEC016A vldmia.32 lr!, {s13} 28551 .LVL4621: 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Wraparound of readIndex */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** if (readIndex < 0) 28552 .loc 76 276 0 28553 00f8 BCEB0101 subs r1, ip, r1 28554 .LVL4622: 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** readIndex += (int32_t) delaySize; 28555 .loc 76 278 0 28556 00fc 48BF it mi 28557 00fe 0919 addmi r1, r1, r4 28558 .LVL4623: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 28559 .loc 76 213 0 28560 0100 BAF1010A subs r10, r10, #1 28561 .LVL4624: 28562 0104 D6D1 bne .L2227 28563 .L2228: 28564 .LVL4625: 28565 .LBB2323: 28566 .LBB2324: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 28567 .loc 3 6978 0 28568 0106 CFB1 cbz r7, .L2216 28569 0108 BC46 mov ip, r7 28570 010a 1D46 mov r5, r3 28571 .LVL4626: 28572 .L2238: ARM GAS /tmp/ccJrAs6S.s page 1332 6981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 28573 .loc 3 6981 0 28574 010c 56F82100 ldr r0, [r6, r1, lsl #2] 28575 0110 45F8040B str r0, [r5], #4 28576 .LVL4627: 6992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 28577 .loc 3 6992 0 28578 0114 0131 adds r1, r1, #1 28579 .LVL4628: 6988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 28580 .loc 3 6988 0 28581 0116 A945 cmp r9, r5 28582 0118 08BF it eq 28583 011a 1D46 moveq r5, r3 28584 .LVL4629: 6994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 28585 .loc 3 6994 0 28586 011c 8C42 cmp r4, r1 28587 .loc 3 6996 0 28588 011e D8BF it le 28589 0120 091B suble r1, r1, r4 28590 .LVL4630: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 28591 .loc 3 6978 0 28592 0122 BCF1010C subs ip, ip, #1 28593 .LVL4631: 28594 0126 F1D1 bne .L2238 28595 .LVL4632: 28596 .L2239: 28597 .LBE2324: 28598 .LBE2323: 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Decrement tap loop counter */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** tapCnt--; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Compute last tap without the final read of pTapDelay */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Working pointer for state buffer is updated */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** py = pState; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* blockSize samples are read from the state buffer */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize); 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Working pointer for the scratch buffer of state values */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** px = pb; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Working pointer for scratch buffer of output values */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** pOut = pDst; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt = blockSize >> 2U; ARM GAS /tmp/ccJrAs6S.s page 1333 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** while (blkCnt > 0U) 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Perform Multiply-Accumulate */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ += *px++ * coeff; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ += *px++ * coeff; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ += *px++ * coeff; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ += *px++ * coeff; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Decrement loop counter */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt--; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Loop unrolling: Compute remaining outputs */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt = blockSize % 0x4U; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** #else 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Initialize blkCnt with number of samples */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt = blockSize; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** while (blkCnt > 0U) 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Perform Multiply-Accumulate */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** *pOut++ += *px++ * coeff; 28599 .loc 76 331 0 28600 0128 B3EC017A vldmia.32 r3!, {s14} 28601 .LVL4633: 28602 012c F2EC017A vldmia.32 r2!, {s15} 28603 .LVL4634: 28604 0130 E7EE267A vfma.f32 s15, s14, s13 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 28605 .loc 76 328 0 28606 0134 013F subs r7, r7, #1 28607 .LVL4635: 28608 .loc 76 331 0 28609 0136 42ED017A vstr.32 s15, [r2, #-4] 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 28610 .loc 76 328 0 28611 013a F5D1 bne .L2239 28612 .LVL4636: 28613 .L2216: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** /* Decrement loop counter */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** blkCnt--; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 28614 .loc 76 337 0 28615 013c 03B0 add sp, sp, #12 28616 .LCFI217: 28617 .cfi_remember_state 28618 .cfi_def_cfa_offset 36 28619 @ sp needed 28620 013e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} ARM GAS /tmp/ccJrAs6S.s page 1334 28621 .LVL4637: 28622 .L2217: 28623 .LCFI218: 28624 .cfi_restore_state 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 28625 .loc 76 136 0 28626 0142 D8F80010 ldr r1, [r8] 28627 .LVL4638: 28628 .LBB2325: 28629 .LBB2312: 6947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 28630 .loc 3 6947 0 28631 0146 A0F80290 strh r9, [r0, #2] @ movhi 28632 .LVL4639: 28633 .LBE2312: 28634 .LBE2325: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 28635 .loc 76 139 0 28636 014a B9EB0101 subs r1, r9, r1 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** 28637 .loc 76 136 0 28638 014e CC46 mov ip, r9 28639 .LVL4640: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** { 28640 .loc 76 139 0 28641 0150 05D5 bpl .L2261 28642 .LVL4641: 28643 .L2240: 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c **** } 28644 .loc 76 141 0 28645 0152 2144 add r1, r1, r4 28646 .LVL4642: 28647 .LBB2326: 28648 .LBB2318: 6973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 28649 .loc 3 6973 0 28650 0154 03EB8709 add r9, r3, r7, lsl #2 28651 .LVL4643: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 28652 .loc 3 6978 0 28653 0158 002F cmp r7, #0 28654 015a 80D1 bne .L2241 28655 015c 9AE7 b .L2221 28656 .LVL4644: 28657 .L2261: 6973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 28658 .loc 3 6973 0 28659 015e 9946 mov r9, r3 28660 0160 98E7 b .L2221 28661 .LBE2318: 28662 .LBE2326: 28663 .cfi_endproc 28664 .LFE221: 28666 0162 00BF .section .text.arm_fir_sparse_init_f32,"ax",%progbits 28667 .align 1 28668 .p2align 2,,3 28669 .global arm_fir_sparse_init_f32 ARM GAS /tmp/ccJrAs6S.s page 1335 28670 .syntax unified 28671 .thumb 28672 .thumb_func 28673 .fpu fpv4-sp-d16 28675 arm_fir_sparse_init_f32: 28676 .LFB222: 28677 .file 77 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_ini 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * Title: arm_fir_sparse_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * Description: Floating-point sparse FIR filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @addtogroup FIR_Sparse 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @brief Initialization function for the floating-point sparse FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @param[in,out] S points to an instance of the floating-point sparse FIR structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @param[in] numTaps number of nonzero coefficients in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @param[in] pCoeffs points to the array of filter coefficients 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @param[in] pState points to the state buffer 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @param[in] pTapDelay points to the array of offset times 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @param[in] maxDelay maximum offset time supported 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @param[in] blockSize number of samples that will be processed per block 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @return none 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1336 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** @par Details 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** pCoeffs holds the filter coefficients and has length numTaps< 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** pState holds the filter's state variables and must be of length 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** maxDelay + blockSize, where maxDelay 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** is the maximum number of delay line values. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** blockSize is the 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** number of samples processed by the arm_fir_sparse_f32() function. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** void arm_fir_sparse_init_f32( 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** arm_fir_sparse_instance_f32 * S, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** uint16_t numTaps, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** const float32_t * pCoeffs, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** float32_t * pState, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** int32_t * pTapDelay, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** uint16_t maxDelay, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** uint32_t blockSize) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** { 28678 .loc 77 68 0 28679 .cfi_startproc 28680 @ args = 12, pretend = 0, frame = 0 28681 @ frame_needed = 0, uses_anonymous_args = 0 28682 .LVL4645: 28683 0000 70B5 push {r4, r5, r6, lr} 28684 .LCFI219: 28685 .cfi_def_cfa_offset 16 28686 .cfi_offset 4, -16 28687 .cfi_offset 5, -12 28688 .cfi_offset 6, -8 28689 .cfi_offset 14, -4 28690 .loc 77 68 0 28691 0002 069D ldr r5, [sp, #24] 28692 0004 BDF81460 ldrh r6, [sp, #20] 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /* Assign filter taps */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** S->numTaps = numTaps; 28693 .loc 77 70 0 28694 0008 0180 strh r1, [r0] @ movhi 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /* Assign filter taps */ 28695 .loc 77 68 0 28696 000a 0446 mov r4, r0 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /* Assign coefficient pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** S->pCoeffs = pCoeffs; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /* Assign TapDelay pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** S->pTapDelay = pTapDelay; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /* Assign MaxDelay */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** S->maxDelay = maxDelay; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /* reset the stateIndex to 0 */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** S->stateIndex = 0U; 28697 .loc 77 82 0 28698 000c 0021 movs r1, #0 28699 .LVL4646: 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /* Assign filter taps */ 28700 .loc 77 68 0 ARM GAS /tmp/ccJrAs6S.s page 1337 28701 000e 0498 ldr r0, [sp, #16] 28702 .LVL4647: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 28703 .loc 77 73 0 28704 0010 A260 str r2, [r4, #8] 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /* Clear state buffer and size is always maxDelay + blockSize */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t)); 28705 .loc 77 85 0 28706 0012 3544 add r5, r5, r6 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 28707 .loc 77 76 0 28708 0014 2061 str r0, [r4, #16] 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 28709 .loc 77 79 0 28710 0016 A681 strh r6, [r4, #12] @ movhi 28711 .loc 77 85 0 28712 0018 AA00 lsls r2, r5, #2 28713 .LVL4648: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 28714 .loc 77 82 0 28715 001a 6180 strh r1, [r4, #2] @ movhi 28716 .loc 77 85 0 28717 001c 1846 mov r0, r3 28718 001e FFF7FEFF bl memset 28719 .LVL4649: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** /* Assign state pointer */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** S->pState = pState; 28720 .loc 77 88 0 28721 0022 6060 str r0, [r4, #4] 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c **** } 28722 .loc 77 89 0 28723 0024 70BD pop {r4, r5, r6, pc} 28724 .cfi_endproc 28725 .LFE222: 28727 0026 00BF .section .text.arm_fir_sparse_init_q15,"ax",%progbits 28728 .align 1 28729 .p2align 2,,3 28730 .global arm_fir_sparse_init_q15 28731 .syntax unified 28732 .thumb 28733 .thumb_func 28734 .fpu fpv4-sp-d16 28736 arm_fir_sparse_init_q15: 28737 .LFB223: 28738 .file 78 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_ini 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * Title: arm_fir_sparse_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * Description: Q15 sparse FIR filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * -------------------------------------------------------------------- */ ARM GAS /tmp/ccJrAs6S.s page 1338 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @addtogroup FIR_Sparse 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @brief Initialization function for the Q15 sparse FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @param[in,out] S points to an instance of the Q15 sparse FIR structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @param[in] numTaps number of nonzero coefficients in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @param[in] pCoeffs points to the array of filter coefficients 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @param[in] pState points to the state buffer 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @param[in] pTapDelay points to the array of offset times 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @param[in] maxDelay maximum offset time supported 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @param[in] blockSize number of samples that will be processed per block 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @return none 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** @par Details 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** pCoeffs holds the filter coefficients and has length numTaps< 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** pState holds the filter's state variables and must be of length 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** maxDelay + blockSize, where maxDelay 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** is the maximum number of delay line values. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** blockSize is the 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** number of words processed by arm_fir_sparse_q15() function. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** void arm_fir_sparse_init_q15( 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** arm_fir_sparse_instance_q15 * S, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** uint16_t numTaps, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** const q15_t * pCoeffs, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** q15_t * pState, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** int32_t * pTapDelay, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** uint16_t maxDelay, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** uint32_t blockSize) ARM GAS /tmp/ccJrAs6S.s page 1339 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** { 28739 .loc 78 68 0 28740 .cfi_startproc 28741 @ args = 12, pretend = 0, frame = 0 28742 @ frame_needed = 0, uses_anonymous_args = 0 28743 .LVL4650: 28744 0000 70B5 push {r4, r5, r6, lr} 28745 .LCFI220: 28746 .cfi_def_cfa_offset 16 28747 .cfi_offset 4, -16 28748 .cfi_offset 5, -12 28749 .cfi_offset 6, -8 28750 .cfi_offset 14, -4 28751 .loc 78 68 0 28752 0002 069D ldr r5, [sp, #24] 28753 0004 BDF81460 ldrh r6, [sp, #20] 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /* Assign filter taps */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** S->numTaps = numTaps; 28754 .loc 78 70 0 28755 0008 0180 strh r1, [r0] @ movhi 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /* Assign filter taps */ 28756 .loc 78 68 0 28757 000a 0446 mov r4, r0 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /* Assign coefficient pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** S->pCoeffs = pCoeffs; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /* Assign TapDelay pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** S->pTapDelay = pTapDelay; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /* Assign MaxDelay */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** S->maxDelay = maxDelay; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /* reset the stateIndex to 0 */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** S->stateIndex = 0U; 28758 .loc 78 82 0 28759 000c 0021 movs r1, #0 28760 .LVL4651: 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /* Assign filter taps */ 28761 .loc 78 68 0 28762 000e 0498 ldr r0, [sp, #16] 28763 .LVL4652: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 28764 .loc 78 73 0 28765 0010 A260 str r2, [r4, #8] 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /* Clear state buffer and size is always maxDelay + blockSize */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t)); 28766 .loc 78 85 0 28767 0012 3544 add r5, r5, r6 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 28768 .loc 78 76 0 28769 0014 2061 str r0, [r4, #16] 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 28770 .loc 78 79 0 28771 0016 A681 strh r6, [r4, #12] @ movhi 28772 .loc 78 85 0 ARM GAS /tmp/ccJrAs6S.s page 1340 28773 0018 6A00 lsls r2, r5, #1 28774 .LVL4653: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 28775 .loc 78 82 0 28776 001a 6180 strh r1, [r4, #2] @ movhi 28777 .loc 78 85 0 28778 001c 1846 mov r0, r3 28779 001e FFF7FEFF bl memset 28780 .LVL4654: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** /* Assign state pointer */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** S->pState = pState; 28781 .loc 78 88 0 28782 0022 6060 str r0, [r4, #4] 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c **** } 28783 .loc 78 89 0 28784 0024 70BD pop {r4, r5, r6, pc} 28785 .cfi_endproc 28786 .LFE223: 28788 0026 00BF .section .text.arm_fir_sparse_init_q31,"ax",%progbits 28789 .align 1 28790 .p2align 2,,3 28791 .global arm_fir_sparse_init_q31 28792 .syntax unified 28793 .thumb 28794 .thumb_func 28795 .fpu fpv4-sp-d16 28797 arm_fir_sparse_init_q31: 28798 .LFB224: 28799 .file 79 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_ini 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * Title: arm_fir_sparse_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * Description: Q31 sparse FIR filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** */ ARM GAS /tmp/ccJrAs6S.s page 1341 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @addtogroup FIR_Sparse 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @brief Initialization function for the Q31 sparse FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @param[in,out] S points to an instance of the Q31 sparse FIR structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @param[in] numTaps number of nonzero coefficients in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @param[in] pCoeffs points to the array of filter coefficients 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @param[in] pState points to the state buffer 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @param[in] pTapDelay points to the array of offset times 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @param[in] maxDelay maximum offset time supported 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @param[in] blockSize number of samples that will be processed per block 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @return none 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** @par Details 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** pCoeffs holds the filter coefficients and has length numTaps< 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** pState holds the filter's state variables and must be of length 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** maxDelay + blockSize, where maxDelay 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** is the maximum number of delay line values. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** blockSize is the number of words processed by arm_fir_sparse_ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** void arm_fir_sparse_init_q31( 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** arm_fir_sparse_instance_q31 * S, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** uint16_t numTaps, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** const q31_t * pCoeffs, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** q31_t * pState, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** int32_t * pTapDelay, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** uint16_t maxDelay, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** uint32_t blockSize) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** { 28800 .loc 79 67 0 28801 .cfi_startproc 28802 @ args = 12, pretend = 0, frame = 0 28803 @ frame_needed = 0, uses_anonymous_args = 0 28804 .LVL4655: 28805 0000 70B5 push {r4, r5, r6, lr} 28806 .LCFI221: 28807 .cfi_def_cfa_offset 16 28808 .cfi_offset 4, -16 28809 .cfi_offset 5, -12 28810 .cfi_offset 6, -8 28811 .cfi_offset 14, -4 28812 .loc 79 67 0 28813 0002 069D ldr r5, [sp, #24] 28814 0004 BDF81460 ldrh r6, [sp, #20] 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /* Assign filter taps */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** S->numTaps = numTaps; ARM GAS /tmp/ccJrAs6S.s page 1342 28815 .loc 79 69 0 28816 0008 0180 strh r1, [r0] @ movhi 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /* Assign filter taps */ 28817 .loc 79 67 0 28818 000a 0446 mov r4, r0 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /* Assign coefficient pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** S->pCoeffs = pCoeffs; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /* Assign TapDelay pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** S->pTapDelay = pTapDelay; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /* Assign MaxDelay */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** S->maxDelay = maxDelay; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /* reset the stateIndex to 0 */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** S->stateIndex = 0U; 28819 .loc 79 81 0 28820 000c 0021 movs r1, #0 28821 .LVL4656: 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /* Assign filter taps */ 28822 .loc 79 67 0 28823 000e 0498 ldr r0, [sp, #16] 28824 .LVL4657: 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 28825 .loc 79 72 0 28826 0010 A260 str r2, [r4, #8] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /* Clear state buffer and size is always maxDelay + blockSize */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t)); 28827 .loc 79 84 0 28828 0012 3544 add r5, r5, r6 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 28829 .loc 79 75 0 28830 0014 2061 str r0, [r4, #16] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 28831 .loc 79 78 0 28832 0016 A681 strh r6, [r4, #12] @ movhi 28833 .loc 79 84 0 28834 0018 AA00 lsls r2, r5, #2 28835 .LVL4658: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 28836 .loc 79 81 0 28837 001a 6180 strh r1, [r4, #2] @ movhi 28838 .loc 79 84 0 28839 001c 1846 mov r0, r3 28840 001e FFF7FEFF bl memset 28841 .LVL4659: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** /* Assign state pointer */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** S->pState = pState; 28842 .loc 79 87 0 28843 0022 6060 str r0, [r4, #4] 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c **** } 28844 .loc 79 88 0 28845 0024 70BD pop {r4, r5, r6, pc} 28846 .cfi_endproc ARM GAS /tmp/ccJrAs6S.s page 1343 28847 .LFE224: 28849 0026 00BF .section .text.arm_fir_sparse_init_q7,"ax",%progbits 28850 .align 1 28851 .p2align 2,,3 28852 .global arm_fir_sparse_init_q7 28853 .syntax unified 28854 .thumb 28855 .thumb_func 28856 .fpu fpv4-sp-d16 28858 arm_fir_sparse_init_q7: 28859 .LFB225: 28860 .file 80 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_ini 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * Title: arm_fir_sparse_init_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * Description: Q7 sparse FIR filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @addtogroup FIR_Sparse 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @brief Initialization function for the Q7 sparse FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @param[in,out] S points to an instance of the Q7 sparse FIR structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @param[in] numTaps number of nonzero coefficients in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @param[in] pCoeffs points to the array of filter coefficients 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @param[in] pState points to the state buffer ARM GAS /tmp/ccJrAs6S.s page 1344 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @param[in] pTapDelay points to the array of offset times 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @param[in] maxDelay maximum offset time supported 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @param[in] blockSize number of samples that will be processed per block 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @return none 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** @par Details 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** pCoeffs holds the filter coefficients and has length numTaps< 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** pState holds the filter's state variables and must be of length 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** maxDelay + blockSize, where maxDelay 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** is the maximum number of delay line values. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** blockSize is the 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** number of samples processed by the arm_fir_sparse_q7() function. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** void arm_fir_sparse_init_q7( 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** arm_fir_sparse_instance_q7 * S, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** uint16_t numTaps, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** const q7_t * pCoeffs, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** q7_t * pState, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** int32_t * pTapDelay, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** uint16_t maxDelay, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** uint32_t blockSize) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** { 28861 .loc 80 68 0 28862 .cfi_startproc 28863 @ args = 12, pretend = 0, frame = 0 28864 @ frame_needed = 0, uses_anonymous_args = 0 28865 .LVL4660: 28866 0000 70B5 push {r4, r5, r6, lr} 28867 .LCFI222: 28868 .cfi_def_cfa_offset 16 28869 .cfi_offset 4, -16 28870 .cfi_offset 5, -12 28871 .cfi_offset 6, -8 28872 .cfi_offset 14, -4 28873 .loc 80 68 0 28874 0002 0446 mov r4, r0 28875 0004 069D ldr r5, [sp, #24] 28876 0006 BDF81400 ldrh r0, [sp, #20] 28877 .LVL4661: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /* Assign filter taps */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** S->numTaps = numTaps; 28878 .loc 80 70 0 28879 000a 2180 strh r1, [r4] @ movhi 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /* Assign filter taps */ 28880 .loc 80 68 0 28881 000c 049E ldr r6, [sp, #16] 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /* Assign coefficient pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** S->pCoeffs = pCoeffs; 28882 .loc 80 73 0 28883 000e A260 str r2, [r4, #8] 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /* Assign TapDelay pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** S->pTapDelay = pTapDelay; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /* Assign MaxDelay */ ARM GAS /tmp/ccJrAs6S.s page 1345 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** S->maxDelay = maxDelay; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /* reset the stateIndex to 0 */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** S->stateIndex = 0U; 28884 .loc 80 82 0 28885 0010 0021 movs r1, #0 28886 .LVL4662: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 28887 .loc 80 79 0 28888 0012 A081 strh r0, [r4, #12] @ movhi 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /* Clear state buffer and size is always maxDelay + blockSize */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t)); 28889 .loc 80 85 0 28890 0014 4219 adds r2, r0, r5 28891 .LVL4663: 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 28892 .loc 80 76 0 28893 0016 2661 str r6, [r4, #16] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 28894 .loc 80 82 0 28895 0018 6180 strh r1, [r4, #2] @ movhi 28896 .loc 80 85 0 28897 001a 1846 mov r0, r3 28898 001c FFF7FEFF bl memset 28899 .LVL4664: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** /* Assign state pointer */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** S->pState = pState; 28900 .loc 80 88 0 28901 0020 6060 str r0, [r4, #4] 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c **** } 28902 .loc 80 89 0 28903 0022 70BD pop {r4, r5, r6, pc} 28904 .cfi_endproc 28905 .LFE225: 28907 .section .text.arm_fir_sparse_q15,"ax",%progbits 28908 .align 1 28909 .p2align 2,,3 28910 .global arm_fir_sparse_q15 28911 .syntax unified 28912 .thumb 28913 .thumb_func 28914 .fpu fpv4-sp-d16 28916 arm_fir_sparse_q15: 28917 .LFB226: 28918 .file 81 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * Title: arm_fir_sparse_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * Description: Q15 sparse FIR filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * -------------------------------------------------------------------- */ ARM GAS /tmp/ccJrAs6S.s page 1346 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** @addtogroup FIR_Sparse 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** @brief Processing function for the Q15 sparse FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** @param[in] S points to an instance of the Q15 sparse FIR structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** @param[in] pScratchIn points to a temporary buffer of size blockSize 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** @param[in] pScratchOut points to a temporary buffer of size blockSize 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** @param[in] blockSize number of input samples to process per call 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** @return none 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** @par Scaling and Overflow Behavior 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** The function is implemented using an internal 32-bit accumulator. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.3 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** Thus the full precision of the multiplications is maintained but there is only a 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** If the accumulator result overflows it will wrap around rather than saturate. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** After all multiply-accumulates are performed, the 2.30 accumulator is truncated 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** In order to avoid overflows the input signal or coefficients must be scaled down 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** void arm_fir_sparse_q15( 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** arm_fir_sparse_instance_q15 * S, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** const q15_t * pSrc, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q15_t * pDst, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q15_t * pScratchIn, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q31_t * pScratchOut, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** uint32_t blockSize) 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 28919 .loc 81 66 0 ARM GAS /tmp/ccJrAs6S.s page 1347 28920 .cfi_startproc 28921 @ args = 8, pretend = 0, frame = 8 28922 @ frame_needed = 0, uses_anonymous_args = 0 28923 .LVL4665: 28924 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 28925 .LCFI223: 28926 .cfi_def_cfa_offset 36 28927 .cfi_offset 4, -36 28928 .cfi_offset 5, -32 28929 .cfi_offset 6, -28 28930 .cfi_offset 7, -24 28931 .cfi_offset 8, -20 28932 .cfi_offset 9, -16 28933 .cfi_offset 10, -12 28934 .cfi_offset 11, -8 28935 .cfi_offset 14, -4 28936 0004 83B0 sub sp, sp, #12 28937 .LCFI224: 28938 .cfi_def_cfa_offset 48 28939 .loc 81 66 0 28940 0006 0446 mov r4, r0 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q15_t *pState = S->pState; /* State pointer */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 28941 .loc 81 68 0 28942 0008 D0F808A0 ldr r10, [r0, #8] 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q15_t *px; /* Temporary pointers for scratch buffer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q15_t *py = pState; /* Temporary pointers for state buffer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q15_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q15_t *pOut = pDst; /* Working pointer for output */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** uint32_t delaySize = S->maxDelay + blockSize; /* state length */ 28943 .loc 81 74 0 28944 000c B0F80CE0 ldrh lr, [r0, #12] 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q15_t *pState = S->pState; /* State pointer */ 28945 .loc 81 66 0 28946 0010 DDF834C0 ldr ip, [sp, #52] 28947 0014 0090 str r0, [sp] 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q15_t *pState = S->pState; /* State pointer */ 28948 .loc 81 67 0 28949 0016 4768 ldr r7, [r0, #4] 28950 .LVL4666: 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 28951 .loc 81 75 0 28952 0018 B4F80090 ldrh r9, [r4] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** int32_t readIndex; /* Read index of the state buffer */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** uint32_t tapCnt, blkCnt; /* loop counters */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of out 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q15_t coeff = *pCoeffs++; /* Read the first coefficient value */ 28953 .loc 81 79 0 28954 001c BAF90060 ldrsh r6, [r10] 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** uint32_t delaySize = S->maxDelay + blockSize; /* state length */ 28955 .loc 81 73 0 28956 0020 0069 ldr r0, [r0, #16] 28957 .LVL4667: 28958 .LBB2327: 28959 .LBB2328: 6997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } ARM GAS /tmp/ccJrAs6S.s page 1348 6998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Decrement the loop counter */ 7000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i--; 7001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 7002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update the index pointer */ 7004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *readOffset = rOffset; 7005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 7006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 7009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 Circular write function. 7010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 7011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_circularWrite_q15( 7012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * circBuffer, 7013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t L, 7014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t * writeOffset, 7015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t bufferInc, 7016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * src, 7017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t srcInc, 7018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize) 7019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 7020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t i = 0U; 7021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t wOffset; 7022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Copy the value of Index pointer that points 7024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the current location where the input samples to be copied */ 7025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** wOffset = *writeOffset; 28960 .loc 3 7025 0 28961 0022 6488 ldrh r4, [r4, #2] 28962 .LVL4668: 28963 .LBE2328: 28964 .LBE2327: 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q15_t *pState = S->pState; /* State pointer */ 28965 .loc 81 66 0 28966 0024 DDF830B0 ldr fp, [sp, #48] 28967 0028 0192 str r2, [sp, #4] 28968 .LVL4669: 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 28969 .loc 81 74 0 28970 002a 0EEB0C05 add r5, lr, ip 28971 .LVL4670: 28972 .LBB2333: 28973 .LBB2329: 7026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Loop over the blockSize */ 7028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i = blockSize; 7029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while (i > 0U) 28974 .loc 3 7030 0 28975 002e BCF1000F cmp ip, #0 28976 0032 0AD0 beq .L2271 28977 0034 6246 mov r2, ip 28978 .LVL4671: 28979 .L2273: 7031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 7032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* copy the input sample to the circular buffer */ ARM GAS /tmp/ccJrAs6S.s page 1349 7033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** circBuffer[wOffset] = *src; 28980 .loc 3 7033 0 28981 0036 31F902EB ldrsh lr, [r1], #2 28982 .LVL4672: 28983 003a 27F814E0 strh lr, [r7, r4, lsl #1] @ movhi 28984 .LVL4673: 7034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update the input pointer */ 7036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** src += srcInc; 7037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Circularly update wOffset. Watch out for positive and negative value */ 7039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** wOffset += bufferInc; 28985 .loc 3 7039 0 28986 003e 0134 adds r4, r4, #1 28987 .LVL4674: 7040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (wOffset >= L) 28988 .loc 3 7040 0 28989 0040 A542 cmp r5, r4 7041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** wOffset -= L; 28990 .loc 3 7041 0 28991 0042 D8BF it le 28992 0044 641B suble r4, r4, r5 28993 .LVL4675: 7030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 28994 .loc 3 7030 0 28995 0046 013A subs r2, r2, #1 28996 .LVL4676: 28997 0048 F5D1 bne .L2273 28998 .LVL4677: 28999 .L2271: 29000 .LBE2329: 29001 .LBE2333: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** q31_t in1, in2; /* Temporary variables */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #endif 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* BlockSize of Input samples are copied into the state buffer */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* StateIndex points to the starting position to write in the state buffer */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** arm_circularWrite_q15(py, (int32_t) delaySize, &S->stateIndex, 1,pSrc, 1, blockSize); 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Loop over the number of taps. */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** tapCnt = numTaps; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Read Index, from where the state buffer should be read, is calculated. */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; 29002 .loc 81 93 0 29003 004a A2B2 uxth r2, r4 29004 004c D0F800E0 ldr lr, [r0] 29005 .LBB2334: 29006 .LBB2330: 7042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Decrement the loop counter */ 7044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i--; 7045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 7046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update the index pointer */ ARM GAS /tmp/ccJrAs6S.s page 1350 7048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *writeOffset = (uint16_t)wOffset; 29007 .loc 3 7048 0 29008 0050 A1B2 uxth r1, r4 29009 .LVL4678: 29010 .LBE2330: 29011 .LBE2334: 29012 .loc 81 93 0 29013 0052 A2EB0C02 sub r2, r2, ip 29014 .LBB2335: 29015 .LBB2331: 29016 .loc 3 7048 0 29017 0056 009C ldr r4, [sp] 29018 .LVL4679: 29019 .LBE2331: 29020 .LBE2335: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Wraparound of readIndex */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** if (readIndex < 0) 29021 .loc 81 96 0 29022 0058 B2EB0E02 subs r2, r2, lr 29023 .LBB2336: 29024 .LBB2332: 29025 .loc 3 7048 0 29026 005c 6180 strh r1, [r4, #2] @ movhi 29027 .LVL4680: 29028 .LBE2332: 29029 .LBE2336: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** readIndex += (int32_t) delaySize; 29030 .loc 81 98 0 29031 005e 48BF it mi 29032 0060 5219 addmi r2, r2, r5 29033 .LVL4681: 29034 .LBB2337: 29035 .LBB2338: 7049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 7050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 7053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 Circular Read function. 7054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 7055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_circularRead_q15( 7056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * circBuffer, 7057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t L, 7058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t * readOffset, 7059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t bufferInc, 7060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * dst, 7061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * dst_base, 7062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t dst_length, 7063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t dstInc, 7064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize) 7065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 7066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t i = 0; 7067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t rOffset; 7068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t* dst_end; 7069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Copy the value of Index pointer that points ARM GAS /tmp/ccJrAs6S.s page 1351 7071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the current location from where the input samples to be read */ 7072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** rOffset = *readOffset; 7073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** dst_end = dst_base + dst_length; 29036 .loc 3 7074 0 29037 0062 03EB4C08 add r8, r3, ip, lsl #1 29038 .LVL4682: 7075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Loop over the blockSize */ 7077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i = blockSize; 7078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while (i > 0U) 29039 .loc 3 7079 0 29040 0066 BCF1000F cmp ip, #0 29041 006a 1BD0 beq .L2275 29042 006c 6446 mov r4, ip 29043 006e 1946 mov r1, r3 29044 .LVL4683: 29045 .L2278: 7080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 7081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* copy the sample from the circular buffer to the destination buffer */ 7082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *dst = circBuffer[rOffset]; 29046 .loc 3 7082 0 29047 0070 37F912E0 ldrsh lr, [r7, r2, lsl #1] 29048 0074 21F802EB strh lr, [r1], #2 @ movhi 29049 .LVL4684: 7083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update the input pointer */ 7085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** dst += dstInc; 7086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (dst == dst_end) 7088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 7089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** dst = dst_base; 7090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 7091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Circularly update wOffset. Watch out for positive and negative value */ 7093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** rOffset += bufferInc; 29050 .loc 3 7093 0 29051 0078 0132 adds r2, r2, #1 29052 .LVL4685: 7089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29053 .loc 3 7089 0 29054 007a 8845 cmp r8, r1 29055 007c 08BF it eq 29056 007e 1946 moveq r1, r3 29057 .LVL4686: 7094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (rOffset >= L) 29058 .loc 3 7095 0 29059 0080 9542 cmp r5, r2 7096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 7097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** rOffset -= L; 29060 .loc 3 7097 0 29061 0082 D8BF it le 29062 0084 521B suble r2, r2, r5 29063 .LVL4687: 7079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { ARM GAS /tmp/ccJrAs6S.s page 1352 29064 .loc 3 7079 0 29065 0086 013C subs r4, r4, #1 29066 .LVL4688: 29067 0088 F2D1 bne .L2278 29068 008a 6146 mov r1, ip 29069 .LVL4689: 29070 .LBE2338: 29071 .LBE2337: 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Working pointer for state buffer is updated */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** py = pState; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* blockSize samples are read from the state buffer */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1, 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** pb, pb, (int32_t) blockSize, 1, blockSize); 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Working pointer for the scratch buffer of state values */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** px = pb; 29072 .loc 81 109 0 29073 008c 9E46 mov lr, r3 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Working pointer for scratch buffer of output values */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** pScratchOut = pScr2; 29074 .loc 81 112 0 29075 008e 5C46 mov r4, fp 29076 .LVL4690: 29077 .L2279: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt = blockSize >> 2U; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** while (blkCnt > 0U) 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Perform multiplication and store in the scratch buffer */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ = ((q31_t) *px++ * coeff); 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ = ((q31_t) *px++ * coeff); 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ = ((q31_t) *px++ * coeff); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ = ((q31_t) *px++ * coeff); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Decrement loop counter */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt--; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Loop unrolling: Compute remaining outputs */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt = blockSize % 0x4U; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #else 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Initialize blkCnt with number of samples */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt = blockSize; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1353 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** while (blkCnt > 0U) 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Perform Multiplication and store in the scratch buffer */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ = ((q31_t) *px++ * coeff); 29078 .loc 81 145 0 29079 0090 3EF8022B ldrh r2, [lr], #2 29080 .LVL4691: 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 29081 .loc 81 142 0 29082 0094 0139 subs r1, r1, #1 29083 .LVL4692: 29084 .loc 81 145 0 29085 0096 12FB06F2 smulbb r2, r2, r6 29086 009a 44F8042B str r2, [r4], #4 29087 .LVL4693: 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 29088 .loc 81 142 0 29089 009e F7D1 bne .L2279 29090 00a0 009A ldr r2, [sp] 29091 00a2 5188 ldrh r1, [r2, #2] 29092 .LVL4694: 29093 .L2275: 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Decrement loop counter */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt--; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Load the coefficient value and 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * increment the coefficient buffer for the next set of state values */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** coeff = *pCoeffs++; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Read Index, from where the state buffer should be read, is calculated. */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; 29094 .loc 81 156 0 29095 00a4 4268 ldr r2, [r0, #4] 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 29096 .loc 81 153 0 29097 00a6 BAF902E0 ldrsh lr, [r10, #2] 29098 .loc 81 156 0 29099 00aa A1EB0C01 sub r1, r1, ip 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Wraparound of readIndex */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** if (readIndex < 0) 29100 .loc 81 159 0 29101 00ae 8A1A subs r2, r1, r2 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** readIndex += (int32_t) delaySize; 29102 .loc 81 161 0 29103 00b0 48BF it mi 29104 00b2 5219 addmi r2, r2, r5 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Loop over the number of taps. */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** tapCnt = (uint32_t) numTaps - 2U; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** while (tapCnt > 0U) 29105 .loc 81 167 0 ARM GAS /tmp/ccJrAs6S.s page 1354 29106 00b4 B9F10209 subs r9, r9, #2 29107 .LVL4695: 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 29108 .loc 81 156 0 29109 00b8 00F10800 add r0, r0, #8 29110 .LVL4696: 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 29111 .loc 81 153 0 29112 00bc 0AF1040A add r10, r10, #4 29113 .LVL4697: 29114 .loc 81 167 0 29115 00c0 31D0 beq .L2282 29116 00c2 CDF830B0 str fp, [sp, #48] 29117 00c6 8346 mov fp, r0 29118 .LVL4698: 29119 .L2281: 29120 .LBB2339: 29121 .LBB2340: 7079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29122 .loc 3 7079 0 29123 00c8 BCF1000F cmp ip, #0 29124 00cc 1FD0 beq .L2288 29125 00ce 6046 mov r0, ip 29126 00d0 1946 mov r1, r3 29127 .LVL4699: 29128 .L2285: 7082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29129 .loc 3 7082 0 29130 00d2 37F91240 ldrsh r4, [r7, r2, lsl #1] 29131 00d6 21F8024B strh r4, [r1], #2 @ movhi 29132 .LVL4700: 7093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29133 .loc 3 7093 0 29134 00da 0132 adds r2, r2, #1 29135 .LVL4701: 7089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29136 .loc 3 7089 0 29137 00dc 8845 cmp r8, r1 29138 00de 08BF it eq 29139 00e0 1946 moveq r1, r3 29140 .LVL4702: 7095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29141 .loc 3 7095 0 29142 00e2 9542 cmp r5, r2 29143 .loc 3 7097 0 29144 00e4 D8BF it le 29145 00e6 521B suble r2, r2, r5 29146 .LVL4703: 7079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29147 .loc 3 7079 0 29148 00e8 0138 subs r0, r0, #1 29149 .LVL4704: 29150 00ea F2D1 bne .L2285 29151 .LBE2340: 29152 .LBE2339: 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Working pointer for state buffer is updated */ ARM GAS /tmp/ccJrAs6S.s page 1355 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** py = pState; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* blockSize samples are read from the state buffer */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1, 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** pb, pb, (int32_t) blockSize, 1, blockSize); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Working pointer for the scratch buffer of state values */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** px = pb; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Working pointer for scratch buffer of output values */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** pScratchOut = pScr2; 29153 .loc 81 180 0 29154 00ec 0C98 ldr r0, [sp, #48] 29155 .LVL4705: 29156 .LBB2342: 29157 .LBB2341: 7079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29158 .loc 3 7079 0 29159 00ee 6446 mov r4, ip 29160 .LBE2341: 29161 .LBE2342: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 29162 .loc 81 177 0 29163 00f0 1E46 mov r6, r3 29164 .LVL4706: 29165 .L2286: 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt = blockSize >> 2U; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** while (blkCnt > 0U) 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Perform Multiply-Accumulate */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ += (q31_t) *px++ * coeff; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ += (q31_t) *px++ * coeff; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ += (q31_t) *px++ * coeff; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ += (q31_t) *px++ * coeff; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Decrement loop counter */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt--; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Loop unrolling: Compute remaining outputs */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt = blockSize % 0x4U; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #else 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Initialize blkCnt with number of samples */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt = blockSize; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** while (blkCnt > 0U) 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 1356 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Perform Multiply-Accumulate */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ += (q31_t) *px++ * coeff; 29166 .loc 81 213 0 29167 00f2 36F8022B ldrh r2, [r6], #2 29168 .LVL4707: 29169 00f6 50F8041B ldr r1, [r0], #4 29170 .LVL4708: 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 29171 .loc 81 210 0 29172 00fa 013C subs r4, r4, #1 29173 .LVL4709: 29174 .loc 81 213 0 29175 00fc 12FB0E12 smlabb r2, r2, lr, r1 29176 0100 40F8042C str r2, [r0, #-4] 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 29177 .loc 81 210 0 29178 0104 F5D1 bne .L2286 29179 0106 009A ldr r2, [sp] 29180 0108 5188 ldrh r1, [r2, #2] 29181 010a A1EB0C01 sub r1, r1, ip 29182 .LVL4710: 29183 .L2288: 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Decrement loop counter */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt--; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Load the coefficient value and 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** * increment the coefficient buffer for the next set of state values */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** coeff = *pCoeffs++; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Read Index, from where the state buffer should be read, is calculated. */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; 29184 .loc 81 224 0 29185 010e 5BF8042B ldr r2, [fp], #4 29186 .LVL4711: 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 29187 .loc 81 221 0 29188 0112 3AF902EB ldrsh lr, [r10], #2 29189 .LVL4712: 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Wraparound of readIndex */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** if (readIndex < 0) 29190 .loc 81 227 0 29191 0116 8A1A subs r2, r1, r2 29192 .LVL4713: 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** readIndex += (int32_t) delaySize; 29193 .loc 81 229 0 29194 0118 48BF it mi 29195 011a 5219 addmi r2, r2, r5 29196 .LVL4714: 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 29197 .loc 81 167 0 29198 011c B9F10109 subs r9, r9, #1 29199 .LVL4715: 29200 0120 D2D1 bne .L2281 ARM GAS /tmp/ccJrAs6S.s page 1357 29201 0122 DDF830B0 ldr fp, [sp, #48] 29202 .LVL4716: 29203 .L2282: 29204 .LBB2343: 29205 .LBB2344: 7079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29206 .loc 3 7079 0 29207 0126 BCF1000F cmp ip, #0 29208 012a 26D0 beq .L2270 29209 012c 6046 mov r0, ip 29210 012e 1946 mov r1, r3 29211 .LVL4717: 29212 .L2292: 7082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29213 .loc 3 7082 0 29214 0130 37F91240 ldrsh r4, [r7, r2, lsl #1] 29215 0134 21F8024B strh r4, [r1], #2 @ movhi 29216 .LVL4718: 7093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29217 .loc 3 7093 0 29218 0138 0132 adds r2, r2, #1 29219 .LVL4719: 7089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29220 .loc 3 7089 0 29221 013a 8845 cmp r8, r1 29222 013c 08BF it eq 29223 013e 1946 moveq r1, r3 29224 .LVL4720: 7095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29225 .loc 3 7095 0 29226 0140 9542 cmp r5, r2 29227 .loc 3 7097 0 29228 0142 D8BF it le 29229 0144 521B suble r2, r2, r5 29230 .LVL4721: 7079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29231 .loc 3 7079 0 29232 0146 0138 subs r0, r0, #1 29233 .LVL4722: 29234 0148 F2D1 bne .L2292 29235 014a 6446 mov r4, ip 29236 .LBE2344: 29237 .LBE2343: 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Decrement loop counter */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** tapCnt--; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Compute last tap without the final read of pTapDelay */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Working pointer for state buffer is updated */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** py = pState; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* blockSize samples are read from the state buffer */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1, 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** pb, pb, (int32_t) blockSize, 1, blockSize); ARM GAS /tmp/ccJrAs6S.s page 1358 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Working pointer for the scratch buffer of state values */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** px = pb; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Working pointer for scratch buffer of output values */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** pScratchOut = pScr2; 29238 .loc 81 249 0 29239 014c 5846 mov r0, fp 29240 .LVL4723: 29241 .L2293: 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt = blockSize >> 2U; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** while (blkCnt > 0U) 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Perform Multiply-Accumulate */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ += (q31_t) *px++ * coeff; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ += (q31_t) *px++ * coeff; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ += (q31_t) *px++ * coeff; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ += (q31_t) *px++ * coeff; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Decrement loop counter */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt--; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Loop unrolling: Compute remaining outputs */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt = blockSize % 0x4U; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #else 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Initialize blkCnt with number of samples */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt = blockSize; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** while (blkCnt > 0U) 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Perform Multiply-Accumulate */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pScratchOut++ += (q31_t) *px++ * coeff; 29242 .loc 81 282 0 29243 014e 33F8022B ldrh r2, [r3], #2 29244 .LVL4724: 29245 0152 50F8041B ldr r1, [r0], #4 29246 .LVL4725: 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 29247 .loc 81 279 0 29248 0156 013C subs r4, r4, #1 29249 .LVL4726: 29250 .loc 81 282 0 29251 0158 12FB0E12 smlabb r2, r2, lr, r1 29252 015c 40F8042C str r2, [r0, #-4] 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 29253 .loc 81 279 0 ARM GAS /tmp/ccJrAs6S.s page 1359 29254 0160 F5D1 bne .L2293 29255 0162 019A ldr r2, [sp, #4] 29256 .LVL4727: 29257 .L2294: 29258 .LBB2345: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Decrement loop counter */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt--; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* All the output values are in pScratchOut buffer. 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** Convert them into 1.15 format, saturate and store in the destination buffer. */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt = blockSize >> 2U; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** while (blkCnt > 0U) 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** in1 = *pScr2++; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** in2 = *pScr2++; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #else 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** in1 = *pScr2++; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** in2 = *pScr2++; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #else 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Decrement loop counter */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt--; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Loop unrolling: Compute remaining outputs */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt = blockSize % 0x4U; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #else 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Initialize blkCnt with number of samples */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt = blockSize; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** while (blkCnt > 0U) 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16); 29259 .loc 81 331 0 29260 0164 5BF8043B ldr r3, [fp], #4 29261 .LVL4728: ARM GAS /tmp/ccJrAs6S.s page 1360 29262 .LBE2345: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 29263 .loc 81 329 0 29264 0168 BCF1010C subs ip, ip, #1 29265 .LVL4729: 29266 .LBB2346: 29267 .loc 81 331 0 29268 016c 4FEAE333 asr r3, r3, #15 29269 .syntax unified 29270 @ 331 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c" 29271 0170 03F30F03 ssat r3, #16, r3 29272 @ 0 "" 2 29273 .LVL4730: 29274 .thumb 29275 .syntax unified 29276 .LBE2346: 29277 0174 22F8023B strh r3, [r2], #2 @ movhi 29278 .LVL4731: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** { 29279 .loc 81 329 0 29280 0178 F4D1 bne .L2294 29281 .LVL4732: 29282 .L2270: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** /* Decrement loop counter */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** blkCnt--; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c **** } 29283 .loc 81 337 0 29284 017a 03B0 add sp, sp, #12 29285 .LCFI225: 29286 .cfi_def_cfa_offset 36 29287 .LVL4733: 29288 @ sp needed 29289 017c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 29290 .cfi_endproc 29291 .LFE226: 29293 .section .text.arm_fir_sparse_q31,"ax",%progbits 29294 .align 1 29295 .p2align 2,,3 29296 .global arm_fir_sparse_q31 29297 .syntax unified 29298 .thumb 29299 .thumb_func 29300 .fpu fpv4-sp-d16 29302 arm_fir_sparse_q31: 29303 .LFB227: 29304 .file 82 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * Title: arm_fir_sparse_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * Description: Q31 sparse FIR filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * ARM GAS /tmp/ccJrAs6S.s page 1361 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** @addtogroup FIR_Sparse 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** @brief Processing function for the Q31 sparse FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** @param[in] S points to an instance of the Q31 sparse FIR structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** @param[in] pScratchIn points to a temporary buffer of size blockSize 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** @param[in] blockSize number of input samples to process 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** The function is implemented using an internal 32-bit accumulator. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** The 1.31 x 1.31 multiplications are truncated to 2.30 format. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** This leads to loss of precision on the intermediate multiplications and provides 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** If the accumulator result overflows, it wraps around rather than saturate. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** In order to avoid overflows the input signal or coefficients must be scaled down 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** void arm_fir_sparse_q31( 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** arm_fir_sparse_instance_q31 * S, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** const q31_t * pSrc, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** q31_t * pDst, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** q31_t * pScratchIn, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** uint32_t blockSize) 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29305 .loc 82 63 0 29306 .cfi_startproc ARM GAS /tmp/ccJrAs6S.s page 1362 29307 @ args = 4, pretend = 0, frame = 32 29308 @ frame_needed = 0, uses_anonymous_args = 0 29309 .LVL4734: 29310 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 29311 .LCFI226: 29312 .cfi_def_cfa_offset 36 29313 .cfi_offset 4, -36 29314 .cfi_offset 5, -32 29315 .cfi_offset 6, -28 29316 .cfi_offset 7, -24 29317 .cfi_offset 8, -20 29318 .cfi_offset 9, -16 29319 .cfi_offset 10, -12 29320 .cfi_offset 11, -8 29321 .cfi_offset 14, -4 29322 0004 89B0 sub sp, sp, #36 29323 .LCFI227: 29324 .cfi_def_cfa_offset 72 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** q31_t *pState = S->pState; /* State pointer */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 29325 .loc 82 65 0 29326 0006 8768 ldr r7, [r0, #8] 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** q31_t *pState = S->pState; /* State pointer */ 29327 .loc 82 63 0 29328 0008 DDF848B0 ldr fp, [sp, #72] 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** q31_t *px; /* Scratch buffer pointer */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** q31_t *py = pState; /* Temporary pointers for state buffer */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** q31_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** q31_t *pOut; /* Destination pointer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** uint32_t delaySize = S->maxDelay + blockSize; /* state length */ 29329 .loc 82 71 0 29330 000c B0F80C90 ldrh r9, [r0, #12] 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 29331 .loc 82 72 0 29332 0010 0488 ldrh r4, [r0] 29333 0012 0094 str r4, [sp] 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** int32_t readIndex; /* Read index of the state buffer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** uint32_t tapCnt, blkCnt; /* loop counters */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** q31_t coeff = *pCoeffs++; /* Read the first coefficient value */ 29334 .loc 82 75 0 29335 0014 3E68 ldr r6, [r7] 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 29336 .loc 82 64 0 29337 0016 D0F804C0 ldr ip, [r0, #4] 29338 .LVL4735: 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** uint32_t delaySize = S->maxDelay + blockSize; /* state length */ 29339 .loc 82 70 0 29340 001a 0569 ldr r5, [r0, #16] 29341 .LBB2347: 29342 .LBB2348: 6924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29343 .loc 3 6924 0 29344 001c B0F80280 ldrh r8, [r0, #2] 29345 .LBE2348: 29346 .LBE2347: 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** q31_t *pState = S->pState; /* State pointer */ ARM GAS /tmp/ccJrAs6S.s page 1363 29347 .loc 82 63 0 29348 0020 0692 str r2, [sp, #24] 29349 0022 9E46 mov lr, r3 29350 .LVL4736: 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 29351 .loc 82 71 0 29352 0024 09EB0B04 add r4, r9, fp 29353 .LVL4737: 29354 .LBB2353: 29355 .LBB2349: 6929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29356 .loc 3 6929 0 29357 0028 BBF1000F cmp fp, #0 29358 002c 00F0B180 beq .L2324 29359 0030 5B46 mov r3, fp 29360 .LVL4738: 29361 .L2326: 6932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29362 .loc 3 6932 0 29363 0032 51F8042B ldr r2, [r1], #4 29364 .LVL4739: 29365 0036 4CF82820 str r2, [ip, r8, lsl #2] 29366 .LVL4740: 6938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (wOffset >= L) 29367 .loc 3 6938 0 29368 003a 08F10108 add r8, r8, #1 29369 .LVL4741: 6939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** wOffset -= L; 29370 .loc 3 6939 0 29371 003e 4445 cmp r4, r8 6940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29372 .loc 3 6940 0 29373 0040 D8BF it le 29374 0042 A8EB0408 suble r8, r8, r4 29375 .LVL4742: 6929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29376 .loc 3 6929 0 29377 0046 013B subs r3, r3, #1 29378 .LVL4743: 29379 0048 F3D1 bne .L2326 29380 .LBE2349: 29381 .LBE2353: 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** q31_t in; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** q63_t out; /* Temporary output variable */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* BlockSize of Input samples are copied into the state buffer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* StateIndex points to the starting position to write in the state buffer */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1, 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** (int32_t *) pSrc, 1, blockSize); 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Read Index, from where the state buffer should be read, is calculated. */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; 29382 .loc 82 86 0 29383 004a 1FFA88F3 uxth r3, r8 29384 .LVL4744: 29385 004e A3EB0B02 sub r2, r3, fp ARM GAS /tmp/ccJrAs6S.s page 1364 29386 0052 2B68 ldr r3, [r5] 29387 0054 0792 str r2, [sp, #28] 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Wraparound of readIndex */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** if (readIndex < 0) 29388 .loc 82 89 0 29389 0056 D31A subs r3, r2, r3 29390 .LBB2354: 29391 .LBB2350: 6947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29392 .loc 3 6947 0 29393 0058 A0F80280 strh r8, [r0, #2] @ movhi 29394 .LVL4745: 29395 .LBE2350: 29396 .LBE2354: 29397 .loc 82 89 0 29398 005c 00F19180 bmi .L2349 29399 .LVL4746: 29400 .LBB2355: 29401 .LBB2356: 6973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29402 .loc 3 6973 0 29403 0060 0EEB8B0A add r10, lr, fp, lsl #2 29404 .LVL4747: 29405 .L2348: 29406 .LBE2356: 29407 .LBE2355: 29408 .LBB2361: 29409 .LBB2351: 6929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29410 .loc 3 6929 0 29411 0064 5946 mov r1, fp 29412 0066 7246 mov r2, lr 29413 .LVL4748: 29414 .L2331: 29415 .LBE2351: 29416 .LBE2361: 29417 .LBB2362: 29418 .LBB2357: 6981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29419 .loc 3 6981 0 29420 0068 5CF82300 ldr r0, [ip, r3, lsl #2] 29421 006c 42F8040B str r0, [r2], #4 29422 .LVL4749: 6992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29423 .loc 3 6992 0 29424 0070 0133 adds r3, r3, #1 29425 .LVL4750: 6988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29426 .loc 3 6988 0 29427 0072 9245 cmp r10, r2 29428 0074 08BF it eq 29429 0076 7246 moveq r2, lr 29430 .LVL4751: 6994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29431 .loc 3 6994 0 29432 0078 9C42 cmp r4, r3 ARM GAS /tmp/ccJrAs6S.s page 1365 6996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29433 .loc 3 6996 0 29434 007a D8BF it le 29435 007c 1B1B suble r3, r3, r4 29436 .LVL4752: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29437 .loc 3 6978 0 29438 007e 0139 subs r1, r1, #1 29439 .LVL4753: 29440 0080 F2D1 bne .L2331 29441 .LBE2357: 29442 .LBE2362: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** readIndex += (int32_t) delaySize; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Working pointer for state buffer is updated */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** py = pState; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* blockSize samples are read from the state buffer */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Working pointer for the scratch buffer of state values */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** px = pb; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Working pointer for scratch buffer of output values */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** pOut = pDst; 29443 .loc 82 105 0 29444 0082 DDF81880 ldr r8, [sp, #24] 29445 .LBB2363: 29446 .LBB2358: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29447 .loc 3 6978 0 29448 0086 5946 mov r1, fp 29449 .LVL4754: 29450 .LBE2358: 29451 .LBE2363: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 29452 .loc 82 102 0 29453 0088 7046 mov r0, lr 29454 .LVL4755: 29455 .L2332: 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt = blockSize >> 2U; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** while (blkCnt > 0U) 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Perform Multiplications and store in destination buffer */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1366 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Decrement loop counter */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt--; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Loop unrolling: Compute remaining outputs */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt = blockSize % 0x4U; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #else 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Initialize blkCnt with number of samples */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt = blockSize; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** while (blkCnt > 0U) 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Perform Multiplication and store in destination buffer */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32); 29456 .loc 82 141 0 29457 008a 50F8042B ldr r2, [r0], #4 29458 .LVL4756: 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29459 .loc 82 138 0 29460 008e 0139 subs r1, r1, #1 29461 .LVL4757: 29462 .loc 82 141 0 29463 0090 86FB0223 smull r2, r3, r6, r2 29464 0094 48F8043B str r3, [r8], #4 29465 .LVL4758: 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29466 .loc 82 138 0 29467 0098 F7D1 bne .L2332 29468 .LVL4759: 29469 .L2328: 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Decrement loop counter */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt--; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Load the coefficient value and 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * increment the coefficient buffer for the next set of state values */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** coeff = *pCoeffs++; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Read Index, from where the state buffer should be read, is calculated. */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; 29470 .loc 82 152 0 29471 009a 05F10802 add r2, r5, #8 29472 009e 0492 str r2, [sp, #16] 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 29473 .loc 82 149 0 29474 00a0 07F10802 add r2, r7, #8 29475 .loc 82 152 0 29476 00a4 6B68 ldr r3, [r5, #4] ARM GAS /tmp/ccJrAs6S.s page 1367 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 29477 .loc 82 149 0 29478 00a6 0392 str r2, [sp, #12] 29479 .LVL4760: 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Wraparound of readIndex */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** if (readIndex < 0) 29480 .loc 82 155 0 29481 00a8 079A ldr r2, [sp, #28] 29482 .LVL4761: 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 29483 .loc 82 149 0 29484 00aa D7F80490 ldr r9, [r7, #4] 29485 .LVL4762: 29486 .loc 82 155 0 29487 00ae D31A subs r3, r2, r3 29488 .LVL4763: 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** readIndex += (int32_t) delaySize; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Loop over the number of taps. */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** tapCnt = (uint32_t) numTaps - 2U; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** while (tapCnt > 0U) 29489 .loc 82 163 0 29490 00b0 009A ldr r2, [sp] 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 29491 .loc 82 157 0 29492 00b2 48BF it mi 29493 00b4 1B19 addmi r3, r3, r4 29494 .LVL4764: 29495 .loc 82 163 0 29496 00b6 023A subs r2, r2, #2 29497 .LVL4765: 29498 00b8 0592 str r2, [sp, #20] 29499 00ba 37D0 beq .L2335 29500 00bc A046 mov r8, r4 29501 .LVL4766: 29502 .L2334: 29503 .LBB2364: 29504 .LBB2365: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29505 .loc 3 6978 0 29506 00be BBF1000F cmp fp, #0 29507 00c2 22D0 beq .L2341 29508 00c4 5946 mov r1, fp 29509 00c6 7246 mov r2, lr 29510 .LVL4767: 29511 .L2338: 6981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29512 .loc 3 6981 0 29513 00c8 5CF82300 ldr r0, [ip, r3, lsl #2] 29514 00cc 42F8040B str r0, [r2], #4 29515 .LVL4768: 6992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29516 .loc 3 6992 0 ARM GAS /tmp/ccJrAs6S.s page 1368 29517 00d0 0133 adds r3, r3, #1 29518 .LVL4769: 6988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29519 .loc 3 6988 0 29520 00d2 9245 cmp r10, r2 29521 00d4 08BF it eq 29522 00d6 7246 moveq r2, lr 29523 .LVL4770: 6994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29524 .loc 3 6994 0 29525 00d8 9845 cmp r8, r3 6996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29526 .loc 3 6996 0 29527 00da D8BF it le 29528 00dc A3EB0803 suble r3, r3, r8 29529 .LVL4771: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29530 .loc 3 6978 0 29531 00e0 0139 subs r1, r1, #1 29532 .LVL4772: 29533 00e2 F1D1 bne .L2338 29534 00e4 069B ldr r3, [sp, #24] 29535 .LVL4773: 29536 00e6 5946 mov r1, fp 29537 .LVL4774: 29538 00e8 181F subs r0, r3, #4 29539 .LBE2365: 29540 .LBE2364: 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Working pointer for state buffer is updated */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** py = pState; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* blockSize samples are read from the state buffer */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Working pointer for the scratch buffer of state values */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** px = pb; 29541 .loc 82 173 0 29542 00ea 7546 mov r5, lr 29543 .LVL4775: 29544 .L2339: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Working pointer for scratch buffer of output values */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** pOut = pDst; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt = blockSize >> 2U; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** while (blkCnt > 0U) 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Perform Multiply-Accumulate */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out = *pOut; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out += ((q63_t) *px++ * coeff) >> 32; ARM GAS /tmp/ccJrAs6S.s page 1369 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (out); 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out = *pOut; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out += ((q63_t) *px++ * coeff) >> 32; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (out); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out = *pOut; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out += ((q63_t) *px++ * coeff) >> 32; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (out); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out = *pOut; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out += ((q63_t) *px++ * coeff) >> 32; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (out); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Decrement loop counter */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt--; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Loop unrolling: Compute remaining outputs */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt = blockSize % 0x4U; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #else 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Initialize blkCnt with number of samples */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt = blockSize; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** while (blkCnt > 0U) 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Perform Multiply-Accumulate */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out = *pOut; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out += ((q63_t) *px++ * coeff) >> 32; 29545 .loc 82 221 0 29546 00ec 55F8046B ldr r6, [r5], #4 29547 .LVL4776: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out += ((q63_t) *px++ * coeff) >> 32; 29548 .loc 82 220 0 29549 00f0 50F8044F ldr r4, [r0, #4]! 29550 .LVL4777: 29551 .loc 82 221 0 29552 00f4 89FB0667 smull r6, r7, r9, r6 29553 00f8 FB17 asrs r3, r7, #31 29554 00fa 0097 str r7, [sp] 29555 00fc 0193 str r3, [sp, #4] 29556 00fe DDE90023 ldrd r2, [sp] 29557 0102 1219 adds r2, r2, r4 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29558 .loc 82 217 0 29559 0104 0139 subs r1, r1, #1 29560 .LVL4778: 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (out); 29561 .loc 82 222 0 29562 0106 0260 str r2, [r0] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29563 .loc 82 217 0 29564 0108 F0D1 bne .L2339 ARM GAS /tmp/ccJrAs6S.s page 1370 29565 .LVL4779: 29566 .L2341: 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Decrement loop counter */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt--; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Load the coefficient value and 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** * increment the coefficient buffer for the next set of state values */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** coeff = *pCoeffs++; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Read Index, from where the state buffer should be read, is calculated. */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; 29567 .loc 82 233 0 29568 010a 049A ldr r2, [sp, #16] 29569 010c 52F8043B ldr r3, [r2], #4 29570 0110 0492 str r2, [sp, #16] 29571 .LVL4780: 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 29572 .loc 82 230 0 29573 0112 039A ldr r2, [sp, #12] 29574 0114 52F8049B ldr r9, [r2], #4 29575 .LVL4781: 29576 0118 0392 str r2, [sp, #12] 29577 .LVL4782: 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Wraparound of readIndex */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** if (readIndex < 0) 29578 .loc 82 236 0 29579 011a 079A ldr r2, [sp, #28] 29580 .LVL4783: 29581 011c D31A subs r3, r2, r3 29582 .LVL4784: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29583 .loc 82 163 0 29584 011e 059A ldr r2, [sp, #20] 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** readIndex += (int32_t) delaySize; 29585 .loc 82 238 0 29586 0120 48BF it mi 29587 0122 4344 addmi r3, r3, r8 29588 .LVL4785: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29589 .loc 82 163 0 29590 0124 013A subs r2, r2, #1 29591 .LVL4786: 29592 0126 0592 str r2, [sp, #20] 29593 0128 C9D1 bne .L2334 29594 012a 4446 mov r4, r8 29595 .LVL4787: 29596 .L2335: 29597 .LBB2366: 29598 .LBB2367: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29599 .loc 3 6978 0 29600 012c BBF1000F cmp fp, #0 29601 0130 24D0 beq .L2323 ARM GAS /tmp/ccJrAs6S.s page 1371 29602 0132 5846 mov r0, fp 29603 0134 7146 mov r1, lr 29604 .LVL4788: 29605 .L2345: 6981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29606 .loc 3 6981 0 29607 0136 5CF82320 ldr r2, [ip, r3, lsl #2] 29608 013a 41F8042B str r2, [r1], #4 29609 .LVL4789: 6992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29610 .loc 3 6992 0 29611 013e 0133 adds r3, r3, #1 29612 .LVL4790: 6988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29613 .loc 3 6988 0 29614 0140 8A45 cmp r10, r1 29615 0142 08BF it eq 29616 0144 7146 moveq r1, lr 29617 .LVL4791: 6994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29618 .loc 3 6994 0 29619 0146 9C42 cmp r4, r3 6996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29620 .loc 3 6996 0 29621 0148 D8BF it le 29622 014a 1B1B suble r3, r3, r4 29623 .LVL4792: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29624 .loc 3 6978 0 29625 014c 0138 subs r0, r0, #1 29626 .LVL4793: 29627 014e F2D1 bne .L2345 29628 0150 069B ldr r3, [sp, #24] 29629 .LVL4794: 29630 0152 5C46 mov r4, fp 29631 .LVL4795: 29632 0154 1D1F subs r5, r3, #4 29633 .LVL4796: 29634 .L2346: 29635 .LBE2367: 29636 .LBE2366: 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Decrement tap loop counter */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** tapCnt--; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Compute last tap without the final read of pTapDelay */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Working pointer for state buffer is updated */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** py = pState; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* blockSize samples are read from the state buffer */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Working pointer for the scratch buffer of state values */ ARM GAS /tmp/ccJrAs6S.s page 1372 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** px = pb; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Working pointer for scratch buffer of output values */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** pOut = pDst; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt = blockSize >> 2U; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** while (blkCnt > 0U) 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Perform Multiply-Accumulate */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out = *pOut; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out += ((q63_t) * px++ * coeff) >> 32; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (out); 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out = *pOut; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out += ((q63_t) * px++ * coeff) >> 32; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (out); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out = *pOut; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out += ((q63_t) * px++ * coeff) >> 32; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (out); 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out = *pOut; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out += ((q63_t) * px++ * coeff) >> 32; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (out); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Decrement loop counter */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt--; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Loop unrolling: Compute remaining outputs */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt = blockSize % 0x4U; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #else 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Initialize blkCnt with number of samples */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt = blockSize; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** while (blkCnt > 0U) 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Perform Multiply-Accumulate */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out = *pOut; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out += ((q63_t) *px++ * coeff) >> 32; 29637 .loc 82 303 0 29638 0156 5EF8040B ldr r0, [lr], #4 29639 .LVL4797: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** out += ((q63_t) *px++ * coeff) >> 32; 29640 .loc 82 302 0 29641 015a 55F8046F ldr r6, [r5, #4]! 29642 .LVL4798: 29643 .loc 82 303 0 ARM GAS /tmp/ccJrAs6S.s page 1373 29644 015e 89FB0001 smull r0, r1, r9, r0 29645 0162 8A19 adds r2, r1, r6 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29646 .loc 82 299 0 29647 0164 013C subs r4, r4, #1 29648 .LVL4799: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = (q31_t) (out); 29649 .loc 82 304 0 29650 0166 2A60 str r2, [r5] 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29651 .loc 82 299 0 29652 0168 F5D1 bne .L2346 29653 016a 069A ldr r2, [sp, #24] 29654 .LVL4800: 29655 .L2347: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Decrement loop counter */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt--; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Working output pointer is updated */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** pOut = pDst; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Output is converted into 1.31 format. */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt = blockSize >> 2U; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** while (blkCnt > 0U) 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** in = *pOut << 1; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = in; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** in = *pOut << 1; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = in; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** in = *pOut << 1; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = in; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** in = *pOut << 1; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = in; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Decrement loop counter */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt--; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Loop unrolling: Compute remaining outputs */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt = blockSize % 0x4U; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #else 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Initialize blkCnt with number of samples */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt = blockSize; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** while (blkCnt > 0U) 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** in = *pOut << 1; ARM GAS /tmp/ccJrAs6S.s page 1374 29656 .loc 82 346 0 29657 016c 1368 ldr r3, [r2] 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29658 .loc 82 344 0 29659 016e BBF1010B subs fp, fp, #1 29660 .LVL4801: 29661 .loc 82 346 0 29662 0172 4FEA4303 lsl r3, r3, #1 29663 .LVL4802: 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** *pOut++ = in; 29664 .loc 82 347 0 29665 0176 42F8043B str r3, [r2], #4 29666 .LVL4803: 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29667 .loc 82 344 0 29668 017a F7D1 bne .L2347 29669 .LVL4804: 29670 .L2323: 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** /* Decrement loop counter */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** blkCnt--; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 29671 .loc 82 353 0 29672 017c 09B0 add sp, sp, #36 29673 .LCFI228: 29674 .cfi_remember_state 29675 .cfi_def_cfa_offset 36 29676 @ sp needed 29677 017e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 29678 .LVL4805: 29679 .L2349: 29680 .LCFI229: 29681 .cfi_restore_state 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** } 29682 .loc 82 91 0 29683 0182 2344 add r3, r3, r4 29684 .LVL4806: 29685 .LBB2368: 29686 .LBB2359: 6973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29687 .loc 3 6973 0 29688 0184 0EEB8B0A add r10, lr, fp, lsl #2 29689 .LVL4807: 6978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29690 .loc 3 6978 0 29691 0188 BBF1000F cmp fp, #0 29692 018c 7FF46AAF bne .L2348 29693 0190 83E7 b .L2328 29694 .LVL4808: 29695 .L2324: 29696 .LBE2359: 29697 .LBE2368: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** 29698 .loc 82 86 0 29699 0192 2B68 ldr r3, [r5] ARM GAS /tmp/ccJrAs6S.s page 1375 29700 .LVL4809: 29701 0194 CDF81C80 str r8, [sp, #28] 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29702 .loc 82 89 0 29703 0198 B8EB0303 subs r3, r8, r3 29704 .LBB2369: 29705 .LBB2352: 6947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29706 .loc 3 6947 0 29707 019c A0F80280 strh r8, [r0, #2] @ movhi 29708 .LVL4810: 29709 .LBE2352: 29710 .LBE2369: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c **** { 29711 .loc 82 89 0 29712 01a0 EFD4 bmi .L2349 29713 .LBB2370: 29714 .LBB2360: 6973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29715 .loc 3 6973 0 29716 01a2 F246 mov r10, lr 29717 01a4 79E7 b .L2328 29718 .LBE2360: 29719 .LBE2370: 29720 .cfi_endproc 29721 .LFE227: 29723 01a6 00BF .section .text.arm_fir_sparse_q7,"ax",%progbits 29724 .align 1 29725 .p2align 2,,3 29726 .global arm_fir_sparse_q7 29727 .syntax unified 29728 .thumb 29729 .thumb_func 29730 .fpu fpv4-sp-d16 29732 arm_fir_sparse_q7: 29733 .LFB228: 29734 .file 83 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * Title: arm_fir_sparse_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * Description: Q7 sparse FIR filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * www.apache.org/licenses/LICENSE-2.0 ARM GAS /tmp/ccJrAs6S.s page 1376 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** @addtogroup FIR_Sparse 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** @brief Processing function for the Q7 sparse FIR filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** @param[in] S points to an instance of the Q7 sparse FIR structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** @param[in] pScratchIn points to a temporary buffer of size blockSize 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** @param[in] pScratchOut points to a temporary buffer of size blockSize 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** @param[in] blockSize number of input samples to process 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** @return none 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** @par Scaling and Overflow Behavior 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** The function is implemented using a 32-bit internal accumulator. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** Both coefficients and state variables are represented in 1.7 format and multipli 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 f 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** There is no risk of internal overflow with this approach and the full precision 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** The accumulator is then converted to 18.7 format by discarding the low 7 bits. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** Finally, the result is truncated to 1.7 format. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** void arm_fir_sparse_q7( 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** arm_fir_sparse_instance_q7 * S, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** const q7_t * pSrc, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q7_t * pDst, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q7_t * pScratchIn, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q31_t * pScratchOut, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** uint32_t blockSize) 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 29735 .loc 83 66 0 29736 .cfi_startproc 29737 @ args = 8, pretend = 0, frame = 16 29738 @ frame_needed = 0, uses_anonymous_args = 0 29739 .LVL4811: 29740 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 29741 .LCFI230: 29742 .cfi_def_cfa_offset 36 29743 .cfi_offset 4, -36 29744 .cfi_offset 5, -32 29745 .cfi_offset 6, -28 ARM GAS /tmp/ccJrAs6S.s page 1377 29746 .cfi_offset 7, -24 29747 .cfi_offset 8, -20 29748 .cfi_offset 9, -16 29749 .cfi_offset 10, -12 29750 .cfi_offset 11, -8 29751 .cfi_offset 14, -4 29752 0004 85B0 sub sp, sp, #20 29753 .LCFI231: 29754 .cfi_def_cfa_offset 56 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q7_t *pState = S->pState; /* State pointer */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 29755 .loc 83 68 0 29756 0006 D0F808B0 ldr fp, [r0, #8] 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q7_t *px; /* Scratch buffer pointer */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q7_t *py = pState; /* Temporary pointers for state buffer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q7_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q7_t *pOut = pDst; /* Destination pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** uint32_t delaySize = S->maxDelay + blockSize; /* state length */ 29757 .loc 83 74 0 29758 000a B0F80C80 ldrh r8, [r0, #12] 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q7_t *pState = S->pState; /* State pointer */ 29759 .loc 83 66 0 29760 000e DDF83CC0 ldr ip, [sp, #60] 29761 0012 0090 str r0, [sp] 29762 .LBB2371: 29763 .LBB2372: 7098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 7099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Decrement the loop counter */ 7101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i--; 7102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 7103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update the index pointer */ 7105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *readOffset = rOffset; 7106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 7107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 7110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q7 Circular write function. 7111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 7112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_circularWrite_q7( 7113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * circBuffer, 7114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t L, 7115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t * writeOffset, 7116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t bufferInc, 7117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * src, 7118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t srcInc, 7119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize) 7120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 7121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t i = 0U; 7122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t wOffset; 7123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Copy the value of Index pointer that points 7125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the current location where the input samples to be copied */ 7126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** wOffset = *writeOffset; 29764 .loc 3 7126 0 ARM GAS /tmp/ccJrAs6S.s page 1378 29765 0014 4488 ldrh r4, [r0, #2] 29766 .LBE2372: 29767 .LBE2371: 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 29768 .loc 83 67 0 29769 0016 4668 ldr r6, [r0, #4] 29770 .LVL4812: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** uint32_t delaySize = S->maxDelay + blockSize; /* state length */ 29771 .loc 83 73 0 29772 0018 D0F81090 ldr r9, [r0, #16] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 29773 .loc 83 75 0 29774 001c 0088 ldrh r0, [r0] 29775 .LVL4813: 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** int32_t readIndex; /* Read index of the state buffer */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** uint32_t tapCnt, blkCnt; /* loop counters */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of out 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q31_t in; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q7_t coeff = *pCoeffs++; /* Read the coefficient value */ 29776 .loc 83 80 0 29777 001e 9BF90070 ldrsb r7, [fp] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 29778 .loc 83 75 0 29779 0022 0190 str r0, [sp, #4] 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q7_t *pState = S->pState; /* State pointer */ 29780 .loc 83 66 0 29781 0024 DDF838E0 ldr lr, [sp, #56] 29782 .LVL4814: 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 29783 .loc 83 74 0 29784 0028 08EB0C05 add r5, r8, ip 29785 .LVL4815: 29786 .LBB2379: 29787 .LBB2373: 7127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Loop over the blockSize */ 7129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i = blockSize; 7130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while (i > 0U) 29788 .loc 3 7131 0 29789 002c BCF1000F cmp ip, #0 29790 0030 00F0AE80 beq .L2376 29791 0034 01EB0C08 add r8, r1, ip 29792 .LVL4816: 29793 .L2378: 7132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 7133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* copy the input sample to the circular buffer */ 7134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** circBuffer[wOffset] = *src; 29794 .loc 3 7134 0 29795 0038 11F9010B ldrsb r0, [r1], #1 29796 .LVL4817: 29797 003c 3055 strb r0, [r6, r4] 29798 .LVL4818: 7135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update the input pointer */ 7137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** src += srcInc; 7138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccJrAs6S.s page 1379 7139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Circularly update wOffset. Watch out for positive and negative value */ 7140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** wOffset += bufferInc; 29799 .loc 3 7140 0 29800 003e 0134 adds r4, r4, #1 29801 .LVL4819: 7141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (wOffset >= L) 29802 .loc 3 7141 0 29803 0040 A542 cmp r5, r4 7142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** wOffset -= L; 29804 .loc 3 7142 0 29805 0042 D8BF it le 29806 0044 641B suble r4, r4, r5 29807 .LVL4820: 7131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29808 .loc 3 7131 0 29809 0046 8845 cmp r8, r1 29810 0048 F6D1 bne .L2378 29811 .LBE2373: 29812 .LBE2379: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q7_t in1, in2, in3, in4; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #endif 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* BlockSize of Input samples are copied into the state buffer */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* StateIndex points to the starting position to write in the state buffer */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1, blockSize); 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Loop over the number of taps. */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** tapCnt = numTaps; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Read Index, from where the state buffer should be read, is calculated. */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; 29813 .loc 83 94 0 29814 004a A1B2 uxth r1, r4 29815 .LVL4821: 29816 004c D9F80080 ldr r8, [r9] 29817 .LBB2380: 29818 .LBB2374: 7143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Decrement the loop counter */ 7145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i--; 7146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 7147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update the index pointer */ 7149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *writeOffset = (uint16_t)wOffset; 29819 .loc 3 7149 0 29820 0050 A0B2 uxth r0, r4 29821 .LBE2374: 29822 .LBE2380: 29823 .loc 83 94 0 29824 0052 A1EB0C01 sub r1, r1, ip 29825 .LBB2381: 29826 .LBB2375: 29827 .loc 3 7149 0 29828 0056 009C ldr r4, [sp] 29829 .LVL4822: ARM GAS /tmp/ccJrAs6S.s page 1380 29830 .LBE2375: 29831 .LBE2381: 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Wraparound of readIndex */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** if (readIndex < 0) 29832 .loc 83 97 0 29833 0058 B1EB0801 subs r1, r1, r8 29834 .LBB2382: 29835 .LBB2376: 29836 .loc 3 7149 0 29837 005c 6080 strh r0, [r4, #2] @ movhi 29838 .LVL4823: 29839 .LBE2376: 29840 .LBE2382: 29841 .loc 83 97 0 29842 005e 00F18F80 bmi .L2401 29843 .LVL4824: 29844 .LBB2383: 29845 .LBB2384: 7150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 7151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 7154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q7 Circular Read function. 7155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 7156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_circularRead_q7( 7157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * circBuffer, 7158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t L, 7159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t * readOffset, 7160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t bufferInc, 7161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * dst, 7162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * dst_base, 7163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t dst_length, 7164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t dstInc, 7165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize) 7166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 7167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t i = 0; 7168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t rOffset; 7169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t* dst_end; 7170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Copy the value of Index pointer that points 7172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the current location from where the input samples to be read */ 7173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** rOffset = *readOffset; 7174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** dst_end = dst_base + dst_length; 29846 .loc 3 7175 0 29847 0062 03EB0C04 add r4, r3, ip 29848 .LVL4825: 29849 .L2400: 29850 .LBE2384: 29851 .LBE2383: 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** q7_t *pState = S->pState; /* State pointer */ 29852 .loc 83 66 0 29853 0066 E046 mov r8, ip 29854 0068 1846 mov r0, r3 29855 .LVL4826: 29856 .L2383: ARM GAS /tmp/ccJrAs6S.s page 1381 29857 .LBB2388: 29858 .LBB2385: 7176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Loop over the blockSize */ 7178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i = blockSize; 7179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while (i > 0U) 7181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 7182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* copy the sample from the circular buffer to the destination buffer */ 7183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *dst = circBuffer[rOffset]; 29859 .loc 3 7183 0 29860 006a 16F901A0 ldrsb r10, [r6, r1] 29861 006e 00F801AB strb r10, [r0], #1 29862 .LVL4827: 7184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update the input pointer */ 7186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** dst += dstInc; 7187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (dst == dst_end) 7189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 7190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** dst = dst_base; 7191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 7192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Circularly update rOffset. Watch out for positive and negative value */ 7194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** rOffset += bufferInc; 29863 .loc 3 7194 0 29864 0072 0131 adds r1, r1, #1 29865 .LVL4828: 7190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29866 .loc 3 7190 0 29867 0074 8442 cmp r4, r0 29868 0076 08BF it eq 29869 0078 1846 moveq r0, r3 29870 .LVL4829: 7195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 7196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (rOffset >= L) 29871 .loc 3 7196 0 29872 007a 8D42 cmp r5, r1 7197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 7198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** rOffset -= L; 29873 .loc 3 7198 0 29874 007c D8BF it le 29875 007e 491B suble r1, r1, r5 29876 .LVL4830: 7180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29877 .loc 3 7180 0 29878 0080 B8F10108 subs r8, r8, #1 29879 .LVL4831: 29880 0084 F1D1 bne .L2383 29881 .LBE2385: 29882 .LBE2388: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** readIndex += (int32_t) delaySize; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Working pointer for state buffer is updated */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** py = pState; ARM GAS /tmp/ccJrAs6S.s page 1382 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* blockSize samples are read from the state buffer */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** pb, pb, (int32_t) blockSize, 1, blockSize); 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Working pointer for the scratch buffer of state values */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** px = pb; 29883 .loc 83 110 0 29884 0086 1846 mov r0, r3 29885 .LVL4832: 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Working pointer for scratch buffer of output values */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** pScratchOut = pScr2; 29886 .loc 83 113 0 29887 0088 F046 mov r8, lr 29888 .LVL4833: 29889 .L2384: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt = blockSize >> 2U; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** while (blkCnt > 0U) 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Perform multiplication and store in the scratch buffer */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = ((q31_t) *px++ * coeff); 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = ((q31_t) *px++ * coeff); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = ((q31_t) *px++ * coeff); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = ((q31_t) *px++ * coeff); 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Decrement loop counter */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt--; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Loop unrolling: Compute remaining outputs */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt = blockSize % 0x4U; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #else 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Initialize blkCnt with number of samples */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt = blockSize; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** while (blkCnt > 0U) 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Perform Multiplication and store in the scratch buffer */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = ((q31_t) *px++ * coeff); 29890 .loc 83 146 0 29891 008a 10F9011B ldrsb r1, [r0], #1 29892 .LVL4834: 29893 008e 11FB07F1 smulbb r1, r1, r7 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 29894 .loc 83 143 0 29895 0092 A042 cmp r0, r4 ARM GAS /tmp/ccJrAs6S.s page 1383 29896 .loc 83 146 0 29897 0094 48F8041B str r1, [r8], #4 29898 .LVL4835: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 29899 .loc 83 143 0 29900 0098 F7D1 bne .L2384 29901 009a 0099 ldr r1, [sp] 29902 009c 4888 ldrh r0, [r1, #2] 29903 .LVL4836: 29904 .L2380: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Decrement loop counter */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt--; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Load the coefficient value and 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * increment the coefficient buffer for the next set of state values */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** coeff = *pCoeffs++; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Read Index, from where the state buffer should be read, is calculated. */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; 29905 .loc 83 157 0 29906 009e D9F80410 ldr r1, [r9, #4] 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 29907 .loc 83 154 0 29908 00a2 9BF90170 ldrsb r7, [fp, #1] 29909 .LVL4837: 29910 .loc 83 157 0 29911 00a6 A0EB0C00 sub r0, r0, ip 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Wraparound of readIndex */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** if (readIndex < 0) 29912 .loc 83 160 0 29913 00aa 411A subs r1, r0, r1 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 29914 .loc 83 157 0 29915 00ac 0290 str r0, [sp, #8] 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** readIndex += (int32_t) delaySize; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Loop over the number of taps. */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** tapCnt = (uint32_t) numTaps - 2U; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** while (tapCnt > 0U) 29916 .loc 83 168 0 29917 00ae 0198 ldr r0, [sp, #4] 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 29918 .loc 83 162 0 29919 00b0 48BF it mi 29920 00b2 4919 addmi r1, r1, r5 29921 .loc 83 168 0 29922 00b4 B0F1020A subs r10, r0, #2 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 29923 .loc 83 157 0 29924 00b8 09F10809 add r9, r9, #8 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** ARM GAS /tmp/ccJrAs6S.s page 1384 29925 .loc 83 154 0 29926 00bc 0BF10208 add r8, fp, #2 29927 .LVL4838: 29928 .loc 83 168 0 29929 00c0 33D0 beq .L2386 29930 00c2 08EB0A00 add r0, r8, r10 29931 00c6 0190 str r0, [sp, #4] 29932 .LVL4839: 29933 00c8 0392 str r2, [sp, #12] 29934 00ca 6046 mov r0, ip 29935 00cc 029A ldr r2, [sp, #8] 29936 .LVL4840: 29937 00ce DDF804C0 ldr ip, [sp, #4] 29938 .LVL4841: 29939 .L2387: 29940 .LBB2389: 29941 .LBB2390: 7180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29942 .loc 3 7180 0 29943 00d2 F8B1 cbz r0, .L2393 29944 00d4 8246 mov r10, r0 29945 00d6 1A46 mov r2, r3 29946 .LVL4842: 29947 .L2390: 7183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29948 .loc 3 7183 0 29949 00d8 16F901B0 ldrsb fp, [r6, r1] 29950 00dc 02F801BB strb fp, [r2], #1 29951 .LVL4843: 7194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 29952 .loc 3 7194 0 29953 00e0 0131 adds r1, r1, #1 29954 .LVL4844: 7190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 29955 .loc 3 7190 0 29956 00e2 9442 cmp r4, r2 29957 00e4 08BF it eq 29958 00e6 1A46 moveq r2, r3 29959 .LVL4845: 7196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29960 .loc 3 7196 0 29961 00e8 8D42 cmp r5, r1 29962 .loc 3 7198 0 29963 00ea D8BF it le 29964 00ec 491B suble r1, r1, r5 29965 .LVL4846: 7180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 29966 .loc 3 7180 0 29967 00ee BAF1010A subs r10, r10, #1 29968 .LVL4847: 29969 00f2 F1D1 bne .L2390 29970 00f4 AEF1040B sub fp, lr, #4 29971 .LBE2390: 29972 .LBE2389: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Working pointer for state buffer is updated */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** py = pState; ARM GAS /tmp/ccJrAs6S.s page 1385 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* blockSize samples are read from the state buffer */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** pb, pb, (int32_t) blockSize, 1, blockSize); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Working pointer for the scratch buffer of state values */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** px = pb; 29973 .loc 83 178 0 29974 00f8 9A46 mov r10, r3 29975 .LVL4848: 29976 .L2391: 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Working pointer for scratch buffer of output values */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** pScratchOut = pScr2; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt = blockSize >> 2U; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** while (blkCnt > 0U) 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Perform Multiply-Accumulate */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in = *pScratchOut + ((q31_t) * px++ * coeff); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = in; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in = *pScratchOut + ((q31_t) * px++ * coeff); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = in; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in = *pScratchOut + ((q31_t) * px++ * coeff); 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = in; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in = *pScratchOut + ((q31_t) * px++ * coeff); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = in; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Decrement loop counter */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt--; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Loop unrolling: Compute remaining outputs */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt = blockSize % 0x4U; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #else 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Initialize blkCnt with number of samples */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt = blockSize; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** while (blkCnt > 0U) 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Perform Multiply-Accumulate */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in = *pScratchOut + ((q31_t) *px++ * coeff); 29977 .loc 83 218 0 29978 00fa 1AF9012B ldrsb r2, [r10], #1 29979 .LVL4849: 29980 00fe 5BF8041F ldr r1, [fp, #4]! 29981 .LVL4850: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { ARM GAS /tmp/ccJrAs6S.s page 1386 29982 .loc 83 215 0 29983 0102 A245 cmp r10, r4 29984 .loc 83 218 0 29985 0104 12FB0712 smlabb r2, r2, r7, r1 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = in; 29986 .loc 83 219 0 29987 0108 CBF80020 str r2, [fp] 29988 .LVL4851: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 29989 .loc 83 215 0 29990 010c F5D1 bne .L2391 29991 010e 009A ldr r2, [sp] 29992 0110 5288 ldrh r2, [r2, #2] 29993 0112 121A subs r2, r2, r0 29994 .LVL4852: 29995 .L2393: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Decrement loop counter */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt--; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Load the coefficient value and 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** * increment the coefficient buffer for the next set of state values */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** coeff = *pCoeffs++; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Read Index, from where the state buffer should be read, is calculated. */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; 29996 .loc 83 230 0 29997 0114 59F8041B ldr r1, [r9], #4 29998 .LVL4853: 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 29999 .loc 83 227 0 30000 0118 18F9017B ldrsb r7, [r8], #1 30001 .LVL4854: 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Wraparound of readIndex */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** if (readIndex < 0) 30002 .loc 83 233 0 30003 011c 511A subs r1, r2, r1 30004 .LVL4855: 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** readIndex += (int32_t) delaySize; 30005 .loc 83 235 0 30006 011e 48BF it mi 30007 0120 4919 addmi r1, r1, r5 30008 .LVL4856: 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 30009 .loc 83 168 0 30010 0122 E045 cmp r8, ip 30011 0124 D5D1 bne .L2387 30012 0126 039A ldr r2, [sp, #12] 30013 0128 8446 mov ip, r0 30014 .LVL4857: 30015 .L2386: 30016 .LBB2391: 30017 .LBB2392: 7180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { ARM GAS /tmp/ccJrAs6S.s page 1387 30018 .loc 3 7180 0 30019 012a BCF1000F cmp ip, #0 30020 012e 24D0 beq .L2375 30021 0130 E046 mov r8, ip 30022 .LVL4858: 30023 0132 1846 mov r0, r3 30024 .LVL4859: 30025 .L2397: 7183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 30026 .loc 3 7183 0 30027 0134 16F90190 ldrsb r9, [r6, r1] 30028 0138 00F8019B strb r9, [r0], #1 30029 .LVL4860: 7194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 30030 .loc 3 7194 0 30031 013c 0131 adds r1, r1, #1 30032 .LVL4861: 7190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 30033 .loc 3 7190 0 30034 013e 8442 cmp r4, r0 30035 0140 08BF it eq 30036 0142 1846 moveq r0, r3 30037 .LVL4862: 7196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 30038 .loc 3 7196 0 30039 0144 8D42 cmp r5, r1 30040 .loc 3 7198 0 30041 0146 D8BF it le 30042 0148 491B suble r1, r1, r5 30043 .LVL4863: 7180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 30044 .loc 3 7180 0 30045 014a B8F10108 subs r8, r8, #1 30046 .LVL4864: 30047 014e F1D1 bne .L2397 30048 0150 AEF10405 sub r5, lr, #4 30049 .LVL4865: 30050 .L2398: 30051 .LBE2392: 30052 .LBE2391: 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Decrement loop counter */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** tapCnt--; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Compute last tap without the final read of pTapDelay */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Working pointer for state buffer is updated */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** py = pState; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* blockSize samples are read from the state buffer */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** pb, pb, (int32_t) blockSize, 1, blockSize); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Working pointer for the scratch buffer of state values */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** px = pb; ARM GAS /tmp/ccJrAs6S.s page 1388 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Working pointer for scratch buffer of output values */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** pScratchOut = pScr2; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt = blockSize >> 2U; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** while (blkCnt > 0U) 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Perform Multiply-Accumulate */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in = *pScratchOut + ((q31_t) *px++ * coeff); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = in; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in = *pScratchOut + ((q31_t) *px++ * coeff); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = in; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in = *pScratchOut + ((q31_t) *px++ * coeff); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = in; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in = *pScratchOut + ((q31_t) *px++ * coeff); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = in; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Decrement loop counter */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt--; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Loop unrolling: Compute remaining outputs */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt = blockSize % 0x4U; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #else 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Initialize blkCnt with number of samples */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt = blockSize; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** while (blkCnt > 0U) 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Perform Multiply-Accumulate */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in = *pScratchOut + ((q31_t) *px++ * coeff); 30053 .loc 83 292 0 30054 0154 13F9011B ldrsb r1, [r3], #1 30055 .LVL4866: 30056 0158 55F8040F ldr r0, [r5, #4]! 30057 .LVL4867: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 30058 .loc 83 289 0 30059 015c A342 cmp r3, r4 30060 .loc 83 292 0 30061 015e 11FB0701 smlabb r1, r1, r7, r0 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pScratchOut++ = in; 30062 .loc 83 293 0 30063 0162 2960 str r1, [r5] 30064 .LVL4868: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 30065 .loc 83 289 0 30066 0164 F6D1 bne .L2398 ARM GAS /tmp/ccJrAs6S.s page 1389 30067 0166 9444 add ip, ip, r2 30068 .LVL4869: 30069 .L2399: 30070 .LBB2393: 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Decrement loop counter */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt--; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* All the output values are in pScratchOut buffer. 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** Convert them into 1.15 format, saturate and store in the destination buffer. */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Loop unrolling: Compute 4 outputs at a time. */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt = blockSize >> 2U; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** while (blkCnt > 0U) 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in1 = (q7_t) __SSAT(*pScr2++ >> 7, 8); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in2 = (q7_t) __SSAT(*pScr2++ >> 7, 8); 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8); 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8); 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** write_q7x4_ia (&pOut, __PACKq7(in1, in2, in3, in4)); 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Decrement loop counter */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt--; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Loop unrolling: Compute remaining outputs */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt = blockSize % 0x4U; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #else 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Initialize blkCnt with number of samples */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt = blockSize; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** while (blkCnt > 0U) 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8); 30071 .loc 83 331 0 30072 0168 5EF8043B ldr r3, [lr], #4 30073 .LVL4870: 30074 016c DB11 asrs r3, r3, #7 30075 .syntax unified 30076 @ 331 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c" 1 30077 016e 03F30703 ssat r3, #8, r3 30078 @ 0 "" 2 30079 .LVL4871: 30080 .thumb 30081 .syntax unified 30082 .LBE2393: 30083 0172 02F8013B strb r3, [r2], #1 30084 .LVL4872: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { ARM GAS /tmp/ccJrAs6S.s page 1390 30085 .loc 83 329 0 30086 0176 6245 cmp r2, ip 30087 0178 F6D1 bne .L2399 30088 .LVL4873: 30089 .L2375: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** /* Decrement loop counter */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** blkCnt--; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 30090 .loc 83 337 0 30091 017a 05B0 add sp, sp, #20 30092 .LCFI232: 30093 .cfi_remember_state 30094 .cfi_def_cfa_offset 36 30095 .LVL4874: 30096 @ sp needed 30097 017c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 30098 .LVL4875: 30099 .L2401: 30100 .LCFI233: 30101 .cfi_restore_state 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** } 30102 .loc 83 99 0 30103 0180 2944 add r1, r1, r5 30104 .LVL4876: 30105 .LBB2394: 30106 .LBB2386: 7175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 30107 .loc 3 7175 0 30108 0182 03EB0C04 add r4, r3, ip 30109 .LVL4877: 7180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 30110 .loc 3 7180 0 30111 0186 BCF1000F cmp ip, #0 30112 018a 7FF46CAF bne .L2400 30113 018e 86E7 b .L2380 30114 .LVL4878: 30115 .L2376: 30116 .LBE2386: 30117 .LBE2394: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** 30118 .loc 83 94 0 30119 0190 D9F80010 ldr r1, [r9] 30120 .LVL4879: 30121 0194 2046 mov r0, r4 30122 .LVL4880: 30123 .LBB2395: 30124 .LBB2377: 7149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 30125 .loc 3 7149 0 30126 0196 009C ldr r4, [sp] 30127 .LVL4881: 30128 .LBE2377: 30129 .LBE2395: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { ARM GAS /tmp/ccJrAs6S.s page 1391 30130 .loc 83 97 0 30131 0198 411A subs r1, r0, r1 30132 .LBB2396: 30133 .LBB2378: 7149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 30134 .loc 3 7149 0 30135 019a 6080 strh r0, [r4, #2] @ movhi 30136 .LVL4882: 30137 .LBE2378: 30138 .LBE2396: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c **** { 30139 .loc 83 97 0 30140 019c F0D4 bmi .L2401 30141 .LBB2397: 30142 .LBB2387: 7175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 30143 .loc 3 7175 0 30144 019e 1C46 mov r4, r3 30145 01a0 7DE7 b .L2380 30146 .LBE2387: 30147 .LBE2397: 30148 .cfi_endproc 30149 .LFE228: 30151 01a2 00BF .section .text.arm_iir_lattice_f32,"ax",%progbits 30152 .align 1 30153 .p2align 2,,3 30154 .global arm_iir_lattice_f32 30155 .syntax unified 30156 .thumb 30157 .thumb_func 30158 .fpu fpv4-sp-d16 30160 arm_iir_lattice_f32: 30161 .LFB229: 30162 .file 84 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f3 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * Title: arm_iir_lattice_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * Description: Floating-point IIR Lattice filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT ARM GAS /tmp/ccJrAs6S.s page 1392 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** This set of functions implements lattice filters 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** for Q15, Q31 and floating-point data types. Lattice filters are used in a 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** variety of adaptive filter applications. The filter structure has feedforward and 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** feedback components and the net impulse response is infinite length. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** The functions operate on blocks 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** of input and output data and each call to the function processes 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** blockSize samples through the filter. pSrc and 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** pDst point to input and output arrays containing blockSize values. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @par Algorithm 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** \image html IIRLattice.gif "Infinite Impulse Response Lattice filter" 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @par 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****       fN(n)   = x(n)
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****       fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ..., 1
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****       gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ..., 1
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****       y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @par 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** pkCoeffs points to array of reflection coefficients of size n 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** Reflection Coefficients are stored in time-reversed order. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @par 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 
  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****      {kN, kN-1, ..., k1}
  62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @par 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** pvCoeffs points to the array of ladder coefficients of size (n 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** Ladder coefficients are stored in time-reversed order. 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****       {vN, vN-1, ..., v0}
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @par 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** pState points to a state array of size numStages + blockSize< 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** The state variables shown in the figure above (the g values) are stored in the < 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** The state variables are updated after each block of data is processed; the coeff 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @par Instance Structure 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** The coefficients and state variables for a filter are stored together in an inst 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** A separate instance structure must be defined for each filter. 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** Coefficient arrays may be shared among several instances while state variable ar 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** There are separate instance structure declarations for each of the 3 supported d 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @par Initialization Functions ARM GAS /tmp/ccJrAs6S.s page 1393 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** There is also an associated initialization function for each data type. 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** The initialization function performs the following operations: 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** - Sets the values of the internal structure fields. 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** - Zeros out the values in the state buffer. 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** To do this manually without calling the init function, assign the follow subfiel 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to z 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @par 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** Use of the initialization function is optional. 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** However, if the initialization function is used, then the instance structure can 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** To place an instance structure into a const data section, the instance structure 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** Set the values in the state buffer to zeros and then manually initialize the ins 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 
  93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****       arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
  94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****       arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
  95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****       arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
  96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c ****
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @par 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** where numStages is the number of stages in the filter; pState 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** pkCoeffs points to array of the reflection coefficients; pvCo 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @par Fixed-Point Behavior 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** Care must be taken when using the fixed-point versions of the IIR lattice filter 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** In particular, the overflow and saturation behavior of the accumulator used in e 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** Refer to the function specific documentation below for usage guidelines. 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @addtogroup IIR_Lattice 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @{ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @brief Processing function for the floating-point IIR lattice filter. 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @param[in] S points to an instance of the floating-point IIR lattice structure 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @param[in] pSrc points to the block of input data 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @param[out] pDst points to the block of output data 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @param[in] blockSize number of samples to process 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** @return none 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** void arm_iir_lattice_f32( 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** const arm_iir_lattice_instance_f32 * S, 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** const float32_t * pSrc, 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** float32_t * pDst, 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** uint32_t blockSize) 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** { 30163 .loc 84 126 0 30164 .cfi_startproc 30165 @ args = 0, pretend = 0, frame = 8 30166 @ frame_needed = 0, uses_anonymous_args = 0 30167 .LVL4883: 30168 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 30169 .LCFI234: 30170 .cfi_def_cfa_offset 36 30171 .cfi_offset 4, -36 30172 .cfi_offset 5, -32 30173 .cfi_offset 6, -28 ARM GAS /tmp/ccJrAs6S.s page 1394 30174 .cfi_offset 7, -24 30175 .cfi_offset 8, -20 30176 .cfi_offset 9, -16 30177 .cfi_offset 10, -12 30178 .cfi_offset 11, -8 30179 .cfi_offset 14, -4 30180 0004 83B0 sub sp, sp, #12 30181 .LCFI235: 30182 .cfi_def_cfa_offset 48 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** float32_t *pState = S->pState; /* State pointer */ 30183 .loc 84 127 0 30184 0006 4468 ldr r4, [r0, #4] 30185 0008 0194 str r4, [sp, #4] 30186 .LVL4884: 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** float32_t *pStateCur; /* State current pointer */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** float32_t acc; /* Accumlator */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** float32_t fnext1, fnext2, gcurr1, gnext; /* Temporary variables for lattice stages 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** float32_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef * 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** uint32_t numStages = S->numStages; /* Number of stages */ 30187 .loc 84 132 0 30188 000a 0788 ldrh r7, [r0] 30189 .LVL4885: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** uint32_t blkCnt, tapCnt; /* Temporary variables for counts */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** float32_t gcurr2; /* Temporary variables for lattice stages 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** float32_t k1, k2; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** float32_t v1, v2, v3, v4; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** #endif 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* initialise loop count */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** blkCnt = blockSize; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Sample processing */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** while (blkCnt > 0U) 30190 .loc 84 145 0 30191 000c 83B3 cbz r3, .L2426 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** { 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Read Sample from input buffer */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* fN(n) = x(n) */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** fnext2 = *pSrc++; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Initialize Ladder coeff pointer */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** pv = &S->pvCoeffs[0]; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Initialize Reflection coeff pointer */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** pk = &S->pkCoeffs[0]; 30192 .loc 84 155 0 30193 000e D0E902B8 ldrd fp, r8, [r0, #8] 30194 0012 4FEA8709 lsl r9, r7, #2 30195 0016 08EB090A add r10, r8, r9 30196 001a 9E46 mov lr, r3 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** float32_t *pStateCur; /* State current pointer */ 30197 .loc 84 127 0 30198 001c A446 mov ip, r4 30199 .LVL4886: 30200 .L2429: ARM GAS /tmp/ccJrAs6S.s page 1395 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 30201 .loc 84 149 0 30202 001e B1EC017A vldmia.32 r1!, {s14} 30203 .LVL4887: 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Initialize state read pointer */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** px1 = pState; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Initialize state write pointer */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** px2 = pState; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Set accumulator to zero */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** acc = 0.0; 30204 .loc 84 164 0 30205 0022 9FED1B6A vldr.32 s12, .L2443 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Loop unrolling: Compute 4 taps at a time. */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** tapCnt = (numStages) >> 2U; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** while (tapCnt > 0U) 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** { 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Read gN-1(n-1) from state buffer */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** gcurr1 = *px1; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* read reflection coefficient kN */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** k1 = *pk; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** fnext1 = fnext2 - (k1 * gcurr1); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* read ladder coefficient vN */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** v1 = *pv; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* read next reflection coefficient kN-1 */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** k2 = *(pk + 1U); 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Read gN-2(n-1) from state buffer */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** gcurr2 = *(px1 + 1U); 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* read next ladder coefficient vN-1 */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** v2 = *(pv + 1U); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** fnext2 = fnext1 - (k2 * gcurr2); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** gnext = gcurr1 + (k1 * fnext1); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* read reflection coefficient kN-2 */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** k1 = *(pk + 2U); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* write gN(n) into state for next sample processing */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *px2++ = gnext; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Read gN-3(n-1) from state buffer */ ARM GAS /tmp/ccJrAs6S.s page 1396 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** gcurr1 = *(px1 + 2U); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* y(n) += gN(n) * vN */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** acc += (gnext * v1); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** fnext1 = fnext2 - (k1 * gcurr1); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** gnext = gcurr2 + (k2 * fnext2); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Read gN-4(n-1) from state buffer */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** gcurr2 = *(px1 + 3U); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* y(n) += gN-1(n) * vN-1 */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** acc += (gnext * v2); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* read reflection coefficient kN-3 */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** k2 = *(pk + 3U); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* write gN-1(n) into state for next sample processing */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *px2++ = gnext; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** fnext2 = fnext1 - (k2 * gcurr2); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** gnext = gcurr1 + (k1 * fnext1); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* read ladder coefficient vN-2 */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** v3 = *(pv + 2U); 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* y(n) += gN-2(n) * vN-2 */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** acc += (gnext * v3); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* write gN-2(n) into state for next sample processing */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *px2++ = gnext; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* update pointer */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** pk += 4U; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** gnext = (fnext2 * k2) + gcurr2; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* read next ladder coefficient vN-3 */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** v4 = *(pv + 3U); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* y(n) += gN-4(n) * vN-4 */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** acc += (gnext * v4); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* write gN-3(n) into state for next sample processing */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *px2++ = gnext; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* update pointers */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** px1 += 4U; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** pv += 4U; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1397 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Decrement loop counter */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** tapCnt--; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** } 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Loop unrolling: Compute remaining taps */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** tapCnt = numStages % 0x4U; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** #else 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Initialize tapCnt with number of samples */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** tapCnt = numStages; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** while (tapCnt > 0U) 30206 .loc 84 278 0 30207 0026 87B3 cbz r7, .L2432 30208 0028 3C46 mov r4, r7 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 30209 .loc 84 152 0 30210 002a 4646 mov r6, r8 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 30211 .loc 84 155 0 30212 002c 5D46 mov r5, fp 30213 .loc 84 278 0 30214 002e 6046 mov r0, ip 30215 .LVL4888: 30216 .L2428: 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** { 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** gcurr1 = *px1++; 30217 .loc 84 280 0 30218 0030 F0EC017A vldmia.32 r0!, {s15} 30219 .LVL4889: 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Process sample for last taps */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** fnext1 = fnext2 - ((*pk) * gcurr1); 30220 .loc 84 282 0 30221 0034 F5EC016A vldmia.32 r5!, {s13} 30222 .LVL4890: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** gnext = (fnext1 * (*pk++)) + gcurr1; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Output samples for last taps */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** acc += (gnext * (*pv++)); 30223 .loc 84 285 0 30224 0038 F6EC015A vldmia.32 r6!, {s11} 30225 .LVL4891: 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** gnext = (fnext1 * (*pk++)) + gcurr1; 30226 .loc 84 282 0 30227 003c A6EEE77A vfms.f32 s14, s13, s15 30228 .LVL4892: 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** { 30229 .loc 84 278 0 30230 0040 013C subs r4, r4, #1 30231 .LVL4893: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** gnext = (fnext1 * (*pk++)) + gcurr1; 30232 .loc 84 283 0 30233 0042 E6EE877A vfma.f32 s15, s13, s14 30234 .LVL4894: 30235 .loc 84 285 0 ARM GAS /tmp/ccJrAs6S.s page 1398 30236 0046 A5EEA76A vfma.f32 s12, s11, s15 30237 .LVL4895: 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *px2++ = gnext; 30238 .loc 84 286 0 30239 004a 40ED017A vstr.32 s15, [r0, #-4] 30240 .LVL4896: 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** { 30241 .loc 84 278 0 30242 004e EFD1 bne .L2428 30243 0050 0CEB0900 add r0, ip, r9 30244 .LVL4897: 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *px2++ = gnext; 30245 .loc 84 285 0 30246 0054 5446 mov r4, r10 30247 .LVL4898: 30248 .L2427: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** fnext2 = fnext1; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Decrement loop counter */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** tapCnt--; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** } 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* y(n) += g0(n) * v0 */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** acc += (fnext2 * (*pv)); 30249 .loc 84 294 0 30250 0056 D4ED007A vldr.32 s15, [r4] 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *px2++ = fnext2; 30251 .loc 84 296 0 30252 005a 80ED007A vstr.32 s14, [r0] 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 30253 .loc 84 294 0 30254 005e A7EE876A vfma.f32 s12, s15, s14 30255 .LVL4899: 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** { 30256 .loc 84 145 0 30257 0062 BEF1010E subs lr, lr, #1 30258 .LVL4900: 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* write out into pDst */ 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *pDst++ = acc; 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Advance the state pointer by 4 to process the next group of 4 samples */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** pState = pState + 1U; 30259 .loc 84 302 0 30260 0066 0CF1040C add ip, ip, #4 30261 .LVL4901: 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 30262 .loc 84 299 0 30263 006a A2EC016A vstmia.32 r2!, {s12} 30264 .LVL4902: 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** { 30265 .loc 84 145 0 30266 006e D6D1 bne .L2429 30267 .LVL4903: 30268 .L2426: 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1399 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Decrement loop counter */ 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** blkCnt--; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** } 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Processing is complete. Now copy last S->numStages samples to start of the buffer 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** for the preperation of next frame process */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Points to the start of the state buffer */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** pStateCur = &S->pState[0]; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** pState = &S->pState[blockSize]; 30269 .loc 84 313 0 30270 0070 019A ldr r2, [sp, #4] 30271 .LVL4904: 30272 0072 02EB8303 add r3, r2, r3, lsl #2 30273 .LVL4905: 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Copy data */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Loop unrolling: Compute 4 taps at a time. */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** tapCnt = numStages >> 2U; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** while (tapCnt > 0U) 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** { 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *pStateCur++ = *pState++; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *pStateCur++ = *pState++; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *pStateCur++ = *pState++; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *pStateCur++ = *pState++; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Decrement loop counter */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** tapCnt--; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** } 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Loop unrolling: Compute remaining taps */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** tapCnt = numStages % 0x4U; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** #else 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Initialize blkCnt with number of samples */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** tapCnt = numStages; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** while (tapCnt > 0U) 30274 .loc 84 342 0 30275 0076 2FB1 cbz r7, .L2425 30276 .LVL4906: 30277 .L2431: 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** { 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** *pStateCur++ = *pState++; 30278 .loc 84 344 0 30279 0078 53F8041B ldr r1, [r3], #4 @ float 30280 .LVL4907: 30281 007c 42F8041B str r1, [r2], #4 @ float 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** { 30282 .loc 84 342 0 30283 0080 013F subs r7, r7, #1 ARM GAS /tmp/ccJrAs6S.s page 1400 30284 .LVL4908: 30285 0082 F9D1 bne .L2431 30286 .LVL4909: 30287 .L2425: 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** /* Decrement loop counter */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** tapCnt--; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** } 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** } 30288 .loc 84 350 0 30289 0084 03B0 add sp, sp, #12 30290 .LCFI236: 30291 .cfi_remember_state 30292 .cfi_def_cfa_offset 36 30293 @ sp needed 30294 0086 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 30295 .LVL4910: 30296 .L2432: 30297 .LCFI237: 30298 .cfi_restore_state 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** 30299 .loc 84 152 0 30300 008a 4446 mov r4, r8 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c **** { 30301 .loc 84 278 0 30302 008c 6046 mov r0, ip 30303 008e E2E7 b .L2427 30304 .L2444: 30305 .align 2 30306 .L2443: 30307 0090 00000000 .word 0 30308 .cfi_endproc 30309 .LFE229: 30311 .section .text.arm_iir_lattice_init_f32,"ax",%progbits 30312 .align 1 30313 .p2align 2,,3 30314 .global arm_iir_lattice_init_f32 30315 .syntax unified 30316 .thumb 30317 .thumb_func 30318 .fpu fpv4-sp-d16 30320 arm_iir_lattice_init_f32: 30321 .LFB230: 30322 .file 85 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_in 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * Title: arm_iir_lattice_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * Description: Floating-point IIR lattice filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. ARM GAS /tmp/ccJrAs6S.s page 1401 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** @addtogroup IIR_Lattice 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** @brief Initialization function for the floating-point IIR lattice filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** @param[in] S points to an instance of the floating-point IIR lattice structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** @param[in] numStages number of stages in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numSta 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages+ 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** @param[in] pState points to state buffer. The array is of length numStages+blockSize 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** @param[in] blockSize number of samples to process 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** @return none 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** */ 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** void arm_iir_lattice_init_f32( 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** arm_iir_lattice_instance_f32 * S, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** uint16_t numStages, 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** float32_t * pkCoeffs, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** float32_t * pvCoeffs, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** float32_t * pState, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** uint32_t blockSize) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** { 30323 .loc 85 58 0 30324 .cfi_startproc 30325 @ args = 8, pretend = 0, frame = 0 30326 @ frame_needed = 0, uses_anonymous_args = 0 30327 .LVL4911: 30328 0000 70B5 push {r4, r5, r6, lr} 30329 .LCFI238: 30330 .cfi_def_cfa_offset 16 30331 .cfi_offset 4, -16 30332 .cfi_offset 5, -12 30333 .cfi_offset 6, -8 ARM GAS /tmp/ccJrAs6S.s page 1402 30334 .cfi_offset 14, -4 30335 .loc 85 58 0 30336 0002 DDE90465 ldrd r6, r5, [sp, #16] 30337 0006 0446 mov r4, r0 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** /* Assign filter taps */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** S->numStages = numStages; 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** /* Assign reflection coefficient pointer */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** S->pkCoeffs = pkCoeffs; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** /* Assign ladder coefficient pointer */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** S->pvCoeffs = pvCoeffs; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** /* Clear state buffer and size is always blockSize + numStages */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** memset(pState, 0, (numStages + blockSize) * sizeof(float32_t)); 30338 .loc 85 69 0 30339 0008 0D44 add r5, r5, r1 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** 30340 .loc 85 63 0 30341 000a 8260 str r2, [r0, #8] 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** 30342 .loc 85 60 0 30343 000c 0180 strh r1, [r0] @ movhi 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** 30344 .loc 85 66 0 30345 000e C360 str r3, [r0, #12] 30346 .loc 85 69 0 30347 0010 AA00 lsls r2, r5, #2 30348 .LVL4912: 30349 0012 3046 mov r0, r6 30350 .LVL4913: 30351 0014 0021 movs r1, #0 30352 .LVL4914: 30353 0016 FFF7FEFF bl memset 30354 .LVL4915: 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** /* Assign state pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** S->pState = pState; 30355 .loc 85 72 0 30356 001a 6660 str r6, [r4, #4] 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c **** } 30357 .loc 85 73 0 30358 001c 70BD pop {r4, r5, r6, pc} 30359 .cfi_endproc 30360 .LFE230: 30362 001e 00BF .section .text.arm_iir_lattice_init_q15,"ax",%progbits 30363 .align 1 30364 .p2align 2,,3 30365 .global arm_iir_lattice_init_q15 30366 .syntax unified 30367 .thumb 30368 .thumb_func 30369 .fpu fpv4-sp-d16 30371 arm_iir_lattice_init_q15: 30372 .LFB231: 30373 .file 86 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_in 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** /* ---------------------------------------------------------------------- ARM GAS /tmp/ccJrAs6S.s page 1403 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * Title: arm_iir_lattice_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * Description: Q15 IIR lattice filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** @addtogroup IIR_Lattice 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** @brief Initialization function for the Q15 IIR lattice filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** @param[in] S points to an instance of the Q15 IIR lattice structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** @param[in] numStages number of stages in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** @param[in] pState points to state buffer. The array is of length numStages+blockSize 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** @param[in] blockSize number of samples to process 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** @return none 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** */ 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** void arm_iir_lattice_init_q15( 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** arm_iir_lattice_instance_q15 * S, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** uint16_t numStages, 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** q15_t * pkCoeffs, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** q15_t * pvCoeffs, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** q15_t * pState, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** uint32_t blockSize) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** { ARM GAS /tmp/ccJrAs6S.s page 1404 30374 .loc 86 58 0 30375 .cfi_startproc 30376 @ args = 8, pretend = 0, frame = 0 30377 @ frame_needed = 0, uses_anonymous_args = 0 30378 .LVL4916: 30379 0000 70B5 push {r4, r5, r6, lr} 30380 .LCFI239: 30381 .cfi_def_cfa_offset 16 30382 .cfi_offset 4, -16 30383 .cfi_offset 5, -12 30384 .cfi_offset 6, -8 30385 .cfi_offset 14, -4 30386 .loc 86 58 0 30387 0002 DDE90465 ldrd r6, r5, [sp, #16] 30388 0006 0446 mov r4, r0 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** /* Assign filter taps */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** S->numStages = numStages; 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** /* Assign reflection coefficient pointer */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** S->pkCoeffs = pkCoeffs; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** /* Assign ladder coefficient pointer */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** S->pvCoeffs = pvCoeffs; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** /* Clear state buffer and size is always blockSize + numStages */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** memset(pState, 0, (numStages + blockSize) * sizeof(q15_t)); 30389 .loc 86 69 0 30390 0008 0D44 add r5, r5, r1 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** 30391 .loc 86 63 0 30392 000a 8260 str r2, [r0, #8] 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** 30393 .loc 86 60 0 30394 000c 0180 strh r1, [r0] @ movhi 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** 30395 .loc 86 66 0 30396 000e C360 str r3, [r0, #12] 30397 .loc 86 69 0 30398 0010 6A00 lsls r2, r5, #1 30399 .LVL4917: 30400 0012 3046 mov r0, r6 30401 .LVL4918: 30402 0014 0021 movs r1, #0 30403 .LVL4919: 30404 0016 FFF7FEFF bl memset 30405 .LVL4920: 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** /* Assign state pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** S->pState = pState; 30406 .loc 86 72 0 30407 001a 6660 str r6, [r4, #4] 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c **** } 30408 .loc 86 73 0 30409 001c 70BD pop {r4, r5, r6, pc} 30410 .cfi_endproc 30411 .LFE231: 30413 001e 00BF .section .text.arm_iir_lattice_init_q31,"ax",%progbits ARM GAS /tmp/ccJrAs6S.s page 1405 30414 .align 1 30415 .p2align 2,,3 30416 .global arm_iir_lattice_init_q31 30417 .syntax unified 30418 .thumb 30419 .thumb_func 30420 .fpu fpv4-sp-d16 30422 arm_iir_lattice_init_q31: 30423 .LFB232: 30424 .file 87 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_in 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * Title: arm_iir_lattice_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * Description: Initialization function for the Q31 IIR lattice filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** @addtogroup IIR_Lattice 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** @brief Initialization function for the Q31 IIR lattice filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** @param[in] S points to an instance of the Q31 IIR lattice structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** @param[in] numStages number of stages in the filter 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numSta 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages+ 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** @param[in] pState points to state buffer. The array is of length numStages+blockSize 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** @param[in] blockSize number of samples to process ARM GAS /tmp/ccJrAs6S.s page 1406 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** @return none 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** */ 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** void arm_iir_lattice_init_q31( 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** arm_iir_lattice_instance_q31 * S, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** uint16_t numStages, 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** q31_t * pkCoeffs, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** q31_t * pvCoeffs, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** q31_t * pState, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** uint32_t blockSize) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** { 30425 .loc 87 58 0 30426 .cfi_startproc 30427 @ args = 8, pretend = 0, frame = 0 30428 @ frame_needed = 0, uses_anonymous_args = 0 30429 .LVL4921: 30430 0000 70B5 push {r4, r5, r6, lr} 30431 .LCFI240: 30432 .cfi_def_cfa_offset 16 30433 .cfi_offset 4, -16 30434 .cfi_offset 5, -12 30435 .cfi_offset 6, -8 30436 .cfi_offset 14, -4 30437 .loc 87 58 0 30438 0002 DDE90465 ldrd r6, r5, [sp, #16] 30439 0006 0446 mov r4, r0 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** /* Assign filter taps */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** S->numStages = numStages; 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** /* Assign reflection coefficient pointer */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** S->pkCoeffs = pkCoeffs; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** /* Assign ladder coefficient pointer */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** S->pvCoeffs = pvCoeffs; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** /* Clear state buffer and size is always blockSize + numStages */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** memset(pState, 0, (numStages + blockSize) * sizeof(q31_t)); 30440 .loc 87 69 0 30441 0008 0D44 add r5, r5, r1 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** 30442 .loc 87 63 0 30443 000a 8260 str r2, [r0, #8] 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** 30444 .loc 87 60 0 30445 000c 0180 strh r1, [r0] @ movhi 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** 30446 .loc 87 66 0 30447 000e C360 str r3, [r0, #12] 30448 .loc 87 69 0 30449 0010 AA00 lsls r2, r5, #2 30450 .LVL4922: 30451 0012 3046 mov r0, r6 30452 .LVL4923: 30453 0014 0021 movs r1, #0 30454 .LVL4924: 30455 0016 FFF7FEFF bl memset 30456 .LVL4925: ARM GAS /tmp/ccJrAs6S.s page 1407 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** /* Assign state pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** S->pState = pState; 30457 .loc 87 72 0 30458 001a 6660 str r6, [r4, #4] 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c **** } 30459 .loc 87 73 0 30460 001c 70BD pop {r4, r5, r6, pc} 30461 .cfi_endproc 30462 .LFE232: 30464 001e 00BF .section .text.arm_iir_lattice_q15,"ax",%progbits 30465 .align 1 30466 .p2align 2,,3 30467 .global arm_iir_lattice_q15 30468 .syntax unified 30469 .thumb 30470 .thumb_func 30471 .fpu fpv4-sp-d16 30473 arm_iir_lattice_q15: 30474 .LFB233: 30475 .file 88 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q1 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * Title: arm_iir_lattice_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * Description: Q15 IIR Lattice filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** @addtogroup IIR_Lattice ARM GAS /tmp/ccJrAs6S.s page 1408 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** @brief Processing function for the Q15 IIR lattice filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** @param[in] S points to an instance of the Q15 IIR lattice structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** The function is implemented using an internal 64-bit accumulator. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** Both coefficients and state variables are represented in 1.15 format and multipl 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 f 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** There is no risk of internal overflow with this approach and the full precision 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** After all additions have been performed, the accumulator is truncated to 34.15 f 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** Lastly, the accumulator is saturated to yield a result in 1.15 format. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** void arm_iir_lattice_q15( 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** const arm_iir_lattice_instance_q15 * S, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** const q15_t * pSrc, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q15_t * pDst, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** uint32_t blockSize) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 30476 .loc 88 62 0 30477 .cfi_startproc 30478 @ args = 0, pretend = 0, frame = 48 30479 @ frame_needed = 0, uses_anonymous_args = 0 30480 .LVL4926: 30481 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 30482 .LCFI241: 30483 .cfi_def_cfa_offset 36 30484 .cfi_offset 4, -36 30485 .cfi_offset 5, -32 30486 .cfi_offset 6, -28 30487 .cfi_offset 7, -24 30488 .cfi_offset 8, -20 30489 .cfi_offset 9, -16 30490 .cfi_offset 10, -12 30491 .cfi_offset 11, -8 30492 .cfi_offset 14, -4 30493 0004 8DB0 sub sp, sp, #52 30494 .LCFI242: 30495 .cfi_def_cfa_offset 88 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q15_t *pState = S->pState; /* State pointer */ 30496 .loc 88 63 0 30497 0006 4568 ldr r5, [r0, #4] 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q15_t *pState = S->pState; /* State pointer */ 30498 .loc 88 62 0 30499 0008 0191 str r1, [sp, #4] 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q15_t *pStateCur; /* State current pointer */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q63_t acc; /* Accumlator */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q15_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** uint32_t numStages = S->numStages; /* Number of stages */ ARM GAS /tmp/ccJrAs6S.s page 1409 30500 .loc 88 68 0 30501 000a 0188 ldrh r1, [r0] 30502 .LVL4927: 30503 000c 0B91 str r1, [sp, #44] 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q15_t *pState = S->pState; /* State pointer */ 30504 .loc 88 62 0 30505 000e 9246 mov r10, r2 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q15_t *pStateCur; /* State current pointer */ 30506 .loc 88 63 0 30507 0010 0995 str r5, [sp, #36] 30508 .LVL4928: 30509 0012 4A1E subs r2, r1, #1 30510 .LVL4929: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** uint32_t blkCnt, tapCnt; /* Temporary variables for counts */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q15_t out; /* Temporary variable for output */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #if defined (ARM_MATH_DSP) && defined (ARM_MATH_LOOPUNROLL) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q15_t gnext1, gnext2; /* Temporary variables for lattice stages */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q31_t v; /* Temporary variable for ladder coefficient 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #endif 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* initialise loop count */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** blkCnt = blockSize; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #if defined (ARM_MATH_DSP) 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Sample processing */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** while (blkCnt > 0U) 30511 .loc 88 83 0 30512 0014 0A93 str r3, [sp, #40] 30513 0016 002B cmp r3, #0 30514 0018 6CD0 beq .L2452 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Read Sample from input buffer */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* fN(n) = x(n) */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fcurr = *pSrc++; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Initialize Ladder coeff pointer */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** pv = &S->pvCoeffs[0]; 30515 .loc 88 90 0 30516 001a C468 ldr r4, [r0, #12] 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Initialize Reflection coeff pointer */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** pk = &S->pkCoeffs[0]; 30517 .loc 88 93 0 30518 001c 8068 ldr r0, [r0, #8] 30519 .LVL4930: 30520 001e 0490 str r0, [sp, #16] 30521 0020 1E46 mov r6, r3 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Initialize state read pointer */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** px1 = pState; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Initialize state write pointer */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** px2 = pState; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Set accumulator to zero */ ARM GAS /tmp/ccJrAs6S.s page 1410 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** acc = 0; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Process sample for first tap */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gcurr = *px1++; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15); 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = __SSAT(fnext, 16); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr; 30522 .loc 88 111 0 30523 0022 0230 adds r0, r0, #2 30524 0024 4B00 lsls r3, r1, #1 30525 .LVL4931: 30526 0026 0690 str r0, [sp, #24] 30527 0028 04EB4101 add r1, r4, r1, lsl #1 30528 .LVL4932: 30529 002c A01C adds r0, r4, #2 30530 002e 023B subs r3, r3, #2 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 30531 .loc 88 90 0 30532 0030 0394 str r4, [sp, #12] 30533 0032 0590 str r0, [sp, #20] 30534 0034 0791 str r1, [sp, #28] 30535 0036 0893 str r3, [sp, #32] 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = __SSAT(gnext, 16); 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* write gN(n) into state for next sample processing */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *px2++ = (q15_t) gnext; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* y(n) += gN(n) * vN */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** acc += (q31_t) ((gnext * (*pv++))); 30536 .loc 88 118 0 30537 0038 0296 str r6, [sp, #8] 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** q15_t *pStateCur; /* State current pointer */ 30538 .loc 88 63 0 30539 003a AB46 mov fp, r5 30540 .LVL4933: 30541 .L2455: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = __SSAT(fnext, 16); 30542 .loc 88 107 0 30543 003c 0499 ldr r1, [sp, #16] 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 30544 .loc 88 87 0 30545 003e 019C ldr r4, [sp, #4] 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ 30546 .loc 88 105 0 30547 0040 3BF9023B ldrsh r3, [fp], #2 30548 .LVL4934: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = __SSAT(fnext, 16); 30549 .loc 88 107 0 30550 0044 B1F90010 ldrsh r1, [r1] 30551 .LVL4935: 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 30552 .loc 88 87 0 30553 0048 34F9020B ldrsh r0, [r4], #2 30554 004c 0194 str r4, [sp, #4] ARM GAS /tmp/ccJrAs6S.s page 1411 30555 .LVL4936: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = __SSAT(fnext, 16); 30556 .loc 88 107 0 30557 004e 01FB03F4 mul r4, r1, r3 30558 .LVL4937: 30559 0052 A0EBE430 sub r0, r0, r4, asr #15 30560 .LBB2398: 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 30561 .loc 88 108 0 30562 .syntax unified 30563 @ 108 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c" 30564 0056 00F30F00 ssat r0, #16, r0 30565 @ 0 "" 2 30566 .LVL4938: 30567 .thumb 30568 .syntax unified 30569 .LBE2398: 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = __SSAT(gnext, 16); 30570 .loc 88 111 0 30571 005a 00FB01F1 mul r1, r0, r1 30572 .LVL4939: 30573 005e 03EBE133 add r3, r3, r1, asr #15 30574 .LVL4940: 30575 .loc 88 118 0 30576 0062 0399 ldr r1, [sp, #12] 30577 .LBB2399: 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 30578 .loc 88 112 0 30579 .syntax unified 30580 @ 112 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c" 30581 0064 03F30F03 ssat r3, #16, r3 30582 @ 0 "" 2 30583 .LVL4941: 30584 .thumb 30585 .syntax unified 30586 .LBE2399: 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 30587 .loc 88 115 0 30588 0068 2BF8023C strh r3, [fp, #-2] @ movhi 30589 .LVL4942: 30590 .loc 88 118 0 30591 006c B1F90060 ldrsh r6, [r1] 30592 0070 03FB06F3 mul r3, r3, r6 30593 .LVL4943: 30594 0074 1C46 mov r4, r3 30595 0076 DD17 asrs r5, r3, #31 30596 .LVL4944: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Update f values for next coefficient processing */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fcurr = fnext; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Loop unrolling: Compute 4 taps at a time. */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt = (numStages - 1U) >> 2U; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1412 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** while (tapCnt > 0U) 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Process sample for 2nd, 6th ...taps */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Read gN-2(n-1) from state buffer */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gcurr = *px1++; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = __SSAT(fnext, 16); 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext1 = (q15_t) __SSAT(gnext, 16); 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* write gN-1(n) into state for next sample processing */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *px2++ = (q15_t) gnext1; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Process sample for 3nd, 7th ...taps */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Read gN-3(n-1) from state buffer */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gcurr = *px1++; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Process sample for 3rd, 7th .. taps */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fcurr = __SSAT(fcurr, 16); 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext2 = (q15_t) __SSAT(gnext, 16); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* write gN-2(n) into state */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *px2++ = (q15_t) gnext2; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Read vN-1 and vN-2 at a time */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** v = read_q15x2_ia (&pv); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Pack gN-1(n) and gN-2(n) */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = __PKHBT(gnext1, gnext2, 16); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #else 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = __PKHBT(gnext2, gnext1, 16); 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* y(n) += gN-1(n) * vN-1 */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* y(n) += gN-2(n) * vN-2 */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** acc = __SMLALD(gnext, v, acc); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Process sample for 4th, 8th ...taps */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Read gN-4(n-1) from state buffer */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gcurr = *px1++; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Process sample for 4th, 8th .. taps */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = __SSAT(fnext, 16); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext1 = (q15_t) __SSAT(gnext, 16); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* write gN-3(n) for the next sample process */ 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *px2++ = (q15_t) gnext1; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1413 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Process sample for 5th, 9th ...taps */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Read gN-5(n-1) from state buffer */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gcurr = *px1++; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Process sample for 5th, 9th .. taps */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fcurr = __SSAT(fcurr, 16); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext2 = (q15_t) __SSAT(gnext, 16); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* write gN-4(n) for the next sample process */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *px2++ = (q15_t) gnext2; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Read vN-3 and vN-4 at a time */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** v = read_q15x2_ia (&pv); 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Pack gN-3(n) and gN-4(n) */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = __PKHBT(gnext1, gnext2, 16); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #else 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = __PKHBT(gnext2, gnext1, 16); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* y(n) += gN-4(n) * vN-4 */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* y(n) += gN-3(n) * vN-3 */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** acc = __SMLALD(gnext, v, acc); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Decrement loop counter */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt--; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** } 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = fcurr; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Loop unrolling: Compute remaining taps */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt = (numStages - 1U) % 0x4U; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #else 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Initialize blkCnt with number of samples */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt = (numStages - 1U); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** while (tapCnt > 0U) 30597 .loc 88 231 0 30598 0078 002A cmp r2, #0 30599 007a 00F08A80 beq .L2464 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = __SSAT(gnext, 16); 30600 .loc 88 111 0 30601 007e DDE90598 ldrd r9, r8, [sp, #20] 30602 .loc 88 231 0 30603 0082 9646 mov lr, r2 30604 0084 DC46 mov ip, fp 30605 0086 1E46 mov r6, r3 30606 0088 2F46 mov r7, r5 ARM GAS /tmp/ccJrAs6S.s page 1414 30607 .LVL4945: 30608 .L2454: 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gcurr = *px1++; 30609 .loc 88 233 0 30610 008a 3CF9023B ldrsh r3, [ip], #2 30611 .LVL4946: 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Process sample for last taps */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15); 30612 .loc 88 235 0 30613 008e 38F9021B ldrsh r1, [r8], #2 30614 .LVL4947: 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = __SSAT(fnext, 16); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = __SSAT(gnext, 16); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Output samples for last taps */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** acc += (q31_t) (((q31_t) gnext * (*pv++))); 30615 .loc 88 241 0 30616 0092 39F9024B ldrsh r4, [r9], #2 30617 .LVL4948: 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = __SSAT(fnext, 16); 30618 .loc 88 235 0 30619 0096 01FB03F5 mul r5, r1, r3 30620 009a A0EBE530 sub r0, r0, r5, asr #15 30621 .LVL4949: 30622 .LBB2400: 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = __SSAT(fnext, 16); 30623 .loc 88 236 0 30624 .syntax unified 30625 @ 236 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c" 30626 009e 00F30F00 ssat r0, #16, r0 30627 @ 0 "" 2 30628 .LVL4950: 30629 .thumb 30630 .syntax unified 30631 .LBE2400: 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = __SSAT(gnext, 16); 30632 .loc 88 237 0 30633 00a2 00FB01F1 mul r1, r0, r1 30634 .LVL4951: 30635 00a6 03EBE133 add r3, r3, r1, asr #15 30636 .LVL4952: 30637 .LBB2401: 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 30638 .loc 88 238 0 30639 .syntax unified 30640 @ 238 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c" 30641 00aa 03F30F03 ssat r3, #16, r3 30642 @ 0 "" 2 30643 .LVL4953: 30644 .thumb 30645 .syntax unified 30646 .LBE2401: 30647 .loc 88 241 0 30648 00ae 03FB04F4 mul r4, r3, r4 30649 00b2 3619 adds r6, r6, r4 ARM GAS /tmp/ccJrAs6S.s page 1415 30650 .LVL4954: 30651 00b4 47EBE477 adc r7, r7, r4, asr #31 30652 .LVL4955: 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 30653 .loc 88 231 0 30654 00b8 BEF1010E subs lr, lr, #1 30655 .LVL4956: 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *px2++ = (q15_t) gnext; 30656 .loc 88 242 0 30657 00bc 2CF8023C strh r3, [ip, #-2] @ movhi 30658 .LVL4957: 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 30659 .loc 88 231 0 30660 00c0 E3D1 bne .L2454 30661 00c2 089B ldr r3, [sp, #32] 30662 .LVL4958: 30663 00c4 0BEB0301 add r1, fp, r3 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *px2++ = (q15_t) gnext; 30664 .loc 88 241 0 30665 00c8 079B ldr r3, [sp, #28] 30666 00ca 3446 mov r4, r6 30667 00cc 3D46 mov r5, r7 30668 .LVL4959: 30669 .L2453: 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fcurr = fnext; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Decrement loop counter */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt--; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** } 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* y(n) += g0(n) * v0 */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** acc += (q31_t) (((q31_t) fnext * (*pv++))); 30670 .loc 88 250 0 30671 00ce B3F90030 ldrsh r3, [r3] 30672 .LVL4960: 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** out = (q15_t) __SSAT(acc >> 15, 16); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *px2++ = (q15_t) fnext; 30673 .loc 88 253 0 30674 00d2 0880 strh r0, [r1] @ movhi 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 30675 .loc 88 250 0 30676 00d4 00FB03F0 mul r0, r0, r3 30677 .LVL4961: 30678 00d8 2618 adds r6, r4, r0 30679 00da 45EBE077 adc r7, r5, r0, asr #31 30680 .LBB2402: 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *px2++ = (q15_t) fnext; 30681 .loc 88 252 0 30682 00de F30B lsrs r3, r6, #15 30683 00e0 43EA4743 orr r3, r3, r7, lsl #17 30684 .syntax unified 30685 @ 252 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c" 30686 00e4 03F30F03 ssat r3, #16, r3 30687 @ 0 "" 2 30688 .LVL4962: 30689 .thumb ARM GAS /tmp/ccJrAs6S.s page 1416 30690 .syntax unified 30691 .LBE2402: 30692 00e8 2AF8023B strh r3, [r10], #2 @ movhi 30693 .LVL4963: 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 30694 .loc 88 83 0 30695 00ec 029B ldr r3, [sp, #8] 30696 .LVL4964: 30697 00ee 013B subs r3, r3, #1 30698 .LVL4965: 30699 00f0 0293 str r3, [sp, #8] 30700 00f2 A3D1 bne .L2455 30701 .LVL4966: 30702 .L2452: 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* write out into pDst */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *pDst++ = out; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Advance the state pointer by 4 to process the next group of 4 samples */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** pState = pState + 1U; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Decrement loop counter */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** blkCnt--; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** } 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Processing is complete. Now copy last S->numStages samples to start of the buffer 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** for the preperation of next frame process */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Points to the start of the state buffer */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** pStateCur = &S->pState[0]; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** pState = &S->pState[blockSize]; 30703 .loc 88 270 0 30704 00f4 0A9B ldr r3, [sp, #40] 30705 .LVL4967: 30706 00f6 099E ldr r6, [sp, #36] 30707 00f8 5900 lsls r1, r3, #1 30708 00fa 7418 adds r4, r6, r1 30709 .LVL4968: 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* copy data */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Loop unrolling: Compute 4 taps at a time. */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt = numStages >> 2U; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** while (tapCnt > 0U) 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Decrement loop counter */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt--; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** } 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Loop unrolling: Compute remaining taps */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt = numStages % 0x4U; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1417 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #else 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Initialize blkCnt with number of samples */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt = (numStages - 1U); 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** while (tapCnt > 0U) 30710 .loc 88 297 0 30711 00fc 002A cmp r2, #0 30712 00fe 45D0 beq .L2451 30713 0100 0B1D adds r3, r1, #4 30714 0102 002B cmp r3, #0 30715 0104 CCBF ite gt 30716 0106 0023 movgt r3, #0 30717 0108 0123 movle r3, #1 30718 010a 301D adds r0, r6, #4 30719 010c 8442 cmp r4, r0 30720 010e 28BF it cs 30721 0110 43F00103 orrcs r3, r3, #1 30722 0114 002B cmp r3, #0 30723 0116 42D0 beq .L2457 30724 0118 0D2A cmp r2, #13 30725 011a 40D9 bls .L2457 30726 011c 0B98 ldr r0, [sp, #44] 30727 011e C4F34003 ubfx r3, r4, #1, #1 30728 0122 002B cmp r3, #0 30729 0124 A0F10205 sub r5, r0, #2 30730 0128 0CBF ite eq 30731 012a 0120 moveq r0, #1 30732 012c 0220 movne r0, #2 30733 012e 8542 cmp r5, r0 30734 0130 23D3 bcc .L2458 30735 0132 8BB3 cbz r3, .L2465 30736 .LVL4969: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *pStateCur++ = *pState++; 30737 .loc 88 299 0 30738 0134 B4F90000 ldrsh r0, [r4] 30739 0138 3080 strh r0, [r6] @ movhi 30740 013a 0234 adds r4, r4, #2 30741 .LVL4970: 30742 013c B71C adds r7, r6, #2 30743 .LVL4971: 30744 .L2459: 30745 013e D61A subs r6, r2, r3 30746 0140 5B00 lsls r3, r3, #1 30747 0142 01EB030C add ip, r1, r3 30748 0146 B01E subs r0, r6, #2 30749 0148 0999 ldr r1, [sp, #36] 30750 014a 4008 lsrs r0, r0, #1 30751 014c 0A46 mov r2, r1 30752 014e 0130 adds r0, r0, #1 30753 0150 6244 add r2, r2, ip 30754 0152 0B44 add r3, r3, r1 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 30755 .loc 88 270 0 ARM GAS /tmp/ccJrAs6S.s page 1418 30756 0154 8446 mov ip, r0 30757 0156 0021 movs r1, #0 30758 .LVL4972: 30759 .L2460: 30760 0158 0131 adds r1, r1, #1 30761 .loc 88 299 0 30762 015a 52F8040B ldr r0, [r2], #4 30763 015e 43F8040B str r0, [r3], #4 @ unaligned 30764 0162 6145 cmp r1, ip 30765 0164 F8D3 bcc .L2460 30766 0166 6046 mov r0, ip 30767 0168 4300 lsls r3, r0, #1 30768 016a 8000 lsls r0, r0, #2 30769 016c 3918 adds r1, r7, r0 30770 016e 9E42 cmp r6, r3 30771 0170 A5EB0302 sub r2, r5, r3 30772 0174 0444 add r4, r4, r0 30773 0176 0991 str r1, [sp, #36] 30774 0178 08D0 beq .L2451 30775 .L2458: 30776 .LVL4973: 30777 017a 0999 ldr r1, [sp, #36] 30778 017c B4F90030 ldrsh r3, [r4] 30779 0180 0B80 strh r3, [r1] @ movhi 30780 .LVL4974: 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 30781 .loc 88 297 0 30782 0182 012A cmp r2, #1 30783 0184 02D0 beq .L2451 30784 .LVL4975: 30785 .loc 88 299 0 30786 0186 B4F90230 ldrsh r3, [r4, #2] 30787 018a 4B80 strh r3, [r1, #2] @ movhi 30788 .LVL4976: 30789 .L2451: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Decrement loop counter */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt--; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** } 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Sample processing */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** while (blkCnt > 0U) 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Read Sample from input buffer */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* fN(n) = x(n) */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fcurr = *pSrc++; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Initialize Ladder coeff pointer */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** pv = &S->pvCoeffs[0]; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Initialize Reflection coeff pointer */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** pk = &S->pkCoeffs[0]; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Initialize state read pointer */ 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** px1 = pState; ARM GAS /tmp/ccJrAs6S.s page 1419 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Initialize state write pointer */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** px2 = pState; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Set accumulator to zero */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** acc = 0; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt = numStages; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** while (tapCnt > 0U) 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gcurr = *px1++; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Process sample */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = fcurr - ((gcurr * (*pk)) >> 15); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fnext = __SSAT(fnext, 16); 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = ((fnext * (*pk++)) >> 15) + gcurr; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** gnext = __SSAT(gnext, 16); 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Output samples */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* y(n) += gN(n) * vN */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** acc += (q31_t) ((gnext * (*pv++))); 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* write gN(n) into state for next sample processing */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *px2++ = (q15_t) gnext; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Update f values for next coefficient processing */ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** fcurr = fnext; 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt--; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** } 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* y(n) += g0(n) * v0 */ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** acc += (q31_t) ((fnext * (*pv++))); 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** out = (q15_t) __SSAT(acc >> 15, 16); 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *px2++ = (q15_t) fnext; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* write out into pDst */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *pDst++ = out; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Advance the state pointer by 1 to process the next group of samples */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** pState = pState + 1U; 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Decrement loop counter */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** blkCnt--; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** } 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Processing is complete. Now copy last S->numStages samples to start of the buffer 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** for the preperation of next frame process */ 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Points to the start of the state buffer */ 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** pStateCur = &S->pState[0]; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** pState = &S->pState[blockSize]; 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1420 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt = numStages; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Copy data */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** while (tapCnt > 0U) 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** *pStateCur++ = *pState++; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** /* Decrement loop counter */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** tapCnt--; 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** } 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** } 30790 .loc 88 392 0 30791 018c 0DB0 add sp, sp, #52 30792 .LCFI243: 30793 .cfi_remember_state 30794 .cfi_def_cfa_offset 36 30795 @ sp needed 30796 018e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 30797 .LVL4977: 30798 .L2464: 30799 .LCFI244: 30800 .cfi_restore_state 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 30801 .loc 88 118 0 30802 0192 059B ldr r3, [sp, #20] 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 30803 .loc 88 231 0 30804 0194 5946 mov r1, fp 30805 .LVL4978: 30806 0196 9AE7 b .L2453 30807 .LVL4979: 30808 .L2465: 30809 0198 3746 mov r7, r6 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 30810 .loc 88 297 0 30811 019a 1546 mov r5, r2 30812 019c CFE7 b .L2459 30813 .L2457: 30814 019e 099B ldr r3, [sp, #36] 30815 01a0 023B subs r3, r3, #2 30816 .LVL4980: 30817 .L2462: 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** 30818 .loc 88 299 0 30819 01a2 34F9021B ldrsh r1, [r4], #2 30820 .LVL4981: 30821 01a6 23F8021F strh r1, [r3, #2]! @ movhi 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c **** { 30822 .loc 88 297 0 30823 01aa 013A subs r2, r2, #1 30824 .LVL4982: 30825 01ac F9D1 bne .L2462 30826 .loc 88 392 0 30827 01ae 0DB0 add sp, sp, #52 ARM GAS /tmp/ccJrAs6S.s page 1421 30828 .LCFI245: 30829 .cfi_def_cfa_offset 36 30830 @ sp needed 30831 01b0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 30832 .cfi_endproc 30833 .LFE233: 30835 .section .text.arm_iir_lattice_q31,"ax",%progbits 30836 .align 1 30837 .p2align 2,,3 30838 .global arm_iir_lattice_q31 30839 .syntax unified 30840 .thumb 30841 .thumb_func 30842 .fpu fpv4-sp-d16 30844 arm_iir_lattice_q31: 30845 .LFB234: 30846 .file 89 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q3 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * Title: arm_iir_lattice_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * Description: Q31 IIR Lattice filter processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** @addtogroup IIR_Lattice 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /** ARM GAS /tmp/ccJrAs6S.s page 1422 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** @brief Processing function for the Q31 IIR lattice filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** @param[in] S points to an instance of the Q31 IIR lattice structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** @param[out] pDst points to the block of output data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** @param[in] blockSize number of samples to process 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** @par Scaling and Overflow Behavior 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** The function is implemented using an internal 64-bit accumulator. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** The accumulator has a 2.62 format and maintains full precision of the intermedia 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** Thus, if the accumulator result overflows it wraps around rather than clip. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** In order to avoid overflows completely the input signal must be scaled down by 2 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** After all multiply-accumulates are performed, the 2.62 accumulator is saturated 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** */ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** void arm_iir_lattice_q31( 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** const arm_iir_lattice_instance_q31 * S, 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** const q31_t * pSrc, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** q31_t * pDst, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** uint32_t blockSize) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 30847 .loc 89 61 0 30848 .cfi_startproc 30849 @ args = 0, pretend = 0, frame = 48 30850 @ frame_needed = 0, uses_anonymous_args = 0 30851 .LVL4983: 30852 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 30853 .LCFI246: 30854 .cfi_def_cfa_offset 36 30855 .cfi_offset 4, -36 30856 .cfi_offset 5, -32 30857 .cfi_offset 6, -28 30858 .cfi_offset 7, -24 30859 .cfi_offset 8, -20 30860 .cfi_offset 9, -16 30861 .cfi_offset 10, -12 30862 .cfi_offset 11, -8 30863 .cfi_offset 14, -4 30864 0004 8DB0 sub sp, sp, #52 30865 .LCFI247: 30866 .cfi_def_cfa_offset 88 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** q31_t *pState = S->pState; /* State pointer */ 30867 .loc 89 62 0 30868 0006 4468 ldr r4, [r0, #4] 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** q31_t *pState = S->pState; /* State pointer */ 30869 .loc 89 61 0 30870 0008 0191 str r1, [sp, #4] 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** q31_t *pStateCur; /* State current pointer */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** q63_t acc; /* Accumlator */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** q31_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef * 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** uint32_t numStages = S->numStages; /* Number of stages */ 30871 .loc 89 67 0 30872 000a 0188 ldrh r1, [r0] 30873 .LVL4984: 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** q31_t *pStateCur; /* State current pointer */ 30874 .loc 89 62 0 ARM GAS /tmp/ccJrAs6S.s page 1423 30875 000c 0A94 str r4, [sp, #40] 30876 .LVL4985: 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** q31_t *pState = S->pState; /* State pointer */ 30877 .loc 89 61 0 30878 000e 0292 str r2, [sp, #8] 30879 0010 01F1FF3B add fp, r1, #-1 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** uint32_t blkCnt, tapCnt; /* Temporary variables for counts */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* initialise loop count */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** blkCnt = blockSize; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** #if defined (ARM_MATH_DSP) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Sample processing */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** while (blkCnt > 0U) 30880 .loc 89 77 0 30881 0014 0B93 str r3, [sp, #44] 30882 0016 002B cmp r3, #0 30883 0018 6FD0 beq .L2487 30884 001a 1D46 mov r5, r3 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Read Sample from input buffer */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* fN(n) = x(n) */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fcurr = *pSrc++; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Initialize Ladder coeff pointer */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** pv = &S->pvCoeffs[0]; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Initialize Reflection coeff pointer */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** pk = &S->pkCoeffs[0]; 30885 .loc 89 87 0 30886 001c 8368 ldr r3, [r0, #8] 30887 .LVL4986: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 30888 .loc 89 84 0 30889 001e C268 ldr r2, [r0, #12] 30890 .LVL4987: 30891 .loc 89 87 0 30892 0020 0593 str r3, [sp, #20] 30893 0022 1846 mov r0, r3 30894 .LVL4988: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Initialize state read pointer */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** px1 = pState; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Initialize state write pointer */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** px2 = pState; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Set accumulator to zero */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** acc = 0; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Process sample for first tap */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gcurr = *px1++; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk )) >> 31)); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1424 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31)); 30895 .loc 89 104 0 30896 0024 0430 adds r0, r0, #4 30897 0026 8B00 lsls r3, r1, #2 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 30898 .loc 89 84 0 30899 0028 0492 str r2, [sp, #16] 30900 .loc 89 104 0 30901 002a 0790 str r0, [sp, #28] 30902 002c 043B subs r3, r3, #4 30903 002e 101D adds r0, r2, #4 30904 0030 02EB8102 add r2, r2, r1, lsl #2 30905 0034 0690 str r0, [sp, #24] 30906 0036 0892 str r2, [sp, #32] 30907 0038 0993 str r3, [sp, #36] 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* write gN-1(n-1) into state for next sample processing */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *px2++ = gnext; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* y(n) += gN(n) * vN */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** acc += ((q63_t) gnext * *pv++); 30908 .loc 89 110 0 30909 003a 0395 str r5, [sp, #12] 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** q31_t *pStateCur; /* State current pointer */ 30910 .loc 89 62 0 30911 003c A246 mov r10, r4 30912 .LVL4989: 30913 .L2490: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 30914 .loc 89 101 0 30915 003e 059A ldr r2, [sp, #20] 30916 .LBB2403: 30917 .LBB2404: 2032:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 2033:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" ( 2034:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 2035:Drivers/CMSIS/Include/cmsis_gcc.h **** 2036:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64); 2037:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2038:Drivers/CMSIS/Include/cmsis_gcc.h **** 2039:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) 2040:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2041:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2042:Drivers/CMSIS/Include/cmsis_gcc.h **** 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 2044:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2045:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2046:Drivers/CMSIS/Include/cmsis_gcc.h **** 2047:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) 2048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2049:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2050:Drivers/CMSIS/Include/cmsis_gcc.h **** 2051:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 2052:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2053:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2054:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccJrAs6S.s page 1425 2055:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) 2056:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2058:Drivers/CMSIS/Include/cmsis_gcc.h **** 2059:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 2060:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2061:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2062:Drivers/CMSIS/Include/cmsis_gcc.h **** 2063:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) 2064:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2065:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2066:Drivers/CMSIS/Include/cmsis_gcc.h **** 2067:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 2068:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2069:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2070:Drivers/CMSIS/Include/cmsis_gcc.h **** 2071:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) 2072:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2073:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{ 2074:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2]; 2075:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64; 2076:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr; 2077:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc; 2078:Drivers/CMSIS/Include/cmsis_gcc.h **** 2079:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */ 2080:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (o 2081:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 2082:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (o 2083:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 2084:Drivers/CMSIS/Include/cmsis_gcc.h **** 2085:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64); 2086:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2087:Drivers/CMSIS/Include/cmsis_gcc.h **** 2088:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) 2089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2090:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{ 2091:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2]; 2092:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64; 2093:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr; 2094:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc; 2095:Drivers/CMSIS/Include/cmsis_gcc.h **** 2096:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */ 2097:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" ( 2098:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 2099:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" ( 2100:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 2101:Drivers/CMSIS/Include/cmsis_gcc.h **** 2102:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64); 2103:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2104:Drivers/CMSIS/Include/cmsis_gcc.h **** 2105:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2) 2106:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2107:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2108:Drivers/CMSIS/Include/cmsis_gcc.h **** 2109:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 2110:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2111:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS /tmp/ccJrAs6S.s page 1426 2112:Drivers/CMSIS/Include/cmsis_gcc.h **** 2113:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2) 2114:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2115:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t result; 2116:Drivers/CMSIS/Include/cmsis_gcc.h **** 2117:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 2118:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2119:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2120:Drivers/CMSIS/Include/cmsis_gcc.h **** 2121:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) 2122:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2123:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t result; 2124:Drivers/CMSIS/Include/cmsis_gcc.h **** 2125:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 30918 .loc 6 2125 0 30919 0040 0199 ldr r1, [sp, #4] 30920 .LBE2404: 30921 .LBE2403: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 30922 .loc 89 101 0 30923 0042 1068 ldr r0, [r2] 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ 30924 .loc 89 99 0 30925 0044 5AF8043B ldr r3, [r10], #4 30926 .LVL4990: 30927 .LBB2407: 30928 .LBB2405: 30929 .loc 6 2125 0 30930 0048 51F8042B ldr r2, [r1], #4 30931 004c 0191 str r1, [sp, #4] 30932 .LVL4991: 30933 .LBE2405: 30934 .LBE2407: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 30935 .loc 89 101 0 30936 004e 83FB0045 smull r4, r5, r3, r0 30937 0052 E10F lsrs r1, r4, #31 30938 .LVL4992: 30939 0054 41EA4501 orr r1, r1, r5, lsl #1 30940 .LBB2408: 30941 .LBB2406: 30942 .loc 6 2125 0 30943 .syntax unified 30944 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 30945 0058 81FAA2F2 qsub r2, r2, r1 30946 @ 0 "" 2 30947 .LVL4993: 30948 .thumb 30949 .syntax unified 30950 .LBE2406: 30951 .LBE2408: 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 30952 .loc 89 104 0 30953 005c 80FB0201 smull r0, r1, r0, r2 30954 0060 4FEAD078 lsr r8, r0, #31 30955 0064 48EA4108 orr r8, r8, r1, lsl #1 30956 0068 1046 mov r0, r2 ARM GAS /tmp/ccJrAs6S.s page 1427 30957 006a D117 asrs r1, r2, #31 30958 .LVL4994: 30959 .LBB2409: 30960 .LBB2410: 2117:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 30961 .loc 6 2117 0 30962 .syntax unified 30963 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 30964 006c 88FA83F3 qadd r3, r3, r8 30965 @ 0 "" 2 30966 .LVL4995: 30967 .thumb 30968 .syntax unified 30969 .LBE2410: 30970 .LBE2409: 30971 .loc 89 110 0 30972 0070 049C ldr r4, [sp, #16] 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 30973 .loc 89 107 0 30974 0072 4AF8043C str r3, [r10, #-4] 30975 .LVL4996: 30976 .loc 89 110 0 30977 0076 2468 ldr r4, [r4] 30978 .LVL4997: 30979 0078 83FB0489 smull r8, r9, r3, r4 30980 .LVL4998: 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Update f values for next coefficient processing */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fcurr = fnext; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Loop unrolling: Compute 4 taps at a time. */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt = (numStages - 1U) >> 2U; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** while (tapCnt > 0U) 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Process sample for 2nd, 6th ...taps */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Read gN-2(n-1) from state buffer */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gcurr = *px1++; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk )) >> 31)); 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31)); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* y(n) += gN-1(n) * vN-1 */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** acc += ((q63_t) gnext * *pv++); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* write gN-1(n) into state for next sample processing */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *px2++ = gnext; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Process sample for 3nd, 7th ...taps */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Read gN-3(n-1) from state buffer */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gcurr = *px1++; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Process sample for 3rd, 7th .. taps */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk )) >> 31)); ARM GAS /tmp/ccJrAs6S.s page 1428 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31)); 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* y(n) += gN-2(n) * vN-2 */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** acc += ((q63_t) gnext * *pv++); 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* write gN-2(n) into state for next sample processing */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *px2++ = gnext; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Process sample for 4th, 8th ...taps */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Read gN-4(n-1) from state buffer */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gcurr = *px1++; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Process sample for 4th, 8th .. taps */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk )) >> 31)); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31)); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* y(n) += gN-3(n) * vN-3 */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** acc += ((q63_t) gnext * *pv++); 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* write gN-3(n) into state for next sample processing */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *px2++ = gnext; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Process sample for 5th, 9th ...taps */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Read gN-5(n-1) from state buffer */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gcurr = *px1++; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Process sample for 5th, 9th .. taps */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk )) >> 31)); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31)); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* y(n) += gN-4(n) * vN-4 */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** acc += ((q63_t) gnext * *pv++); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* write gN-4(n) into state for next sample processing */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *px2++ = gnext; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Decrement loop counter */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt--; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** } 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fnext = fcurr; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Loop unrolling: Compute remaining taps */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt = (numStages - 1U) % 0x4U; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** #else 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Initialize blkCnt with number of samples */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt = (numStages - 1U); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** while (tapCnt > 0U) 30981 .loc 89 195 0 30982 007c BBF1000F cmp fp, #0 30983 0080 4DD0 beq .L2493 ARM GAS /tmp/ccJrAs6S.s page 1429 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 30984 .loc 89 104 0 30985 0082 DDE906EC ldrd lr, ip, [sp, #24] 30986 .loc 89 195 0 30987 0086 5D46 mov r5, fp 30988 0088 5446 mov r4, r10 30989 .LVL4999: 30990 .L2489: 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gcurr = *px1++; 30991 .loc 89 197 0 30992 008a 54F8043B ldr r3, [r4], #4 30993 .LVL5000: 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Process sample for last taps */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk )) >> 31)); 30994 .loc 89 199 0 30995 008e 5CF8040B ldr r0, [ip], #4 30996 .LVL5001: 30997 0092 83FB0067 smull r6, r7, r3, r0 30998 0096 F10F lsrs r1, r6, #31 30999 0098 41EA4701 orr r1, r1, r7, lsl #1 31000 .LBB2411: 31001 .LBB2412: 31002 .loc 6 2125 0 31003 .syntax unified 31004 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 31005 009c 81FAA2F2 qsub r2, r2, r1 31006 @ 0 "" 2 31007 .LVL5002: 31008 .thumb 31009 .syntax unified 31010 .LBE2412: 31011 .LBE2411: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31)); 31012 .loc 89 200 0 31013 00a0 80FB0201 smull r0, r1, r0, r2 31014 00a4 C60F lsrs r6, r0, #31 31015 00a6 46EA4106 orr r6, r6, r1, lsl #1 31016 00aa 1046 mov r0, r2 31017 00ac D117 asrs r1, r2, #31 31018 .LVL5003: 31019 .LBB2413: 31020 .LBB2414: 2117:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 31021 .loc 6 2117 0 31022 .syntax unified 31023 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 31024 00ae 86FA83F3 qadd r3, r3, r6 31025 @ 0 "" 2 31026 .LVL5004: 31027 .thumb 31028 .syntax unified 31029 .LBE2414: 31030 .LBE2413: 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Output samples for last taps */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** acc += ((q63_t) gnext * *pv++); ARM GAS /tmp/ccJrAs6S.s page 1430 31031 .loc 89 203 0 31032 00b2 5EF8046B ldr r6, [lr], #4 31033 .LVL5005: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *px2++ = gnext; 31034 .loc 89 204 0 31035 00b6 44F8043C str r3, [r4, #-4] 31036 .LVL5006: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 31037 .loc 89 195 0 31038 00ba 013D subs r5, r5, #1 31039 .LVL5007: 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *px2++ = gnext; 31040 .loc 89 203 0 31041 00bc C6FB0389 smlal r8, r9, r6, r3 31042 .LVL5008: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 31043 .loc 89 195 0 31044 00c0 E3D1 bne .L2489 31045 00c2 099B ldr r3, [sp, #36] 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *px2++ = gnext; 31046 .loc 89 203 0 31047 00c4 089C ldr r4, [sp, #32] 31048 .LVL5009: 31049 00c6 5344 add r3, r10, r3 31050 .LVL5010: 31051 .L2488: 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fcurr = fnext; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Decrement loop counter */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt--; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** } 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* y(n) += g0(n) * v0 */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** acc += ((q63_t) fnext * *pv++); 31052 .loc 89 212 0 31053 00c8 2468 ldr r4, [r4] 31054 .LVL5011: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *px2++ = fnext; 31055 .loc 89 214 0 31056 00ca 1A60 str r2, [r3] 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 31057 .loc 89 212 0 31058 00cc E617 asrs r6, r4, #31 31059 00ce 04FB01F2 mul r2, r4, r1 31060 00d2 00FB0623 mla r3, r0, r6, r2 31061 00d6 A4FB0001 umull r0, r1, r4, r0 31062 .LVL5012: 31063 00da 10EB0804 adds r4, r0, r8 31064 00de 1944 add r1, r1, r3 31065 00e0 41EB0905 adc r5, r1, r9 31066 .LVL5013: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* write out into pDst */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *pDst++ = (q31_t) (acc >> 31U); 31067 .loc 89 217 0 31068 00e4 029A ldr r2, [sp, #8] ARM GAS /tmp/ccJrAs6S.s page 1431 31069 00e6 E30F lsrs r3, r4, #31 31070 00e8 43EA4503 orr r3, r3, r5, lsl #1 31071 00ec 42F8043B str r3, [r2], #4 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 31072 .loc 89 77 0 31073 00f0 039B ldr r3, [sp, #12] 31074 .loc 89 217 0 31075 00f2 0292 str r2, [sp, #8] 31076 .LVL5014: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 31077 .loc 89 77 0 31078 00f4 013B subs r3, r3, #1 31079 .LVL5015: 31080 00f6 0393 str r3, [sp, #12] 31081 00f8 A1D1 bne .L2490 31082 .LVL5016: 31083 .L2487: 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Advance the state pointer by 4 to process the next group of 4 samples */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** pState = pState + 1U; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Decrement loop counter */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** blkCnt--; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** } 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Processing is complete. Now copy last S->numStages samples to start of the buffer 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** for the preperation of next frame process */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Points to the start of the state buffer */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** pStateCur = &S->pState[0]; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** pState = &S->pState[blockSize]; 31084 .loc 89 231 0 31085 00fa 0A9A ldr r2, [sp, #40] 31086 .LVL5017: 31087 00fc 0B99 ldr r1, [sp, #44] 31088 00fe 02EB8103 add r3, r2, r1, lsl #2 31089 .LVL5018: 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Copy data */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Loop unrolling: Compute 4 taps at a time. */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt = numStages >> 2U; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** while (tapCnt > 0U) 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *pStateCur++ = *pState++; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *pStateCur++ = *pState++; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *pStateCur++ = *pState++; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *pStateCur++ = *pState++; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Decrement loop counter */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt--; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** } 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Loop unrolling: Compute remaining taps */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt = numStages % 0x4U; ARM GAS /tmp/ccJrAs6S.s page 1432 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** #else 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Initialize blkCnt with number of samples */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt = (numStages - 1U); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** while (tapCnt > 0U) 31090 .loc 89 260 0 31091 0102 BBF1000F cmp fp, #0 31092 0106 07D0 beq .L2486 31093 0108 043A subs r2, r2, #4 31094 .LVL5019: 31095 .L2492: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *pStateCur++ = *pState++; 31096 .loc 89 262 0 31097 010a 53F8041B ldr r1, [r3], #4 31098 .LVL5020: 31099 010e 42F8041F str r1, [r2, #4]! 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 31100 .loc 89 260 0 31101 0112 BBF1010B subs fp, fp, #1 31102 .LVL5021: 31103 0116 F8D1 bne .L2492 31104 .LVL5022: 31105 .L2486: 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Decrement loop counter */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt--; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** } 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** #else /* #if defined (ARM_MATH_DSP) */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Sample processing */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** while (blkCnt > 0U) 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Read Sample from input buffer */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* fN(n) = x(n) */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fcurr = *pSrc++; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Initialize Ladder coeff pointer */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** pv = &S->pvCoeffs[0]; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Initialize Reflection coeff pointer */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** pk = &S->pkCoeffs[0]; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Initialize state read pointer */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** px1 = pState; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Initialize state write pointer */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** px2 = pState; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Set accumulator to zero */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** acc = 0; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1433 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt = numStages; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** while (tapCnt > 0U) 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gcurr = *px1++; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Process sample */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fnext = clip_q63_to_q31(((q63_t) fcurr - ((q31_t) (((q63_t) gcurr * (*pk )) >> 31)))); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** gnext = clip_q63_to_q31(((q63_t) gcurr + ((q31_t) (((q63_t) fnext * (*pk++)) >> 31)))); 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Output samples */ 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* y(n) += gN(n) * vN */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** acc += ((q63_t) gnext * *pv++); 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* write gN-1(n-1) into state for next sample processing */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *px2++ = gnext; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Update f values for next coefficient processing */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** fcurr = fnext; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt--; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** } 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* y(n) += g0(n) * v0 */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** acc += ((q63_t) fnext * *pv++); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *px2++ = fnext; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* write out into pDst */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *pDst++ = (q31_t) (acc >> 31U); 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Advance the state pointer by 1 to process the next group of samples */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** pState = pState + 1U; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Decrement loop counter */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** blkCnt--; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** } 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Processing is complete. Now copy last S->numStages samples to start of the buffer 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** for the preperation of next frame process */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Points to the start of the state buffer */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** pStateCur = &S->pState[0]; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** pState = &S->pState[blockSize]; 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt = numStages; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Copy data */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** while (tapCnt > 0U) 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** *pStateCur++ = *pState++; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** /* Decrement loop counter */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** tapCnt--; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** } ARM GAS /tmp/ccJrAs6S.s page 1434 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** #endif /* #if defined (ARM_MATH_DSP) */ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** } 31106 .loc 89 352 0 31107 0118 0DB0 add sp, sp, #52 31108 .LCFI248: 31109 .cfi_remember_state 31110 .cfi_def_cfa_offset 36 31111 @ sp needed 31112 011a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 31113 .LVL5023: 31114 .L2493: 31115 .LCFI249: 31116 .cfi_restore_state 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** 31117 .loc 89 110 0 31118 011e 069C ldr r4, [sp, #24] 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c **** { 31119 .loc 89 195 0 31120 0120 5346 mov r3, r10 31121 0122 D1E7 b .L2488 31122 .cfi_endproc 31123 .LFE234: 31125 .section .text.arm_lms_f32,"ax",%progbits 31126 .align 1 31127 .p2align 2,,3 31128 .global arm_lms_f32 31129 .syntax unified 31130 .thumb 31131 .thumb_func 31132 .fpu fpv4-sp-d16 31134 arm_lms_f32: 31135 .LFB235: 31136 .file 90 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * Title: arm_lms_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * Description: Processing function for the floating-point LMS filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * Unless required by applicable law or agreed to in writing, software ARM GAS /tmp/ccJrAs6S.s page 1435 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @defgroup LMS Least Mean Square (LMS) Filters 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer function 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** LMS filters use a gradient descent method in which the filter coefficients are updated based on t 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** Adaptive filters are often used in communication systems, equalizers, and noise removal. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The library also contains normalized LMS filters in which the filter coefficient adaptation is in 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** An LMS filter consists of two components as shown below. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The first component is a standard transversal or FIR filter. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The second component is a coefficient update mechanism. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The LMS filter has two input signals. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The filter coefficient update mechanism is based on the difference between the FIR filter output 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** This "error signal" tends towards zero as the filter adapts. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The LMS processing functions accept the input and reference input signals and generate the filter 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** \image html LMS.gif "Internal structure of the Least Mean Square filter" 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The functions operate on blocks of data and each call to the function processes 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** blockSize samples through the filter. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pSrc points to input signal, pRef points to reference signal, 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pOut points to output signal and pErr points to error signal. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** All arrays contain blockSize values. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The functions operate on a block-by-block basis. 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** Internally, the filter coefficients b[n] are updated on a sample-by-sample basis. 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The convergence of the LMS filter is slower compared to the normalized LMS algorithm. 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par Algorithm 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The output signal y[n] is computed by a standard FIR filter: 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c ****       y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The error signal equals the difference between the reference signal d[n] 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** e[n] = d[n] - y[n]. 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** After each sample of the error signal is computed, the filter coefficients ARM GAS /tmp/ccJrAs6S.s page 1436 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** b[k] = b[k] + e[n] * mu * x[n-k], for k=0, 1, ..., numTaps-1 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** where mu is the step size and controls the rate of coefficient conv 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** In the APIs, pCoeffs points to a coefficient array of size nu 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** Coefficients are stored in time reversed order. 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 
  88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c ****      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c ****
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pState points to a state array of size numTaps + blockSize - 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** Samples in the state buffer are stored in the order: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 
  95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c ****      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-
  96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c ****
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** Note that the length of the state buffer exceeds the length of the coefficient a 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The increased state buffer length allows circular addressing, which is tradition 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** to be avoided and yields a significant speed improvement. 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The state variables are updated after each block of data is processed. 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par Instance Structure 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The coefficients and state variables for a filter are stored together in an inst 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** A separate instance structure must be defined for each filter and 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** coefficient and state arrays cannot be shared among instances. 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** There are separate instance structure declarations for each of the 3 supported d 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par Initialization Functions 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** There is also an associated initialization function for each data type. 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The initialization function performs the following operations: 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** - Sets the values of the internal structure fields. 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** - Zeros out the values in the state buffer. 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** To do this manually without calling the init function, assign the follow subfiel 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the value 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** Use of the initialization function is optional. 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** However, if the initialization function is used, then the instance structure canno 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** To place an instance structure into a const data section, the instance structure m 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** Set the values in the state buffer to zeros before static initialization. 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The code below statically initializes each of the 3 different data type filter ins 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 
 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c ****      arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};
 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c ****      arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};
 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c ****      arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};
 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c ****
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** where numTaps is the number of filter coefficients in the filter; pCoeffs is the address of the coefficient buffer; mu is 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par Fixed-Point Behavior 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** Care must be taken when using the Q15 and Q31 versions of the LMS filter. 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The following issues must be considered: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** - Scaling of coefficients 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** - Overflow and saturation 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par Scaling of Coefficients ARM GAS /tmp/ccJrAs6S.s page 1437 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** Filter coefficients are represented as fractional values and 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** coefficients are restricted to lie in the range [-1 +1). 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The fixed-point functions have an additional scaling parameter postShift2^postShift and 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** allows the filter coefficients to exceed the range [+1 -1). 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** The value of postShift is set by the user based on the expected gai 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @par Overflow and Saturation 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** described separately as part of the function specific documentation below. 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @addtogroup LMS 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @{ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @brief Processing function for floating-point LMS filter. 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @param[in] S points to an instance of the floating-point LMS filter structure 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @param[in] pSrc points to the block of input data 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @param[in] pRef points to the block of reference data 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @param[out] pOut points to the block of output data 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @param[out] pErr points to the block of error data 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @param[in] blockSize number of samples to process 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** @return none 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** #if defined(ARM_MATH_NEON) 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** void arm_lms_f32( 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** const arm_lms_instance_f32 * S, 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** const float32_t * pSrc, 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t * pRef, 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t * pOut, 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t * pErr, 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** uint32_t blockSize) 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t *pState = S->pState; /* State pointer */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t *px, *pb; /* Temporary pointers for state and coefficient bu 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t mu = S->mu; /* Adaptive factor */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t sum, e, d; /* accumulator, error, reference data sample */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t w = 0.0f; /* weight factor */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32x4_t tempV, sumV, xV, bV; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32x2_t tempV2; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** e = 0.0f; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** d = 0.0f; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* pStateCurnt points to the location where the new input data should be written */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1438 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** blkCnt = blockSize; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (blkCnt > 0U) 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Copy the new input sample into the state buffer */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pStateCurnt++ = *pSrc++; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Initialize pState pointer */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** px = pState; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Initialize coeff pointer */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pb = (pCoeffs); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Set the accumulator to zero */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** sum = 0.0f; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** sumV = vdupq_n_f32(0.0); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Process 4 taps at a time. */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = numTaps >> 2; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (tapCnt > 0U) 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Perform the multiply-accumulate */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** xV = vld1q_f32(px); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** bV = vld1q_f32(pb); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** sumV = vmlaq_f32(sumV, xV, bV); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** px += 4; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pb += 4; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement the loop counter */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt--; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tempV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** sum = vget_lane_f32(tempV2, 0) + vget_lane_f32(tempV2, 1); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* If the filter length is not a multiple of 4, compute the remaining filter taps */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = numTaps % 0x4U; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (tapCnt > 0U) 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Perform the multiply-accumulate */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** sum += (*px++) * (*pb++); 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement the loop counter */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt--; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* The result in the accumulator, store in the destination buffer. */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pOut++ = sum; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Compute and store error */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** d = (float32_t) (*pRef++); 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** e = d - sum; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pErr++ = e; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1439 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Calculation of Weighting factor for the updating filter coefficients */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** w = e * mu; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Initialize pState pointer */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** px = pState; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Initialize coeff pointer */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pb = (pCoeffs); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Process 4 taps at a time. */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = numTaps >> 2; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Update filter coefficients */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (tapCnt > 0U) 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Perform the multiply-accumulate */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** xV = vld1q_f32(px); 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** bV = vld1q_f32(pb); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** px += 4; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** bV = vmlaq_n_f32(bV,xV,w); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** vst1q_f32(pb,bV); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pb += 4; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement the loop counter */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt--; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* If the filter length is not a multiple of 4, compute the remaining filter taps */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = numTaps % 0x4U; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (tapCnt > 0U) 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Perform the multiply-accumulate */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pb = *pb + (w * (*px++)); 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pb++; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement the loop counter */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt--; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Advance state pointer by 1 for the next sample */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pState = pState + 1; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement the loop counter */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** blkCnt--; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Processing is complete. Now copy the last numTaps - 1 samples to the 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** satrt of the state buffer. This prepares the state buffer for the 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** next function call. */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Points to the start of the pState buffer */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pStateCurnt = S->pState; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1440 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Process 4 taps at a time for (numTaps - 1U) samples copy */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = (numTaps - 1U) >> 2U; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* copy data */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (tapCnt > 0U) 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tempV = vld1q_f32(pState); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** vst1q_f32(pStateCurnt,tempV); 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pState += 4; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pStateCurnt += 4; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement the loop counter */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt--; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Calculate remaining number of copies */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = (numTaps - 1U) % 0x4U; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Copy the remaining q31_t data */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (tapCnt > 0U) 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pStateCurnt++ = *pState++; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement the loop counter */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt--; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** #else 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** void arm_lms_f32( 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** const arm_lms_instance_f32 * S, 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** const float32_t * pSrc, 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t * pRef, 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t * pOut, 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t * pErr, 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** uint32_t blockSize) 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 31137 .loc 90 345 0 31138 .cfi_startproc 31139 @ args = 8, pretend = 0, frame = 0 31140 @ frame_needed = 0, uses_anonymous_args = 0 31141 .LVL5024: 31142 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 31143 .LCFI250: 31144 .cfi_def_cfa_offset 36 31145 .cfi_offset 4, -36 31146 .cfi_offset 5, -32 31147 .cfi_offset 6, -28 31148 .cfi_offset 7, -24 31149 .cfi_offset 8, -20 31150 .cfi_offset 9, -16 31151 .cfi_offset 10, -12 31152 .cfi_offset 11, -8 31153 .cfi_offset 14, -4 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t *pState = S->pState; /* State pointer */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ ARM GAS /tmp/ccJrAs6S.s page 1441 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t *px, *pb; /* Temporary pointers for state and coeffici 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t mu = S->mu; /* Adaptive factor */ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t acc, e; /* Accumulator, error */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t w; /* Weight factor */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 31154 .loc 90 353 0 31155 0004 0788 ldrh r7, [r0] 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t acc, e; /* Accumulator, error */ 31156 .loc 90 350 0 31157 0006 90ED036A vldr.32 s12, [r0, #12] 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t *pState = S->pState; /* State pointer */ 31158 .loc 90 345 0 31159 000a DDF824C0 ldr ip, [sp, #36] 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state 31160 .loc 90 347 0 31161 000e D0E90189 ldrd r8, r9, [r0, #4] 31162 .LVL5025: 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Initializations of error, difference, Coefficient update */ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** e = 0.0f; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** w = 0.0f; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* pStateCurnt points to the location where the new input data should be written */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 31163 .loc 90 362 0 31164 0012 07F1804E add lr, r7, #1073741824 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* initialise loop count */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** blkCnt = blockSize; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (blkCnt > 0U) 31165 .loc 90 367 0 31166 0016 0A98 ldr r0, [sp, #40] 31167 .LVL5026: 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 31168 .loc 90 362 0 31169 0018 0EF1FF3E add lr, lr, #-1 31170 001c 08EB8E0E add lr, r8, lr, lsl #2 31171 .LVL5027: 31172 .loc 90 367 0 31173 0020 0028 cmp r0, #0 31174 0022 4ED0 beq .L2514 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Copy the new input sample into the state buffer */ 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pStateCurnt++ = *pSrc++; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Initialize pState pointer */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** px = pState; 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Initialize coefficient pointer */ 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pb = pCoeffs; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Set the accumulator to zero */ 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** acc = 0.0f; ARM GAS /tmp/ccJrAs6S.s page 1442 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Loop unrolling: Compute 4 taps at a time. */ 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = numTaps >> 2U; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (tapCnt > 0U) 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Perform the multiply-accumulate */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** acc += (*px++) * (*pb++); 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** acc += (*px++) * (*pb++); 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** acc += (*px++) * (*pb++); 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** acc += (*px++) * (*pb++); 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement loop counter */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt--; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Loop unrolling: Compute remaining taps */ 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = numTaps % 0x4U; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** #else 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Initialize tapCnt with number of samples */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = numTaps; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (tapCnt > 0U) 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Perform the multiply-accumulate */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** acc += (*px++) * (*pb++); 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement the loop counter */ 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt--; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Store the result from accumulator into the destination buffer. */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pOut++ = acc; 31175 .loc 90 421 0 31176 0024 DFED285A vldr.32 s11, .L2526 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 31177 .loc 90 367 0 31178 0028 8246 mov r10, r0 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 31179 .loc 90 346 0 31180 002a 4546 mov r5, r8 31181 .LVL5028: 31182 .L2510: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 31183 .loc 90 370 0 31184 002c 51F8040B ldr r0, [r1], #4 @ float 31185 .LVL5029: 31186 0030 4EF8040B str r0, [lr], #4 @ float ARM GAS /tmp/ccJrAs6S.s page 1443 31187 .LVL5030: 31188 0034 2E1D adds r6, r5, #4 31189 0036 0432 adds r2, r2, #4 31190 .LVL5031: 31191 0038 0433 adds r3, r3, #4 31192 .LVL5032: 31193 003a 0CF1040C add ip, ip, #4 31194 .LVL5033: 31195 003e 3046 mov r0, r6 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 31196 .loc 90 411 0 31197 0040 A7B3 cbz r7, .L2506 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 31198 .loc 90 379 0 31199 0042 DFED217A vldr.32 s15, .L2526 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 31200 .loc 90 411 0 31201 0046 3C46 mov r4, r7 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 31202 .loc 90 376 0 31203 0048 CB46 mov fp, r9 31204 .LVL5034: 31205 .L2507: 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 31206 .loc 90 414 0 31207 004a F5EC016A vldmia.32 r5!, {s13} 31208 .LVL5035: 31209 004e BBEC017A vldmia.32 fp!, {s14} 31210 .LVL5036: 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 31211 .loc 90 411 0 31212 0052 013C subs r4, r4, #1 31213 .LVL5037: 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 31214 .loc 90 414 0 31215 0054 E6EE877A vfma.f32 s15, s13, s14 31216 .LVL5038: 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 31217 .loc 90 411 0 31218 0058 F7D1 bne .L2507 31219 .LVL5039: 31220 .loc 90 421 0 31221 005a 43ED017A vstr.32 s15, [r3, #-4] 31222 .LVL5040: 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Compute and store error */ 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** e = (float32_t) *pRef++ - acc; 31223 .loc 90 424 0 31224 005e 12ED017A vldr.32 s14, [r2, #-4] 31225 0062 77EE677A vsub.f32 s15, s14, s15 31226 .LVL5041: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pErr++ = e; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Calculation of Weighting factor for updating filter coefficients */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** w = e * mu; 31227 .loc 90 428 0 31228 0066 3D46 mov r5, r7 ARM GAS /tmp/ccJrAs6S.s page 1444 31229 .LVL5042: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pErr++ = e; 31230 .loc 90 425 0 31231 0068 4CED017A vstr.32 s15, [ip, #-4] 31232 .LVL5043: 31233 .loc 90 428 0 31234 006c 67EE867A vmul.f32 s15, s15, s12 31235 .LVL5044: 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Initialize pState pointer */ 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Advance state pointer by 1 for the next sample */ 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** px = pState++; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Initialize coefficient pointer */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pb = pCoeffs; 31236 .loc 90 435 0 31237 0070 4C46 mov r4, r9 31238 .LVL5045: 31239 .L2509: 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Loop unrolling: Compute 4 taps at a time. */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = numTaps >> 2U; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Update filter coefficients */ 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (tapCnt > 0U) 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Perform the multiply-accumulate */ 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pb += w * (*px++); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pb++; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pb += w * (*px++); 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pb++; 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pb += w * (*px++); 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pb++; 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pb += w * (*px++); 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pb++; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement loop counter */ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt--; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Loop unrolling: Compute remaining taps */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = numTaps % 0x4U; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** #else 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Initialize tapCnt with number of samples */ 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = numTaps; 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (tapCnt > 0U) 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { ARM GAS /tmp/ccJrAs6S.s page 1445 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Perform the multiply-accumulate */ 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pb += w * (*px++); 31240 .loc 90 475 0 31241 0072 50ED016A vldr.32 s13, [r0, #-4] 31242 0076 94ED007A vldr.32 s14, [r4] 31243 007a A6EEA77A vfma.f32 s14, s13, s15 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 31244 .loc 90 472 0 31245 007e 013D subs r5, r5, #1 31246 .LVL5046: 31247 0080 00F10400 add r0, r0, #4 31248 .LVL5047: 31249 .loc 90 475 0 31250 0084 A4EC017A vstmia.32 r4!, {s14} 31251 .LVL5048: 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 31252 .loc 90 472 0 31253 0088 F3D1 bne .L2509 31254 .LVL5049: 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 31255 .loc 90 367 0 31256 008a BAF1010A subs r10, r10, #1 31257 .LVL5050: 31258 008e 3546 mov r5, r6 31259 0090 CCD1 bne .L2510 31260 .LVL5051: 31261 .L2525: 31262 0092 0A9B ldr r3, [sp, #40] 31263 .LVL5052: 31264 0094 08EB8303 add r3, r8, r3, lsl #2 31265 .LVL5053: 31266 .L2505: 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pb++; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement loop counter */ 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt--; 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement loop counter */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** blkCnt--; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Processing is complete. 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** Now copy the last numTaps - 1 samples to the start of the state buffer. 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** This prepares the state buffer for the next function call. */ 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Points to the start of the pState buffer */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** pStateCurnt = S->pState; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* copy data */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Loop unrolling: Compute 4 taps at a time. */ 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = (numTaps - 1U) >> 2U; 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (tapCnt > 0U) 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { ARM GAS /tmp/ccJrAs6S.s page 1446 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pStateCurnt++ = *pState++; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pStateCurnt++ = *pState++; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pStateCurnt++ = *pState++; 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pStateCurnt++ = *pState++; 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement loop counter */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt--; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Loop unrolling: Compute remaining taps */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = (numTaps - 1U) % 0x4U; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** #else 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Initialize tapCnt with number of samples */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt = (numTaps - 1U); 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** while (tapCnt > 0U) 31267 .loc 90 520 0 31268 0098 013F subs r7, r7, #1 31269 .LVL5054: 31270 009a 05D0 beq .L2504 31271 .LVL5055: 31272 .L2512: 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pStateCurnt++ = *pState++; 31273 .loc 90 522 0 31274 009c 53F8042B ldr r2, [r3], #4 @ float 31275 .LVL5056: 31276 00a0 48F8042B str r2, [r8], #4 @ float 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 31277 .loc 90 520 0 31278 00a4 013F subs r7, r7, #1 31279 .LVL5057: 31280 00a6 F9D1 bne .L2512 31281 .LVL5058: 31282 .L2504: 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** /* Decrement loop counter */ 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** tapCnt--; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** } 31283 .loc 90 528 0 31284 00a8 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 31285 .LVL5059: 31286 .L2506: 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 31287 .loc 90 421 0 31288 00ac 43ED015A vstr.32 s11, [r3, #-4] 31289 .LVL5060: 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** *pErr++ = e; 31290 .loc 90 424 0 31291 00b0 52F8040C ldr r0, [r2, #-4] @ float 31292 .LVL5061: ARM GAS /tmp/ccJrAs6S.s page 1447 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** 31293 .loc 90 425 0 31294 00b4 4CF8040C str r0, [ip, #-4] @ float 31295 .LVL5062: 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** { 31296 .loc 90 367 0 31297 00b8 BAF1010A subs r10, r10, #1 31298 .LVL5063: 31299 00bc 3546 mov r5, r6 31300 00be B5D1 bne .L2510 31301 .LVL5064: 31302 00c0 E7E7 b .L2525 31303 .LVL5065: 31304 .L2514: 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c **** float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 31305 .loc 90 346 0 31306 00c2 4346 mov r3, r8 31307 .LVL5066: 31308 00c4 E8E7 b .L2505 31309 .L2527: 31310 00c6 00BF .align 2 31311 .L2526: 31312 00c8 00000000 .word 0 31313 .cfi_endproc 31314 .LFE235: 31316 .section .text.arm_lms_init_f32,"ax",%progbits 31317 .align 1 31318 .p2align 2,,3 31319 .global arm_lms_init_f32 31320 .syntax unified 31321 .thumb 31322 .thumb_func 31323 .fpu fpv4-sp-d16 31325 arm_lms_init_f32: 31326 .LFB236: 31327 .file 91 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * Title: arm_lms_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * Description: Floating-point LMS filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * ARM GAS /tmp/ccJrAs6S.s page 1448 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** @addtogroup LMS 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** @{ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** @brief Initialization function for floating-point LMS filter. 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** @param[in] S points to an instance of the floating-point LMS filter structure 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** @param[in] numTaps number of filter coefficients 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** @param[in] pCoeffs points to coefficient buffer 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** @param[in] pState points to state buffer 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** @param[in] mu step size that controls filter coefficient updates 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** @param[in] blockSize number of samples to process 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** @return none 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** @par Details 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** pCoeffs points to the array of filter coefficients stored in time r 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** 
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c ****      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c ****
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** The initial filter coefficients serve as a starting point for the adaptive filte 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** pState points to an array of length numTaps+blockSize-1numTaps = numTaps; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** /* Assign coefficient pointer */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** S->pCoeffs = pCoeffs; 31347 .loc 91 67 0 31348 0008 8260 str r2, [r0, #8] 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** /* Clear state buffer and size is always blockSize + numTaps */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t)); 31349 .loc 91 70 0 31350 000a 04F18044 add r4, r4, #1073741824 31351 000e 013C subs r4, r4, #1 31352 0010 0C44 add r4, r4, r1 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** /* Assign filter taps */ 31353 .loc 91 62 0 31354 0012 0546 mov r5, r0 31355 0014 B0EE408A vmov.f32 s16, s0 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** 31356 .loc 91 64 0 31357 0018 0180 strh r1, [r0] @ movhi 31358 .loc 91 70 0 31359 001a A200 lsls r2, r4, #2 31360 .LVL5068: 31361 001c 1846 mov r0, r3 31362 .LVL5069: 31363 001e 0021 movs r1, #0 31364 .LVL5070: 31365 0020 FFF7FEFF bl memset 31366 .LVL5071: 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** /* Assign state pointer */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** S->pState = pState; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** /* Assign Step size value */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** S->mu = mu; 31367 .loc 91 76 0 31368 0024 85ED038A vstr.32 s16, [r5, #12] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** } 31369 .loc 91 77 0 31370 0028 BDEC028B vldm sp!, {d8} 31371 .LCFI253: 31372 .cfi_restore 80 31373 .cfi_restore 81 31374 .cfi_def_cfa_offset 16 31375 .LVL5072: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c **** 31376 .loc 91 73 0 31377 002c 6860 str r0, [r5, #4] 31378 .loc 91 77 0 31379 002e 38BD pop {r3, r4, r5, pc} 31380 .cfi_endproc 31381 .LFE236: 31383 .section .text.arm_lms_init_q15,"ax",%progbits ARM GAS /tmp/ccJrAs6S.s page 1450 31384 .align 1 31385 .p2align 2,,3 31386 .global arm_lms_init_q15 31387 .syntax unified 31388 .thumb 31389 .thumb_func 31390 .fpu fpv4-sp-d16 31392 arm_lms_init_q15: 31393 .LFB237: 31394 .file 92 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * Title: arm_lms_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * Description: Q15 LMS filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @addtogroup LMS 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @brief Initialization function for the Q15 LMS filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @param[in] S points to an instance of the Q15 LMS filter structure. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @param[in] numTaps number of filter coefficients. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @param[in] pCoeffs points to coefficient buffer. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @param[in] pState points to state buffer. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @param[in] mu step size that controls filter coefficient updates. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @param[in] blockSize number of samples to process. ARM GAS /tmp/ccJrAs6S.s page 1451 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @param[in] postShift bit shift applied to coefficients. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @return none 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** @par Details 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** pCoeffs points to the array of filter coefficients stored in time r 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c ****      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** The initial filter coefficients serve as a starting point for the adaptive filte 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** pState points to the array of state variables and size of array is 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** numTaps+blockSize-1 samples, where blockSize is the nu 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** input samples processed by each call to arm_lms_q15(). 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** void arm_lms_init_q15( 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** arm_lms_instance_q15 * S, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** uint16_t numTaps, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** q15_t * pCoeffs, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** q15_t * pState, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** q15_t mu, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** uint32_t blockSize, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** uint32_t postShift) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** { 31395 .loc 92 70 0 31396 .cfi_startproc 31397 @ args = 12, pretend = 0, frame = 0 31398 @ frame_needed = 0, uses_anonymous_args = 0 31399 .LVL5073: 31400 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 31401 .LCFI254: 31402 .cfi_def_cfa_offset 24 31403 .cfi_offset 3, -24 31404 .cfi_offset 4, -20 31405 .cfi_offset 5, -16 31406 .cfi_offset 6, -12 31407 .cfi_offset 7, -8 31408 .cfi_offset 14, -4 31409 .loc 92 70 0 31410 0002 079C ldr r4, [sp, #28] 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /* Assign filter taps */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** S->numTaps = numTaps; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /* Assign coefficient pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** S->pCoeffs = pCoeffs; 31411 .loc 92 75 0 31412 0004 8260 str r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /* Clear state buffer and size is always blockSize + numTaps - 1 */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t)); 31413 .loc 92 78 0 31414 0006 04F10044 add r4, r4, #-2147483648 31415 000a 013C subs r4, r4, #1 31416 000c 0C44 add r4, r4, r1 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /* Assign filter taps */ 31417 .loc 92 70 0 31418 000e 0646 mov r6, r0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1452 31419 .loc 92 72 0 31420 0010 0180 strh r1, [r0] @ movhi 31421 .loc 92 78 0 31422 0012 6200 lsls r2, r4, #1 31423 .LVL5074: 31424 0014 1846 mov r0, r3 31425 .LVL5075: 31426 0016 0021 movs r1, #0 31427 .LVL5076: 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /* Assign filter taps */ 31428 .loc 92 70 0 31429 0018 BDF91870 ldrsh r7, [sp, #24] 31430 001c 089D ldr r5, [sp, #32] 31431 .loc 92 78 0 31432 001e FFF7FEFF bl memset 31433 .LVL5077: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /* Assign state pointer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** S->pState = pState; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /* Assign Step size value */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** S->mu = mu; 31434 .loc 92 84 0 31435 0022 B781 strh r7, [r6, #12] @ movhi 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 31436 .loc 92 81 0 31437 0024 7060 str r0, [r6, #4] 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** /* Assign postShift value to be applied */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** S->postShift = postShift; 31438 .loc 92 87 0 31439 0026 3561 str r5, [r6, #16] 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c **** } 31440 .loc 92 88 0 31441 0028 F8BD pop {r3, r4, r5, r6, r7, pc} 31442 .cfi_endproc 31443 .LFE237: 31445 002a 00BF .section .text.arm_lms_init_q31,"ax",%progbits 31446 .align 1 31447 .p2align 2,,3 31448 .global arm_lms_init_q31 31449 .syntax unified 31450 .thumb 31451 .thumb_func 31452 .fpu fpv4-sp-d16 31454 arm_lms_init_q31: 31455 .LFB238: 31456 .file 93 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * Title: arm_lms_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * Description: Q31 LMS filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * Target Processor: Cortex-M cores ARM GAS /tmp/ccJrAs6S.s page 1453 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @addtogroup LMS 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @brief Initialization function for Q31 LMS filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @param[in] S points to an instance of the Q31 LMS filter structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @param[in] numTaps number of filter coefficients 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @param[in] pCoeffs points to coefficient buffer 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @param[in] pState points to state buffer 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @param[in] mu step size that controls filter coefficient updates 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @param[in] blockSize number of samples to process 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @param[in] postShift bit shift applied to coefficients 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @return none 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** @par Details 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** pCoeffs points to the array of filter coefficients stored in time r 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c ****      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** The initial filter coefficients serve as a starting point for the adaptive filte 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** pState points to an array of length numTaps+blockSize-1blockSize is the number of input samples processed by each ca 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** arm_lms_q31(). 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** void arm_lms_init_q31( 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** arm_lms_instance_q31 * S, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** uint16_t numTaps, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** q31_t * pCoeffs, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** q31_t * pState, ARM GAS /tmp/ccJrAs6S.s page 1454 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** q31_t mu, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** uint32_t blockSize, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** uint32_t postShift) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** { 31457 .loc 93 70 0 31458 .cfi_startproc 31459 @ args = 12, pretend = 0, frame = 0 31460 @ frame_needed = 0, uses_anonymous_args = 0 31461 .LVL5078: 31462 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 31463 .LCFI255: 31464 .cfi_def_cfa_offset 24 31465 .cfi_offset 3, -24 31466 .cfi_offset 4, -20 31467 .cfi_offset 5, -16 31468 .cfi_offset 6, -12 31469 .cfi_offset 7, -8 31470 .cfi_offset 14, -4 31471 .loc 93 70 0 31472 0002 DDE90664 ldrd r6, r4, [sp, #24] 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /* Assign filter taps */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** S->numTaps = numTaps; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /* Assign coefficient pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** S->pCoeffs = pCoeffs; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /* Clear state buffer and size is always blockSize + numTaps - 1 */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t)); 31473 .loc 93 78 0 31474 0006 04F18044 add r4, r4, #1073741824 31475 000a 013C subs r4, r4, #1 31476 000c 0C44 add r4, r4, r1 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /* Assign filter taps */ 31477 .loc 93 70 0 31478 000e 0746 mov r7, r0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 31479 .loc 93 75 0 31480 0010 8260 str r2, [r0, #8] 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 31481 .loc 93 72 0 31482 0012 0180 strh r1, [r0] @ movhi 31483 .loc 93 78 0 31484 0014 A200 lsls r2, r4, #2 31485 .LVL5079: 31486 0016 1846 mov r0, r3 31487 .LVL5080: 31488 0018 0021 movs r1, #0 31489 .LVL5081: 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /* Assign filter taps */ 31490 .loc 93 70 0 31491 001a 089D ldr r5, [sp, #32] 31492 .loc 93 78 0 31493 001c FFF7FEFF bl memset 31494 .LVL5082: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /* Assign state pointer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** S->pState = pState; ARM GAS /tmp/ccJrAs6S.s page 1455 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /* Assign Step size value */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** S->mu = mu; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** /* Assign postShift value to be applied */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** S->postShift = postShift; 31495 .loc 93 87 0 31496 0020 C7E90365 strd r6, r5, [r7, #12] 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** 31497 .loc 93 81 0 31498 0024 7860 str r0, [r7, #4] 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c **** } 31499 .loc 93 88 0 31500 0026 F8BD pop {r3, r4, r5, r6, r7, pc} 31501 .cfi_endproc 31502 .LFE238: 31504 .section .text.arm_lms_norm_f32,"ax",%progbits 31505 .align 1 31506 .p2align 2,,3 31507 .global arm_lms_norm_f32 31508 .syntax unified 31509 .thumb 31510 .thumb_func 31511 .fpu fpv4-sp-d16 31513 arm_lms_norm_f32: 31514 .LFB239: 31515 .file 94 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * Title: arm_lms_norm_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * Description: Processing function for the floating-point NLMS filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1456 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @defgroup LMS_NORM Normalized LMS Filters 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** This set of functions implements a commonly used adaptive filter. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normaliza 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** factor which increases the adaptation rate of the filter. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floa 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** A normalized least mean square (NLMS) filter consists of two components as shown below. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The first component is a standard transversal or FIR filter. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The second component is a coefficient update mechanism. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The NLMS filter has two input signals. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The filter coefficient update mechanism is based on the difference between the FIR filter output 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** This "error signal" tends towards zero as the filter adapts. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The NLMS processing functions accept the input and reference input signals and generate the filte 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** \image html LMS.gif "Internal structure of the NLMS adaptive filter" 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The functions operate on blocks of data and each call to the function processes 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** blockSize samples through the filter. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pSrc points to input signal, pRef points to reference signal, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pOut points to output signal and pErr points to error signal. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** All arrays contain blockSize values. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The functions operate on a block-by-block basis. 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** Internally, the filter coefficients b[n] are updated on a sample-by-sample basis. 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The convergence of the LMS filter is slower compared to the normalized LMS algorithm. 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par Algorithm 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The output signal y[n] is computed by a standard FIR filter: 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c ****       y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c ****
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The error signal equals the difference between the reference signal d[n] 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** e[n] = d[n] - y[n]. 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** After each sample of the error signal is computed the instanteous energy of the 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c ****      E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.
  80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c ****
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The filter coefficients b[k] are then updated on a sample-by-sample 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 
  83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c ****       b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1
  84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c ****
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** where mu is the step size and controls the rate of coefficient conv 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** In the APIs, pCoeffs points to a coefficient array of size nu ARM GAS /tmp/ccJrAs6S.s page 1457 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** Coefficients are stored in time reversed order. 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 
  91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c ****      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c ****
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pState points to a state array of size numTaps + blockSize - 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** Samples in the state buffer are stored in the order: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 
  98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c ****      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-
  99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** Note that the length of the state buffer exceeds the length of the coefficient a 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The increased state buffer length allows circular addressing, which is tradition 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** to be avoided and yields a significant speed improvement. 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The state variables are updated after each block of data is processed. 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par Instance Structure 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The coefficients and state variables for a filter are stored together in an inst 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** A separate instance structure must be defined for each filter and 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** coefficient and state arrays cannot be shared among instances. 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** There are separate instance structure declarations for each of the 3 supported d 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par Initialization Functions 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** There is also an associated initialization function for each data type. 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The initialization function performs the following operations: 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** - Sets the values of the internal structure fields. 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** - Zeros out the values in the state buffer. 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** To do this manually without calling the init function, assign the follow subfiel 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState t 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** For Q7, Q15, and Q31 the following fields must also be initialized; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** recipTable, postShift 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** Instance structure cannot be placed into a const data section and it is recommen 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par Fixed-Point Behavior 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** Care must be taken when using the Q15 and Q31 versions of the normalised LMS fil 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The following issues must be considered: 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** - Scaling of coefficients 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** - Overflow and saturation 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par Scaling of Coefficients (fixed point versions) 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** Filter coefficients are represented as fractional values and 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** coefficients are restricted to lie in the range [-1 +1). 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The fixed-point functions have an additional scaling parameter postShift2^postShift and 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** allows the filter coefficients to exceed the range [+1 -1). 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** The value of postShift is set by the user based on the expected gai 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @par Overflow and Saturation (fixed point versions) 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** described separately as part of the function specific documentation below. 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @addtogroup LMS_NORM ARM GAS /tmp/ccJrAs6S.s page 1458 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @{ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @brief Processing function for floating-point normalized LMS filter. 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @param[in] S points to an instance of the floating-point normalized LMS filter struct 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @param[in] pSrc points to the block of input data 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @param[in] pRef points to the block of reference data 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @param[out] pOut points to the block of output data 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @param[out] pErr points to the block of error data 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @param[in] blockSize number of samples to process 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** @return none 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** #if defined(ARM_MATH_NEON) 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** void arm_lms_norm_f32( 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** arm_lms_norm_instance_f32 * S, 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** const float32_t * pSrc, 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t * pRef, 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t * pOut, 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t * pErr, 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** uint32_t blockSize) 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t *pState = S->pState; /* State pointer */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t *px, *pb; /* Temporary pointers for state and coefficient bu 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t mu = S->mu; /* Adaptive factor */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t energy; /* Energy of the input */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t sum, e, d; /* accumulator, error, reference data sample */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t w, x0, in; /* weight factor, temporary variable to hold input 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32x4_t tempV, sumV, xV, bV; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32x2_t tempV2; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initializations of error, difference, Coefficient update */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** e = 0.0f; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** d = 0.0f; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** w = 0.0f; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** energy = S->energy; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** x0 = S->x0; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* pStateCurnt points to the location where the new input data should be written */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Loop over blockSize number of values */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** blkCnt = blockSize; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (blkCnt > 0U) 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Copy the new input sample into the state buffer */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pStateCurnt++ = *pSrc; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** ARM GAS /tmp/ccJrAs6S.s page 1459 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initialize pState pointer */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** px = pState; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initialize coeff pointer */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pb = (pCoeffs); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Read the sample from input buffer */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** in = *pSrc++; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Update the energy calculation */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** energy -= x0 * x0; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** energy += in * in; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Set the accumulator to zero */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** sum = 0.0f; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** sumV = vdupq_n_f32(0.0); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Process 4 taps at a time. */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = numTaps >> 2; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (tapCnt > 0U) 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Perform the multiply-accumulate */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** xV = vld1q_f32(px); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** bV = vld1q_f32(pb); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** sumV = vmlaq_f32(sumV, xV, bV); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** px += 4; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pb += 4; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement the loop counter */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt--; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tempV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** sum = vget_lane_f32(tempV2, 0) + vget_lane_f32(tempV2, 1); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* If the filter length is not a multiple of 4, compute the remaining filter taps */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = numTaps % 0x4U; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (tapCnt > 0U) 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Perform the multiply-accumulate */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** sum += (*px++) * (*pb++); 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement the loop counter */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt--; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* The result in the accumulator, store in the destination buffer. */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pOut++ = sum; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Compute and store error */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** d = (float32_t) (*pRef++); 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** e = d - sum; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pErr++ = e; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Calculation of Weighting factor for updating filter coefficients */ ARM GAS /tmp/ccJrAs6S.s page 1460 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* epsilon value 0.000000119209289f */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** w = (e * mu) / (energy + 0.000000119209289f); 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initialize pState pointer */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** px = pState; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initialize coeff pointer */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pb = (pCoeffs); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Process 4 taps at a time. */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = numTaps >> 2; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Update filter coefficients */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (tapCnt > 0U) 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Perform the multiply-accumulate */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** xV = vld1q_f32(px); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** bV = vld1q_f32(pb); 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** px += 4; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** bV = vmlaq_n_f32(bV,xV,w); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** vst1q_f32(pb,bV); 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pb += 4; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement the loop counter */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt--; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* If the filter length is not a multiple of 4, compute the remaining filter taps */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = numTaps % 0x4U; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (tapCnt > 0U) 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Perform the multiply-accumulate */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pb += w * (*px++); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pb++; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement the loop counter */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt--; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** x0 = *pState; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Advance state pointer by 1 for the next sample */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pState = pState + 1; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement the loop counter */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** blkCnt--; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** S->energy = energy; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** S->x0 = x0; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Processing is complete. Now copy the last numTaps - 1 samples to the 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** satrt of the state buffer. This prepares the state buffer for the 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** next function call. */ ARM GAS /tmp/ccJrAs6S.s page 1461 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Points to the start of the pState buffer */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pStateCurnt = S->pState; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Process 4 taps at a time for (numTaps - 1U)/4 samples copy */ 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = (numTaps - 1U) >> 2U; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* copy data */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (tapCnt > 0U) 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tempV = vld1q_f32(pState); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** vst1q_f32(pStateCurnt,tempV); 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pState += 4; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pStateCurnt += 4; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement the loop counter */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt--; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Calculate remaining number of copies */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = (numTaps - 1U) % 0x4U; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Copy the remaining q31_t data */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (tapCnt > 0U) 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pStateCurnt++ = *pState++; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement the loop counter */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt--; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** #else 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** void arm_lms_norm_f32( 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** arm_lms_norm_instance_f32 * S, 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** const float32_t * pSrc, 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t * pRef, 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t * pOut, 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t * pErr, 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** uint32_t blockSize) 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31516 .loc 94 356 0 31517 .cfi_startproc 31518 @ args = 8, pretend = 0, frame = 0 31519 @ frame_needed = 0, uses_anonymous_args = 0 31520 .LVL5083: 31521 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 31522 .LCFI256: 31523 .cfi_def_cfa_offset 36 31524 .cfi_offset 4, -36 31525 .cfi_offset 5, -32 31526 .cfi_offset 6, -28 31527 .cfi_offset 7, -24 31528 .cfi_offset 8, -20 31529 .cfi_offset 9, -16 31530 .cfi_offset 10, -12 31531 .cfi_offset 11, -8 ARM GAS /tmp/ccJrAs6S.s page 1462 31532 .cfi_offset 14, -4 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t *pState = S->pState; /* State pointer */ 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t *px, *pb; /* Temporary pointers for state and coeffici 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t mu = S->mu; /* Adaptive factor */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t acc, e; /* Accumulator, error */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t w; /* Weight factor */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 31533 .loc 94 364 0 31534 0004 0688 ldrh r6, [r0] 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t energy; /* Energy of the input */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t x0, in; /* Temporary variable to hold input sample a 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initializations of error, difference, Coefficient update */ 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** e = 0.0f; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** w = 0.0f; 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** energy = S->energy; 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** x0 = S->x0; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* pStateCurnt points to the location where the new input data should be written */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* initialise loop count */ 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** blkCnt = blockSize; 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (blkCnt > 0U) 31535 .loc 94 383 0 31536 0006 0A9C ldr r4, [sp, #40] 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t acc, e; /* Accumulator, error */ 31537 .loc 94 361 0 31538 0008 90ED035A vldr.32 s10, [r0, #12] 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** x0 = S->x0; 31539 .loc 94 373 0 31540 000c 90ED046A vldr.32 s12, [r0, #16] 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31541 .loc 94 374 0 31542 0010 90ED057A vldr.32 s14, [r0, #20] 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t *pState = S->pState; /* State pointer */ 31543 .loc 94 356 0 31544 0014 DDF824C0 ldr ip, [sp, #36] 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t *pStateCurnt; /* Points to the current sample of the state 31545 .loc 94 358 0 31546 0018 D0E901E8 ldrd lr, r8, [r0, #4] 31547 .LVL5084: 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31548 .loc 94 378 0 31549 001c 06F18049 add r9, r6, #1073741824 31550 0020 09F1FF39 add r9, r9, #-1 31551 0024 0EEB8909 add r9, lr, r9, lsl #2 31552 .LVL5085: 31553 .loc 94 383 0 31554 0028 002C cmp r4, #0 31555 002a 5FD0 beq .L2544 ARM GAS /tmp/ccJrAs6S.s page 1463 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Copy the new input sample into the state buffer */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pStateCurnt++ = *pSrc; 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initialize pState pointer */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** px = pState; 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initialize coefficient pointer */ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pb = pCoeffs; 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Read the sample from input buffer */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** in = *pSrc++; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Update the energy calculation */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** energy -= x0 * x0; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** energy += in * in; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Set the accumulator to zero */ 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** acc = 0.0f; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Loop unrolling: Compute 4 taps at a time. */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = numTaps >> 2U; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (tapCnt > 0U) 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Perform the multiply-accumulate */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** acc += (*px++) * (*pb++); 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** acc += (*px++) * (*pb++); 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** acc += (*px++) * (*pb++); 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** acc += (*px++) * (*pb++); 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement loop counter */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt--; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Loop unrolling: Compute remaining taps */ 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = numTaps % 0x4U; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** #else 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initialize tapCnt with number of samples */ 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = numTaps; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (tapCnt > 0U) 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Perform the multiply-accumulate */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** acc += (*px++) * (*pb++); 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement the loop counter */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt--; ARM GAS /tmp/ccJrAs6S.s page 1464 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Store the result from accumulator into the destination buffer. */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pOut++ = acc; 31556 .loc 94 444 0 31557 002c 9FED304A vldr.32 s8, .L2555 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Compute and store error */ 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** e = (float32_t) *pRef++ - acc; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pErr++ = e; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Calculation of Weighting factor for updating filter coefficients */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* epsilon value 0.000000119209289f */ 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** w = (e * mu) / (energy + 0.000000119209289f); 31558 .loc 94 452 0 31559 0030 DFED304A vldr.32 s9, .L2555+4 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31560 .loc 94 383 0 31561 0034 A246 mov r10, r4 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 31562 .loc 94 357 0 31563 0036 7746 mov r7, lr 31564 .LVL5086: 31565 .L2540: 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31566 .loc 94 386 0 31567 0038 0C68 ldr r4, [r1] @ float 31568 003a 49F8044B str r4, [r9], #4 @ float 31569 .LVL5087: 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31570 .loc 94 395 0 31571 003e F1EC017A vldmia.32 r1!, {s15} 31572 .LVL5088: 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31573 .loc 94 399 0 31574 0042 67EEA77A vmul.f32 s15, s15, s15 31575 .LVL5089: 31576 0046 0CF1040C add ip, ip, #4 31577 .LVL5090: 31578 004a E7EE477A vfms.f32 s15, s14, s14 31579 004e 0432 adds r2, r2, #4 31580 .LVL5091: 31581 0050 0433 adds r3, r3, #4 31582 .LVL5092: 31583 0052 36EE276A vadd.f32 s12, s12, s15 31584 .LVL5093: 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31585 .loc 94 434 0 31586 0056 EEB3 cbz r6, .L2536 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31587 .loc 94 402 0 31588 0058 DFED257A vldr.32 s15, .L2555 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31589 .loc 94 434 0 31590 005c 3446 mov r4, r6 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31591 .loc 94 392 0 ARM GAS /tmp/ccJrAs6S.s page 1465 31592 005e C346 mov fp, r8 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31593 .loc 94 434 0 31594 0060 3D46 mov r5, r7 31595 .LVL5094: 31596 .L2537: 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31597 .loc 94 437 0 31598 0062 F5EC016A vldmia.32 r5!, {s13} 31599 .LVL5095: 31600 0066 BBEC017A vldmia.32 fp!, {s14} 31601 .LVL5096: 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31602 .loc 94 434 0 31603 006a 013C subs r4, r4, #1 31604 .LVL5097: 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31605 .loc 94 437 0 31606 006c E6EE877A vfma.f32 s15, s13, s14 31607 .LVL5098: 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31608 .loc 94 434 0 31609 0070 F7D1 bne .L2537 31610 .LVL5099: 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31611 .loc 94 444 0 31612 0072 43ED017A vstr.32 s15, [r3, #-4] 31613 .LVL5100: 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pErr++ = e; 31614 .loc 94 447 0 31615 0076 12ED017A vldr.32 s14, [r2, #-4] 31616 007a 77EE677A vsub.f32 s15, s14, s15 31617 .LVL5101: 31618 .loc 94 452 0 31619 007e 36EE247A vadd.f32 s14, s12, s9 31620 0082 67EE855A vmul.f32 s11, s15, s10 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31621 .loc 94 448 0 31622 0086 4CED017A vstr.32 s15, [ip, #-4] 31623 .LVL5102: 31624 .loc 94 452 0 31625 008a C5EE876A vdiv.f32 s13, s11, s14 31626 .LVL5103: 31627 008e 3546 mov r5, r6 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initialize pState pointer */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** px = pState; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initialize coefficient pointer */ 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pb = pCoeffs; 31628 .loc 94 458 0 31629 0090 4446 mov r4, r8 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31630 .loc 94 452 0 31631 0092 BB46 mov fp, r7 31632 .LVL5104: 31633 .L2539: ARM GAS /tmp/ccJrAs6S.s page 1466 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Loop unrolling: Compute 4 taps at a time. */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = numTaps >> 2U; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Update filter coefficients */ 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (tapCnt > 0U) 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Perform the multiply-accumulate */ 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pb += w * (*px++); 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pb++; 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pb += w * (*px++); 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pb++; 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pb += w * (*px++); 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pb++; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pb += w * (*px++); 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pb++; 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement loop counter */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt--; 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Loop unrolling: Compute remaining taps */ 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = numTaps % 0x4U; 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** #else 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initialize tapCnt with number of samples */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = numTaps; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (tapCnt > 0U) 31634 .loc 94 495 0 31635 0094 013D subs r5, r5, #1 31636 .LVL5105: 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Perform the multiply-accumulate */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pb += w * (*px++); 31637 .loc 94 498 0 31638 0096 BBEC017A vldmia.32 fp!, {s14} 31639 .LVL5106: 31640 009a D4ED007A vldr.32 s15, [r4] 31641 009e E7EE267A vfma.f32 s15, s14, s13 31642 00a2 E4EC017A vstmia.32 r4!, {s15} 31643 .LVL5107: 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31644 .loc 94 495 0 31645 00a6 F5D1 bne .L2539 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31646 .loc 94 383 0 31647 00a8 BAF1010A subs r10, r10, #1 31648 .LVL5108: ARM GAS /tmp/ccJrAs6S.s page 1467 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pb++; 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement loop counter */ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt--; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** x0 = *pState; 31649 .loc 94 505 0 31650 00ac B7EC017A vldmia.32 r7!, {s14} 31651 .LVL5109: 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31652 .loc 94 383 0 31653 00b0 C2D1 bne .L2540 31654 .LVL5110: 31655 .L2554: 31656 00b2 0A9B ldr r3, [sp, #40] 31657 .LVL5111: 31658 00b4 0EEB8303 add r3, lr, r3, lsl #2 31659 .LVL5112: 31660 .L2535: 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Advance state pointer by 1 for the next sample */ 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pState = pState + 1; 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement loop counter */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** blkCnt--; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Save energy and x0 values for the next frame */ 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** S->energy = energy; 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** S->x0 = x0; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Processing is complete. 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** Now copy the last numTaps - 1 samples to the start of the state buffer. 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** This prepares the state buffer for the next function call. */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Points to the start of the pState buffer */ 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** pStateCurnt = S->pState; 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* copy data */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Loop unrolling: Compute 4 taps at a time. */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = (numTaps - 1U) >> 2U; 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (tapCnt > 0U) 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pStateCurnt++ = *pState++; 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pStateCurnt++ = *pState++; 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pStateCurnt++ = *pState++; 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pStateCurnt++ = *pState++; 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement loop counter */ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt--; 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Loop unrolling: Compute remaining taps */ ARM GAS /tmp/ccJrAs6S.s page 1468 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = (numTaps - 1U) % 0x4U; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** #else 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Initialize tapCnt with number of samples */ 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt = (numTaps - 1U); 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** while (tapCnt > 0U) 31661 .loc 94 552 0 31662 00b8 013E subs r6, r6, #1 31663 .LVL5113: 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** S->x0 = x0; 31664 .loc 94 515 0 31665 00ba 80ED046A vstr.32 s12, [r0, #16] 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31666 .loc 94 516 0 31667 00be 80ED057A vstr.32 s14, [r0, #20] 31668 .LVL5114: 31669 .loc 94 552 0 31670 00c2 05D0 beq .L2534 31671 .LVL5115: 31672 .L2542: 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pStateCurnt++ = *pState++; 31673 .loc 94 554 0 31674 00c4 53F8042B ldr r2, [r3], #4 @ float 31675 .LVL5116: 31676 00c8 4EF8042B str r2, [lr], #4 @ float 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31677 .loc 94 552 0 31678 00cc 013E subs r6, r6, #1 31679 .LVL5117: 31680 00ce F9D1 bne .L2542 31681 .LVL5118: 31682 .L2534: 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** /* Decrement loop counter */ 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** tapCnt--; 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** } 31683 .loc 94 560 0 31684 00d0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 31685 .LVL5119: 31686 .L2536: 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31687 .loc 94 444 0 31688 00d4 03ED014A vstr.32 s8, [r3, #-4] 31689 .LVL5120: 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** *pErr++ = e; 31690 .loc 94 447 0 31691 00d8 52F8044C ldr r4, [r2, #-4] @ float 31692 .LVL5121: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31693 .loc 94 448 0 ARM GAS /tmp/ccJrAs6S.s page 1469 31694 00dc 4CF8044C str r4, [ip, #-4] @ float 31695 .LVL5122: 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31696 .loc 94 383 0 31697 00e0 BAF1010A subs r10, r10, #1 31698 .LVL5123: 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** 31699 .loc 94 505 0 31700 00e4 B7EC017A vldmia.32 r7!, {s14} 31701 .LVL5124: 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** { 31702 .loc 94 383 0 31703 00e8 A6D1 bne .L2540 31704 00ea E2E7 b .L2554 31705 .LVL5125: 31706 .L2544: 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c **** float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 31707 .loc 94 357 0 31708 00ec 7346 mov r3, lr 31709 .LVL5126: 31710 00ee E3E7 b .L2535 31711 .L2556: 31712 .align 2 31713 .L2555: 31714 00f0 00000000 .word 0 31715 00f4 00000034 .word 872415232 31716 .cfi_endproc 31717 .LFE239: 31719 .section .text.arm_lms_norm_init_f32,"ax",%progbits 31720 .align 1 31721 .p2align 2,,3 31722 .global arm_lms_norm_init_f32 31723 .syntax unified 31724 .thumb 31725 .thumb_func 31726 .fpu fpv4-sp-d16 31728 arm_lms_norm_init_f32: 31729 .LFB240: 31730 .file 95 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * Title: arm_lms_norm_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * Description: Floating-point NLMS filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * You may obtain a copy of the License at ARM GAS /tmp/ccJrAs6S.s page 1470 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** @addtogroup LMS_NORM 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** @brief Initialization function for floating-point normalized LMS filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** @param[in] S points to an instance of the floating-point LMS filter structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** @param[in] numTaps number of filter coefficients 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** @param[in] pCoeffs points to coefficient buffer 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** @param[in] pState points to state buffer 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** @param[in] mu step size that controls filter coefficient updates 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** @param[in] blockSize number of samples to process 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** @return none 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** @par Details 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** pCoeffs points to the array of filter coefficients stored in time r 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c ****      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** The initial filter coefficients serve as a starting point for the adaptive filte 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** pState points to an array of length numTaps+blockSize-1blockSize is the number of input samples processed by each ca 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** void arm_lms_norm_init_f32( 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** arm_lms_norm_instance_f32 * S, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** uint16_t numTaps, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** float32_t * pCoeffs, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** float32_t * pState, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** float32_t mu, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** uint32_t blockSize) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** { 31731 .loc 95 67 0 31732 .cfi_startproc 31733 @ args = 4, pretend = 0, frame = 0 31734 @ frame_needed = 0, uses_anonymous_args = 0 31735 .LVL5127: 31736 0000 38B5 push {r3, r4, r5, lr} 31737 .LCFI257: 31738 .cfi_def_cfa_offset 16 ARM GAS /tmp/ccJrAs6S.s page 1471 31739 .cfi_offset 3, -16 31740 .cfi_offset 4, -12 31741 .cfi_offset 5, -8 31742 .cfi_offset 14, -4 31743 0002 2DED028B vpush.64 {d8} 31744 .LCFI258: 31745 .cfi_def_cfa_offset 24 31746 .cfi_offset 80, -24 31747 .cfi_offset 81, -20 31748 .loc 95 67 0 31749 0006 069C ldr r4, [sp, #24] 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /* Assign filter taps */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** S->numTaps = numTaps; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /* Assign coefficient pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** S->pCoeffs = pCoeffs; 31750 .loc 95 72 0 31751 0008 8260 str r2, [r0, #8] 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /* Clear state buffer and size is always blockSize + numTaps - 1 */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t)); 31752 .loc 95 75 0 31753 000a 04F18044 add r4, r4, #1073741824 31754 000e 013C subs r4, r4, #1 31755 0010 0C44 add r4, r4, r1 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /* Assign filter taps */ 31756 .loc 95 67 0 31757 0012 0546 mov r5, r0 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 31758 .loc 95 69 0 31759 0014 0180 strh r1, [r0] @ movhi 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /* Assign filter taps */ 31760 .loc 95 67 0 31761 0016 B0EE408A vmov.f32 s16, s0 31762 .loc 95 75 0 31763 001a A200 lsls r2, r4, #2 31764 .LVL5128: 31765 001c 1846 mov r0, r3 31766 .LVL5129: 31767 001e 0021 movs r1, #0 31768 .LVL5130: 31769 0020 FFF7FEFF bl memset 31770 .LVL5131: 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /* Assign state pointer */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** S->pState = pState; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /* Assign Step size value */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** S->mu = mu; 31771 .loc 95 81 0 31772 0024 85ED038A vstr.32 s16, [r5, #12] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /* Initialise Energy to zero */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** S->energy = 0.0f; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** /* Initialise x0 to zero */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** S->x0 = 0.0f; ARM GAS /tmp/ccJrAs6S.s page 1472 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** } 31773 .loc 95 88 0 31774 0028 BDEC028B vldm sp!, {d8} 31775 .LCFI259: 31776 .cfi_restore 80 31777 .cfi_restore 81 31778 .cfi_def_cfa_offset 16 31779 .LVL5132: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 31780 .loc 95 84 0 31781 002c 0022 movs r2, #0 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 31782 .loc 95 78 0 31783 002e 6860 str r0, [r5, #4] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** 31784 .loc 95 84 0 31785 0030 2A61 str r2, [r5, #16] @ float 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c **** } 31786 .loc 95 87 0 31787 0032 6A61 str r2, [r5, #20] @ float 31788 .loc 95 88 0 31789 0034 38BD pop {r3, r4, r5, pc} 31790 .cfi_endproc 31791 .LFE240: 31793 0036 00BF .section .text.arm_lms_norm_init_q15,"ax",%progbits 31794 .align 1 31795 .p2align 2,,3 31796 .global arm_lms_norm_init_q15 31797 .syntax unified 31798 .thumb 31799 .thumb_func 31800 .fpu fpv4-sp-d16 31802 arm_lms_norm_init_q15: 31803 .LFB241: 31804 .file 96 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * Title: arm_lms_norm_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * Description: Q15 NLMS filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * Unless required by applicable law or agreed to in writing, software ARM GAS /tmp/ccJrAs6S.s page 1473 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** @addtogroup LMS_NORM 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** @{ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** */ 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** @brief Initialization function for Q15 normalized LMS filter. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** @param[in] S points to an instance of the Q15 normalized LMS filter structure. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** @param[in] numTaps number of filter coefficients. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** @param[in] pCoeffs points to coefficient buffer. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** @param[in] pState points to state buffer. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** @param[in] mu step size that controls filter coefficient updates. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** @param[in] blockSize number of samples to process. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** @param[in] postShift bit shift applied to coefficients. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** @par Details 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** pCoeffs points to the array of filter coefficients stored in time r 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c ****      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** The initial filter coefficients serve as a starting point for the adaptive filte 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** pState points to the array of state variables and size of array is 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** numTaps+blockSize-1 samples, where blockSize is the nu 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** by each call to arm_lms_norm_q15(). 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** void arm_lms_norm_init_q15( 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** arm_lms_norm_instance_q15 * S, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** uint16_t numTaps, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** q15_t * pCoeffs, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** q15_t * pState, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** q15_t mu, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** uint32_t blockSize, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** uint8_t postShift) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** { 31805 .loc 96 67 0 31806 .cfi_startproc 31807 @ args = 12, pretend = 0, frame = 0 31808 @ frame_needed = 0, uses_anonymous_args = 0 31809 .LVL5133: 31810 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 31811 .LCFI260: 31812 .cfi_def_cfa_offset 24 31813 .cfi_offset 3, -24 31814 .cfi_offset 4, -20 31815 .cfi_offset 5, -16 31816 .cfi_offset 6, -12 ARM GAS /tmp/ccJrAs6S.s page 1474 31817 .cfi_offset 7, -8 31818 .cfi_offset 14, -4 31819 .loc 96 67 0 31820 0002 079D ldr r5, [sp, #28] 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* Assign filter taps */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** S->numTaps = numTaps; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* Assign coefficient pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** S->pCoeffs = pCoeffs; 31821 .loc 96 72 0 31822 0004 8260 str r2, [r0, #8] 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* Clear state buffer and size is always blockSize + numTaps - 1 */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t)); 31823 .loc 96 75 0 31824 0006 05F10045 add r5, r5, #-2147483648 31825 000a 013D subs r5, r5, #1 31826 000c 0D44 add r5, r5, r1 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* Assign filter taps */ 31827 .loc 96 67 0 31828 000e 0446 mov r4, r0 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 31829 .loc 96 69 0 31830 0010 0180 strh r1, [r0] @ movhi 31831 .loc 96 75 0 31832 0012 6A00 lsls r2, r5, #1 31833 .LVL5134: 31834 0014 0021 movs r1, #0 31835 .LVL5135: 31836 0016 1846 mov r0, r3 31837 .LVL5136: 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* Assign filter taps */ 31838 .loc 96 67 0 31839 0018 BDF91860 ldrsh r6, [sp, #24] 31840 001c 9DF82070 ldrb r7, [sp, #32] @ zero_extendqisi2 31841 .loc 96 75 0 31842 0020 FFF7FEFF bl memset 31843 .LVL5137: 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* Assign post Shift value applied to coefficients */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** S->postShift = postShift; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* Assign state pointer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** S->pState = pState; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* Assign Step size value */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** S->mu = mu; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* Initialize reciprocal pointer table */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** S->recipTable = (q15_t *) armRecipTableQ15; 31844 .loc 96 87 0 31845 0024 0349 ldr r1, .L2561 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 31846 .loc 96 78 0 31847 0026 A773 strb r7, [r4, #14] 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* Initialise Energy to zero */ ARM GAS /tmp/ccJrAs6S.s page 1475 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** S->energy = 0; 31848 .loc 96 90 0 31849 0028 0022 movs r2, #0 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 31850 .loc 96 81 0 31851 002a 6060 str r0, [r4, #4] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 31852 .loc 96 84 0 31853 002c A681 strh r6, [r4, #12] @ movhi 31854 .loc 96 90 0 31855 002e C4E90412 strd r1, r2, [r4, #16] 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** /* Initialise x0 to zero */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** S->x0 = 0; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c **** } 31856 .loc 96 94 0 31857 0032 F8BD pop {r3, r4, r5, r6, r7, pc} 31858 .LVL5138: 31859 .L2562: 31860 .align 2 31861 .L2561: 31862 0034 00000000 .word armRecipTableQ15 31863 .cfi_endproc 31864 .LFE241: 31866 .section .text.arm_lms_norm_init_q31,"ax",%progbits 31867 .align 1 31868 .p2align 2,,3 31869 .global arm_lms_norm_init_q31 31870 .syntax unified 31871 .thumb 31872 .thumb_func 31873 .fpu fpv4-sp-d16 31875 arm_lms_norm_init_q31: 31876 .LFB242: 31877 .file 97 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * Title: arm_lms_norm_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * Description: Q31 NLMS filter initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * Unless required by applicable law or agreed to in writing, software ARM GAS /tmp/ccJrAs6S.s page 1476 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** @addtogroup LMS_NORM 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** @{ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** */ 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** @brief Initialization function for Q31 normalized LMS filter. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** @param[in] S points to an instance of the Q31 normalized LMS filter structure. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** @param[in] numTaps number of filter coefficients. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** @param[in] pCoeffs points to coefficient buffer. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** @param[in] pState points to state buffer. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** @param[in] mu step size that controls filter coefficient updates. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** @param[in] blockSize number of samples to process. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** @param[in] postShift bit shift applied to coefficients. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** @par Details 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** pCoeffs points to the array of filter coefficients stored in time r 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c ****      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** The initial filter coefficients serve as a starting point for the adaptive filte 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** pState points to an array of length numTaps+blockSize-1blockSize is the number of input samples processed by each ca 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** void arm_lms_norm_init_q31( 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** arm_lms_norm_instance_q31 * S, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** uint16_t numTaps, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** q31_t * pCoeffs, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** q31_t * pState, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** q31_t mu, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** uint32_t blockSize, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** uint8_t postShift) 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** { 31878 .loc 97 66 0 31879 .cfi_startproc 31880 @ args = 12, pretend = 0, frame = 0 31881 @ frame_needed = 0, uses_anonymous_args = 0 31882 .LVL5139: 31883 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 31884 .LCFI261: 31885 .cfi_def_cfa_offset 24 31886 .cfi_offset 3, -24 31887 .cfi_offset 4, -20 31888 .cfi_offset 5, -16 31889 .cfi_offset 6, -12 31890 .cfi_offset 7, -8 ARM GAS /tmp/ccJrAs6S.s page 1477 31891 .cfi_offset 14, -4 31892 .loc 97 66 0 31893 0002 DDE90665 ldrd r6, r5, [sp, #24] 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* Assign filter taps */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** S->numTaps = numTaps; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* Assign coefficient pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** S->pCoeffs = pCoeffs; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* Clear state buffer and size is always blockSize + numTaps - 1 */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t)); 31894 .loc 97 74 0 31895 0006 05F18045 add r5, r5, #1073741824 31896 000a 013D subs r5, r5, #1 31897 000c 0D44 add r5, r5, r1 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* Assign filter taps */ 31898 .loc 97 66 0 31899 000e 0446 mov r4, r0 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 31900 .loc 97 71 0 31901 0010 8260 str r2, [r0, #8] 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 31902 .loc 97 68 0 31903 0012 0180 strh r1, [r0] @ movhi 31904 .loc 97 74 0 31905 0014 AA00 lsls r2, r5, #2 31906 .LVL5140: 31907 0016 0021 movs r1, #0 31908 .LVL5141: 31909 0018 1846 mov r0, r3 31910 .LVL5142: 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* Assign filter taps */ 31911 .loc 97 66 0 31912 001a 9DF82070 ldrb r7, [sp, #32] @ zero_extendqisi2 31913 .loc 97 74 0 31914 001e FFF7FEFF bl memset 31915 .LVL5143: 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* Assign post Shift value applied to coefficients */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** S->postShift = postShift; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* Assign state pointer */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** S->pState = pState; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* Assign Step size value */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** S->mu = mu; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* Initialize reciprocal pointer table */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** S->recipTable = (q31_t *) armRecipTableQ31; 31916 .loc 97 86 0 31917 0022 0449 ldr r1, .L2565 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 31918 .loc 97 77 0 31919 0024 2774 strb r7, [r4, #16] 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* Initialise Energy to zero */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** S->energy = 0; ARM GAS /tmp/ccJrAs6S.s page 1478 31920 .loc 97 89 0 31921 0026 0022 movs r2, #0 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 31922 .loc 97 80 0 31923 0028 6060 str r0, [r4, #4] 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 31924 .loc 97 83 0 31925 002a E660 str r6, [r4, #12] 31926 .loc 97 89 0 31927 002c C4E90512 strd r1, r2, [r4, #20] 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** /* Initialise x0 to zero */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** S->x0 = 0; 31928 .loc 97 92 0 31929 0030 E261 str r2, [r4, #28] 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c **** } 31930 .loc 97 93 0 31931 0032 F8BD pop {r3, r4, r5, r6, r7, pc} 31932 .LVL5144: 31933 .L2566: 31934 .align 2 31935 .L2565: 31936 0034 00000000 .word armRecipTableQ31 31937 .cfi_endproc 31938 .LFE242: 31940 .section .text.arm_lms_norm_q15,"ax",%progbits 31941 .align 1 31942 .p2align 2,,3 31943 .global arm_lms_norm_q15 31944 .syntax unified 31945 .thumb 31946 .thumb_func 31947 .fpu fpv4-sp-d16 31949 arm_lms_norm_q15: 31950 .LFB243: 31951 .file 98 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * Title: arm_lms_norm_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * Description: Processing function for Q15 normalized LMS filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * ARM GAS /tmp/ccJrAs6S.s page 1479 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @addtogroup LMS_NORM 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @brief Processing function for Q15 normalized LMS filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @param[in] S points to an instance of the Q15 normalized LMS filter structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @param[in] pRef points to the block of reference data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @param[out] pOut points to the block of output data 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @param[out] pErr points to the block of error data 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @param[in] blockSize number of samples to process 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @return none 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @par Scaling and Overflow Behavior 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** The function is implemented using a 64-bit internal accumulator. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** Both coefficients and state variables are represented in 1.15 format and 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** multiplications yield a 2.30 result. The 2.30 intermediate results are 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** accumulated in a 64-bit accumulator in 34.30 format. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** There is no risk of internal overflow with this approach and the full 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** precision of intermediate multiplications is preserved. After all additions 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** have been performed, the accumulator is truncated to 34.15 format by 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** discarding low 15 bits. Lastly, the accumulator is saturated to yield a 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** result in 1.15 format. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** @par 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** In this filter, filter coefficients are updated for each sample and the 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** updation of filter cofficients are saturted. 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** void arm_lms_norm_q15( 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** arm_lms_norm_instance_q15 * S, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** const q15_t * pSrc, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t * pRef, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t * pOut, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t * pErr, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** uint32_t blockSize) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 31952 .loc 98 72 0 31953 .cfi_startproc 31954 @ args = 8, pretend = 0, frame = 40 31955 @ frame_needed = 0, uses_anonymous_args = 0 31956 .LVL5145: 31957 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} ARM GAS /tmp/ccJrAs6S.s page 1480 31958 .LCFI262: 31959 .cfi_def_cfa_offset 36 31960 .cfi_offset 4, -36 31961 .cfi_offset 5, -32 31962 .cfi_offset 6, -28 31963 .cfi_offset 7, -24 31964 .cfi_offset 8, -20 31965 .cfi_offset 9, -16 31966 .cfi_offset 10, -12 31967 .cfi_offset 11, -8 31968 .cfi_offset 14, -4 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *pState = S->pState; /* State pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *px, *pb; /* Temporary pointers for state and coeffici 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t mu = S->mu; /* Adaptive factor */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q63_t acc; /* Accumulator */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q31_t energy; /* Energy of the input */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t e = 0, d = 0; /* Error, reference data sample */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t w = 0, in; /* Weight factor and state */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t x0; /* Temporary variable to hold input sample * 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t postShift; /* Post shift to be applied to weight after 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q31_t coef; /* Temporary variable for coefficient */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q31_t acc_l, acc_h; /* Temporary input */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */ 31969 .loc 98 89 0 31970 0004 857B ldrb r5, [r0, #14] @ zero_extendqisi2 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *pState = S->pState; /* State pointer */ 31971 .loc 98 73 0 31972 0006 4768 ldr r7, [r0, #4] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 31973 .loc 98 78 0 31974 0008 B0F800E0 ldrh lr, [r0] 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *pState = S->pState; /* State pointer */ 31975 .loc 98 72 0 31976 000c 8BB0 sub sp, sp, #44 31977 .LCFI263: 31978 .cfi_def_cfa_offset 80 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *pState = S->pState; /* State pointer */ 31979 .loc 98 72 0 31980 000e 9A46 mov r10, r3 31981 .loc 98 89 0 31982 0010 C5F10F03 rsb r3, r5, #15 31983 .LVL5146: 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *pState = S->pState; /* State pointer */ 31984 .loc 98 72 0 31985 0014 0646 mov r6, r0 31986 .loc 98 89 0 31987 0016 0693 str r3, [sp, #24] 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** int32_t uShift = (32 - lShift); 31988 .loc 98 90 0 31989 0018 05F11103 add r3, r5, #17 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *pState = S->pState; /* State pointer */ 31990 .loc 98 72 0 ARM GAS /tmp/ccJrAs6S.s page 1481 31991 001c 0990 str r0, [sp, #36] 31992 .loc 98 90 0 31993 001e 0793 str r3, [sp, #28] 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state 31994 .loc 98 74 0 31995 0020 8068 ldr r0, [r0, #8] 31996 .LVL5147: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** energy = S->energy; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** x0 = S->x0; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* pStateCurnt points to the location where the new input data should be written */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* initialise loop count */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** blkCnt = blockSize; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** while (blkCnt > 0U) 31997 .loc 98 102 0 31998 0022 159B ldr r3, [sp, #84] 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state 31999 .loc 98 74 0 32000 0024 0390 str r0, [sp, #12] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 32001 .loc 98 77 0 32002 0026 B6F90C00 ldrsh r0, [r6, #12] 32003 002a 0490 str r0, [sp, #16] 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 32004 .loc 98 73 0 32005 002c 0897 str r7, [sp, #32] 32006 .LVL5148: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** x0 = S->x0; 32007 .loc 98 92 0 32008 002e B6F914C0 ldrsh ip, [r6, #20] 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 32009 .loc 98 93 0 32010 0032 B6F91600 ldrsh r0, [r6, #22] 32011 .LVL5149: 32012 .loc 98 102 0 32013 0036 002B cmp r3, #0 32014 0038 00F0F280 beq .L2585 32015 003c 0EF10044 add r4, lr, #-2147483648 32016 .LVL5150: 32017 0040 013C subs r4, r4, #1 32018 .LVL5151: 32019 0042 6400 lsls r4, r4, #1 32020 .LVL5152: 32021 0044 3369 ldr r3, [r6, #16] 32022 .LVL5153: 32023 0046 0593 str r3, [sp, #20] 32024 0048 023C subs r4, r4, #2 32025 004a 3B19 adds r3, r7, r4 32026 004c 0293 str r3, [sp, #8] 32027 004e 0239 subs r1, r1, #2 32028 .LVL5154: 32029 0050 159B ldr r3, [sp, #84] ARM GAS /tmp/ccJrAs6S.s page 1482 32030 0052 0193 str r3, [sp, #4] 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 32031 .loc 98 73 0 32032 0054 B846 mov r8, r7 32033 0056 9146 mov r9, r2 32034 .LBB2415: 32035 .LBB2416: 1293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.15 with exp 1 */ 32036 .loc 3 1293 0 32037 0058 7746 mov r7, lr 32038 .LVL5155: 32039 005a 47F6FF7B movw fp, #32767 32040 005e 8E46 mov lr, r1 32041 .LVL5156: 32042 .L2576: 32043 .LBE2416: 32044 .LBE2415: 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Copy the new input sample into the state buffer */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** *pStateCurnt++ = *pSrc; 32045 .loc 98 105 0 32046 0060 029A ldr r2, [sp, #8] 32047 0062 3EF9023F ldrsh r3, [lr, #2]! 32048 .LVL5157: 32049 0066 22F8023F strh r3, [r2, #2]! @ movhi 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Initialize pState pointer */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** px = pState; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Initialize coefficient pointer */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** pb = pCoeffs; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Read the sample from input buffer */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** in = *pSrc++; 32050 .loc 98 114 0 32051 006a BEF90030 ldrsh r3, [lr] 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 32052 .loc 98 105 0 32053 006e 0292 str r2, [sp, #8] 32054 .LVL5158: 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Update the energy calculation */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** energy -= (((q31_t) x0 * (x0)) >> 15); 32055 .loc 98 117 0 32056 0070 00FB00F0 mul r0, r0, r0 32057 .LVL5159: 32058 0074 ACEBE030 sub r0, ip, r0, asr #15 32059 .LVL5160: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** energy += (((q31_t) in * (in)) >> 15); 32060 .loc 98 118 0 32061 0078 03FB03F3 mul r3, r3, r3 32062 .LVL5161: 32063 007c 00EBE33C add ip, r0, r3, asr #15 32064 .LVL5162: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Set the accumulator to zero */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** acc = 0; ARM GAS /tmp/ccJrAs6S.s page 1483 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Loop unrolling: Compute 4 taps at a time. */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt = numTaps >> 2U; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** while (tapCnt > 0U) 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Perform the multiply-accumulate */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* acc += b[N] * x[n-N] + b[N-1] * x[n-N-1] */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc); 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Decrement loop counter */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt--; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** } 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Loop unrolling: Compute remaining taps */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt = numTaps % 0x4U; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** #else 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Initialize tapCnt with number of samples */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt = numTaps; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** while (tapCnt > 0U) 32065 .loc 98 149 0 32066 0080 002F cmp r7, #0 32067 0082 00F0BC80 beq .L2586 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 32068 .loc 98 111 0 32069 0086 039C ldr r4, [sp, #12] 32070 .loc 98 149 0 32071 0088 3B46 mov r3, r7 32072 008a 4246 mov r2, r8 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 32073 .loc 98 121 0 32074 008c 0020 movs r0, #0 32075 008e 0021 movs r1, #0 32076 .LVL5163: 32077 .L2570: 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Perform the multiply-accumulate */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** acc += (q63_t) (((q31_t) (*px++) * (*pb++))); 32078 .loc 98 152 0 32079 0090 32F8026B ldrh r6, [r2], #2 32080 .LVL5164: 32081 0094 34F8025B ldrh r5, [r4], #2 32082 .LVL5165: 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 32083 .loc 98 149 0 32084 0098 013B subs r3, r3, #1 32085 .LVL5166: 32086 .loc 98 152 0 32087 009a C6FB8501 smlalbb r0, r1, r6, r5 ARM GAS /tmp/ccJrAs6S.s page 1484 32088 .LVL5167: 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 32089 .loc 98 149 0 32090 009e F7D1 bne .L2570 32091 00a0 079B ldr r3, [sp, #28] 32092 00a2 069A ldr r2, [sp, #24] 32093 .LVL5168: 32094 00a4 01FA03F3 lsl r3, r1, r3 32095 00a8 D040 lsrs r0, r0, r2 32096 .LVL5169: 32097 00aa 1843 orrs r0, r0, r3 32098 .LVL5170: 32099 .L2569: 32100 .LBB2429: 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Decrement the loop counter */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt--; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** } 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Calc lower part of acc */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** acc_l = acc & 0xffffffff; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Calc upper part of acc */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** acc_h = (acc >> 32) & 0xffffffff; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Apply shift for lower part of acc and upper part of acc */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** acc = (uint32_t) acc_l >> lShift | acc_h << uShift; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Converting the result to 1.15 format and saturate the output */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** acc = __SSAT(acc, 16U); 32101 .loc 98 168 0 32102 .syntax unified 32103 @ 168 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c" 1 32104 00ac 00F30F02 ssat r2, #16, r0 32105 @ 0 "" 2 32106 .LVL5171: 32107 .thumb 32108 .syntax unified 32109 .LBE2429: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Store the result from accumulator into the destination buffer. */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** *pOut++ = (q15_t) acc; 32110 .loc 98 171 0 32111 00b0 2AF8022B strh r2, [r10], #2 @ movhi 32112 .LVL5172: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Compute and store error */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** d = *pRef++; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** e = d - (q15_t) acc; 32113 .loc 98 175 0 32114 00b4 39F8020B ldrh r0, [r9], #2 32115 .LVL5173: 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** *pErr++ = e; 32116 .loc 98 176 0 32117 00b8 1499 ldr r1, [sp, #80] 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** *pErr++ = e; 32118 .loc 98 175 0 ARM GAS /tmp/ccJrAs6S.s page 1485 32119 00ba 821A subs r2, r0, r2 32120 .LVL5174: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Calculation of 1/energy */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** postShift = arm_recip_q15((q15_t) energy + DELTA_Q15, &oneByEnergy, S->recipTable); 32121 .loc 98 179 0 32122 00bc 0CF10503 add r3, ip, #5 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** *pErr++ = e; 32123 .loc 98 175 0 32124 00c0 12B2 sxth r2, r2 32125 .LVL5175: 32126 .loc 98 179 0 32127 00c2 1BB2 sxth r3, r3 32128 .LVL5176: 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 32129 .loc 98 176 0 32130 00c4 21F8022B strh r2, [r1], #2 @ movhi 32131 .LVL5177: 32132 .LBB2430: 32133 .LBB2423: 1269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 32134 .loc 3 1269 0 32135 00c8 002B cmp r3, #0 32136 .LBE2423: 32137 .LBE2430: 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 32138 .loc 98 176 0 32139 00ca 1491 str r1, [sp, #80] 32140 .LVL5178: 32141 .LBB2431: 32142 .LBB2424: 1269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 32143 .loc 3 1269 0 32144 00cc 40F38A80 ble .L2571 32145 .LVL5179: 32146 .LBB2417: 32147 .LBB2418: 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** } 32148 .loc 6 1093 0 32149 00d0 B3FA83F0 clz r0, r3 32150 .LVL5180: 32151 .LBE2418: 32152 .LBE2417: 1271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32153 .loc 3 1271 0 32154 00d4 A0F11104 sub r4, r0, #17 32155 .LVL5181: 32156 00d8 C0F11F00 rsb r0, r0, #31 32157 .LVL5182: 32158 .L2572: 1279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 32159 .loc 3 1279 0 32160 00dc A340 lsls r3, r3, r4 32161 .LBE2424: 32162 .LBE2431: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Calculation of e * mu value */ ARM GAS /tmp/ccJrAs6S.s page 1486 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** errorXmu = (q15_t) (((q31_t) e * mu) >> 15); 32163 .loc 98 182 0 32164 00de 049C ldr r4, [sp, #16] 32165 .LBB2432: 32166 .LBB2425: 1279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 32167 .loc 3 1279 0 32168 00e0 1BB2 sxth r3, r3 32169 .LVL5183: 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 32170 .loc 3 1286 0 32171 00e2 C3F30521 ubfx r1, r3, #8, #6 32172 .LVL5184: 32173 .LBE2425: 32174 .LBE2432: 32175 .loc 98 182 0 32176 00e6 02FB04F2 mul r2, r2, r4 32177 .LVL5185: 32178 .LBB2433: 32179 .LBB2426: 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 32180 .loc 3 1286 0 32181 00ea 059C ldr r4, [sp, #20] 32182 00ec 34F91110 ldrsh r1, [r4, r1, lsl #1] 32183 .LVL5186: 1292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = 0x7FFFu - tempVal; 32184 .loc 3 1292 0 32185 00f0 03FB01F4 mul r4, r3, r1 32186 .LVL5187: 1293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.15 with exp 1 */ 32187 .loc 3 1293 0 32188 00f4 ABEBE434 sub r4, fp, r4, asr #15 32189 .LVL5188: 1295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */ 32190 .loc 3 1295 0 32191 00f8 01FB04F1 mul r1, r1, r4 32192 .LVL5189: 32193 00fc 41F38F31 sbfx r1, r1, #14, #16 32194 .LVL5190: 1292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = 0x7FFFu - tempVal; 32195 .loc 3 1292 0 32196 0100 03FB01F3 mul r3, r3, r1 32197 .LVL5191: 1293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.15 with exp 1 */ 32198 .loc 3 1293 0 32199 0104 ABEBE333 sub r3, fp, r3, asr #15 32200 .LVL5192: 1295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */ 32201 .loc 3 1295 0 32202 0108 01FB03F1 mul r1, r1, r3 32203 .LVL5193: 32204 .LBE2426: 32205 .LBE2433: 32206 .loc 98 182 0 32207 010c D213 asrs r2, r2, #15 32208 .LBB2434: 32209 .LBB2427: ARM GAS /tmp/ccJrAs6S.s page 1487 1295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */ 32210 .loc 3 1295 0 32211 010e 890B lsrs r1, r1, #14 32212 .LVL5194: 32213 .LBE2427: 32214 .LBE2434: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Calculation of (e * mu) * (1/energy) value */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift)); 32215 .loc 98 185 0 32216 0110 12FB01F1 smulbb r1, r2, r1 32217 .LVL5195: 32218 0114 0141 asrs r1, r1, r0 32219 .LBB2435: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Weighting factor for the normalized version */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** w = (q15_t) __SSAT((q31_t) acc, 16); 32220 .loc 98 188 0 32221 .syntax unified 32222 @ 188 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c" 1 32223 0116 01F30F01 ssat r1, #16, r1 32224 @ 0 "" 2 32225 .LVL5196: 32226 .thumb 32227 .syntax unified 32228 .LBE2435: 32229 011a 09B2 sxth r1, r1 32230 .LVL5197: 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Initialize pState pointer */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** px = pState; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Initialize coefficient pointer */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** pb = pCoeffs; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Loop unrolling: Compute 4 taps at a time. */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt = numTaps >> 2U; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Update filter coefficients */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** while (tapCnt > 0U) 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** *pb++ = (q15_t) __SSAT(coef, 16); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** *pb++ = (q15_t) __SSAT(coef, 16); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** *pb++ = (q15_t) __SSAT(coef, 16); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** *pb++ = (q15_t) __SSAT(coef, 16); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Decrement loop counter */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt--; ARM GAS /tmp/ccJrAs6S.s page 1488 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** } 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Loop unrolling: Compute remaining taps */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt = numTaps % 0x4U; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** #else 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Initialize tapCnt with number of samples */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt = numTaps; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** while (tapCnt > 0U) 32231 .loc 98 230 0 32232 011c 87B1 cbz r7, .L2574 32233 011e 039B ldr r3, [sp, #12] 32234 0120 3846 mov r0, r7 32235 0122 9C1E subs r4, r3, #2 32236 0124 4546 mov r5, r8 32237 .LVL5198: 32238 .L2575: 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Perform the multiply-accumulate */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15); 32239 .loc 98 233 0 32240 0126 35F8022B ldrh r2, [r5], #2 32241 .LVL5199: 32242 012a 34F9023F ldrsh r3, [r4, #2]! 32243 .LVL5200: 32244 012e 12FB01F2 smulbb r2, r2, r1 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 32245 .loc 98 230 0 32246 0132 0138 subs r0, r0, #1 32247 .LVL5201: 32248 .loc 98 233 0 32249 0134 03EBE233 add r3, r3, r2, asr #15 32250 .LBB2436: 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** *pb++ = (q15_t) __SSAT(coef, 16); 32251 .loc 98 234 0 32252 .syntax unified 32253 @ 234 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c" 1 32254 0138 03F30F03 ssat r3, #16, r3 32255 @ 0 "" 2 32256 .LVL5202: 32257 .thumb 32258 .syntax unified 32259 .LBE2436: 32260 013c 2380 strh r3, [r4] @ movhi 32261 .LVL5203: 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 32262 .loc 98 230 0 32263 013e F2D1 bne .L2575 32264 .LVL5204: 32265 .L2574: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 32266 .loc 98 102 0 32267 0140 019B ldr r3, [sp, #4] ARM GAS /tmp/ccJrAs6S.s page 1489 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Decrement loop counter */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt--; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** } 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** x0 = *pState; 32268 .loc 98 240 0 32269 0142 38F9020B ldrsh r0, [r8], #2 32270 .LVL5205: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 32271 .loc 98 102 0 32272 0146 013B subs r3, r3, #1 32273 .LVL5206: 32274 0148 0193 str r3, [sp, #4] 32275 014a 89D1 bne .L2576 32276 014c 159A ldr r2, [sp, #84] 32277 014e 089B ldr r3, [sp, #32] 32278 .LVL5207: 32279 0150 03EB4203 add r3, r3, r2, lsl #1 32280 0154 099A ldr r2, [sp, #36] 32281 0156 BE46 mov lr, r7 32282 .LVL5208: 32283 .L2568: 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Advance state pointer by 1 for the next sample */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** pState = pState + 1; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Decrement loop counter */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** blkCnt--; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** } 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Save energy and x0 values for the next frame */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** S->energy = (q15_t) energy; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** S->x0 = x0; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Processing is complete. 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** Now copy the last numTaps - 1 samples to the start of the state buffer. 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** This prepares the state buffer for the next function call. */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Points to the start of the pState buffer */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** pStateCurnt = S->pState; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* copy data */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Loop unrolling: Compute 4 taps at a time. */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt = (numTaps - 1U) >> 2U; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** while (tapCnt > 0U) 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState)); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState)); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Decrement loop counter */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt--; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** } 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1490 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Loop unrolling: Compute remaining taps */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt = (numTaps - 1U) % 0x4U; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** #else 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Initialize tapCnt with number of samples */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt = (numTaps - 1U); 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** while (tapCnt > 0U) 32284 .loc 98 285 0 32285 0158 BEF10101 subs r1, lr, #1 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** S->x0 = x0; 32286 .loc 98 250 0 32287 015c A2F814C0 strh ip, [r2, #20] @ movhi 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 32288 .loc 98 251 0 32289 0160 D082 strh r0, [r2, #22] @ movhi 32290 .LVL5209: 32291 .loc 98 285 0 32292 0162 3CD0 beq .L2567 32293 0164 089C ldr r4, [sp, #32] 32294 0166 1A1D adds r2, r3, #4 32295 0168 201D adds r0, r4, #4 32296 .LVL5210: 32297 016a 8342 cmp r3, r0 32298 016c 38BF it cc 32299 016e 9442 cmpcc r4, r2 32300 0170 4BD3 bcc .L2578 32301 0172 0D29 cmp r1, #13 32302 0174 49D9 bls .L2578 32303 0176 C3F34002 ubfx r2, r3, #1, #1 32304 017a 002A cmp r2, #0 32305 017c AEF1020E sub lr, lr, #2 32306 .LVL5211: 32307 0180 0CBF ite eq 32308 0182 0120 moveq r0, #1 32309 0184 0220 movne r0, #2 32310 0186 7045 cmp r0, lr 32311 0188 20D8 bhi .L2579 32312 018a 002A cmp r2, #0 32313 018c 39D0 beq .L2588 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** *pStateCurnt++ = *pState++; 32314 .loc 98 287 0 32315 018e B3F90000 ldrsh r0, [r3] 32316 0192 2080 strh r0, [r4] @ movhi 32317 0194 9E1C adds r6, r3, #2 32318 .LVL5212: 32319 0196 A51C adds r5, r4, #2 32320 .LVL5213: 32321 .L2580: 32322 0198 8C1A subs r4, r1, r2 32323 019a 0899 ldr r1, [sp, #32] 32324 .LVL5214: 32325 019c 5200 lsls r2, r2, #1 ARM GAS /tmp/ccJrAs6S.s page 1491 32326 019e A01E subs r0, r4, #2 32327 01a0 1144 add r1, r1, r2 32328 01a2 4008 lsrs r0, r0, #1 32329 01a4 1344 add r3, r3, r2 32330 01a6 0130 adds r0, r0, #1 32331 01a8 0A46 mov r2, r1 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 32332 .loc 98 285 0 32333 01aa 0021 movs r1, #0 32334 .LVL5215: 32335 .L2581: 32336 01ac 0131 adds r1, r1, #1 32337 .loc 98 287 0 32338 01ae 53F8047B ldr r7, [r3], #4 32339 01b2 42F8047B str r7, [r2], #4 @ unaligned 32340 01b6 8842 cmp r0, r1 32341 01b8 F8D8 bhi .L2581 32342 01ba 4200 lsls r2, r0, #1 32343 01bc 8000 lsls r0, r0, #2 32344 01be 3318 adds r3, r6, r0 32345 01c0 A242 cmp r2, r4 32346 01c2 2844 add r0, r5, r0 32347 01c4 AEEB0201 sub r1, lr, r2 32348 01c8 0890 str r0, [sp, #32] 32349 01ca 08D0 beq .L2567 32350 .L2579: 32351 .LVL5216: 32352 01cc 0898 ldr r0, [sp, #32] 32353 01ce B3F90020 ldrsh r2, [r3] 32354 01d2 0280 strh r2, [r0] @ movhi 32355 .LVL5217: 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 32356 .loc 98 285 0 32357 01d4 0129 cmp r1, #1 32358 01d6 02D0 beq .L2567 32359 .LVL5218: 32360 .loc 98 287 0 32361 01d8 B3F90230 ldrsh r3, [r3, #2] 32362 .LVL5219: 32363 01dc 4380 strh r3, [r0, #2] @ movhi 32364 .LVL5220: 32365 .L2567: 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** /* Decrement loop counter */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** tapCnt--; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** } 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** } 32366 .loc 98 293 0 32367 01de 0BB0 add sp, sp, #44 32368 .LCFI264: 32369 .cfi_remember_state 32370 .cfi_def_cfa_offset 36 32371 @ sp needed 32372 01e0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 32373 .LVL5221: 32374 .L2571: ARM GAS /tmp/ccJrAs6S.s page 1492 32375 .LCFI265: 32376 .cfi_restore_state 32377 .LBB2437: 32378 .LBB2428: 32379 .LBB2419: 32380 .LBB2420: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 32381 .loc 6 1089 0 32382 01e4 07D0 beq .L2587 32383 .LBE2420: 32384 .LBE2419: 1275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32385 .loc 3 1275 0 32386 01e6 5842 negs r0, r3 32387 .LVL5222: 32388 .LBB2422: 32389 .LBB2421: 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** } 32390 .loc 6 1093 0 32391 01e8 B0FA80F0 clz r0, r0 32392 .LVL5223: 32393 01ec A0F11104 sub r4, r0, #17 32394 01f0 C0F11F00 rsb r0, r0, #31 32395 01f4 72E7 b .L2572 32396 .L2587: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 32397 .loc 6 1089 0 32398 01f6 4FF0FF30 mov r0, #-1 32399 01fa 0F24 movs r4, #15 32400 .LVL5224: 32401 01fc 6EE7 b .L2572 32402 .LVL5225: 32403 .L2586: 32404 .LBE2421: 32405 .LBE2422: 32406 .LBE2428: 32407 .LBE2437: 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 32408 .loc 98 149 0 32409 01fe 3846 mov r0, r7 32410 0200 54E7 b .L2569 32411 .LVL5226: 32412 .L2588: 32413 0202 2546 mov r5, r4 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 32414 .loc 98 285 0 32415 0204 8E46 mov lr, r1 32416 .LVL5227: 32417 0206 1E46 mov r6, r3 32418 0208 C6E7 b .L2580 32419 .LVL5228: 32420 .L2578: 32421 020a 089A ldr r2, [sp, #32] 32422 020c 023A subs r2, r2, #2 32423 .LVL5229: 32424 .L2583: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1493 32425 .loc 98 287 0 32426 020e 33F9020B ldrsh r0, [r3], #2 32427 .LVL5230: 32428 0212 22F8020F strh r0, [r2, #2]! @ movhi 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c **** { 32429 .loc 98 285 0 32430 0216 0139 subs r1, r1, #1 32431 .LVL5231: 32432 0218 F9D1 bne .L2583 32433 .loc 98 293 0 32434 021a 0BB0 add sp, sp, #44 32435 .LCFI266: 32436 .cfi_remember_state 32437 .cfi_def_cfa_offset 36 32438 @ sp needed 32439 021c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 32440 .LVL5232: 32441 .L2585: 32442 .LCFI267: 32443 .cfi_restore_state 32444 0220 3B46 mov r3, r7 32445 .LVL5233: 32446 0222 3246 mov r2, r6 32447 .LVL5234: 32448 0224 98E7 b .L2568 32449 .cfi_endproc 32450 .LFE243: 32452 0226 00BF .section .text.arm_lms_norm_q31,"ax",%progbits 32453 .align 1 32454 .p2align 2,,3 32455 .global arm_lms_norm_q31 32456 .syntax unified 32457 .thumb 32458 .thumb_func 32459 .fpu fpv4-sp-d16 32461 arm_lms_norm_q31: 32462 .LFB244: 32463 .file 99 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * Title: arm_lms_norm_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * Description: Processing function for the Q31 NLMS filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * ARM GAS /tmp/ccJrAs6S.s page 1494 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @addtogroup LMS_NORM 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @brief Processing function for Q31 normalized LMS filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @param[in] S points to an instance of the Q31 normalized LMS filter structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @param[in] pRef points to the block of reference data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @param[out] pOut points to the block of output data 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @param[out] pErr points to the block of error data 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @param[in] blockSize number of samples to process 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @return none 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @par Scaling and Overflow Behavior 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** The function is implemented using an internal 64-bit accumulator. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** The accumulator has a 2.62 format and maintains full precision of the intermedia 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** multiplication results but provides only a single guard bit. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** Thus, if the accumulator result overflows it wraps around rather than clip. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** In order to avoid overflows completely the input signal must be scaled down by 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** log2(numTaps) bits. The reference signal should not be scaled down. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** After all multiply-accumulates are performed, the 2.62 accumulator is shifted 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** and saturated to 1.31 format to yield the final result. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** The output signal and error signal are in 1.31 format. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** @par 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** In this filter, filter coefficients are updated for each sample and the 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** updation of filter cofficients are saturted. 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** void arm_lms_norm_q31( 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** arm_lms_norm_instance_q31 * S, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** const q31_t * pSrc, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t * pRef, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t * pOut, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t * pErr, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** uint32_t blockSize) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 32464 .loc 99 72 0 32465 .cfi_startproc 32466 @ args = 8, pretend = 0, frame = 64 32467 @ frame_needed = 0, uses_anonymous_args = 0 ARM GAS /tmp/ccJrAs6S.s page 1495 32468 .LVL5235: 32469 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 32470 .LCFI268: 32471 .cfi_def_cfa_offset 36 32472 .cfi_offset 4, -36 32473 .cfi_offset 5, -32 32474 .cfi_offset 6, -28 32475 .cfi_offset 7, -24 32476 .cfi_offset 8, -20 32477 .cfi_offset 9, -16 32478 .cfi_offset 10, -12 32479 .cfi_offset 11, -8 32480 .cfi_offset 14, -4 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *pState = S->pState; /* State pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *pStateCurnt; /* Points to the current sample of the state 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *px, *pb; /* Temporary pointers for state and coeffici 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t mu = S->mu; /* Adaptive factor */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q63_t acc; /* Accumulator */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q63_t energy; /* Energy of the input */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t e = 0; /* Error data sample */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t w = 0, in; /* Weight factor and state */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t x0; /* Temporary variable to hold input sample * 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t postShift; /* Post shift to be applied to weight after 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t coef; /* Temporary variable for coef */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t acc_l, acc_h; /* Temporary input */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** uint32_t uShift = ((uint32_t) S->postShift + 1U); 32481 .loc 99 89 0 32482 0004 067C ldrb r6, [r0, #16] @ zero_extendqisi2 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 32483 .loc 99 78 0 32484 0006 0788 ldrh r7, [r0] 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *pState = S->pState; /* State pointer */ 32485 .loc 99 72 0 32486 0008 91B0 sub sp, sp, #68 32487 .LCFI269: 32488 .cfi_def_cfa_offset 104 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *pState = S->pState; /* State pointer */ 32489 .loc 99 72 0 32490 000a 0446 mov r4, r0 32491 .loc 99 89 0 32492 000c 0136 adds r6, r6, #1 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** energy = S->energy; 32493 .loc 99 92 0 32494 000e 8069 ldr r0, [r0, #24] 32495 .LVL5236: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 32496 .loc 99 73 0 32497 0010 6568 ldr r5, [r4, #4] 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *pState = S->pState; /* State pointer */ 32498 .loc 99 72 0 32499 0012 0593 str r3, [sp, #20] ARM GAS /tmp/ccJrAs6S.s page 1496 32500 0014 9346 mov fp, r2 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ 32501 .loc 99 90 0 32502 0016 C6F12002 rsb r2, r6, #32 32503 .LVL5237: 32504 001a 0D92 str r2, [sp, #52] 32505 .loc 99 92 0 32506 001c C317 asrs r3, r0, #31 32507 .LVL5238: 32508 001e 0246 mov r2, r0 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 32509 .loc 99 73 0 32510 0020 0E95 str r5, [sp, #56] 32511 .loc 99 92 0 32512 0022 CDE90223 strd r2, [sp, #8] 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *pStateCurnt; /* Points to the current sample of the state 32513 .loc 99 74 0 32514 0026 A568 ldr r5, [r4, #8] 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** x0 = S->x0; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* pStateCurnt points to the location where the new input data should be written */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* initialise loop count */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** blkCnt = blockSize; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** while (blkCnt > 0U) 32515 .loc 99 102 0 32516 0028 1B9A ldr r2, [sp, #108] 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *pStateCurnt; /* Points to the current sample of the state 32517 .loc 99 74 0 32518 002a 0895 str r5, [sp, #32] 32519 .LVL5239: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 32520 .loc 99 77 0 32521 002c E568 ldr r5, [r4, #12] 32522 .LVL5240: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** x0 = S->x0; 32523 .loc 99 93 0 32524 002e 0F94 str r4, [sp, #60] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 32525 .loc 99 77 0 32526 0030 0A95 str r5, [sp, #40] 32527 .LVL5241: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** x0 = S->x0; 32528 .loc 99 93 0 32529 0032 E469 ldr r4, [r4, #28] 32530 .LVL5242: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ 32531 .loc 99 89 0 32532 0034 0C96 str r6, [sp, #48] 32533 .LVL5243: 32534 .loc 99 102 0 32535 0036 002A cmp r2, #0 32536 0038 00F00D81 beq .L2628 32537 003c 0F9B ldr r3, [sp, #60] ARM GAS /tmp/ccJrAs6S.s page 1497 32538 003e 07F18045 add r5, r7, #1073741824 32539 .LVL5244: 32540 0042 013D subs r5, r5, #1 32541 .LVL5245: 32542 0044 5A69 ldr r2, [r3, #20] 32543 .LVL5246: 32544 0046 0E9B ldr r3, [sp, #56] 32545 0048 0B92 str r2, [sp, #44] 32546 004a AD00 lsls r5, r5, #2 32547 .LVL5247: 32548 004c 043D subs r5, r5, #4 32549 004e 5A19 adds r2, r3, r5 32550 0050 0692 str r2, [sp, #24] 32551 0052 1B9A ldr r2, [sp, #108] 32552 0054 0792 str r2, [sp, #28] 32553 0056 A1F1040E sub lr, r1, #4 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 32554 .loc 99 73 0 32555 005a 9C46 mov ip, r3 32556 .LBB2438: 32557 .LBB2439: 1242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31 with exp 1 */ 32558 .loc 3 1242 0 32559 005c 6FF00046 mvn r6, #-2147483648 32560 .LVL5248: 32561 0060 2246 mov r2, r4 32562 .LVL5249: 32563 .L2625: 32564 .LBE2439: 32565 .LBE2438: 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Copy the new input sample into the state buffer */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pStateCurnt++ = *pSrc; 32566 .loc 99 105 0 32567 0062 0699 ldr r1, [sp, #24] 32568 0064 5EF8043F ldr r3, [lr, #4]! 32569 .LVL5250: 32570 0068 41F8043F str r3, [r1, #4]! 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Initialize pState pointer */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** px = pState; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Initialize coefficient pointer */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** pb = pCoeffs; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Read the sample from input buffer */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** in = *pSrc++; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Update the energy calculation */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** energy = (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32); 32571 .loc 99 117 0 32572 006c 4FF00008 mov r8, #0 32573 0070 82FB0223 smull r2, r3, r2, r2 32574 .LVL5251: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 32575 .loc 99 114 0 32576 0074 DEF80000 ldr r0, [lr] ARM GAS /tmp/ccJrAs6S.s page 1498 32577 .loc 99 117 0 32578 0078 DDF80890 ldr r9, [sp, #8] 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 32579 .loc 99 105 0 32580 007c 0691 str r1, [sp, #24] 32581 .LVL5252: 32582 .loc 99 117 0 32583 007e 9418 adds r4, r2, r2 32584 0080 4246 mov r2, r8 32585 0082 43EB0305 adc r5, r3, r3 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32); 32586 .loc 99 118 0 32587 0086 80FB0001 smull r0, r1, r0, r0 32588 .LVL5253: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32); 32589 .loc 99 117 0 32590 008a 121B subs r2, r2, r4 32591 008c 69EB0503 sbc r3, r9, r5 32592 .loc 99 118 0 32593 0090 0024 movs r4, #0 32594 0092 0018 adds r0, r0, r0 32595 0094 4941 adcs r1, r1, r1 32596 0096 2218 adds r2, r4, r0 32597 0098 4B41 adcs r3, r3, r1 32598 009a 0020 movs r0, #0 32599 009c 0021 movs r1, #0 32600 009e CDE90201 strd r0, [sp, #8] 32601 00a2 0293 str r3, [sp, #8] 32602 .LVL5254: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Set the accumulator to zero */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** acc = 0; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Loop unrolling: Compute 4 taps at a time. */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt = numTaps >> 2U; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** while (tapCnt > 0U) 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Perform the multiply-accumulate */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* acc += b[N] * x[n-N] */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** acc += ((q63_t) (*px++)) * (*pb++); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* acc += b[N-1] * x[n-N-1] */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** acc += ((q63_t) (*px++)) * (*pb++); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* acc += b[N-2] * x[n-N-2] */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** acc += ((q63_t) (*px++)) * (*pb++); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* acc += b[N-3] * x[n-N-3] */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** acc += ((q63_t) (*px++)) * (*pb++); 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Decrement loop counter */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt--; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** } 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1499 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Loop unrolling: Compute remaining taps */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt = numTaps % 0x4U; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** #else 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Initialize tapCnt with number of samples */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt = numTaps; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** while (tapCnt > 0U) 32603 .loc 99 157 0 32604 00a4 002F cmp r7, #0 32605 00a6 00F0D480 beq .L2629 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 32606 .loc 99 121 0 32607 00aa 4FF00009 mov r9, #0 32608 00ae 4FF0000A mov r10, #0 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 32609 .loc 99 111 0 32610 00b2 089C ldr r4, [sp, #32] 32611 .loc 99 157 0 32612 00b4 3946 mov r1, r7 32613 00b6 6046 mov r0, ip 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 32614 .loc 99 121 0 32615 00b8 B846 mov r8, r7 32616 00ba 4A46 mov r2, r9 32617 00bc 5346 mov r3, r10 32618 .LVL5255: 32619 .L2613: 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Perform the multiply-accumulate */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** acc += ((q63_t) (*px++)) * (*pb++); 32620 .loc 99 160 0 32621 00be 50F8047B ldr r7, [r0], #4 32622 .LVL5256: 32623 00c2 54F8045B ldr r5, [r4], #4 32624 .LVL5257: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 32625 .loc 99 157 0 32626 00c6 0139 subs r1, r1, #1 32627 .LVL5258: 32628 .loc 99 160 0 32629 00c8 C5FB0723 smlal r2, r3, r5, r7 32630 .LVL5259: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 32631 .loc 99 157 0 32632 00cc F7D1 bne .L2613 32633 00ce 9146 mov r9, r2 32634 00d0 9A46 mov r10, r3 32635 00d2 0D9A ldr r2, [sp, #52] 32636 .LVL5260: 32637 00d4 0C9B ldr r3, [sp, #48] 32638 00d6 29FA02F2 lsr r2, r9, r2 32639 00da 0AFA03F3 lsl r3, r10, r3 32640 00de 4746 mov r7, r8 ARM GAS /tmp/ccJrAs6S.s page 1500 32641 00e0 1A43 orrs r2, r2, r3 32642 .LVL5261: 32643 .L2612: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Decrement the loop counter */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt--; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** } 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Converting the result to 1.31 format */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Calc lower part of acc */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** acc_l = acc & 0xffffffff; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Calc upper part of acc */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** acc_h = (acc >> 32) & 0xffffffff; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** acc = (uint32_t) acc_l >> lShift | acc_h << uShift; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Store the result from accumulator into the destination buffer. */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pOut++ = (q31_t) acc; 32644 .loc 99 176 0 32645 00e2 059B ldr r3, [sp, #20] 32646 00e4 43F8042B str r2, [r3], #4 32647 .LVL5262: 32648 00e8 0593 str r3, [sp, #20] 32649 .LVL5263: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Compute and store error */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** e = *pRef++ - (q31_t) acc; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pErr++ = e; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Calculates the reciprocal of energy */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** postShift = arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]); 32650 .loc 99 183 0 32651 00ea 029B ldr r3, [sp, #8] 32652 .LVL5264: 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pErr++ = e; 32653 .loc 99 179 0 32654 00ec 5BF8045B ldr r5, [fp], #4 32655 .LVL5265: 32656 .loc 99 183 0 32657 00f0 03F58070 add r0, r3, #256 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 32658 .loc 99 180 0 32659 00f4 1A9B ldr r3, [sp, #104] 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pErr++ = e; 32660 .loc 99 179 0 32661 00f6 AD1A subs r5, r5, r2 32662 .LVL5266: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 32663 .loc 99 180 0 32664 00f8 43F8045B str r5, [r3], #4 32665 .LVL5267: 32666 .LBB2456: 32667 .LBB2452: 1218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 32668 .loc 3 1218 0 32669 00fc 0028 cmp r0, #0 ARM GAS /tmp/ccJrAs6S.s page 1501 32670 .LBE2452: 32671 .LBE2456: 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 32672 .loc 99 180 0 32673 00fe 1A93 str r3, [sp, #104] 32674 .LVL5268: 32675 .LBB2457: 32676 .LBB2453: 1218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 32677 .loc 3 1218 0 32678 0100 40F39980 ble .L2614 32679 .LVL5269: 32680 .LBB2440: 32681 .LBB2441: 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** } 32682 .loc 6 1093 0 32683 0104 B0FA80F4 clz r4, r0 32684 .LVL5270: 32685 .LBE2441: 32686 .LBE2440: 1220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32687 .loc 3 1220 0 32688 0108 04F1FF3A add r10, r4, #-1 32689 .LVL5271: 32690 010c C4F11F04 rsb r4, r4, #31 32691 .LVL5272: 32692 .L2615: 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 32693 .loc 3 1228 0 32694 0110 00FA0AFA lsl r10, r0, r10 32695 .LVL5273: 1232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 32696 .loc 3 1232 0 32697 0114 CAF30563 ubfx r3, r10, #24, #6 32698 .LVL5274: 1235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 32699 .loc 3 1235 0 32700 0118 0B9A ldr r2, [sp, #44] 32701 011a 52F82320 ldr r2, [r2, r3, lsl #2] 32702 .LVL5275: 1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = 0x7FFFFFFFu - tempVal; 32703 .loc 3 1241 0 32704 011e 8AFB0201 smull r0, r1, r10, r2 32705 0122 4FEAD078 lsr r8, r0, #31 32706 0126 48EA4108 orr r8, r8, r1, lsl #1 32707 .LVL5276: 1242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31 with exp 1 */ 32708 .loc 3 1242 0 32709 012a A6EB0808 sub r8, r6, r8 32710 .LVL5277: 1245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32711 .loc 3 1245 0 32712 012e A8FB0201 umull r0, r1, r8, r2 32713 .LVL5278: 1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = 0x7FFFFFFFu - tempVal; 32714 .loc 3 1241 0 32715 0132 D317 asrs r3, r2, #31 ARM GAS /tmp/ccJrAs6S.s page 1502 1245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32716 .loc 3 1245 0 32717 0134 08FB0311 mla r1, r8, r3, r1 32718 .LVL5279: 32719 0138 820F lsrs r2, r0, #30 32720 .LVL5280: 32721 013a 42EA8102 orr r2, r2, r1, lsl #2 32722 .LBB2442: 32723 .LBB2443: 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x; 32724 .loc 3 1160 0 32725 013e D317 asrs r3, r2, #31 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32726 .loc 3 1161 0 32727 0140 B3EBA17F cmp r3, r1, asr #30 32728 0144 18BF it ne 32729 0146 86EAE172 eorne r2, r6, r1, asr #31 32730 .LVL5281: 32731 .LBE2443: 32732 .LBE2442: 1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = 0x7FFFFFFFu - tempVal; 32733 .loc 3 1241 0 32734 014a 8AFB0201 smull r0, r1, r10, r2 32735 014e 4FEAD078 lsr r8, r0, #31 32736 0152 48EA4108 orr r8, r8, r1, lsl #1 32737 .LVL5282: 1242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31 with exp 1 */ 32738 .loc 3 1242 0 32739 0156 A6EB0808 sub r8, r6, r8 32740 .LVL5283: 1245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32741 .loc 3 1245 0 32742 015a A8FB0201 umull r0, r1, r8, r2 32743 .LVL5284: 1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = 0x7FFFFFFFu - tempVal; 32744 .loc 3 1241 0 32745 015e D317 asrs r3, r2, #31 1245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32746 .loc 3 1245 0 32747 0160 08FB0311 mla r1, r8, r3, r1 32748 .LVL5285: 32749 0164 820F lsrs r2, r0, #30 32750 .LVL5286: 32751 0166 42EA8102 orr r2, r2, r1, lsl #2 32752 .LBB2446: 32753 .LBB2444: 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x; 32754 .loc 3 1160 0 32755 016a D317 asrs r3, r2, #31 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32756 .loc 3 1161 0 32757 016c B3EBA17F cmp r3, r1, asr #30 32758 .LBE2444: 32759 .LBE2446: 32760 .LBE2453: 32761 .LBE2457: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1503 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Calculation of product of (e * mu) */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** errorXmu = (q31_t) (((q63_t) e * mu) >> 31); 32762 .loc 99 186 0 32763 0170 0A9B ldr r3, [sp, #40] 32764 .LBB2458: 32765 .LBB2454: 32766 .LBB2447: 32767 .LBB2445: 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32768 .loc 3 1161 0 32769 0172 18BF it ne 32770 0174 86EAE172 eorne r2, r6, r1, asr #31 32771 .LVL5287: 32772 .LBE2445: 32773 .LBE2447: 32774 .LBE2454: 32775 .LBE2458: 32776 .loc 99 186 0 32777 0178 85FB0301 smull r0, r1, r5, r3 32778 017c C30F lsrs r3, r0, #31 32779 .LVL5288: 32780 017e 43EA4103 orr r3, r3, r1, lsl #1 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Weighting factor for the normalized version */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift)); 32781 .loc 99 189 0 32782 0182 82FB0323 smull r2, r3, r2, r3 32783 .LVL5289: 32784 0186 C4F12001 rsb r1, r4, #32 32785 018a B4F12000 subs r0, r4, #32 32786 018e 22FA04F8 lsr r8, r2, r4 32787 0192 03FA01F1 lsl r1, r3, r1 32788 0196 48EA0108 orr r8, r8, r1 32789 019a 5CBF itt pl 32790 019c 43FA00F0 asrpl r0, r3, r0 32791 01a0 48EA0008 orrpl r8, r8, r0 32792 01a4 43FA04F4 asr r4, r3, r4 32793 .LVL5290: 32794 .LBB2459: 32795 .LBB2460: 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32796 .loc 3 1161 0 32797 01a8 B4EBE87F cmp r4, r8, asr #31 32798 01ac 18BF it ne 32799 01ae 86EAE478 eorne r8, r6, r4, asr #31 32800 .LBE2460: 32801 .LBE2459: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Initialize pState pointer */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** px = pState; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Initialize coefficient pointer */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** pb = pCoeffs; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Loop unrolling: Compute 4 taps at a time. */ ARM GAS /tmp/ccJrAs6S.s page 1504 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt = numTaps >> 2U; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Update filter coefficients */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** while (tapCnt > 0U) 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Perform the multiply-accumulate */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* coef is in 2.30 format */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* get coef in 1.31 format by left shifting */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* update coefficient buffer to next coefficient */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** pb++; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** pb++; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** pb++; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** pb++; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Decrement loop counter */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt--; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** } 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Loop unrolling: Compute remaining taps */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt = numTaps % 0x4U; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** #else 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Initialize tapCnt with number of samples */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt = numTaps; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** while (tapCnt > 0U) 32802 .loc 99 240 0 32803 01b2 F7B1 cbz r7, .L2621 32804 01b4 089B ldr r3, [sp, #32] 32805 01b6 CDF824B0 str fp, [sp, #36] 32806 01ba 1D1F subs r5, r3, #4 32807 .LVL5291: 32808 01bc 3C46 mov r4, r7 32809 01be E146 mov r9, ip 32810 .LVL5292: 32811 .L2622: 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Perform the multiply-accumulate */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); 32812 .loc 99 243 0 32813 01c0 59F8040B ldr r0, [r9], #4 32814 .LVL5293: ARM GAS /tmp/ccJrAs6S.s page 1505 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 32815 .loc 99 244 0 32816 01c4 55F8042F ldr r2, [r5, #4]! 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 32817 .loc 99 243 0 32818 01c8 88FB0001 smull r0, r1, r8, r0 32819 .loc 99 244 0 32820 01cc 4900 lsls r1, r1, #1 32821 01ce 12EB010A adds r10, r2, r1 32822 01d2 4FEAE273 asr r3, r2, #31 32823 01d6 43EBE17B adc fp, r3, r1, asr #31 32824 .LBB2461: 32825 .LBB2462: 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32826 .loc 3 1161 0 32827 01da BBEBEA7F cmp fp, r10, asr #31 32828 .LBE2462: 32829 .LBE2461: 32830 .loc 99 244 0 32831 01de CDE900AB strd r10, [sp] 32832 .LVL5294: 32833 .LBB2464: 32834 .LBB2463: 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32835 .loc 3 1161 0 32836 01e2 86EAEB71 eor r1, r6, fp, asr #31 32837 01e6 21D0 beq .L2623 32838 .LBE2463: 32839 .LBE2464: 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 32840 .loc 99 240 0 32841 01e8 013C subs r4, r4, #1 32842 .LVL5295: 32843 .loc 99 244 0 32844 01ea 2960 str r1, [r5] 32845 .LVL5296: 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 32846 .loc 99 240 0 32847 01ec E8D1 bne .L2622 32848 .LVL5297: 32849 .L2641: 32850 01ee DDF824B0 ldr fp, [sp, #36] 32851 .LVL5298: 32852 .L2621: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 32853 .loc 99 102 0 32854 01f2 079B ldr r3, [sp, #28] 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** pb++; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Decrement loop counter */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt--; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** } 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Read the sample from state buffer */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** x0 = *pState; 32855 .loc 99 252 0 32856 01f4 5CF8042B ldr r2, [ip], #4 ARM GAS /tmp/ccJrAs6S.s page 1506 32857 .LVL5299: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 32858 .loc 99 102 0 32859 01f8 013B subs r3, r3, #1 32860 .LVL5300: 32861 01fa 0793 str r3, [sp, #28] 32862 01fc 7FF431AF bne .L2625 32863 0200 1446 mov r4, r2 32864 0202 0E9B ldr r3, [sp, #56] 32865 .LVL5301: 32866 0204 1B9A ldr r2, [sp, #108] 32867 .LVL5302: 32868 0206 03EB8202 add r2, r3, r2, lsl #2 32869 .LVL5303: 32870 .L2611: 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Advance state pointer by 1 for the next sample */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** pState = pState + 1; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Decrement loop counter */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** blkCnt--; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** } 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Save energy and x0 values for the next frame */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** S->energy = (q31_t) energy; 32871 .loc 99 262 0 32872 020a 0F9B ldr r3, [sp, #60] 32873 020c 0298 ldr r0, [sp, #8] 32874 020e 9861 str r0, [r3, #24] 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** S->x0 = x0; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Processing is complete. 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** Now copy the last numTaps - 1 samples to the start of the state buffer. 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** This prepares the state buffer for the next function call. */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Points to the start of the pState buffer */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** pStateCurnt = S->pState; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* copy data */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Loop unrolling: Compute 4 taps at a time. */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt = (numTaps - 1U) >> 2U; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** while (tapCnt > 0U) 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pStateCurnt++ = *pState++; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pStateCurnt++ = *pState++; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pStateCurnt++ = *pState++; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pStateCurnt++ = *pState++; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Decrement loop counter */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt--; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** } 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Loop unrolling: Compute remaining taps */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt = (numTaps - 1U) % 0x4U; ARM GAS /tmp/ccJrAs6S.s page 1507 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** #else 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Initialize tapCnt with number of samples */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt = (numTaps - 1U); 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** while (tapCnt > 0U) 32875 .loc 99 299 0 32876 0210 013F subs r7, r7, #1 32877 .LVL5304: 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** S->x0 = x0; 32878 .loc 99 263 0 32879 0212 DC61 str r4, [r3, #28] 32880 .LVL5305: 32881 .loc 99 299 0 32882 0214 07D0 beq .L2610 32883 0216 0E9B ldr r3, [sp, #56] 32884 0218 043B subs r3, r3, #4 32885 .LVL5306: 32886 .L2627: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** *pStateCurnt++ = *pState++; 32887 .loc 99 301 0 32888 021a 52F8041B ldr r1, [r2], #4 32889 .LVL5307: 32890 021e 43F8041F str r1, [r3, #4]! 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 32891 .loc 99 299 0 32892 0222 013F subs r7, r7, #1 32893 .LVL5308: 32894 0224 F9D1 bne .L2627 32895 .LVL5309: 32896 .L2610: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** /* Decrement loop counter */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** tapCnt--; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** } 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** } 32897 .loc 99 307 0 32898 0226 11B0 add sp, sp, #68 32899 .LCFI270: 32900 .cfi_remember_state 32901 .cfi_def_cfa_offset 36 32902 @ sp needed 32903 0228 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 32904 .LVL5310: 32905 .L2623: 32906 .LCFI271: 32907 .cfi_restore_state 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** pb++; 32908 .loc 99 244 0 32909 022c 009B ldr r3, [sp] 32910 022e 2B60 str r3, [r5] 32911 .LVL5311: ARM GAS /tmp/ccJrAs6S.s page 1508 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 32912 .loc 99 240 0 32913 0230 013C subs r4, r4, #1 32914 .LVL5312: 32915 0232 C5D1 bne .L2622 32916 0234 DBE7 b .L2641 32917 .LVL5313: 32918 .L2614: 32919 .LBB2465: 32920 .LBB2455: 32921 .LBB2448: 32922 .LBB2449: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 32923 .loc 6 1089 0 32924 0236 07D0 beq .L2630 32925 .LBE2449: 32926 .LBE2448: 1224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 32927 .loc 3 1224 0 32928 0238 4442 negs r4, r0 32929 .LVL5314: 32930 .LBB2451: 32931 .LBB2450: 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** } 32932 .loc 6 1093 0 32933 023a B4FA84F4 clz r4, r4 32934 .LVL5315: 32935 023e 04F1FF3A add r10, r4, #-1 32936 0242 C4F11F04 rsb r4, r4, #31 32937 0246 63E7 b .L2615 32938 .L2630: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 32939 .loc 6 1089 0 32940 0248 4FF0FF34 mov r4, #-1 32941 024c 4FF01F0A mov r10, #31 32942 .LVL5316: 32943 0250 5EE7 b .L2615 32944 .LVL5317: 32945 .L2629: 32946 .LBE2450: 32947 .LBE2451: 32948 .LBE2455: 32949 .LBE2465: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** { 32950 .loc 99 157 0 32951 0252 3A46 mov r2, r7 32952 0254 45E7 b .L2612 32953 .LVL5318: 32954 .L2628: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c **** q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 32955 .loc 99 73 0 32956 0256 0E9A ldr r2, [sp, #56] 32957 .LVL5319: 32958 0258 D7E7 b .L2611 32959 .cfi_endproc 32960 .LFE244: 32962 025a 00BF .section .text.arm_lms_q15,"ax",%progbits ARM GAS /tmp/ccJrAs6S.s page 1509 32963 .align 1 32964 .p2align 2,,3 32965 .global arm_lms_q15 32966 .syntax unified 32967 .thumb 32968 .thumb_func 32969 .fpu fpv4-sp-d16 32971 arm_lms_q15: 32972 .LFB245: 32973 .file 100 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * Title: arm_lms_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * Description: Processing function for Q15 LMS filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @addtogroup LMS 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @brief Processing function for Q15 LMS filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @param[in] S points to an instance of the Q15 LMS filter structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @param[in] pSrc points to the block of input data 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @param[in] pRef points to the block of reference data 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @param[out] pOut points to the block of output data 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @param[out] pErr points to the block of error data 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @param[in] blockSize number of samples to process ARM GAS /tmp/ccJrAs6S.s page 1510 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @return none 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @par Scaling and Overflow Behavior 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** The function is implemented using an internal 64-bit accumulator. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** Both coefficients and state variables are represented in 1.15 format and multipl 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 f 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** There is no risk of internal overflow with this approach and the full precision 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** After all additions have been performed, the accumulator is truncated to 34.15 f 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** Lastly, the accumulator is saturated to yield a result in 1.15 format. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** In this filter, filter coefficients are updated for each sample and 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** the updation of filter cofficients are saturted. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** void arm_lms_q15( 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** const arm_lms_instance_q15 * S, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** const q15_t * pSrc, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t * pRef, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t * pOut, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t * pErr, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** uint32_t blockSize) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 32974 .loc 100 69 0 32975 .cfi_startproc 32976 @ args = 8, pretend = 0, frame = 24 32977 @ frame_needed = 0, uses_anonymous_args = 0 32978 .LVL5320: 32979 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 32980 .LCFI272: 32981 .cfi_def_cfa_offset 36 32982 .cfi_offset 4, -36 32983 .cfi_offset 5, -32 32984 .cfi_offset 6, -28 32985 .cfi_offset 7, -24 32986 .cfi_offset 8, -20 32987 .cfi_offset 9, -16 32988 .cfi_offset 10, -12 32989 .cfi_offset 11, -8 32990 .cfi_offset 14, -4 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t *pState = S->pState; /* State pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t *px, *pb; /* Temporary pointers for state and coeffici 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t mu = S->mu; /* Adaptive factor */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q63_t acc; /* Accumulator */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t e = 0; /* Error of data sample */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t alpha; /* Intermediate constant for taps update */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q31_t coef; /* Temporary variable for coefficient */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q31_t acc_l, acc_h; /* Temporary input */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */ 32991 .loc 100 82 0 32992 0004 0469 ldr r4, [r0, #16] 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t *pState = S->pState; /* State pointer */ 32993 .loc 100 70 0 32994 0006 4568 ldr r5, [r0, #4] ARM GAS /tmp/ccJrAs6S.s page 1511 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state 32995 .loc 100 71 0 32996 0008 8668 ldr r6, [r0, #8] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 32997 .loc 100 75 0 32998 000a B0F80080 ldrh r8, [r0] 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 32999 .loc 100 74 0 33000 000e B0F90C00 ldrsh r0, [r0, #12] 33001 .LVL5321: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t *pState = S->pState; /* State pointer */ 33002 .loc 100 69 0 33003 0012 87B0 sub sp, sp, #28 33004 .LCFI273: 33005 .cfi_def_cfa_offset 64 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t *pState = S->pState; /* State pointer */ 33006 .loc 100 69 0 33007 0014 8B46 mov fp, r1 33008 .loc 100 82 0 33009 0016 C4F10F01 rsb r1, r4, #15 33010 .LVL5322: 33011 001a 0391 str r1, [sp, #12] 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** int32_t uShift = (32 - lShift); 33012 .loc 100 83 0 33013 001c 04F11101 add r1, r4, #17 33014 0020 0491 str r1, [sp, #16] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* pStateCurnt points to the location where the new input data should be written */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* initialise loop count */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** blkCnt = blockSize; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** while (blkCnt > 0U) 33015 .loc 100 92 0 33016 0022 1199 ldr r1, [sp, #68] 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 33017 .loc 100 70 0 33018 0024 0595 str r5, [sp, #20] 33019 .LVL5323: 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** q15_t *pStateCurnt; /* Points to the current sample of the state 33020 .loc 100 71 0 33021 0026 0196 str r6, [sp, #4] 33022 .LVL5324: 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 33023 .loc 100 74 0 33024 0028 0290 str r0, [sp, #8] 33025 .LVL5325: 33026 .loc 100 92 0 33027 002a 0029 cmp r1, #0 33028 002c 00F0A380 beq .L2657 33029 0030 08F10040 add r0, r8, #-2147483648 33030 .LVL5326: 33031 0034 0138 subs r0, r0, #1 33032 .LVL5327: 33033 0036 4000 lsls r0, r0, #1 ARM GAS /tmp/ccJrAs6S.s page 1512 33034 .LVL5328: 33035 0038 0238 subs r0, r0, #2 33036 003a 8A46 mov r10, r1 33037 003c 1946 mov r1, r3 33038 .LVL5329: 33039 003e 2C46 mov r4, r5 33040 0040 4346 mov r3, r8 33041 .LVL5330: 33042 0042 05EB0009 add r9, r5, r0 33043 0046 8846 mov r8, r1 33044 .LVL5331: 33045 .L2648: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Copy the new input sample into the state buffer */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** *pStateCurnt++ = *pSrc++; 33046 .loc 100 95 0 33047 0048 3BF9021B ldrsh r1, [fp], #2 33048 .LVL5332: 33049 004c 29F8021F strh r1, [r9, #2]! @ movhi 33050 .LVL5333: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Initialize pState pointer */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** px = pState; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Initialize coefficient pointer */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** pb = pCoeffs; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Set the accumulator to zero */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** acc = 0; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Loop unrolling: Compute 4 taps at a time. */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt = numTaps >> 2U; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** while (tapCnt > 0U) 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Perform the multiply-accumulate */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* acc += b[N] * x[n-N] + b[N-1] * x[n-N-1] */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc); 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Decrement loop counter */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt--; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** } 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Loop unrolling: Compute remaining taps */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt = numTaps % 0x4U; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** #else 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Initialize tapCnt with number of samples */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt = numTaps; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** while (tapCnt > 0U) ARM GAS /tmp/ccJrAs6S.s page 1513 33051 .loc 100 132 0 33052 0050 1946 mov r1, r3 33053 0052 8BB1 cbz r3, .L2644 33054 .LVL5334: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 33055 .loc 100 101 0 33056 0054 019D ldr r5, [sp, #4] 33057 .loc 100 132 0 33058 0056 2046 mov r0, r4 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 33059 .loc 100 104 0 33060 0058 0026 movs r6, #0 33061 005a 0027 movs r7, #0 33062 .LVL5335: 33063 .L2645: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Perform the multiply-accumulate */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** acc += (q63_t) (((q31_t) (*px++) * (*pb++))); 33064 .loc 100 135 0 33065 005c 30F802EB ldrh lr, [r0], #2 33066 .LVL5336: 33067 0060 35F802CB ldrh ip, [r5], #2 33068 .LVL5337: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 33069 .loc 100 132 0 33070 0064 0139 subs r1, r1, #1 33071 .LVL5338: 33072 .loc 100 135 0 33073 0066 CEFB8C67 smlalbb r6, r7, lr, ip 33074 .LVL5339: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 33075 .loc 100 132 0 33076 006a F7D1 bne .L2645 33077 006c 0499 ldr r1, [sp, #16] 33078 006e 0398 ldr r0, [sp, #12] 33079 .LVL5340: 33080 0070 07FA01F1 lsl r1, r7, r1 33081 0074 C640 lsrs r6, r6, r0 33082 .LVL5341: 33083 0076 3143 orrs r1, r1, r6 33084 .LVL5342: 33085 .L2644: 33086 .LBB2466: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Decrement the loop counter */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt--; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** } 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Calc lower part of acc */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** acc_l = acc & 0xffffffff; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Calc upper part of acc */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** acc_h = (acc >> 32) & 0xffffffff; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Apply shift for lower part of acc and upper part of acc */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** acc = (uint32_t) acc_l >> lShift | acc_h << uShift; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1514 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Converting the result to 1.15 format and saturate the output */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** acc = __SSAT(acc, 16U); 33087 .loc 100 151 0 33088 .syntax unified 33089 @ 151 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c" 1 33090 0078 01F30F01 ssat r1, #16, r1 33091 @ 0 "" 2 33092 .LVL5343: 33093 .thumb 33094 .syntax unified 33095 .LBE2466: 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Store the result from accumulator into the destination buffer. */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** *pOut++ = (q15_t) acc; 33096 .loc 100 154 0 33097 007c 28F8021B strh r1, [r8], #2 @ movhi 33098 .LVL5344: 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Compute and store error */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** e = *pRef++ - (q15_t) acc; 33099 .loc 100 157 0 33100 0080 32F8026B ldrh r6, [r2], #2 33101 .LVL5345: 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** *pErr++ = (q15_t) e; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Compute alpha i.e. intermediate constant for taps update */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** alpha = (q15_t) (((q31_t) e * (mu)) >> 15); 33102 .loc 100 161 0 33103 0084 0298 ldr r0, [sp, #8] 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** *pErr++ = (q15_t) e; 33104 .loc 100 157 0 33105 0086 711A subs r1, r6, r1 33106 .LVL5346: 33107 0088 09B2 sxth r1, r1 33108 .LVL5347: 33109 .loc 100 161 0 33110 008a 01FB00FC mul ip, r1, r0 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** *pErr++ = (q15_t) e; 33111 .loc 100 158 0 33112 008e 1098 ldr r0, [sp, #64] 33113 0090 20F8021B strh r1, [r0], #2 @ movhi 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Initialize pState pointer */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Advance state pointer by 1 for the next sample */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** px = pState++; 33114 .loc 100 165 0 33115 0094 A71C adds r7, r4, #2 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 33116 .loc 100 158 0 33117 0096 1090 str r0, [sp, #64] 33118 .LVL5348: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 33119 .loc 100 161 0 33120 0098 4CF3CF3C sbfx ip, ip, #15, #16 33121 .LVL5349: 33122 .loc 100 165 0 33123 009c 3C46 mov r4, r7 ARM GAS /tmp/ccJrAs6S.s page 1515 33124 .LVL5350: 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Initialize coefficient pointer */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** pb = pCoeffs; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Loop unrolling: Compute 4 taps at a time. */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt = numTaps >> 2U; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Update filter coefficients */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** while (tapCnt > 0U) 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** *pb++ = (q15_t) __SSAT((coef), 16); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** *pb++ = (q15_t) __SSAT((coef), 16); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15); 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** *pb++ = (q15_t) __SSAT((coef), 16); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** *pb++ = (q15_t) __SSAT((coef), 16); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Decrement loop counter */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt--; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** } 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Loop unrolling: Compute remaining taps */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt = numTaps % 0x4U; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** #else 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Initialize tapCnt with number of samples */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt = numTaps; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** while (tapCnt > 0U) 33125 .loc 100 204 0 33126 009e 8BB1 cbz r3, .L2646 33127 00a0 0199 ldr r1, [sp, #4] 33128 .LVL5351: 33129 00a2 1D46 mov r5, r3 33130 00a4 8E1E subs r6, r1, #2 33131 00a6 00E0 b .L2647 33132 .LVL5352: 33133 .L2682: 33134 00a8 0237 adds r7, r7, #2 33135 .LVL5353: 33136 .L2647: 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Perform the multiply-accumulate */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15); 33137 .loc 100 207 0 33138 00aa 37F8020C ldrh r0, [r7, #-2] ARM GAS /tmp/ccJrAs6S.s page 1516 33139 00ae 36F9021F ldrsh r1, [r6, #2]! 33140 .LVL5354: 33141 00b2 10FB0CF0 smulbb r0, r0, ip 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 33142 .loc 100 204 0 33143 00b6 013D subs r5, r5, #1 33144 .LVL5355: 33145 .loc 100 207 0 33146 00b8 01EBE031 add r1, r1, r0, asr #15 33147 .LBB2467: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** *pb++ = (q15_t) __SSAT((coef), 16); 33148 .loc 100 208 0 33149 .syntax unified 33150 @ 208 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c" 1 33151 00bc 01F30F01 ssat r1, #16, r1 33152 @ 0 "" 2 33153 .LVL5356: 33154 .thumb 33155 .syntax unified 33156 .LBE2467: 33157 00c0 3180 strh r1, [r6] @ movhi 33158 .LVL5357: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 33159 .loc 100 204 0 33160 00c2 F1D1 bne .L2682 33161 .LVL5358: 33162 .L2646: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 33163 .loc 100 92 0 33164 00c4 BAF1010A subs r10, r10, #1 33165 .LVL5359: 33166 00c8 BED1 bne .L2648 33167 00ca 9846 mov r8, r3 33168 .LVL5360: 33169 00cc 119A ldr r2, [sp, #68] 33170 .LVL5361: 33171 00ce 059B ldr r3, [sp, #20] 33172 .LVL5362: 33173 00d0 03EB4203 add r3, r3, r2, lsl #1 33174 .LVL5363: 33175 .L2643: 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Decrement loop counter */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt--; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** } 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Decrement loop counter */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** blkCnt--; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** } 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Processing is complete. 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** Now copy the last numTaps - 1 samples to the start of the state buffer. 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** This prepares the state buffer for the next function call. */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Points to the start of the pState buffer */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** pStateCurnt = S->pState; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** ARM GAS /tmp/ccJrAs6S.s page 1517 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* copy data */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Loop unrolling: Compute 4 taps at a time. */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt = (numTaps - 1U) >> 2U; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** while (tapCnt > 0U) 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState)); 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState)); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Decrement loop counter */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt--; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** } 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Loop unrolling: Compute remaining taps */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt = (numTaps - 1U) % 0x4U; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** #else 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Initialize tapCnt with number of samples */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt = (numTaps - 1U); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** while (tapCnt > 0U) 33176 .loc 100 250 0 33177 00d4 B8F10101 subs r1, r8, #1 33178 .LVL5364: 33179 00d8 3BD0 beq .L2642 33180 00da 059C ldr r4, [sp, #20] 33181 00dc 1A1D adds r2, r3, #4 33182 00de 201D adds r0, r4, #4 33183 00e0 8342 cmp r3, r0 33184 00e2 38BF it cc 33185 00e4 9442 cmpcc r4, r2 33186 00e6 3BD3 bcc .L2650 33187 00e8 0D29 cmp r1, #13 33188 00ea 39D9 bls .L2650 33189 00ec C3F34002 ubfx r2, r3, #1, #1 33190 00f0 002A cmp r2, #0 33191 00f2 A8F10208 sub r8, r8, #2 33192 .LVL5365: 33193 00f6 0CBF ite eq 33194 00f8 0120 moveq r0, #1 33195 00fa 0220 movne r0, #2 33196 00fc 4045 cmp r0, r8 33197 00fe 1FD8 bhi .L2651 33198 0100 52B3 cbz r2, .L2660 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** *pStateCurnt++ = *pState++; 33199 .loc 100 252 0 33200 0102 B3F90000 ldrsh r0, [r3] 33201 0106 2080 strh r0, [r4] @ movhi 33202 0108 9E1C adds r6, r3, #2 33203 .LVL5366: 33204 010a A51C adds r5, r4, #2 ARM GAS /tmp/ccJrAs6S.s page 1518 33205 .LVL5367: 33206 .L2652: 33207 010c 8C1A subs r4, r1, r2 33208 010e 0599 ldr r1, [sp, #20] 33209 .LVL5368: 33210 0110 5200 lsls r2, r2, #1 33211 0112 A01E subs r0, r4, #2 33212 0114 1144 add r1, r1, r2 33213 0116 4008 lsrs r0, r0, #1 33214 0118 1344 add r3, r3, r2 33215 011a 0130 adds r0, r0, #1 33216 011c 0A46 mov r2, r1 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 33217 .loc 100 250 0 33218 011e 0021 movs r1, #0 33219 .LVL5369: 33220 .L2653: 33221 0120 0131 adds r1, r1, #1 33222 .loc 100 252 0 33223 0122 53F8047B ldr r7, [r3], #4 33224 0126 42F8047B str r7, [r2], #4 @ unaligned 33225 012a 8142 cmp r1, r0 33226 012c F8D3 bcc .L2653 33227 012e 4200 lsls r2, r0, #1 33228 0130 8000 lsls r0, r0, #2 33229 0132 3318 adds r3, r6, r0 33230 0134 9442 cmp r4, r2 33231 0136 2844 add r0, r5, r0 33232 0138 A8EB0201 sub r1, r8, r2 33233 013c 0590 str r0, [sp, #20] 33234 013e 08D0 beq .L2642 33235 .L2651: 33236 .LVL5370: 33237 0140 0598 ldr r0, [sp, #20] 33238 0142 B3F90020 ldrsh r2, [r3] 33239 0146 0280 strh r2, [r0] @ movhi 33240 .LVL5371: 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 33241 .loc 100 250 0 33242 0148 0129 cmp r1, #1 33243 014a 02D0 beq .L2642 33244 .LVL5372: 33245 .loc 100 252 0 33246 014c B3F90230 ldrsh r3, [r3, #2] 33247 .LVL5373: 33248 0150 4380 strh r3, [r0, #2] @ movhi 33249 .LVL5374: 33250 .L2642: 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** /* Decrement loop counter */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** tapCnt--; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** } 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** } 33251 .loc 100 258 0 33252 0152 07B0 add sp, sp, #28 33253 .LCFI274: ARM GAS /tmp/ccJrAs6S.s page 1519 33254 .cfi_remember_state 33255 .cfi_def_cfa_offset 36 33256 @ sp needed 33257 0154 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 33258 .LVL5375: 33259 .L2660: 33260 .LCFI275: 33261 .cfi_restore_state 33262 0158 2546 mov r5, r4 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 33263 .loc 100 250 0 33264 015a 8846 mov r8, r1 33265 .LVL5376: 33266 015c 1E46 mov r6, r3 33267 015e D5E7 b .L2652 33268 .LVL5377: 33269 .L2650: 33270 0160 059A ldr r2, [sp, #20] 33271 0162 023A subs r2, r2, #2 33272 .LVL5378: 33273 .L2655: 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** 33274 .loc 100 252 0 33275 0164 33F9020B ldrsh r0, [r3], #2 33276 .LVL5379: 33277 0168 22F8020F strh r0, [r2, #2]! @ movhi 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c **** { 33278 .loc 100 250 0 33279 016c 0139 subs r1, r1, #1 33280 .LVL5380: 33281 016e F9D1 bne .L2655 33282 .loc 100 258 0 33283 0170 07B0 add sp, sp, #28 33284 .LCFI276: 33285 .cfi_remember_state 33286 .cfi_def_cfa_offset 36 33287 @ sp needed 33288 0172 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 33289 .LVL5381: 33290 .L2657: 33291 .LCFI277: 33292 .cfi_restore_state 33293 0176 2B46 mov r3, r5 33294 .LVL5382: 33295 0178 ACE7 b .L2643 33296 .cfi_endproc 33297 .LFE245: 33299 017a 00BF .section .text.arm_lms_q31,"ax",%progbits 33300 .align 1 33301 .p2align 2,,3 33302 .global arm_lms_q31 33303 .syntax unified 33304 .thumb 33305 .thumb_func 33306 .fpu fpv4-sp-d16 33308 arm_lms_q31: 33309 .LFB246: ARM GAS /tmp/ccJrAs6S.s page 1520 33310 .file 101 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * Title: arm_lms_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * Description: Processing function for the Q31 LMS filter 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @ingroup groupFilters 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @addtogroup LMS 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @brief Processing function for Q31 LMS filter. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @param[in] S points to an instance of the Q31 LMS filter structure. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @param[in] pSrc points to the block of input data. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @param[in] pRef points to the block of reference data. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @param[out] pOut points to the block of output data. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @param[out] pErr points to the block of error data. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @param[in] blockSize number of samples to process. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @return none 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @par Scaling and Overflow Behavior 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** The function is implemented using an internal 64-bit accumulator. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** The accumulator has a 2.62 format and maintains full precision of the intermedia 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** multiplication results but provides only a single guard bit. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** Thus, if the accumulator result overflows it wraps around rather than clips. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** In order to avoid overflows completely the input signal must be scaled down by 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** log2(numTaps) bits. ARM GAS /tmp/ccJrAs6S.s page 1521 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** The reference signal should not be scaled down. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** After all multiply-accumulates are performed, the 2.62 accumulator is shifted 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** and saturated to 1.31 format to yield the final result. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** The output signal and error signal are in 1.31 format. 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** @par 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** In this filter, filter coefficients are updated for each sample and 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** the updation of filter cofficients are saturted. 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** void arm_lms_q31( 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** const arm_lms_instance_q31 * S, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** const q31_t * pSrc, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t * pRef, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t * pOut, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t * pErr, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** uint32_t blockSize) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 33311 .loc 101 73 0 33312 .cfi_startproc 33313 @ args = 8, pretend = 0, frame = 48 33314 @ frame_needed = 0, uses_anonymous_args = 0 33315 .LVL5383: 33316 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 33317 .LCFI278: 33318 .cfi_def_cfa_offset 36 33319 .cfi_offset 4, -36 33320 .cfi_offset 5, -32 33321 .cfi_offset 6, -28 33322 .cfi_offset 7, -24 33323 .cfi_offset 8, -20 33324 .cfi_offset 9, -16 33325 .cfi_offset 10, -12 33326 .cfi_offset 11, -8 33327 .cfi_offset 14, -4 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t *pState = S->pState; /* State pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t *pStateCurnt; /* Points to the current sample of the state 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t *px, *pb; /* Temporary pointers for state and coeffici 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t mu = S->mu; /* Adaptive factor */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q63_t acc; /* Accumulator */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t e = 0; /* Error of data sample */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t alpha; /* Intermediate constant for taps update */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t coef; /* Temporary variable for coef */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t acc_l, acc_h; /* Temporary input */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** uint32_t uShift = ((uint32_t) S->postShift + 1U); 33328 .loc 101 86 0 33329 0004 0469 ldr r4, [r0, #16] 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t *pState = S->pState; /* State pointer */ 33330 .loc 101 74 0 33331 0006 4568 ldr r5, [r0, #4] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t *pStateCurnt; /* Points to the current sample of the state 33332 .loc 101 75 0 33333 0008 8668 ldr r6, [r0, #8] 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** uint32_t tapCnt, blkCnt; /* Loop counters */ 33334 .loc 101 79 0 ARM GAS /tmp/ccJrAs6S.s page 1522 33335 000a B0F800C0 ldrh ip, [r0] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 33336 .loc 101 78 0 33337 000e C068 ldr r0, [r0, #12] 33338 .LVL5384: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t *pState = S->pState; /* State pointer */ 33339 .loc 101 73 0 33340 0010 8DB0 sub sp, sp, #52 33341 .LCFI279: 33342 .cfi_def_cfa_offset 88 33343 .loc 101 86 0 33344 0012 0134 adds r4, r4, #1 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t *pState = S->pState; /* State pointer */ 33345 .loc 101 73 0 33346 0014 9B46 mov fp, r3 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ 33347 .loc 101 87 0 33348 0016 C4F12003 rsb r3, r4, #32 33349 .LVL5385: 33350 001a 0A93 str r3, [sp, #40] 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* pStateCurnt points to the location where the new input data should be written */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** pStateCurnt = &(S->pState[(numTaps - 1U)]); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* initialise loop count */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** blkCnt = blockSize; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** while (blkCnt > 0U) 33351 .loc 101 96 0 33352 001c 179B ldr r3, [sp, #92] 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ 33353 .loc 101 74 0 33354 001e 0B95 str r5, [sp, #44] 33355 .LVL5386: 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** q31_t *pStateCurnt; /* Points to the current sample of the state 33356 .loc 101 75 0 33357 0020 0596 str r6, [sp, #20] 33358 .LVL5387: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filt 33359 .loc 101 78 0 33360 0022 0890 str r0, [sp, #32] 33361 .LVL5388: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ 33362 .loc 101 86 0 33363 0024 0994 str r4, [sp, #36] 33364 .LVL5389: 33365 .loc 101 96 0 33366 0026 002B cmp r3, #0 33367 0028 00F08580 beq .L2694 33368 002c 0CF18040 add r0, ip, #1073741824 33369 .LVL5390: 33370 0030 0138 subs r0, r0, #1 33371 .LVL5391: 33372 0032 8000 lsls r0, r0, #2 33373 .LVL5392: 33374 0034 0438 subs r0, r0, #4 ARM GAS /tmp/ccJrAs6S.s page 1523 33375 0036 2B18 adds r3, r5, r0 33376 .LVL5393: 33377 0038 0393 str r3, [sp, #12] 33378 003a 179B ldr r3, [sp, #92] 33379 003c 0493 str r3, [sp, #16] 33380 003e 8946 mov r9, r1 33381 0040 9246 mov r10, r2 33382 .LBB2468: 33383 .LBB2469: 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 33384 .loc 3 1161 0 33385 0042 6FF00048 mvn r8, #-2147483648 33386 .LVL5394: 33387 .L2691: 33388 .LBE2469: 33389 .LBE2468: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Copy the new input sample into the state buffer */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pStateCurnt++ = *pSrc++; 33390 .loc 101 99 0 33391 0046 039A ldr r2, [sp, #12] 33392 0048 59F8043B ldr r3, [r9], #4 33393 .LVL5395: 33394 004c 42F8043F str r3, [r2, #4]! 33395 0050 0392 str r2, [sp, #12] 33396 .LVL5396: 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Initialize pState pointer */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** px = pState; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Initialize coefficient pointer */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** pb = pCoeffs; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Set the accumulator to zero */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** acc = 0; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Loop unrolling: Compute 4 taps at a time. */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt = numTaps >> 2U; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** while (tapCnt > 0U) 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Perform the multiply-accumulate */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* acc += b[N] * x[n-N] */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** acc += ((q63_t) (*px++)) * (*pb++); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* acc += b[N-1] * x[n-N-1] */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** acc += ((q63_t) (*px++)) * (*pb++); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* acc += b[N-2] * x[n-N-2] */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** acc += ((q63_t) (*px++)) * (*pb++); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* acc += b[N-3] * x[n-N-3] */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** acc += ((q63_t) (*px++)) * (*pb++); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Decrement loop counter */ ARM GAS /tmp/ccJrAs6S.s page 1524 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt--; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** } 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Loop unrolling: Compute remaining taps */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt = numTaps % 0x4U; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** #else 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Initialize tapCnt with number of samples */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt = numTaps; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** while (tapCnt > 0U) 33397 .loc 101 144 0 33398 0052 BCF1000F cmp ip, #0 33399 0056 64D0 beq .L2685 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 33400 .loc 101 108 0 33401 0058 0026 movs r6, #0 33402 005a 0027 movs r7, #0 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 33403 .loc 101 105 0 33404 005c 059C ldr r4, [sp, #20] 33405 .loc 101 144 0 33406 005e 6146 mov r1, ip 33407 0060 2846 mov r0, r5 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 33408 .loc 101 108 0 33409 0062 3246 mov r2, r6 33410 0064 3B46 mov r3, r7 33411 .LVL5397: 33412 .L2686: 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Perform the multiply-accumulate */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** acc += ((q63_t) (*px++)) * (*pb++); 33413 .loc 101 147 0 33414 0066 50F8047B ldr r7, [r0], #4 33415 .LVL5398: 33416 006a 54F8046B ldr r6, [r4], #4 33417 .LVL5399: 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 33418 .loc 101 144 0 33419 006e 0139 subs r1, r1, #1 33420 .LVL5400: 33421 .loc 101 147 0 33422 0070 C6FB0723 smlal r2, r3, r6, r7 33423 .LVL5401: 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 33424 .loc 101 144 0 33425 0074 F7D1 bne .L2686 33426 0076 1646 mov r6, r2 33427 0078 1F46 mov r7, r3 33428 007a 0A9A ldr r2, [sp, #40] 33429 .LVL5402: 33430 007c 099B ldr r3, [sp, #36] 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1525 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Decrement the loop counter */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt--; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** } 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Converting the result to 1.31 format */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Calc lower part of acc */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** acc_l = acc & 0xffffffff; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Calc upper part of acc */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** acc_h = (acc >> 32) & 0xffffffff; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** acc = (uint32_t) acc_l >> lShift | acc_h << uShift; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Store the result from accumulator into the destination buffer. */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pOut++ = (q31_t) acc; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Compute and store error */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** e = *pRef++ - (q31_t) acc; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pErr++ = e; 33431 .loc 101 167 0 33432 007e 1698 ldr r0, [sp, #88] 33433 .LVL5403: 33434 0080 07FA03F3 lsl r3, r7, r3 33435 0084 26FA02F2 lsr r2, r6, r2 33436 0088 1A43 orrs r2, r2, r3 33437 .LVL5404: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 33438 .loc 101 163 0 33439 008a 4BF8042B str r2, [fp], #4 33440 .LVL5405: 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pErr++ = e; 33441 .loc 101 166 0 33442 008e 5AF8041B ldr r1, [r10], #4 33443 .LVL5406: 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Compute alpha i.e. intermediate constant for taps update */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** alpha = (q31_t) (((q63_t) e * mu) >> 31); 33444 .loc 101 170 0 33445 0092 089B ldr r3, [sp, #32] 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pErr++ = e; 33446 .loc 101 166 0 33447 0094 891A subs r1, r1, r2 33448 .LVL5407: 33449 .loc 101 170 0 33450 0096 81FB0323 smull r2, r3, r1, r3 33451 009a 4FEAD27E lsr lr, r2, #31 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 33452 .loc 101 167 0 33453 009e 40F8041B str r1, [r0], #4 33454 .LVL5408: 33455 .loc 101 170 0 33456 00a2 4EEA430E orr lr, lr, r3, lsl #1 33457 .LVL5409: 33458 00a6 059B ldr r3, [sp, #20] 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 33459 .loc 101 167 0 33460 00a8 1690 str r0, [sp, #88] ARM GAS /tmp/ccJrAs6S.s page 1526 33461 .LVL5410: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Initialize pState pointer */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Advance state pointer by 1 for the next sample */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** px = pState++; 33462 .loc 101 174 0 33463 00aa 2F1D adds r7, r5, #4 33464 00ac 3D46 mov r5, r7 33465 .LVL5411: 33466 00ae 1E1F subs r6, r3, #4 33467 00b0 6446 mov r4, ip 33468 00b2 CDE9069A strd r9, r10, [sp, #24] 33469 00b6 03E0 b .L2687 33470 .LVL5412: 33471 .L2703: 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Initialize coefficient pointer */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** pb = pCoeffs; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Loop unrolling: Compute 4 taps at a time. */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt = numTaps >> 2U; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Update filter coefficients */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** while (tapCnt > 0U) 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Perform the multiply-accumulate */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* coef is in 2.30 format */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* get coef in 1.31 format by left shifting */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* update coefficient buffer to next coefficient */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** pb++; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** pb++; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** pb++; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** pb++; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Decrement loop counter */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt--; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** } 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Loop unrolling: Compute remaining taps */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt = numTaps % 0x4U; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** #else 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1527 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Initialize tapCnt with number of samples */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt = numTaps; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** while (tapCnt > 0U) 33472 .loc 101 222 0 33473 00b8 013C subs r4, r4, #1 33474 .LVL5413: 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Perform the multiply-accumulate */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 33475 .loc 101 226 0 33476 00ba 3160 str r1, [r6] 33477 .LVL5414: 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 33478 .loc 101 222 0 33479 00bc 18D0 beq .L2702 33480 .LVL5415: 33481 .L2689: 33482 00be 0437 adds r7, r7, #4 33483 .LVL5416: 33484 .L2687: 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 33485 .loc 101 225 0 33486 00c0 57F8040C ldr r0, [r7, #-4] 33487 .loc 101 226 0 33488 00c4 56F8042F ldr r2, [r6, #4]! 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); 33489 .loc 101 225 0 33490 00c8 8EFB0001 smull r0, r1, lr, r0 33491 .loc 101 226 0 33492 00cc 4900 lsls r1, r1, #1 33493 00ce 12EB0109 adds r9, r2, r1 33494 00d2 4FEAE273 asr r3, r2, #31 33495 00d6 43EBE17A adc r10, r3, r1, asr #31 33496 .LBB2472: 33497 .LBB2470: 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 33498 .loc 3 1161 0 33499 00da BAEBE97F cmp r10, r9, asr #31 33500 .LBE2470: 33501 .LBE2472: 33502 .loc 101 226 0 33503 00de CDE9009A strd r9, [sp] 33504 .LVL5417: 33505 .LBB2473: 33506 .LBB2471: 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 33507 .loc 3 1161 0 33508 00e2 88EAEA71 eor r1, r8, r10, asr #31 33509 00e6 E7D1 bne .L2703 33510 .LVL5418: 33511 .LBE2471: 33512 .LBE2473: 33513 .loc 101 226 0 ARM GAS /tmp/ccJrAs6S.s page 1528 33514 00e8 009B ldr r3, [sp] 33515 00ea 3360 str r3, [r6] 33516 .LVL5419: 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 33517 .loc 101 222 0 33518 00ec 013C subs r4, r4, #1 33519 .LVL5420: 33520 00ee E6D1 bne .L2689 33521 .LVL5421: 33522 .L2702: 33523 00f0 DDE9069A ldrd r9, r10, [sp, #24] 33524 .LVL5422: 33525 .L2690: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 33526 .loc 101 96 0 33527 00f4 049B ldr r3, [sp, #16] 33528 00f6 013B subs r3, r3, #1 33529 .LVL5423: 33530 00f8 0493 str r3, [sp, #16] 33531 00fa A4D1 bne .L2691 33532 00fc 0B9B ldr r3, [sp, #44] 33533 .LVL5424: 33534 00fe 179A ldr r2, [sp, #92] 33535 0100 03EB8202 add r2, r3, r2, lsl #2 33536 .LVL5425: 33537 .L2684: 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** pb++; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Decrement loop counter */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt--; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** } 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Decrement loop counter */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** blkCnt--; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** } 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Processing is complete. 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** Now copy the last numTaps - 1 samples to the start of the state buffer. 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** This prepares the state buffer for the next function call. */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Points to the start of the pState buffer */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** pStateCurnt = S->pState; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* copy data */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Loop unrolling: Compute 4 taps at a time. */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt = (numTaps - 1U) >> 2U; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** while (tapCnt > 0U) 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pStateCurnt++ = *pState++; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pStateCurnt++ = *pState++; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pStateCurnt++ = *pState++; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pStateCurnt++ = *pState++; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Decrement loop counter */ ARM GAS /tmp/ccJrAs6S.s page 1529 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt--; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** } 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Loop unrolling: Compute remaining taps */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt = (numTaps - 1U) % 0x4U; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** #else 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Initialize tapCnt with number of samples */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt = (numTaps - 1U); 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** while (tapCnt > 0U) 33538 .loc 101 271 0 33539 0104 BCF1010C subs ip, ip, #1 33540 .LVL5426: 33541 0108 08D0 beq .L2683 33542 010a 0B9B ldr r3, [sp, #44] 33543 010c 043B subs r3, r3, #4 33544 .LVL5427: 33545 .L2693: 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pStateCurnt++ = *pState++; 33546 .loc 101 273 0 33547 010e 52F8041B ldr r1, [r2], #4 33548 .LVL5428: 33549 0112 43F8041F str r1, [r3, #4]! 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** { 33550 .loc 101 271 0 33551 0116 BCF1010C subs ip, ip, #1 33552 .LVL5429: 33553 011a F8D1 bne .L2693 33554 .LVL5430: 33555 .L2683: 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** /* Decrement loop counter */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** tapCnt--; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** } 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** } 33556 .loc 101 279 0 33557 011c 0DB0 add sp, sp, #52 33558 .LCFI280: 33559 .cfi_remember_state 33560 .cfi_def_cfa_offset 36 33561 @ sp needed 33562 011e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 33563 .LVL5431: 33564 .L2685: 33565 .LCFI281: 33566 .cfi_restore_state 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 33567 .loc 101 163 0 33568 0122 4BF804CB str ip, [fp], #4 33569 .LVL5432: 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** ARM GAS /tmp/ccJrAs6S.s page 1530 33570 .loc 101 167 0 33571 0126 169A ldr r2, [sp, #88] 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** *pErr++ = e; 33572 .loc 101 166 0 33573 0128 5AF8043B ldr r3, [r10], #4 33574 .LVL5433: 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 33575 .loc 101 167 0 33576 012c 42F8043B str r3, [r2], #4 33577 .LVL5434: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 33578 .loc 101 174 0 33579 0130 0435 adds r5, r5, #4 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c **** 33580 .loc 101 167 0 33581 0132 1692 str r2, [sp, #88] 33582 .LVL5435: 33583 0134 DEE7 b .L2690 33584 .LVL5436: 33585 .L2694: 33586 0136 2A46 mov r2, r5 33587 .LVL5437: 33588 0138 E4E7 b .L2684 33589 .cfi_endproc 33590 .LFE246: 33592 013a 00BF .text 33593 .Letext0: 33594 .file 102 "/usr/include/newlib/machine/_default_types.h" 33595 .file 103 "/usr/include/newlib/sys/_stdint.h" 33596 .file 104 "/usr/include/newlib/sys/lock.h" 33597 .file 105 "/usr/include/newlib/sys/_types.h" 33598 .file 106 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" 33599 .file 107 "/usr/include/newlib/sys/reent.h" 33600 .file 108 "/usr/include/newlib/math.h" 33601 .file 109 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h" 33602 .file 110 "" ARM GAS /tmp/ccJrAs6S.s page 1531 DEFINED SYMBOLS *ABS*:0000000000000000 FilteringFunctions.c /tmp/ccJrAs6S.s:16 .text.arm_biquad_cas_df1_32x64_init_q31:0000000000000000 $t /tmp/ccJrAs6S.s:24 .text.arm_biquad_cas_df1_32x64_init_q31:0000000000000000 arm_biquad_cas_df1_32x64_init_q31 /tmp/ccJrAs6S.s:64 .text.arm_biquad_cas_df1_32x64_q31:0000000000000000 $t /tmp/ccJrAs6S.s:72 .text.arm_biquad_cas_df1_32x64_q31:0000000000000000 arm_biquad_cas_df1_32x64_q31 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/tmp/ccJrAs6S.s:1125 .text.arm_biquad_cascade_df1_init_q31:0000000000000000 arm_biquad_cascade_df1_init_q31 /tmp/ccJrAs6S.s:1165 .text.arm_biquad_cascade_df1_q15:0000000000000000 $t /tmp/ccJrAs6S.s:1173 .text.arm_biquad_cascade_df1_q15:0000000000000000 arm_biquad_cascade_df1_q15 /tmp/ccJrAs6S.s:1623 .text.arm_biquad_cascade_df1_q31:0000000000000000 $t /tmp/ccJrAs6S.s:1631 .text.arm_biquad_cascade_df1_q31:0000000000000000 arm_biquad_cascade_df1_q31 /tmp/ccJrAs6S.s:1836 .text.arm_biquad_cascade_df2T_f32:0000000000000000 $t /tmp/ccJrAs6S.s:1844 .text.arm_biquad_cascade_df2T_f32:0000000000000000 arm_biquad_cascade_df2T_f32 /tmp/ccJrAs6S.s:1964 .text.arm_biquad_cascade_df2T_f64:0000000000000000 $t /tmp/ccJrAs6S.s:1972 .text.arm_biquad_cascade_df2T_f64:0000000000000000 arm_biquad_cascade_df2T_f64 /tmp/ccJrAs6S.s:2192 .text.arm_biquad_cascade_df2T_init_f32:0000000000000000 $t /tmp/ccJrAs6S.s:2200 .text.arm_biquad_cascade_df2T_init_f32:0000000000000000 arm_biquad_cascade_df2T_init_f32 /tmp/ccJrAs6S.s:2236 .text.arm_biquad_cascade_df2T_init_f64:0000000000000000 $t /tmp/ccJrAs6S.s:2244 .text.arm_biquad_cascade_df2T_init_f64:0000000000000000 arm_biquad_cascade_df2T_init_f64 /tmp/ccJrAs6S.s:2280 .text.arm_biquad_cascade_stereo_df2T_f32:0000000000000000 $t /tmp/ccJrAs6S.s:2288 .text.arm_biquad_cascade_stereo_df2T_f32:0000000000000000 arm_biquad_cascade_stereo_df2T_f32 /tmp/ccJrAs6S.s:2435 .text.arm_biquad_cascade_stereo_df2T_init_f32:0000000000000000 $t /tmp/ccJrAs6S.s:2443 .text.arm_biquad_cascade_stereo_df2T_init_f32:0000000000000000 arm_biquad_cascade_stereo_df2T_init_f32 /tmp/ccJrAs6S.s:2479 .text.arm_conv_f32:0000000000000000 $t /tmp/ccJrAs6S.s:2487 .text.arm_conv_f32:0000000000000000 arm_conv_f32 /tmp/ccJrAs6S.s:2786 .text.arm_conv_f32:0000000000000188 $d /tmp/ccJrAs6S.s:2791 .text.arm_conv_fast_opt_q15:0000000000000000 $t /tmp/ccJrAs6S.s:2799 .text.arm_conv_fast_opt_q15:0000000000000000 arm_conv_fast_opt_q15 /tmp/ccJrAs6S.s:3008 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