ARM GAS /tmp/cc6NnxTV.s page 1 1 .cpu cortex-m4 2 .eabi_attribute 27, 1 3 .eabi_attribute 28, 1 4 .eabi_attribute 23, 1 5 .eabi_attribute 24, 1 6 .eabi_attribute 25, 1 7 .eabi_attribute 26, 1 8 .eabi_attribute 30, 2 9 .eabi_attribute 34, 1 10 .eabi_attribute 18, 4 11 .file "MatrixFunctions.c" 12 .text 13 .Ltext0: 14 .cfi_sections .debug_frame 15 .section .text.arm_mat_add_f32,"ax",%progbits 16 .align 1 17 .p2align 2,,3 18 .global arm_mat_add_f32 19 .syntax unified 20 .thumb 21 .thumb_func 22 .fpu fpv4-sp-d16 24 arm_mat_add_f32: 25 .LFB148: 26 .file 1 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * Title: arm_mat_add_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * Description: Floating-point matrix addition 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** @ingroup groupMatrix ARM GAS /tmp/cc6NnxTV.s page 2 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** @defgroup MatrixAdd Matrix Addition 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** Adds two matrices. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** \image html MatrixAddition.gif "Addition of two 3 x 3 matrices" 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** The functions check to make sure that 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** pSrcA, pSrcB, and pDst have the same 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** number of rows and columns. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** */ 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** @addtogroup MatrixAdd 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** @{ 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** */ 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** @brief Floating-point matrix addition. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** @param[in] pSrcA points to first input matrix structure 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** @param[in] pSrcB points to second input matrix structure 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** @param[out] pDst points to output matrix structure 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** @return execution status 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** arm_status arm_mat_add_f32( 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** const arm_matrix_instance_f32 * pSrcA, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** const arm_matrix_instance_f32 * pSrcB, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** arm_matrix_instance_f32 * pDst) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** arm_status status; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** uint32_t numSamples; /* total number of elements in the matrix */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32_t *pDataA, *pDataB, *pDataDst; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** f32x4_t vecA, vecB, vecDst; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32_t const *pSrcAVec; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32_t const *pSrcBVec; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** uint32_t blkCnt; /* loop counters */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** pDataA = pSrcA->pData; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** pDataB = pSrcB->pData; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** pDataDst = pDst->pData; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** pSrcAVec = (float32_t const *) pDataA; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** pSrcBVec = (float32_t const *) pDataB; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Check for matrix mismatch condition */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** if ((pSrcA->numRows != pSrcB->numRows) || 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** (pSrcA->numCols != pSrcB->numCols) || 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** status = ARM_MATH_SIZE_MISMATCH; ARM GAS /tmp/cc6NnxTV.s page 3 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** else 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #endif 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * Total number of samples in the input matrix 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** blkCnt = numSamples >> 2; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** while (blkCnt > 0U) 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* C(m,n) = A(m,n) + B(m,n) */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Add and then store the results in the destination buffer. */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** vecA = vld1q(pSrcAVec); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** pSrcAVec += 4; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** vecB = vld1q(pSrcBVec); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** pSrcBVec += 4; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** vecDst = vaddq(vecA, vecB); 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** vst1q(pDataDst, vecDst); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** pDataDst += 4; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * Decrement the blockSize loop counter 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** blkCnt--; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** * tail 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** blkCnt = numSamples & 3; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** if (blkCnt > 0U) 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** vecA = vld1q(pSrcAVec); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** vecB = vld1q(pSrcBVec); 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** vecDst = vaddq_m(vecDst, vecA, vecB, p0); 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** vstrwq_p(pDataDst, vecDst, p0); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* set status as ARM_MATH_SUCCESS */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** status = ARM_MATH_SUCCESS; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** return (status); 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #else 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #if defined(ARM_MATH_NEON) 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** Neon version is assuming the matrix is small enough. 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** So no blocking is used for taking into account cache effects. 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** For big matrix, there exist better libraries for Neon. 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** arm_status arm_mat_add_f32( 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** const arm_matrix_instance_f32 * pSrcA, 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** const arm_matrix_instance_f32 * pSrcB, 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** arm_matrix_instance_f32 * pDst) 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ ARM GAS /tmp/cc6NnxTV.s page 4 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** uint32_t numSamples; /* total number of elements in the matrix */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** uint32_t blkCnt; /* loop counters */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** arm_status status; /* status of matrix addition */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Check for matrix mismatch condition */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** if ((pSrcA->numRows != pSrcB->numRows) || 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** (pSrcA->numCols != pSrcB->numCols) || 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** else 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #endif 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32x4_t vec1; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32x4_t vec2; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32x4_t res; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Total number of samples in the input matrix */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** blkCnt = numSamples >> 2U; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Compute 4 outputs at a time. 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** while (blkCnt > 0U) 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* C(m,n) = A(m,n) + B(m,n) */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Add and then store the results in the destination buffer. */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** vec1 = vld1q_f32(pIn1); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** vec2 = vld1q_f32(pIn2); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** res = vaddq_f32(vec1, vec2); 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** vst1q_f32(pOut, res); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* update pointers to process next samples */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** pIn1 += 4U; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** pIn2 += 4U; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** pOut += 4U; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Decrement the loop counter */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** blkCnt--; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* If the numSamples is not a multiple of 4, compute any remaining output samples here. 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** ** No loop unrolling is used. */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** blkCnt = numSamples % 0x4U; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** while (blkCnt > 0U) 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* C(m,n) = A(m,n) + B(m,n) */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Add and then store the results in the destination buffer. */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** *pOut++ = (*pIn1++) + (*pIn2++); ARM GAS /tmp/cc6NnxTV.s page 5 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Decrement the loop counter */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** blkCnt--; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* set status as ARM_MATH_SUCCESS */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** status = ARM_MATH_SUCCESS; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Return to application */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** return (status); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #else 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** arm_status arm_mat_add_f32( 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** const arm_matrix_instance_f32 * pSrcA, 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** const arm_matrix_instance_f32 * pSrcB, 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** arm_matrix_instance_f32 * pDst) 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 27 .loc 1 221 0 28 .cfi_startproc 29 @ args = 0, pretend = 0, frame = 0 30 @ frame_needed = 0, uses_anonymous_args = 0 31 @ link register save eliminated. 32 .LVL0: 33 0000 30B4 push {r4, r5} 34 .LCFI0: 35 .cfi_def_cfa_offset 8 36 .cfi_offset 4, -8 37 .cfi_offset 5, -4 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** uint32_t numSamples; /* total number of elements in the matrix */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** uint32_t blkCnt; /* loop counters */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** arm_status status; /* status of matrix addition */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Check for matrix mismatch condition */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** if ((pSrcA->numRows != pSrcB->numRows) || 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** (pSrcA->numCols != pSrcB->numCols) || 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** (pSrcA->numRows != pDst->numRows) || 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** (pSrcA->numCols != pDst->numCols) ) 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** else 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Total number of samples in input matrix */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 38 .loc 1 247 0 39 0002 4388 ldrh r3, [r0, #2] ARM GAS /tmp/cc6NnxTV.s page 6 40 0004 0588 ldrh r5, [r0] 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 41 .loc 1 223 0 42 0006 4C68 ldr r4, [r1, #4] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 43 .loc 1 224 0 44 0008 5168 ldr r1, [r2, #4] 45 .LVL1: 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 46 .loc 1 222 0 47 000a 4268 ldr r2, [r0, #4] 48 .LVL2: 49 .loc 1 247 0 50 000c 03FB05F3 mul r3, r3, r5 51 .LVL3: 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** blkCnt = numSamples >> 2U; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** while (blkCnt > 0U) 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* C(m,n) = A(m,n) + B(m,n) */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Add and store result in destination buffer. */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** *pOut++ = *pInA++ + *pInB++; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** *pOut++ = *pInA++ + *pInB++; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** *pOut++ = *pInA++ + *pInB++; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** *pOut++ = *pInA++ + *pInB++; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Decrement loop counter */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** blkCnt--; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Loop unrolling: Compute remaining outputs */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** blkCnt = numSamples % 0x4U; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #else 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Initialize blkCnt with number of samples */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** blkCnt = numSamples; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** while (blkCnt > 0U) 52 .loc 1 281 0 53 0010 4BB1 cbz r3, .L2 54 .LVL4: 55 .L3: 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* C(m,n) = A(m,n) + B(m,n) */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Add and store result in destination buffer. */ ARM GAS /tmp/cc6NnxTV.s page 7 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** *pOut++ = *pInA++ + *pInB++; 56 .loc 1 286 0 57 0012 F2EC017A vldmia.32 r2!, {s15} 58 .LVL5: 59 0016 B4EC017A vldmia.32 r4!, {s14} 60 .LVL6: 61 001a 77EE877A vadd.f32 s15, s15, s14 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 62 .loc 1 281 0 63 001e 013B subs r3, r3, #1 64 .LVL7: 65 .loc 1 286 0 66 0020 E1EC017A vstmia.32 r1!, {s15} 67 .LVL8: 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** { 68 .loc 1 281 0 69 0024 F5D1 bne .L3 70 .L2: 71 .LVL9: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Decrement loop counter */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** blkCnt--; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** status = ARM_MATH_SUCCESS; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** /* Return to application */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** return (status); 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c **** } 72 .loc 1 298 0 73 0026 0020 movs r0, #0 74 .LVL10: 75 0028 30BC pop {r4, r5} 76 .LCFI1: 77 .cfi_restore 5 78 .cfi_restore 4 79 .cfi_def_cfa_offset 0 80 .LVL11: 81 002a 7047 bx lr 82 .cfi_endproc 83 .LFE148: 85 .section .text.arm_mat_add_q15,"ax",%progbits 86 .align 1 87 .p2align 2,,3 88 .global arm_mat_add_q15 89 .syntax unified 90 .thumb 91 .thumb_func 92 .fpu fpv4-sp-d16 94 arm_mat_add_q15: 95 .LFB149: 96 .file 2 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * Title: arm_mat_add_q15.c ARM GAS /tmp/cc6NnxTV.s page 8 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * Description: Q15 matrix addition 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** @addtogroup MatrixAdd 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** @brief Q15 matrix addition. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** @param[in] pSrcA points to first input matrix structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** @param[in] pSrcB points to second input matrix structure 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** @param[out] pDst points to output matrix structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** @return execution status 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** The function uses saturating arithmetic. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** */ 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #if defined(ARM_MATH_MVEI) 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** arm_status arm_mat_add_q15( 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** const arm_matrix_instance_q15 * pSrcA, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** const arm_matrix_instance_q15 * pSrcB, 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** arm_matrix_instance_q15 * pDst) 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** { 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** uint32_t numSamples; /* total number of elements in the matrix */ ARM GAS /tmp/cc6NnxTV.s page 9 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** q15_t *pDataA, *pDataB, *pDataDst; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** q15x8_t vecA, vecB, vecDst; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** q15_t const *pSrcAVec; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** q15_t const *pSrcBVec; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** uint32_t blkCnt; /* loop counters */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** arm_status status; /* status of matrix addition */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** pDataA = pSrcA->pData; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** pDataB = pSrcB->pData; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** pDataDst = pDst->pData; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** pSrcAVec = (q15_t const *) pDataA; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** pSrcBVec = (q15_t const *) pDataB; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Check for matrix mismatch condition */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** if ((pSrcA->numRows != pSrcB->numRows) || 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** (pSrcA->numCols != pSrcB->numCols) || 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** (pSrcA->numRows != pDst->numRows) || 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** (pSrcA->numCols != pDst->numCols) ) 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** { 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** } 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** else 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** { 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * Total number of samples in the input matrix 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** blkCnt = numSamples >> 3; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** while (blkCnt > 0U) 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** { 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* C(m,n) = A(m,n) + B(m,n) */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Add and then store the results in the destination buffer. */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** vecA = vld1q(pSrcAVec); pSrcAVec += 8; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** vecB = vld1q(pSrcBVec); pSrcBVec += 8; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** vecDst = vqaddq(vecA, vecB); 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** vst1q(pDataDst, vecDst); pDataDst += 8; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * Decrement the blockSize loop counter 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** blkCnt--; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** } 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * tail 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** * (will be merged thru tail predication) 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** blkCnt = numSamples & 7; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** if (blkCnt > 0U) 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** { 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** vecA = vld1q(pSrcAVec); pSrcAVec += 8; ARM GAS /tmp/cc6NnxTV.s page 10 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** vecB = vld1q(pSrcBVec); pSrcBVec += 8; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** vecDst = vqaddq_m(vecDst, vecA, vecB, p0); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** vstrhq_p(pDataDst, vecDst, p0); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** } 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** status = ARM_MATH_SUCCESS; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** } 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Return to application */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** return (status); 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** } 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #else 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** arm_status arm_mat_add_q15( 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** const arm_matrix_instance_q15 * pSrcA, 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** const arm_matrix_instance_q15 * pSrcB, 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** arm_matrix_instance_q15 * pDst) 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** { 97 .loc 2 135 0 98 .cfi_startproc 99 @ args = 0, pretend = 0, frame = 0 100 @ frame_needed = 0, uses_anonymous_args = 0 101 @ link register save eliminated. 102 .LVL12: 103 0000 70B4 push {r4, r5, r6} 104 .LCFI2: 105 .cfi_def_cfa_offset 12 106 .cfi_offset 4, -12 107 .cfi_offset 5, -8 108 .cfi_offset 6, -4 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** q15_t *pOut = pDst->pData; /* output data matrix pointer */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** uint32_t numSamples; /* total number of elements in the matrix */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** uint32_t blkCnt; /* loop counters */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** arm_status status; /* status of matrix addition */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Check for matrix mismatch condition */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** if ((pSrcA->numRows != pSrcB->numRows) || 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** (pSrcA->numCols != pSrcB->numCols) || 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** (pSrcA->numRows != pDst->numRows) || 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** (pSrcA->numCols != pDst->numCols) ) 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** { 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** } 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** else 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** { 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Total number of samples in input matrix */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 109 .loc 2 161 0 ARM GAS /tmp/cc6NnxTV.s page 11 110 0002 4388 ldrh r3, [r0, #2] 111 0004 0688 ldrh r6, [r0] 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** q15_t *pOut = pDst->pData; /* output data matrix pointer */ 112 .loc 2 137 0 113 0006 4D68 ldr r5, [r1, #4] 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 114 .loc 2 138 0 115 0008 5468 ldr r4, [r2, #4] 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 116 .loc 2 136 0 117 000a 4168 ldr r1, [r0, #4] 118 .LVL13: 119 .loc 2 161 0 120 000c 03FB06F6 mul r6, r3, r6 121 .LVL14: 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** blkCnt = numSamples >> 2U; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** while (blkCnt > 0U) 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** { 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* C(m,n) = A(m,n) + B(m,n) */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Add, saturate and store result in destination buffer. */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #if defined (ARM_MATH_DSP) 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB))); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB))); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #else 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16); 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #endif 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Decrement loop counter */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** blkCnt--; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** } 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Loop unrolling: Compute remaining outputs */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** blkCnt = numSamples % 0x4U; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #else 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Initialize blkCnt with number of samples */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** blkCnt = numSamples; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** while (blkCnt > 0U) 122 .loc 2 201 0 123 0010 4EB1 cbz r6, .L11 ARM GAS /tmp/cc6NnxTV.s page 12 124 .LVL15: 125 .L12: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** { 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* C(m,n) = A(m,n) + B(m,n) */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Add, saturate and store result in destination buffer. */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #if defined (ARM_MATH_DSP) 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++); 126 .loc 2 207 0 127 0012 31F9023B ldrsh r3, [r1], #2 128 .LVL16: 129 0016 35F9020B ldrsh r0, [r5], #2 130 .LVL17: 131 .LBB117: 132 .LBB118: 133 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm ARM GAS /tmp/cc6NnxTV.s page 13 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; ARM GAS /tmp/cc6NnxTV.s page 14 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER 117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory") 118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 119:Drivers/CMSIS/Include/cmsis_gcc.h **** 120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */ 121:Drivers/CMSIS/Include/cmsis_gcc.h **** 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss 127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly 128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script. 129:Drivers/CMSIS/Include/cmsis_gcc.h **** 130:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) 132:Drivers/CMSIS/Include/cmsis_gcc.h **** { 133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN; 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src; 137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t; 140:Drivers/CMSIS/Include/cmsis_gcc.h **** 141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t; 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__; 147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__; 148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__; 149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__; 150:Drivers/CMSIS/Include/cmsis_gcc.h **** 151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable 152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i]; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** } 155:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS /tmp/cc6NnxTV.s page 15 156:Drivers/CMSIS/Include/cmsis_gcc.h **** 157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable 158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u; 160:Drivers/CMSIS/Include/cmsis_gcc.h **** } 161:Drivers/CMSIS/Include/cmsis_gcc.h **** } 162:Drivers/CMSIS/Include/cmsis_gcc.h **** 163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start(); 164:Drivers/CMSIS/Include/cmsis_gcc.h **** } 165:Drivers/CMSIS/Include/cmsis_gcc.h **** 166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start 167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 168:Drivers/CMSIS/Include/cmsis_gcc.h **** 169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP 170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop 171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 172:Drivers/CMSIS/Include/cmsis_gcc.h **** 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT 174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit 175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE 178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE 182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors"))) 183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 184:Drivers/CMSIS/Include/cmsis_gcc.h **** 185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 189:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 190:Drivers/CMSIS/Include/cmsis_gcc.h **** 191:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 195:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 197:Drivers/CMSIS/Include/cmsis_gcc.h **** { 198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 199:Drivers/CMSIS/Include/cmsis_gcc.h **** } 200:Drivers/CMSIS/Include/cmsis_gcc.h **** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** 202:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 206:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 208:Drivers/CMSIS/Include/cmsis_gcc.h **** { 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** } 211:Drivers/CMSIS/Include/cmsis_gcc.h **** 212:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/cc6NnxTV.s page 16 213:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 217:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 219:Drivers/CMSIS/Include/cmsis_gcc.h **** { 220:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 221:Drivers/CMSIS/Include/cmsis_gcc.h **** 222:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 223:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** } 225:Drivers/CMSIS/Include/cmsis_gcc.h **** 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 246:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 247:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 249:Drivers/CMSIS/Include/cmsis_gcc.h **** { 250:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 251:Drivers/CMSIS/Include/cmsis_gcc.h **** } 252:Drivers/CMSIS/Include/cmsis_gcc.h **** 253:Drivers/CMSIS/Include/cmsis_gcc.h **** 254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 255:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 259:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 261:Drivers/CMSIS/Include/cmsis_gcc.h **** { 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 263:Drivers/CMSIS/Include/cmsis_gcc.h **** } 264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** 267:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 268:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 269:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. ARM GAS /tmp/cc6NnxTV.s page 17 270:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 271:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 273:Drivers/CMSIS/Include/cmsis_gcc.h **** { 274:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 275:Drivers/CMSIS/Include/cmsis_gcc.h **** 276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 277:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 278:Drivers/CMSIS/Include/cmsis_gcc.h **** } 279:Drivers/CMSIS/Include/cmsis_gcc.h **** 280:Drivers/CMSIS/Include/cmsis_gcc.h **** 281:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 283:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 284:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 285:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 287:Drivers/CMSIS/Include/cmsis_gcc.h **** { 288:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 289:Drivers/CMSIS/Include/cmsis_gcc.h **** 290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 299:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 301:Drivers/CMSIS/Include/cmsis_gcc.h **** { 302:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 303:Drivers/CMSIS/Include/cmsis_gcc.h **** 304:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 305:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** } 307:Drivers/CMSIS/Include/cmsis_gcc.h **** 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 313:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 315:Drivers/CMSIS/Include/cmsis_gcc.h **** { 316:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 317:Drivers/CMSIS/Include/cmsis_gcc.h **** 318:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 319:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 320:Drivers/CMSIS/Include/cmsis_gcc.h **** } 321:Drivers/CMSIS/Include/cmsis_gcc.h **** 322:Drivers/CMSIS/Include/cmsis_gcc.h **** 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 324:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 326:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s ARM GAS /tmp/cc6NnxTV.s page 18 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 328:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 330:Drivers/CMSIS/Include/cmsis_gcc.h **** { 331:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 332:Drivers/CMSIS/Include/cmsis_gcc.h **** 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 335:Drivers/CMSIS/Include/cmsis_gcc.h **** } 336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 337:Drivers/CMSIS/Include/cmsis_gcc.h **** 338:Drivers/CMSIS/Include/cmsis_gcc.h **** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 342:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 343:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 345:Drivers/CMSIS/Include/cmsis_gcc.h **** { 346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 347:Drivers/CMSIS/Include/cmsis_gcc.h **** } 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 359:Drivers/CMSIS/Include/cmsis_gcc.h **** } 360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 361:Drivers/CMSIS/Include/cmsis_gcc.h **** 362:Drivers/CMSIS/Include/cmsis_gcc.h **** 363:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 365:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 367:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 369:Drivers/CMSIS/Include/cmsis_gcc.h **** { 370:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 371:Drivers/CMSIS/Include/cmsis_gcc.h **** 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 374:Drivers/CMSIS/Include/cmsis_gcc.h **** } 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 378:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 381:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 382:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) ARM GAS /tmp/cc6NnxTV.s page 19 384:Drivers/CMSIS/Include/cmsis_gcc.h **** { 385:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 386:Drivers/CMSIS/Include/cmsis_gcc.h **** 387:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 389:Drivers/CMSIS/Include/cmsis_gcc.h **** } 390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 391:Drivers/CMSIS/Include/cmsis_gcc.h **** 392:Drivers/CMSIS/Include/cmsis_gcc.h **** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 396:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 397:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 399:Drivers/CMSIS/Include/cmsis_gcc.h **** { 400:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 401:Drivers/CMSIS/Include/cmsis_gcc.h **** } 402:Drivers/CMSIS/Include/cmsis_gcc.h **** 403:Drivers/CMSIS/Include/cmsis_gcc.h **** 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 405:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 407:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 409:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 411:Drivers/CMSIS/Include/cmsis_gcc.h **** { 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 413:Drivers/CMSIS/Include/cmsis_gcc.h **** } 414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 415:Drivers/CMSIS/Include/cmsis_gcc.h **** 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 418:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 419:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 422:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 424:Drivers/CMSIS/Include/cmsis_gcc.h **** { 425:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 426:Drivers/CMSIS/Include/cmsis_gcc.h **** 427:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 428:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 429:Drivers/CMSIS/Include/cmsis_gcc.h **** } 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** 432:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 433:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 436:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 438:Drivers/CMSIS/Include/cmsis_gcc.h **** { 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 440:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS /tmp/cc6NnxTV.s page 20 441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 442:Drivers/CMSIS/Include/cmsis_gcc.h **** 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 448:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 450:Drivers/CMSIS/Include/cmsis_gcc.h **** { 451:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 452:Drivers/CMSIS/Include/cmsis_gcc.h **** 453:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 454:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 455:Drivers/CMSIS/Include/cmsis_gcc.h **** } 456:Drivers/CMSIS/Include/cmsis_gcc.h **** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** 458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 459:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 463:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 465:Drivers/CMSIS/Include/cmsis_gcc.h **** { 466:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 467:Drivers/CMSIS/Include/cmsis_gcc.h **** 468:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 469:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 470:Drivers/CMSIS/Include/cmsis_gcc.h **** } 471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 472:Drivers/CMSIS/Include/cmsis_gcc.h **** 473:Drivers/CMSIS/Include/cmsis_gcc.h **** 474:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 475:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 476:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 477:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 478:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 480:Drivers/CMSIS/Include/cmsis_gcc.h **** { 481:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/cc6NnxTV.s page 21 498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 499:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 500:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 501:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 502:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 504:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 505:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 507:Drivers/CMSIS/Include/cmsis_gcc.h **** { 508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 509:Drivers/CMSIS/Include/cmsis_gcc.h **** } 510:Drivers/CMSIS/Include/cmsis_gcc.h **** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** 512:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 515:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 516:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 518:Drivers/CMSIS/Include/cmsis_gcc.h **** { 519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 520:Drivers/CMSIS/Include/cmsis_gcc.h **** } 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 526:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 527:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 529:Drivers/CMSIS/Include/cmsis_gcc.h **** { 530:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 531:Drivers/CMSIS/Include/cmsis_gcc.h **** 532:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 534:Drivers/CMSIS/Include/cmsis_gcc.h **** } 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** 537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 538:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 541:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 542:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 544:Drivers/CMSIS/Include/cmsis_gcc.h **** { 545:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 546:Drivers/CMSIS/Include/cmsis_gcc.h **** 547:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 549:Drivers/CMSIS/Include/cmsis_gcc.h **** } 550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority ARM GAS /tmp/cc6NnxTV.s page 22 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 556:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 557:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 559:Drivers/CMSIS/Include/cmsis_gcc.h **** { 560:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 561:Drivers/CMSIS/Include/cmsis_gcc.h **** } 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** 564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 565:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 568:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 569:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 571:Drivers/CMSIS/Include/cmsis_gcc.h **** { 572:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 573:Drivers/CMSIS/Include/cmsis_gcc.h **** } 574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 575:Drivers/CMSIS/Include/cmsis_gcc.h **** 576:Drivers/CMSIS/Include/cmsis_gcc.h **** 577:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 578:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 579:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 580:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 581:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 582:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 584:Drivers/CMSIS/Include/cmsis_gcc.h **** { 585:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 586:Drivers/CMSIS/Include/cmsis_gcc.h **** } 587:Drivers/CMSIS/Include/cmsis_gcc.h **** 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 591:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 592:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 593:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 595:Drivers/CMSIS/Include/cmsis_gcc.h **** { 596:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 597:Drivers/CMSIS/Include/cmsis_gcc.h **** 598:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 599:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 600:Drivers/CMSIS/Include/cmsis_gcc.h **** } 601:Drivers/CMSIS/Include/cmsis_gcc.h **** 602:Drivers/CMSIS/Include/cmsis_gcc.h **** 603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 604:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 608:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 610:Drivers/CMSIS/Include/cmsis_gcc.h **** { 611:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; ARM GAS /tmp/cc6NnxTV.s page 23 612:Drivers/CMSIS/Include/cmsis_gcc.h **** 613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 614:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 615:Drivers/CMSIS/Include/cmsis_gcc.h **** } 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 617:Drivers/CMSIS/Include/cmsis_gcc.h **** 618:Drivers/CMSIS/Include/cmsis_gcc.h **** 619:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 620:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 621:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 622:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 623:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 625:Drivers/CMSIS/Include/cmsis_gcc.h **** { 626:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 627:Drivers/CMSIS/Include/cmsis_gcc.h **** } 628:Drivers/CMSIS/Include/cmsis_gcc.h **** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** 630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 631:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 635:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 637:Drivers/CMSIS/Include/cmsis_gcc.h **** { 638:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 639:Drivers/CMSIS/Include/cmsis_gcc.h **** } 640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 641:Drivers/CMSIS/Include/cmsis_gcc.h **** 642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 643:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 644:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 645:Drivers/CMSIS/Include/cmsis_gcc.h **** 646:Drivers/CMSIS/Include/cmsis_gcc.h **** 647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 648:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 649:Drivers/CMSIS/Include/cmsis_gcc.h **** 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 654:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 655:Drivers/CMSIS/Include/cmsis_gcc.h **** 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 657:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 658:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 660:Drivers/CMSIS/Include/cmsis_gcc.h **** { 661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 663:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 664:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 666:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 667:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 668:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; ARM GAS /tmp/cc6NnxTV.s page 24 669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 670:Drivers/CMSIS/Include/cmsis_gcc.h **** } 671:Drivers/CMSIS/Include/cmsis_gcc.h **** 672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 673:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 675:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 676:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 677:Drivers/CMSIS/Include/cmsis_gcc.h **** 678:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 679:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 680:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 682:Drivers/CMSIS/Include/cmsis_gcc.h **** { 683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 684:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 685:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 687:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 691:Drivers/CMSIS/Include/cmsis_gcc.h **** } 692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 693:Drivers/CMSIS/Include/cmsis_gcc.h **** 694:Drivers/CMSIS/Include/cmsis_gcc.h **** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 696:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 698:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 699:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 700:Drivers/CMSIS/Include/cmsis_gcc.h **** 701:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 702:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 703:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** { 706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 707:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 708:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 709:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 711:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 713:Drivers/CMSIS/Include/cmsis_gcc.h **** } 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 717:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 718:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) ARM GAS /tmp/cc6NnxTV.s page 25 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 728:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 729:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 733:Drivers/CMSIS/Include/cmsis_gcc.h **** } 734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 738:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 739:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 749:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 750:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 751:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 754:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 755:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 757:Drivers/CMSIS/Include/cmsis_gcc.h **** } 758:Drivers/CMSIS/Include/cmsis_gcc.h **** 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 763:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 764:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 765:Drivers/CMSIS/Include/cmsis_gcc.h **** 766:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 767:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 768:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** { 771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 773:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 775:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 776:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 777:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 779:Drivers/CMSIS/Include/cmsis_gcc.h **** } 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** 782:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/cc6NnxTV.s page 26 783:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 784:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 785:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 786:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 787:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 788:Drivers/CMSIS/Include/cmsis_gcc.h **** 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 797:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 799:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 801:Drivers/CMSIS/Include/cmsis_gcc.h **** } 802:Drivers/CMSIS/Include/cmsis_gcc.h **** 803:Drivers/CMSIS/Include/cmsis_gcc.h **** 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 805:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 806:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 807:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 808:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 811:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 812:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 814:Drivers/CMSIS/Include/cmsis_gcc.h **** { 815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 816:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 817:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 821:Drivers/CMSIS/Include/cmsis_gcc.h **** } 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 823:Drivers/CMSIS/Include/cmsis_gcc.h **** 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 825:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 826:Drivers/CMSIS/Include/cmsis_gcc.h **** 827:Drivers/CMSIS/Include/cmsis_gcc.h **** 828:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 829:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 830:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 831:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 832:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 834:Drivers/CMSIS/Include/cmsis_gcc.h **** { 835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) ARM GAS /tmp/cc6NnxTV.s page 27 840:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 841:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 843:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 846:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 849:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 851:Drivers/CMSIS/Include/cmsis_gcc.h **** } 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 856:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 857:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 858:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 860:Drivers/CMSIS/Include/cmsis_gcc.h **** { 861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 866:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 867:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 869:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 872:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 874:Drivers/CMSIS/Include/cmsis_gcc.h **** } 875:Drivers/CMSIS/Include/cmsis_gcc.h **** 876:Drivers/CMSIS/Include/cmsis_gcc.h **** 877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 878:Drivers/CMSIS/Include/cmsis_gcc.h **** 879:Drivers/CMSIS/Include/cmsis_gcc.h **** 880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 882:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 883:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 884:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 885:Drivers/CMSIS/Include/cmsis_gcc.h **** 886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 888:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) ARM GAS /tmp/cc6NnxTV.s page 28 897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 898:Drivers/CMSIS/Include/cmsis_gcc.h **** 899:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 902:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 904:Drivers/CMSIS/Include/cmsis_gcc.h **** 905:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 906:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 907:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 908:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 910:Drivers/CMSIS/Include/cmsis_gcc.h **** 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 915:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 916:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 918:Drivers/CMSIS/Include/cmsis_gcc.h **** 919:Drivers/CMSIS/Include/cmsis_gcc.h **** 920:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 921:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 922:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 923:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 925:Drivers/CMSIS/Include/cmsis_gcc.h **** 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 930:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 931:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 932:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 934:Drivers/CMSIS/Include/cmsis_gcc.h **** { 935:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 936:Drivers/CMSIS/Include/cmsis_gcc.h **** } 937:Drivers/CMSIS/Include/cmsis_gcc.h **** 938:Drivers/CMSIS/Include/cmsis_gcc.h **** 939:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 940:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 941:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 942:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 943:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 945:Drivers/CMSIS/Include/cmsis_gcc.h **** { 946:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 947:Drivers/CMSIS/Include/cmsis_gcc.h **** } 948:Drivers/CMSIS/Include/cmsis_gcc.h **** 949:Drivers/CMSIS/Include/cmsis_gcc.h **** 950:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. ARM GAS /tmp/cc6NnxTV.s page 29 954:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 956:Drivers/CMSIS/Include/cmsis_gcc.h **** { 957:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 958:Drivers/CMSIS/Include/cmsis_gcc.h **** } 959:Drivers/CMSIS/Include/cmsis_gcc.h **** 960:Drivers/CMSIS/Include/cmsis_gcc.h **** 961:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 962:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 963:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 964:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 965:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 966:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 968:Drivers/CMSIS/Include/cmsis_gcc.h **** { 969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 970:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 972:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 975:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 977:Drivers/CMSIS/Include/cmsis_gcc.h **** } 978:Drivers/CMSIS/Include/cmsis_gcc.h **** 979:Drivers/CMSIS/Include/cmsis_gcc.h **** 980:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 981:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 983:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 984:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 985:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 987:Drivers/CMSIS/Include/cmsis_gcc.h **** { 988:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 989:Drivers/CMSIS/Include/cmsis_gcc.h **** 990:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 991:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 992:Drivers/CMSIS/Include/cmsis_gcc.h **** } 993:Drivers/CMSIS/Include/cmsis_gcc.h **** 994:Drivers/CMSIS/Include/cmsis_gcc.h **** 995:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 996:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 997:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 998:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 999:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 1002:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1004:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/cc6NnxTV.s page 30 1011:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1012:Drivers/CMSIS/Include/cmsis_gcc.h **** 1013:Drivers/CMSIS/Include/cmsis_gcc.h **** 1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1015:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 1016:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 1017:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 1018:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 1020:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 1022:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1023:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1026:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 1027:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1028:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 1029:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1030:Drivers/CMSIS/Include/cmsis_gcc.h **** 1031:Drivers/CMSIS/Include/cmsis_gcc.h **** 1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1033:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 1034:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 1035:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 1036:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 1040:Drivers/CMSIS/Include/cmsis_gcc.h **** 1041:Drivers/CMSIS/Include/cmsis_gcc.h **** 1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 1045:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 1046:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1047:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 1049:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1051:Drivers/CMSIS/Include/cmsis_gcc.h **** 1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1053:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1054:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 1058:Drivers/CMSIS/Include/cmsis_gcc.h **** 1059:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 1060:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 1061:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1062:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/cc6NnxTV.s page 31 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value 1077:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) 1079:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1080:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally 1081:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially. 1082:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM 1083:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any 1084:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it 1085:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero". 1086:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a 1087:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction. 1088:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** if (value == 0U) 1090:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** return 32U; 1092:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_clz(value); 1094:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1095:Drivers/CMSIS/Include/cmsis_gcc.h **** 1096:Drivers/CMSIS/Include/cmsis_gcc.h **** 1097:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1098:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1099:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1100:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 1101:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1102:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (8 bit) 1103:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value. 1104:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1105:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1106:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1107:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) 1108:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1109:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1110:Drivers/CMSIS/Include/cmsis_gcc.h **** 1111:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1112:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); 1113:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1114:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1115:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1116:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit) ARM GAS /tmp/cc6NnxTV.s page 32 1125:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 16 bit values. 1126:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1127:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) 1130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1131:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1132:Drivers/CMSIS/Include/cmsis_gcc.h **** 1133:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1134:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); 1135:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1136:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1137:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1138:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1139:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1140:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1141:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ 1142:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1143:Drivers/CMSIS/Include/cmsis_gcc.h **** 1144:Drivers/CMSIS/Include/cmsis_gcc.h **** 1145:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1146:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit) 1147:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values. 1148:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) 1152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1154:Drivers/CMSIS/Include/cmsis_gcc.h **** 1155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 1156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1157:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1158:Drivers/CMSIS/Include/cmsis_gcc.h **** 1159:Drivers/CMSIS/Include/cmsis_gcc.h **** 1160:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1161:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit) 1162:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values. 1163:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1164:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1165:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1166:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1167:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1168:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) 1169:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1170:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1171:Drivers/CMSIS/Include/cmsis_gcc.h **** 1172:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); 1173:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1174:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1175:Drivers/CMSIS/Include/cmsis_gcc.h **** 1176:Drivers/CMSIS/Include/cmsis_gcc.h **** 1177:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1178:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit) 1179:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values. 1180:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1181:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location ARM GAS /tmp/cc6NnxTV.s page 33 1182:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1183:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1184:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1185:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) 1186:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1187:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1188:Drivers/CMSIS/Include/cmsis_gcc.h **** 1189:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); 1190:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1191:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1192:Drivers/CMSIS/Include/cmsis_gcc.h **** 1193:Drivers/CMSIS/Include/cmsis_gcc.h **** 1194:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1195:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit) 1196:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values. 1197:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1198:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1199:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1200:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1201:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1202:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) 1203:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1204:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1205:Drivers/CMSIS/Include/cmsis_gcc.h **** 1206:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 1207:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1208:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1209:Drivers/CMSIS/Include/cmsis_gcc.h **** 1210:Drivers/CMSIS/Include/cmsis_gcc.h **** 1211:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1212:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Remove the exclusive lock 1213:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Removes the exclusive lock which is created by LDREX. 1214:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1215:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __CLREX(void) 1216:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1217:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("clrex" ::: "memory"); 1218:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1219:Drivers/CMSIS/Include/cmsis_gcc.h **** 1220:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1221:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1222:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1223:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 1224:Drivers/CMSIS/Include/cmsis_gcc.h **** 1225:Drivers/CMSIS/Include/cmsis_gcc.h **** 1226:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1227:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1228:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 1229:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1230:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate 1231:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value. 1232:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated 1233:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (1..32) 1234:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1235:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1236:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SSAT(ARG1,ARG2) \ 1237:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \ 1238:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ ARM GAS /tmp/cc6NnxTV.s page 34 1239:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t __RES, __ARG1 = (ARG1); \ 1240:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1241:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1242:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1243:Drivers/CMSIS/Include/cmsis_gcc.h **** 1244:Drivers/CMSIS/Include/cmsis_gcc.h **** 1245:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1246:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate 1247:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value. 1248:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated 1249:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (0..31) 1250:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1251:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1252:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT(ARG1,ARG2) \ 1253:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \ 1254:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1255:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \ 1256:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1257:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1258:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1259:Drivers/CMSIS/Include/cmsis_gcc.h **** 1260:Drivers/CMSIS/Include/cmsis_gcc.h **** 1261:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1262:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right with Extend (32 bit) 1263:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Moves each bit of a bitstring right by one bit. 1264:Drivers/CMSIS/Include/cmsis_gcc.h **** The carry input is shifted in at the left end of the bitstring. 1265:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to rotate 1266:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 1267:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1268:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) 1269:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1270:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1271:Drivers/CMSIS/Include/cmsis_gcc.h **** 1272:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 1273:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1274:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1275:Drivers/CMSIS/Include/cmsis_gcc.h **** 1276:Drivers/CMSIS/Include/cmsis_gcc.h **** 1277:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1278:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (8 bit) 1279:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 8 bit value. 1280:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1281:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1282:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1283:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) 1284:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1285:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1286:Drivers/CMSIS/Include/cmsis_gcc.h **** 1287:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1288:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); 1289:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1290:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1291:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1292:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1293:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); 1294:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1295:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ ARM GAS /tmp/cc6NnxTV.s page 35 1296:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1297:Drivers/CMSIS/Include/cmsis_gcc.h **** 1298:Drivers/CMSIS/Include/cmsis_gcc.h **** 1299:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1300:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (16 bit) 1301:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 16 bit values. 1302:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1303:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1304:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1305:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) 1306:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1307:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1308:Drivers/CMSIS/Include/cmsis_gcc.h **** 1309:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1310:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); 1311:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1312:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1313:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1314:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1315:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); 1316:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1317:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ 1318:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1319:Drivers/CMSIS/Include/cmsis_gcc.h **** 1320:Drivers/CMSIS/Include/cmsis_gcc.h **** 1321:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1322:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (32 bit) 1323:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 32 bit values. 1324:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1325:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1326:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1327:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) 1328:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1329:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1330:Drivers/CMSIS/Include/cmsis_gcc.h **** 1331:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); 1332:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1333:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1334:Drivers/CMSIS/Include/cmsis_gcc.h **** 1335:Drivers/CMSIS/Include/cmsis_gcc.h **** 1336:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1337:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (8 bit) 1338:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 8 bit values. 1339:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1340:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1341:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1342:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) 1343:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1344:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1345:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1346:Drivers/CMSIS/Include/cmsis_gcc.h **** 1347:Drivers/CMSIS/Include/cmsis_gcc.h **** 1348:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1349:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (16 bit) 1350:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 16 bit values. 1351:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1352:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location ARM GAS /tmp/cc6NnxTV.s page 36 1353:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1354:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) 1355:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1356:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1357:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1358:Drivers/CMSIS/Include/cmsis_gcc.h **** 1359:Drivers/CMSIS/Include/cmsis_gcc.h **** 1360:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1361:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (32 bit) 1362:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 32 bit values. 1363:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1364:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1365:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1366:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) 1367:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1368:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); 1369:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1370:Drivers/CMSIS/Include/cmsis_gcc.h **** 1371:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1372:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1373:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 1374:Drivers/CMSIS/Include/cmsis_gcc.h **** 1375:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1376:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate 1377:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value. 1378:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated 1379:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (1..32) 1380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) 1383:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1384:Drivers/CMSIS/Include/cmsis_gcc.h **** if ((sat >= 1U) && (sat <= 32U)) 1385:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1386:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); 1387:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t min = -1 - max ; 1388:Drivers/CMSIS/Include/cmsis_gcc.h **** if (val > max) 1389:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1390:Drivers/CMSIS/Include/cmsis_gcc.h **** return max; 1391:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1392:Drivers/CMSIS/Include/cmsis_gcc.h **** else if (val < min) 1393:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1394:Drivers/CMSIS/Include/cmsis_gcc.h **** return min; 1395:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1396:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1397:Drivers/CMSIS/Include/cmsis_gcc.h **** return val; 1398:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1399:Drivers/CMSIS/Include/cmsis_gcc.h **** 1400:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1401:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate 1402:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value. 1403:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated 1404:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (0..31) 1405:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1406:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1407:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) 1408:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1409:Drivers/CMSIS/Include/cmsis_gcc.h **** if (sat <= 31U) ARM GAS /tmp/cc6NnxTV.s page 37 1410:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1411:Drivers/CMSIS/Include/cmsis_gcc.h **** const uint32_t max = ((1U << sat) - 1U); 1412:Drivers/CMSIS/Include/cmsis_gcc.h **** if (val > (int32_t)max) 1413:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1414:Drivers/CMSIS/Include/cmsis_gcc.h **** return max; 1415:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1416:Drivers/CMSIS/Include/cmsis_gcc.h **** else if (val < 0) 1417:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1418:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 1419:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1420:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1421:Drivers/CMSIS/Include/cmsis_gcc.h **** return (uint32_t)val; 1422:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1423:Drivers/CMSIS/Include/cmsis_gcc.h **** 1424:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1425:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1426:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 1427:Drivers/CMSIS/Include/cmsis_gcc.h **** 1428:Drivers/CMSIS/Include/cmsis_gcc.h **** 1429:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1430:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 1431:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1432:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (8 bit) 1433:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB instruction for 8 bit value. 1434:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1435:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1436:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) 1438:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1439:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1440:Drivers/CMSIS/Include/cmsis_gcc.h **** 1441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) ); 1442:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); 1443:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1444:Drivers/CMSIS/Include/cmsis_gcc.h **** 1445:Drivers/CMSIS/Include/cmsis_gcc.h **** 1446:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1447:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (16 bit) 1448:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAH instruction for 16 bit values. 1449:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1450:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1451:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1452:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) 1453:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1454:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1455:Drivers/CMSIS/Include/cmsis_gcc.h **** 1456:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) ); 1457:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); 1458:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1459:Drivers/CMSIS/Include/cmsis_gcc.h **** 1460:Drivers/CMSIS/Include/cmsis_gcc.h **** 1461:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1462:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (32 bit) 1463:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA instruction for 32 bit values. 1464:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1465:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1466:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/cc6NnxTV.s page 38 1467:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) 1468:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1469:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1470:Drivers/CMSIS/Include/cmsis_gcc.h **** 1471:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) ); 1472:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1473:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1474:Drivers/CMSIS/Include/cmsis_gcc.h **** 1475:Drivers/CMSIS/Include/cmsis_gcc.h **** 1476:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1477:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (8 bit) 1478:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB instruction for 8 bit values. 1479:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1480:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1481:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1482:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) 1483:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1484:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1485:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1486:Drivers/CMSIS/Include/cmsis_gcc.h **** 1487:Drivers/CMSIS/Include/cmsis_gcc.h **** 1488:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1489:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (16 bit) 1490:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH instruction for 16 bit values. 1491:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1492:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1493:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1494:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) 1495:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1496:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1497:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1498:Drivers/CMSIS/Include/cmsis_gcc.h **** 1499:Drivers/CMSIS/Include/cmsis_gcc.h **** 1500:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1501:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (32 bit) 1502:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL instruction for 32 bit values. 1503:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1504:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1505:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) 1507:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1509:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1510:Drivers/CMSIS/Include/cmsis_gcc.h **** 1511:Drivers/CMSIS/Include/cmsis_gcc.h **** 1512:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (8 bit) 1514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB exclusive instruction for 8 bit value. 1515:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1516:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1517:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1518:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr) 1519:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1520:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1521:Drivers/CMSIS/Include/cmsis_gcc.h **** 1522:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) ); 1523:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); ARM GAS /tmp/cc6NnxTV.s page 39 1524:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1525:Drivers/CMSIS/Include/cmsis_gcc.h **** 1526:Drivers/CMSIS/Include/cmsis_gcc.h **** 1527:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1528:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (16 bit) 1529:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAH exclusive instruction for 16 bit values. 1530:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1531:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1532:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1533:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr) 1534:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1535:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1536:Drivers/CMSIS/Include/cmsis_gcc.h **** 1537:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) ); 1538:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); 1539:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1540:Drivers/CMSIS/Include/cmsis_gcc.h **** 1541:Drivers/CMSIS/Include/cmsis_gcc.h **** 1542:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1543:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (32 bit) 1544:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA exclusive instruction for 32 bit values. 1545:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1546:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1547:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1548:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr) 1549:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1550:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1551:Drivers/CMSIS/Include/cmsis_gcc.h **** 1552:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) ); 1553:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1554:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1555:Drivers/CMSIS/Include/cmsis_gcc.h **** 1556:Drivers/CMSIS/Include/cmsis_gcc.h **** 1557:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1558:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (8 bit) 1559:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB exclusive instruction for 8 bit values. 1560:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1561:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1562:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1563:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1564:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1565:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) 1566:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1567:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1568:Drivers/CMSIS/Include/cmsis_gcc.h **** 1569:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); 1570:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1571:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1572:Drivers/CMSIS/Include/cmsis_gcc.h **** 1573:Drivers/CMSIS/Include/cmsis_gcc.h **** 1574:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1575:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (16 bit) 1576:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH exclusive instruction for 16 bit values. 1577:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1578:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1579:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1580:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed ARM GAS /tmp/cc6NnxTV.s page 40 1581:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1582:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) 1583:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1584:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1585:Drivers/CMSIS/Include/cmsis_gcc.h **** 1586:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); 1587:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1588:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1589:Drivers/CMSIS/Include/cmsis_gcc.h **** 1590:Drivers/CMSIS/Include/cmsis_gcc.h **** 1591:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1592:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (32 bit) 1593:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL exclusive instruction for 32 bit values. 1594:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1595:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1596:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1597:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1598:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1599:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) 1600:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1601:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1602:Drivers/CMSIS/Include/cmsis_gcc.h **** 1603:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); 1604:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1605:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1606:Drivers/CMSIS/Include/cmsis_gcc.h **** 1607:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1608:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 1609:Drivers/CMSIS/Include/cmsis_gcc.h **** 1610:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ 1611:Drivers/CMSIS/Include/cmsis_gcc.h **** 1612:Drivers/CMSIS/Include/cmsis_gcc.h **** 1613:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ################### Compiler specific Intrinsics ########################### */ 1614:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics 1615:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated SIMD instructions 1616:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 1617:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1618:Drivers/CMSIS/Include/cmsis_gcc.h **** 1619:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) 1620:Drivers/CMSIS/Include/cmsis_gcc.h **** 1621:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) 1622:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1623:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1624:Drivers/CMSIS/Include/cmsis_gcc.h **** 1625:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1626:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1627:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1628:Drivers/CMSIS/Include/cmsis_gcc.h **** 1629:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) 1630:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1631:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1632:Drivers/CMSIS/Include/cmsis_gcc.h **** 1633:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1634:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1635:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1636:Drivers/CMSIS/Include/cmsis_gcc.h **** 1637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) ARM GAS /tmp/cc6NnxTV.s page 41 1638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1639:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1640:Drivers/CMSIS/Include/cmsis_gcc.h **** 1641:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1642:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1643:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1644:Drivers/CMSIS/Include/cmsis_gcc.h **** 1645:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) 1646:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1647:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1648:Drivers/CMSIS/Include/cmsis_gcc.h **** 1649:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1650:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1651:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1652:Drivers/CMSIS/Include/cmsis_gcc.h **** 1653:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) 1654:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1655:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1656:Drivers/CMSIS/Include/cmsis_gcc.h **** 1657:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1658:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1659:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1660:Drivers/CMSIS/Include/cmsis_gcc.h **** 1661:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) 1662:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1663:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1664:Drivers/CMSIS/Include/cmsis_gcc.h **** 1665:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1666:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1667:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1668:Drivers/CMSIS/Include/cmsis_gcc.h **** 1669:Drivers/CMSIS/Include/cmsis_gcc.h **** 1670:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) 1671:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1672:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1673:Drivers/CMSIS/Include/cmsis_gcc.h **** 1674:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1675:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1676:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1677:Drivers/CMSIS/Include/cmsis_gcc.h **** 1678:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) 1679:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1680:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1681:Drivers/CMSIS/Include/cmsis_gcc.h **** 1682:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1683:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1684:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1685:Drivers/CMSIS/Include/cmsis_gcc.h **** 1686:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) 1687:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1688:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1689:Drivers/CMSIS/Include/cmsis_gcc.h **** 1690:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1691:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1692:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1693:Drivers/CMSIS/Include/cmsis_gcc.h **** 1694:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) ARM GAS /tmp/cc6NnxTV.s page 42 1695:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1696:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1697:Drivers/CMSIS/Include/cmsis_gcc.h **** 1698:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1699:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1700:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1701:Drivers/CMSIS/Include/cmsis_gcc.h **** 1702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) 1703:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1704:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1705:Drivers/CMSIS/Include/cmsis_gcc.h **** 1706:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1707:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1708:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1709:Drivers/CMSIS/Include/cmsis_gcc.h **** 1710:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) 1711:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1712:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1713:Drivers/CMSIS/Include/cmsis_gcc.h **** 1714:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1715:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1716:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1717:Drivers/CMSIS/Include/cmsis_gcc.h **** 1718:Drivers/CMSIS/Include/cmsis_gcc.h **** 1719:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) 1720:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1721:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1722:Drivers/CMSIS/Include/cmsis_gcc.h **** 1723:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1724:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1725:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1726:Drivers/CMSIS/Include/cmsis_gcc.h **** 1727:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) 1728:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1729:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1730:Drivers/CMSIS/Include/cmsis_gcc.h **** 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 134 .loc 3 1731 0 135 .syntax unified 136 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 137 001a 93FA10F3 qadd16 r3, r3, r0 138 @ 0 "" 2 139 .LVL18: 140 .thumb 141 .syntax unified 142 .LBE118: 143 .LBE117: 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** { 144 .loc 2 201 0 145 001e 013E subs r6, r6, #1 146 .LVL19: 147 .loc 2 207 0 148 0020 24F8023B strh r3, [r4], #2 @ movhi 149 .LVL20: 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** { 150 .loc 2 201 0 151 0024 F5D1 bne .L12 ARM GAS /tmp/cc6NnxTV.s page 43 152 .L11: 153 .LVL21: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #else 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** #endif 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Decrement loop counter */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** blkCnt--; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** } 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** status = ARM_MATH_SUCCESS; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** } 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** /* Return to application */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** return (status); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c **** } 154 .loc 2 222 0 155 0026 0020 movs r0, #0 156 0028 70BC pop {r4, r5, r6} 157 .LCFI3: 158 .cfi_restore 6 159 .cfi_restore 5 160 .cfi_restore 4 161 .cfi_def_cfa_offset 0 162 .LVL22: 163 002a 7047 bx lr 164 .cfi_endproc 165 .LFE149: 167 .section .text.arm_mat_add_q31,"ax",%progbits 168 .align 1 169 .p2align 2,,3 170 .global arm_mat_add_q31 171 .syntax unified 172 .thumb 173 .thumb_func 174 .fpu fpv4-sp-d16 176 arm_mat_add_q31: 177 .LFB150: 178 .file 4 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * Title: arm_mat_add_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * Description: Q31 matrix addition 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * not use this file except in compliance with the License. ARM GAS /tmp/cc6NnxTV.s page 44 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** @addtogroup MatrixAdd 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** @brief Q31 matrix addition. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** @param[in] pSrcA points to first input matrix structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** @param[in] pSrcB points to second input matrix structure 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** @param[out] pDst points to output matrix structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** @return execution status 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** The function uses saturating arithmetic. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** */ 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** #if defined(ARM_MATH_MVEI) 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** arm_status arm_mat_add_q31( 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** const arm_matrix_instance_q31 * pSrcA, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** const arm_matrix_instance_q31 * pSrcB, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** arm_matrix_instance_q31 * pDst) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** { 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** arm_status status; /* status of matrix addition */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** uint32_t numSamples; /* total number of elements in the matrix */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** q31_t *pDataA, *pDataB, *pDataDst; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** q31x4_t vecA, vecB, vecDst; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** q31_t const *pSrcAVec; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** q31_t const *pSrcBVec; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** uint32_t blkCnt; /* loop counters */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** pDataA = pSrcA->pData; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** pDataB = pSrcB->pData; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** pDataDst = pDst->pData; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** pSrcAVec = (q31_t const *) pDataA; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** pSrcBVec = (q31_t const *) pDataB; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 45 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Check for matrix mismatch condition */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** if ((pSrcA->numRows != pSrcB->numRows) || 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** (pSrcA->numCols != pSrcB->numCols) || 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** (pSrcA->numRows != pDst->numRows) || 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** (pSrcA->numCols != pDst->numCols) ) 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** } 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** else 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** { 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * Total number of samples in the input matrix 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** blkCnt = numSamples >> 2; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** while (blkCnt > 0U) 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** { 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* C(m,n) = A(m,n) + B(m,n) */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Add and then store the results in the destination buffer. */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** vecA = vld1q(pSrcAVec); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** pSrcAVec += 4; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** vecB = vld1q(pSrcBVec); 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** pSrcBVec += 4; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** vecDst = vqaddq(vecA, vecB); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** vst1q(pDataDst, vecDst); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** pDataDst += 4; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * Decrement the blockSize loop counter 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** blkCnt--; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** } 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** * tail 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** blkCnt = numSamples & 3; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** if (blkCnt > 0U) 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** { 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** vecA = vld1q(pSrcAVec); 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** pSrcAVec += 4; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** vecB = vld1q(pSrcBVec); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** pSrcBVec += 4; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** vecDst = vqaddq_m(vecDst, vecA, vecB, p0); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** vstrwq_p(pDataDst, vecDst, p0); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** } 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** status = ARM_MATH_SUCCESS; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** } 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Return to application */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** return (status); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** } 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** #else 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** arm_status arm_mat_add_q31( 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** const arm_matrix_instance_q31 * pSrcA, ARM GAS /tmp/cc6NnxTV.s page 46 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** const arm_matrix_instance_q31 * pSrcB, 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** arm_matrix_instance_q31 * pDst) 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** { 179 .loc 4 134 0 180 .cfi_startproc 181 @ args = 0, pretend = 0, frame = 0 182 @ frame_needed = 0, uses_anonymous_args = 0 183 @ link register save eliminated. 184 .LVL23: 185 0000 70B4 push {r4, r5, r6} 186 .LCFI4: 187 .cfi_def_cfa_offset 12 188 .cfi_offset 4, -12 189 .cfi_offset 5, -8 190 .cfi_offset 6, -4 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** uint32_t numSamples; /* total number of elements in the matrix */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** uint32_t blkCnt; /* loop counters */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** arm_status status; /* status of matrix addition */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Check for matrix mismatch condition */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** if ((pSrcA->numRows != pSrcB->numRows) || 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** (pSrcA->numCols != pSrcB->numCols) || 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** (pSrcA->numRows != pDst->numRows) || 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** (pSrcA->numCols != pDst->numCols) ) 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** { 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** } 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** else 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** { 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Total number of samples in input matrix */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 191 .loc 4 160 0 192 0002 4388 ldrh r3, [r0, #2] 193 0004 0688 ldrh r6, [r0] 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 194 .loc 4 136 0 195 0006 4D68 ldr r5, [r1, #4] 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 196 .loc 4 137 0 197 0008 5468 ldr r4, [r2, #4] 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 198 .loc 4 135 0 199 000a 4168 ldr r1, [r0, #4] 200 .LVL24: 201 .loc 4 160 0 202 000c 03FB06F6 mul r6, r3, r6 203 .LVL25: ARM GAS /tmp/cc6NnxTV.s page 47 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** blkCnt = numSamples >> 2U; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** while (blkCnt > 0U) 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** { 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* C(m,n) = A(m,n) + B(m,n) */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Add, saturate and store result in destination buffer. */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** *pOut++ = __QADD(*pInA++, *pInB++); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** *pOut++ = __QADD(*pInA++, *pInB++); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** *pOut++ = __QADD(*pInA++, *pInB++); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** *pOut++ = __QADD(*pInA++, *pInB++); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Decrement loop counter */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** blkCnt--; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** } 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Loop unrolling: Compute remaining outputs */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** blkCnt = numSamples % 0x4U; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** #else 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Initialize blkCnt with number of samples */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** blkCnt = numSamples; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** while (blkCnt > 0U) 204 .loc 4 194 0 205 0010 4EB1 cbz r6, .L19 206 .LVL26: 207 .L20: 208 .LBB119: 209 .LBB120: 1732:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1733:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1734:Drivers/CMSIS/Include/cmsis_gcc.h **** 1735:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) 1736:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1737:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1738:Drivers/CMSIS/Include/cmsis_gcc.h **** 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1740:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1741:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1742:Drivers/CMSIS/Include/cmsis_gcc.h **** 1743:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) 1744:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1745:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1746:Drivers/CMSIS/Include/cmsis_gcc.h **** 1747:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1748:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS /tmp/cc6NnxTV.s page 48 1749:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1750:Drivers/CMSIS/Include/cmsis_gcc.h **** 1751:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) 1752:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1754:Drivers/CMSIS/Include/cmsis_gcc.h **** 1755:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1756:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1757:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1758:Drivers/CMSIS/Include/cmsis_gcc.h **** 1759:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) 1760:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1761:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1762:Drivers/CMSIS/Include/cmsis_gcc.h **** 1763:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1764:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1765:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1766:Drivers/CMSIS/Include/cmsis_gcc.h **** 1767:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) 1768:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1769:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1770:Drivers/CMSIS/Include/cmsis_gcc.h **** 1771:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1772:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1773:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1774:Drivers/CMSIS/Include/cmsis_gcc.h **** 1775:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) 1776:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1777:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1778:Drivers/CMSIS/Include/cmsis_gcc.h **** 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1780:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1781:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1782:Drivers/CMSIS/Include/cmsis_gcc.h **** 1783:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) 1784:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1785:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1786:Drivers/CMSIS/Include/cmsis_gcc.h **** 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1788:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1789:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1790:Drivers/CMSIS/Include/cmsis_gcc.h **** 1791:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) 1792:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1793:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1794:Drivers/CMSIS/Include/cmsis_gcc.h **** 1795:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1796:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1797:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1798:Drivers/CMSIS/Include/cmsis_gcc.h **** 1799:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) 1800:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1801:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1802:Drivers/CMSIS/Include/cmsis_gcc.h **** 1803:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1804:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1805:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS /tmp/cc6NnxTV.s page 49 1806:Drivers/CMSIS/Include/cmsis_gcc.h **** 1807:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) 1808:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1809:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1810:Drivers/CMSIS/Include/cmsis_gcc.h **** 1811:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1812:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1813:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1814:Drivers/CMSIS/Include/cmsis_gcc.h **** 1815:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2) 1816:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1817:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1818:Drivers/CMSIS/Include/cmsis_gcc.h **** 1819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1820:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1821:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1822:Drivers/CMSIS/Include/cmsis_gcc.h **** 1823:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2) 1824:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1825:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1826:Drivers/CMSIS/Include/cmsis_gcc.h **** 1827:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1828:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1829:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1830:Drivers/CMSIS/Include/cmsis_gcc.h **** 1831:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) 1832:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1833:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1834:Drivers/CMSIS/Include/cmsis_gcc.h **** 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1836:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1837:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1838:Drivers/CMSIS/Include/cmsis_gcc.h **** 1839:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2) 1840:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1841:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1842:Drivers/CMSIS/Include/cmsis_gcc.h **** 1843:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1844:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1845:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1846:Drivers/CMSIS/Include/cmsis_gcc.h **** 1847:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) 1848:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1849:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1850:Drivers/CMSIS/Include/cmsis_gcc.h **** 1851:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1852:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1853:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1854:Drivers/CMSIS/Include/cmsis_gcc.h **** 1855:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) 1856:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1857:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1858:Drivers/CMSIS/Include/cmsis_gcc.h **** 1859:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1860:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1861:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1862:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/cc6NnxTV.s page 50 1863:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) 1864:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1865:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1866:Drivers/CMSIS/Include/cmsis_gcc.h **** 1867:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1868:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1869:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1870:Drivers/CMSIS/Include/cmsis_gcc.h **** 1871:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) 1872:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1873:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1874:Drivers/CMSIS/Include/cmsis_gcc.h **** 1875:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1876:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1877:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1878:Drivers/CMSIS/Include/cmsis_gcc.h **** 1879:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) 1880:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1881:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1882:Drivers/CMSIS/Include/cmsis_gcc.h **** 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1884:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1885:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1886:Drivers/CMSIS/Include/cmsis_gcc.h **** 1887:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2) 1888:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1889:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1890:Drivers/CMSIS/Include/cmsis_gcc.h **** 1891:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1892:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1893:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1894:Drivers/CMSIS/Include/cmsis_gcc.h **** 1895:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) 1896:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1897:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1898:Drivers/CMSIS/Include/cmsis_gcc.h **** 1899:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1900:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1901:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1902:Drivers/CMSIS/Include/cmsis_gcc.h **** 1903:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) 1904:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1906:Drivers/CMSIS/Include/cmsis_gcc.h **** 1907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1908:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1909:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1910:Drivers/CMSIS/Include/cmsis_gcc.h **** 1911:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) 1912:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1913:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1914:Drivers/CMSIS/Include/cmsis_gcc.h **** 1915:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1916:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1917:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1918:Drivers/CMSIS/Include/cmsis_gcc.h **** 1919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) ARM GAS /tmp/cc6NnxTV.s page 51 1920:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1922:Drivers/CMSIS/Include/cmsis_gcc.h **** 1923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 1924:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1925:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1926:Drivers/CMSIS/Include/cmsis_gcc.h **** 1927:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SSAT16(ARG1,ARG2) \ 1928:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1929:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t __RES, __ARG1 = (ARG1); \ 1930:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1931:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1932:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1933:Drivers/CMSIS/Include/cmsis_gcc.h **** 1934:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT16(ARG1,ARG2) \ 1935:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1936:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \ 1937:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1938:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1939:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1940:Drivers/CMSIS/Include/cmsis_gcc.h **** 1941:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1) 1942:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1943:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1944:Drivers/CMSIS/Include/cmsis_gcc.h **** 1945:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); 1946:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1947:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1948:Drivers/CMSIS/Include/cmsis_gcc.h **** 1949:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) 1950:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1951:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1952:Drivers/CMSIS/Include/cmsis_gcc.h **** 1953:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1954:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1955:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1956:Drivers/CMSIS/Include/cmsis_gcc.h **** 1957:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) 1958:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1959:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1960:Drivers/CMSIS/Include/cmsis_gcc.h **** 1961:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); 1962:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1963:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1964:Drivers/CMSIS/Include/cmsis_gcc.h **** 1965:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) 1966:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1967:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1968:Drivers/CMSIS/Include/cmsis_gcc.h **** 1969:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1970:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1971:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1972:Drivers/CMSIS/Include/cmsis_gcc.h **** 1973:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) 1974:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1975:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1976:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/cc6NnxTV.s page 52 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1978:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1979:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1980:Drivers/CMSIS/Include/cmsis_gcc.h **** 1981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) 1982:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1984:Drivers/CMSIS/Include/cmsis_gcc.h **** 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1986:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1987:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1988:Drivers/CMSIS/Include/cmsis_gcc.h **** 1989:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) 1990:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1991:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1992:Drivers/CMSIS/Include/cmsis_gcc.h **** 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 1994:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1995:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1996:Drivers/CMSIS/Include/cmsis_gcc.h **** 1997:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) 1998:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1999:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2000:Drivers/CMSIS/Include/cmsis_gcc.h **** 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 2002:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2003:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2004:Drivers/CMSIS/Include/cmsis_gcc.h **** 2005:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) 2006:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2007:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{ 2008:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2]; 2009:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64; 2010:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr; 2011:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc; 2012:Drivers/CMSIS/Include/cmsis_gcc.h **** 2013:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */ 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (o 2015:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 2016:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (o 2017:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 2018:Drivers/CMSIS/Include/cmsis_gcc.h **** 2019:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64); 2020:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2021:Drivers/CMSIS/Include/cmsis_gcc.h **** 2022:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) 2023:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2024:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{ 2025:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2]; 2026:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64; 2027:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr; 2028:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc; 2029:Drivers/CMSIS/Include/cmsis_gcc.h **** 2030:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */ 2031:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" ( 2032:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 2033:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" ( ARM GAS /tmp/cc6NnxTV.s page 53 2034:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 2035:Drivers/CMSIS/Include/cmsis_gcc.h **** 2036:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64); 2037:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2038:Drivers/CMSIS/Include/cmsis_gcc.h **** 2039:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) 2040:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2041:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2042:Drivers/CMSIS/Include/cmsis_gcc.h **** 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 2044:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2045:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2046:Drivers/CMSIS/Include/cmsis_gcc.h **** 2047:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) 2048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2049:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2050:Drivers/CMSIS/Include/cmsis_gcc.h **** 2051:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 2052:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2053:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2054:Drivers/CMSIS/Include/cmsis_gcc.h **** 2055:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) 2056:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2058:Drivers/CMSIS/Include/cmsis_gcc.h **** 2059:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 2060:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2061:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2062:Drivers/CMSIS/Include/cmsis_gcc.h **** 2063:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) 2064:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2065:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2066:Drivers/CMSIS/Include/cmsis_gcc.h **** 2067:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 2068:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2069:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2070:Drivers/CMSIS/Include/cmsis_gcc.h **** 2071:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) 2072:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2073:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{ 2074:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2]; 2075:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64; 2076:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr; 2077:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc; 2078:Drivers/CMSIS/Include/cmsis_gcc.h **** 2079:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */ 2080:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (o 2081:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 2082:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (o 2083:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 2084:Drivers/CMSIS/Include/cmsis_gcc.h **** 2085:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64); 2086:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2087:Drivers/CMSIS/Include/cmsis_gcc.h **** 2088:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) 2089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2090:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{ ARM GAS /tmp/cc6NnxTV.s page 54 2091:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2]; 2092:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64; 2093:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr; 2094:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc; 2095:Drivers/CMSIS/Include/cmsis_gcc.h **** 2096:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */ 2097:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" ( 2098:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 2099:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" ( 2100:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 2101:Drivers/CMSIS/Include/cmsis_gcc.h **** 2102:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64); 2103:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2104:Drivers/CMSIS/Include/cmsis_gcc.h **** 2105:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2) 2106:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2107:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2108:Drivers/CMSIS/Include/cmsis_gcc.h **** 2109:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 2110:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2111:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2112:Drivers/CMSIS/Include/cmsis_gcc.h **** 2113:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2) 2114:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2115:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t result; 2116:Drivers/CMSIS/Include/cmsis_gcc.h **** 2117:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 210 .loc 3 2117 0 211 0012 51F8043B ldr r3, [r1], #4 212 .LVL27: 213 0016 55F8040B ldr r0, [r5], #4 214 .LVL28: 215 .syntax unified 216 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 217 001a 80FA83F3 qadd r3, r3, r0 218 @ 0 "" 2 219 .LVL29: 220 .thumb 221 .syntax unified 222 .LBE120: 223 .LBE119: 224 .loc 4 194 0 225 001e 013E subs r6, r6, #1 226 .LVL30: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** { 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* C(m,n) = A(m,n) + B(m,n) */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Add, saturate and store result in destination buffer. */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** *pOut++ = __QADD(*pInA++, *pInB++); 227 .loc 4 199 0 228 0020 44F8043B str r3, [r4], #4 229 .LVL31: 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** { 230 .loc 4 194 0 231 0024 F5D1 bne .L20 232 .L19: 233 .LVL32: ARM GAS /tmp/cc6NnxTV.s page 55 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Decrement loop counter */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** blkCnt--; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** } 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** status = ARM_MATH_SUCCESS; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** } 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** /* Return to application */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** return (status); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c **** } 234 .loc 4 211 0 235 0026 0020 movs r0, #0 236 0028 70BC pop {r4, r5, r6} 237 .LCFI5: 238 .cfi_restore 6 239 .cfi_restore 5 240 .cfi_restore 4 241 .cfi_def_cfa_offset 0 242 .LVL33: 243 002a 7047 bx lr 244 .cfi_endproc 245 .LFE150: 247 .section .text.arm_mat_cmplx_mult_f32,"ax",%progbits 248 .align 1 249 .p2align 2,,3 250 .global arm_mat_cmplx_mult_f32 251 .syntax unified 252 .thumb 253 .thumb_func 254 .fpu fpv4-sp-d16 256 arm_mat_cmplx_mult_f32: 257 .LFB151: 258 .file 5 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Title: arm_mat_cmplx_mult_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Description: Floating-point matrix multiplication 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Unless required by applicable law or agreed to in writing, software ARM GAS /tmp/cc6NnxTV.s page 56 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** @defgroup CmplxMatrixMult Complex Matrix Multiplication 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** Complex Matrix multiplication is only defined if the number of columns of the 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** first matrix equals the number of rows of the second matrix. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** Multiplying an M x N matrix with an N x P matrix results 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** in an M x P matrix. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** @par 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** When matrix size checking is enabled, the functions check: 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** - that the inner dimensions of pSrcA and pSrcB are equal; 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** - that the size of the output matrix equals the outer dimensions of pSrcA and pData; /* input data matrix pointer B */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint32x4_t vecColBOffs0; ARM GAS /tmp/cc6NnxTV.s page 57 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA0 = pInA; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM2; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** f32x4_t acc0, acc1; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** f32x4_t vecB, vecA; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** static const uint32_t offsetB0[4] = { 0, 1, 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** MATRIX_DIM2 * CMPLX_DIM, MATRIX_DIM2 * CMPLX_DIM + 1 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** }; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecColBOffs0 = vldrwq_u32((uint32_t const *) offsetB0); 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = (float32_t const *)pSrcB->pData; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA0); 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmulq(vecA, vecB); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA1); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmulq(vecA, vecB); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 0] = acc0[0] + acc0[2]; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 1] = acc0[1] + acc0[3]; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 0] = acc1[0] + acc1[2]; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 1] = acc1[1] + acc1[3]; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut += CMPLX_DIM; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * move to next B column 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = pInB + CMPLX_DIM; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA0); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmulq(vecA, vecB); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA1); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmulq(vecA, vecB); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 0] = acc0[0] + acc0[2]; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 1] = acc0[1] + acc0[3]; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 0] = acc1[0] + acc1[2]; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 1] = acc1[1] + acc1[3]; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Return to application 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** return (ARM_MATH_SUCCESS); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** __STATIC_INLINE arm_status arm_mat_cmplx_mult_f32_3x3_mve( 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** const arm_matrix_instance_f32 * pSrcA, ARM GAS /tmp/cc6NnxTV.s page 58 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** const arm_matrix_instance_f32 * pSrcB, 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** arm_matrix_instance_f32 * pDst) 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint32x4_t vecColBOffs0, vecColBOffs1; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA0 = pInA; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM3; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM3; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** f32x4_t acc0, acc1, acc2; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** f32x4_t vecB, vecA; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* enable predication to disable upper half complex vector element */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** mve_pred16_t p0 = vctp32q(CMPLX_DIM); 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** static const uint32_t offsetB0[4] = { 0, 1, 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** MATRIX_DIM3 * CMPLX_DIM, MATRIX_DIM3 * CMPLX_DIM + 1 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** }; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** static const uint32_t offsetB1[4] = { 2 * MATRIX_DIM3 * CMPLX_DIM, 2 * MATRIX_DIM3 * CMPLX_DIM 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** INACTIVELANE, INACTIVELANE 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** }; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecColBOffs0 = vldrwq_u32((uint32_t const *) offsetB0); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecColBOffs1 = vldrwq_u32((uint32_t const *) offsetB1); 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = (float32_t const *)pSrcB->pData; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA0); 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmulq(vecA, vecB); 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA1); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmulq(vecA, vecB); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA2); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmulq(vecA, vecB); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset_z(pInB, vecColBOffs1, p0); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA0[4]); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq(acc0, vecA, vecB); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA1[4]); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq(acc1, vecA, vecB); 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA2[4]); 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq(acc2, vecA, vecB); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 59 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc0[0] + acc0[2]; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc0[1] + acc0[3]; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc1[0] + acc1[2]; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc1[1] + acc1[3]; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc2[0] + acc2[2]; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc2[1] + acc2[3]; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut += CMPLX_DIM; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * move to next B column 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = pInB + CMPLX_DIM; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA0); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmulq(vecA, vecB); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA1); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmulq(vecA, vecB); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA2); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmulq(vecA, vecB); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset_z(pInB, vecColBOffs1, p0); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA0[4]); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq(acc0, vecA, vecB); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA1[4]); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq(acc1, vecA, vecB); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA2[4]); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq(acc2, vecA, vecB); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc0[0] + acc0[2]; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc0[1] + acc0[3]; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc1[0] + acc1[2]; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc1[1] + acc1[3]; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc2[0] + acc2[2]; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc2[1] + acc2[3]; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut += CMPLX_DIM; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * move to next B column 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = pInB + CMPLX_DIM; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 60 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA0); 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmulq(vecA, vecB); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA1); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmulq(vecA, vecB); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA2); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmulq(vecA, vecB); 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset_z(pInB, vecColBOffs1, p0); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA0[4]); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq(acc0, vecA, vecB); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA1[4]); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq(acc1, vecA, vecB); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA2[4]); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq(acc2, vecA, vecB); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc0[0] + acc0[2]; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc0[1] + acc0[3]; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc1[0] + acc1[2]; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc1[1] + acc1[3]; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc2[0] + acc2[2]; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc2[1] + acc2[3]; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Return to application 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** return (ARM_MATH_SUCCESS); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** __STATIC_INLINE arm_status arm_mat_cmplx_mult_f32_4x4_mve( 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** const arm_matrix_instance_f32 * pSrcA, 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** const arm_matrix_instance_f32 * pSrcB, 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** arm_matrix_instance_f32 * pDst) 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint32x4_t vecColBOffs0, vecColBOffs1; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA0 = pInA; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM4; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM4; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA3 = pInA2 + CMPLX_DIM * MATRIX_DIM4; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** f32x4_t acc0, acc1, acc2, acc3; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** f32x4_t vecB, vecA; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 61 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** static const uint32_t offsetB0[4] = { 0, 1, 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** MATRIX_DIM4 * CMPLX_DIM, MATRIX_DIM4 * CMPLX_DIM + 1 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** }; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** static const uint32_t offsetB1[4] = { 2 * MATRIX_DIM4 * CMPLX_DIM, 2 * MATRIX_DIM4 * CMPLX_DIM 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 3 * MATRIX_DIM4 * CMPLX_DIM, 3 * MATRIX_DIM4 * CMPLX_DIM + 1 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** }; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecColBOffs0 = vldrwq_u32((uint32_t const *) offsetB0); 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecColBOffs1 = vldrwq_u32((uint32_t const *) offsetB1); 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = (float32_t const *)pSrcB->pData; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA0); 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmulq(vecA, vecB); 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA1); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmulq(vecA, vecB); 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA2); 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmulq(vecA, vecB); 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA3); 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmulq(vecA, vecB); 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq_rot90(acc3, vecA, vecB); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA0[4]); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq(acc0, vecA, vecB); 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA1[4]); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq(acc1, vecA, vecB); 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA2[4]); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq(acc2, vecA, vecB); 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA3[4]); 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq(acc3, vecA, vecB); 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq_rot90(acc3, vecA, vecB); 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc0[0] + acc0[2]; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc0[1] + acc0[3]; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc1[0] + acc1[2]; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc1[1] + acc1[3]; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc2[0] + acc2[2]; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc2[1] + acc2[3]; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc3[0] + acc3[2]; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc3[1] + acc3[3]; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut += CMPLX_DIM; ARM GAS /tmp/cc6NnxTV.s page 62 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * move to next B column 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = pInB + CMPLX_DIM; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA0); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmulq(vecA, vecB); 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA1); 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmulq(vecA, vecB); 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA2); 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmulq(vecA, vecB); 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA3); 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmulq(vecA, vecB); 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq_rot90(acc3, vecA, vecB); 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA0[4]); 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq(acc0, vecA, vecB); 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA1[4]); 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq(acc1, vecA, vecB); 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA2[4]); 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq(acc2, vecA, vecB); 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA3[4]); 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq(acc3, vecA, vecB); 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq_rot90(acc3, vecA, vecB); 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc0[0] + acc0[2]; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc0[1] + acc0[3]; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc1[0] + acc1[2]; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc1[1] + acc1[3]; 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc2[0] + acc2[2]; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc2[1] + acc2[3]; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc3[0] + acc3[2]; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc3[1] + acc3[3]; 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut += CMPLX_DIM; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * move to next B column 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = pInB + CMPLX_DIM; 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 63 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA0); 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmulq(vecA, vecB); 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA1); 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmulq(vecA, vecB); 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA2); 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmulq(vecA, vecB); 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA3); 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmulq(vecA, vecB); 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq_rot90(acc3, vecA, vecB); 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA0[4]); 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq(acc0, vecA, vecB); 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA1[4]); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq(acc1, vecA, vecB); 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA2[4]); 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq(acc2, vecA, vecB); 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA3[4]); 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq(acc3, vecA, vecB); 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq_rot90(acc3, vecA, vecB); 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc0[0] + acc0[2]; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc0[1] + acc0[3]; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc1[0] + acc1[2]; 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc1[1] + acc1[3]; 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc2[0] + acc2[2]; 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc2[1] + acc2[3]; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc3[0] + acc3[2]; 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc3[1] + acc3[3]; 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut += CMPLX_DIM; 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * move to next B column 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = pInB + CMPLX_DIM; 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA0); 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmulq(vecA, vecB); 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 64 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA1); 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmulq(vecA, vecB); 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA2); 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmulq(vecA, vecB); 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(pInA3); 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmulq(vecA, vecB); 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq_rot90(acc3, vecA, vecB); 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA0[4]); 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq(acc0, vecA, vecB); 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA1[4]); 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq(acc1, vecA, vecB); 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA2[4]); 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq(acc2, vecA, vecB); 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vldrwq_f32(&pInA3[4]); 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq(acc3, vecA, vecB); 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq_rot90(acc3, vecA, vecB); 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc0[0] + acc0[2]; 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc0[1] + acc0[3]; 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc1[0] + acc1[2]; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc1[1] + acc1[3]; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc2[0] + acc2[2]; 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc2[1] + acc2[3]; 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc3[0] + acc3[2]; 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc3[1] + acc3[3]; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Return to application 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** return (ARM_MATH_SUCCESS); 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** arm_status arm_mat_cmplx_mult_f32( 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** const arm_matrix_instance_f32 * pSrcA, 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** const arm_matrix_instance_f32 * pSrcB, 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** arm_matrix_instance_f32 * pDst) 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t const *pInB = (float32_t const *) pSrcB->pData; /* input data matrix pointer B */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t const *pInA = (float32_t const *) pSrcA->pData; /* input data matrix pointer A */ 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *px; /* Temporary output data matrix pointer */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint16_t col, i = 0U, row = numRowsA, colCnt; /* loop counters */ ARM GAS /tmp/cc6NnxTV.s page 65 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** arm_status status; /* status of matrix multiplication */ 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint32x4_t vecOffs, vecColBOffs; 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint32_t blkCnt, rowCnt; /* loop counters */ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Check for matrix mismatch condition */ 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** if ((pSrcA->numCols != pSrcB->numRows) || 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** else 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * small squared matrix specialized routines 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** if (numRowsA == numColsB && numColsB == numColsA) 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** if (numRowsA == 1) 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[0] = pInA[0] * pInB[0] - pInA[1] * pInB[1]; 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pOut[1] = pInA[0] * pInB[1] + pInA[1] * pInB[0]; 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** return (ARM_MATH_SUCCESS); 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** else if (numRowsA == 2) 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** return arm_mat_cmplx_mult_f32_2x2_mve(pSrcA, pSrcB, pDst); 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** else if (numRowsA == 3) 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** return arm_mat_cmplx_mult_f32_3x3_mve(pSrcA, pSrcB, pDst); 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** else if (numRowsA == 4) 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** return arm_mat_cmplx_mult_f32_4x4_mve(pSrcA, pSrcB, pDst); 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecColBOffs[0] = 0; 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecColBOffs[1] = 1; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecColBOffs[2] = numColsB * CMPLX_DIM; 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecColBOffs[3] = (numColsB * CMPLX_DIM) + 1; 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * row loop 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** rowCnt = row >> 2; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (rowCnt > 0u) 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Output pointer is set to starting address of the row being processed 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px = pOut + i * CMPLX_DIM; ARM GAS /tmp/cc6NnxTV.s page 66 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** i = i + 4 * numColsB; 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * For every row wise process, the column loop counter is to be initiated 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** col = numColsB; 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * For every row wise process, the pInB pointer is set 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * to the starting address of the pSrcB data 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = (float32_t const *) pSrcB->pData; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * column loop 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (col > 0u) 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * generate 4 columns elements 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Matrix A columns number of MAC operations are to be performed 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt = numColsA; 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t const *pInA0 = pInA; 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t const *pInA1 = pInA0 + numColsA * CMPLX_DIM; 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t const *pInA2 = pInA1 + numColsA * CMPLX_DIM; 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t const *pInA3 = pInA2 + numColsA * CMPLX_DIM; 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** f32x4_t acc0, acc1, acc2, acc3; 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vdupq_n_f32(0.0f); 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vdupq_n_f32(0.0f); 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vdupq_n_f32(0.0f); 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vdupq_n_f32(0.0f); 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pSrcA0Vec = (float32_t const *) pInA0; 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pSrcA1Vec = (float32_t const *) pInA1; 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pSrcA2Vec = (float32_t const *) pInA2; 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pSrcA3Vec = (float32_t const *) pInA3; 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecOffs = vecColBOffs; 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * process 1 x 4 block output 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** blkCnt = (numColsA * CMPLX_DIM) >> 2; 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (blkCnt > 0U) 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** f32x4_t vecB, vecA; 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecOffs); 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * move Matrix B read offsets, 4 rows down 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vld1q(pSrcA0Vec); pSrcA0Vec += 4; ARM GAS /tmp/cc6NnxTV.s page 67 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq(acc0, vecA, vecB); 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vld1q(pSrcA1Vec); pSrcA1Vec += 4; 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq(acc1, vecA, vecB); 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vld1q(pSrcA2Vec); pSrcA2Vec += 4; 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq(acc2, vecA, vecB); 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vld1q(pSrcA3Vec); pSrcA3Vec += 4; 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq(acc3, vecA, vecB); 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq_rot90(acc3, vecA, vecB); 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** blkCnt--; 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * tail 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * (will be merged thru tail predication) 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** blkCnt = (numColsA * CMPLX_DIM) & 3; 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** if (blkCnt > 0U) 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** f32x4_t vecB, vecA; 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0); 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * move Matrix B read offsets, 4 rows down 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vld1q(pSrcA0Vec); 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq(acc0, vecA, vecB); 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vld1q(pSrcA1Vec); 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq(acc1, vecA, vecB); 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc1 = vcmlaq_rot90(acc1, vecA, vecB); 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vld1q(pSrcA2Vec); 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq(acc2, vecA, vecB); 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc2 = vcmlaq_rot90(acc2, vecA, vecB); 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vld1q(pSrcA3Vec); 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq(acc3, vecA, vecB); 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc3 = vcmlaq_rot90(acc3, vecA, vecB); 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px[0 * CMPLX_DIM * numColsB + 0] = acc0[0] + acc0[2]; 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px[0 * CMPLX_DIM * numColsB + 1] = acc0[1] + acc0[3]; 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px[1 * CMPLX_DIM * numColsB + 0] = acc1[0] + acc1[2]; 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px[1 * CMPLX_DIM * numColsB + 1] = acc1[1] + acc1[3]; 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px[2 * CMPLX_DIM * numColsB + 0] = acc2[0] + acc2[2]; 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px[2 * CMPLX_DIM * numColsB + 1] = acc2[1] + acc2[3]; 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px[3 * CMPLX_DIM * numColsB + 0] = acc3[0] + acc3[2]; 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px[3 * CMPLX_DIM * numColsB + 1] = acc3[1] + acc3[3]; 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px += CMPLX_DIM; 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* ARM GAS /tmp/cc6NnxTV.s page 68 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Decrement the column loop counter 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** col--; 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Update the pointer pInB to point to the starting address of the next column 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = (float32_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM; 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Update the pointer pInA to point to the starting address of the next row 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInA += (numColsA * 4) * CMPLX_DIM; 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Decrement the row loop counter 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** rowCnt --; 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** rowCnt = row & 3; 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (rowCnt > 0u) 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Output pointer is set to starting address of the row being processed 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px = pOut + i * CMPLX_DIM; 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** i = i + numColsB; 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * For every row wise process, the column loop counter is to be initiated 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** col = numColsB; 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * For every row wise process, the pInB pointer is set 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * to the starting address of the pSrcB data 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = (float32_t const *) pSrcB->pData; 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * column loop 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (col > 0u) 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * generate 4 columns elements 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Matrix A columns number of MAC operations are to be performed 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt = numColsA; 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t const *pSrcA0Vec; 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t const *pInA0 = pInA; 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** f32x4_t acc0; 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vdupq_n_f32(0.0f); 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pSrcA0Vec = (float32_t const *) pInA0; ARM GAS /tmp/cc6NnxTV.s page 69 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecOffs = vecColBOffs; 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * process 1 x 4 block output 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** blkCnt = (numColsA * CMPLX_DIM) >> 2; 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (blkCnt > 0U) 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** f32x4_t vecB, vecA; 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecOffs); 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * move Matrix B read offsets, 4 rows down 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vld1q(pSrcA0Vec); 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pSrcA0Vec += 4; 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq(acc0, vecA, vecB); 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** blkCnt--; 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * tail 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** blkCnt = (numColsA * CMPLX_DIM) & 3; 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** if (blkCnt > 0U) 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** f32x4_t vecB, vecA; 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0); 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** vecA = vld1q(pSrcA0Vec); 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq(acc0, vecA, vecB); 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** acc0 = vcmlaq_rot90(acc0, vecA, vecB); 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px[0] = acc0[0] + acc0[2]; 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px[1] = acc0[1] + acc0[3]; 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px += CMPLX_DIM; 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Decrement the column loop counter 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** col--; 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Update the pointer pInB to point to the starting address of the next column 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInB = (float32_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM; 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } ARM GAS /tmp/cc6NnxTV.s page 70 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** * Update the pointer pInA to point to the starting address of the next row 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** */ 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInA += numColsA * CMPLX_DIM; 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** rowCnt--; 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** status = ARM_MATH_SUCCESS; 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Return to application */ 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** return (status); 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #else 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #if defined(ARM_MATH_NEON) 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** arm_status arm_mat_cmplx_mult_f32( 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** const arm_matrix_instance_f32 * pSrcA, 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** const arm_matrix_instance_f32 * pSrcB, 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** arm_matrix_instance_f32 * pDst) 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *px; /* Temporary output data matrix pointer */ 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t sumReal1, sumImag1; /* accumulator */ 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t a1, a1B,b1, b1B, c1, d1; 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t sumReal2, sumImag2; /* accumulator */ 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32x4x2_t a0V, a1V; 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32x4_t accR0,accI0, accR1,accI1,tempR, tempI; 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32x2_t accum = vdup_n_f32(0); 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pIn1B = pSrcA->pData; 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint16_t col, i = 0U, j, rowCnt, row = numRowsA, colCnt; /* loop counters */ 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** arm_status status; /* status of matrix multiplication */ 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t sumReal1B, sumImag1B; 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t sumReal2B, sumImag2B; 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pxB; 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Check for matrix mismatch condition */ 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** if ((pSrcA->numCols != pSrcB->numRows) || 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 71 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** else 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB * 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** rowCnt = row >> 1; 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Row loop */ 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (rowCnt > 0U) 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Output pointer is set to starting address of the row being processed */ 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px = pOut + 2 * i; 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pxB = px + 2 * numColsB; 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* For every row wise process, the column loop counter is to be initiated */ 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** col = numColsB; 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* For every row wise process, the pIn2 pointer is set 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ** to the starting address of the pSrcB data */ 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 = pSrcB->pData; 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** j = 0U; 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Column loop */ 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (col > 0U) 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Set the variable sum, that acts as accumulator, to zero */ 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal1 = 0.0f; 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag1 = 0.0f; 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal1B = 0.0f; 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag1B = 0.0f; 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal2 = 0.0f; 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag2 = 0.0f; 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal2B = 0.0f; 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag2B = 0.0f; 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Initiate the pointer pIn1 to point to the starting address of the column being processed 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1 = pInA; 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1B = pIn1 + 2*numColsA; 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accR0 = vdupq_n_f32(0.0); 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accI0 = vdupq_n_f32(0.0); 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accR1 = vdupq_n_f32(0.0); 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accI1 = vdupq_n_f32(0.0); 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Compute 4 MACs simultaneously. */ 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt = numColsA >> 2; 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Matrix multiplication */ 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (colCnt > 0U) 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Reading real part of complex matrix A */ ARM GAS /tmp/cc6NnxTV.s page 72 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** a0V = vld2q_f32(pIn1); // load & separate real/imag pSrcA (de-interleave 2) 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** a1V = vld2q_f32(pIn1B); // load & separate real/imag pSrcA (de-interleave 2) 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1 += 8; 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1B += 8; 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempR = vsetq_lane_f32(*pIn2,tempR,0); 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,0); 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempR = vsetq_lane_f32(*pIn2,tempR,1); 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,1); 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempR = vsetq_lane_f32(*pIn2,tempR,2); 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,2); 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempR = vsetq_lane_f32(*pIn2,tempR,3); 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,3); 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accR0 = vmlaq_f32(accR0,a0V.val[0],tempR); 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accR0 = vmlsq_f32(accR0,a0V.val[1],tempI); 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accI0 = vmlaq_f32(accI0,a0V.val[1],tempR); 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accI0 = vmlaq_f32(accI0,a0V.val[0],tempI); 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accR1 = vmlaq_f32(accR1,a1V.val[0],tempR); 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accR1 = vmlsq_f32(accR1,a1V.val[1],tempI); 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accI1 = vmlaq_f32(accI1,a1V.val[1],tempR); 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accI1 = vmlaq_f32(accI1,a1V.val[0],tempI); 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Decrement the loop count */ 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt--; 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accum = vpadd_f32(vget_low_f32(accR0), vget_high_f32(accR0)); 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accum = vpadd_f32(vget_low_f32(accI0), vget_high_f32(accI0)); 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accum = vpadd_f32(vget_low_f32(accR1), vget_high_f32(accR1)); 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal1B += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accum = vpadd_f32(vget_low_f32(accI1), vget_high_f32(accI1)); 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag1B += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ** No loop unrolling is used. */ 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt = numColsA & 3; 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (colCnt > 0U) 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { ARM GAS /tmp/cc6NnxTV.s page 73 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */ 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** a1 = *pIn1; 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** a1B = *pIn1B; 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** c1 = *pIn2; 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** b1 = *(pIn1 + 1U); 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** b1B = *(pIn1B + 1U); 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** d1 = *(pIn2 + 1U); 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal1 += a1 * c1; 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag1 += b1 * c1; 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal1B += a1B * c1; 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag1B += b1B * c1; 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1 += 2U; 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1B += 2U; 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal2 -= b1 * d1; 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag2 += a1 * d1; 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal2B -= b1B * d1; 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag2B += a1B * d1; 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Decrement the loop counter */ 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt--; 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal1 += sumReal2; 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag1 += sumImag2; 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal1B += sumReal2B; 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag1B += sumImag2B; 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Store the result in the destination buffer */ 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** *px++ = sumReal1; 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** *px++ = sumImag1; 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** *pxB++ = sumReal1B; 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** *pxB++ = sumImag1B; 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Update the pointer pIn2 to point to the starting address of the next column */ 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** j++; 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 = pSrcB->pData + 2U * j; 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Decrement the column loop counter */ 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** col--; 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Update the pointer pInA to point to the starting address of the next 2 row */ 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** i = i + 2*numColsB; 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInA = pInA + 4 * numColsA; 1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Decrement the row loop counter */ 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** rowCnt--; ARM GAS /tmp/cc6NnxTV.s page 74 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** rowCnt = row & 1; 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (rowCnt > 0U) 1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Output pointer is set to starting address of the row being processed */ 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px = pOut + 2 * i; 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* For every row wise process, the column loop counter is to be initiated */ 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** col = numColsB; 1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* For every row wise process, the pIn2 pointer is set 1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ** to the starting address of the pSrcB data */ 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 = pSrcB->pData; 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** j = 0U; 1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Column loop */ 1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (col > 0U) 1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Set the variable sum, that acts as accumulator, to zero */ 1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal1 = 0.0f; 1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag1 = 0.0f; 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal2 = 0.0f; 1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag2 = 0.0f; 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Initiate the pointer pIn1 to point to the starting address of the column being processed 1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1 = pInA; 1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accR0 = vdupq_n_f32(0.0); 1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accI0 = vdupq_n_f32(0.0); 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Compute 4 MACs simultaneously. */ 1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt = numColsA >> 2; 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Matrix multiplication */ 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (colCnt > 0U) 1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Reading real part of complex matrix A */ 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** a0V = vld2q_f32(pIn1); // load & separate real/imag pSrcA (de-interleave 2) 1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1 += 8; 1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempR = vsetq_lane_f32(*pIn2,tempR,0); 1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,0); 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempR = vsetq_lane_f32(*pIn2,tempR,1); 1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,1); 1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempR = vsetq_lane_f32(*pIn2,tempR,2); 1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,2); 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempR = vsetq_lane_f32(*pIn2,tempR,3); 1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,3); ARM GAS /tmp/cc6NnxTV.s page 75 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accR0 = vmlaq_f32(accR0,a0V.val[0],tempR); 1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accR0 = vmlsq_f32(accR0,a0V.val[1],tempI); 1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accI0 = vmlaq_f32(accI0,a0V.val[1],tempR); 1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accI0 = vmlaq_f32(accI0,a0V.val[0],tempI); 1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Decrement the loop count */ 1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt--; 1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accum = vpadd_f32(vget_low_f32(accR0), vget_high_f32(accR0)); 1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** accum = vpadd_f32(vget_low_f32(accI0), vget_high_f32(accI0)); 1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. 1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ** No loop unrolling is used. */ 1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt = numColsA & 3; 1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (colCnt > 0U) 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */ 1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** a1 = *pIn1; 1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** c1 = *pIn2; 1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** b1 = *(pIn1 + 1U); 1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** d1 = *(pIn2 + 1U); 1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal1 += a1 * c1; 1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag1 += b1 * c1; 1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1 += 2U; 1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal2 -= b1 * d1; 1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag2 += a1 * d1; 1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Decrement the loop counter */ 1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt--; 1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal1 += sumReal2; 1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag1 += sumImag2; 1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Store the result in the destination buffer */ 1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** *px++ = sumReal1; 1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** *px++ = sumImag1; 1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Update the pointer pIn2 to point to the starting address of the next column */ 1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** j++; 1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 = pSrcB->pData + 2U * j; 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Decrement the column loop counter */ 1162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** col--; ARM GAS /tmp/cc6NnxTV.s page 76 1163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Update the pointer pInA to point to the starting address of the next row */ 1167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** i = i + numColsB; 1168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInA = pInA + 2 * numColsA; 1169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Decrement the row loop counter */ 1171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** rowCnt--; 1172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 1176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** status = ARM_MATH_SUCCESS; 1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Return to application */ 1180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** return (status); 1181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #else 1183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** arm_status arm_mat_cmplx_mult_f32( 1184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** const arm_matrix_instance_f32 * pSrcA, 1185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** const arm_matrix_instance_f32 * pSrcB, 1186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** arm_matrix_instance_f32 * pDst) 1187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 259 .loc 5 1187 0 260 .cfi_startproc 261 @ args = 0, pretend = 0, frame = 0 262 @ frame_needed = 0, uses_anonymous_args = 0 263 .LVL34: 264 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} 265 .LCFI6: 266 .cfi_def_cfa_offset 32 267 .cfi_offset 4, -32 268 .cfi_offset 5, -28 269 .cfi_offset 6, -24 270 .cfi_offset 7, -20 271 .cfi_offset 8, -16 272 .cfi_offset 9, -12 273 .cfi_offset 10, -8 274 .cfi_offset 14, -4 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ 1189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ 1190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ 1191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pOut = pDst->pData; /* Output data matrix pointer */ 1192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *px; /* Temporary output data matrix pointer */ 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ 1194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 1195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ 1196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t sumReal, sumImag; /* Accumulator */ 1197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t a1, b1, c1, d1; 1198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */ 1199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** arm_status status; /* status of matrix multiplication */ 1200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t a0, b0, c0, d0; 1203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #endif ARM GAS /tmp/cc6NnxTV.s page 77 1204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 1206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Check for matrix mismatch condition */ 1208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** if ((pSrcA->numCols != pSrcB->numRows) || 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** (pSrcA->numRows != pDst->numRows) || 1210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** (pSrcB->numCols != pDst->numCols) ) 1211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 1213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 1214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** else 1216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 1218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 1220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB * 1221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* row loop */ 1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** do 1223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 1224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Output pointer is set to starting address of the row being processed */ 1225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** px = pOut + 2 * i; 1226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* For every row wise process, the column loop counter is to be initiated */ 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** col = numColsB; 275 .loc 5 1228 0 276 0004 4C88 ldrh r4, [r1, #2] 1229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* For every row wise process, the pIn2 pointer is set 1231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ** to the starting address of the pSrcB data */ 1232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 = pSrcB->pData; 1233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** j = 0U; 1235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* column loop */ 1237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** do 1238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 1239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Set the variable sum, that acts as accumulator, to zero */ 1240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal = 0.0f; 1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag = 0.0f; 1242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Initiate pointer pIn1 to point to starting address of column being processed */ 1244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1 = pInA; 1245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 1247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 1249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt = numColsA >> 2U; 1250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* matrix multiplication */ 1252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (colCnt > 0U) 1253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 1254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Reading real part of complex matrix A */ 1256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** a0 = *pIn1; 1257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Reading real part of complex matrix B */ ARM GAS /tmp/cc6NnxTV.s page 78 1259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** c0 = *pIn2; 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Reading imaginary part of complex matrix A */ 1262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** b0 = *(pIn1 + 1U); 1263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Reading imaginary part of complex matrix B */ 1265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** d0 = *(pIn2 + 1U); 1266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Multiply and Accumlates */ 1268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal += a0 * c0; 1269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += b0 * c0; 1270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* update pointers */ 1272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1 += 2U; 1273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 1274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Multiply and Accumlates */ 1276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal -= b0 * d0; 1277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += a0 * d0; 1278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 1280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* read real and imag values from pSrcA and pSrcB buffer */ 1282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** a1 = *(pIn1 ); 1283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** c1 = *(pIn2 ); 1284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** b1 = *(pIn1 + 1U); 1285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** d1 = *(pIn2 + 1U); 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Multiply and Accumlates */ 1288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal += a1 * c1; 1289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += b1 * c1; 1290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* update pointers */ 1292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1 += 2U; 1293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 1294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Multiply and Accumlates */ 1296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal -= b1 * d1; 1297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += a1 * d1; 1298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** a0 = *(pIn1 ); 1300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** c0 = *(pIn2 ); 1301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** b0 = *(pIn1 + 1U); 1302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** d0 = *(pIn2 + 1U); 1303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Multiply and Accumlates */ 1305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal += a0 * c0; 1306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += b0 * c0; 1307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* update pointers */ 1309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1 += 2U; 1310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 1311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Multiply and Accumlates */ 1313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal -= b0 * d0; 1314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += a0 * d0; 1315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 79 1316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 1317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** a1 = *(pIn1 ); 1319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** c1 = *(pIn2 ); 1320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** b1 = *(pIn1 + 1U); 1321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** d1 = *(pIn2 + 1U); 1322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Multiply and Accumlates */ 1324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal += a1 * c1; 1325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += b1 * c1; 1326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* update pointers */ 1328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1 += 2U; 1329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 1330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Multiply and Accumlates */ 1332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal -= b1 * d1; 1333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += a1 * d1; 1334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Decrement loop count */ 1336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt--; 1337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. 1340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** ** No loop unrolling is used. */ 1341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt = numColsA % 0x4U; 1342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #else 1344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Initialize blkCnt with number of samples */ 1346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt = numColsA; 277 .loc 5 1346 0 278 0006 4788 ldrh r7, [r0, #2] 279 0008 4368 ldr r3, [r0, #4] 280 000a 5268 ldr r2, [r2, #4] 281 .LVL35: 1189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ 282 .loc 5 1189 0 283 000c D1F80490 ldr r9, [r1, #4] 284 .LVL36: 1198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** arm_status status; /* status of matrix multiplication */ 285 .loc 5 1198 0 286 0010 0088 ldrh r0, [r0] 287 .LVL37: 1347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 1349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** while (colCnt > 0U) 1351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 1352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 1353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** a1 = *(pIn1 ); 1354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** c1 = *(pIn2 ); 1355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** b1 = *(pIn1 + 1U); 1356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** d1 = *(pIn2 + 1U); 1357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Multiply and Accumlates */ 1359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal += a1 * c1; ARM GAS /tmp/cc6NnxTV.s page 80 1360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += b1 * c1; 1361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* update pointers */ 1363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn1 += 2U; 1364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 += 2 * numColsB; 288 .loc 5 1364 0 289 0012 E400 lsls r4, r4, #3 290 0014 02F10808 add r8, r2, #8 291 0018 09EB040E add lr, r9, r4 1365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Multiply and Accumlates */ 1367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumReal -= b1 * d1; 1368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += a1 * d1; 1369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Decrement loop counter */ 1371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** colCnt--; 1372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Store result in destination buffer */ 1375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** *px++ = sumReal; 1376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** *px++ = sumImag; 1377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Update pointer pIn2 to point to starting address of next column */ 1379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** j++; 1380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pIn2 = pSrcB->pData + 2U * j; 1381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Decrement column loop counter */ 1383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** col--; 1384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } while (col > 0U); 1386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Update pointer pInA to point to starting address of next row */ 1388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** i = i + numColsB; 1389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** pInA = pInA + 2 * numColsA; 292 .loc 5 1389 0 293 001c 4FEAC70A lsl r10, r7, #3 294 0020 03F1080C add ip, r3, #8 295 .LVL38: 296 .L30: 1187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** float32_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ 297 .loc 5 1187 0 298 0024 4546 mov r5, r8 1232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 299 .loc 5 1232 0 300 0026 4E46 mov r6, r9 301 .LVL39: 302 .L29: 1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 303 .loc 5 1241 0 304 0028 9FED175A vldr.32 s10, .L36 1240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag = 0.0f; 305 .loc 5 1240 0 306 002c F0EE454A vmov.f32 s9, s10 1350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 307 .loc 5 1350 0 308 0030 DFB1 cbz r7, .L27 309 0032 6246 mov r2, ip ARM GAS /tmp/cc6NnxTV.s page 81 310 0034 3946 mov r1, r7 311 0036 3346 mov r3, r6 312 .LVL40: 313 .L28: 1353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** c1 = *(pIn2 ); 314 .loc 5 1353 0 315 0038 12ED026A vldr.32 s12, [r2, #-8] 316 .LVL41: 1356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 317 .loc 5 1356 0 318 003c D3ED017A vldr.32 s15, [r3, #4] 1355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** d1 = *(pIn2 + 1U); 319 .loc 5 1355 0 320 0040 52ED015A vldr.32 s11, [r2, #-4] 1354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** b1 = *(pIn1 + 1U); 321 .loc 5 1354 0 322 0044 D3ED006A vldr.32 s13, [r3] 323 .LVL42: 1368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 324 .loc 5 1368 0 325 0048 26EE277A vmul.f32 s14, s12, s15 1367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += a1 * d1; 326 .loc 5 1367 0 327 004c 67EEE57A vnmul.f32 s15, s15, s11 328 .LVL43: 1368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 329 .loc 5 1368 0 330 0050 A6EEA57A vfma.f32 s14, s13, s11 1350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 331 .loc 5 1350 0 332 0054 0139 subs r1, r1, #1 333 .LVL44: 334 0056 02F10802 add r2, r2, #8 335 .LVL45: 1367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += a1 * d1; 336 .loc 5 1367 0 337 005a E6EE267A vfma.f32 s15, s12, s13 1364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 338 .loc 5 1364 0 339 005e 2344 add r3, r3, r4 340 .LVL46: 1368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 341 .loc 5 1368 0 342 0060 35EE075A vadd.f32 s10, s10, s14 343 .LVL47: 1367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** sumImag += a1 * d1; 344 .loc 5 1367 0 345 0064 74EEA74A vadd.f32 s9, s9, s15 346 .LVL48: 1350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** { 347 .loc 5 1350 0 348 0068 E6D1 bne .L28 349 .LVL49: 350 .L27: 351 006a 0836 adds r6, r6, #8 1385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 352 .loc 5 1385 0 ARM GAS /tmp/cc6NnxTV.s page 82 353 006c 7645 cmp r6, lr 1375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** *px++ = sumImag; 354 .loc 5 1375 0 355 006e 45ED024A vstr.32 s9, [r5, #-8] 356 .LVL50: 1376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 357 .loc 5 1376 0 358 0072 05ED015A vstr.32 s10, [r5, #-4] 359 .LVL51: 360 0076 05F10805 add r5, r5, #8 361 .LVL52: 1385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 362 .loc 5 1385 0 363 007a D5D1 bne .L29 364 .LVL53: 1390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Decrement row loop counter */ 1392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** row--; 1393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } while (row > 0U); 365 .loc 5 1394 0 366 007c 0138 subs r0, r0, #1 367 .LVL54: 368 007e A044 add r8, r8, r4 369 0080 D444 add ip, ip, r10 370 .LVL55: 371 0082 CFD1 bne .L30 1395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 1397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** status = ARM_MATH_SUCCESS; 1398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 1399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** 1400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** /* Return to application */ 1401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** return (status); 1402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c **** } 372 .loc 5 1402 0 373 0084 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} 374 .LVL56: 375 .L37: 376 .align 2 377 .L36: 378 0088 00000000 .word 0 379 .cfi_endproc 380 .LFE151: 382 .section .text.arm_mat_cmplx_mult_q15,"ax",%progbits 383 .align 1 384 .p2align 2,,3 385 .global arm_mat_cmplx_mult_q15 386 .syntax unified 387 .thumb 388 .thumb_func 389 .fpu fpv4-sp-d16 391 arm_mat_cmplx_mult_q15: 392 .LFB152: 393 .file 6 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Project: CMSIS DSP Library ARM GAS /tmp/cc6NnxTV.s page 83 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Title: arm_cmplx_mat_mult_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Description: Q15 complex matrix multiplication 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** @addtogroup CmplxMatrixMult 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** @brief Q15 Complex matrix multiplication. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** @param[in] pSrcA points to first input complex matrix structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** @param[in] pSrcB points to second input complex matrix structure 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** @param[out] pDst points to output complex matrix structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** @param[in] pScratch points to an array for storing intermediate results 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** @return execution status 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** @par Conditions for optimum performance 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** Input, output and state buffers should be aligned by 32-bit 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** @par Scaling and Overflow Behavior 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** The function is implemented using an internal 64-bit accumulator. The inputs to 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** multiplications are in 1.15 format and multiplications yield a 2.30 result. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 f 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** This approach provides 33 guard bits and there is no risk of overflow. The 34.30 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** truncated to 34.15 format by discarding the low 15 bits and then saturated to 1. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ ARM GAS /tmp/cc6NnxTV.s page 84 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #if defined(ARM_MATH_MVEI) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #define MVE_ASRL_SAT16(acc, shift) ((sqrshrl_sat48(acc, -(32-shift)) >> 32) & 0xffffffff) 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** arm_status arm_mat_cmplx_mult_q15( 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** const arm_matrix_instance_q15 * pSrcA, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** const arm_matrix_instance_q15 * pSrcB, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** arm_matrix_instance_q15 * pDst, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t * pScratch) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t const *pInA = (q15_t const *) pSrcA->pData; /* input data matrix pointer A of Q15 type 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t const *pInB = (q15_t const *) pSrcB->pData; /* input data matrix pointer B of Q15 type 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t const *pInB2; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t *px; /* Temporary output data matrix pointer */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint32_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint32_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint32_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint32_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint32_t col, i = 0u, j, row = numRowsB; /* loop counters */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint32_t blkCnt; /* loop counters */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint16x8_t vecOffs, vecColBOffs; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** arm_status status; /* Status of matrix multiplication */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** (void)pScratch; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Check for matrix mismatch condition */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** if ((pSrcA->numCols != pSrcB->numRows) || 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** (pSrcA->numRows != pDst->numRows) || 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** (pSrcB->numCols != pDst->numCols) ) 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** else 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecColBOffs[0] = 0; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecColBOffs[1] = 1; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecColBOffs[2] = numColsB * CMPLX_DIM; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecColBOffs[3] = (numColsB * CMPLX_DIM) + 1; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecColBOffs[4] = 2 * numColsB * CMPLX_DIM; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecColBOffs[5] = 2 * (numColsB * CMPLX_DIM) + 1; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecColBOffs[6] = 3 * numColsB * CMPLX_DIM; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecColBOffs[7] = 3 * (numColsB * CMPLX_DIM) + 1; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Reset the variables for the usage in the following multiplication process 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** i = 0; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** row = numRowsA; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** px = pDst->pData; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB ARM GAS /tmp/cc6NnxTV.s page 85 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * row loop 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** while (row > 0u) 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * For every row wise process, the column loop counter is to be initiated 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** col = numColsB >> 1; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** j = 0; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * column loop 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** while (col > 0u) 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t const *pSrcAVec; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** //, *pSrcBVec, *pSrcB2Vec; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15x8_t vecA, vecB, vecB2; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q63_t acc0, acc1, acc2, acc3; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Initiate the pointer pIn1 to point to the starting address of the column being proce 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pInA = pSrcA->pData + i; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pInB = pSrcB->pData + j; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pInB2 = pInB + CMPLX_DIM; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** j += 2 * CMPLX_DIM; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Decrement the column loop counter 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** col--; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Initiate the pointers 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * - current Matrix A rows 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * - 2 x consecutive Matrix B' rows (j increment is 2 x numRowsB) 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pSrcAVec = (q15_t const *) pInA; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc0 = 0LL; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc1 = 0LL; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc2 = 0LL; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc3 = 0LL; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecOffs = vecColBOffs; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** blkCnt = (numColsA * CMPLX_DIM) >> 3; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** while (blkCnt > 0U) 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecA = vld1q(pSrcAVec); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pSrcAVec += 8; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecB = vldrhq_gather_shifted_offset(pInB, vecOffs); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 86 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc0 = vmlsldavaq(acc0, vecA, vecB); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc1 = vmlaldavaxq(acc1, vecA, vecB); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecB2 = vldrhq_gather_shifted_offset(pInB2, vecOffs); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * move Matrix B read offsets, 4 rows down 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecOffs = vaddq(vecOffs, (uint16_t) (numColsB * 4 * CMPLX_DIM)); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc2 = vmlsldavaq(acc2, vecA, vecB2); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc3 = vmlaldavaxq(acc3, vecA, vecB2); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** blkCnt--; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * tail 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** blkCnt = (numColsA * CMPLX_DIM) & 7; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** if (blkCnt > 0U) 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecB = vldrhq_gather_shifted_offset(pInB, vecOffs); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecA = vldrhq_z_s16(pSrcAVec, p0); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc0 = vmlsldavaq(acc0, vecA, vecB); 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc1 = vmlaldavaxq(acc1, vecA, vecB); 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecB2 = vldrhq_gather_shifted_offset(pInB2, vecOffs); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * move Matrix B read offsets, 4 rows down 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecOffs = vaddq(vecOffs, (uint16_t) (numColsB * 4 * CMPLX_DIM)); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc2 = vmlsldavaq(acc2, vecA, vecB2); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc3 = vmlaldavaxq(acc3, vecA, vecB2); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Convert to 1.15, Store the results (1 x 2 block) in the destination buffer 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t)MVE_ASRL_SAT16(acc0, 15); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t)MVE_ASRL_SAT16(acc1, 15); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t)MVE_ASRL_SAT16(acc2, 15); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t)MVE_ASRL_SAT16(acc3, 15); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** col = numColsB & 1; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * column loop 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** while (col > 0u) 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t const *pSrcAVec; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** //, *pSrcBVec, *pSrcB2Vec; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15x8_t vecA, vecB; ARM GAS /tmp/cc6NnxTV.s page 87 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q63_t acc0, acc1; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Initiate the pointer pIn1 to point to the starting address of the column being proce 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pInA = pSrcA->pData + i; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pInB = pSrcB->pData + j; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** j += CMPLX_DIM; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Decrement the column loop counter 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** col--; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Initiate the pointers 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * - current Matrix A rows 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * - 2 x consecutive Matrix B' rows (j increment is 2 x numRowsB) 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pSrcAVec = (q15_t const *) pInA; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc0 = 0LL; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc1 = 0LL; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecOffs = vecColBOffs; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** blkCnt = (numColsA * CMPLX_DIM) >> 3; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** while (blkCnt > 0U) 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecA = vld1q(pSrcAVec); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pSrcAVec += 8; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecB = vldrhq_gather_shifted_offset(pInB, vecOffs); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc0 = vmlsldavaq(acc0, vecA, vecB); 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc1 = vmlaldavaxq(acc1, vecA, vecB); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * move Matrix B read offsets, 4 rows down 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecOffs = vaddq(vecOffs, (uint16_t) (numColsB * 4 * CMPLX_DIM)); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** blkCnt--; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * tail 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** blkCnt = (numColsA * CMPLX_DIM) & 7; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** if (blkCnt > 0U) 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecB = vldrhq_gather_shifted_offset(pInB, vecOffs); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** vecA = vldrhq_z_s16(pSrcAVec, p0); 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc0 = vmlsldavaq(acc0, vecA, vecB); ARM GAS /tmp/cc6NnxTV.s page 88 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** acc1 = vmlaldavaxq(acc1, vecA, vecB); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Convert to 1.15, Store the results (1 x 2 block) in the destination buffer 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t)MVE_ASRL_SAT16(acc0, 15); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t)MVE_ASRL_SAT16(acc1, 15); 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** i = i + numColsA * CMPLX_DIM; 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** * Decrement the row loop counter 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** row--; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** status = ARM_MATH_SUCCESS; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Return to application */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** return (status); 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #else 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** arm_status arm_mat_cmplx_mult_q15( 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** const arm_matrix_instance_q15 * pSrcA, 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** const arm_matrix_instance_q15 * pSrcB, 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** arm_matrix_instance_q15 * pDst, 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t * pScratch) 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 394 .loc 6 320 0 395 .cfi_startproc 396 @ args = 0, pretend = 0, frame = 56 397 @ frame_needed = 0, uses_anonymous_args = 0 398 .LVL57: 399 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 400 .LCFI7: 401 .cfi_def_cfa_offset 36 402 .cfi_offset 4, -36 403 .cfi_offset 5, -32 404 .cfi_offset 6, -28 405 .cfi_offset 7, -24 406 .cfi_offset 8, -20 407 .cfi_offset 9, -16 408 .cfi_offset 10, -12 409 .cfi_offset 11, -8 410 .cfi_offset 14, -4 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t *pSrcBT = pScratch; /* input data matrix pointer for transpose * 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type * 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type * 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t *px; /* Temporary output data matrix pointer */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ ARM GAS /tmp/cc6NnxTV.s page 89 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q63_t sumReal, sumImag; /* accumulator */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint32_t col, i = 0U, row = numRowsB, colCnt; /* Loop counters */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** arm_status status; /* Status of matrix multiplication */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #if defined (ARM_MATH_DSP) 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q31_t prod1, prod2; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q31_t pSourceA, pSourceB; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #else 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t a, b, c, d; 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Check for matrix mismatch condition */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** if ((pSrcA->numCols != pSrcB->numRows) || 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** (pSrcA->numRows != pDst->numRows) || 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** (pSrcB->numCols != pDst->numCols) ) 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** else 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Matrix transpose */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** do 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* The pointer px is set to starting address of column being processed */ 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** px = pSrcBT + i; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Apply loop unrolling and exchange the columns with row elements */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** col = numColsB >> 2; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** a second loop below computes the remaining 1 to 3 samples. */ 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** while (col > 0U) 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Read two elements from row */ 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** write_q15x2 (px, read_q15x2_ia (&pInB)); 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Update pointer px to point to next row of transposed matrix */ 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** px += numRowsB * 2; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Read two elements from row */ 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** write_q15x2 (px, read_q15x2_ia (&pInB)); 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Update pointer px to point to next row of transposed matrix */ 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** px += numRowsB * 2; 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Read two elements from row */ 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** write_q15x2 (px, read_q15x2_ia (&pInB)); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 90 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Update pointer px to point to next row of transposed matrix */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** px += numRowsB * 2; 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Read two elements from row */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** write_q15x2 (px, read_q15x2_ia (&pInB)); 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Update pointer px to point to next row of transposed matrix */ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** px += numRowsB * 2; 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Decrement column loop counter */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** col--; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** ** No loop unrolling is used. */ 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** col = numColsB % 0x4U; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #else 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Initialize blkCnt with number of samples */ 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** col = numColsB; 411 .loc 6 405 0 412 0004 4C88 ldrh r4, [r1, #2] 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** arm_status status; /* Status of matrix multiplication */ 413 .loc 6 330 0 414 0006 0F88 ldrh r7, [r1] 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t *px; /* Temporary output data matrix pointer */ 415 .loc 6 323 0 416 0008 D1F80480 ldr r8, [r1, #4] 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ 417 .loc 6 325 0 418 000c B0F800C0 ldrh ip, [r0] 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ 419 .loc 6 327 0 420 0010 4588 ldrh r5, [r0, #2] 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t *pSrcBT = pScratch; /* input data matrix pointer for transpose * 421 .loc 6 320 0 422 0012 8FB0 sub sp, sp, #60 423 .LCFI8: 424 .cfi_def_cfa_offset 96 425 .loc 6 405 0 426 0014 0994 str r4, [sp, #36] 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** q15_t *pSrcBT = pScratch; /* input data matrix pointer for transpose * 427 .loc 6 320 0 428 0016 0A93 str r3, [sp, #40] 429 .LVL58: 430 0018 002C cmp r4, #0 431 001a 00F0A380 beq .L60 432 001e BF00 lsls r7, r7, #2 433 0020 9E46 mov lr, r3 434 0022 07EB0309 add r9, r7, r3 435 0026 A300 lsls r3, r4, #2 436 .LVL59: 437 0028 0D93 str r3, [sp, #52] 438 002a A246 mov r10, r4 439 002c 9B46 mov fp, r3 440 .LVL60: ARM GAS /tmp/cc6NnxTV.s page 91 441 .L41: 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 442 .loc 6 359 0 443 002e 7146 mov r1, lr 444 .LVL61: 445 0030 4446 mov r4, r8 446 0032 5346 mov r3, r10 447 .LVL62: 448 .L40: 449 .LBB121: 450 .LBB122: 451 .file 7 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /****************************************************************************** 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @file arm_math.h 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Public header file for CMSIS DSP Library 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @version V1.7.0 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @date 18. March 2019 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ******************************************************************************/ 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved. 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * SPDX-License-Identifier: Apache-2.0 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * not use this file except in compliance with the License. 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * You may obtain a copy of the License at 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * www.apache.org/licenses/LICENSE-2.0 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Unless required by applicable law or agreed to in writing, software 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * See the License for the specific language governing permissions and 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * limitations under the License. 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \mainpage CMSIS DSP Software Library 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Introduction 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This user manual describes the CMSIS DSP software library, 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * a suite of common signal processing functions for use on Cortex-M and Cortex-A processor 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * based devices. 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is divided into a number of functions each covering a specific category: 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Basic math functions 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Fast math functions 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Complex math functions 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Filtering functions 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Matrix functions 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Transform functions 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Motor control functions 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Statistical functions 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support functions 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Interpolation functions ARM GAS /tmp/cc6NnxTV.s page 92 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support Vector Machine functions (SVM) 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Bayes classifier functions 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Distance functions 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library has generally separate functions for operating on 8-bit integers, 16-bit integers, 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 32-bit integer and 32-bit floating-point values. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Using the Library 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains prebuilt versions of the libraries in the Lib fold 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Here is the list of pre-built libraries : 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfdp_math.lib (Cortex-M7, Little endian, Double Precision Floating Point Unit) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfdp_math.lib (Cortex-M7, Big endian, Double Precision Floating Point Unit) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfsp_math.lib (Cortex-M7, Little endian, Single Precision Floating Point Unit) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfsp_math.lib (Cortex-M7, Big endian and Single Precision Floating Point Unit on 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7l_math.lib (Cortex-M7, Little endian) 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7b_math.lib (Cortex-M7, Big endian) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4lf_math.lib (Cortex-M4, Little endian, Floating Point Unit) 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4bf_math.lib (Cortex-M4, Big endian, Floating Point Unit) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4l_math.lib (Cortex-M4, Little endian) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4b_math.lib (Cortex-M4, Big endian) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3l_math.lib (Cortex-M3, Little endian) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3b_math.lib (Cortex-M3, Big endian) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0l_math.lib (Cortex-M0 / Cortex-M0+, Little endian) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0b_math.lib (Cortex-M0 / Cortex-M0+, Big endian) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MBLl_math.lib (Armv8-M Baseline, Little endian) 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLl_math.lib (Armv8-M Mainline, Little endian) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLlfsp_math.lib (Armv8-M Mainline, Little endian, Single Precision Floating Point 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLld_math.lib (Armv8-M Mainline, Little endian, DSP instructions) 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precis 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library functions are declared in the public file arm_math.h which is placed 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Simply include this file and link the appropriate library in the application and begin calling 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * public header file arm_math.h for Cortex-M cores with little endian and big endi 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Examples 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * -------- 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library ships with a number of examples which demonstrate how to use the library functions 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Toolchain Support 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is now tested on Fast Models building with cmake. 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Core M0, M7, A5 are tested. 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Building the Library 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains a project file to rebuild libraries on MDK toolchain in the 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * CMSIS-DSP in ARM::CMSIS Pack ARM GAS /tmp/cc6NnxTV.s page 94 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ----------------------------- 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directorie 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |File/Folder |Content 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |---------------------------------|----------------------------------------------------------- 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\Documentation\\DSP | This documentation 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\DSP_Lib_TestSuite | DSP_Lib test suite 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Examples | Example projects demonstrating the usage of the library fu 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Include | DSP_Lib include files 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Lib | DSP_Lib binaries 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Projects | Projects to rebuild DSP_Lib binaries 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Source | DSP_Lib source files 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Revision History of CMSIS-DSP 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Please refer to \ref ChangeLog_pg. 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMath Basic Math Functions 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFastMath Fast Math Functions 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides a fast approximation to sine, cosine, and square root. 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * As compared to most of the other functions in the CMSIS math library, the fast math functions 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * operate on individual values and not arrays. 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are separate functions for Q15, Q31, and floating-point data. 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupCmplxMath Complex Math Functions 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions operates on complex data vectors. 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The data in the complex arrays is stored in an interleaved fashion 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * (real, imag, real, imag, ...). 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In the API functions, the number of samples in a complex array refers 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the number of complex values; the array contains twice this number of 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * real values. 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFilters Filtering Functions 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMatrix Matrix Functions 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides basic matrix math operations. 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The functions operate on matrix data structures. For example, 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the type 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * definition for the floating-point matrix structure is shown 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * below: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     typedef struct
ARM GAS  /tmp/cc6NnxTV.s 			page 95


 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     {
 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *       uint16_t numRows;     // number of rows of the matrix.
 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *       uint16_t numCols;     // number of columns of the matrix.
 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *       float32_t *pData;     // points to the data of the matrix.
 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     } arm_matrix_instance_f32;
 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are similar definitions for Q15 and Q31 data types. 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The structure specifies the size of the matrix and then points to 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * an array of data. The array is of size numRows X numCols 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and the values are arranged in row order. That is, the 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * matrix element (i, j) is stored at: 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     pData[i*numCols + j]
 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Init Functions 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is an associated initialization function for each type of matrix 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data structure. 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The initialization function sets the values of the internal structure fields. 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15() 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * for floating-point, Q31 and Q15 types, respectively. 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Use of the initialization function is optional. However, if initialization function is used 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * then the instance structure cannot be placed into a const data section. 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * To place the instance structure in a const data 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * section, manually initialize the data structure. For example: 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  * arm_matrix_instance_f32 S = {nRows, nColumns, pData};
 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  * arm_matrix_instance_q31 S = {nRows, nColumns, pData};
 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  * arm_matrix_instance_q15 S = {nRows, nColumns, pData};
 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where nRows specifies the number of rows, nColumns 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * specifies the number of columns, and pData points to the 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data array. 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Size Checking 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * By default all of the matrix functions perform size checking on the input and 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * output matrices. For example, the matrix addition function verifies that the 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * two input matrices and the output matrix all have the same number of rows and 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * columns. If the size check fails the functions return: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     ARM_MATH_SIZE_MISMATCH
 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Otherwise the functions return 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     ARM_MATH_SUCCESS
 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is some overhead associated with this matrix size checking. 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The matrix size checking is enabled via the \#define 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     ARM_MATH_MATRIX_CHECK
 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * within the library project settings. By default this macro is defined 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and size checking is enabled. By changing the project settings and 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * undefining this macro size checking is eliminated and the functions ARM GAS /tmp/cc6NnxTV.s page 96 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * run a bit faster. With size checking disabled the functions always 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * return ARM_MATH_SUCCESS. 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupTransforms Transform Functions 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupController Controller Functions 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupStats Statistics Functions 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSupport Support Functions 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupInterpolation Interpolation Functions 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * These functions perform 1- and 2-dimensional interpolation of data. 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Linear interpolation is used for 1-dimensional data and 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * bilinear interpolation is used for 2-dimensional data. 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupExamples Examples 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSVM SVM Functions 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions is implementing SVM classification on 2 classes. 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn. The parameters can be easily 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/SVM.py 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If more than 2 classes are needed, the functions in this folder 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * will have to be used, as building blocks, to do multi-class classification. 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * No multi-class classification is provided in this SVM folder. 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupBayes Bayesian estimators 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Implement the naive gaussian Bayes estimator. 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn. 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The parameters can be easily 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/Bayes.py 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/cc6NnxTV.s page 97 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupDistance Distance functions 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Distance functions for use with clustering algorithms. 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are distance functions for float vectors and boolean vectors. 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef _ARM_MATH_H 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _ARM_MATH_H 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __cplusplus 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** extern "C" 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Compiler specific diagnostic adjustment */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM ) 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 ) 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ ) 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic push 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wconversion" 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ ) 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ ) 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ ) 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ ) 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( _MSC_VER ) 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Included for instrinsics definitions */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (_MSC_VER ) 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __forceinline 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __inline 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __declspec(align(x)) 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined (__GNUC_PYTHON__) 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __attribute__((inline)) 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __attribute__((inline)) 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-function" 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wattributes" ARM GAS /tmp/cc6NnxTV.s page 98 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include "cmsis_compiler.h" 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MAX ((float64_t)DBL_MAX) 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MAX ((float32_t)FLT_MAX) 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MAX ((float16_t)FLT_MAX) 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MIN (-DBL_MAX) 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MIN (-FLT_MAX) 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MIN (-(float16_t)FLT_MAX) 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMAX ((float64_t)DBL_MAX) 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMAX ((float32_t)FLT_MAX) 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMAX ((float16_t)FLT_MAX) 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMIN ((float64_t)0.0) 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMIN ((float32_t)0.0) 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMIN ((float16_t)0.0) 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MAX ((q31_t)(0x7FFFFFFFL)) 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MAX ((q15_t)(0x7FFF)) 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MAX ((q7_t)(0x7F)) 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MIN ((q31_t)(0x80000000L)) 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MIN ((q15_t)(0x8000)) 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MIN ((q7_t)(0x80)) 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMAX ((q31_t)(0x7FFFFFFFL)) 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMAX ((q15_t)(0x7FFF)) 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMAX ((q7_t)(0x7F)) 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMIN ((q31_t)0) 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMIN ((q15_t)0) 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMIN ((q7_t)0) 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* evaluate ARM DSP feature */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) ARM GAS /tmp/cc6NnxTV.s page 99 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_DSP 1 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM) 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEF 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_MVEF) 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEI 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI) 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for reciprocal calculation in Normalized LMS 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q31 ((q31_t)(0x100)) 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q15 ((q15_t)0x5) 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INDEX_MASK 0x0000003F 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef PI 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define PI 3.14159265358979f 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Fast math approximations 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_TABLE_SIZE 512 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q31_SHIFT (32 - 10) 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q15_SHIFT (16 - 10) 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CONTROLLER_Q31_SHIFT (32 - 9) 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q31 0x400000 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q15 0x80 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Controller functions 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31(q31) Fixed value of 2/360 */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* -1 to +1 is divided into 360 values so total spacing is (2/360) */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INPUT_SPACING 0xB60B61 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros for complex numbers 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Dimension C vector space */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CMPLX_DIM 2 ARM GAS /tmp/cc6NnxTV.s page 100 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Error status returned by some functions in the library. 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SUCCESS = 0, /**< No error */ 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SINGULAR = -5, /**< Input matrix is singular and cannot be inverted */ 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_status; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional data type in 1.7 format. 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8_t q7_t; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional data type in 1.15 format. 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16_t q15_t; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 1.31 format. 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q31_t; 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional data type in 1.63 format. 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64_t q63_t; 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point type definition. 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float float32_t; 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit floating-point type definition. 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef double float64_t; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief vector types 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined (ARM_MATH_MVEI) 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional 128-bit vector data type in 1.63 format 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t q63x2_t; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 1.31 format. ARM GAS /tmp/cc6NnxTV.s page 101 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q31x4_t; 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector data type with 16-bit alignement in 1.15 format. 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x8_t q15x8_t; 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector data type with 8-bit alignement in 1.7 format. 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x16_t q7x16_t; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector pair data type in 1.31 format. 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x2_t q31x4x2_t; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector quadruplet data type in 1.31 format. 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x4_t q31x4x4_t; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector pair data type in 1.15 format. 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x2_t q15x8x2_t; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector quadruplet data type in 1.15 format. 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x4_t q15x8x4_t; 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector pair data type in 1.7 format. 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x2_t q7x16x2_t; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector quadruplet data type in 1.7 format. 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x4_t q7x16x4_t; 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 9.23 format. 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q23_t; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 9.23 format. 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q23x4_t; 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit status 128-bit vector data type. 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t status64x2_t; ARM GAS /tmp/cc6NnxTV.s page 102 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 128-bit vector data type. 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x4_t; 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 128-bit vector data type. 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x8_t; 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 128-bit vector data type. 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x16_t; 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF) /* floating point vector*/ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector type 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4_t f32x4_t; 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector data type 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x8_t f16x8_t; 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector pair data type 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x2_t f32x4x2_t; 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector quadruplet data type 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x4_t f32x4x4_t; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector pair data type 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x2_t f16x8x2_t; 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector quadruplet data type 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x4_t f16x8x4_t; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 128-bit vector data type 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/cc6NnxTV.s page 103 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x4_t 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x4_t f; 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x4_t i; 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x4_t; 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 128-bit vector data type 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x8_t 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x8_t f; 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x8_t i; 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x8_t; 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector data type in 1.31 format. 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2_t q31x2_t; 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector data type in 1.15 format. 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x4_t q15x4_t; 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector data type in 1.7 format. 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x8_t q7x8_t; 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit float 64-bit vector data type. 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2_t f32x2_t; 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit float 64-bit vector data type. 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x4_t f16x4_t; 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector triplet data type 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x3_t f32x4x3_t; 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector triplet data type 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x3_t f16x8x3_t; ARM GAS /tmp/cc6NnxTV.s page 104 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector triplet data type in 1.31 format 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x4x3_t; 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector triplet data type in 1.15 format 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x3_t q15x8x3_t; 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector triplet data type in 1.7 format 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x3_t q7x16x3_t; 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector pair data type 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x2_t f32x2x2_t; 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector triplet data type 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x3_t f32x2x3_t; 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector quadruplet data type 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x4_t f32x2x4_t; 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector pair data type 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x2_t f16x4x2_t; 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector triplet data type 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x3_t f16x4x3_t; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector quadruplet data type 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x4_t f16x4x4_t; 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector pair data type in 1.31 format 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x2_t q31x2x2_t; 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector triplet data type in 1.31 format 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/cc6NnxTV.s page 105 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x3_t q31x2x3_t; 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector quadruplet data type in 1.31 format 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x2x4_t; 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector pair data type in 1.15 format 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x2_t; 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector triplet data type in 1.15 format 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x3_t; 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector quadruplet data type in 1.15 format 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x3_t q15x4x4_t; 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector pair data type in 1.7 format 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x2_t q7x8x2_t; 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector triplet data type in 1.7 format 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x3_t q7x8x3_t; 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector quadruplet data type in 1.7 format 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x4_t q7x8x4_t; 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 64-bit vector data type 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x2_t 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x2_t f; 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x2_t i; 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x2_t; 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 64-bit vector data type 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x4_t 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x4_t f; 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x4_t i; 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x4_t; 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/cc6NnxTV.s page 106 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 64-bit vector data type. 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x2_t; 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 64-bit vector data type. 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x4_t; 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 64-bit vector data type. 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x8_t; 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief definition to read/write two 16 bit values. 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @deprecated 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM ) 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 ) 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ ) 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ ) 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ ) 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ ) 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ ) 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE __un(aligned) int32_t 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined(_MSC_VER ) 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr)) 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_CONST(addr) ( (__SIMD32_TYPE * ) (addr)) 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE * ) (addr)) 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD64(addr) (*( int64_t **) & (addr)) 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define STEP(x) (x) <= 0 ? 0 : 1 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define SQ(x) ((x) * (x)) 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* SIMD replacement */ 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer. 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value ARM GAS /tmp/cc6NnxTV.s page 107 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2 ( 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15) 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, pQ15, 4); 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = (pQ15[1] << 16) | (pQ15[0] & 0x0FFFF) ; 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and increment pointer afterwards. 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_ia ( 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15) 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4); 452 .loc 7 928 0 453 0034 54F8046B ldr r6, [r4], #4 @ unaligned 454 .LVL63: 455 .LBE122: 456 .LBE121: 457 .LBB123: 458 .LBB124: 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF); 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2; 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and decrement pointer afterwards. 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_da ( 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15) 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4); 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF); ARM GAS /tmp/cc6NnxTV.s page 108 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 -= 2; 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer and increment pointer afterwards. 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2_ia ( 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15, 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value) 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value; 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ15, &val, 4); 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[0] = (val & 0x0FFFF); 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[1] = (val >> 16) & 0x0FFFF; 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2; 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer. 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2 ( 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15, 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value) 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value; 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (pQ15, &val, 4); 459 .loc 7 991 0 460 0038 0E60 str r6, [r1] @ unaligned 461 .LVL64: 462 .LBE124: 463 .LBE123: 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** while (col > 0U) 464 .loc 6 409 0 465 003a 013B subs r3, r3, #1 466 .LVL65: 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Read two elements from row */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** write_q15x2 (px, read_q15x2_ia (&pInB)); 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 109 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Update pointer px to point to next row of transposed matrix */ 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** px += numRowsB * 2; 467 .loc 6 415 0 468 003c 3944 add r1, r1, r7 469 .LVL66: 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 470 .loc 6 409 0 471 003e F9D1 bne .L40 472 0040 0EF1040E add lr, lr, #4 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Decrement column loop counter */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** col--; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** i = i + 2U; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Decrement row loop counter */ 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** row--; 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } while (row > 0U); 473 .loc 6 426 0 474 0044 CE45 cmp lr, r9 475 0046 D844 add r8, r8, fp 476 0048 F1D1 bne .L41 477 .LVL67: 478 .L39: 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Reset variables for usage in following multiplication process */ 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** row = numRowsA; 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** i = 0U; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** px = pDst->pData; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB * 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* row loop */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** do 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* For every row wise process, column loop counter is to be initiated */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** col = numColsB; 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB da 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pInB = pSrcBT; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* column loop */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** do 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Set variable sum, that acts as accumulator, to zero */ 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumReal = 0; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumImag = 0; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Initiate pointer pInA to point to starting address of column being processed */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pInA = pSrcA->pData + i * 2; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Apply loop unrolling and compute 2 MACs simultaneously. */ 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** colCnt = numColsA >> 1U; 479 .loc 6 454 0 480 004a 4FEA550A lsr r10, r5, #1 481 004e 5268 ldr r2, [r2, #4] ARM GAS /tmp/cc6NnxTV.s page 110 482 .LVL68: 483 0050 4168 ldr r1, [r0, #4] 484 0052 CAEB4A73 rsb r3, r10, r10, lsl #29 485 0056 DB00 lsls r3, r3, #3 486 0058 4FEACA00 lsl r0, r10, #3 487 .LVL69: 488 005c 0432 adds r2, r2, #4 489 005e 0C93 str r3, [sp, #48] 490 0060 05F00103 and r3, r5, #1 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** i = 0U; 491 .loc 6 429 0 492 0064 CDE9072C strd r2, ip, [sp, #28] 493 .LVL70: 494 0068 0593 str r3, [sp, #20] 495 006a 0A18 adds r2, r1, r0 496 006c AB00 lsls r3, r5, #2 497 006e 0690 str r0, [sp, #24] 498 0070 0392 str r2, [sp, #12] 499 0072 0B93 str r3, [sp, #44] 500 .LVL71: 501 .L46: 502 0074 039B ldr r3, [sp, #12] 503 0076 0C9A ldr r2, [sp, #48] 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 504 .loc 6 359 0 505 0078 DDF81CC0 ldr ip, [sp, #28] 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 506 .loc 6 405 0 507 007c DDE9098E ldrd r8, lr, [sp, #36] 508 0080 1344 add r3, r3, r2 509 0082 0493 str r3, [sp, #16] 510 0084 C146 mov r9, r8 511 .LVL72: 512 .L45: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 513 .loc 6 448 0 514 0086 0020 movs r0, #0 515 0088 0021 movs r1, #0 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumImag = 0; 516 .loc 6 447 0 517 008a 0446 mov r4, r0 518 008c 0D46 mov r5, r1 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* matrix multiplication */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** while (colCnt > 0U) 519 .loc 6 457 0 520 008e BAF1000F cmp r10, #0 521 0092 65D0 beq .L47 522 0094 CDE90045 strd r4, [sp] 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 523 .loc 6 451 0 524 0098 049A ldr r2, [sp, #16] 525 .loc 6 457 0 526 009a CDF808C0 str ip, [sp, #8] 527 009e 7646 mov r6, lr 528 00a0 5746 mov r7, r10 529 .LVL73: ARM GAS /tmp/cc6NnxTV.s page 111 530 .L43: 531 .LBB125: 532 .LBB126: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 533 .loc 7 928 0 534 00a2 1368 ldr r3, [r2] @ unaligned 535 .LVL74: 536 .LBE126: 537 .LBE125: 538 .LBB127: 539 .LBB128: 540 00a4 D6F800B0 ldr fp, [r6] @ unaligned 541 .LVL75: 542 .LBE128: 543 .LBE127: 544 .LBB129: 545 .LBB130: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 546 .loc 3 2043 0 547 .syntax unified 548 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 549 00a8 43FB0BF8 smusd r8, r3, fp 550 @ 0 "" 2 551 .LVL76: 552 .thumb 553 .syntax unified 554 .LBE130: 555 .LBE129: 556 .LBB131: 557 .LBB132: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 558 .loc 3 1985 0 559 .syntax unified 560 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 561 00ac 23FB1BF3 smuadx r3, r3, fp 562 @ 0 "" 2 563 .LVL77: 564 .thumb 565 .syntax unified 566 .LBE132: 567 .LBE131: 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #if defined (ARM_MATH_DSP) 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* read real and imag values from pSrcA and pSrcB buffer */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pSourceA = read_q15x2_ia ((q15_t **) &pInA); 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pSourceB = read_q15x2_ia ((q15_t **) &pInB); 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Multiply and Accumlates */ 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** prod1 = -__SMUSD(pSourceA, pSourceB); 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #else 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** prod1 = __SMUSD(pSourceA, pSourceB); 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #endif 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** prod2 = __SMUADX(pSourceA, pSourceB); ARM GAS /tmp/cc6NnxTV.s page 112 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumReal += (q63_t) prod1; 568 .loc 6 474 0 569 00b0 DDE90045 ldrd r4, [sp] 570 00b4 14EB0804 adds r4, r4, r8 571 00b8 45EBE875 adc r5, r5, r8, asr #31 572 .LVL78: 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumImag += (q63_t) prod2; 573 .loc 6 475 0 574 00bc C018 adds r0, r0, r3 575 .LVL79: 576 00be 41EBE371 adc r1, r1, r3, asr #31 577 .LVL80: 578 .LBB133: 579 .LBB134: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 580 .loc 7 928 0 581 00c2 D6F804B0 ldr fp, [r6, #4] @ unaligned 582 .LBE134: 583 .LBE133: 584 .LBB135: 585 .LBB136: 586 00c6 5368 ldr r3, [r2, #4] @ unaligned 587 .LVL81: 588 00c8 0836 adds r6, r6, #8 589 .LVL82: 590 00ca 0832 adds r2, r2, #8 591 .LVL83: 592 .LBE136: 593 .LBE135: 594 .LBB137: 595 .LBB138: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 596 .loc 3 2043 0 597 .syntax unified 598 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 599 00cc 43FB0BF8 smusd r8, r3, fp 600 @ 0 "" 2 601 .LVL84: 602 .thumb 603 .syntax unified 604 .LBE138: 605 .LBE137: 606 .LBB139: 607 .LBB140: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 608 .loc 3 1985 0 609 .syntax unified 610 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 611 00d0 23FB1BF3 smuadx r3, r3, fp 612 @ 0 "" 2 613 .LVL85: 614 .thumb 615 .syntax unified 616 .LBE140: 617 .LBE139: 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* read real and imag values from pSrcA and pSrcB buffer */ ARM GAS /tmp/cc6NnxTV.s page 113 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pSourceA = read_q15x2_ia ((q15_t **) &pInA); 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pSourceB = read_q15x2_ia ((q15_t **) &pInB); 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Multiply and Accumlates */ 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** prod1 = -__SMUSD(pSourceA, pSourceB); 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #else 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** prod1 = __SMUSD(pSourceA, pSourceB); 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #endif 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** prod2 = __SMUADX(pSourceA, pSourceB); 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumReal += (q63_t) prod1; 618 .loc 6 488 0 619 00d4 14EB080B adds fp, r4, r8 620 00d8 45EBE87C adc ip, r5, r8, asr #31 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumImag += (q63_t) prod2; 621 .loc 6 489 0 622 00dc C418 adds r4, r0, r3 623 .LVL86: 624 00de 41EBE375 adc r5, r1, r3, asr #31 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 625 .loc 6 457 0 626 00e2 013F subs r7, r7, #1 627 .LVL87: 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumImag += (q63_t) prod2; 628 .loc 6 488 0 629 00e4 CDE900BC strd fp, [sp] 630 .LVL88: 631 .loc 6 489 0 632 00e8 2046 mov r0, r4 633 .LVL89: 634 00ea 2946 mov r1, r5 635 .LVL90: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 636 .loc 6 457 0 637 00ec D9D1 bne .L43 638 00ee 069B ldr r3, [sp, #24] 639 .LVL91: 640 00f0 6546 mov r5, ip 641 00f2 9E44 add lr, lr, r3 642 00f4 DDF808C0 ldr ip, [sp, #8] 643 00f8 039B ldr r3, [sp, #12] 644 00fa 5C46 mov r4, fp 645 .LVL92: 646 .L42: 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* read real and imag values from pSrcA buffer */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** a = *pInA; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** b = *(pInA + 1U); 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* read real and imag values from pSrcB buffer */ 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** c = *pInB; 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** d = *(pInB + 1U); 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Multiply and Accumlates */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumReal += (q31_t) a *c; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumImag += (q31_t) a *d; ARM GAS /tmp/cc6NnxTV.s page 114 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumReal -= (q31_t) b *d; 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumImag += (q31_t) b *c; 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* read next real and imag values from pSrcA buffer */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** a = *(pInA + 2U); 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** b = *(pInA + 3U); 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* read next real and imag values from pSrcB buffer */ 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** c = *(pInB + 2U); 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** d = *(pInB + 3U); 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* update pointer */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pInA += 4U; 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Multiply and Accumlates */ 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumReal += (q31_t) a * c; 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumImag += (q31_t) a * d; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumReal -= (q31_t) b * d; 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumImag += (q31_t) b * c; 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* update pointer */ 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pInB += 4U; 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Decrement loop counter */ 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** colCnt--; 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* process odd column samples */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** if ((numColsA & 0x1U) > 0U) 647 .loc 6 531 0 648 00fc 059A ldr r2, [sp, #20] 649 00fe 62B1 cbz r2, .L44 650 .LVL93: 651 .LBB141: 652 .LBB142: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 653 .loc 7 928 0 654 0100 1B68 ldr r3, [r3] @ unaligned 655 .LVL94: 656 .LBE142: 657 .LBE141: 658 .LBB143: 659 .LBB144: 660 0102 5EF8042B ldr r2, [lr], #4 @ unaligned 661 .LVL95: 662 .LBE144: 663 .LBE143: 664 .LBB145: 665 .LBB146: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 666 .loc 3 2043 0 667 .syntax unified 668 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 669 0106 43FB02F6 smusd r6, r3, r2 670 @ 0 "" 2 671 .LVL96: 672 .thumb ARM GAS /tmp/cc6NnxTV.s page 115 673 .syntax unified 674 .LBE146: 675 .LBE145: 676 .LBB147: 677 .LBB148: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 678 .loc 3 1985 0 679 .syntax unified 680 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 681 010a 23FB12F3 smuadx r3, r3, r2 682 @ 0 "" 2 683 .LVL97: 684 .thumb 685 .syntax unified 686 .LBE148: 687 .LBE147: 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** { 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #if defined (ARM_MATH_DSP) 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* read real and imag values from pSrcA and pSrcB buffer */ 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pSourceA = read_q15x2_ia ((q15_t **) &pInA); 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** pSourceB = read_q15x2_ia ((q15_t **) &pInB); 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Multiply and Accumlates */ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #ifdef ARM_MATH_BIG_ENDIAN 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** prod1 = -__SMUSD(pSourceA, pSourceB); 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #else 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** prod1 = __SMUSD(pSourceA, pSourceB); 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #endif 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** prod2 = __SMUADX(pSourceA, pSourceB); 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumReal += (q63_t) prod1; 688 .loc 6 547 0 689 010e A419 adds r4, r4, r6 690 0110 45EBE675 adc r5, r5, r6, asr #31 691 .LVL98: 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumImag += (q63_t) prod2; 692 .loc 6 548 0 693 0114 C018 adds r0, r0, r3 694 0116 41EBE371 adc r1, r1, r3, asr #31 695 .LVL99: 696 .L44: 697 .LBB149: 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* read real and imag values from pSrcA and pSrcB buffer */ 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** a = *pInA++; 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** b = *pInA++; 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** c = *pInB++; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** d = *pInB++; 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Multiply and Accumlates */ 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumReal += (q31_t) a * c; 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumImag += (q31_t) a * d; 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumReal -= (q31_t) b * d; 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** sumImag += (q31_t) b * c; ARM GAS /tmp/cc6NnxTV.s page 116 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Saturate and store result in destination buffer */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t) (__SSAT(sumReal >> 15, 16)); 698 .loc 6 569 0 699 011a E20B lsrs r2, r4, #15 700 .LBE149: 701 .LBB150: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t) (__SSAT(sumImag >> 15, 16)); 702 .loc 6 570 0 703 011c C30B lsrs r3, r0, #15 704 .LBE150: 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Decrement column loop counter */ 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** col--; 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } while (col > 0U); 705 .loc 6 575 0 706 011e B9F10109 subs r9, r9, #1 707 .LVL100: 708 .LBB151: 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t) (__SSAT(sumImag >> 15, 16)); 709 .loc 6 569 0 710 0122 42EA4542 orr r2, r2, r5, lsl #17 711 .LBE151: 712 .LBB152: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t) (__SSAT(sumImag >> 15, 16)); 713 .loc 6 570 0 714 0126 43EA4143 orr r3, r3, r1, lsl #17 715 .LBE152: 716 .LBB153: 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t) (__SSAT(sumImag >> 15, 16)); 717 .loc 6 569 0 718 .syntax unified 719 @ 569 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c" 720 012a 02F30F02 ssat r2, #16, r2 721 @ 0 "" 2 722 .LVL101: 723 .thumb 724 .syntax unified 725 .LBE153: 726 .LBB154: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t) (__SSAT(sumImag >> 15, 16)); 727 .loc 6 570 0 728 .syntax unified 729 @ 570 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c" 730 012e 03F30F03 ssat r3, #16, r3 731 @ 0 "" 2 732 .thumb 733 .syntax unified 734 .LBE154: 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t) (__SSAT(sumImag >> 15, 16)); 735 .loc 6 569 0 736 0132 2CF8042C strh r2, [ip, #-4] @ movhi ARM GAS /tmp/cc6NnxTV.s page 117 737 .LVL102: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** *px++ = (q15_t) (__SSAT(sumImag >> 15, 16)); 738 .loc 6 570 0 739 0136 2CF8023C strh r3, [ip, #-2] @ movhi 740 013a 0CF1040C add ip, ip, #4 741 .LVL103: 742 .loc 6 575 0 743 013e A2D1 bne .L45 744 .LVL104: 745 0140 039B ldr r3, [sp, #12] 746 .LVL105: 747 0142 0B9A ldr r2, [sp, #44] 748 .LVL106: 749 0144 1344 add r3, r3, r2 750 0146 0393 str r3, [sp, #12] 751 0148 0D9A ldr r2, [sp, #52] 752 014a 079B ldr r3, [sp, #28] 753 014c 1344 add r3, r3, r2 754 014e 0793 str r3, [sp, #28] 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** i = i + numColsA; 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Decrement row loop counter */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** row--; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } while (row > 0U); 755 .loc 6 582 0 756 0150 089B ldr r3, [sp, #32] 757 0152 013B subs r3, r3, #1 758 .LVL107: 759 0154 0893 str r3, [sp, #32] 760 0156 8DD1 bne .L46 761 .LVL108: 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** status = ARM_MATH_SUCCESS; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** /* Return to application */ 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** return (status); 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** } 762 .loc 6 590 0 763 0158 1846 mov r0, r3 764 .LVL109: 765 015a 0FB0 add sp, sp, #60 766 .LCFI9: 767 .cfi_remember_state 768 .cfi_def_cfa_offset 36 769 @ sp needed 770 015c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 771 .LVL110: 772 .L47: 773 .LCFI10: 774 .cfi_restore_state 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c **** 775 .loc 6 451 0 776 0160 049B ldr r3, [sp, #16] ARM GAS /tmp/cc6NnxTV.s page 118 777 0162 CBE7 b .L42 778 .LVL111: 779 .L60: 780 0164 0D94 str r4, [sp, #52] 781 0166 70E7 b .L39 782 .cfi_endproc 783 .LFE152: 785 .section .text.arm_mat_cmplx_mult_q31,"ax",%progbits 786 .align 1 787 .p2align 2,,3 788 .global arm_mat_cmplx_mult_q31 789 .syntax unified 790 .thumb 791 .thumb_func 792 .fpu fpv4-sp-d16 794 arm_mat_cmplx_mult_q31: 795 .LFB153: 796 .file 8 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Title: arm_mat_cmplx_mult_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Description: Floating-point matrix multiplication 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** @addtogroup CmplxMatrixMult 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 119 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** @brief Q31 Complex matrix multiplication. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** @param[in] pSrcA points to first input complex matrix structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** @param[in] pSrcB points to second input complex matrix structure 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** @param[out] pDst points to output complex matrix structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** @return execution status 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** The function is implemented using an internal 64-bit accumulator. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** The accumulator has a 2.62 format and maintains full precision of the intermedia 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** multiplication results but provides only a single guard bit. There is no saturat 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** on intermediate additions. Thus, if the accumulator overflows it wraps around an 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** distorts the result. The input signals should be scaled down to avoid intermedia 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** overflows. The input is thus scaled down by log2(numColsA) bits 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** to avoid overflows, as a total of numColsA additions are performed internally. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #if defined(ARM_MATH_MVEI) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #include "arm_helium_utils.h" 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #define MATRIX_DIM2 2 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #define MATRIX_DIM3 3 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #define MATRIX_DIM4 4 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** __STATIC_INLINE arm_status arm_mat_cmplx_mult_q31_2x2_mve( 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** const arm_matrix_instance_q31 * pSrcA, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** const arm_matrix_instance_q31 * pSrcB, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** arm_matrix_instance_q31 * pDst) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA = pSrcA->pData; /* input data matrix pointer A */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint32x4_t vecColBOffs0; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA0 = pInA; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM2; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q63_t acc0, acc1, acc2, acc3; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31x4_t vecB, vecA; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** static const uint32_t offsetB0[4] = { 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 0, 1, 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** MATRIX_DIM2 * CMPLX_DIM, MATRIX_DIM2 * CMPLX_DIM + 1 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** }; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecColBOffs0 = vldrwq_u32(offsetB0); 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = (q31_t const *) pSrcB->pData; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA0); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA1); 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); ARM GAS /tmp/cc6NnxTV.s page 120 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 0] = (q31_t) asrl(acc0, 31); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 1] = (q31_t) asrl(acc1, 31); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 0] = (q31_t) asrl(acc2, 31); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 1] = (q31_t) asrl(acc3, 31); 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * move to next B column 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = pInB + CMPLX_DIM; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA0); 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA1); 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut += CMPLX_DIM; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 0] = (q31_t) asrl(acc0, 31); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 1] = (q31_t) asrl(acc1, 31); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 0] = (q31_t) asrl(acc2, 31); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 1] = (q31_t) asrl(acc3, 31); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Return to application 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** return (ARM_MATH_SUCCESS); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** __STATIC_INLINE arm_status arm_mat_cmplx_mult_q31_3x3_mve( 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** const arm_matrix_instance_q31 * pSrcA, 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** const arm_matrix_instance_q31 * pSrcB, 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** arm_matrix_instance_q31 * pDst) 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA = pSrcA->pData; /* input data matrix pointer A */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint32x4_t vecColBOffs0, vecColBOffs1; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA0 = pInA; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM3; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM3; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q63_t acc0, acc1, acc2, acc3; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31x4_t vecB, vecB1, vecA; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * enable predication to disable upper half complex vector element 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** mve_pred16_t p0 = vctp32q(CMPLX_DIM); 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** static const uint32_t offsetB0[4] = { 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 0, 1, 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** MATRIX_DIM3 * CMPLX_DIM, MATRIX_DIM3 * CMPLX_DIM + 1 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** }; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** static const uint32_t offsetB1[4] = { 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 2 * MATRIX_DIM3 * CMPLX_DIM, 2 * MATRIX_DIM3 * CMPLX_DIM + 1, ARM GAS /tmp/cc6NnxTV.s page 121 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** INACTIVELANE, INACTIVELANE 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** }; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecColBOffs0 = vldrwq_u32(offsetB0); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecColBOffs1 = vldrwq_u32(offsetB1); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = (q31_t const *) pSrcB->pData; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA0); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA1); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_z_s32(&pInA0[4], p0); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_z_s32(&pInA1[4], p0); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31); 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc2, 31); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc3, 31); 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA2); 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_z_s32(&pInA2[4], p0); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut += CMPLX_DIM; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * move to next B column 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = pInB + CMPLX_DIM; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA0); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA1); ARM GAS /tmp/cc6NnxTV.s page 122 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_z_s32(&pInA0[4], p0); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_z_s32(&pInA1[4], p0); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc2, 31); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc3, 31); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA2); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_z_s32(&pInA2[4], p0); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut += CMPLX_DIM; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * move to next B column 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = pInB + CMPLX_DIM; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA0); 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA1); 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_z_s32(&pInA0[4], p0); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_z_s32(&pInA1[4], p0); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31); 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc2, 31); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc3, 31); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 123 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA2); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_z_s32(&pInA2[4], p0); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31); 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31); 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Return to application 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** return (ARM_MATH_SUCCESS); 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** __STATIC_INLINE arm_status arm_mat_cmplx_mult_q31_4x4_mve( 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** const arm_matrix_instance_q31 * pSrcA, 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** const arm_matrix_instance_q31 * pSrcB, 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** arm_matrix_instance_q31 * pDst) 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA = pSrcA->pData; /* input data matrix pointer A */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint32x4_t vecColBOffs0, vecColBOffs1; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA0 = pInA; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM4; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM4; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA3 = pInA2 + CMPLX_DIM * MATRIX_DIM4; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q63_t acc0, acc1, acc2, acc3; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31x4_t vecB, vecB1, vecA; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** static const uint32_t offsetB0[4] = { 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 0, 1, 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** MATRIX_DIM4 * CMPLX_DIM, MATRIX_DIM4 * CMPLX_DIM + 1 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** }; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** static const uint32_t offsetB1[4] = { 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 2 * MATRIX_DIM4 * CMPLX_DIM, 2 * MATRIX_DIM4 * CMPLX_DIM + 1, 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 3 * MATRIX_DIM4 * CMPLX_DIM, 3 * MATRIX_DIM4 * CMPLX_DIM + 1 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** }; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecColBOffs0 = vldrwq_u32(offsetB0); 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecColBOffs1 = vldrwq_u32(offsetB1); 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = (q31_t const *) pSrcB->pData; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA0); 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA1); 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 124 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA0[4]); 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA1[4]); 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA2); 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA3); 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA2[4]); 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA3[4]); 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut += CMPLX_DIM; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * move to next B column 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = pInB + CMPLX_DIM; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA0); 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA1); 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA0[4]); 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA1[4]); 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); ARM GAS /tmp/cc6NnxTV.s page 125 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA2); 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA3); 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA2[4]); 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA3[4]); 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut += CMPLX_DIM; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * move to next B column 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = pInB + CMPLX_DIM; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA0); 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA1); 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA0[4]); 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA1[4]); 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 126 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA2); 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA3); 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA2[4]); 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA3[4]); 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut += CMPLX_DIM; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * move to next B column 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = pInB + CMPLX_DIM; 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA0); 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA1); 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA0[4]); 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA1[4]); 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA2); 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavq_s32(vecA, vecB); 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavxq_s32(vecA, vecB); 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(pInA3); 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavq_s32(vecA, vecB); ARM GAS /tmp/cc6NnxTV.s page 127 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavxq_s32(vecA, vecB); 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA2[4]); 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vldrwq_s32(&pInA3[4]); 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Return to application 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** return (ARM_MATH_SUCCESS); 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** arm_status arm_mat_cmplx_mult_q31( 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** const arm_matrix_instance_q31 * pSrcA, 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** const arm_matrix_instance_q31 * pSrcB, 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** arm_matrix_instance_q31 * pDst) 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInB = (q31_t const *) pSrcB->pData; /* input data matrix pointer B */ 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA = (q31_t const *) pSrcA->pData; /* input data matrix pointer A */ 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *px; /* Temporary output data matrix pointer */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint16_t col, i = 0U, row = numRowsA, colCnt; /* loop counters */ 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** arm_status status; /* status of matrix multiplication */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint32x4_t vecOffs, vecColBOffs; 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint32_t blkCnt, rowCnt; /* loop counters */ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Check for matrix mismatch condition */ 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** if ((pSrcA->numCols != pSrcB->numRows) || 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** else 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * small squared matrix specialized routines 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** if (numRowsA == numColsB && numColsB == numColsA) 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { ARM GAS /tmp/cc6NnxTV.s page 128 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** if (numRowsA == 1) 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q63_t sumReal = (q63_t) pInA[0] * pInB[0]; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumReal -= (q63_t) pInA[1] * pInB[1]; 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q63_t sumImag = (q63_t) pInA[0] * pInB[1]; 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) pInA[1] * pInB[0]; 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Store result in destination buffer */ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[0] = (q31_t) clip_q63_to_q31(sumReal >> 31); 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pOut[1] = (q31_t) clip_q63_to_q31(sumImag >> 31); 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** return (ARM_MATH_SUCCESS); 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** else if (numRowsA == 2) 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** return arm_mat_cmplx_mult_q31_2x2_mve(pSrcA, pSrcB, pDst); 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** else if (numRowsA == 3) 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** return arm_mat_cmplx_mult_q31_3x3_mve(pSrcA, pSrcB, pDst); 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** else if (numRowsA == 4) 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** return arm_mat_cmplx_mult_q31_4x4_mve(pSrcA, pSrcB, pDst); 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecColBOffs[0] = 0; 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecColBOffs[1] = 1; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecColBOffs[2] = numColsB * CMPLX_DIM; 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecColBOffs[3] = (numColsB * CMPLX_DIM) + 1; 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * row loop 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** rowCnt = row >> 1; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** while (rowCnt > 0u) 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Output pointer is set to starting address of the row being processed 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** px = pOut + i * CMPLX_DIM; 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** i = i + 2 * numColsB; 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * For every row wise process, the column loop counter is to be initiated 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** col = numColsB; 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * For every row wise process, the pInB pointer is set 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * to the starting address of the pSrcB data 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = (q31_t const *) pSrcB->pData; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * column loop 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** while (col > 0u) 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * generate 4 columns elements ARM GAS /tmp/cc6NnxTV.s page 129 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Matrix A columns number of MAC operations are to be performed 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** colCnt = numColsA; 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pSrcA0Vec, *pSrcA1Vec; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA0 = pInA; 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA1 = pInA0 + numColsA * CMPLX_DIM; 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q63_t acc0, acc1, acc2, acc3; 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = 0LL; 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = 0LL; 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = 0LL; 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = 0LL; 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pSrcA0Vec = (q31_t const *) pInA0; 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pSrcA1Vec = (q31_t const *) pInA1; 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecOffs = vecColBOffs; 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * process 1 x 2 block output 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** blkCnt = (numColsA * CMPLX_DIM) >> 2; 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** while (blkCnt > 0U) 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31x4_t vecB, vecA; 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecOffs); 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * move Matrix B read offsets, 2 rows down 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vld1q(pSrcA0Vec); 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pSrcA0Vec += 4; 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq(acc0, vecA, vecB); 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq(acc1, vecA, vecB); 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vld1q(pSrcA1Vec); 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pSrcA1Vec += 4; 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq(acc2, vecA, vecB); 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq(acc3, vecA, vecB); 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** blkCnt--; 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * tail 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ ARM GAS /tmp/cc6NnxTV.s page 130 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** blkCnt = (numColsA * CMPLX_DIM) & 3; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** if (blkCnt > 0U) 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31x4_t vecB, vecA; 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0); 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * move Matrix B read offsets, 2 rows down 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vld1q(pSrcA0Vec); 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq(acc0, vecA, vecB); 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq(acc1, vecA, vecB); 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vld1q(pSrcA1Vec); 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc2 = vmlsldavaq(acc2, vecA, vecB); 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc3 = vmlaldavaxq(acc3, vecA, vecB); 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** px[0 * CMPLX_DIM * numColsB + 0] = (q31_t) clip_q63_to_q31(acc0 >> 31); 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** px[0 * CMPLX_DIM * numColsB + 1] = (q31_t) clip_q63_to_q31(acc1 >> 31); 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** px[1 * CMPLX_DIM * numColsB + 0] = (q31_t) clip_q63_to_q31(acc2 >> 31); 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** px[1 * CMPLX_DIM * numColsB + 1] = (q31_t) clip_q63_to_q31(acc3 >> 31); 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** px += CMPLX_DIM; 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Decrement the column loop counter 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** col--; 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Update the pointer pInB to point to the starting address of the next column 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = (q31_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM; 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Update the pointer pInA to point to the starting address of the next row 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInA += (numColsA * 2) * CMPLX_DIM; 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Decrement the row loop counter 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** rowCnt --; 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** rowCnt = row & 1; 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** while (rowCnt > 0u) 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Output pointer is set to starting address of the row being processed 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** px = pOut + i * CMPLX_DIM; ARM GAS /tmp/cc6NnxTV.s page 131 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** i = i + numColsB; 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * For every row wise process, the column loop counter is to be initiated 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** col = numColsB; 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * For every row wise process, the pInB pointer is set 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * to the starting address of the pSrcB data 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = (q31_t const *) pSrcB->pData; 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * column loop 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** while (col > 0u) 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * generate 4 columns elements 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Matrix A columns number of MAC operations are to be performed 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** colCnt = numColsA; 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pSrcA0Vec; 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t const *pInA0 = pInA; 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q63_t acc0,acc1; 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = 0LL; 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = 0LL; 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pSrcA0Vec = (q31_t const *) pInA0; 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecOffs = vecColBOffs; 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * process 1 x 2 block output 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** blkCnt = (numColsA * CMPLX_DIM) >> 2; 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** while (blkCnt > 0U) 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31x4_t vecB, vecA; 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecOffs); 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * move Matrix B read offsets, 2 rows down 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vld1q(pSrcA0Vec); 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pSrcA0Vec += 4; 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq(acc0, vecA, vecB); 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq(acc1, vecA, vecB); 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** blkCnt--; 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 132 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * tail 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** blkCnt = (numColsA * CMPLX_DIM) & 3; 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** if (blkCnt > 0U) 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31x4_t vecB, vecA; 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0); 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * move Matrix B read offsets, 2 rows down 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** vecA = vld1q(pSrcA0Vec); 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc0 = vmlsldavaq(acc0, vecA, vecB); 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** acc1 = vmlaldavaxq(acc1, vecA, vecB); 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** px[0] = (q31_t) clip_q63_to_q31(acc0 >> 31); 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** px[1] = (q31_t) clip_q63_to_q31(acc1 >> 31); 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** px += CMPLX_DIM; 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Decrement the column loop counter 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** col--; 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Update the pointer pInB to point to the starting address of the next column 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInB = (q31_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM; 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** * Update the pointer pInA to point to the starting address of the next row 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** */ 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInA += numColsA * CMPLX_DIM; 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** rowCnt--; 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** status = ARM_MATH_SUCCESS; 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Return to application */ 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** return (status); 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 133 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #else 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** arm_status arm_mat_cmplx_mult_q31( 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** const arm_matrix_instance_q31 * pSrcA, 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** const arm_matrix_instance_q31 * pSrcB, 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** arm_matrix_instance_q31 * pDst) 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 797 .loc 8 843 0 798 .cfi_startproc 799 @ args = 0, pretend = 0, frame = 32 800 @ frame_needed = 0, uses_anonymous_args = 0 801 .LVL112: 802 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 803 .LCFI11: 804 .cfi_def_cfa_offset 36 805 .cfi_offset 4, -36 806 .cfi_offset 5, -32 807 .cfi_offset 6, -28 808 .cfi_offset 7, -24 809 .cfi_offset 8, -20 810 .cfi_offset 9, -16 811 .cfi_offset 10, -12 812 .cfi_offset 11, -8 813 .cfi_offset 14, -4 814 0004 5268 ldr r2, [r2, #4] 815 .LVL113: 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *pOut = pDst->pData; /* Output data matrix pointer */ 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *px; /* Temporary output data matrix pointer */ 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q63_t sumReal, sumImag; /* Accumulator */ 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t a1, b1, c1, d1; 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */ 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** arm_status status; /* status of matrix multiplication */ 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t a0, b0, c0, d0; 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #endif 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Check for matrix mismatch condition */ 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** if ((pSrcA->numCols != pSrcB->numRows) || 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** (pSrcA->numRows != pDst->numRows) || 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** (pSrcB->numCols != pDst->numCols) ) 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** else 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { ARM GAS /tmp/cc6NnxTV.s page 134 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB * 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* row loop */ 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** do 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Output pointer is set to starting address of the row being processed */ 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** px = pOut + 2 * i; 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* For every row wise process, the column loop counter is to be initiated */ 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** col = numColsB; 816 .loc 8 884 0 817 0006 B1F802B0 ldrh fp, [r1, #2] 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ 818 .loc 8 845 0 819 000a 4968 ldr r1, [r1, #4] 820 .LVL114: 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* For every row wise process, the pIn2 pointer is set 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** ** to the starting address of the pSrcB data */ 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn2 = pSrcB->pData; 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** j = 0U; 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* column loop */ 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** do 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Set the variable sum, that acts as accumulator, to zero */ 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumReal = 0.0; 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag = 0.0; 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Initiate pointer pIn1 to point to starting address of column being processed */ 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn1 = pInA; 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Apply loop unrolling and compute 4 MACs simultaneously. */ 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** colCnt = numColsA >> 2U; 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* matrix multiplication */ 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** while (colCnt > 0U) 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Reading real part of complex matrix A */ 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** a0 = *pIn1; 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Reading real part of complex matrix B */ 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** c0 = *pIn2; 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Reading imaginary part of complex matrix A */ 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** b0 = *(pIn1 + 1U); 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Reading imaginary part of complex matrix B */ 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** d0 = *(pIn2 + 1U); 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Multiply and Accumlates */ 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumReal += (q63_t) a0 * c0; 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) b0 * c0; 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 135 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* update pointers */ 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn1 += 2U; 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn2 += 2 * numColsB; 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Multiply and Accumlates */ 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumReal -= (q63_t) b0 * d0; 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) a0 * d0; 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* read real and imag values from pSrcA and pSrcB buffer */ 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** a1 = *(pIn1 ); 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** c1 = *(pIn2 ); 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** b1 = *(pIn1 + 1U); 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** d1 = *(pIn2 + 1U); 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Multiply and Accumlates */ 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumReal += (q63_t) a1 * c1; 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) b1 * c1; 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* update pointers */ 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn1 += 2U; 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn2 += 2 * numColsB; 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Multiply and Accumlates */ 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumReal -= (q63_t) b1 * d1; 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) a1 * d1; 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** a0 = *(pIn1 ); 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** c0 = *(pIn2 ); 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** b0 = *(pIn1 + 1U); 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** d0 = *(pIn2 + 1U); 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Multiply and Accumlates */ 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumReal += (q63_t) a0 * c0; 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) b0 * c0; 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* update pointers */ 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn1 += 2U; 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn2 += 2 * numColsB; 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Multiply and Accumlates */ 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumReal -= (q63_t) b0 * d0; 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) a0 * d0; 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** a1 = *(pIn1 ); 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** c1 = *(pIn2 ); 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** b1 = *(pIn1 + 1U); 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** d1 = *(pIn2 + 1U); 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Multiply and Accumlates */ 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumReal += (q63_t) a1 * c1; 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) b1 * c1; 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* update pointers */ ARM GAS /tmp/cc6NnxTV.s page 136 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn1 += 2U; 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn2 += 2 * numColsB; 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Multiply and Accumlates */ 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumReal -= (q63_t) b1 * d1; 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) a1 * d1; 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Decrement loop count */ 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** colCnt--; 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** ** No loop unrolling is used. */ 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** colCnt = numColsA % 0x4U; 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #else 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Initialize blkCnt with number of samples */ 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** colCnt = numColsA; 821 .loc 8 1002 0 822 000c 4488 ldrh r4, [r0, #2] 823 000e 4368 ldr r3, [r0, #4] 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** arm_status status; /* status of matrix multiplication */ 824 .loc 8 854 0 825 0010 0088 ldrh r0, [r0] 826 .LVL115: 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ 827 .loc 8 843 0 828 0012 89B0 sub sp, sp, #36 829 .LCFI12: 830 .cfi_def_cfa_offset 72 831 0014 0832 adds r2, r2, #8 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** while (colCnt > 0U) 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** a1 = *(pIn1 ); 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** c1 = *(pIn2 ); 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** b1 = *(pIn1 + 1U); 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** d1 = *(pIn2 + 1U); 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Multiply and Accumlates */ 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumReal += (q63_t) a1 * c1; 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) b1 * c1; 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* update pointers */ 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn1 += 2U; 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn2 += 2 * numColsB; 832 .loc 8 1020 0 833 0016 4FEACB0B lsl fp, fp, #3 834 001a 0492 str r2, [sp, #16] 835 001c 01EB0B02 add r2, r1, fp 836 0020 0392 str r2, [sp, #12] 837 0022 0833 adds r3, r3, #8 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 137 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Multiply and Accumlates */ 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumReal -= (q63_t) b1 * d1; 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) a1 * d1; 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Decrement loop counter */ 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** colCnt--; 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Store result in destination buffer */ 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** *px++ = (q31_t) clip_q63_to_q31(sumReal >> 31); 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** *px++ = (q31_t) clip_q63_to_q31(sumImag >> 31); 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Update pointer pIn2 to point to starting address of next column */ 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** j++; 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pIn2 = pSrcB->pData + 2U * j; 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Decrement column loop counter */ 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** col--; 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } while (col > 0U); 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Update pointer pInA to point to starting address of next row */ 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** i = i + numColsB; 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** pInA = pInA + 2 * numColsA; 838 .loc 8 1045 0 839 0024 E200 lsls r2, r4, #3 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ 840 .loc 8 845 0 841 0026 0791 str r1, [sp, #28] 842 .LVL116: 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 843 .loc 8 1002 0 844 0028 0194 str r4, [sp, #4] 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** arm_status status; /* status of matrix multiplication */ 845 .loc 8 854 0 846 002a 0590 str r0, [sp, #20] 847 .LVL117: 848 .loc 8 1045 0 849 002c 0692 str r2, [sp, #24] 850 002e 0293 str r3, [sp, #8] 851 .LVL118: 852 .L69: 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** q31_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ 853 .loc 8 843 0 854 0030 DDF81090 ldr r9, [sp, #16] 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 855 .loc 8 888 0 856 0034 DDF81CA0 ldr r10, [sp, #28] 857 .LVL119: 858 .L62: 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 859 .loc 8 1006 0 860 0038 019B ldr r3, [sp, #4] 861 003a 002B cmp r3, #0 862 003c 4FD0 beq .L63 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 863 .loc 8 897 0 ARM GAS /tmp/cc6NnxTV.s page 138 864 003e 0026 movs r6, #0 865 0040 0027 movs r7, #0 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 866 .loc 8 1006 0 867 0042 029D ldr r5, [sp, #8] 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag = 0.0; 868 .loc 8 896 0 869 0044 3046 mov r0, r6 870 0046 3946 mov r1, r7 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 871 .loc 8 1006 0 872 0048 9C46 mov ip, r3 873 004a 5446 mov r4, r10 874 .LVL120: 875 .L64: 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** b1 = *(pIn1 + 1U); 876 .loc 8 1010 0 877 004c 2368 ldr r3, [r4] 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** c1 = *(pIn2 ); 878 .loc 8 1009 0 879 004e 55F8088C ldr r8, [r5, #-8] 880 .LVL121: 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** d1 = *(pIn2 + 1U); 881 .loc 8 1011 0 882 0052 55F8042C ldr r2, [r5, #-4] 883 .LVL122: 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 884 .loc 8 1012 0 885 0056 D4F804E0 ldr lr, [r4, #4] 886 .LVL123: 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) b1 * c1; 887 .loc 8 1015 0 888 005a C3FB0801 smlal r0, r1, r3, r8 889 .LVL124: 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 890 .loc 8 1016 0 891 005e C2FB0367 smlal r6, r7, r2, r3 892 .LVL125: 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** sumImag += (q63_t) a1 * d1; 893 .loc 8 1023 0 894 0062 82FB0E23 smull r2, r3, r2, lr 895 .LVL126: 896 0066 801A subs r0, r0, r2 897 .LVL127: 898 0068 61EB0301 sbc r1, r1, r3 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 899 .loc 8 1006 0 900 006c BCF1010C subs ip, ip, #1 901 .LVL128: 902 0070 05F10805 add r5, r5, #8 903 .LVL129: 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 904 .loc 8 1024 0 905 0074 CEFB0867 smlal r6, r7, lr, r8 906 .LVL130: 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 907 .loc 8 1020 0 ARM GAS /tmp/cc6NnxTV.s page 139 908 0078 5C44 add r4, r4, fp 909 .LVL131: 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** { 910 .loc 8 1006 0 911 007a E7D1 bne .L64 912 .LVL132: 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** *px++ = (q31_t) clip_q63_to_q31(sumImag >> 31); 913 .loc 8 1031 0 914 007c C30F lsrs r3, r0, #31 915 .LVL133: 916 007e 43EA4103 orr r3, r3, r1, lsl #1 917 .LBB155: 918 .LBB156: 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** pQ15[0] = val & 0x0FFFF; 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** pQ15[1] = val >> 16; 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 4 Q7 from Q7 pointer and increment pointer afterwards. 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q7x4_ia ( 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7) 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ7, 4); 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val =(((*pQ7)[3] & 0x0FF) << 24) | (((*pQ7)[2] & 0x0FF) << 16) | (((*pQ7)[1] & 0x0FF) << 8) | 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 += 4; 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 4 Q7 from Q7 pointer and decrement pointer afterwards. 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q7x4_da ( 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7) 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ7, 4); 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((((*pQ7)[3]) & 0x0FF) << 24) | ((((*pQ7)[2]) & 0x0FF) << 16) | ((((*pQ7)[1]) & 0x0FF) << 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 -= 4; ARM GAS /tmp/cc6NnxTV.s page 140 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 4 Q7 to Q7 pointer and increment pointer afterwards. 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q7x4_ia ( 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7, 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value) 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value; 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ7, &val, 4); 1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[0] = val & 0x0FF; 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[1] = (val >> 8) & 0x0FF; 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[2] = (val >> 16) & 0x0FF; 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[3] = (val >> 24) & 0x0FF; 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 += 4; 1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** Normally those kind of definitions are in a compiler file 1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** in Core or Core_A. 1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** But for MSVC compiler it is a bit special. The goal is very specific 1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** to CMSIS-DSP and only to allow the use of this library from other 1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** systems like Python or Matlab. 1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** MSVC is not going to be used to cross-compile to ARM. So, having a MSVC 1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** compiler file in Core or Core_A would not make sense. 1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( _MSC_VER ) || defined(__GNUC_PYTHON__) 1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data) 1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (data == 0U) { return 32U; } 1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t count = 0U; 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t mask = 0x80000000U; 1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while ((data & mask) == 0U) 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** count += 1U; 1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** mask = mask >> 1U; 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return count; 1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) ARM GAS /tmp/cc6NnxTV.s page 141 1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if ((sat >= 1U) && (sat <= 32U)) 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); 1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t min = -1 - max ; 1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (val > max) 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return max; 1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (val < min) 1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return min; 1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return val; 1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) 1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (sat <= 31U) 1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t max = ((1U << sat) - 1U); 1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (val > (int32_t)max) 1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return max; 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (val < 0) 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return 0U; 1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (uint32_t)val; 1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef ARM_MATH_DSP 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief definition to pack two 16 bit values. 1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \ 1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) ) 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \ 1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) ) 1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief definition to pack four 8 bit values. 1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef ARM_MATH_BIG_ENDIAN 1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \ 1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \ 1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \ 1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v3) << 24) & (int32_t)0xFF000000) ) 1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \ 1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \ 1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \ ARM GAS /tmp/cc6NnxTV.s page 142 1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v0) << 24) & (int32_t)0xFF000000) ) 1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q63 to Q31 values. 1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t clip_q63_to_q31( 1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t x) 1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? 919 .loc 7 1160 0 920 0082 C817 asrs r0, r1, #31 921 .LVL134: 922 0084 F20F lsrs r2, r6, #31 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x; 923 .loc 7 1161 0 924 0086 B0EBE37F cmp r0, r3, asr #31 925 008a 42EA4702 orr r2, r2, r7, lsl #1 926 008e 18BF it ne 927 0090 6FF00043 mvnne r3, #-2147483648 928 0094 4FEAE771 asr r1, r7, #31 929 0098 4FEAE274 asr r4, r2, #31 930 .LVL135: 931 009c 18BF it ne 932 009e 4340 eorne r3, r0, r3 933 .LBE156: 934 .LBE155: 935 .LBB157: 936 .LBB158: 937 00a0 A142 cmp r1, r4 938 .LBE158: 939 .LBE157: 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** *px++ = (q31_t) clip_q63_to_q31(sumImag >> 31); 940 .loc 8 1031 0 941 00a2 49F8083C str r3, [r9, #-8] 942 .LVL136: 943 .LBB161: 944 .LBB159: 945 .loc 7 1161 0 946 00a6 1DD0 beq .L66 947 .LBE159: 948 .LBE161: 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 949 .loc 8 1041 0 950 00a8 039B ldr r3, [sp, #12] 951 .LBB162: 952 .LBB160: 953 .loc 7 1161 0 954 00aa 81F00041 eor r1, r1, #-2147483648 955 00ae 0AF1080A add r10, r10, #8 956 00b2 C943 mvns r1, r1 957 .LBE160: 958 .LBE162: 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 959 .loc 8 1041 0 960 00b4 5345 cmp r3, r10 ARM GAS /tmp/cc6NnxTV.s page 143 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 961 .loc 8 1032 0 962 00b6 49F8041C str r1, [r9, #-4] 963 .LVL137: 964 00ba 09F10809 add r9, r9, #8 965 .LVL138: 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 966 .loc 8 1041 0 967 00be BBD1 bne .L62 968 .LVL139: 969 .L68: 970 00c0 049B ldr r3, [sp, #16] 971 00c2 069A ldr r2, [sp, #24] 972 00c4 5B44 add r3, r3, fp 973 00c6 0493 str r3, [sp, #16] 974 00c8 029B ldr r3, [sp, #8] 975 00ca 1344 add r3, r3, r2 976 00cc 0293 str r3, [sp, #8] 977 .LVL140: 1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Decrement row loop counter */ 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** row--; 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } while (row > 0U); 978 .loc 8 1050 0 979 00ce 059B ldr r3, [sp, #20] 980 00d0 013B subs r3, r3, #1 981 .LVL141: 982 00d2 0593 str r3, [sp, #20] 983 00d4 ACD1 bne .L69 984 00d6 1846 mov r0, r3 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** status = ARM_MATH_SUCCESS; 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** /* Return to application */ 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** return (status); 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** } 985 .loc 8 1058 0 986 00d8 09B0 add sp, sp, #36 987 .LCFI13: 988 .cfi_remember_state 989 .cfi_def_cfa_offset 36 990 @ sp needed 991 00da BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 992 .LVL142: 993 .L63: 994 .LCFI14: 995 .cfi_restore_state 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** *px++ = (q31_t) clip_q63_to_q31(sumImag >> 31); 996 .loc 8 1031 0 997 00de 49F8083C str r3, [r9, #-8] 998 .LVL143: 999 00e2 1A46 mov r2, r3 1000 .LVL144: 1001 .L66: ARM GAS /tmp/cc6NnxTV.s page 144 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1002 .loc 8 1041 0 1003 00e4 039B ldr r3, [sp, #12] 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1004 .loc 8 1032 0 1005 00e6 49F8042C str r2, [r9, #-4] 1006 00ea 0AF1080A add r10, r10, #8 1007 .LVL145: 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c **** 1008 .loc 8 1041 0 1009 00ee 9A45 cmp r10, r3 1010 00f0 09F10809 add r9, r9, #8 1011 .LVL146: 1012 00f4 A0D1 bne .L62 1013 00f6 E3E7 b .L68 1014 .cfi_endproc 1015 .LFE153: 1017 .section .text.arm_mat_init_f32,"ax",%progbits 1018 .align 1 1019 .p2align 2,,3 1020 .global arm_mat_init_f32 1021 .syntax unified 1022 .thumb 1023 .thumb_func 1024 .fpu fpv4-sp-d16 1026 arm_mat_init_f32: 1027 .LFB154: 1028 .file 9 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * Title: arm_mat_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * Description: Floating-point matrix initialization 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** #include "arm_math.h" ARM GAS /tmp/cc6NnxTV.s page 145 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** @defgroup MatrixInit Matrix Initialization 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** Initializes the underlying matrix data structure. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** The functions set the numRows, 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** numCols, and pData fields 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** of the matrix data structure. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** */ 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** /** 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** @addtogroup MatrixInit 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** @{ 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** /** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** @brief Floating-point matrix initialization. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** @param[in,out] S points to an instance of the floating-point matrix structure 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** @param[in] nRows number of rows in the matrix 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** @param[in] nColumns number of columns in the matrix 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** @param[in] pData points to the matrix data array 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** @return none 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** void arm_mat_init_f32( 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** arm_matrix_instance_f32 * S, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** uint16_t nRows, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** uint16_t nColumns, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** float32_t * pData) 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** { 1029 .loc 9 63 0 1030 .cfi_startproc 1031 @ args = 0, pretend = 0, frame = 0 1032 @ frame_needed = 0, uses_anonymous_args = 0 1033 @ link register save eliminated. 1034 .LVL147: 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** /* Assign Number of Rows */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** S->numRows = nRows; 1035 .loc 9 65 0 1036 0000 0180 strh r1, [r0] @ movhi 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** /* Assign Number of Columns */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** S->numCols = nColumns; 1037 .loc 9 68 0 1038 0002 4280 strh r2, [r0, #2] @ movhi 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** /* Assign Data pointer */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** S->pData = pData; 1039 .loc 9 71 0 1040 0004 4360 str r3, [r0, #4] 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c **** } 1041 .loc 9 72 0 1042 0006 7047 bx lr ARM GAS /tmp/cc6NnxTV.s page 146 1043 .cfi_endproc 1044 .LFE154: 1046 .section .text.arm_mat_init_q15,"ax",%progbits 1047 .align 1 1048 .p2align 2,,3 1049 .global arm_mat_init_q15 1050 .syntax unified 1051 .thumb 1052 .thumb_func 1053 .fpu fpv4-sp-d16 1055 arm_mat_init_q15: 1056 .LFB155: 1057 .file 10 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * Title: arm_mat_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * Description: Q15 matrix initialization 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** @addtogroup MatrixInit 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** @brief Q15 matrix initialization. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** @param[in,out] S points to an instance of the floating-point matrix structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** @param[in] nRows number of rows in the matrix 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** @param[in] nColumns number of columns in the matrix ARM GAS /tmp/cc6NnxTV.s page 147 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** @param[in] pData points to the matrix data array 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** void arm_mat_init_q15( 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** arm_matrix_instance_q15 * S, 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** uint16_t nRows, 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** uint16_t nColumns, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** q15_t * pData) 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** { 1058 .loc 10 54 0 1059 .cfi_startproc 1060 @ args = 0, pretend = 0, frame = 0 1061 @ frame_needed = 0, uses_anonymous_args = 0 1062 @ link register save eliminated. 1063 .LVL148: 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** /* Assign Number of Rows */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** S->numRows = nRows; 1064 .loc 10 56 0 1065 0000 0180 strh r1, [r0] @ movhi 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** /* Assign Number of Columns */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** S->numCols = nColumns; 1066 .loc 10 59 0 1067 0002 4280 strh r2, [r0, #2] @ movhi 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** /* Assign Data pointer */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** S->pData = pData; 1068 .loc 10 62 0 1069 0004 4360 str r3, [r0, #4] 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c **** } 1070 .loc 10 63 0 1071 0006 7047 bx lr 1072 .cfi_endproc 1073 .LFE155: 1075 .section .text.arm_mat_init_q31,"ax",%progbits 1076 .align 1 1077 .p2align 2,,3 1078 .global arm_mat_init_q31 1079 .syntax unified 1080 .thumb 1081 .thumb_func 1082 .fpu fpv4-sp-d16 1084 arm_mat_init_q31: 1085 .LFB156: 1086 .file 11 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * Title: arm_mat_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * Description: Q31 matrix initialization 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** /* ARM GAS /tmp/cc6NnxTV.s page 148 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** @defgroup MatrixInit Matrix Initialization 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** @addtogroup MatrixInit 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** @{ 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** */ 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** /** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** @brief Q31 matrix initialization. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** @param[in,out] S points to an instance of the Q31 matrix structure 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** @param[in] nRows number of rows in the matrix 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** @param[in] nColumns number of columns in the matrix 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** @param[in] pData points to the matrix data array 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** @return none 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** */ 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** void arm_mat_init_q31( 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** arm_matrix_instance_q31 * S, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** uint16_t nRows, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** uint16_t nColumns, 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** q31_t * pData) 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** { 1087 .loc 11 59 0 1088 .cfi_startproc 1089 @ args = 0, pretend = 0, frame = 0 1090 @ frame_needed = 0, uses_anonymous_args = 0 1091 @ link register save eliminated. 1092 .LVL149: 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** /* Assign Number of Rows */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** S->numRows = nRows; 1093 .loc 11 61 0 ARM GAS /tmp/cc6NnxTV.s page 149 1094 0000 0180 strh r1, [r0] @ movhi 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** /* Assign Number of Columns */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** S->numCols = nColumns; 1095 .loc 11 64 0 1096 0002 4280 strh r2, [r0, #2] @ movhi 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** /* Assign Data pointer */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** S->pData = pData; 1097 .loc 11 67 0 1098 0004 4360 str r3, [r0, #4] 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c **** } 1099 .loc 11 68 0 1100 0006 7047 bx lr 1101 .cfi_endproc 1102 .LFE156: 1104 .section .text.arm_mat_inverse_f32,"ax",%progbits 1105 .align 1 1106 .p2align 2,,3 1107 .global arm_mat_inverse_f32 1108 .syntax unified 1109 .thumb 1110 .thumb_func 1111 .fpu fpv4-sp-d16 1113 arm_mat_inverse_f32: 1114 .LFB157: 1115 .file 12 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Title: arm_mat_inverse_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Description: Floating-point matrix inverse 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 150 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** @defgroup MatrixInv Matrix Inverse 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** Computes the inverse of a matrix. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** The inverse is defined only if the input matrix is square and non-singular (the determinant is no 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** The function checks that the input and output matrices are square and of the same size. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** inversion of floating-point matrices. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** @par Algorithm 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** The Gauss-Jordan method is used to find the inverse. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** The algorithm performs a sequence of elementary row-operations until it 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** reduces the input matrix to an identity matrix. Applying the same sequence 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** of elementary row-operations to an identity matrix yields the inverse matrix. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** If the input matrix is singular, then the algorithm terminates and returns error status 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** ARM_MATH_SINGULAR. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method" 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** @addtogroup MatrixInv 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** @{ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** @brief Floating-point matrix inverse. 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** @param[in] pSrc points to input matrix structure. The source matrix is modified by the f 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** @param[out] pDst points to output matrix structure 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** @return execution status 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** - \ref ARM_MATH_SINGULAR : Input matrix is found to be singular (non-invert 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** arm_status arm_mat_inverse_f32( 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** const arm_matrix_instance_f32 * pSrc, 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** arm_matrix_instance_f32 * pDst) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pIn = pSrc->pData; /* input data matrix pointer */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output d 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pTmpA, *pTmpB; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t in = 0.0f; /* Temporary input values */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */ ARM GAS /tmp/cc6NnxTV.s page 151 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** arm_status status; /* status of matrix inverse */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** uint32_t blkCnt; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check for matrix mismatch condition */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** || (pSrc->numRows != pDst->numRows)) 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** else 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /*--------------------------------------------------------------------------------------------- 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Matrix Inverse can be solved using elementary row operations. 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Gauss-Jordan Method: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1. First combine the identity matrix and the input matrix separated by a bar to form an 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * augmented matrix as follows: 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * _ _ _ _ _ _ _ _ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * | | a11 a12 | | | 1 0 | | | X11 X12 | 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * | | | | | | | = | | 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _| 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 2. In our implementation, pDst Matrix is used as identity matrix. 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 3. Begin with the first row. Let i = 1. 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 4. Check to see if the pivot for row i is zero. 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * The pivot is the element of the main diagonal that is on the current row. 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * For instance, if working with row i, then the pivot element is aii. 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If the pivot is zero, exchange that row with a row below it that does not 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * contain a zero in column i. If this is not possible, then an inverse 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to that matrix does not exist. 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 5. Divide every element of row i by the pivot. 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 6. For every row below and row i, replace that row with the sum of that row and 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * a multiple of row i so that each new element in column i below row i is zero. 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * for every element below and above the main diagonal. 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 8. Now an identical matrix is formed to the left of the bar(input matrix, src). 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst). 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *--------------------------------------------------------------------------------------------- 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Working pointer for destination matrix 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 = pOut; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Loop over the number of rows 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ ARM GAS /tmp/cc6NnxTV.s page 152 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** rowCnt = numRows; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Making the destination matrix as identity matrix 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (rowCnt > 0U) 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Writing all zeroes in lower triangle of the destination matrix 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numRows - rowCnt; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = 0.0f; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Writing all ones in the diagonal of the destination matrix 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = 1.0f; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Writing all zeroes in upper triangle of the destination matrix 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = rowCnt - 1U; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = 0.0f; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Decrement the loop counter 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** rowCnt--; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Loop over the number of columns of the input matrix. 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * All the elements in each column are processed by the row operations 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** loopCnt = numCols; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Index modifier to navigate through the columns 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** l = 0U; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (loopCnt > 0U) 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Check if the pivot element is zero.. 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If it is zero then interchange the row with non zero row below. 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If there is no non zero element to replace in the rows below, 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * then the matrix is Singular. 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Working pointer for the input matrix that points 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * * to the pivot element of the particular row 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pIn + (l * numCols); ARM GAS /tmp/cc6NnxTV.s page 153 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Working pointer for the destination matrix that points 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * * to the pivot element of the particular row 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 = pOut + (l * numCols); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Temporary variable to hold the pivot value 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in = *pInT1; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Destination pointer modifier 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** k = 1U; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Check if the pivot element is zero 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (*pInT1 == 0.0f) 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Loop over the number rows present below 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (i = (l + 1U); i < numRows; i++) 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Update the input and destination pointers 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 = pInT1 + (numCols * i); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT2 = pOutT1 + (numCols * k); 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Check if there is a non zero pivot element to 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * * replace in the rows below 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (*pInT2 != 0.0f) 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** f32x4_t vecA, vecB; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Loop over number of columns 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * * to the right of the pilot element 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pTmpA = pInT1; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pTmpB = pInT2; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt = (numCols - l) >> 2; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (blkCnt > 0U) 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vecA = vldrwq_f32(pTmpA); 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vecB = vldrwq_f32(pTmpB); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_f32(pTmpB, vecA); 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_f32(pTmpA, vecB); 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pTmpA += 4; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pTmpB += 4; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Decrement the blockSize loop counter 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt--; ARM GAS /tmp/cc6NnxTV.s page 154 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * tail 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * (will be merged thru tail predication) 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt = (numCols - l) & 3; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (blkCnt > 0U) 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vecA = vldrwq_f32(pTmpA); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vecB = vldrwq_f32(pTmpB); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_p_f32(pTmpB, vecA, p0); 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_p_f32(pTmpA, vecB, p0); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 += numCols - l; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 += numCols - l; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pTmpA = pOutT1; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pTmpB = pOutT2; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt = numCols >> 2; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (blkCnt > 0U) 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vecA = vldrwq_f32(pTmpA); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vecB = vldrwq_f32(pTmpB); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_f32(pTmpB, vecA); 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_f32(pTmpA, vecB); 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pTmpA += 4; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pTmpB += 4; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Decrement the blockSize loop counter 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt--; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * tail 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt = numCols & 3; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (blkCnt > 0U) 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vecA = vldrwq_f32(pTmpA); 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vecB = vldrwq_f32(pTmpB); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_p_f32(pTmpB, vecA, p0); 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_p_f32(pTmpA, vecB, p0); 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 += numCols; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT2 += numCols; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Flag to indicate whether exchange is done or not 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** flag = 1U; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* ARM GAS /tmp/cc6NnxTV.s page 155 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Break after exchange is done 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** break; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Update the destination pointer modifier 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** k++; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Update the status if the matrix is singular 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if ((flag != 1U) && (in == 0.0f)) 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** return ARM_MATH_SINGULAR; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Points to the pivot row of input and destination matrices 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPivotRowIn = pIn + (l * numCols); 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPivotRowDst = pOut + (l * numCols); 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Temporary pointers to the pivot row pointers 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pPivotRowIn; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 = pPivotRowDst; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Pivot element of the row 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in = *(pIn + (l * numCols)); 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pTmpA = pInT1; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** f32x4_t invIn = vdupq_n_f32(1.0f / in); 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt = (numCols - l) >> 2; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** f32x4_t vecA; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (blkCnt > 0U) 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *(f32x4_t *) pTmpA = *(f32x4_t *) pTmpA * invIn; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pTmpA += 4; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Decrement the blockSize loop counter 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt--; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * tail 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt = (numCols - l) & 3; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (blkCnt > 0U) 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { ARM GAS /tmp/cc6NnxTV.s page 156 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vecA = vldrwq_f32(pTmpA); 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vecA = vecA * invIn; 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_p_f32(pTmpA, vecA, p0); 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 += numCols - l; 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Loop over number of columns 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * * to the right of the pilot element 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pTmpA = pOutT1; 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt = numCols >> 2; 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (blkCnt > 0U) 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *(f32x4_t *) pTmpA = *(f32x4_t *) pTmpA *invIn; 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pTmpA += 4; 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Decrement the blockSize loop counter 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt--; 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * tail 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * (will be merged thru tail predication) 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt = numCols & 3; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (blkCnt > 0U) 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vecA = vldrwq_f32(pTmpA); 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vecA = vecA * invIn; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_p_f32(pTmpA, vecA, p0); 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 += numCols; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Replace the rows with the sum of that row and a multiple of row i 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * * so that each new element in column i above row i is zero. 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Temporary pointers for input and destination matrices 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pIn; 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 = pOut; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (i = 0U; i < numRows; i++) 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Check for the pivot element 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ ARM GAS /tmp/cc6NnxTV.s page 157 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (i == l) 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If the processing element is the pivot element, 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * only the columns to the right are to be processed 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 += numCols - l; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 += numCols; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** else 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Element of the reference row 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Working pointers for input and destination pivot rows 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPRT_in = pPivotRowIn; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPRT_pDst = pPivotRowDst; 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Loop over the number of columns to the right of the pivot element, 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to replace the elements in the input matrix 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in = *pInT1; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** f32x4_t tmpV = vdupq_n_f32(in); 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt = (numCols - l) >> 2; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (blkCnt > 0U) 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** f32x4_t vec1, vec2; 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Replace the element by the sum of that row 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * and a multiple of the reference row 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vldrwq_f32(pInT1); 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec2 = vldrwq_f32(pPRT_in); 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vfmsq_f32(vec1, tmpV, vec2); 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_f32(pInT1, vec1); 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPRT_in += 4; 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 += 4; 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Decrement the blockSize loop counter 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt--; 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * tail 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * (will be merged thru tail predication) 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt = (numCols - l) & 3; 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (blkCnt > 0U) 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** f32x4_t vec1, vec2; 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 158 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vldrwq_f32(pInT1); 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec2 = vldrwq_f32(pPRT_in); 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vfmsq_f32(vec1, tmpV, vec2); 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_p_f32(pInT1, vec1, p0); 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 += blkCnt; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt = numCols >> 2; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (blkCnt > 0U) 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** f32x4_t vec1, vec2; 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Replace the element by the sum of that row 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * and a multiple of the reference row 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vldrwq_f32(pOutT1); 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec2 = vldrwq_f32(pPRT_pDst); 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vfmsq_f32(vec1, tmpV, vec2); 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_f32(pOutT1, vec1); 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPRT_pDst += 4; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 += 4; 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Decrement the blockSize loop counter 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt--; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * tail 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * (will be merged thru tail predication) 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** blkCnt = numCols & 3; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (blkCnt > 0U) 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** f32x4_t vec1, vec2; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vldrwq_f32(pOutT1); 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec2 = vldrwq_f32(pPRT_pDst); 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vfmsq_f32(vec1, tmpV, vec2); 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vstrwq_p_f32(pOutT1, vec1, p0); 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 += blkCnt; 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 += blkCnt; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Increment the temporary input pointer 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pInT1 + l; 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Increment the input pointer 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pIn++; 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Decrement the loop counter ARM GAS /tmp/cc6NnxTV.s page 159 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** loopCnt--; 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Increment the index modifier 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** l++; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Set status as ARM_MATH_SUCCESS 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** */ 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** status = ARM_MATH_SUCCESS; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if ((flag != 1U) && (in == 0.0f)) 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pIn = pSrc->pData; 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (i = 0; i < numRows * numCols; i++) 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (pIn[i] != 0.0f) 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** break; 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (i == numRows * numCols) 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** status = ARM_MATH_SINGULAR; 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Return to application */ 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** return (status); 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #else 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #if defined(ARM_MATH_NEON) 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** arm_status arm_mat_inverse_f32( 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** const arm_matrix_instance_f32 * pSrc, 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** arm_matrix_instance_f32 * pDst) 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pIn = pSrc->pData; /* input data matrix pointer */ 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */ 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t Xchg, in = 0.0f, in1; /* Temporary input values */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */ 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** arm_status status; /* status of matrix inverse */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32x4_t vec1; 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32x4_t vec2; 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32x4_t tmpV; 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check for matrix mismatch condition */ 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** || (pSrc->numRows != pDst->numRows)) ARM GAS /tmp/cc6NnxTV.s page 160 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** else 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /*---------------------------------------------------------------------------------------------- 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Matrix Inverse can be solved using elementary row operations. 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Gauss-Jordan Method: 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1. First combine the identity matrix and the input matrix separated by a bar to form an 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * augmented matrix as follows: 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * _ _ _ _ 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * | a11 a12 | 1 0 | | X11 X12 | 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * | | | = | | 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * |_ a21 a22 | 0 1 _| |_ X21 X21 _| 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 2. In our implementation, pDst Matrix is used as identity matrix. 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 3. Begin with the first row. Let i = 1. 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 4. Check to see if the pivot for row i is zero. 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * The pivot is the element of the main diagonal that is on the current row. 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * For instance, if working with row i, then the pivot element is aii. 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If the pivot is zero, exchange that row with a row below it that does not 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * contain a zero in column i. If this is not possible, then an inverse 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to that matrix does not exist. 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 5. Divide every element of row i by the pivot. 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 6. For every row below and row i, replace that row with the sum of that row and 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * a multiple of row i so that each new element in column i below row i is zero. 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * for every element below and above the main diagonal. 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc). 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst). 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *----------------------------------------------------------------------------------------------- 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Working pointer for destination matrix */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 = pOut; 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number of rows */ 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** rowCnt = numRows; 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Making the destination matrix as identity matrix */ 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (rowCnt > 0U) 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Writing all zeroes in lower triangle of the destination matrix */ 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numRows - rowCnt; 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = 0.0f; ARM GAS /tmp/cc6NnxTV.s page 161 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Writing all ones in the diagonal of the destination matrix */ 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = 1.0f; 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Writing all zeroes in upper triangle of the destination matrix */ 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = rowCnt - 1U; 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = 0.0f; 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** rowCnt--; 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number of columns of the input matrix. 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** All the elements in each column are processed by the row operations */ 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** loopCnt = numCols; 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Index modifier to navigate through the columns */ 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** l = 0U; 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (loopCnt > 0U) 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check if the pivot element is zero.. 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If it is zero then interchange the row with non zero row below. 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If there is no non zero element to replace in the rows below, 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * then the matrix is Singular. */ 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Working pointer for the input matrix that points 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to the pivot element of the particular row */ 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pIn + (l * numCols); 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Working pointer for the destination matrix that points 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to the pivot element of the particular row */ 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 = pOut + (l * numCols); 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Temporary variable to hold the pivot value */ 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in = *pInT1; 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Destination pointer modifier */ 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** k = 1U; 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check if the pivot element is zero */ 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (*pInT1 == 0.0f) 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number rows present below */ 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (i = (l + 1U); i < numRows; i++) 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Update the input and destination pointers */ 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 = pInT1 + (numCols * i); 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT2 = pOutT1 + (numCols * k); ARM GAS /tmp/cc6NnxTV.s page 162 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check if there is a non zero pivot element to 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * replace in the rows below */ 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (*pInT2 != 0.0f) 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over number of columns 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to the right of the pilot element */ 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numCols - l; 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Exchange the row elements of the input matrix */ 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** Xchg = *pInT2; 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT2++ = *pInT1; 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT1++ = Xchg; 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over number of columns of the destination matrix */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numCols; 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Exchange the row elements of the destination matrix */ 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** Xchg = *pOutT2; 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT2++ = *pOutT1; 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = Xchg; 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Flag to indicate whether exchange is done or not */ 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** flag = 1U; 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Break after exchange is done */ 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** break; 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Update the destination pointer modifier */ 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** k++; 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Update the status if the matrix is singular */ 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if ((flag != 1U) && (in == 0.0f)) 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** return ARM_MATH_SINGULAR; 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Points to the pivot row of input and destination matrices */ 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPivotRowIn = pIn + (l * numCols); 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPivotRowDst = pOut + (l * numCols); 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Temporary pointers to the pivot row pointers */ ARM GAS /tmp/cc6NnxTV.s page 163 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pPivotRowIn; 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 = pPivotRowDst; 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Pivot element of the row */ 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in = *pPivotRowIn; 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** tmpV = vdupq_n_f32(1.0f/in); 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over number of columns 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to the right of the pilot element */ 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = (numCols - l) >> 2; 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Divide each element of the row of the input matrix 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * by the pivot element */ 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vld1q_f32(pInT1); 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vmulq_f32(vec1, tmpV); 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vst1q_f32(pInT1, vec1); 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 += 4; 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Tail */ 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = (numCols - l) & 3; 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Divide each element of the row of the input matrix 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * by the pivot element */ 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in1 = *pInT1; 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT1++ = in1 / in; 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over number of columns of the destination matrix */ 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numCols >> 2; 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Divide each element of the row of the destination matrix 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * by the pivot element */ 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vld1q_f32(pInT2); 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vmulq_f32(vec1, tmpV); 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vst1q_f32(pInT2, vec1); 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 += 4; 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Tail */ ARM GAS /tmp/cc6NnxTV.s page 164 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numCols & 3; 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Divide each element of the row of the destination matrix 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * by the pivot element */ 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in1 = *pInT2; 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT2++ = in1 / in; 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Replace the rows with the sum of that row and a multiple of row i 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * so that each new element in column i above row i is zero.*/ 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Temporary pointers for input and destination matrices */ 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pIn; 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 = pOut; 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* index used to check for pivot element */ 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** i = 0U; 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over number of rows */ 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* to be replaced by the sum of that row and a multiple of row i */ 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** k = numRows; 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (k > 0U) 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check for the pivot element */ 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (i == l) 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* If the processing element is the pivot element, 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** only the columns to the right are to be processed */ 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 += numCols - l; 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 += numCols; 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** else 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Element of the reference row */ 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in = *pInT1; 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** tmpV = vdupq_n_f32(in); 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Working pointers for input and destination pivot rows */ 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPRT_in = pPivotRowIn; 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPRT_pDst = pPivotRowDst; 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number of columns to the right of the pivot element, 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** to replace the elements in the input matrix */ 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = (numCols - l) >> 2; 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Replace the element by the sum of that row 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** and a multiple of the reference row */ 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vld1q_f32(pInT1); ARM GAS /tmp/cc6NnxTV.s page 165 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec2 = vld1q_f32(pPRT_in); 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vmlsq_f32(vec1, tmpV, vec2); 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vst1q_f32(pInT1, vec1); 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPRT_in += 4; 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 += 4; 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Tail */ 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = (numCols - l) & 3; 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Replace the element by the sum of that row 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** and a multiple of the reference row */ 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in1 = *pInT1; 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT1++ = in1 - (in * *pPRT_in++); 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number of columns to 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** replace the elements in the destination matrix */ 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numCols >> 2; 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Replace the element by the sum of that row 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** and a multiple of the reference row */ 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vld1q_f32(pInT2); 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec2 = vld1q_f32(pPRT_pDst); 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vec1 = vmlsq_f32(vec1, tmpV, vec2); 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** vst1q_f32(pInT2, vec1); 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPRT_pDst += 4; 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 += 4; 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Tail */ 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numCols & 3; 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Replace the element by the sum of that row 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** and a multiple of the reference row */ 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in1 = *pInT2; 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT2++ = in1 - (in * *pPRT_pDst++); 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 166 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Increment the temporary input pointer */ 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pInT1 + l; 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** k--; 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Increment the pivot index */ 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** i++; 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Increment the input pointer */ 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pIn++; 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** loopCnt--; 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Increment the index modifier */ 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** l++; 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** status = ARM_MATH_SUCCESS; 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if ((flag != 1U) && (in == 0.0f)) 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pIn = pSrc->pData; 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (i = 0; i < numRows * numCols; i++) 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (pIn[i] != 0.0f) 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** break; 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (i == numRows * numCols) 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** status = ARM_MATH_SINGULAR; 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Return to application */ 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** return (status); 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #else 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** arm_status arm_mat_inverse_f32( 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** const arm_matrix_instance_f32 * pSrc, 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** arm_matrix_instance_f32 * pDst) 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1116 .loc 12 988 0 1117 .cfi_startproc 1118 @ args = 0, pretend = 0, frame = 48 1119 @ frame_needed = 0, uses_anonymous_args = 0 1120 .LVL150: 1121 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 1122 .LCFI15: 1123 .cfi_def_cfa_offset 36 1124 .cfi_offset 4, -36 1125 .cfi_offset 5, -32 1126 .cfi_offset 6, -28 ARM GAS /tmp/cc6NnxTV.s page 167 1127 .cfi_offset 7, -24 1128 .cfi_offset 8, -20 1129 .cfi_offset 9, -16 1130 .cfi_offset 10, -12 1131 .cfi_offset 11, -8 1132 .cfi_offset 14, -4 1133 0004 2DED028B vpush.64 {d8} 1134 .LCFI16: 1135 .cfi_def_cfa_offset 44 1136 .cfi_offset 80, -44 1137 .cfi_offset 81, -40 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pIn = pSrc->pData; /* input data matrix pointer */ 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */ 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */ 1138 .loc 12 994 0 1139 0008 B0F800A0 ldrh r10, [r0] 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ 1140 .loc 12 990 0 1141 000c 4C68 ldr r4, [r1, #4] 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pIn = pSrc->pData; /* input data matrix pointer */ 1142 .loc 12 989 0 1143 000e 4368 ldr r3, [r0, #4] 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ 1144 .loc 12 995 0 1145 0010 4788 ldrh r7, [r0, #2] 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pIn = pSrc->pData; /* input data matrix pointer */ 1146 .loc 12 988 0 1147 0012 8DB0 sub sp, sp, #52 1148 .LCFI17: 1149 .cfi_def_cfa_offset 96 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ 1150 .loc 12 990 0 1151 0014 0A94 str r4, [sp, #40] 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 1152 .loc 12 989 0 1153 0016 0B93 str r3, [sp, #44] 1154 .LVL151: 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #if defined (ARM_MATH_DSP) 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t Xchg, in = 0.0f, in1; /* Temporary input values */ 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */ 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** arm_status status; /* status of matrix inverse */ 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check for matrix mismatch condition */ 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if ((pSrc->numRows != pSrc->numCols) || 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** (pDst->numRows != pDst->numCols) || 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** (pSrc->numRows != pDst->numRows) ) 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } ARM GAS /tmp/cc6NnxTV.s page 168 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** else 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /*--------------------------------------------------------------------------------------------- 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Matrix Inverse can be solved using elementary row operations. 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Gauss-Jordan Method: 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1. First combine the identity matrix and the input matrix separated by a bar to form an 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * augmented matrix as follows: 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * _ _ _ _ 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * | a11 a12 | 1 0 | | X11 X12 | 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * | | | = | | 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * |_ a21 a22 | 0 1 _| |_ X21 X21 _| 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 2. In our implementation, pDst Matrix is used as identity matrix. 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 3. Begin with the first row. Let i = 1. 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 4. Check to see if the pivot for row i is zero. 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * The pivot is the element of the main diagonal that is on the current row. 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * For instance, if working with row i, then the pivot element is aii. 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If the pivot is zero, exchange that row with a row below it that does not 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * contain a zero in column i. If this is not possible, then an inverse 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to that matrix does not exist. 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 5. Divide every element of row i by the pivot. 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 6. For every row below and row i, replace that row with the sum of that row and 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * a multiple of row i so that each new element in column i below row i is zero. 1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * for every element below and above the main diagonal. 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc). 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst). 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *--------------------------------------------------------------------------------------------- 1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Working pointer for destination matrix */ 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 = pOut; 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number of rows */ 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** rowCnt = numRows; 1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Making the destination matrix as identity matrix */ 1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (rowCnt > 0U) 1155 .loc 12 1061 0 1156 0018 BAF1000F cmp r10, #0 1157 001c 29D0 beq .L78 1158 001e 4FEA8A09 lsl r9, r10, #2 1159 0022 4FF00108 mov r8, #1 1160 0026 09F10403 add r3, r9, #4 1161 .LVL152: 1162 002a 0097 str r7, [sp] ARM GAS /tmp/cc6NnxTV.s page 169 1163 002c 0426 movs r6, #4 1164 002e 4746 mov r7, r8 1165 .LVL153: 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Writing all zeroes in lower triangle of the destination matrix */ 1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numRows - rowCnt; 1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = 0.0f; 1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Writing all ones in the diagonal of the destination matrix */ 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = 1.0f; 1166 .loc 12 1072 0 1167 0030 B7EE008A vmov.f32 s16, #1.0e+0 1168 0034 9846 mov r8, r3 1169 0036 0FE0 b .L79 1170 .LVL154: 1171 .L143: 1172 0038 FFF7FEFF bl memset 1173 .LVL155: 1174 003c 5D44 add r5, r5, fp 1175 .LVL156: 1176 003e A8EB0600 sub r0, r8, r6 1177 0042 2044 add r0, r0, r4 1178 0044 3246 mov r2, r6 1179 0046 0021 movs r1, #0 1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Writing all zeroes in upper triangle of the destination matrix */ 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = rowCnt - 1U; 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = 0.0f; 1180 .loc 12 1078 0 1181 0048 2C46 mov r4, r5 1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1182 .loc 12 1065 0 1183 004a 1FB1 cbz r7, .L81 1184 004c FFF7FEFF bl memset 1185 .LVL157: 1186 0050 0BEB0904 add r4, fp, r9 1187 .L81: 1188 0054 0436 adds r6, r6, #4 1189 0056 0137 adds r7, r7, #1 1190 .LVL158: 1191 .L79: 1192 0058 A9EB0605 sub r5, r9, r6 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1193 .loc 12 1072 0 1194 005c 04F1040B add fp, r4, #4 1195 .LVL159: 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1196 .loc 12 1076 0 1197 0060 BA45 cmp r10, r7 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1198 .loc 12 1072 0 ARM GAS /tmp/cc6NnxTV.s page 170 1199 0062 84ED008A vstr.32 s16, [r4] 1200 0066 2A46 mov r2, r5 1201 0068 4FF00001 mov r1, #0 1202 006c 5846 mov r0, fp 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1203 .loc 12 1076 0 1204 006e E3D1 bne .L143 1205 0070 009F ldr r7, [sp] 1206 .LVL160: 1207 .L78: 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement loop counter */ 1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** rowCnt--; 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number of columns of the input matrix. 1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** All the elements in each column are processed by the row operations */ 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** loopCnt = numCols; 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Index modifier to navigate through the columns */ 1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** l = 0U; 1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (loopCnt > 0U) 1208 .loc 12 1093 0 1209 0072 002F cmp r7, #0 1210 0074 00F0F880 beq .L83 1211 0078 4FEA8709 lsl r9, r7, #2 1212 007c 09F10202 add r2, r9, #2 1213 0080 5200 lsls r2, r2, #1 1214 0082 0792 str r2, [sp, #28] 1215 0084 09F10402 add r2, r9, #4 1216 0088 0992 str r2, [sp, #36] 1217 008a 0B9A ldr r2, [sp, #44] 1218 008c DDF828E0 ldr lr, [sp, #40] 1219 0090 CDF80090 str r9, [sp] 1220 0094 1146 mov r1, r2 1221 0096 FB00 lsls r3, r7, #3 1222 0098 4944 add r1, r1, r9 1223 009a 0026 movs r6, #0 1224 009c 0291 str r1, [sp, #8] 1225 009e 191D adds r1, r3, #4 1226 00a0 D318 adds r3, r2, r3 1227 00a2 0891 str r1, [sp, #32] 1228 00a4 0393 str r3, [sp, #12] 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** arm_status status; /* status of matrix inverse */ 1229 .loc 12 1000 0 1230 00a6 0696 str r6, [sp, #24] 1231 00a8 0192 str r2, [sp, #4] 1232 .loc 12 1093 0 1233 00aa 9446 mov ip, r2 1234 00ac B7EE006A vmov.f32 s12, #1.0e+0 1235 .LVL161: 1236 .L107: 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check if the pivot element is zero.. ARM GAS /tmp/cc6NnxTV.s page 171 1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If it is zero then interchange the row with non zero row below. 1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If there is no non zero element to replace in the rows below, 1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * then the matrix is Singular. */ 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Working pointer for the input matrix that points 1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to the pivot element of the particular row */ 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pIn + (l * numCols); 1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Working pointer for the destination matrix that points 1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to the pivot element of the particular row */ 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 = pOut + (l * numCols); 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Temporary variable to hold the pivot value */ 1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in = *pInT1; 1237 .loc 12 1109 0 1238 00b0 9CED007A vldr.32 s14, [ip] 1239 00b4 0198 ldr r0, [sp, #4] 1240 .LVL162: 1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Destination pointer modifier */ 1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** k = 1U; 1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check if the pivot element is zero */ 1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (*pInT1 == 0.0f) 1241 .loc 12 1116 0 1242 00b6 B5EE407A vcmp.f32 s14, #0 1243 00ba F1EE10FA vmrs APSR_nzcv, FPSCR 1244 00be 6DD0 beq .L144 1245 00c0 731C adds r3, r6, #1 1246 00c2 0493 str r3, [sp, #16] 1247 00c4 09EB0E03 add r3, r9, lr 1248 00c8 BD1B subs r5, r7, r6 1249 00ca 0593 str r3, [sp, #20] 1250 .LVL163: 1251 .L94: 1252 00cc C6EE076A vdiv.f32 s13, s12, s14 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number rows present below */ 1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (i = (l + 1U); i < numRows; i++) 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Update the input and destination pointers */ 1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 = pInT1 + (numCols * i); 1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT2 = pOutT1 + (numCols * k); 1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check if there is a non zero pivot element to 1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * replace in the rows below */ 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (*pInT2 != 0.0f) 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over number of columns 1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to the right of the pilot element */ 1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numCols - l; 1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Exchange the row elements of the input matrix */ ARM GAS /tmp/cc6NnxTV.s page 172 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** Xchg = *pInT2; 1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT2++ = *pInT1; 1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT1++ = Xchg; 1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over number of columns of the destination matrix */ 1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numCols; 1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Exchange the row elements of the destination matrix */ 1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** Xchg = *pOutT2; 1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT2++ = *pOutT1; 1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = Xchg; 1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement loop counter */ 1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Flag to indicate whether exchange is done or not */ 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** flag = 1U; 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Break after exchange is done */ 1163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** break; 1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Update the destination pointer modifier */ 1167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** k++; 1168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement loop counter */ 1170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Update the status if the matrix is singular */ 1174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if ((flag != 1U) && (in == 0.0f)) 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** return ARM_MATH_SINGULAR; 1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Points to the pivot row of input and destination matrices */ 1180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPivotRowIn = pIn + (l * numCols); 1181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPivotRowDst = pOut + (l * numCols); 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Temporary pointers to the pivot row pointers */ 1184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pPivotRowIn; 1185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 = pPivotRowDst; 1186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Pivot element of the row */ 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in = *pPivotRowIn; 1189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over number of columns 1191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to the right of the pilot element */ 1192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = (numCols - l); 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 173 1194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 1253 .loc 12 1194 0 1254 00d0 4DB1 cbz r5, .L97 1255 00d2 2A46 mov r2, r5 1256 00d4 6346 mov r3, ip 1257 .LVL164: 1258 .L98: 1259 00d6 013A subs r2, r2, #1 1260 .LVL165: 1195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Divide each element of the row of the input matrix 1197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * by the pivot element */ 1198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in1 = *pInT1; 1261 .loc 12 1198 0 1262 00d8 D3ED007A vldr.32 s15, [r3] 1263 .LVL166: 1199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT1++ = in1 / in; 1264 .loc 12 1199 0 1265 00dc 66EEA77A vmul.f32 s15, s13, s15 1266 .LVL167: 1267 00e0 E3EC017A vstmia.32 r3!, {s15} 1268 .LVL168: 1194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1269 .loc 12 1194 0 1270 00e4 F7D1 bne .L98 1271 .LVL169: 1272 .L97: 1273 00e6 3946 mov r1, r7 1185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1274 .loc 12 1185 0 1275 00e8 7346 mov r3, lr 1276 .LVL170: 1277 .L99: 1200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 1203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over number of columns of the destination matrix */ 1206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numCols; 1207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Divide each element of the row of the destination matrix 1211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * by the pivot element */ 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in1 = *pInT2; 1278 .loc 12 1212 0 1279 00ea D3ED007A vldr.32 s15, [r3] 1280 .LVL171: 1213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT2++ = in1 / in; 1281 .loc 12 1213 0 1282 00ee 66EEA77A vmul.f32 s15, s13, s15 1283 .LVL172: 1208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1284 .loc 12 1208 0 1285 00f2 0139 subs r1, r1, #1 1286 .LVL173: ARM GAS /tmp/cc6NnxTV.s page 174 1287 .loc 12 1213 0 1288 00f4 E3EC017A vstmia.32 r3!, {s15} 1289 .LVL174: 1208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1290 .loc 12 1208 0 1291 00f8 F7D1 bne .L99 1292 .LVL175: 1214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 1216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 1217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Replace the rows with the sum of that row and a multiple of row i 1220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * so that each new element in column i above row i is zero.*/ 1221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Temporary pointers for input and destination matrices */ 1223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pIn; 1224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 = pOut; 1225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* index used to check for pivot element */ 1227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** i = 0U; 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over number of rows */ 1230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* to be replaced by the sum of that row and a multiple of row i */ 1231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** k = numRows; 1232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (k > 0U) 1293 .loc 12 1233 0 1294 00fa BAF1000F cmp r10, #0 1295 00fe 29D0 beq .L100 1224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1296 .loc 12 1224 0 1297 0100 0A9C ldr r4, [sp, #40] 1298 0102 4FEA8608 lsl r8, r6, #2 1299 .LVL176: 1300 .L106: 1234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check for the pivot element */ 1236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (i == l) 1301 .loc 12 1236 0 1302 0106 8E42 cmp r6, r1 1303 0108 00F09280 beq .L145 1237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* If the processing element is the pivot element, 1239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** only the columns to the right are to be processed */ 1240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 += numCols - l; 1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 += numCols; 1243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** else 1245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Element of the reference row */ 1247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in = *pInT1; 1304 .loc 12 1247 0 1305 010c 90ED007A vldr.32 s14, [r0] 1306 .LVL177: 1248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 175 1249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Working pointers for input and destination pivot rows */ 1250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPRT_in = pPivotRowIn; 1251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPRT_pDst = pPivotRowDst; 1252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number of columns to the right of the pivot element, 1254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** to replace the elements in the input matrix */ 1255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = (numCols - l); 1256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 1307 .loc 12 1257 0 1308 0110 75B1 cbz r5, .L103 1309 0112 0246 mov r2, r0 1310 0114 2B46 mov r3, r5 1311 0116 E346 mov fp, ip 1312 .LVL178: 1313 .L104: 1258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Replace the element by the sum of that row 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** and a multiple of the reference row */ 1261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in1 = *pInT1; 1314 .loc 12 1261 0 1315 0118 D2ED007A vldr.32 s15, [r2] 1316 .LVL179: 1262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT1++ = in1 - (in * *pPRT_in++); 1317 .loc 12 1262 0 1318 011c FBEC016A vldmia.32 fp!, {s13} 1319 .LVL180: 1320 0120 E6EEC77A vfms.f32 s15, s13, s14 1321 .LVL181: 1257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1322 .loc 12 1257 0 1323 0124 013B subs r3, r3, #1 1324 .LVL182: 1325 .loc 12 1262 0 1326 0126 E2EC017A vstmia.32 r2!, {s15} 1327 .LVL183: 1257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1328 .loc 12 1257 0 1329 012a F5D1 bne .L104 1330 012c 009B ldr r3, [sp] 1331 .LVL184: 1332 012e 1844 add r0, r0, r3 1333 .LVL185: 1334 .L103: 1335 0130 2246 mov r2, r4 1336 0132 3B46 mov r3, r7 1251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1337 .loc 12 1251 0 1338 0134 F346 mov fp, lr 1339 .LVL186: 1340 .L105: 1263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 1265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 1266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number of columns to ARM GAS /tmp/cc6NnxTV.s page 176 1269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** replace the elements in the destination matrix */ 1270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numCols; 1271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 1273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Replace the element by the sum of that row 1275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** and a multiple of the reference row */ 1276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in1 = *pInT2; 1341 .loc 12 1276 0 1342 0136 D2ED007A vldr.32 s15, [r2] 1343 .LVL187: 1277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT2++ = in1 - (in * *pPRT_pDst++); 1344 .loc 12 1277 0 1345 013a FBEC016A vldmia.32 fp!, {s13} 1346 .LVL188: 1347 013e E6EEC77A vfms.f32 s15, s13, s14 1348 .LVL189: 1272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1349 .loc 12 1272 0 1350 0142 013B subs r3, r3, #1 1351 .LVL190: 1352 .loc 12 1277 0 1353 0144 E2EC017A vstmia.32 r2!, {s15} 1354 .LVL191: 1272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1355 .loc 12 1272 0 1356 0148 F5D1 bne .L105 1357 014a 4C44 add r4, r4, r9 1358 .LVL192: 1359 .L102: 1278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement loop counter */ 1280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 1281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Increment temporary input pointer */ 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pInT1 + l; 1287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement loop counter */ 1289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** k--; 1290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Increment pivot index */ 1292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** i++; 1360 .loc 12 1292 0 1361 014c 0131 adds r1, r1, #1 1362 .LVL193: 1233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1363 .loc 12 1233 0 1364 014e 8A45 cmp r10, r1 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1365 .loc 12 1286 0 1366 0150 4044 add r0, r0, r8 1367 .LVL194: 1233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1368 .loc 12 1233 0 ARM GAS /tmp/cc6NnxTV.s page 177 1369 0152 D8D1 bne .L106 1370 .LVL195: 1371 .L100: 1372 0154 019B ldr r3, [sp, #4] 1373 0156 089A ldr r2, [sp, #32] 1374 0158 049E ldr r6, [sp, #16] 1375 015a DDF814E0 ldr lr, [sp, #20] 1376 .LVL196: 1377 015e 0433 adds r3, r3, #4 1378 .LVL197: 1379 0160 0193 str r3, [sp, #4] 1380 0162 099B ldr r3, [sp, #36] 1381 .LVL198: 1382 0164 9C44 add ip, ip, r3 1383 .LVL199: 1384 0166 039B ldr r3, [sp, #12] 1385 0168 1344 add r3, r3, r2 1386 016a 0393 str r3, [sp, #12] 1387 016c 079A ldr r2, [sp, #28] 1388 016e 029B ldr r3, [sp, #8] 1389 0170 1344 add r3, r3, r2 1390 0172 0293 str r3, [sp, #8] 1391 0174 009B ldr r3, [sp] 1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1392 .loc 12 1093 0 1393 0176 B742 cmp r7, r6 1394 0178 A3F10403 sub r3, r3, #4 1395 017c 0093 str r3, [sp] 1396 017e 97D1 bne .L107 1397 .LVL200: 1293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Increment the input pointer */ 1296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pIn++; 1297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 1299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** loopCnt--; 1300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Increment the index modifier */ 1302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** l++; 1303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #else 1307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** float32_t Xchg, in = 0.0f; /* Temporary input values */ 1309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */ 1310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** arm_status status; /* status of matrix inverse */ 1311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 1313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check for matrix mismatch condition */ 1315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if ((pSrc->numRows != pSrc->numCols) || 1316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** (pDst->numRows != pDst->numCols) || 1317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** (pSrc->numRows != pDst->numRows) ) 1318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ ARM GAS /tmp/cc6NnxTV.s page 178 1320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 1321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** else 1323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 1325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /*--------------------------------------------------------------------------------------------- 1329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Matrix Inverse can be solved using elementary row operations. 1330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Gauss-Jordan Method: 1332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1. First combine the identity matrix and the input matrix separated by a bar to form an 1334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * augmented matrix as follows: 1335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * _ _ _ _ _ _ _ _ 1336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * | | a11 a12 | | | 1 0 | | | X11 X12 | 1337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * | | | | | | | = | | 1338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _| 1339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 2. In our implementation, pDst Matrix is used as identity matrix. 1341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 3. Begin with the first row. Let i = 1. 1343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 4. Check to see if the pivot for row i is zero. 1345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * The pivot is the element of the main diagonal that is on the current row. 1346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * For instance, if working with row i, then the pivot element is aii. 1347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If the pivot is zero, exchange that row with a row below it that does not 1348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * contain a zero in column i. If this is not possible, then an inverse 1349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to that matrix does not exist. 1350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 5. Divide every element of row i by the pivot. 1352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 6. For every row below and row i, replace that row with the sum of that row and 1354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * a multiple of row i so that each new element in column i below row i is zero. 1355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros 1357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * for every element below and above the main diagonal. 1358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 1359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * 8. Now an identical matrix is formed to the left of the bar(input matrix, src). 1360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst). 1361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *--------------------------------------------------------------------------------------------- 1362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Working pointer for destination matrix */ 1364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 = pOut; 1365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number of rows */ 1367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** rowCnt = numRows; 1368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Making the destination matrix as identity matrix */ 1370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (rowCnt > 0U) 1371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Writing all zeroes in lower triangle of the destination matrix */ 1373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = numRows - rowCnt; 1374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 1375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = 0.0f; ARM GAS /tmp/cc6NnxTV.s page 179 1377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 1378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Writing all ones in the diagonal of the destination matrix */ 1381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = 1.0f; 1382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Writing all zeroes in upper triangle of the destination matrix */ 1384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j = rowCnt - 1U; 1385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (j > 0U) 1386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = 0.0f; 1388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** j--; 1389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement loop counter */ 1392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** rowCnt--; 1393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number of columns of the input matrix. 1396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** All the elements in each column are processed by the row operations */ 1397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** loopCnt = numCols; 1398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Index modifier to navigate through the columns */ 1400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** l = 0U; 1401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** while (loopCnt > 0U) 1403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check if the pivot element is zero.. 1405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If it is zero then interchange the row with non zero row below. 1406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * If there is no non zero element to replace in the rows below, 1407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * then the matrix is Singular. */ 1408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Working pointer for the input matrix that points 1410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to the pivot element of the particular row */ 1411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pIn + (l * numCols); 1412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Working pointer for the destination matrix that points 1414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to the pivot element of the particular row */ 1415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 = pOut + (l * numCols); 1416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Temporary variable to hold the pivot value */ 1418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in = *pInT1; 1419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Destination pointer modifier */ 1421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** k = 1U; 1422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check if the pivot element is zero */ 1424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (*pInT1 == 0.0f) 1425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number rows present below */ 1427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (i = (l + 1U); i < numRows; i++) 1428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Update the input and destination pointers */ 1430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT2 = pInT1 + (numCols * i); 1431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT2 = pOutT1 + (numCols * k); 1432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check if there is a non zero pivot element to ARM GAS /tmp/cc6NnxTV.s page 180 1434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * replace in the rows below */ 1435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (*pInT2 != 0.0f) 1436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over number of columns 1438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to the right of the pilot element */ 1439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (j = 0U; j < (numCols - l); j++) 1440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Exchange the row elements of the input matrix */ 1442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** Xchg = *pInT2; 1443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT2++ = *pInT1; 1444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT1++ = Xchg; 1445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (j = 0U; j < numCols; j++) 1448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** Xchg = *pOutT2; 1450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT2++ = *pOutT1; 1451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = Xchg; 1452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Flag to indicate whether exchange is done or not */ 1455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** flag = 1U; 1456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Break after exchange is done */ 1458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** break; 1459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Update the destination pointer modifier */ 1462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** k++; 1463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Update the status if the matrix is singular */ 1467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if ((flag != 1U) && (in == 0.0f)) 1468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** return ARM_MATH_SINGULAR; 1470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Points to the pivot row of input and destination matrices */ 1473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPivotRowIn = pIn + (l * numCols); 1474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPivotRowDst = pOut + (l * numCols); 1475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Temporary pointers to the pivot row pointers */ 1477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pPivotRowIn; 1478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 = pPivotRowDst; 1479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Pivot element of the row */ 1481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in = *(pIn + (l * numCols)); 1482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over number of columns 1484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * to the right of the pilot element */ 1485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (j = 0U; j < (numCols - l); j++) 1486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Divide each element of the row of the input matrix 1488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * by the pivot element */ 1489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT1 = *pInT1 / in; 1490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1++; ARM GAS /tmp/cc6NnxTV.s page 181 1491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (j = 0U; j < numCols; j++) 1493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Divide each element of the row of the destination matrix 1495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * by the pivot element */ 1496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1 = *pOutT1 / in; 1497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1++; 1498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Replace the rows with the sum of that row and a multiple of row i 1501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** * so that each new element in column i above row i is zero.*/ 1502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Temporary pointers for input and destination matrices */ 1504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pIn; 1505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 = pOut; 1506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (i = 0U; i < numRows; i++) 1508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Check for the pivot element */ 1510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (i == l) 1511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* If the processing element is the pivot element, 1513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** only the columns to the right are to be processed */ 1514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 += numCols - l; 1515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1 += numCols; 1516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** else 1518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Element of the reference row */ 1520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** in = *pInT1; 1521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Working pointers for input and destination pivot rows */ 1523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPRT_in = pPivotRowIn; 1524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pPRT_pDst = pPivotRowDst; 1525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number of columns to the right of the pivot element, 1527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** to replace the elements in the input matrix */ 1528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (j = 0U; j < (numCols - l); j++) 1529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Replace the element by the sum of that row 1531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** and a multiple of the reference row */ 1532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT1 = *pInT1 - (in * *pPRT_in++); 1533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1++; 1534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Loop over the number of columns to 1537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** replace the elements in the destination matrix */ 1538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (j = 0U; j < numCols; j++) 1539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Replace the element by the sum of that row 1541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** and a multiple of the reference row */ 1542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1 = *pOutT1 - (in * *pPRT_pDst++); 1543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT1++; 1544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 182 1548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Increment temporary input pointer */ 1549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pInT1 = pInT1 + l; 1550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Increment the input pointer */ 1553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pIn++; 1554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Decrement the loop counter */ 1556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** loopCnt--; 1557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Increment the index modifier */ 1559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** l++; 1560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** #endif /* #if defined (ARM_MATH_DSP) */ 1563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 1565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** status = ARM_MATH_SUCCESS; 1566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if ((flag != 1U) && (in == 0.0f)) 1398 .loc 12 1567 0 1399 0180 069B ldr r3, [sp, #24] 1400 0182 012B cmp r3, #1 1401 0184 04D0 beq .L115 1402 .loc 12 1567 0 is_stmt 0 discriminator 1 1403 0186 B5EE407A vcmp.f32 s14, #0 1404 018a F1EE10FA vmrs APSR_nzcv, FPSCR 1405 018e 53D0 beq .L109 1406 .L115: 1565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1407 .loc 12 1565 0 is_stmt 1 1408 0190 0020 movs r0, #0 1568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pIn = pSrc->pData; 1570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** for (i = 0; i < numRows * numCols; i++) 1571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (pIn[i] != 0.0f) 1573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** break; 1574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** if (i == numRows * numCols) 1577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** status = ARM_MATH_SINGULAR; 1578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** /* Return to application */ 1582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** return (status); 1583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1409 .loc 12 1583 0 1410 0192 0DB0 add sp, sp, #52 1411 .LCFI18: 1412 .cfi_remember_state 1413 .cfi_def_cfa_offset 44 1414 @ sp needed 1415 0194 BDEC028B vldm sp!, {d8} 1416 .LCFI19: 1417 .cfi_restore 80 ARM GAS /tmp/cc6NnxTV.s page 183 1418 .cfi_restore 81 1419 .cfi_def_cfa_offset 36 1420 0198 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 1421 .LVL201: 1422 .L144: 1423 .LCFI20: 1424 .cfi_restore_state 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1425 .loc 12 1120 0 1426 019c 731C adds r3, r6, #1 1427 019e 5345 cmp r3, r10 1428 01a0 0493 str r3, [sp, #16] 1429 01a2 1AD2 bcs .L86 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1430 .loc 12 1128 0 1431 01a4 029A ldr r2, [sp, #8] 1432 01a6 D2ED007A vldr.32 s15, [r2] 1433 .LVL202: 1434 01aa F5EE407A vcmp.f32 s15, #0 1435 01ae F1EE10FA vmrs APSR_nzcv, FPSCR 1436 01b2 60D1 bne .L146 1437 01b4 AAEB0605 sub r5, r10, r6 1438 01b8 0399 ldr r1, [sp, #12] 1439 01ba 0223 movs r3, #2 1440 01bc 07E0 b .L89 1441 .LVL203: 1442 .L95: 1443 01be D2ED007A vldr.32 s15, [r2] 1444 01c2 F5EE407A vcmp.f32 s15, #0 1445 01c6 F1EE10FA vmrs APSR_nzcv, FPSCR 1446 01ca 0ED1 bne .L147 1447 01cc 2346 mov r3, r4 1448 .LVL204: 1449 .L89: 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1450 .loc 12 1120 0 discriminator 2 1451 01ce AB42 cmp r3, r5 1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** pOutT2 = pOutT1 + (numCols * k); 1452 .loc 12 1123 0 discriminator 2 1453 01d0 0A46 mov r2, r1 1454 01d2 03F10104 add r4, r3, #1 1455 01d6 4944 add r1, r1, r9 1456 .LVL205: 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1457 .loc 12 1120 0 discriminator 2 1458 01d8 F1D1 bne .L95 1459 .LVL206: 1460 .L86: 1174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1461 .loc 12 1174 0 1462 01da 069B ldr r3, [sp, #24] 1463 01dc 012B cmp r3, #1 1464 01de 43D1 bne .L83 1465 01e0 09EB0E03 add r3, r9, lr 1466 01e4 BD1B subs r5, r7, r6 1467 01e6 0593 str r3, [sp, #20] 1468 01e8 70E7 b .L94 ARM GAS /tmp/cc6NnxTV.s page 184 1469 .LVL207: 1470 .L147: 1471 01ea 09EB0E01 add r1, r9, lr 1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1472 .loc 12 1124 0 1473 01ee 03FB09E3 mla r3, r3, r9, lr 1474 .LVL208: 1475 01f2 0591 str r1, [sp, #20] 1476 .LVL209: 1477 .L90: 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1478 .loc 12 1134 0 1479 01f4 BD1B subs r5, r7, r6 1480 .LVL210: 1481 01f6 0BD0 beq .L91 1482 01f8 2C46 mov r4, r5 1483 01fa 6146 mov r1, ip 1484 .LVL211: 1485 .L92: 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT2++ = *pInT1; 1486 .loc 12 1137 0 1487 01fc D2F80080 ldr r8, [r2] @ float 1488 .LVL212: 1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pInT1++ = Xchg; 1489 .loc 12 1138 0 1490 0200 D1F800B0 ldr fp, [r1] @ float 1491 0204 42F804BB str fp, [r2], #4 @ float 1492 .LVL213: 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1493 .loc 12 1134 0 1494 0208 013C subs r4, r4, #1 1495 .LVL214: 1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1496 .loc 12 1139 0 1497 020a 41F8048B str r8, [r1], #4 @ float 1498 .LVL215: 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1499 .loc 12 1134 0 1500 020e F5D1 bne .L92 1501 .LVL216: 1502 .L91: 1503 0210 3946 mov r1, r7 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1504 .loc 12 1106 0 1505 0212 7246 mov r2, lr 1506 .LVL217: 1507 .L93: 1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT2++ = *pOutT1; 1508 .loc 12 1151 0 1509 0214 1C68 ldr r4, [r3] @ float 1510 .LVL218: 1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** *pOutT1++ = Xchg; 1511 .loc 12 1152 0 1512 0216 D2F80080 ldr r8, [r2] @ float 1513 021a 43F8048B str r8, [r3], #4 @ float 1514 .LVL219: 1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { ARM GAS /tmp/cc6NnxTV.s page 185 1515 .loc 12 1148 0 1516 021e 0139 subs r1, r1, #1 1517 .LVL220: 1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1518 .loc 12 1153 0 1519 0220 42F8044B str r4, [r2], #4 @ float 1520 .LVL221: 1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1521 .loc 12 1148 0 1522 0224 F6D1 bne .L93 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1523 .loc 12 1160 0 1524 0226 0123 movs r3, #1 1525 .LVL222: 1526 0228 9CED007A vldr.32 s14, [ip] 1527 .LVL223: 1528 022c 0693 str r3, [sp, #24] 1529 .LVL224: 1530 022e 4DE7 b .L94 1531 .LVL225: 1532 .L145: 1240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1533 .loc 12 1240 0 1534 0230 009B ldr r3, [sp] 1242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1535 .loc 12 1242 0 1536 0232 4C44 add r4, r4, r9 1537 .LVL226: 1240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** 1538 .loc 12 1240 0 1539 0234 1844 add r0, r0, r3 1540 .LVL227: 1541 0236 89E7 b .L102 1542 .LVL228: 1543 .L109: 1570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1544 .loc 12 1570 0 1545 0238 07FB0AF7 mul r7, r7, r10 1546 023c A7B1 cbz r7, .L83 1572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** break; 1547 .loc 12 1572 0 1548 023e 0B9B ldr r3, [sp, #44] 1549 .LVL229: 1550 0240 D3ED007A vldr.32 s15, [r3] 1551 0244 F5EE407A vcmp.f32 s15, #0 1552 0248 F1EE10FA vmrs APSR_nzcv, FPSCR 1553 024c A0D1 bne .L115 1554 024e 0433 adds r3, r3, #4 1555 0250 069A ldr r2, [sp, #24] 1556 0252 06E0 b .L110 1557 .LVL230: 1558 .L111: 1559 0254 F3EC017A vldmia.32 r3!, {s15} 1560 0258 F5EE407A vcmp.f32 s15, #0 1561 025c F1EE10FA vmrs APSR_nzcv, FPSCR 1562 0260 96D1 bne .L115 1563 .LVL231: ARM GAS /tmp/cc6NnxTV.s page 186 1564 .L110: 1570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** { 1565 .loc 12 1570 0 discriminator 2 1566 0262 0132 adds r2, r2, #1 1567 .LVL232: 1568 0264 BA42 cmp r2, r7 1569 0266 F5D1 bne .L111 1570 .LVL233: 1571 .L83: 1577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c **** } 1572 .loc 12 1577 0 1573 0268 6FF00400 mvn r0, #4 1574 .loc 12 1583 0 1575 026c 0DB0 add sp, sp, #52 1576 .LCFI21: 1577 .cfi_remember_state 1578 .cfi_def_cfa_offset 44 1579 @ sp needed 1580 026e BDEC028B vldm sp!, {d8} 1581 .LCFI22: 1582 .cfi_restore 80 1583 .cfi_restore 81 1584 .cfi_def_cfa_offset 36 1585 0272 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 1586 .LVL234: 1587 .L146: 1588 .LCFI23: 1589 .cfi_restore_state 1590 0276 09EB0E03 add r3, r9, lr 1591 027a 0593 str r3, [sp, #20] 1592 027c BAE7 b .L90 1593 .cfi_endproc 1594 .LFE157: 1596 .global __aeabi_dcmpeq 1597 .global __aeabi_ddiv 1598 .global __aeabi_dmul 1599 .global __aeabi_dsub 1600 027e 00BF .section .text.arm_mat_inverse_f64,"ax",%progbits 1601 .align 1 1602 .p2align 2,,3 1603 .global arm_mat_inverse_f64 1604 .syntax unified 1605 .thumb 1606 .thumb_func 1607 .fpu fpv4-sp-d16 1609 arm_mat_inverse_f64: 1610 .LFB158: 1611 .file 13 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Title: arm_mat_inverse_f64.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Description: Floating-point matrix inverse 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Target Processor: Cortex-M cores ARM GAS /tmp/cc6NnxTV.s page 187 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** @addtogroup MatrixInv 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** @brief Floating-point (64 bit) matrix inverse. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** @param[in] pSrc points to input matrix structure. The source matrix is modified by the f 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** @param[out] pDst points to output matrix structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** @return execution status 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** - \ref ARM_MATH_SUCCESS : Operation successful 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** - \ref ARM_MATH_SINGULAR : Input matrix is found to be singular (non-invert 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** */ 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** arm_status arm_mat_inverse_f64( 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** const arm_matrix_instance_f64 * pSrc, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** arm_matrix_instance_f64 * pDst) 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1612 .loc 13 54 0 1613 .cfi_startproc 1614 @ args = 0, pretend = 0, frame = 80 1615 @ frame_needed = 0, uses_anonymous_args = 0 1616 .LVL235: 1617 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 1618 .LCFI24: 1619 .cfi_def_cfa_offset 36 1620 .cfi_offset 4, -36 1621 .cfi_offset 5, -32 1622 .cfi_offset 6, -28 1623 .cfi_offset 7, -24 ARM GAS /tmp/cc6NnxTV.s page 188 1624 .cfi_offset 8, -20 1625 .cfi_offset 9, -16 1626 .cfi_offset 10, -12 1627 .cfi_offset 11, -8 1628 .cfi_offset 14, -4 1629 0004 2DED028B vpush.64 {d8} 1630 .LCFI25: 1631 .cfi_def_cfa_offset 44 1632 .cfi_offset 80, -44 1633 .cfi_offset 81, -40 1634 0008 95B0 sub sp, sp, #84 1635 .LCFI26: 1636 .cfi_def_cfa_offset 128 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** float64_t *pIn = pSrc->pData; /* input data matrix pointer */ 1637 .loc 13 55 0 1638 000a 4268 ldr r2, [r0, #4] 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** float64_t *pOut = pDst->pData; /* output data matrix pointer */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** float64_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** float64_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** float64_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */ 1639 .loc 13 60 0 1640 000c 0388 ldrh r3, [r0] 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** float64_t *pOut = pDst->pData; /* output data matrix pointer */ 1641 .loc 13 56 0 1642 000e 4C68 ldr r4, [r1, #4] 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** float64_t *pIn = pSrc->pData; /* input data matrix pointer */ 1643 .loc 13 55 0 1644 0010 1392 str r2, [sp, #76] 1645 .LVL236: 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ 1646 .loc 13 61 0 1647 0012 4288 ldrh r2, [r0, #2] 1648 .LVL237: 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** float64_t *pOut = pDst->pData; /* output data matrix pointer */ 1649 .loc 13 56 0 1650 0014 1294 str r4, [sp, #72] 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ 1651 .loc 13 60 0 1652 0016 0793 str r3, [sp, #28] 1653 .loc 13 61 0 1654 0018 0292 str r2, [sp, #8] 1655 .LVL238: 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** #if defined (ARM_MATH_DSP) 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** float64_t Xchg, in = 0.0, in1; /* Temporary input values */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** arm_status status; /* status of matrix inverse */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** #ifdef ARM_MATH_MATRIX_CHECK 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Check for matrix mismatch condition */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if ((pSrc->numRows != pSrc->numCols) || 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** (pDst->numRows != pDst->numCols) || 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** (pSrc->numRows != pDst->numRows) ) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { ARM GAS /tmp/cc6NnxTV.s page 189 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** status = ARM_MATH_SIZE_MISMATCH; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** else 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /*--------------------------------------------------------------------------------------------- 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Matrix Inverse can be solved using elementary row operations. 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Gauss-Jordan Method: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 1. First combine the identity matrix and the input matrix separated by a bar to form an 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * augmented matrix as follows: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * _ _ _ _ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * | a11 a12 | 1 0 | | X11 X12 | 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * | | | = | | 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * |_ a21 a22 | 0 1 _| |_ X21 X21 _| 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 2. In our implementation, pDst Matrix is used as identity matrix. 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 3. Begin with the first row. Let i = 1. 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 4. Check to see if the pivot for row i is zero. 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * The pivot is the element of the main diagonal that is on the current row. 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * For instance, if working with row i, then the pivot element is aii. 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * If the pivot is zero, exchange that row with a row below it that does not 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * contain a zero in column i. If this is not possible, then an inverse 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * to that matrix does not exist. 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 5. Divide every element of row i by the pivot. 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 6. For every row below and row i, replace that row with the sum of that row and 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * a multiple of row i so that each new element in column i below row i is zero. 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * for every element below and above the main diagonal. 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc). 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst). 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *--------------------------------------------------------------------------------------------- 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Working pointer for destination matrix */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pOutT1 = pOut; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over the number of rows */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** rowCnt = numRows; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Making the destination matrix as identity matrix */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (rowCnt > 0U) 1656 .loc 13 127 0 1657 001a 2BB3 cbz r3, .L149 1658 001c 4FEAC308 lsl r8, r3, #3 1659 0020 08F10809 add r9, r8, #8 1660 0024 0127 movs r7, #1 ARM GAS /tmp/cc6NnxTV.s page 190 1661 0026 0826 movs r6, #8 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Writing all zeroes in lower triangle of the destination matrix */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j = numRows - rowCnt; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (j > 0U) 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT1++ = 0.0; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j--; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Writing all ones in the diagonal of the destination matrix */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT1++ = 1.0; 1662 .loc 13 138 0 1663 0028 9FED9D8B vldr.64 d8, .L218 1664 002c 9B46 mov fp, r3 1665 002e 0FE0 b .L150 1666 .LVL239: 1667 .L212: 1668 0030 FFF7FEFF bl memset 1669 .LVL240: 1670 0034 5544 add r5, r5, r10 1671 .LVL241: 1672 0036 A9EB0600 sub r0, r9, r6 1673 003a 2044 add r0, r0, r4 1674 003c 3246 mov r2, r6 1675 003e 0021 movs r1, #0 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Writing all zeroes in upper triangle of the destination matrix */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j = rowCnt - 1U; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (j > 0U) 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT1++ = 0.0; 1676 .loc 13 144 0 1677 0040 2C46 mov r4, r5 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1678 .loc 13 131 0 1679 0042 1FB1 cbz r7, .L152 1680 0044 FFF7FEFF bl memset 1681 .LVL242: 1682 0048 0AEB0804 add r4, r10, r8 1683 .L152: 1684 004c 0836 adds r6, r6, #8 1685 004e 0137 adds r7, r7, #1 1686 .LVL243: 1687 .L150: 1688 0050 A8EB0605 sub r5, r8, r6 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 1689 .loc 13 138 0 1690 0054 04F1080A add r10, r4, #8 1691 .LVL244: 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1692 .loc 13 142 0 1693 0058 5F45 cmp r7, fp 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 1694 .loc 13 138 0 1695 005a 84ED008B vstr.64 d8, [r4] 1696 005e 2A46 mov r2, r5 ARM GAS /tmp/cc6NnxTV.s page 191 1697 0060 4FF00001 mov r1, #0 1698 0064 5046 mov r0, r10 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1699 .loc 13 142 0 1700 0066 E3D1 bne .L212 1701 .LVL245: 1702 .L149: 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j--; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Decrement loop counter */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** rowCnt--; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over the number of columns of the input matrix. 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** All the elements in each column are processed by the row operations */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** loopCnt = numCols; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Index modifier to navigate through the columns */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** l = 0U; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (loopCnt > 0U) 1703 .loc 13 159 0 1704 0068 029B ldr r3, [sp, #8] 1705 006a 002B cmp r3, #0 1706 006c 00F00781 beq .L154 1707 0070 DA00 lsls r2, r3, #3 1708 0072 1146 mov r1, r2 1709 0074 0831 adds r1, r1, #8 1710 0076 1B01 lsls r3, r3, #4 1711 0078 1191 str r1, [sp, #68] 1712 007a 1399 ldr r1, [sp, #76] 1713 007c 0A92 str r2, [sp, #40] 1714 007e 0020 movs r0, #0 1715 0080 0833 adds r3, r3, #8 1716 0082 8C18 adds r4, r1, r2 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** arm_status status; /* status of matrix inverse */ 1717 .loc 13 66 0 1718 0084 CDE90F03 strd r0, r3, [sp, #60] 1719 0088 129B ldr r3, [sp, #72] 1720 .loc 13 159 0 1721 008a 0490 str r0, [sp, #16] 1722 008c 0C94 str r4, [sp, #48] 1723 008e 0892 str r2, [sp, #32] 1724 0090 0391 str r1, [sp, #12] 1725 0092 0593 str r3, [sp, #20] 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** float64_t *pOut = pDst->pData; /* output data matrix pointer */ 1726 .loc 13 55 0 1727 0094 0B91 str r1, [sp, #44] 1728 .LVL246: 1729 .L176: 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Check if the pivot element is zero.. 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * If it is zero then interchange the row with non zero row below. 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * If there is no non zero element to replace in the rows below, 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * then the matrix is Singular. */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** ARM GAS /tmp/cc6NnxTV.s page 192 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Working pointer for the input matrix that points 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * to the pivot element of the particular row */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT1 = pIn + (l * numCols); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Working pointer for the destination matrix that points 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * to the pivot element of the particular row */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pOutT1 = pOut + (l * numCols); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Temporary variable to hold the pivot value */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** in = *pInT1; 1730 .loc 13 175 0 1731 0096 039B ldr r3, [sp, #12] 1732 0098 D3E9009A ldrd r9, [r3] 1733 .LVL247: 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Destination pointer modifier */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** k = 1U; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Check if the pivot element is zero */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if (*pInT1 == 0.0) 1734 .loc 13 181 0 1735 009c 0022 movs r2, #0 1736 009e 0023 movs r3, #0 1737 00a0 4846 mov r0, r9 1738 00a2 5146 mov r1, r10 1739 00a4 FFF7FEFF bl __aeabi_dcmpeq 1740 .LVL248: 1741 00a8 0028 cmp r0, #0 1742 00aa 40F0A280 bne .L213 1743 00ae 049B ldr r3, [sp, #16] 1744 00b0 029A ldr r2, [sp, #8] 1745 00b2 D21A subs r2, r2, r3 1746 00b4 0133 adds r3, r3, #1 1747 00b6 0692 str r2, [sp, #24] 1748 00b8 0D93 str r3, [sp, #52] 1749 00ba 0A9A ldr r2, [sp, #40] 1750 00bc 059B ldr r3, [sp, #20] 1751 00be 1344 add r3, r3, r2 1752 00c0 0E93 str r3, [sp, #56] 1753 .LVL249: 1754 .L164: 1755 00c2 5346 mov r3, r10 1756 00c4 4A46 mov r2, r9 1757 00c6 0020 movs r0, #0 1758 00c8 7749 ldr r1, .L218+8 1759 00ca FFF7FEFF bl __aeabi_ddiv 1760 .LVL250: 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over the number rows present below */ 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** for (i = (l + 1U); i < numRows; i++) 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Update the input and destination pointers */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT2 = pInT1 + (numCols * i); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pOutT2 = pOutT1 + (numCols * k); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Check if there is a non zero pivot element to 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * replace in the rows below */ ARM GAS /tmp/cc6NnxTV.s page 193 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if (*pInT2 != 0.0) 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over number of columns 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * to the right of the pilot element */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j = numCols - l; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (j > 0U) 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Exchange the row elements of the input matrix */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** Xchg = *pInT2; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT2++ = *pInT1; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT1++ = Xchg; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Decrement the loop counter */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j--; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over number of columns of the destination matrix */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j = numCols; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (j > 0U) 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Exchange the row elements of the destination matrix */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** Xchg = *pOutT2; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT2++ = *pOutT1; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT1++ = Xchg; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Decrement loop counter */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j--; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Flag to indicate whether exchange is done or not */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** flag = 1U; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Break after exchange is done */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** break; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Update the destination pointer modifier */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** k++; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Decrement loop counter */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** i--; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Update the status if the matrix is singular */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if ((flag != 1U) && (in == 0.0)) 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** return ARM_MATH_SINGULAR; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Points to the pivot row of input and destination matrices */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pPivotRowIn = pIn + (l * numCols); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pPivotRowDst = pOut + (l * numCols); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Temporary pointers to the pivot row pointers */ ARM GAS /tmp/cc6NnxTV.s page 194 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT1 = pPivotRowIn; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT2 = pPivotRowDst; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Pivot element of the row */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** in = *pPivotRowIn; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over number of columns 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * to the right of the pilot element */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j = (numCols - l); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (j > 0U) 1761 .loc 13 259 0 1762 00ce 069B ldr r3, [sp, #24] 1763 00d0 0446 mov r4, r0 1764 00d2 0D46 mov r5, r1 1765 00d4 5BB1 cbz r3, .L166 1766 00d6 039E ldr r6, [sp, #12] 1767 00d8 1F46 mov r7, r3 1768 .LVL251: 1769 .L167: 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Divide each element of the row of the input matrix 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * by the pivot element */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** in1 = *pInT1; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT1++ = in1 / in; 1770 .loc 13 264 0 1771 00da D6E90023 ldrd r2, [r6] 1772 00de 2046 mov r0, r4 1773 00e0 2946 mov r1, r5 1774 00e2 FFF7FEFF bl __aeabi_dmul 1775 .LVL252: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1776 .loc 13 259 0 1777 00e6 013F subs r7, r7, #1 1778 .LVL253: 1779 .loc 13 264 0 1780 00e8 E6E80201 strd r0, [r6], #8 1781 .LVL254: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1782 .loc 13 259 0 1783 00ec F5D1 bne .L167 1784 .LVL255: 1785 .L166: 1786 00ee DDF80880 ldr r8, [sp, #8] 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 1787 .loc 13 250 0 1788 00f2 059E ldr r6, [sp, #20] 1789 .LVL256: 1790 .L168: 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Decrement the loop counter */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j--; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over number of columns of the destination matrix */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j = numCols; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** ARM GAS /tmp/cc6NnxTV.s page 195 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (j > 0U) 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Divide each element of the row of the destination matrix 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * by the pivot element */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** in1 = *pInT2; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT2++ = in1 / in; 1791 .loc 13 278 0 1792 00f4 D6E90023 ldrd r2, [r6] 1793 00f8 2046 mov r0, r4 1794 00fa 2946 mov r1, r5 1795 00fc FFF7FEFF bl __aeabi_dmul 1796 .LVL257: 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1797 .loc 13 273 0 1798 0100 B8F10108 subs r8, r8, #1 1799 .LVL258: 1800 .loc 13 278 0 1801 0104 E6E80201 strd r0, [r6], #8 1802 .LVL259: 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1803 .loc 13 273 0 1804 0108 F4D1 bne .L168 1805 .LVL260: 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Decrement the loop counter */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j--; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Replace the rows with the sum of that row and a multiple of row i 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * so that each new element in column i above row i is zero.*/ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Temporary pointers for input and destination matrices */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT1 = pIn; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT2 = pOut; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* index used to check for pivot element */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** i = 0U; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over number of rows */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* to be replaced by the sum of that row and a multiple of row i */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** k = numRows; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (k > 0U) 1806 .loc 13 298 0 1807 010a 079B ldr r3, [sp, #28] 1808 010c 002B cmp r3, #0 1809 010e 4AD0 beq .L169 1810 0110 049B ldr r3, [sp, #16] 1811 0112 CDF80080 str r8, [sp] 1812 0116 DB00 lsls r3, r3, #3 1813 0118 0993 str r3, [sp, #36] 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 1814 .loc 13 289 0 1815 011a 129B ldr r3, [sp, #72] 1816 011c 0193 str r3, [sp, #4] 1817 .loc 13 298 0 1818 011e 0B9B ldr r3, [sp, #44] ARM GAS /tmp/cc6NnxTV.s page 196 1819 0120 9B46 mov fp, r3 1820 .LVL261: 1821 .L175: 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Check for the pivot element */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if (i == l) 1822 .loc 13 301 0 1823 0122 049B ldr r3, [sp, #16] 1824 0124 009A ldr r2, [sp] 1825 0126 9342 cmp r3, r2 1826 0128 00F09980 beq .L214 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* If the processing element is the pivot element, 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** only the columns to the right are to be processed */ 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT1 += numCols - l; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT2 += numCols; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** else 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Element of the reference row */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** in = *pInT1; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Working pointers for input and destination pivot rows */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pPRT_in = pPivotRowIn; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pPRT_pDst = pPivotRowDst; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over the number of columns to the right of the pivot element, 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** to replace the elements in the input matrix */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j = (numCols - l); 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (j > 0U) 1827 .loc 13 322 0 1828 012c 069E ldr r6, [sp, #24] 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 1829 .loc 13 312 0 1830 012e DBE9009A ldrd r9, [fp] 1831 .LVL262: 1832 .loc 13 322 0 1833 0132 B6B1 cbz r6, .L172 1834 0134 DDF80C80 ldr r8, [sp, #12] 1835 0138 5F46 mov r7, fp 1836 .LVL263: 1837 .L173: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Replace the element by the sum of that row 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** and a multiple of the reference row */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** in1 = *pInT1; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT1++ = in1 - (in * *pPRT_in++); 1838 .loc 13 327 0 1839 013a F8E80223 ldrd r2, [r8], #8 1840 .LVL264: 1841 013e 4846 mov r0, r9 1842 0140 5146 mov r1, r10 1843 0142 FFF7FEFF bl __aeabi_dmul 1844 .LVL265: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT1++ = in1 - (in * *pPRT_in++); ARM GAS /tmp/cc6NnxTV.s page 197 1845 .loc 13 326 0 1846 0146 D7E90045 ldrd r4, [r7] 1847 .LVL266: 1848 .loc 13 327 0 1849 014a 0246 mov r2, r0 1850 014c 0B46 mov r3, r1 1851 014e 2046 mov r0, r4 1852 0150 2946 mov r1, r5 1853 0152 FFF7FEFF bl __aeabi_dsub 1854 .LVL267: 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1855 .loc 13 322 0 1856 0156 013E subs r6, r6, #1 1857 .LVL268: 1858 .loc 13 327 0 1859 0158 E7E80201 strd r0, [r7], #8 1860 .LVL269: 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1861 .loc 13 322 0 1862 015c EDD1 bne .L173 1863 015e 089B ldr r3, [sp, #32] 1864 0160 9B44 add fp, fp, r3 1865 .LVL270: 1866 .L172: 1867 0162 DDE90154 ldrd r5, r4, [sp, #4] 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 1868 .loc 13 316 0 1869 0166 DDF81480 ldr r8, [sp, #20] 1870 .LVL271: 1871 .L174: 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Decrement the loop counter */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j--; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over the number of columns to 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** replace the elements in the destination matrix */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j = numCols; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (j > 0U) 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Replace the element by the sum of that row 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** and a multiple of the reference row */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** in1 = *pInT2; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT2++ = in1 - (in * *pPRT_pDst++); 1872 .loc 13 342 0 1873 016a F8E80223 ldrd r2, [r8], #8 1874 .LVL272: 1875 016e 4846 mov r0, r9 1876 0170 5146 mov r1, r10 1877 0172 FFF7FEFF bl __aeabi_dmul 1878 .LVL273: 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT2++ = in1 - (in * *pPRT_pDst++); 1879 .loc 13 341 0 1880 0176 D5E90067 ldrd r6, [r5] 1881 .LVL274: 1882 .loc 13 342 0 ARM GAS /tmp/cc6NnxTV.s page 198 1883 017a 0246 mov r2, r0 1884 017c 0B46 mov r3, r1 1885 017e 3046 mov r0, r6 1886 0180 3946 mov r1, r7 1887 0182 FFF7FEFF bl __aeabi_dsub 1888 .LVL275: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1889 .loc 13 337 0 1890 0186 013C subs r4, r4, #1 1891 .LVL276: 1892 .loc 13 342 0 1893 0188 E5E80201 strd r0, [r5], #8 1894 .LVL277: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1895 .loc 13 337 0 1896 018c EDD1 bne .L174 1897 018e 019B ldr r3, [sp, #4] 1898 0190 0A9A ldr r2, [sp, #40] 1899 0192 1344 add r3, r3, r2 1900 0194 0193 str r3, [sp, #4] 1901 .LVL278: 1902 .L171: 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Decrement loop counter */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j--; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Increment temporary input pointer */ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT1 = pInT1 + l; 1903 .loc 13 351 0 1904 0196 099A ldr r2, [sp, #36] 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Decrement loop counter */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** k--; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Increment pivot index */ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** i++; 1905 .loc 13 357 0 1906 0198 009B ldr r3, [sp] 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 1907 .loc 13 351 0 1908 019a 9344 add fp, fp, r2 1909 .LVL279: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1910 .loc 13 298 0 1911 019c 079A ldr r2, [sp, #28] 1912 .loc 13 357 0 1913 019e 0133 adds r3, r3, #1 1914 .LVL280: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1915 .loc 13 298 0 1916 01a0 9A42 cmp r2, r3 1917 .loc 13 357 0 1918 01a2 0093 str r3, [sp] 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { ARM GAS /tmp/cc6NnxTV.s page 199 1919 .loc 13 298 0 1920 01a4 BDD1 bne .L175 1921 .LVL281: 1922 .L169: 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Increment the input pointer */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pIn++; 1923 .loc 13 361 0 1924 01a6 0B9B ldr r3, [sp, #44] 1925 01a8 119A ldr r2, [sp, #68] 1926 01aa 0833 adds r3, r3, #8 1927 01ac 0B93 str r3, [sp, #44] 1928 .LVL282: 1929 01ae 039B ldr r3, [sp, #12] 1930 .LVL283: 1931 01b0 1344 add r3, r3, r2 1932 01b2 0393 str r3, [sp, #12] 1933 .LVL284: 1934 01b4 0E9B ldr r3, [sp, #56] 1935 01b6 109A ldr r2, [sp, #64] 1936 01b8 0593 str r3, [sp, #20] 1937 .LVL285: 1938 01ba 0C9B ldr r3, [sp, #48] 1939 01bc 1344 add r3, r3, r2 1940 01be 0C93 str r3, [sp, #48] 1941 01c0 089B ldr r3, [sp, #32] 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1942 .loc 13 159 0 1943 01c2 029A ldr r2, [sp, #8] 1944 01c4 083B subs r3, r3, #8 1945 01c6 0893 str r3, [sp, #32] 1946 01c8 0D9B ldr r3, [sp, #52] 1947 01ca 0493 str r3, [sp, #16] 1948 01cc 9A42 cmp r2, r3 1949 01ce 7FF462AF bne .L176 1950 .LVL286: 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Decrement the loop counter */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** loopCnt--; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Increment the index modifier */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** l++; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** #else 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** float64_t Xchg, in = 0.0; /* Temporary input values */ 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** arm_status status; /* status of matrix inverse */ 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** #ifdef ARM_MATH_MATRIX_CHECK 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Check for matrix mismatch condition */ 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if ((pSrc->numRows != pSrc->numCols) || 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** (pDst->numRows != pDst->numCols) || ARM GAS /tmp/cc6NnxTV.s page 200 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** (pSrc->numRows != pDst->numRows) ) 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** status = ARM_MATH_SIZE_MISMATCH; 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** else 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /*--------------------------------------------------------------------------------------------- 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Matrix Inverse can be solved using elementary row operations. 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Gauss-Jordan Method: 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 1. First combine the identity matrix and the input matrix separated by a bar to form an 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * augmented matrix as follows: 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * _ _ _ _ _ _ _ _ 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * | | a11 a12 | | | 1 0 | | | X11 X12 | 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * | | | | | | | = | | 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _| 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 2. In our implementation, pDst Matrix is used as identity matrix. 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 3. Begin with the first row. Let i = 1. 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 4. Check to see if the pivot for row i is zero. 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * The pivot is the element of the main diagonal that is on the current row. 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * For instance, if working with row i, then the pivot element is aii. 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * If the pivot is zero, exchange that row with a row below it that does not 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * contain a zero in column i. If this is not possible, then an inverse 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * to that matrix does not exist. 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 5. Divide every element of row i by the pivot. 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 6. For every row below and row i, replace that row with the sum of that row and 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * a multiple of row i so that each new element in column i below row i is zero. 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * for every element below and above the main diagonal. 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * 8. Now an identical matrix is formed to the left of the bar(input matrix, src). 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst). 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *--------------------------------------------------------------------------------------------- 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Working pointer for destination matrix */ 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pOutT1 = pOut; 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over the number of rows */ 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** rowCnt = numRows; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Making the destination matrix as identity matrix */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (rowCnt > 0U) 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Writing all zeroes in lower triangle of the destination matrix */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j = numRows - rowCnt; ARM GAS /tmp/cc6NnxTV.s page 201 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (j > 0U) 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT1++ = 0.0; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j--; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Writing all ones in the diagonal of the destination matrix */ 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT1++ = 1.0; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Writing all zeroes in upper triangle of the destination matrix */ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j = rowCnt - 1U; 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (j > 0U) 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT1++ = 0.0; 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** j--; 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Decrement loop counter */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** rowCnt--; 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over the number of columns of the input matrix. 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** All the elements in each column are processed by the row operations */ 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** loopCnt = numCols; 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Index modifier to navigate through the columns */ 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** l = 0U; 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** while (loopCnt > 0U) 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Check if the pivot element is zero.. 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * If it is zero then interchange the row with non zero row below. 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * If there is no non zero element to replace in the rows below, 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * then the matrix is Singular. */ 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Working pointer for the input matrix that points 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * to the pivot element of the particular row */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT1 = pIn + (l * numCols); 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Working pointer for the destination matrix that points 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * to the pivot element of the particular row */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pOutT1 = pOut + (l * numCols); 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Temporary variable to hold the pivot value */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** in = *pInT1; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Destination pointer modifier */ 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** k = 1U; 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Check if the pivot element is zero */ 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if (*pInT1 == 0.0) 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over the number rows present below */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** for (i = (l + 1U); i < numRows; i++) 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Update the input and destination pointers */ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT2 = pInT1 + (numCols * i); ARM GAS /tmp/cc6NnxTV.s page 202 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pOutT2 = pOutT1 + (numCols * k); 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Check if there is a non zero pivot element to 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * replace in the rows below */ 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if (*pInT2 != 0.0) 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over number of columns 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * to the right of the pilot element */ 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** for (j = 0U; j < (numCols - l); j++) 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Exchange the row elements of the input matrix */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** Xchg = *pInT2; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT2++ = *pInT1; 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT1++ = Xchg; 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** for (j = 0U; j < numCols; j++) 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** Xchg = *pOutT2; 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT2++ = *pOutT1; 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT1++ = Xchg; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Flag to indicate whether exchange is done or not */ 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** flag = 1U; 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Break after exchange is done */ 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** break; 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Update the destination pointer modifier */ 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** k++; 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Update the status if the matrix is singular */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if ((flag != 1U) && (in == 0.0)) 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** return ARM_MATH_SINGULAR; 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Points to the pivot row of input and destination matrices */ 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pPivotRowIn = pIn + (l * numCols); 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pPivotRowDst = pOut + (l * numCols); 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Temporary pointers to the pivot row pointers */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT1 = pPivotRowIn; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pOutT1 = pPivotRowDst; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Pivot element of the row */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** in = *(pIn + (l * numCols)); 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over number of columns 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * to the right of the pilot element */ 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** for (j = 0U; j < (numCols - l); j++) 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Divide each element of the row of the input matrix ARM GAS /tmp/cc6NnxTV.s page 203 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * by the pivot element */ 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT1 = *pInT1 / in; 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT1++; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** for (j = 0U; j < numCols; j++) 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Divide each element of the row of the destination matrix 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * by the pivot element */ 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT1 = *pOutT1 / in; 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pOutT1++; 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Replace the rows with the sum of that row and a multiple of row i 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** * so that each new element in column i above row i is zero.*/ 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Temporary pointers for input and destination matrices */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT1 = pIn; 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pOutT1 = pOut; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** for (i = 0U; i < numRows; i++) 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Check for the pivot element */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if (i == l) 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* If the processing element is the pivot element, 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** only the columns to the right are to be processed */ 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT1 += numCols - l; 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pOutT1 += numCols; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** else 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Element of the reference row */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** in = *pInT1; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Working pointers for input and destination pivot rows */ 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pPRT_in = pPivotRowIn; 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pPRT_pDst = pPivotRowDst; 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over the number of columns to the right of the pivot element, 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** to replace the elements in the input matrix */ 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** for (j = 0U; j < (numCols - l); j++) 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Replace the element by the sum of that row 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** and a multiple of the reference row */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT1 = *pInT1 - (in * *pPRT_in++); 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT1++; 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Loop over the number of columns to 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** replace the elements in the destination matrix */ 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** for (j = 0U; j < numCols; j++) 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Replace the element by the sum of that row 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** and a multiple of the reference row */ 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT1 = *pOutT1 - (in * *pPRT_pDst++); 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pOutT1++; 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } ARM GAS /tmp/cc6NnxTV.s page 204 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Increment temporary input pointer */ 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pInT1 = pInT1 + l; 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Increment the input pointer */ 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pIn++; 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Decrement the loop counter */ 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** loopCnt--; 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Increment the index modifier */ 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** l++; 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** #endif /* #if defined (ARM_MATH_DSP) */ 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Set status as ARM_MATH_SUCCESS */ 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** status = ARM_MATH_SUCCESS; 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if ((flag != 1U) && (in == 0.0)) 1951 .loc 13 632 0 1952 01d2 0F9B ldr r3, [sp, #60] 1953 01d4 012B cmp r3, #1 1954 01d6 49D0 beq .L181 1955 .loc 13 632 0 is_stmt 0 discriminator 1 1956 01d8 4846 mov r0, r9 1957 01da 5146 mov r1, r10 1958 01dc 0022 movs r2, #0 1959 01de 0023 movs r3, #0 1960 01e0 FFF7FEFF bl __aeabi_dcmpeq 1961 .LVL287: 1962 01e4 0028 cmp r0, #0 1963 01e6 61D1 bne .L178 1964 .L210: 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** pIn = pSrc->pData; 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** for (i = 0; i < numRows * numCols; i++) 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if (pIn[i] != 0.0) 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** break; 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** if (i == numRows * numCols) 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** status = ARM_MATH_SINGULAR; 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** /* Return to application */ 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** return (status); 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 1965 .loc 13 648 0 is_stmt 1 1966 01e8 15B0 add sp, sp, #84 1967 .LCFI27: 1968 .cfi_remember_state ARM GAS /tmp/cc6NnxTV.s page 205 1969 .cfi_def_cfa_offset 44 1970 @ sp needed 1971 01ea BDEC028B vldm sp!, {d8} 1972 .LCFI28: 1973 .cfi_restore 80 1974 .cfi_restore 81 1975 .cfi_def_cfa_offset 36 1976 01ee BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 1977 .LVL288: 1978 .L213: 1979 .LCFI29: 1980 .cfi_restore_state 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1981 .loc 13 184 0 1982 01f2 049B ldr r3, [sp, #16] 1983 01f4 079A ldr r2, [sp, #28] 1984 01f6 0133 adds r3, r3, #1 1985 01f8 9342 cmp r3, r2 1986 01fa 0D93 str r3, [sp, #52] 1987 01fc 3CD2 bcs .L158 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 1988 .loc 13 192 0 1989 01fe 0C9C ldr r4, [sp, #48] 1990 0200 0022 movs r2, #0 1991 0202 0023 movs r3, #0 1992 0204 D4E90001 ldrd r0, [r4] 1993 .LVL289: 1994 0208 FFF7FEFF bl __aeabi_dcmpeq 1995 .LVL290: 1996 020c 00B1 cbz r0, .L215 1997 .LVL291: 1998 .L159: 1999 020e FEE7 b .L159 2000 .LVL292: 2001 .L215: 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 2002 .loc 13 198 0 2003 0210 029B ldr r3, [sp, #8] 2004 0212 049A ldr r2, [sp, #16] 2005 0214 9B1A subs r3, r3, r2 2006 .LVL293: 2007 0216 0693 str r3, [sp, #24] 2008 0218 0BD0 beq .L161 2009 021a 1A46 mov r2, r3 2010 021c 039B ldr r3, [sp, #12] 2011 .LVL294: 2012 .L162: 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT2++ = *pInT1; 2013 .loc 13 201 0 2014 021e D4E90001 ldrd r0, [r4] 2015 .LVL295: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT1++ = Xchg; 2016 .loc 13 202 0 2017 0222 D3E90067 ldrd r6, [r3] 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 2018 .loc 13 198 0 2019 0226 013A subs r2, r2, #1 ARM GAS /tmp/cc6NnxTV.s page 206 2020 .LVL296: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pInT1++ = Xchg; 2021 .loc 13 202 0 2022 0228 E4E80267 strd r6, [r4], #8 2023 .LVL297: 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 2024 .loc 13 203 0 2025 022c E3E80201 strd r0, [r3], #8 2026 .LVL298: 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 2027 .loc 13 198 0 2028 0230 F5D1 bne .L162 2029 .LVL299: 2030 .L161: 2031 0232 059B ldr r3, [sp, #20] 2032 0234 0A9A ldr r2, [sp, #40] 2033 0236 9A18 adds r2, r3, r2 2034 0238 0E92 str r2, [sp, #56] 2035 023a 1146 mov r1, r2 2036 .LVL300: 2037 023c 029A ldr r2, [sp, #8] 2038 .LVL301: 2039 .L163: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT2++ = *pOutT1; 2040 .loc 13 215 0 2041 023e D1E90045 ldrd r4, [r1] 2042 .LVL302: 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT1++ = Xchg; 2043 .loc 13 216 0 2044 0242 D3E90067 ldrd r6, [r3] 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 2045 .loc 13 212 0 2046 0246 013A subs r2, r2, #1 2047 .LVL303: 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** *pOutT1++ = Xchg; 2048 .loc 13 216 0 2049 0248 E1E80267 strd r6, [r1], #8 2050 .LVL304: 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 2051 .loc 13 217 0 2052 024c E3E80245 strd r4, [r3], #8 2053 .LVL305: 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 2054 .loc 13 212 0 2055 0250 F5D1 bne .L163 2056 0252 039B ldr r3, [sp, #12] 2057 .LVL306: 2058 0254 D3E9009A ldrd r9, [r3] 2059 .LVL307: 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 2060 .loc 13 224 0 2061 0258 0123 movs r3, #1 2062 025a 0F93 str r3, [sp, #60] 2063 .LVL308: 2064 025c 31E7 b .L164 2065 .LVL309: 2066 .L214: ARM GAS /tmp/cc6NnxTV.s page 207 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 2067 .loc 13 305 0 2068 025e 089B ldr r3, [sp, #32] 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 2069 .loc 13 307 0 2070 0260 0A9A ldr r2, [sp, #40] 2071 .LVL310: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 2072 .loc 13 305 0 2073 0262 9B44 add fp, fp, r3 2074 .LVL311: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 2075 .loc 13 307 0 2076 0264 019B ldr r3, [sp, #4] 2077 0266 1344 add r3, r3, r2 2078 0268 0193 str r3, [sp, #4] 2079 .LVL312: 2080 026a 94E7 b .L171 2081 .LVL313: 2082 .L181: 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** 2083 .loc 13 630 0 2084 026c 0020 movs r0, #0 2085 .loc 13 648 0 2086 026e 15B0 add sp, sp, #84 2087 .LCFI30: 2088 .cfi_remember_state 2089 .cfi_def_cfa_offset 44 2090 @ sp needed 2091 0270 BDEC028B vldm sp!, {d8} 2092 .LCFI31: 2093 .cfi_restore 80 2094 .cfi_restore 81 2095 .cfi_def_cfa_offset 36 2096 0274 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 2097 .LVL314: 2098 .L158: 2099 .LCFI32: 2100 .cfi_restore_state 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 2101 .loc 13 239 0 2102 0278 0F9B ldr r3, [sp, #60] 2103 027a 012B cmp r3, #1 2104 027c 06D0 beq .L216 2105 .LVL315: 2106 .L154: 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 2107 .loc 13 642 0 2108 027e 6FF00400 mvn r0, #4 2109 .L217: 2110 .loc 13 648 0 2111 0282 15B0 add sp, sp, #84 2112 .LCFI33: 2113 .cfi_remember_state 2114 .cfi_def_cfa_offset 44 2115 @ sp needed 2116 0284 BDEC028B vldm sp!, {d8} ARM GAS /tmp/cc6NnxTV.s page 208 2117 .LCFI34: 2118 .cfi_restore 80 2119 .cfi_restore 81 2120 .cfi_def_cfa_offset 36 2121 0288 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 2122 .LVL316: 2123 .L216: 2124 .LCFI35: 2125 .cfi_restore_state 2126 028c 049A ldr r2, [sp, #16] 2127 028e 029B ldr r3, [sp, #8] 2128 .LVL317: 2129 0290 9B1A subs r3, r3, r2 2130 0292 0693 str r3, [sp, #24] 2131 0294 0A9A ldr r2, [sp, #40] 2132 0296 059B ldr r3, [sp, #20] 2133 0298 1344 add r3, r3, r2 2134 029a 0E93 str r3, [sp, #56] 2135 029c 11E7 b .L164 2136 .L219: 2137 029e 00BF .align 3 2138 .L218: 2139 02a0 00000000 .word 0 2140 02a4 0000F03F .word 1072693248 2141 02a8 0000F03F .word 1072693248 2142 .LVL318: 2143 .L178: 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 2144 .loc 13 635 0 2145 02ac 029C ldr r4, [sp, #8] 2146 02ae 079B ldr r3, [sp, #28] 2147 02b0 04FB03F4 mul r4, r4, r3 2148 02b4 002C cmp r4, #0 2149 02b6 E2D0 beq .L154 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** break; 2150 .loc 13 637 0 2151 02b8 139D ldr r5, [sp, #76] 2152 02ba 0022 movs r2, #0 2153 02bc 0023 movs r3, #0 2154 02be D5E90001 ldrd r0, [r5] 2155 02c2 FFF7FEFF bl __aeabi_dcmpeq 2156 .LVL319: 2157 02c6 0028 cmp r0, #0 2158 02c8 8ED0 beq .L210 2159 02ca 0835 adds r5, r5, #8 2160 02cc 0026 movs r6, #0 2161 02ce 0027 movs r7, #0 2162 02d0 DDF83C80 ldr r8, [sp, #60] 2163 02d4 05E0 b .L179 2164 .LVL320: 2165 .L180: 2166 02d6 F5E80201 ldrd r0, [r5], #8 2167 02da FFF7FEFF bl __aeabi_dcmpeq 2168 .LVL321: 2169 02de 0028 cmp r0, #0 2170 02e0 82D0 beq .L210 2171 .LVL322: ARM GAS /tmp/cc6NnxTV.s page 209 2172 .L179: 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 2173 .loc 13 635 0 discriminator 2 2174 02e2 08F10108 add r8, r8, #1 2175 .LVL323: 2176 02e6 4445 cmp r4, r8 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** break; 2177 .loc 13 637 0 discriminator 2 2178 02e8 3246 mov r2, r6 2179 02ea 3B46 mov r3, r7 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** { 2180 .loc 13 635 0 discriminator 2 2181 02ec F3D1 bne .L180 2182 .LVL324: 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c **** } 2183 .loc 13 642 0 2184 02ee 6FF00400 mvn r0, #4 2185 02f2 C6E7 b .L217 2186 .cfi_endproc 2187 .LFE158: 2189 .section .text.arm_mat_mult_f32,"ax",%progbits 2190 .align 1 2191 .p2align 2,,3 2192 .global arm_mat_mult_f32 2193 .syntax unified 2194 .thumb 2195 .thumb_func 2196 .fpu fpv4-sp-d16 2198 arm_mat_mult_f32: 2199 .LFB159: 2200 .file 14 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Title: arm_mat_mult_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Description: Floating-point matrix multiplication 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * limitations under the License. ARM GAS /tmp/cc6NnxTV.s page 210 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * @defgroup MatrixMult Matrix Multiplication 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Multiplies two matrices. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices" 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Matrix multiplication is only defined if the number of columns of the 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * first matrix equals the number of rows of the second matrix. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Multiplying an M x N matrix with an N x P matrix results 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * in an M x P matrix. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * pSrcA and pSrcB are equal; and (2) that the size of the output 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * matrix equals the outer dimensions of pSrcA and pSrcB. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * @addtogroup MatrixMult 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * @{ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * @brief Floating-point matrix multiplication. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * @param[in] *pSrcA points to the first input matrix structure 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * @param[in] *pSrcB points to the second input matrix structure 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * @param[out] *pDst points to output matrix structure 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * @return The function returns either 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of siz 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #define MATRIX_DIM3 3 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #define MATRIX_DIM4 4 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** __STATIC_INLINE arm_status arm_mat_mult_f32_2x2_mve( 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** const arm_matrix_instance_f32 *pSrcA, 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** const arm_matrix_instance_f32 *pSrcB, 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_matrix_instance_f32 *pDst) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* {a00, a00, a10, a10} */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** static const uint32_t offsetA0[4] = { 0, 0, 2, 2 }; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* {b00, b01, b00, b01} */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** static const uint32_t offsetB0[4] = { 0, 1, 0, 1 }; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* {a01, a01, a11, a11} */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** static const uint32_t offsetA1[4] = { 1, 1, 3, 3 }; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* {b10, b11, b10, b11} */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** static const uint32_t offsetB1[4] = { 2, 3, 2, 3 }; ARM GAS /tmp/cc6NnxTV.s page 211 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint32x4_t vecOffsA, vecOffsB; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** f32x4_t vecInA, vecInB, vecDst; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecOffsA = vldrwq_u32((uint32_t const *) offsetA0); 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecOffsB = vldrwq_u32((uint32_t const *) offsetB0); 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInA = vldrwq_gather_shifted_offset((float32_t const *) pSrcA->pData, vecOffsA); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = vldrwq_gather_shifted_offset((float32_t const *) pSrcB->pData, vecOffsB); 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecDst = vmulq(vecInA, vecInB); 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecOffsA = vldrwq_u32((uint32_t const *) offsetA1); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecOffsB = vldrwq_u32((uint32_t const *) offsetB1); 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInA = vldrwq_gather_shifted_offset((float32_t const *) pSrcA->pData, vecOffsA); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = vldrwq_gather_shifted_offset((float32_t const *) pSrcB->pData, vecOffsB); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecDst = vfmaq(vecDst, vecInA, vecInB); 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vstrwq_f32(pDst->pData, vecDst); 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** return (ARM_MATH_SUCCESS); 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * A = {{a00, a01, a02}, 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * {a10, a11, a12}, 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * {a20, a21, a22}} 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * B = {{b00, b01, b02}, 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * {b10, b11, b12}, 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * {b20, b21, b22}} 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Dst = {{a00 b00 + a01 b10 + a02 b20, a00 b01 + a01 b11 + a02 b21, a00 b02 + a01 b12 + a02 b22}, 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * {a10 b00 + a11 b10 + a12 b20, a10 b01 + a11 b11 + a12 b21, a10 b02 + a11 b12 + a12 b22}, 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * {a20 b00 + a21 b10 + a22 b20, a20 b01 + a21 b11 + a22 b21, a20 b02 + a21 b12 + a22 b22}} 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** __STATIC_INLINE arm_status arm_mat_mult_f32_3x3_mve( 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** const arm_matrix_instance_f32 *pSrcA, 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** const arm_matrix_instance_f32 *pSrcB, 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_matrix_instance_f32 *pDst) 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInA0, *pInA1, *pInA2; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** f32x4_t vecMac0, vecMac1, vecMac2; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** f32x4_t vecInB; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t const *pSrBVec; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pSrBVec = (float32_t const *) pInB; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA0 = pInA; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA1 = pInA0 + MATRIX_DIM3; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA2 = pInA1 + MATRIX_DIM3; ARM GAS /tmp/cc6NnxTV.s page 212 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* enable predication to disable last (4th) vector element */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** mve_pred16_t p0 = vctp32q(MATRIX_DIM3); 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * load {b0,0, b0,1, b0,2, 0} 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = vldrwq_z_f32(pSrBVec, p0); 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pSrBVec += MATRIX_DIM3; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vmulq(vecInB, *pInA0++); 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac1 = vmulq(vecInB, *pInA1++); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac2 = vmulq(vecInB, *pInA2++); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * load {b1,0, b1,1, b1,2, 0} 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = vldrwq_z_f32(pSrBVec, p0); 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pSrBVec += MATRIX_DIM3; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * load {b2,0, b2,1 , b2,2, 0} 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = vldrwq_z_f32(pSrBVec, p0); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pSrBVec += MATRIX_DIM3; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* partial vector stores */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vstrwq_p_f32(pOut, vecMac0, p0); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut += MATRIX_DIM3; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vstrwq_p_f32(pOut, vecMac1, p0); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut += MATRIX_DIM3; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vstrwq_p_f32(pOut, vecMac2, p0); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Return to application 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** return (ARM_MATH_SUCCESS); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** __STATIC_INLINE arm_status arm_mat_mult_f32_4x4_mve( 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** const arm_matrix_instance_f32 *pSrcA, 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** const arm_matrix_instance_f32 *pSrcB, 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_matrix_instance_f32 *pDst) 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t const *pSrBVec; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInA0, *pInA1, *pInA2, *pInA3; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** f32x4_t vecMac0, vecMac1, vecMac2, vecMac3; ARM GAS /tmp/cc6NnxTV.s page 213 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** f32x4_t vecInB; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pSrBVec = (float32_t const *) pInB; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA0 = pInA; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA1 = pInA0 + MATRIX_DIM4; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA2 = pInA1 + MATRIX_DIM4; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA3 = pInA2 + MATRIX_DIM4; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * load {b0,0, b0,1, b0,2, b0,3} 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = vld1q(pSrBVec); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pSrBVec += MATRIX_DIM4; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vmulq(vecInB, *pInA0++); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac1 = vmulq(vecInB, *pInA1++); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac2 = vmulq(vecInB, *pInA2++); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac3 = vmulq(vecInB, *pInA3++); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * load {b1,0, b1,1, b1,2, b1,3} 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = vld1q(pSrBVec); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pSrBVec += MATRIX_DIM4; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * load {b2,0, b2,1, b2,2, b2,3} 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = vld1q(pSrBVec); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pSrBVec += MATRIX_DIM4; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * load {b3,0, b3,1, b3,2, b3,3} 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = vld1q(pSrBVec); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pSrBVec += MATRIX_DIM4; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vst1q(pOut, vecMac0); 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut += MATRIX_DIM4; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vst1q(pOut, vecMac1); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut += MATRIX_DIM4; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vst1q(pOut, vecMac2); 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut += MATRIX_DIM4; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vst1q(pOut, vecMac3); 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* ARM GAS /tmp/cc6NnxTV.s page 214 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Return to application 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** return (ARM_MATH_SUCCESS); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_status arm_mat_mult_f32( 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** const arm_matrix_instance_f32 * pSrcA, 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** const arm_matrix_instance_f32 * pSrcB, 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_matrix_instance_f32 * pDst) 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** int numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** int numColsB = pSrcB->numCols; /* number of columns of input matrix B */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** int numColsA = pSrcA->numCols; /* number of columns of input matrix A */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint32_t blkCnt; /* loop counters */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint32_t i; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_status status; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Check for matrix mismatch condition */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** if ((pSrcA->numCols != pSrcB->numRows) || 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** else 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* small squared matrix specialized routines */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** if(numRowsA == numColsB && numColsB == numColsA) { 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** if (numRowsA == 1) 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut[0] = pInA[0] * pInB[0]; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** return(ARM_MATH_SUCCESS); 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** else if(numRowsA == 2) 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** return arm_mat_mult_f32_2x2_mve(pSrcA, pSrcB, pDst); 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** else if(numRowsA == 3) 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** return arm_mat_mult_f32_3x3_mve(pSrcA, pSrcB, pDst); 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** else if(numRowsA == 4) 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** return arm_mat_mult_f32_4x4_mve(pSrcA, pSrcB, pDst); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* main loop process 4 rows */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** i = numRowsA >> 2; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (i > 0U) 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInA0, *pInA1, *pInA2, *pInA3; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInB0; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pOut0, *pOut1, *pOut2, *pOut3; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** f32x4_t vecMac0, vecMac1, vecMac2, vecMac3; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** f32x4_t vecInB; ARM GAS /tmp/cc6NnxTV.s page 215 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* pointers to 4 consecutive output rows */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut0 = pOut; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut1 = pOut0 + numColsB; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut2 = pOut1 + numColsB; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut3 = pOut2 + numColsB; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInB0 = pInB; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint32_t k = numColsB >> 2; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (k > 0U) 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* pointers to 4 consecutive Matrix A rows */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA0 = pInA; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA1 = pInA0 + numColsA; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA2 = pInA1 + numColsA; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA3 = pInA2 + numColsA; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vdupq_n_f32(0.0f); 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac1 = vdupq_n_f32(0.0f); 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac2 = vdupq_n_f32(0.0f); 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac3 = vdupq_n_f32(0.0f); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** blkCnt = numColsA; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (blkCnt > 0U) 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3} 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = *(f32x4_t *)pInB0; /* vldrwq_f32(pInB0, 0); */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++); 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInB0 = pInB0 + numColsB; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Decrement the blockSize loop counter 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** blkCnt--; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Store the results (4 x 4 block) in the destination buffer */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vst1q(pOut0, vecMac0); 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut0 += 4; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vst1q(pOut1, vecMac1); 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut1 += 4; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vst1q(pOut2, vecMac2); 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut2 += 4; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vst1q(pOut3, vecMac3); 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut3 += 4; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * rewind 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInB0 -= (numColsB * numColsA) - 4; ARM GAS /tmp/cc6NnxTV.s page 216 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** k--; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** int colBLeft = numColsB & 3; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** if (colBLeft) 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA0 = pInA; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA1 = pInA0 + numColsA; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA2 = pInA1 + numColsA; 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA3 = pInA2 + numColsA; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** mve_pred16_t p0 = vctp32q(colBLeft); 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vdupq_n_f32(0.0f); 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac1 = vdupq_n_f32(0.0f); 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac2 = vdupq_n_f32(0.0f); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac3 = vdupq_n_f32(0.0f); 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** blkCnt = numColsA; 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (blkCnt > 0U) 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3} 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = vldrwq_z_f32(pInB0, p0); 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++); 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInB0 = pInB0 + numColsB; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Decrement the blockSize loop counter 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** blkCnt--; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Store the results (4 x colBLeft block) in the destination buffer */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vstrwq_p_f32(pOut0, vecMac0, p0); 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vstrwq_p_f32(pOut1, vecMac1, p0); 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vstrwq_p_f32(pOut2, vecMac2, p0); 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vstrwq_p_f32(pOut3, vecMac3, p0); 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* move to next rows */ 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA += 4 * numColsA; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut += 4 * numColsB; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** i--; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * non multiple of 4 rows for Matrix A 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * process single row 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** if (numRowsA & 3) 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { ARM GAS /tmp/cc6NnxTV.s page 217 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** i = numRowsA & 3; 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (i > 0U) 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInA0; 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInB0; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pOut0; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** f32x4_t vecInB; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** f32x4_t vecMac0; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut0 = pOut; 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInB0 = pInB; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint32_t k = numColsB >> 2; 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (k > 0U) 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA0 = pInA; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vdupq_n_f32(0.0f); 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** blkCnt = numColsA; 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (blkCnt > 0U) 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3} 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = *(f32x4_t *)pInB0; /* vldrwq_f32(pInB0, 0); */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInB0 = pInB0 + numColsB; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Decrement the blockSize loop counter 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** blkCnt--; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Store the results (1 x 4 block) in the destination buffer */ 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vst1q(pOut0, vecMac0); 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut0 += 4; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * rewind 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInB0 -= (numColsB * numColsA) - 4; 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** k--; 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** int colBLeft = numColsB & 3; 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** if (colBLeft) 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA0 = pInA; 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** mve_pred16_t p0 = vctp32q(colBLeft); 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vdupq_n_f32(0.0f); 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** blkCnt = numColsA; 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (blkCnt > 0U) 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* ARM GAS /tmp/cc6NnxTV.s page 218 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3} 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecInB = vldrwq_z_f32(pInB0, p0); 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInB0 = pInB0 + numColsB; 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** * Decrement the blockSize loop counter 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** blkCnt--; 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Store the results (1 x colBLeft block) in the destination buffer */ 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** vstrwq_p_f32(pOut0, vecMac0, p0); 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* move to next row */ 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA += 1 * numColsA; 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pOut += 1 * numColsB; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** i--; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** status = ARM_MATH_SUCCESS; 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Return to application */ 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** return (status); 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #else 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #if defined(ARM_MATH_NEON) 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #define GROUPOFROWS 8 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_status arm_mat_mult_f32( 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** const arm_matrix_instance_f32 * pSrcA, 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** const arm_matrix_instance_f32 * pSrcB, 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_matrix_instance_f32 * pDst) 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *px; /* Temporary output data matrix pointer */ 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t sum; /* Accumulator */ 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint16_t col, i = 0U, j, row = numRowsA, rowCnt, colCnt; /* loop counters */ 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_status status; /* status of matrix multiplication */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32x4_t a0V, a1V, a2V, a3V, a4V, a5V, a6V, a7V; 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32x4_t acc0,acc1,acc2,acc3,acc4,acc5,acc6,acc7,temp; 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32x2_t accum = vdup_n_f32(0); ARM GAS /tmp/cc6NnxTV.s page 219 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pIn1B = pSrcA->pData; 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pIn1C = pSrcA->pData; 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pIn1D = pSrcA->pData; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pIn1E = pSrcA->pData; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pIn1F = pSrcA->pData; 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pIn1G = pSrcA->pData; 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pIn1H = pSrcA->pData; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pxB,*pxC, *pxD, *pxE, *pxF, *pxG, *pxH; /* Temporary o 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t sum0,sum1, sum2,sum3, sum4, sum5 , sum6, sum7; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Check for matrix mismatch condition */ 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** if ((pSrcA->numCols != pSrcB->numRows) || 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** else 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB * 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Row loop */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** rowCnt = row >> 3; 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while(rowCnt > 0) 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Output pointer is set to starting address of the row being processed */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** px = pOut + GROUPOFROWS*i; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pxB = px + numColsB; 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pxC = px + 2*numColsB; 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pxD = px + 3*numColsB; 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pxE = px + 4*numColsB; 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pxF = px + 5*numColsB; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pxG = px + 6*numColsB; 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pxH = px + 7*numColsB; 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* For every row wise process, the column loop counter is to be initiated */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** col = numColsB; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* For every row wise process, the pIn2 pointer is set 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** ** to the starting address of the pSrcB data */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 = pSrcB->pData; 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** j = 0U; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Column loop */ 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** do 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Set the variable sum, that acts as accumulator, to zero */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum0 = 0.0f; 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum1 = 0.0f; 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum2 = 0.0f; 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum3 = 0.0f; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum4 = 0.0f; ARM GAS /tmp/cc6NnxTV.s page 220 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum5 = 0.0f; 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum6 = 0.0f; 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum7 = 0.0f; 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Initiate the pointer pIn1 to point to the starting address of the column being processed 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1 = pInA; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1B = pIn1 + numColsA; 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1C = pIn1 + 2*numColsA; 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1D = pIn1 + 3*numColsA; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1E = pIn1 + 4*numColsA; 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1F = pIn1 + 5*numColsA; 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1G = pIn1 + 6*numColsA; 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1H = pIn1 + 7*numColsA; 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc0 = vdupq_n_f32(0.0); 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc1 = vdupq_n_f32(0.0); 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc2 = vdupq_n_f32(0.0); 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc3 = vdupq_n_f32(0.0); 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc4 = vdupq_n_f32(0.0); 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc5 = vdupq_n_f32(0.0); 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc6 = vdupq_n_f32(0.0); 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc7 = vdupq_n_f32(0.0); 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Compute 4 MACs simultaneously. */ 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt = numColsA >> 2U; 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Matrix multiplication */ 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (colCnt > 0U) 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */ 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** a0V = vld1q_f32(pIn1); 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** a1V = vld1q_f32(pIn1B); 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** a2V = vld1q_f32(pIn1C); 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** a3V = vld1q_f32(pIn1D); 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** a4V = vld1q_f32(pIn1E); 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** a5V = vld1q_f32(pIn1F); 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** a6V = vld1q_f32(pIn1G); 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** a7V = vld1q_f32(pIn1H); 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1 += 4; 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1B += 4; 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1C += 4; 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1D += 4; 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1E += 4; 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1F += 4; 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1G += 4; 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1H += 4; 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** temp = vsetq_lane_f32(*pIn2,temp,0); 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** temp = vsetq_lane_f32(*pIn2,temp,1); 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** temp = vsetq_lane_f32(*pIn2,temp,2); 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** temp = vsetq_lane_f32(*pIn2,temp,3); 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 221 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc0 = vmlaq_f32(acc0,a0V,temp); 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc1 = vmlaq_f32(acc1,a1V,temp); 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc2 = vmlaq_f32(acc2,a2V,temp); 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc3 = vmlaq_f32(acc3,a3V,temp); 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc4 = vmlaq_f32(acc4,a4V,temp); 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc5 = vmlaq_f32(acc5,a5V,temp); 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc6 = vmlaq_f32(acc6,a6V,temp); 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc7 = vmlaq_f32(acc7,a7V,temp); 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Decrement the loop count */ 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt--; 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** accum = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0)); 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum0 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** accum = vpadd_f32(vget_low_f32(acc1), vget_high_f32(acc1)); 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** accum = vpadd_f32(vget_low_f32(acc2), vget_high_f32(acc2)); 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum2 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** accum = vpadd_f32(vget_low_f32(acc3), vget_high_f32(acc3)); 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum3 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** accum = vpadd_f32(vget_low_f32(acc4), vget_high_f32(acc4)); 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum4 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** accum = vpadd_f32(vget_low_f32(acc5), vget_high_f32(acc5)); 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum5 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** accum = vpadd_f32(vget_low_f32(acc6), vget_high_f32(acc6)); 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum6 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** accum = vpadd_f32(vget_low_f32(acc7), vget_high_f32(acc7)); 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum7 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** ** No loop unrolling is used. */ 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt = numColsA & 3; 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (colCnt > 0U) 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */ 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum0 += *pIn1++ * (*pIn2); 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum1 += *pIn1B++ * (*pIn2); 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum2 += *pIn1C++ * (*pIn2); 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum3 += *pIn1D++ * (*pIn2); 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum4 += *pIn1E++ * (*pIn2); 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum5 += *pIn1F++ * (*pIn2); 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum6 += *pIn1G++ * (*pIn2); 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum7 += *pIn1H++ * (*pIn2); 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Decrement the loop counter */ 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt--; 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } ARM GAS /tmp/cc6NnxTV.s page 222 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Store the result in the destination buffer */ 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** *px++ = sum0; 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** *pxB++ = sum1; 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** *pxC++ = sum2; 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** *pxD++ = sum3; 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** *pxE++ = sum4; 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** *pxF++ = sum5; 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** *pxG++ = sum6; 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** *pxH++ = sum7; 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Update the pointer pIn2 to point to the starting address of the next column */ 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** j++; 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 = pSrcB->pData + j; 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Decrement the column loop counter */ 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** col--; 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } while (col > 0U); 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Update the pointer pInA to point to the starting address of the next row */ 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** i = i + numColsB; 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA = pInA + GROUPOFROWS*numColsA; 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Decrement the row loop counter */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** rowCnt--; 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** i was the index of a group of rows computed by previous loop. 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** Now i is the index of a row since below code is computing row per row 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** and no more group of row per group of rows. 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** */ 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** i = GROUPOFROWS*i; 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** rowCnt = row & 7; 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while(rowCnt > 0) 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Output pointer is set to starting address of the row being processed */ 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** px = pOut + i; 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* For every row wise process, the column loop counter is to be initiated */ 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** col = numColsB; 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* For every row wise process, the pIn2 pointer is set 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** ** to the starting address of the pSrcB data */ 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 = pSrcB->pData; 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** j = 0U; 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Column loop */ 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** do 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Set the variable sum, that acts as accumulator, to zero */ ARM GAS /tmp/cc6NnxTV.s page 223 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum = 0.0f; 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Initiate the pointer pIn1 to point to the starting address of the column being processed 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1 = pInA; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc0 = vdupq_n_f32(0.0); 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Compute 4 MACs simultaneously. */ 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt = numColsA >> 2U; 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Matrix multiplication */ 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (colCnt > 0U) 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */ 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** a0V = vld1q_f32(pIn1); // load & separate real/imag pSrcA (de-interleave 2) 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1 += 4; 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** temp = vsetq_lane_f32(*pIn2,temp,0); 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** temp = vsetq_lane_f32(*pIn2,temp,1); 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** temp = vsetq_lane_f32(*pIn2,temp,2); 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** temp = vsetq_lane_f32(*pIn2,temp,3); 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** acc0 = vmlaq_f32(acc0,a0V,temp); 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Decrement the loop count */ 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt--; 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** accum = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0)); 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** ** No loop unrolling is used. */ 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt = numColsA % 0x4U; 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (colCnt > 0U) 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */ 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum += *pIn1++ * (*pIn2); 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Decrement the loop counter */ 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt--; 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Store the result in the destination buffer */ 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** *px++ = sum; 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Update the pointer pIn2 to point to the starting address of the next column */ 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** j++; 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 = pSrcB->pData + j; 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Decrement the column loop counter */ ARM GAS /tmp/cc6NnxTV.s page 224 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** col--; 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } while (col > 0U); 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Update the pointer pInA to point to the starting address of the next row */ 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** i = i + numColsB; 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA = pInA + numColsA; 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Decrement the row loop counter */ 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** rowCnt--; 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** status = ARM_MATH_SUCCESS; 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Return to application */ 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** return (status); 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #else 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_status arm_mat_mult_f32( 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** const arm_matrix_instance_f32 * pSrcA, 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** const arm_matrix_instance_f32 * pSrcB, 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_matrix_instance_f32 * pDst) 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 2201 .loc 14 850 0 2202 .cfi_startproc 2203 @ args = 0, pretend = 0, frame = 0 2204 @ frame_needed = 0, uses_anonymous_args = 0 2205 .LVL325: 2206 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} 2207 .LCFI36: 2208 .cfi_def_cfa_offset 28 2209 .cfi_offset 4, -28 2210 .cfi_offset 5, -24 2211 .cfi_offset 6, -20 2212 .cfi_offset 7, -16 2213 .cfi_offset 8, -12 2214 .cfi_offset 9, -8 2215 .cfi_offset 14, -4 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInB = pSrcB->pData; /* Input data matrix pointer B */ 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pOut = pDst->pData; /* Output data matrix pointer */ 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *px; /* Temporary output data matrix pointer */ 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t sum; /* Accumulator */ 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */ 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_status status; /* Status of matrix multiplication */ 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Check for matrix mismatch condition */ ARM GAS /tmp/cc6NnxTV.s page 225 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** if ((pSrcA->numCols != pSrcB->numRows) || 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** (pSrcA->numRows != pDst->numRows) || 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** (pSrcB->numCols != pDst->numCols) ) 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** else 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB * 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* row loop */ 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** do 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Output pointer is set to starting address of row being processed */ 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** px = pOut + i; 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* For every row wise process, column loop counter is to be initiated */ 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** col = numColsB; 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */ 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 = pSrcB->pData; 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* column loop */ 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** do 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Set the variable sum, that acts as accumulator, to zero */ 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum = 0.0f; 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Initialize pointer pIn1 to point to starting address of column being processed */ 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn1 = pInA; 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Loop unrolling: Compute 4 MACs at a time. */ 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt = numColsA >> 2U; 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* matrix multiplication */ 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (colCnt > 0U) 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Perform the multiply-accumulates */ 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum += *pIn1++ * *pIn2; 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum += *pIn1++ * *pIn2; 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum += *pIn1++ * *pIn2; 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum += *pIn1++ * *pIn2; 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 226 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Decrement loop counter */ 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt--; 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Loop unrolling: Compute remaining MACs */ 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt = numColsA % 0x4U; 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #else 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Initialize cntCnt with number of columns */ 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt = numColsA; 2216 .loc 14 934 0 2217 0004 4788 ldrh r7, [r0, #2] 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 2218 .loc 14 887 0 2219 0006 4C88 ldrh r4, [r1, #2] 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ 2220 .loc 14 851 0 2221 0008 D0F804E0 ldr lr, [r0, #4] 2222 000c D2F804C0 ldr ip, [r2, #4] 2223 .LVL326: 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** float32_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ 2224 .loc 14 852 0 2225 0010 D1F80490 ldr r9, [r1, #4] 2226 .LVL327: 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** arm_status status; /* Status of matrix multiplication */ 2227 .loc 14 861 0 2228 0014 0088 ldrh r0, [r0] 2229 .LVL328: 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** while (colCnt > 0U) 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Perform the multiply-accumulates */ 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** sum += *pIn1++ * *pIn2; 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Decrement loop counter */ 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** colCnt--; 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Store result in destination buffer */ 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** *px++ = sum; 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Decrement column loop counter */ 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** col--; 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Update pointer pIn2 to point to starting address of next column */ 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 = pInB + (numColsB - col); 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } while (col > 0U); 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Update pointer pInA to point to starting address of next row */ 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** i = i + numColsB; ARM GAS /tmp/cc6NnxTV.s page 227 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pInA = pInA + numColsA; 2230 .loc 14 963 0 2231 0016 4FEA8708 lsl r8, r7, #2 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 2232 .loc 14 944 0 2233 001a A400 lsls r4, r4, #2 2234 .LVL329: 2235 .L224: 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 2236 .loc 14 884 0 2237 001c 6546 mov r5, ip 2238 .LVL330: 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 2239 .loc 14 890 0 2240 001e 4E46 mov r6, r9 2241 0020 A444 add ip, ip, r4 2242 .LVL331: 2243 .L223: 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 2244 .loc 14 896 0 2245 0022 DFED0D7A vldr.32 s15, .L230 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 2246 .loc 14 938 0 2247 0026 5FB1 cbz r7, .L221 2248 0028 3A46 mov r2, r7 2249 002a 3346 mov r3, r6 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 2250 .loc 14 899 0 2251 002c 7146 mov r1, lr 2252 .LVL332: 2253 .L222: 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 2254 .loc 14 943 0 2255 002e 93ED007A vldr.32 s14, [r3] 2256 0032 F1EC016A vldmia.32 r1!, {s13} 2257 .LVL333: 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 2258 .loc 14 938 0 2259 0036 013A subs r2, r2, #1 2260 .LVL334: 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 2261 .loc 14 944 0 2262 0038 2344 add r3, r3, r4 2263 .LVL335: 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** pIn2 += numColsB; 2264 .loc 14 943 0 2265 003a E6EE877A vfma.f32 s15, s13, s14 2266 .LVL336: 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** { 2267 .loc 14 938 0 2268 003e F6D1 bne .L222 2269 .LVL337: 2270 .L221: 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 2271 .loc 14 951 0 2272 0040 E5EC017A vstmia.32 r5!, {s15} 2273 .LVL338: ARM GAS /tmp/cc6NnxTV.s page 228 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 2274 .loc 14 959 0 2275 0044 AC45 cmp ip, r5 2276 0046 06F10406 add r6, r6, #4 2277 .LVL339: 2278 004a EAD1 bne .L223 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Decrement row loop counter */ 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** row--; 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } while (row > 0U); 2279 .loc 14 968 0 2280 004c 0138 subs r0, r0, #1 2281 .LVL340: 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 2282 .loc 14 963 0 2283 004e C644 add lr, lr, r8 2284 .LVL341: 2285 .loc 14 968 0 2286 0050 E4D1 bne .L224 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** status = ARM_MATH_SUCCESS; 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** /* Return to application */ 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** return (status); 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c **** } 2287 .loc 14 976 0 2288 0052 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} 2289 .LVL342: 2290 .L231: 2291 0056 00BF .align 2 2292 .L230: 2293 0058 00000000 .word 0 2294 .cfi_endproc 2295 .LFE159: 2297 .section .text.arm_mat_mult_fast_q15,"ax",%progbits 2298 .align 1 2299 .p2align 2,,3 2300 .global arm_mat_mult_fast_q15 2301 .syntax unified 2302 .thumb 2303 .thumb_func 2304 .fpu fpv4-sp-d16 2306 arm_mat_mult_fast_q15: 2307 .LFB160: 2308 .file 15 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * Title: arm_mat_mult_fast_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * Description: Q15 matrix multiplication (fast variant) 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * Target Processor: Cortex-M cores ARM GAS /tmp/cc6NnxTV.s page 229 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** @addtogroup MatrixMult 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** @brief Q15 matrix multiplication (fast variant). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** @param[in] pSrcA points to the first input matrix structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** @param[in] pSrcB points to the second input matrix structure 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** @param[out] pDst points to output matrix structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** @param[in] pState points to the array for storing intermediate results 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** @return execution status 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** @par Scaling and Overflow Behavior 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** The difference between the function \ref arm_mat_mult_q15() and this fast varian 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** the fast variant use a 32-bit rather than a 64-bit accumulator. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** The result of each 1.15 x 1.15 multiplication is truncated to 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2.30 format. These intermediate results are accumulated in a 32-bit register in 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** format. Finally, the accumulator is saturated and converted to a 1.15 result. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** @par 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** The fast version has the same overflow behavior as the standard version but prov 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** less precision since it discards the low 16 bits of each multiplication result. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** In order to avoid overflows completely the input signals must be scaled down. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** as a total of numColsA additions are computed internally for each output element 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** @remark 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** Refer to \ref arm_mat_mult_q15() for a slower implementation of this function 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** which uses 64-bit accumulation to provide higher precision. 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 230 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** arm_status arm_mat_mult_fast_q15( 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** const arm_matrix_instance_q15 * pSrcA, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** const arm_matrix_instance_q15 * pSrcB, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** arm_matrix_instance_q15 * pDst, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q15_t * pState) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2309 .loc 15 72 0 2310 .cfi_startproc 2311 @ args = 0, pretend = 0, frame = 112 2312 @ frame_needed = 0, uses_anonymous_args = 0 2313 .LVL343: 2314 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 2315 .LCFI37: 2316 .cfi_def_cfa_offset 36 2317 .cfi_offset 4, -36 2318 .cfi_offset 5, -32 2319 .cfi_offset 6, -28 2320 .cfi_offset 7, -24 2321 .cfi_offset 8, -20 2322 .cfi_offset 9, -16 2323 .cfi_offset 10, -12 2324 .cfi_offset 11, -8 2325 .cfi_offset 14, -4 2326 0004 9DB0 sub sp, sp, #116 2327 .LCFI38: 2328 .cfi_def_cfa_offset 152 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q31_t sum; /* Accumulator */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q15_t *pSrcBT = pState; /* Input data matrix pointer for transpose * 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q15_t *pInA = pSrcA->pData; /* Input data matrix pointer A of Q15 type * 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type * 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q15_t *px; /* Temporary output data matrix pointer */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 2329 .loc 15 79 0 2330 0006 4D88 ldrh r5, [r1, #2] 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** uint16_t numRowsB = pSrcB->numRows; /* Number of rows of input matrix A */ 2331 .loc 15 81 0 2332 0008 0C88 ldrh r4, [r1] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q15_t *px; /* Temporary output data matrix pointer */ 2333 .loc 15 76 0 2334 000a 4F68 ldr r7, [r1, #4] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type * 2335 .loc 15 75 0 2336 000c 4168 ldr r1, [r0, #4] 2337 .LVL344: 2338 000e 1991 str r1, [sp, #100] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 2339 .loc 15 78 0 2340 0010 0188 ldrh r1, [r0] 2341 0012 1691 str r1, [sp, #88] 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** uint16_t numRowsB = pSrcB->numRows; /* Number of rows of input matrix A */ 2342 .loc 15 80 0 2343 0014 4188 ldrh r1, [r0, #2] 2344 .loc 15 81 0 2345 0016 1B94 str r4, [sp, #108] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** uint32_t col, i = 0U, row = numRowsB, colCnt; /* Loop counters */ ARM GAS /tmp/cc6NnxTV.s page 231 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** arm_status status; /* Status of matrix multiplication */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #if defined (ARM_MATH_DSP) 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q31_t in; /* Temporary variable to hold the input valu 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q31_t inA1, inB1, inA2, inB2; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q31_t sum2, sum3, sum4; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q15_t *pInA2, *pInB2, *px2; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** uint32_t j = 0; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q15_t in; /* Temporary variable to hold the input valu 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q15_t inA1, inB1, inA2, inB2; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Check for matrix mismatch condition */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** if ((pSrcA->numCols != pSrcB->numRows) || 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** (pSrcA->numRows != pDst->numRows) || 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** (pSrcB->numCols != pDst->numCols) ) 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** else 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Matrix transpose */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** do 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* The pointer px is set to starting address of column being processed */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px = pSrcBT + i; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Apply loop unrolling and exchange columns with row elements */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** col = numColsB >> 2U; 2346 .loc 15 118 0 2347 0018 4FEA950E lsr lr, r5, #2 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** uint16_t numRowsB = pSrcB->numRows; /* Number of rows of input matrix A */ 2348 .loc 15 80 0 2349 001c 1591 str r1, [sp, #84] 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** while (col > 0U) 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #if defined (ARM_MATH_DSP) 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Read two elements from row */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** in = read_q15x2_ia ((q15_t **) &pInB); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Unpack and store one element in destination */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = (q15_t) in; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); ARM GAS /tmp/cc6NnxTV.s page 232 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Update pointer px to point to next row of transposed matrix */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px += numRowsB; 2350 .loc 15 138 0 2351 001e 2146 mov r1, r4 2352 0020 6400 lsls r4, r4, #1 2353 0022 05F00308 and r8, r5, #3 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** q31_t sum; /* Accumulator */ 2354 .loc 15 72 0 2355 0026 0E93 str r3, [sp, #56] 2356 .LVL345: 2357 0028 0EFB04F9 mul r9, lr, r4 2358 002c 0092 str r2, [sp] 2359 002e 1A46 mov r2, r3 2360 .LVL346: 2361 0030 E318 adds r3, r4, r3 2362 .LVL347: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ 2363 .loc 15 79 0 2364 0032 1895 str r5, [sp, #96] 2365 0034 4FEA8909 lsl r9, r9, #2 2366 0038 0C93 str r3, [sp, #48] 2367 003a 04EB8106 add r6, r4, r1, lsl #2 2368 003e 4FEACE0B lsl fp, lr, #3 2369 0042 4FEA480A lsl r10, r8, #1 2370 0046 CD00 lsls r5, r1, #3 2371 .LVL348: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Unpack and store second element in destination */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = (q15_t) in; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Update pointer px to point to next row of transposed matrix */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px += numRowsB; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** in = read_q15x2_ia ((q15_t **) &pInB); 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = (q15_t) in; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px += numRowsB; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = (q15_t) in; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px += numRowsB; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Read one element from row */ ARM GAS /tmp/cc6NnxTV.s page 233 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** in = *pInB++; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Store one element in destination */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = in; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Update pointer px to point to next row of transposed matrix */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px += numRowsB; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** in = *pInB++; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = in; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px += numRowsB; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** in = *pInB++; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = in; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px += numRowsB; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** in = *pInB++; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = in; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px += numRowsB; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Decrement column loop counter */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** col--; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** ** No loop unrolling is used. */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** col = numColsB % 0x4U; 2372 .loc 15 196 0 2373 0048 9446 mov ip, r2 2374 .LVL349: 2375 .L237: 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2376 .loc 15 115 0 2377 004a 6346 mov r3, ip 2378 .LVL350: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2379 .loc 15 122 0 2380 004c BEF1000F cmp lr, #0 2381 0050 13D0 beq .L233 2382 0052 3946 mov r1, r7 2383 0054 7046 mov r0, lr 2384 .LVL351: 2385 .L234: 2386 .LBB163: 2387 .LBB164: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2388 .loc 7 928 0 2389 0056 0A68 ldr r2, [r1] @ unaligned 2390 .LVL352: 2391 .LBE164: 2392 .LBE163: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else 2393 .loc 15 132 0 2394 0058 1A80 strh r2, [r3] @ movhi 2395 .LVL353: ARM GAS /tmp/cc6NnxTV.s page 234 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else 2396 .loc 15 142 0 2397 005a 1214 asrs r2, r2, #16 2398 005c 1A53 strh r2, [r3, r4] @ movhi 2399 .LVL354: 2400 .LBB165: 2401 .LBB166: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2402 .loc 7 928 0 2403 005e 4A68 ldr r2, [r1, #4] @ unaligned 2404 .LVL355: 2405 .LBE166: 2406 .LBE165: 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else 2407 .loc 15 152 0 2408 0060 23F81420 strh r2, [r3, r4, lsl #1] @ movhi 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2409 .loc 15 122 0 2410 0064 0138 subs r0, r0, #1 2411 .LVL356: 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else 2412 .loc 15 159 0 2413 0066 4FEA2242 asr r2, r2, #16 2414 .LVL357: 2415 006a 9A53 strh r2, [r3, r6] @ movhi 2416 006c 01F10801 add r1, r1, #8 2417 .LVL358: 2418 0070 2B44 add r3, r3, r5 2419 .LVL359: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2420 .loc 15 122 0 2421 0072 F0D1 bne .L234 2422 0074 5F44 add r7, r7, fp 2423 0076 0CEB0903 add r3, ip, r9 2424 .LVL360: 2425 .L233: 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** while (col > 0U) 2426 .loc 15 198 0 2427 007a B8F1000F cmp r8, #0 2428 007e 08D0 beq .L235 2429 0080 3946 mov r1, r7 2430 0082 4246 mov r2, r8 2431 .LVL361: 2432 .L236: 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Read and store input element in destination */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = *pInB++; 2433 .loc 15 201 0 2434 0084 31F9020B ldrsh r0, [r1], #2 2435 .LVL362: 2436 0088 1880 strh r0, [r3] @ movhi 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2437 .loc 15 198 0 2438 008a 013A subs r2, r2, #1 2439 .LVL363: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 235 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Update pointer px to point to next row of transposed matrix */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px += numRowsB; 2440 .loc 15 204 0 2441 008c 2344 add r3, r3, r4 2442 .LVL364: 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2443 .loc 15 198 0 2444 008e F9D1 bne .L236 2445 0090 5744 add r7, r7, r10 2446 .LVL365: 2447 .L235: 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Decrement column loop counter */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** col--; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** i++; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Decrement row loop counter */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** row--; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } while (row > 0U); 2448 .loc 15 215 0 2449 0092 0C9B ldr r3, [sp, #48] 2450 .LVL366: 2451 0094 0CF1020C add ip, ip, #2 2452 0098 6345 cmp r3, ip 2453 009a D6D1 bne .L237 2454 .LVL367: 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Reset variables for usage in following multiplication process */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** row = numRowsA; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** i = 0U; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px = pDst->pData; 2455 .loc 15 220 0 2456 009c 009B ldr r3, [sp] 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #if defined (ARM_MATH_DSP) 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Process two rows from matrix A at a time and output two rows at a time */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** row = row >> 1U; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px2 = px + numColsB; 2457 .loc 15 225 0 2458 009e 189E ldr r6, [sp, #96] 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB * 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* row loop */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** while (row > 0U) 2459 .loc 15 230 0 2460 00a0 169A ldr r2, [sp, #88] 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2461 .loc 15 220 0 2462 00a2 5F68 ldr r7, [r3, #4] 2463 00a4 1797 str r7, [sp, #92] 2464 .LVL368: 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif 2465 .loc 15 225 0 ARM GAS /tmp/cc6NnxTV.s page 236 2466 00a6 7300 lsls r3, r6, #1 2467 00a8 06F00105 and r5, r6, #1 2468 .loc 15 230 0 2469 00ac 5208 lsrs r2, r2, #1 2470 .LVL369: 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif 2471 .loc 15 225 0 2472 00ae 1493 str r3, [sp, #80] 2473 00b0 07EB0301 add r1, r7, r3 2474 .LVL370: 2475 00b4 1A95 str r5, [sp, #104] 2476 .loc 15 230 0 2477 00b6 0D92 str r2, [sp, #52] 2478 00b8 00F0A880 beq .L238 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* For every row wise process, column loop counter is to be initiated */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** col = numColsB; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB da 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInB = pSrcBT; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #if defined (ARM_MATH_DSP) 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Process two (transposed) columns from matrix B at a time */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** col = col >> 1U; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** j = 0; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* column loop */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** while (col > 0U) 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Set variable sum, that acts as accumulator, to zero */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum = 0; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Initiate pointer pInA to point to starting address of column being processed */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInA = pSrcA->pData + i; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #if defined (ARM_MATH_DSP) 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum2 = 0; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum3 = 0; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum4 = 0; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInB = pSrcBT + j; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInA2 = pInA + numColsA; 2479 .loc 15 258 0 2480 00bc 159B ldr r3, [sp, #84] 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInB2 = pInB + numRowsB; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Read in two elements at once - alows dual MAC instruction */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt = numColsA >> 1U; 2481 .loc 15 262 0 2482 00be 5808 lsrs r0, r3, #1 2483 00c0 03F00102 and r2, r3, #1 2484 .LVL371: 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInB2 = pInB + numRowsB; 2485 .loc 15 258 0 2486 00c4 4FEA430C lsl ip, r3, #1 2487 00c8 7308 lsrs r3, r6, #1 2488 .loc 15 262 0 ARM GAS /tmp/cc6NnxTV.s page 237 2489 00ca 0690 str r0, [sp, #24] 2490 00cc 0992 str r2, [sp, #36] 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt = numColsA >> 2U; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* matrix multiplication */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** while (colCnt > 0U) 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #if defined (ARM_MATH_DSP) 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* read real and imag values from pSrcA and pSrcB buffer */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA1 = read_q15x2_ia ((q15_t **) &pInA); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB1 = read_q15x2_ia ((q15_t **) &pInB); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA2 = read_q15x2_ia ((q15_t **) &pInA2); 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB2 = read_q15x2_ia ((q15_t **) &pInB2); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Multiply and Accumlates */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum = __SMLAD(inA1, inB1, sum); 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum2 = __SMLAD(inA1, inB2, sum2); 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum3 = __SMLAD(inA2, inB1, sum3); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum4 = __SMLAD(inA2, inB2, sum4); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* read real and imag values from pSrcA and pSrcB buffer */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA1 = *pInA++; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB1 = *pInB++; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Multiply and Accumlates */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += inA1 * inB1; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA2 = *pInA++; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB2 = *pInB++; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += inA2 * inB2; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA1 = *pInA++; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB1 = *pInB++; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += inA1 * inB1; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA2 = *pInA++; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB2 = *pInB++; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += inA2 * inB2; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Decrement loop counter */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt--; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* process odd column samples */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #if defined (ARM_MATH_DSP) 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** if (numColsA & 1U) { 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA1 = *pInA++; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB1 = *pInB++; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA2 = *pInA2++; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB2 = *pInB2++; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += inA1 * inB1; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum2 += inA1 * inB2; ARM GAS /tmp/cc6NnxTV.s page 238 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum3 += inA2 * inB1; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum4 += inA2 * inB2; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #else 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt = numColsA % 0x4U; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** while (colCnt > 0U) 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += (q31_t) *pInA++ * *pInB++; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Decrement loop counter */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt--; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Saturate and store result in destination buffer */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px++ = (q15_t) (sum >> 15); 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #if defined (ARM_MATH_DSP) 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px++ = (q15_t) (sum2 >> 15); 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px2++ = (q15_t) (sum3 >> 15); 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px2++ = (q15_t) (sum4 >> 15); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** j += numRowsB * 2; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Decrement column loop counter */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** col--; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** i = i + numColsA; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #if defined (ARM_MATH_DSP) 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** i = i + numColsA; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px = px2 + (numColsB & 1U); 2491 .loc 15 353 0 2492 00ce 4FEA4505 lsl r5, r5, #1 2493 00d2 00F09B80 beq .L238 2494 00d6 6400 lsls r4, r4, #1 2495 00d8 9E00 lsls r6, r3, #2 2496 00da 0A94 str r4, [sp, #40] 2497 00dc 149C ldr r4, [sp, #80] 2498 00de 0698 ldr r0, [sp, #24] 2499 00e0 3544 add r5, r5, r6 2500 00e2 2544 add r5, r5, r4 2501 00e4 179C ldr r4, [sp, #92] 2502 00e6 1195 str r5, [sp, #68] 2503 00e8 891B subs r1, r1, r6 2504 .LVL372: 2505 00ea 091B subs r1, r1, r4 2506 00ec C3EB8373 rsb r3, r3, r3, lsl #30 2507 00f0 0437 adds r7, r7, #4 2508 .LVL373: 2509 00f2 0F91 str r1, [sp, #60] 2510 00f4 9900 lsls r1, r3, #2 2511 00f6 1391 str r1, [sp, #76] ARM GAS /tmp/cc6NnxTV.s page 239 2512 00f8 B919 adds r1, r7, r6 2513 00fa 8200 lsls r2, r0, #2 2514 00fc 0391 str r1, [sp, #12] 2515 00fe 1999 ldr r1, [sp, #100] 2516 0100 0B92 str r2, [sp, #44] 2517 0102 6244 add r2, r2, ip 2518 0104 8C18 adds r4, r1, r2 2519 .LVL374: 2520 0106 0B9A ldr r2, [sp, #44] 2521 0108 159B ldr r3, [sp, #84] 2522 010a 0494 str r4, [sp, #16] 2523 010c 8A18 adds r2, r1, r2 2524 010e C0EB8070 rsb r0, r0, r0, lsl #30 2525 0112 0592 str r2, [sp, #20] 2526 0114 9B00 lsls r3, r3, #2 2527 0116 8200 lsls r2, r0, #2 2528 0118 1292 str r2, [sp, #72] 2529 011a 1093 str r3, [sp, #64] 2530 .LVL375: 2531 .L243: 2532 011c 129B ldr r3, [sp, #72] 2533 011e 059A ldr r2, [sp, #20] 2534 0120 9A18 adds r2, r3, r2 2535 0122 0892 str r2, [sp, #32] 2536 0124 049A ldr r2, [sp, #16] 2537 0126 1344 add r3, r3, r2 2538 0128 0793 str r3, [sp, #28] 2539 012a 139B ldr r3, [sp, #76] 2540 012c 0F9A ldr r2, [sp, #60] 2541 012e 1946 mov r1, r3 2542 0130 039B ldr r3, [sp, #12] 2543 0132 01EB030B add fp, r1, r3 2544 0136 D318 adds r3, r2, r3 2545 0138 0293 str r3, [sp, #8] 2546 013a 0C9B ldr r3, [sp, #48] 2547 013c 0093 str r3, [sp] 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2548 .loc 15 198 0 2549 013e 0E9B ldr r3, [sp, #56] 2550 0140 0193 str r3, [sp, #4] 2551 .LVL376: 2552 .L242: 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2553 .loc 15 268 0 2554 0142 069A ldr r2, [sp, #24] 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2555 .loc 15 259 0 2556 0144 DDE900E8 ldrd lr, r8, [sp] 2557 .LVL377: 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2558 .loc 15 268 0 2559 0148 002A cmp r2, #0 2560 014a 00F00681 beq .L256 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2561 .loc 15 251 0 2562 014e DDE907A9 ldrd r10, r9, [sp, #28] 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInB = pSrcBT + j; ARM GAS /tmp/cc6NnxTV.s page 240 2563 .loc 15 256 0 2564 0152 0023 movs r3, #0 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum4 = 0; 2565 .loc 15 255 0 2566 0154 1E46 mov r6, r3 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum3 = 0; 2567 .loc 15 254 0 2568 0156 1F46 mov r7, r3 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2569 .loc 15 248 0 2570 0158 9C46 mov ip, r3 2571 .LVL378: 2572 .L240: 2573 .LBB167: 2574 .LBB168: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2575 .loc 7 928 0 2576 015a 59F8045B ldr r5, [r9], #4 @ unaligned 2577 .LVL379: 2578 .LBE168: 2579 .LBE167: 2580 .LBB169: 2581 .LBB170: 2582 015e 58F8044B ldr r4, [r8], #4 @ unaligned 2583 .LVL380: 2584 .LBE170: 2585 .LBE169: 2586 .LBB171: 2587 .LBB172: 2588 0162 5AF8041B ldr r1, [r10], #4 @ unaligned 2589 .LVL381: 2590 .LBE172: 2591 .LBE171: 2592 .LBB173: 2593 .LBB174: 2594 0166 5EF8040B ldr r0, [lr], #4 @ unaligned 2595 .LVL382: 2596 .LBE174: 2597 .LBE173: 2598 .LBB175: 2599 .LBB176: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2600 .loc 3 1993 0 2601 .syntax unified 2602 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2603 016a 25FB04CC smlad ip, r5, r4, ip 2604 @ 0 "" 2 2605 .LVL383: 2606 .thumb 2607 .syntax unified 2608 .LBE176: 2609 .LBE175: 2610 .LBB177: 2611 .LBB178: 2612 .syntax unified 2613 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2614 016e 25FB0077 smlad r7, r5, r0, r7 ARM GAS /tmp/cc6NnxTV.s page 241 2615 @ 0 "" 2 2616 .LVL384: 2617 .thumb 2618 .syntax unified 2619 .LBE178: 2620 .LBE177: 2621 .LBB179: 2622 .LBB180: 2623 .syntax unified 2624 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2625 0172 21FB0466 smlad r6, r1, r4, r6 2626 @ 0 "" 2 2627 .LVL385: 2628 .thumb 2629 .syntax unified 2630 .LBE180: 2631 .LBE179: 2632 .LBB181: 2633 .LBB182: 2634 .syntax unified 2635 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2636 0176 21FB0033 smlad r3, r1, r0, r3 2637 @ 0 "" 2 2638 .LVL386: 2639 .thumb 2640 .syntax unified 2641 .LBE182: 2642 .LBE181: 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2643 .loc 15 268 0 2644 017a 013A subs r2, r2, #1 2645 .LVL387: 2646 017c EDD1 bne .L240 2647 017e 0B98 ldr r0, [sp, #44] 2648 0180 019C ldr r4, [sp, #4] 2649 0182 059A ldr r2, [sp, #20] 2650 .LVL388: 2651 0184 0499 ldr r1, [sp, #16] 2652 0186 00EB0408 add r8, r0, r4 2653 .LVL389: 2654 018a 009C ldr r4, [sp] 2655 018c 00EB040E add lr, r0, r4 2656 .LVL390: 2657 .L239: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA1 = *pInA++; 2658 .loc 15 311 0 2659 0190 0998 ldr r0, [sp, #36] 2660 0192 78B1 cbz r0, .L241 2661 .LVL391: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB1 = *pInB++; 2662 .loc 15 312 0 2663 0194 B2F90020 ldrsh r2, [r2] 2664 .LVL392: 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA2 = *pInA2++; 2665 .loc 15 313 0 2666 0198 B8F90000 ldrsh r0, [r8] 2667 .LVL393: ARM GAS /tmp/cc6NnxTV.s page 242 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB2 = *pInB2++; 2668 .loc 15 314 0 2669 019c B1F90010 ldrsh r1, [r1] 2670 .LVL394: 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += inA1 * inB1; 2671 .loc 15 315 0 2672 01a0 BEF90040 ldrsh r4, [lr] 2673 .LVL395: 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum2 += inA1 * inB2; 2674 .loc 15 316 0 2675 01a4 02FB00CC mla ip, r2, r0, ip 2676 .LVL396: 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum4 += inA2 * inB2; 2677 .loc 15 318 0 2678 01a8 00FB0166 mla r6, r0, r1, r6 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum3 += inA2 * inB1; 2679 .loc 15 317 0 2680 01ac 02FB0477 mla r7, r2, r4, r7 2681 .LVL397: 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 2682 .loc 15 319 0 2683 01b0 01FB0433 mla r3, r1, r4, r3 2684 .LVL398: 2685 .L241: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px2++ = (q15_t) (sum4 >> 15); 2686 .loc 15 339 0 2687 01b4 029A ldr r2, [sp, #8] 2688 01b6 0199 ldr r1, [sp, #4] 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** j += numRowsB * 2; 2689 .loc 15 340 0 2690 01b8 DB13 asrs r3, r3, #15 2691 .LVL399: 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2692 .loc 15 335 0 2693 01ba 4FEAEC3C asr ip, ip, #15 2694 .LVL400: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px2++ = (q15_t) (sum3 >> 15); 2695 .loc 15 338 0 2696 01be FF13 asrs r7, r7, #15 2697 .LVL401: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px2++ = (q15_t) (sum4 >> 15); 2698 .loc 15 339 0 2699 01c0 F613 asrs r6, r6, #15 2700 .LVL402: 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2701 .loc 15 335 0 2702 01c2 2BF804CC strh ip, [fp, #-4] @ movhi 2703 .LVL403: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px2++ = (q15_t) (sum3 >> 15); 2704 .loc 15 338 0 2705 01c6 2BF8027C strh r7, [fp, #-2] @ movhi 2706 01ca 0432 adds r2, r2, #4 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** j += numRowsB * 2; 2707 .loc 15 340 0 2708 01cc 22F8063C strh r3, [r2, #-6] @ movhi 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px2++ = (q15_t) (sum4 >> 15); 2709 .loc 15 339 0 ARM GAS /tmp/cc6NnxTV.s page 243 2710 01d0 22F8086C strh r6, [r2, #-8] @ movhi 2711 01d4 0A9B ldr r3, [sp, #40] 2712 01d6 0292 str r2, [sp, #8] 2713 01d8 009A ldr r2, [sp] 2714 01da 0846 mov r0, r1 2715 01dc 1844 add r0, r0, r3 2716 01de 1A44 add r2, r2, r3 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2717 .loc 15 245 0 2718 01e0 039B ldr r3, [sp, #12] 2719 01e2 0190 str r0, [sp, #4] 2720 01e4 0BF1040B add fp, fp, #4 2721 .LVL404: 2722 01e8 5B45 cmp r3, fp 2723 01ea 0092 str r2, [sp] 2724 01ec A9D1 bne .L242 2725 .LVL405: 2726 01ee 119A ldr r2, [sp, #68] 2727 01f0 1344 add r3, r3, r2 2728 01f2 059A ldr r2, [sp, #20] 2729 01f4 0393 str r3, [sp, #12] 2730 01f6 1146 mov r1, r2 2731 01f8 109B ldr r3, [sp, #64] 2732 01fa 049A ldr r2, [sp, #16] 2733 01fc 1944 add r1, r1, r3 2734 01fe 1A44 add r2, r2, r3 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2735 .loc 15 230 0 2736 0200 0D9B ldr r3, [sp, #52] 2737 0202 0591 str r1, [sp, #20] 2738 0204 013B subs r3, r3, #1 2739 .LVL406: 2740 0206 0492 str r2, [sp, #16] 2741 0208 0D93 str r3, [sp, #52] 2742 020a 87D1 bne .L243 2743 .LVL407: 2744 .L238: 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px2 = px + numColsB; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Decrement row loop counter */ 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** row--; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Compute any remaining odd row/column below */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #if defined (ARM_MATH_DSP) 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Compute remaining output column */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** if (numColsB & 1U) { 2745 .loc 15 367 0 2746 020c 1A9B ldr r3, [sp, #104] 2747 020e 002B cmp r3, #0 2748 0210 4FD0 beq .L244 2749 .LVL408: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 244 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Avoid redundant computation of last element */ 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** row = numRowsA & (~0x1); 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Point to remaining unfilled column in output matrix */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px = pDst->pData + numColsB-1; 2750 .loc 15 373 0 2751 0212 149B ldr r3, [sp, #80] 2752 0214 A3F1020E sub lr, r3, #2 2753 0218 179B ldr r3, [sp, #92] 2754 021a 9E44 add lr, lr, r3 2755 .LVL409: 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInA = pSrcA->pData; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* row loop */ 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** while (row > 0) 2756 .loc 15 377 0 2757 021c 169B ldr r3, [sp, #88] 2758 021e 33F00108 bics r8, r3, #1 2759 .LVL410: 2760 0222 46D0 beq .L244 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* point to last column in matrix B */ 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInB = pSrcBT + numRowsB * (numColsB-1); 2761 .loc 15 381 0 2762 0224 189B ldr r3, [sp, #96] 2763 0226 0E9A ldr r2, [sp, #56] 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInA = pSrcA->pData; 2764 .loc 15 374 0 2765 0228 DDF864C0 ldr ip, [sp, #100] 2766 .loc 15 381 0 2767 022c 03F1FF3B add fp, r3, #-1 2768 0230 1B9B ldr r3, [sp, #108] 2769 0232 03FB0BFB mul fp, r3, fp 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Set variable sum, that acts as accumulator, to zero */ 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum = 0; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Compute 4 columns at once */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt = numColsA >> 2U; 2770 .loc 15 387 0 2771 0236 159B ldr r3, [sp, #84] 2772 0238 4FEA9309 lsr r9, r3, #2 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2773 .loc 15 381 0 2774 023c 02EB4B0B add fp, r2, fp, lsl #1 2775 0240 4FEAC902 lsl r2, r9, #3 2776 0244 03F0030A and r10, r3, #3 2777 0248 0BEB0203 add r3, fp, r2 2778 024c 0193 str r3, [sp, #4] 2779 024e 4FEA4A03 lsl r3, r10, #1 2780 0252 0092 str r2, [sp] 2781 0254 0293 str r3, [sp, #8] 2782 .LVL411: 2783 .L249: 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* matrix multiplication */ ARM GAS /tmp/cc6NnxTV.s page 245 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** while (colCnt > 0U) 2784 .loc 15 390 0 2785 0256 B9F1000F cmp r9, #0 2786 025a 00F08880 beq .L257 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2787 .loc 15 381 0 2788 025e 5C46 mov r4, fp 2789 .loc 15 390 0 2790 0260 6046 mov r0, ip 2791 0262 4D46 mov r5, r9 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2792 .loc 15 384 0 2793 0264 0023 movs r3, #0 2794 .LVL412: 2795 .L246: 2796 .LBB183: 2797 .LBB184: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2798 .loc 7 928 0 2799 0266 0668 ldr r6, [r0] @ unaligned 2800 .LVL413: 2801 .LBE184: 2802 .LBE183: 2803 .LBB185: 2804 .LBB186: 2805 0268 4268 ldr r2, [r0, #4] @ unaligned 2806 .LVL414: 2807 .LBE186: 2808 .LBE185: 2809 .LBB187: 2810 .LBB188: 2811 026a 2768 ldr r7, [r4] @ unaligned 2812 .LBE188: 2813 .LBE187: 2814 .LBB189: 2815 .LBB190: 2816 026c 6168 ldr r1, [r4, #4] @ unaligned 2817 026e 0830 adds r0, r0, #8 2818 .LVL415: 2819 0270 0834 adds r4, r4, #8 2820 .LVL416: 2821 .LBE190: 2822 .LBE189: 2823 .LBB192: 2824 .LBB193: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2825 .loc 3 1993 0 2826 .syntax unified 2827 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2828 0272 26FB0733 smlad r3, r6, r7, r3 2829 @ 0 "" 2 2830 .LVL417: 2831 .thumb 2832 .syntax unified 2833 .LBE193: 2834 .LBE192: 2835 .LBB194: ARM GAS /tmp/cc6NnxTV.s page 246 2836 .LBB195: 2837 .syntax unified 2838 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2839 0276 22FB0133 smlad r3, r2, r1, r3 2840 @ 0 "" 2 2841 .LVL418: 2842 .thumb 2843 .syntax unified 2844 .LBE195: 2845 .LBE194: 2846 .loc 15 390 0 2847 027a 013D subs r5, r5, #1 2848 .LVL419: 2849 027c F3D1 bne .L246 2850 027e 009A ldr r2, [sp] 2851 .LBB196: 2852 .LBB191: 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 2853 .loc 7 933 0 2854 0280 0199 ldr r1, [sp, #4] 2855 0282 9444 add ip, ip, r2 2856 .LVL420: 2857 .L245: 2858 .LBE191: 2859 .LBE196: 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA1 = read_q15x2_ia ((q15_t **) &pInA); 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA2 = read_q15x2_ia ((q15_t **) &pInA); 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB1 = read_q15x2_ia ((q15_t **) &pInB); 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB2 = read_q15x2_ia ((q15_t **) &pInB); 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum = __SMLAD(inA1, inB1, sum); 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum = __SMLAD(inA2, inB2, sum); 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Decrement loop counter */ 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt--; 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt = numColsA & 3U; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** while (colCnt > 0U) { 2860 .loc 15 405 0 2861 0284 BAF1000F cmp r10, #0 2862 0288 0BD0 beq .L247 2863 028a 6046 mov r0, ip 2864 028c 5246 mov r2, r10 2865 .LVL421: 2866 .L248: 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += (q31_t) (*pInA++) * (*pInB++); 2867 .loc 15 406 0 2868 028e 30F8025B ldrh r5, [r0], #2 2869 .LVL422: 2870 0292 31F8024B ldrh r4, [r1], #2 2871 .LVL423: 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += (q31_t) (*pInA++) * (*pInB++); 2872 .loc 15 405 0 2873 0296 013A subs r2, r2, #1 2874 .LVL424: ARM GAS /tmp/cc6NnxTV.s page 247 2875 .loc 15 406 0 2876 0298 15FB0433 smlabb r3, r5, r4, r3 2877 .LVL425: 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += (q31_t) (*pInA++) * (*pInB++); 2878 .loc 15 405 0 2879 029c F7D1 bne .L248 2880 029e 029A ldr r2, [sp, #8] 2881 02a0 9444 add ip, ip, r2 2882 .LVL426: 2883 .L247: 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt--; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Store result in destination buffer */ 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px = (q15_t) (sum >> 15); 2884 .loc 15 411 0 2885 02a2 DB13 asrs r3, r3, #15 2886 .LVL427: 2887 02a4 AEF80030 strh r3, [lr] @ movhi 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px += numColsB; 2888 .loc 15 412 0 2889 02a8 149B ldr r3, [sp, #80] 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2890 .loc 15 377 0 2891 02aa B8F10108 subs r8, r8, #1 2892 .LVL428: 2893 .loc 15 412 0 2894 02ae 9E44 add lr, lr, r3 2895 .LVL429: 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 2896 .loc 15 377 0 2897 02b0 D1D1 bne .L249 2898 .LVL430: 2899 .L244: 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Decrement row loop counter */ 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** row--; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Compute remaining output row */ 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** if (numRowsA & 1U) { 2900 .loc 15 420 0 2901 02b2 169B ldr r3, [sp, #88] 2902 02b4 1A46 mov r2, r3 2903 02b6 D207 lsls r2, r2, #31 2904 02b8 4BD5 bpl .L250 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* point to last row in output matrix */ 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** px = pDst->pData + (numColsB) * (numRowsA-1); 2905 .loc 15 423 0 2906 02ba 189A ldr r2, [sp, #96] 2907 02bc 1799 ldr r1, [sp, #92] 2908 02be 013B subs r3, r3, #1 2909 02c0 03FB02F8 mul r8, r3, r2 2910 02c4 01EB4808 add r8, r1, r8, lsl #1 2911 .LVL431: ARM GAS /tmp/cc6NnxTV.s page 248 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInB = pSrcBT; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** col = numColsB; 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** i = 0U; 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* col loop */ 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** while (col > 0) 2912 .loc 15 430 0 2913 02c8 002A cmp r2, #0 2914 02ca 42D0 beq .L250 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* point to last row in matrix A */ 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInA = pSrcA->pData + (numRowsA-1) * numColsA; 2915 .loc 15 433 0 2916 02cc 159A ldr r2, [sp, #84] 2917 02ce 1999 ldr r1, [sp, #100] 2918 02d0 03FB02F3 mul r3, r3, r2 2919 02d4 01EB430E add lr, r1, r3, lsl #1 2920 02d8 149B ldr r3, [sp, #80] 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Set variable sum, that acts as accumulator, to zero */ 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum = 0; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Compute 4 columns at once */ 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt = numColsA >> 2U; 2921 .loc 15 439 0 2922 02da 4FEA920A lsr r10, r2, #2 2923 02de 4FEACA0B lsl fp, r10, #3 2924 02e2 4344 add r3, r3, r8 2925 02e4 02F0030C and ip, r2, #3 2926 02e8 9946 mov r9, r3 2927 02ea 0EEB0B03 add r3, lr, fp 2928 02ee 0193 str r3, [sp, #4] 2929 02f0 CDF808B0 str fp, [sp, #8] 2930 02f4 4FEA4C03 lsl r3, ip, #1 2931 02f8 DDF838B0 ldr fp, [sp, #56] 2932 02fc 0093 str r3, [sp] 2933 .LVL432: 2934 .L255: 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* matrix multiplication */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** while (colCnt > 0U) 2935 .loc 15 442 0 2936 02fe BAF1000F cmp r10, #0 2937 0302 31D0 beq .L258 2938 0304 5C46 mov r4, fp 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2939 .loc 15 433 0 2940 0306 7046 mov r0, lr 2941 .loc 15 442 0 2942 0308 5546 mov r5, r10 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 2943 .loc 15 436 0 2944 030a 0023 movs r3, #0 2945 .LVL433: 2946 .L252: 2947 .LBB197: ARM GAS /tmp/cc6NnxTV.s page 249 2948 .LBB198: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2949 .loc 7 928 0 2950 030c 0668 ldr r6, [r0] @ unaligned 2951 .LVL434: 2952 .LBE198: 2953 .LBE197: 2954 .LBB199: 2955 .LBB200: 2956 030e 4268 ldr r2, [r0, #4] @ unaligned 2957 .LVL435: 2958 .LBE200: 2959 .LBE199: 2960 .LBB202: 2961 .LBB203: 2962 0310 2768 ldr r7, [r4] @ unaligned 2963 .LBE203: 2964 .LBE202: 2965 .LBB204: 2966 .LBB205: 2967 0312 6168 ldr r1, [r4, #4] @ unaligned 2968 0314 0830 adds r0, r0, #8 2969 .LVL436: 2970 0316 0834 adds r4, r4, #8 2971 .LVL437: 2972 .LBE205: 2973 .LBE204: 2974 .LBB206: 2975 .LBB207: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2976 .loc 3 1993 0 2977 .syntax unified 2978 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2979 0318 26FB0733 smlad r3, r6, r7, r3 2980 @ 0 "" 2 2981 .LVL438: 2982 .thumb 2983 .syntax unified 2984 .LBE207: 2985 .LBE206: 2986 .LBB208: 2987 .LBB209: 2988 .syntax unified 2989 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2990 031c 22FB0133 smlad r3, r2, r1, r3 2991 @ 0 "" 2 2992 .LVL439: 2993 .thumb 2994 .syntax unified 2995 .LBE209: 2996 .LBE208: 2997 .loc 15 442 0 2998 0320 013D subs r5, r5, #1 2999 .LVL440: 3000 0322 F3D1 bne .L252 3001 0324 029A ldr r2, [sp, #8] 3002 .LBB210: ARM GAS /tmp/cc6NnxTV.s page 250 3003 .LBB201: 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 3004 .loc 7 933 0 3005 0326 0199 ldr r1, [sp, #4] 3006 0328 9344 add fp, fp, r2 3007 .LVL441: 3008 .L251: 3009 .LBE201: 3010 .LBE210: 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA1 = read_q15x2_ia ((q15_t **) &pInA); 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inA2 = read_q15x2_ia ((q15_t **) &pInA); 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB1 = read_q15x2_ia ((q15_t **) &pInB); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** inB2 = read_q15x2_ia ((q15_t **) &pInB); 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum = __SMLAD(inA1, inB1, sum); 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum = __SMLAD(inA2, inB2, sum); 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Decrement loop counter */ 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt--; 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt = numColsA % 4U; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** while (colCnt > 0U) { 3011 .loc 15 457 0 3012 032a BCF1000F cmp ip, #0 3013 032e 0BD0 beq .L253 3014 0330 5846 mov r0, fp 3015 0332 6246 mov r2, ip 3016 .LVL442: 3017 .L254: 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += (q31_t) (*pInA++) * (*pInB++); 3018 .loc 15 458 0 3019 0334 31F8025B ldrh r5, [r1], #2 3020 .LVL443: 3021 0338 30F8024B ldrh r4, [r0], #2 3022 .LVL444: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += (q31_t) (*pInA++) * (*pInB++); 3023 .loc 15 457 0 3024 033c 013A subs r2, r2, #1 3025 .LVL445: 3026 .loc 15 458 0 3027 033e 15FB0433 smlabb r3, r5, r4, r3 3028 .LVL446: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum += (q31_t) (*pInA++) * (*pInB++); 3029 .loc 15 457 0 3030 0342 F7D1 bne .L254 3031 0344 009A ldr r2, [sp] 3032 0346 9344 add fp, fp, r2 3033 .LVL447: 3034 .L253: 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** colCnt--; 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Store result in destination buffer */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** *px++ = (q15_t) (sum >> 15); ARM GAS /tmp/cc6NnxTV.s page 251 3035 .loc 15 464 0 3036 0348 DB13 asrs r3, r3, #15 3037 .LVL448: 3038 034a 28F8023B strh r3, [r8], #2 @ movhi 3039 .LVL449: 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** { 3040 .loc 15 430 0 3041 034e C845 cmp r8, r9 3042 0350 D5D1 bne .L255 3043 .LVL450: 3044 .L250: 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Decrement column loop counter */ 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** col--; 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** status = ARM_MATH_SUCCESS; 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** /* Return to application */ 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** return (status); 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** } 3045 .loc 15 479 0 3046 0352 0020 movs r0, #0 3047 0354 1DB0 add sp, sp, #116 3048 .LCFI39: 3049 .cfi_remember_state 3050 .cfi_def_cfa_offset 36 3051 @ sp needed 3052 0356 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 3053 .LVL451: 3054 .L256: 3055 .LCFI40: 3056 .cfi_restore_state 3057 035a 9446 mov ip, r2 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** pInB = pSrcBT + j; 3058 .loc 15 256 0 3059 035c 6346 mov r3, ip 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 3060 .loc 15 251 0 3061 035e DDE90712 ldrd r1, r2, [sp, #28] 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum4 = 0; 3062 .loc 15 255 0 3063 0362 6646 mov r6, ip 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** sum3 = 0; 3064 .loc 15 254 0 3065 0364 6746 mov r7, ip 3066 0366 13E7 b .L239 3067 .LVL452: 3068 .L258: 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 3069 .loc 15 433 0 3070 0368 7146 mov r1, lr ARM GAS /tmp/cc6NnxTV.s page 252 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 3071 .loc 15 436 0 3072 036a 5346 mov r3, r10 3073 036c DDE7 b .L251 3074 .LVL453: 3075 .L257: 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 3076 .loc 15 381 0 3077 036e 5946 mov r1, fp 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c **** 3078 .loc 15 384 0 3079 0370 4B46 mov r3, r9 3080 0372 87E7 b .L245 3081 .cfi_endproc 3082 .LFE160: 3084 .section .text.arm_mat_mult_fast_q31,"ax",%progbits 3085 .align 1 3086 .p2align 2,,3 3087 .global arm_mat_mult_fast_q31 3088 .syntax unified 3089 .thumb 3090 .thumb_func 3091 .fpu fpv4-sp-d16 3093 arm_mat_mult_fast_q31: 3094 .LFB161: 3095 .file 16 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * Title: arm_mat_mult_fast_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * Description: Q31 matrix multiplication (fast variant) 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /** ARM GAS /tmp/cc6NnxTV.s page 253 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** @addtogroup MatrixMult 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** @brief Q31 matrix multiplication (fast variant). 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** @param[in] pSrcA points to the first input matrix structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** @param[in] pSrcB points to the second input matrix structure 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** @param[out] pDst points to output matrix structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** @return execution status 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** The difference between the function \ref arm_mat_mult_q31() and this fast varian 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** the fast variant use a 32-bit rather than a 64-bit accumulator. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** The result of each 1.31 x 1.31 multiplication is truncated to 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 2.30 format. These intermediate results are accumulated in a 32-bit register in 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** format. Finally, the accumulator is saturated and converted to a 1.31 result. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** @par 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** The fast version has the same overflow behavior as the standard version but prov 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** less precision since it discards the low 32 bits of each multiplication result. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** In order to avoid overflows completely the input signals must be scaled down. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** as a total of numColsA additions are computed internally for each output element 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** @remark 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** Refer to \ref arm_mat_mult_q31() for a slower implementation of this function 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** which uses 64-bit accumulation to provide higher precision. 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** arm_status arm_mat_mult_fast_q31( 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** const arm_matrix_instance_q31 * pSrcA, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** const arm_matrix_instance_q31 * pSrcB, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** arm_matrix_instance_q31 * pDst) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 3096 .loc 16 70 0 3097 .cfi_startproc 3098 @ args = 0, pretend = 0, frame = 72 3099 @ frame_needed = 0, uses_anonymous_args = 0 3100 .LVL454: 3101 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 3102 .LCFI41: 3103 .cfi_def_cfa_offset 36 3104 .cfi_offset 4, -36 3105 .cfi_offset 5, -32 3106 .cfi_offset 6, -28 3107 .cfi_offset 7, -24 3108 .cfi_offset 8, -20 3109 .cfi_offset 9, -16 3110 .cfi_offset 10, -12 3111 .cfi_offset 11, -8 3112 .cfi_offset 14, -4 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ ARM GAS /tmp/cc6NnxTV.s page 254 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** q31_t *pInB = pSrcB->pData; /* Input data matrix pointer B */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** q31_t *pInA2; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** q31_t *px; /* Temporary output data matrix pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** q31_t *px2; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** q31_t sum1, sum2, sum3, sum4; /* Accumulator */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** q31_t inA1, inA2, inB1, inB2; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 3113 .loc 16 79 0 3114 0004 4B88 ldrh r3, [r1, #2] 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* Loop counters */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** arm_status status; /* Status of matrix multiplication */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Check for matrix mismatch condition */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** if ((pSrcA->numCols != pSrcB->numRows) || 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** (pSrcA->numRows != pDst->numRows) || 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** (pSrcB->numCols != pDst->numCols) ) 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** else 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** px = pDst->pData; 3115 .loc 16 100 0 3116 0006 5568 ldr r5, [r2, #4] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 3117 .loc 16 78 0 3118 0008 0488 ldrh r4, [r0] 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** q31_t *pInA2; 3119 .loc 16 72 0 3120 000a 4A68 ldr r2, [r1, #4] 3121 .LVL455: 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** q31_t *pInB = pSrcB->pData; /* Input data matrix pointer B */ 3122 .loc 16 71 0 3123 000c 4768 ldr r7, [r0, #4] 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* Loop counters */ 3124 .loc 16 80 0 3125 000e 4688 ldrh r6, [r0, #2] 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ 3126 .loc 16 70 0 3127 0010 93B0 sub sp, sp, #76 3128 .LCFI42: 3129 .cfi_def_cfa_offset 112 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** row = row >> 1U; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** px2 = px + numColsB; 3130 .loc 16 103 0 3131 0012 4FEA830B lsl fp, r3, #2 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** q31_t *pInA2; ARM GAS /tmp/cc6NnxTV.s page 255 3132 .loc 16 72 0 3133 0016 0792 str r2, [sp, #28] 3134 0018 03F00101 and r1, r3, #1 3135 .LVL456: 3136 .loc 16 103 0 3137 001c 2A46 mov r2, r5 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB * 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* row loop */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** while (row > 0U) 3138 .loc 16 107 0 3139 001e 6008 lsrs r0, r4, #1 3140 .LVL457: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ 3141 .loc 16 79 0 3142 0020 1193 str r3, [sp, #68] 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 3143 .loc 16 100 0 3144 0022 1095 str r5, [sp, #64] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 3145 .loc 16 78 0 3146 0024 0D94 str r4, [sp, #52] 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** q31_t *pInB = pSrcB->pData; /* Input data matrix pointer B */ 3147 .loc 16 71 0 3148 0026 0F97 str r7, [sp, #60] 3149 .LVL458: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* Loop counters */ 3150 .loc 16 80 0 3151 0028 0496 str r6, [sp, #16] 3152 .LVL459: 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 3153 .loc 16 103 0 3154 002a 5A44 add r2, r2, fp 3155 .LVL460: 3156 002c 0E91 str r1, [sp, #56] 3157 .loc 16 107 0 3158 002e 0690 str r0, [sp, #24] 3159 0030 65D0 beq .L306 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* For every row wise process, column loop counter is to be initiated */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** col = numColsB; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB = pSrcB->pData; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** j = 0U; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** col = col >> 1U; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* column loop */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** while (col > 0U) 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Set the variable sum, that acts as accumulator, to zero */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = 0; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum2 = 0; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum3 = 0; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum4 = 0; ARM GAS /tmp/cc6NnxTV.s page 256 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Initiate data pointers */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInA = pSrcA->pData + i; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB = pSrcB->pData + j; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInA2 = pInA + numColsA; 3160 .loc 16 131 0 3161 0032 B000 lsls r0, r6, #2 3162 .LVL461: 3163 0034 0890 str r0, [sp, #32] 3164 0036 5808 lsrs r0, r3, #1 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** colCnt = numColsA; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* matrix multiplication */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** while (colCnt > 0U) 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inA1 = *pInA++; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inB1 = pInB[0]; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inA2 = *pInA2++; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inB2 = pInB[1]; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB += numColsB; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = __SMMLA(inA1, inB1, sum1); 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum2 = __SMMLA(inA1, inB2, sum2); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum3 = __SMMLA(inA2, inB1, sum3); 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum4 = __SMMLA(inA2, inB2, sum4); 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #else 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum2 = (q31_t) ((((q63_t) sum2 << 32) + ((q63_t) inA1 * inB2)) >> 32); 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum3 = (q31_t) ((((q63_t) sum3 << 32) + ((q63_t) inA2 * inB1)) >> 32); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum4 = (q31_t) ((((q63_t) sum4 << 32) + ((q63_t) inA2 * inB2)) >> 32); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #endif 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Decrement loop counter */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** colCnt--; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Convert the result from 2.30 to 1.31 format and store in destination buffer */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** *px++ = sum1 << 1; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** *px++ = sum2 << 1; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** *px2++ = sum3 << 1; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** *px2++ = sum4 << 1; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** j += 2; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Decrement column loop counter */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** col--; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** i = i + (numColsA << 1U); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** px = px2 + (numColsB & 1U); 3165 .loc 16 175 0 3166 0038 4FEA8104 lsl r4, r1, #2 3167 .LVL462: ARM GAS /tmp/cc6NnxTV.s page 257 3168 003c 5FD0 beq .L306 3169 003e C300 lsls r3, r0, #3 3170 .LVL463: 3171 0040 1C44 add r4, r4, r3 3172 0042 03F10801 add r1, r3, #8 3173 0046 EB1A subs r3, r5, r3 3174 0048 9B1A subs r3, r3, r2 3175 004a C0EB4070 rsb r0, r0, r0, lsl #29 3176 004e 5C44 add r4, r4, fp 3177 0050 C000 lsls r0, r0, #3 3178 0052 1144 add r1, r1, r2 3179 0054 0B93 str r3, [sp, #44] 3180 0056 F300 lsls r3, r6, #3 3181 0058 0994 str r4, [sp, #36] 3182 005a 0C90 str r0, [sp, #48] 3183 005c 0291 str r1, [sp, #8] 3184 005e 0A93 str r3, [sp, #40] 3185 0060 0397 str r7, [sp, #12] 3186 .LVL464: 3187 .L310: 3188 0062 039A ldr r2, [sp, #12] 3189 0064 089B ldr r3, [sp, #32] 3190 0066 1344 add r3, r3, r2 3191 0068 0593 str r3, [sp, #20] 3192 006a 0B9A ldr r2, [sp, #44] 3193 006c 029B ldr r3, [sp, #8] 3194 006e 1A44 add r2, r2, r3 3195 0070 0192 str r2, [sp, #4] 3196 0072 0C9A ldr r2, [sp, #48] 3197 0074 02EB030A add r10, r2, r3 3198 0078 079B ldr r3, [sp, #28] 3199 007a 0093 str r3, [sp] 3200 .LVL465: 3201 .L309: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 3202 .loc 16 136 0 3203 007c 049A ldr r2, [sp, #16] 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInA2 = pInA + numColsA; 3204 .loc 16 130 0 3205 007e 009B ldr r3, [sp] 3206 .LVL466: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 3207 .loc 16 136 0 3208 0080 002A cmp r2, #0 3209 0082 00F09880 beq .L319 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 3210 .loc 16 126 0 3211 0086 0021 movs r1, #0 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 3212 .loc 16 131 0 3213 0088 DDF81490 ldr r9, [sp, #20] 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB = pSrcB->pData + j; 3214 .loc 16 129 0 3215 008c DDF80C80 ldr r8, [sp, #12] 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum4 = 0; 3216 .loc 16 125 0 3217 0090 0F46 mov r7, r1 ARM GAS /tmp/cc6NnxTV.s page 258 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum3 = 0; 3218 .loc 16 124 0 3219 0092 8C46 mov ip, r1 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum2 = 0; 3220 .loc 16 123 0 3221 0094 8E46 mov lr, r1 3222 .LVL467: 3223 .L308: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB += numColsB; 3224 .loc 16 143 0 3225 0096 D3E90054 ldrd r5, r4, [r3] 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inB1 = pInB[0]; 3226 .loc 16 140 0 3227 009a 58F8046B ldr r6, [r8], #4 3228 .LVL468: 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inB2 = pInB[1]; 3229 .loc 16 142 0 3230 009e 59F8040B ldr r0, [r9], #4 3231 .LVL469: 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 3232 .loc 16 144 0 3233 00a2 5B44 add r3, r3, fp 3234 .LVL470: 3235 .LBB211: 3236 .LBB212: 2118:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2119:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2120:Drivers/CMSIS/Include/cmsis_gcc.h **** 2121:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) 2122:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2123:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t result; 2124:Drivers/CMSIS/Include/cmsis_gcc.h **** 2125:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 2126:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2127:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2128:Drivers/CMSIS/Include/cmsis_gcc.h **** 2129:Drivers/CMSIS/Include/cmsis_gcc.h **** #if 0 2130:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PKHBT(ARG1,ARG2,ARG3) \ 2131:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 2132:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ 2133:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ 2134:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 2135:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 2136:Drivers/CMSIS/Include/cmsis_gcc.h **** 2137:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PKHTB(ARG1,ARG2,ARG3) \ 2138:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 2139:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ 2140:Drivers/CMSIS/Include/cmsis_gcc.h **** if (ARG3 == 0) \ 2141:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \ 2142:Drivers/CMSIS/Include/cmsis_gcc.h **** else \ 2143:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); 2144:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 2145:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 2146:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 2147:Drivers/CMSIS/Include/cmsis_gcc.h **** 2148:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ 2149:Drivers/CMSIS/Include/cmsis_gcc.h **** ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) ARM GAS /tmp/cc6NnxTV.s page 259 2150:Drivers/CMSIS/Include/cmsis_gcc.h **** 2151:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ 2152:Drivers/CMSIS/Include/cmsis_gcc.h **** ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) 2153:Drivers/CMSIS/Include/cmsis_gcc.h **** 2154:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) 2155:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2156:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t result; 2157:Drivers/CMSIS/Include/cmsis_gcc.h **** 2158:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); 3237 .loc 3 2158 0 3238 .syntax unified 3239 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3240 00a4 56FB05EE smmla lr, r6, r5, lr 3241 @ 0 "" 2 3242 .LVL471: 3243 .thumb 3244 .syntax unified 3245 .LBE212: 3246 .LBE211: 3247 .LBB213: 3248 .LBB214: 3249 .syntax unified 3250 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3251 00a8 56FB04CC smmla ip, r6, r4, ip 3252 @ 0 "" 2 3253 .LVL472: 3254 .thumb 3255 .syntax unified 3256 .LBE214: 3257 .LBE213: 3258 .LBB215: 3259 .LBB216: 3260 .syntax unified 3261 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3262 00ac 50FB0577 smmla r7, r0, r5, r7 3263 @ 0 "" 2 3264 .LVL473: 3265 .thumb 3266 .syntax unified 3267 .LBE216: 3268 .LBE215: 3269 .LBB217: 3270 .LBB218: 3271 .syntax unified 3272 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3273 00b0 50FB0411 smmla r1, r0, r4, r1 3274 @ 0 "" 2 3275 .LVL474: 3276 .thumb 3277 .syntax unified 3278 .LBE218: 3279 .LBE217: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 3280 .loc 16 136 0 3281 00b4 013A subs r2, r2, #1 3282 .LVL475: 3283 00b6 EED1 bne .L308 ARM GAS /tmp/cc6NnxTV.s page 260 3284 00b8 4FEA4E03 lsl r3, lr, #1 3285 .LVL476: 3286 00bc 4FEA4C02 lsl r2, ip, #1 3287 .LVL477: 3288 00c0 7F00 lsls r7, r7, #1 3289 .LVL478: 3290 00c2 4900 lsls r1, r1, #1 3291 .LVL479: 3292 .L307: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** *px++ = sum2 << 1; 3293 .loc 16 163 0 3294 00c4 0198 ldr r0, [sp, #4] 3295 00c6 40F8083C str r3, [r0, #-8] 3296 .LVL480: 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** *px2++ = sum3 << 1; 3297 .loc 16 164 0 3298 00ca 0346 mov r3, r0 3299 00cc 0833 adds r3, r3, #8 3300 00ce 0193 str r3, [sp, #4] 3301 00d0 009B ldr r3, [sp] 3302 00d2 40F8042C str r2, [r0, #-4] 3303 00d6 0833 adds r3, r3, #8 3304 00d8 0093 str r3, [sp] 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 3305 .loc 16 120 0 3306 00da 029B ldr r3, [sp, #8] 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 3307 .loc 16 166 0 3308 00dc 4AE90271 strd r7, r1, [r10, #-8] 3309 00e0 0AF1080A add r10, r10, #8 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 3310 .loc 16 120 0 3311 00e4 9A45 cmp r10, r3 3312 00e6 C9D1 bne .L309 3313 .LVL481: 3314 00e8 099A ldr r2, [sp, #36] 3315 00ea 1344 add r3, r3, r2 3316 .LVL482: 3317 00ec 0293 str r3, [sp, #8] 3318 .LVL483: 3319 00ee 0A9A ldr r2, [sp, #40] 3320 00f0 039B ldr r3, [sp, #12] 3321 00f2 1344 add r3, r3, r2 3322 00f4 0393 str r3, [sp, #12] 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 3323 .loc 16 107 0 3324 00f6 069B ldr r3, [sp, #24] 3325 00f8 013B subs r3, r3, #1 3326 .LVL484: 3327 00fa 0693 str r3, [sp, #24] 3328 00fc B1D1 bne .L310 3329 .LVL485: 3330 .L306: 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** px2 = px + numColsB; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Decrement row loop counter */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** row--; ARM GAS /tmp/cc6NnxTV.s page 261 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Compute any remaining odd row/column below */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Compute remaining output column */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** if (numColsB & 1U) { 3331 .loc 16 185 0 3332 00fe 0E9B ldr r3, [sp, #56] 3333 0100 4BB3 cbz r3, .L311 3334 .LVL486: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Avoid redundant computation of last element */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** row = numRowsA & (~1U); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Point to remaining unfilled column in output matrix */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** px = pDst->pData + numColsB-1; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInA = pSrcA->pData; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* row loop */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** while (row > 0) 3335 .loc 16 195 0 3336 0102 0D9B ldr r3, [sp, #52] 3337 0104 33F00107 bics r7, r3, #1 3338 .LVL487: 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInA = pSrcA->pData; 3339 .loc 16 191 0 3340 0108 ABF1040E sub lr, fp, #4 3341 .LVL488: 3342 .loc 16 195 0 3343 010c 23D0 beq .L311 3344 010e 109B ldr r3, [sp, #64] 3345 0110 049D ldr r5, [sp, #16] 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 3346 .loc 16 192 0 3347 0112 DDF83CC0 ldr ip, [sp, #60] 3348 0116 0BEB0E06 add r6, fp, lr 3349 011a 1E44 add r6, r6, r3 3350 011c 079B ldr r3, [sp, #28] 3351 011e 4FEA8509 lsl r9, r5, #2 3352 0122 9E44 add lr, lr, r3 3353 .LVL489: 3354 0124 CBF10008 rsb r8, fp, #0 3355 .LVL490: 3356 .L314: 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* point to last column in matrix B */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB = pSrcB->pData + numColsB-1; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Set variable sum1, that acts as accumulator, to zero */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = 0; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Loop unrolling: Compute 4 columns at a time. */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** colCnt = numColsA >> 2U; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 262 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* matrix multiplication */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** while (colCnt > 0U) 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = __SMMLA(*pInA++, *pInB, sum1); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #else 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #endif 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB += numColsB; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = __SMMLA(*pInA++, *pInB, sum1); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #else 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #endif 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB += numColsB; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = __SMMLA(*pInA++, *pInB, sum1); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #else 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #endif 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB += numColsB; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = __SMMLA(*pInA++, *pInB, sum1); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #else 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #endif 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB += numColsB; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Decrement loop counter */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** colCnt--; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Loop unrolling: Compute remaining column */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** colCnt = numColsA % 4U; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #else 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Initialize colCnt with number of columns */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** colCnt = numColsA; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** while (colCnt > 0U) { 3357 .loc 16 254 0 3358 0128 002D cmp r5, #0 3359 012a 4AD0 beq .L320 3360 012c 2A46 mov r2, r5 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 3361 .loc 16 199 0 3362 012e 7346 mov r3, lr 3363 .loc 16 254 0 3364 0130 6046 mov r0, ip 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 3365 .loc 16 202 0 ARM GAS /tmp/cc6NnxTV.s page 263 3366 0132 0021 movs r1, #0 3367 0134 AA46 mov r10, r5 3368 .LVL491: 3369 .L313: 3370 .LBB219: 3371 .LBB220: 3372 .loc 3 2158 0 3373 0136 50F8044B ldr r4, [r0], #4 3374 .LVL492: 3375 013a 1D68 ldr r5, [r3] 3376 .syntax unified 3377 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3378 013c 54FB0511 smmla r1, r4, r5, r1 3379 @ 0 "" 2 3380 .LVL493: 3381 .thumb 3382 .syntax unified 3383 .LBE220: 3384 .LBE219: 3385 .loc 16 254 0 3386 0140 013A subs r2, r2, #1 3387 .LVL494: 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = __SMMLA(*pInA++, *pInB, sum1); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #else 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #endif 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB += numColsB; 3388 .loc 16 260 0 3389 0142 5B44 add r3, r3, fp 3390 .LVL495: 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 3391 .loc 16 254 0 3392 0144 F7D1 bne .L313 3393 0146 5546 mov r5, r10 3394 0148 CC44 add ip, ip, r9 3395 014a 4900 lsls r1, r1, #1 3396 .LVL496: 3397 .L312: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 3398 .loc 16 195 0 3399 014c 013F subs r7, r7, #1 3400 .LVL497: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** colCnt--; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Convert the result from 2.30 to 1.31 format and store in destination buffer */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** *px = sum1 << 1; 3401 .loc 16 266 0 3402 014e 46F80810 str r1, [r6, r8] 3403 .LVL498: 3404 0152 5E44 add r6, r6, fp 3405 .LVL499: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 3406 .loc 16 195 0 3407 0154 E8D1 bne .L314 ARM GAS /tmp/cc6NnxTV.s page 264 3408 .LVL500: 3409 .L311: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** px += numColsB; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Decrement row loop counter */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** row--; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Compute remaining output row */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** if (numRowsA & 1U) { 3410 .loc 16 275 0 3411 0156 0D9B ldr r3, [sp, #52] 3412 0158 1A46 mov r2, r3 3413 015a D207 lsls r2, r2, #31 3414 015c 27D5 bpl .L315 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* point to last row in output matrix */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** px = pDst->pData + (numColsB) * (numRowsA-1); 3415 .loc 16 278 0 3416 015e 119A ldr r2, [sp, #68] 3417 0160 1099 ldr r1, [sp, #64] 3418 0162 013B subs r3, r3, #1 3419 0164 03FB02F7 mul r7, r3, r2 3420 0168 01EB8707 add r7, r1, r7, lsl #2 3421 .LVL501: 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** col = numColsB; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** i = 0U; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* col loop */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** while (col > 0) 3422 .loc 16 284 0 3423 016c FAB1 cbz r2, .L315 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* point to last row in matrix A */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInA = pSrcA->pData + (numRowsA-1) * numColsA; 3424 .loc 16 288 0 3425 016e 049D ldr r5, [sp, #16] 3426 0170 0F9A ldr r2, [sp, #60] 3427 .LVL502: 3428 0172 079E ldr r6, [sp, #28] 3429 0174 03FB05F3 mul r3, r3, r5 3430 0178 02EB830C add ip, r2, r3, lsl #2 3431 017c 07EB0B0E add lr, r7, fp 3432 0180 A846 mov r8, r5 3433 .LVL503: 3434 .L318: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB = pSrcB->pData + i; 3435 .loc 16 289 0 3436 0182 3346 mov r3, r6 3437 .LVL504: 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Set variable sum1, that acts as accumulator, to zero */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = 0; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 265 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Loop unrolling: Compute 4 columns at a time. */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** colCnt = numColsA >> 2U; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* matrix multiplication */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** while (colCnt > 0U) 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inA1 = *pInA++; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inA2 = *pInA++; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inB1 = *pInB; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB += numColsB; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inB2 = *pInB; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB += numColsB; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = __SMMLA(inA1, inB1, sum1); 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = __SMMLA(inA2, inB2, sum1); 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #else 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32); 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32); 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #endif 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inA1 = *pInA++; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inA2 = *pInA++; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inB1 = *pInB; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB += numColsB; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** inB2 = *pInB; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB += numColsB; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = __SMMLA(inA1, inB1, sum1); 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = __SMMLA(inA2, inB2, sum1); 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #else 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32); 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #endif 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Decrement loop counter */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** colCnt--; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Loop unrolling: Compute remaining column */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** colCnt = numColsA % 4U; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #else 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Initialize colCnt with number of columns */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** colCnt = numColsA; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** while (colCnt > 0U) { 3438 .loc 16 344 0 3439 0184 B8F1000F cmp r8, #0 3440 0188 19D0 beq .L321 3441 018a 4246 mov r2, r8 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB = pSrcB->pData + i; 3442 .loc 16 288 0 ARM GAS /tmp/cc6NnxTV.s page 266 3443 018c 6046 mov r0, ip 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 3444 .loc 16 292 0 3445 018e 0021 movs r1, #0 3446 .LVL505: 3447 .L317: 3448 .LBB221: 3449 .LBB222: 3450 .loc 3 2158 0 3451 0190 50F8044B ldr r4, [r0], #4 3452 .LVL506: 3453 0194 1D68 ldr r5, [r3] 3454 .syntax unified 3455 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3456 0196 54FB0511 smmla r1, r4, r5, r1 3457 @ 0 "" 2 3458 .LVL507: 3459 .thumb 3460 .syntax unified 3461 .LBE222: 3462 .LBE221: 3463 .loc 16 344 0 3464 019a 013A subs r2, r2, #1 3465 .LVL508: 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = __SMMLA(*pInA++, *pInB, sum1); 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #else 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #endif 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** pInB += numColsB; 3466 .loc 16 350 0 3467 019c 5B44 add r3, r3, fp 3468 .LVL509: 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 3469 .loc 16 344 0 3470 019e F7D1 bne .L317 3471 01a0 4900 lsls r1, r1, #1 3472 .LVL510: 3473 .L316: 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** colCnt--; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Saturate and store the result in the destination buffer */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** *px++ = sum1 << 1; 3474 .loc 16 356 0 3475 01a2 47F8041B str r1, [r7], #4 3476 .LVL511: 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 3477 .loc 16 284 0 3478 01a6 7745 cmp r7, lr 3479 01a8 06F10406 add r6, r6, #4 3480 01ac E9D1 bne .L318 3481 .LVL512: 3482 .L315: 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** i++; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 267 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Decrement col loop counter */ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** col--; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** status = ARM_MATH_SUCCESS; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** /* Return to application */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** return (status); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** } 3483 .loc 16 370 0 3484 01ae 0020 movs r0, #0 3485 01b0 13B0 add sp, sp, #76 3486 .LCFI43: 3487 .cfi_remember_state 3488 .cfi_def_cfa_offset 36 3489 @ sp needed 3490 01b2 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 3491 .LVL513: 3492 .L319: 3493 .LCFI44: 3494 .cfi_restore_state 3495 01b6 1346 mov r3, r2 3496 .LVL514: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** { 3497 .loc 16 136 0 3498 01b8 1146 mov r1, r2 3499 01ba 1746 mov r7, r2 3500 01bc 82E7 b .L307 3501 .LVL515: 3502 .L321: 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 3503 .loc 16 344 0 3504 01be 4146 mov r1, r8 3505 01c0 EFE7 b .L316 3506 .LVL516: 3507 .L320: 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c **** #if defined (ARM_MATH_DSP) 3508 .loc 16 254 0 3509 01c2 2946 mov r1, r5 3510 01c4 C2E7 b .L312 3511 .cfi_endproc 3512 .LFE161: 3514 01c6 00BF .section .text.arm_mat_mult_q15,"ax",%progbits 3515 .align 1 3516 .p2align 2,,3 3517 .global arm_mat_mult_q15 3518 .syntax unified 3519 .thumb 3520 .thumb_func 3521 .fpu fpv4-sp-d16 3523 arm_mat_mult_q15: 3524 .LFB162: 3525 .file 17 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* ---------------------------------------------------------------------- ARM GAS /tmp/cc6NnxTV.s page 268 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Title: arm_mat_mult_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Description: Q15 matrix multiplication 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** @addtogroup MatrixMult 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** @brief Q15 matrix multiplication. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** @param[in] pSrcA points to the first input matrix structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** @param[in] pSrcB points to the second input matrix structure 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** @param[out] pDst points to output matrix structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** @param[in] pState points to the array for storing intermediate results (Unused) 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** @return execution status 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** @par Scaling and Overflow Behavior 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** The function is implemented using an internal 64-bit accumulator. The inputs to 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** multiplications are in 1.15 format and multiplications yield a 2.30 result. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 f 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** This approach provides 33 guard bits and there is no risk of overflow. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** and then saturated to 1.15 format. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** Refer to \ref arm_mat_mult_fast_q15() for a faster but less precise version of t ARM GAS /tmp/cc6NnxTV.s page 269 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #if defined(ARM_MATH_MVEI) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #define MVE_ASRL_SAT16(acc, shift) ((sqrshrl_sat48(acc, -(32-shift)) >> 32) & 0xffffffff) 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #define MATRIX_DIM2 2 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #define MATRIX_DIM3 3 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #define MATRIX_DIM4 4 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** __STATIC_INLINE arm_status arm_mat_mult_q15_2x2_mve( 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** const arm_matrix_instance_q15 * pSrcA, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** const arm_matrix_instance_q15 * pSrcB, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** arm_matrix_instance_q15 * pDst) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pOut = pDst->pData; /* output data matrix pointer */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16x8_t vecColBOffs; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA0 = pInA; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA1 = pInA0 + MATRIX_DIM2; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q63_t acc0, acc1; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15x8_t vecB, vecA0, vecA1; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** mve_pred16_t p0 = vctp16q(MATRIX_DIM2); 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecColBOffs = vidupq_u16((uint32_t)0, 2); /* MATRIX_DIM2 */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pSrcB->pData; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset_z_s16((q15_t const *)pInB, vecColBOffs, p0); 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA0 = vldrhq_s16(pInA0); 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA1 = vldrhq_s16(pInA1); 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavq(vecA0, vecB); 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = vmlaldavq(vecA1, vecB); 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = asrl(acc0, 15); 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = asrl(acc1, 15); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[0 * MATRIX_DIM2] = (q15_t) __SSAT(acc0, 16); 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[1 * MATRIX_DIM2] = (q15_t) __SSAT(acc1, 16); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut++; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* move to next B column */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pInB + 1; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavq(vecA0, vecB); 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = vmlaldavq(vecA1, vecB); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = asrl(acc0, 15); 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = asrl(acc1, 15); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[0 * MATRIX_DIM2] = (q15_t) __SSAT(acc0, 16); 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[1 * MATRIX_DIM2] = (q15_t) __SSAT(acc1, 16); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 270 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Return to application 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** return (ARM_MATH_SUCCESS); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** __STATIC_INLINE arm_status arm_mat_mult_q15_3x3_mve( 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** const arm_matrix_instance_q15 * pSrcA, 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** const arm_matrix_instance_q15 * pSrcB, 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** arm_matrix_instance_q15 * pDst) 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pOut = pDst->pData; /* output data matrix pointer */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16x8_t vecColBOffs; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA0 = pInA; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA1 = pInA0 + MATRIX_DIM3; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA2 = pInA1 + MATRIX_DIM3; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q63_t acc0, acc1, acc2; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15x8_t vecB, vecA0, vecA1, vecA2; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** mve_pred16_t p0 = vctp16q(MATRIX_DIM3); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecColBOffs = vidupq_u16((uint32_t)0, 1); 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecColBOffs = vecColBOffs * MATRIX_DIM3; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pSrcB->pData; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset_z_s16((q15_t const *)pInB, vecColBOffs, p0); 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA0 = vldrhq_s16(pInA0); 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA1 = vldrhq_s16(pInA1); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA2 = vldrhq_s16(pInA2); 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavq(vecA0, vecB); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = vmlaldavq(vecA1, vecB); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = vmlaldavq(vecA2, vecB); 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = asrl(acc0, 15); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = asrl(acc1, 15); 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = asrl(acc2, 15); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[0 * MATRIX_DIM3] = (q15_t) __SSAT(acc0, 16); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[1 * MATRIX_DIM3] = (q15_t) __SSAT(acc1, 16); 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[2 * MATRIX_DIM3] = (q15_t) __SSAT(acc2, 16); 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut++; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* move to next B column */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pInB + 1; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0); 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavq(vecA0, vecB); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = vmlaldavq(vecA1, vecB); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = vmlaldavq(vecA2, vecB); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 271 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = asrl(acc0, 15); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = asrl(acc1, 15); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = asrl(acc2, 15); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[0 * MATRIX_DIM3] = (q15_t) __SSAT(acc0, 16); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[1 * MATRIX_DIM3] = (q15_t) __SSAT(acc1, 16); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[2 * MATRIX_DIM3] = (q15_t) __SSAT(acc2, 16); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut++; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* move to next B column */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pInB + 1; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavq(vecA0, vecB); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = vmlaldavq(vecA1, vecB); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = vmlaldavq(vecA2, vecB); 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = asrl(acc0, 15); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = asrl(acc1, 15); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = asrl(acc2, 15); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[0 * MATRIX_DIM3] = (q15_t) __SSAT(acc0, 16); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[1 * MATRIX_DIM3] = (q15_t) __SSAT(acc1, 16); 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[2 * MATRIX_DIM3] = (q15_t) __SSAT(acc2, 16); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Return to application 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** return (ARM_MATH_SUCCESS); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** __STATIC_INLINE arm_status arm_mat_mult_q15_4x4_mve( 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** const arm_matrix_instance_q15 * pSrcA, 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** const arm_matrix_instance_q15 * pSrcB, 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** arm_matrix_instance_q15 * pDst) 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pOut = pDst->pData; /* output data matrix pointer */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16x8_t vecColBOffs; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA0 = pInA; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA1 = pInA0 + MATRIX_DIM4; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA2 = pInA1 + MATRIX_DIM4; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA3 = pInA2 + MATRIX_DIM4; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q63_t acc0, acc1, acc2, acc3; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15x8_t vecB, vecA0, vecA1, vecA2, vecA3; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** mve_pred16_t p0 = vctp16q(MATRIX_DIM4); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecColBOffs = vidupq_u16((uint32_t)0, 4); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pSrcB->pData; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset_z_s16((q15_t const *)pInB, vecColBOffs, p0); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA0 = vldrhq_s16(pInA0); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA1 = vldrhq_s16(pInA1); ARM GAS /tmp/cc6NnxTV.s page 272 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA2 = vldrhq_s16(pInA2); 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA3 = vldrhq_s16(pInA3); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavq(vecA0, vecB); 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = vmlaldavq(vecA1, vecB); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = vmlaldavq(vecA2, vecB); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc3 = vmlaldavq(vecA3, vecB); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = asrl(acc0, 15); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = asrl(acc1, 15); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = asrl(acc2, 15); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc3 = asrl(acc3, 15); 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[0 * MATRIX_DIM4] = (q15_t) __SSAT(acc0, 16); 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[1 * MATRIX_DIM4] = (q15_t) __SSAT(acc1, 16); 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[2 * MATRIX_DIM4] = (q15_t) __SSAT(acc2, 16); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[3 * MATRIX_DIM4] = (q15_t) __SSAT(acc3, 16); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut++; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* move to next B column */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pInB + 1; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavq(vecA0, vecB); 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = vmlaldavq(vecA1, vecB); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = vmlaldavq(vecA2, vecB); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc3 = vmlaldavq(vecA3, vecB); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = asrl(acc0, 15); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = asrl(acc1, 15); 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = asrl(acc2, 15); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc3 = asrl(acc3, 15); 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[0 * MATRIX_DIM4] = (q15_t) __SSAT(acc0, 16); 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[1 * MATRIX_DIM4] = (q15_t) __SSAT(acc1, 16); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[2 * MATRIX_DIM4] = (q15_t) __SSAT(acc2, 16); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[3 * MATRIX_DIM4] = (q15_t) __SSAT(acc3, 16); 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut++; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* move to next B column */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pInB + 1; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavq(vecA0, vecB); 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = vmlaldavq(vecA1, vecB); 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = vmlaldavq(vecA2, vecB); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc3 = vmlaldavq(vecA3, vecB); 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = asrl(acc0, 15); 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = asrl(acc1, 15); 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = asrl(acc2, 15); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc3 = asrl(acc3, 15); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[0 * MATRIX_DIM4] = (q15_t) __SSAT(acc0, 16); ARM GAS /tmp/cc6NnxTV.s page 273 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[1 * MATRIX_DIM4] = (q15_t) __SSAT(acc1, 16); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[2 * MATRIX_DIM4] = (q15_t) __SSAT(acc2, 16); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[3 * MATRIX_DIM4] = (q15_t) __SSAT(acc3, 16); 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut++; 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* move to next B column */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pInB + 1; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0); 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavq(vecA0, vecB); 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = vmlaldavq(vecA1, vecB); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = vmlaldavq(vecA2, vecB); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc3 = vmlaldavq(vecA3, vecB); 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = asrl(acc0, 15); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = asrl(acc1, 15); 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = asrl(acc2, 15); 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc3 = asrl(acc3, 15); 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[0 * MATRIX_DIM4] = (q15_t) __SSAT(acc0, 16); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[1 * MATRIX_DIM4] = (q15_t) __SSAT(acc1, 16); 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[2 * MATRIX_DIM4] = (q15_t) __SSAT(acc2, 16); 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[3 * MATRIX_DIM4] = (q15_t) __SSAT(acc3, 16); 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Return to application 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** return (ARM_MATH_SUCCESS); 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** arm_status arm_mat_mult_q15( 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** const arm_matrix_instance_q15 * pSrcA, 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** const arm_matrix_instance_q15 * pSrcB, 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** arm_matrix_instance_q15 * pDst, 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t * pState) 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pOut = pDst->pData; /* output data matrix pointer */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *px; /* Temporary output data matrix pointer */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t col, i = 0U, row = numRowsA, colCnt; /* loop counters */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16x8_t vecOffs, vecColBOffs; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint32_t blkCnt,rowCnt; /* loop counters */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** arm_status status; /* Status of matrix multiplication */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** (void)pState; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Check for matrix mismatch condition */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** if ((pSrcA->numCols != pSrcB->numRows) || 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** (pSrcA->numRows != pDst->numRows) || 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** (pSrcB->numCols != pDst->numCols) ) 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { ARM GAS /tmp/cc6NnxTV.s page 274 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** else 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #endif 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* small squared matrix specialized routines */ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** if(numRowsA == numColsB && numColsB == numColsA) { 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** if (numRowsA == 1) 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q63_t sum; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** sum = pInA[0] * pInB[0]; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pOut[0] = (q15_t) __SSAT((sum >> 15), 16); 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** return (ARM_MATH_SUCCESS); 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** else if(numRowsA == 2) 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** return arm_mat_mult_q15_2x2_mve(pSrcA, pSrcB, pDst); 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** else if(numRowsA == 3) 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** return arm_mat_mult_q15_3x3_mve(pSrcA, pSrcB, pDst); 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** else if (numRowsA == 4) 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** return arm_mat_mult_q15_4x4_mve(pSrcA, pSrcB, pDst); 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecColBOffs = vidupq_u16((uint32_t)0, 1); 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecColBOffs = vecColBOffs * (uint16_t) (numColsB); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * row loop 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** rowCnt = row >> 2; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** while (rowCnt > 0U) 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Output pointer is set to starting address of the row being processed 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px = pOut + i; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** i = i + 4 * numColsB; 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * For every row wise process, the column loop counter is to be initiated 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** col = numColsB; 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * For every row wise process, the pInB pointer is set 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * to the starting address of the pSrcB data 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pSrcB->pData; 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * column loop 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** while (col > 0U) 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* ARM GAS /tmp/cc6NnxTV.s page 275 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * generate 4 columns elements 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Matrix A columns number of MAC operations are to be performed 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** colCnt = numColsA; 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA0 = pInA; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA1 = pInA0 + numColsA; 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA2 = pInA1 + numColsA; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA3 = pInA2 + numColsA; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q63_t acc0, acc1, acc2, acc3; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = 0LL; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = 0LL; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = 0LL; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc3 = 0LL; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pSrcA0Vec = (q15_t const *) pInA0; 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pSrcA1Vec = (q15_t const *) pInA1; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pSrcA2Vec = (q15_t const *) pInA2; 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pSrcA3Vec = (q15_t const *) pInA3; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecOffs = vecColBOffs; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** blkCnt = (numColsA) >> 3; 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** while (blkCnt > 0U) 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15x8_t vecB, vecA; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset((int16_t const *)pInB, vecOffs); 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecOffs = vecOffs + (uint16_t) (numColsB * 8); 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA = vld1q(pSrcA0Vec); pSrcA0Vec += 8; 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavaq(acc0, vecA, vecB); 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA = vld1q(pSrcA1Vec); pSrcA1Vec += 8; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = vmlaldavaq(acc1, vecA, vecB); 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA = vld1q(pSrcA2Vec); pSrcA2Vec += 8; 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = vmlaldavaq(acc2, vecA, vecB); 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA = vld1q(pSrcA3Vec); pSrcA3Vec += 8; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc3 = vmlaldavaq(acc3, vecA, vecB); 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** blkCnt--; 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * tail 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** blkCnt = numColsA & 7; 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** if (blkCnt > 0U) 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15x8_t vecB, vecA; 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset((int16_t const *)pInB, vecOffs); 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecOffs = vecOffs + (uint16_t) (numColsB * 8); 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 276 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA = vld1q(pSrcA0Vec); 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavaq_p(acc0, vecA, vecB, p0); 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA = vld1q(pSrcA1Vec); 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc1 = vmlaldavaq_p(acc1, vecA, vecB, p0); 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA = vld1q(pSrcA2Vec); 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc2 = vmlaldavaq_p(acc2, vecA, vecB, p0); 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA = vld1q(pSrcA3Vec); 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc3 = vmlaldavaq_p(acc3, vecA, vecB, p0); 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px[0] = (q15_t)MVE_ASRL_SAT16(acc0, 15); 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px[1 * numColsB] = (q15_t)MVE_ASRL_SAT16(acc1, 15); 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px[2 * numColsB] = (q15_t)MVE_ASRL_SAT16(acc2, 15); 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px[3 * numColsB] = (q15_t)MVE_ASRL_SAT16(acc3, 15); 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px++; 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Decrement the column loop counter 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** col--; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Update the pointer pInB to point to the starting address of the next column 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pSrcB->pData + (numColsB - col); 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Update the pointer pInA to point to the starting address of the next row 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInA += (numColsA * 4); 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Decrement the row loop counter 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** rowCnt --; 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** rowCnt = row & 3; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** while (rowCnt > 0U) 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Output pointer is set to starting address of the row being processed 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px = pOut + i; 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** i = i + numColsB; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * For every row wise process, the column loop counter is to be initiated 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** col = numColsB; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * For every row wise process, the pInB pointer is set 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * to the starting address of the pSrcB data 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pSrcB->pData; 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * column loop 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** while (col > 0U) ARM GAS /tmp/cc6NnxTV.s page 277 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * generate 4 columns elements 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Matrix A columns number of MAC operations are to be performed 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** colCnt = numColsA; 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t const *pSrcA0Vec; 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA0 = pInA; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q63_t acc0; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = 0LL; 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pSrcA0Vec = (q15_t const *) pInA0; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecOffs = vecColBOffs; 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** blkCnt = (numColsA) >> 3; 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** while (blkCnt > 0U) 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15x8_t vecB, vecA; 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset((int16_t const *)pInB, vecOffs); 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecOffs = vecOffs + (uint16_t) (numColsB * 8); 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA = vld1q(pSrcA0Vec); 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pSrcA0Vec += 8; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavaq(acc0, vecA, vecB); 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** blkCnt--; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * tail 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** blkCnt = numColsA & 7; 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** if (blkCnt > 0U) 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15x8_t vecB, vecA; 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecB = vldrhq_gather_shifted_offset((int16_t const *)pInB, vecOffs); 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecOffs = vecOffs + (uint16_t) (numColsB * 8); 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** vecA = vld1q(pSrcA0Vec); 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** acc0 = vmlaldavaq_p(acc0, vecA, vecB, p0); 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px[0] = (q15_t)MVE_ASRL_SAT16(acc0, 15); 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px++; 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Decrement the column loop counter 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ ARM GAS /tmp/cc6NnxTV.s page 278 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** col--; 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Update the pointer pInB to point to the starting address of the next column 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pSrcB->pData + (numColsB - col); 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** * Update the pointer pInA to point to the starting address of the next row 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInA += (numColsA ); 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** rowCnt--; 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** status = ARM_MATH_SUCCESS; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Return to application */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** return (status); 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #else 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** arm_status arm_mat_mult_q15( 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** const arm_matrix_instance_q15 * pSrcA, 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** const arm_matrix_instance_q15 * pSrcB, 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** arm_matrix_instance_q15 * pDst, 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t * pState) 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3526 .loc 17 599 0 3527 .cfi_startproc 3528 @ args = 0, pretend = 0, frame = 48 3529 @ frame_needed = 0, uses_anonymous_args = 0 3530 .LVL517: 3531 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 3532 .LCFI45: 3533 .cfi_def_cfa_offset 36 3534 .cfi_offset 4, -36 3535 .cfi_offset 5, -32 3536 .cfi_offset 6, -28 3537 .cfi_offset 7, -24 3538 .cfi_offset 8, -20 3539 .cfi_offset 9, -16 3540 .cfi_offset 10, -12 3541 .cfi_offset 11, -8 3542 .cfi_offset 14, -4 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q63_t sum; /* Accumulator */ 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #if defined (ARM_MATH_DSP) /* != CM0 */ 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pSrcBT = pState; /* Input data matrix pointer for transpose * 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA = pSrcA->pData; /* Input data matrix pointer A of Q15 type * 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type * 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *px; /* Temporary output data matrix pointer */ 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 3543 .loc 17 609 0 3544 0004 4C88 ldrh r4, [r1, #2] ARM GAS /tmp/cc6NnxTV.s page 279 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numRowsB = pSrcB->numRows; /* Number of rows of input matrix A */ 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint32_t col, i = 0U, row = numRowsB, colCnt; /* Loop counters */ 3545 .loc 17 612 0 3546 0006 0D88 ldrh r5, [r1] 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *px; /* Temporary output data matrix pointer */ 3547 .loc 17 606 0 3548 0008 4F68 ldr r7, [r1, #4] 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 3549 .loc 17 608 0 3550 000a 0146 mov r1, r0 3551 .LVL518: 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q63_t sum; /* Accumulator */ 3552 .loc 17 599 0 3553 000c 8DB0 sub sp, sp, #52 3554 .LCFI46: 3555 .cfi_def_cfa_offset 88 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numRowsB = pSrcB->numRows; /* Number of rows of input matrix A */ 3556 .loc 17 610 0 3557 000e 4988 ldrh r1, [r1, #2] 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ 3558 .loc 17 609 0 3559 0010 0894 str r4, [sp, #32] 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** arm_status status; /* Status of matrix multiplication */ 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q31_t in; /* Temporary variable to hold the input valu 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q31_t inA1, inB1, inA2, inB2; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Check for matrix mismatch condition */ 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** if ((pSrcA->numCols != pSrcB->numRows) || 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** (pSrcA->numRows != pDst->numRows) || 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** (pSrcB->numCols != pDst->numCols) ) 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** else 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Matrix transpose */ 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** do 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* The pointer px is set to starting address of column being processed */ 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px = pSrcBT + i; 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Apply loop unrolling and exchange columns with row elements */ 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** col = numColsB >> 2U; 3560 .loc 17 640 0 3561 0012 4FEA940E lsr lr, r4, #2 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numRowsB = pSrcB->numRows; /* Number of rows of input matrix A */ 3562 .loc 17 610 0 3563 0016 0291 str r1, [sp, #8] 3564 .loc 17 640 0 ARM GAS /tmp/cc6NnxTV.s page 280 3565 0018 2146 mov r1, r4 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** while (col > 0U) 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Read two elements from row */ 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** in = read_q15x2_ia ((q15_t **) &pInB); 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Unpack and store one element in destination */ 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** *px = (q15_t) in; 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #else 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Update pointer px to point to next row of transposed matrix */ 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px += numRowsB; 3566 .loc 17 657 0 3567 001a 6C00 lsls r4, r5, #1 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q63_t sum; /* Accumulator */ 3568 .loc 17 599 0 3569 001c 0390 str r0, [sp, #12] 3570 001e 0EFB04FB mul fp, lr, r4 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 3571 .loc 17 608 0 3572 0022 0088 ldrh r0, [r0] 3573 .LVL519: 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q63_t sum; /* Accumulator */ 3574 .loc 17 599 0 3575 0024 0492 str r2, [sp, #16] 3576 0026 01F00308 and r8, r1, #3 3577 002a 4FEACE02 lsl r2, lr, #3 3578 .LVL520: 3579 002e 04EB8506 add r6, r4, r5, lsl #2 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 3580 .loc 17 608 0 3581 0032 0190 str r0, [sp, #4] 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q63_t sum; /* Accumulator */ 3582 .loc 17 599 0 3583 0034 0B93 str r3, [sp, #44] 3584 .LVL521: 3585 0036 4FEA8B0B lsl fp, fp, #2 3586 003a 04EB0309 add r9, r4, r3 3587 003e ED00 lsls r5, r5, #3 3588 0040 0092 str r2, [sp] 3589 0042 4FEA480A lsl r10, r8, #1 3590 0046 9C46 mov ip, r3 3591 .LVL522: 3592 .L353: 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 3593 .loc 17 637 0 3594 0048 6346 mov r3, ip 3595 .LVL523: 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3596 .loc 17 644 0 3597 004a BEF1000F cmp lr, #0 ARM GAS /tmp/cc6NnxTV.s page 281 3598 004e 14D0 beq .L349 3599 0050 3946 mov r1, r7 3600 0052 7046 mov r0, lr 3601 .LVL524: 3602 .L350: 3603 .LBB223: 3604 .LBB224: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3605 .loc 7 928 0 3606 0054 0A68 ldr r2, [r1] @ unaligned 3607 .LVL525: 3608 .LBE224: 3609 .LBE223: 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #else 3610 .loc 17 651 0 3611 0056 1A80 strh r2, [r3] @ movhi 3612 .LVL526: 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Unpack and store second element in destination */ 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); 3613 .loc 17 661 0 3614 0058 1214 asrs r2, r2, #16 3615 005a 1A53 strh r2, [r3, r4] @ movhi 3616 .LVL527: 3617 .LBB225: 3618 .LBB226: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3619 .loc 7 928 0 3620 005c 4A68 ldr r2, [r1, #4] @ unaligned 3621 .LVL528: 3622 .LBE226: 3623 .LBE225: 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #else 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** *px = (q15_t) in; 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Update pointer px to point to next row of transposed matrix */ 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px += numRowsB; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Read two elements from row */ 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** in = read_q15x2_ia ((q15_t **) &pInB); 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Unpack and store one element in destination */ 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** *px = (q15_t) in; 3624 .loc 17 674 0 3625 005e 23F81420 strh r2, [r3, r4, lsl #1] @ movhi 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3626 .loc 17 644 0 3627 0062 0138 subs r0, r0, #1 3628 .LVL529: 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #else 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px += numRowsB; 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 282 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); 3629 .loc 17 681 0 3630 0064 4FEA2242 asr r2, r2, #16 3631 .LVL530: 3632 0068 9A53 strh r2, [r3, r6] @ movhi 3633 006a 01F10801 add r1, r1, #8 3634 .LVL531: 3635 006e 2B44 add r3, r3, r5 3636 .LVL532: 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3637 .loc 17 644 0 3638 0070 F0D1 bne .L350 3639 0072 009B ldr r3, [sp] 3640 .LVL533: 3641 0074 1F44 add r7, r7, r3 3642 0076 0CEB0B03 add r3, ip, fp 3643 .LVL534: 3644 .L349: 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #else 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** *px = (q15_t) in; 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px += numRowsB; 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Decrement column loop counter */ 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** col--; 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** ** No loop unrolling is used. */ 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** col = numColsB % 0x4U; 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** while (col > 0U) 3645 .loc 17 695 0 3646 007a B8F1000F cmp r8, #0 3647 007e 08D0 beq .L351 3648 0080 3946 mov r1, r7 3649 0082 4246 mov r2, r8 3650 .LVL535: 3651 .L352: 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Read and store input element in destination */ 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** *px = *pInB++; 3652 .loc 17 698 0 3653 0084 31F9020B ldrsh r0, [r1], #2 3654 .LVL536: 3655 0088 1880 strh r0, [r3] @ movhi 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3656 .loc 17 695 0 3657 008a 013A subs r2, r2, #1 3658 .LVL537: 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Update pointer px to point to next row of transposed matrix */ 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px += numRowsB; 3659 .loc 17 701 0 3660 008c 2344 add r3, r3, r4 3661 .LVL538: ARM GAS /tmp/cc6NnxTV.s page 283 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3662 .loc 17 695 0 3663 008e F9D1 bne .L352 3664 0090 5744 add r7, r7, r10 3665 .LVL539: 3666 .L351: 3667 0092 0CF1020C add ip, ip, #2 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Decrement column loop counter */ 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** col--; 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** i++; 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Decrement row loop counter */ 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** row--; 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } while (row > 0U); 3668 .loc 17 712 0 3669 0096 E145 cmp r9, ip 3670 0098 D6D1 bne .L353 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Reset variables for usage in following multiplication process */ 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** row = numRowsA; 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** i = 0U; 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px = pDst->pData; 3671 .loc 17 717 0 3672 009a 049B ldr r3, [sp, #16] 3673 .LVL540: 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** i = 0U; 3674 .loc 17 715 0 3675 009c 0198 ldr r0, [sp, #4] 3676 .loc 17 717 0 3677 009e 5B68 ldr r3, [r3, #4] 3678 00a0 0693 str r3, [sp, #24] 3679 00a2 039B ldr r3, [sp, #12] 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** i = 0U; 3680 .loc 17 715 0 3681 00a4 0790 str r0, [sp, #28] 3682 .LVL541: 3683 00a6 5B68 ldr r3, [r3, #4] 3684 00a8 0493 str r3, [sp, #16] 3685 .LVL542: 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB * 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* row loop */ 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** do 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* For every row wise process, column loop counter is to be initiated */ 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** col = numColsB; 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB da 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInB = pSrcBT; 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* column loop */ 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** do 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { ARM GAS /tmp/cc6NnxTV.s page 284 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Set variable sum, that acts as accumulator, to zero */ 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** sum = 0; 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Initiate pointer pInA to point to starting address of column being processed */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInA = pSrcA->pData + i; 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Apply loop unrolling and compute 2 MACs simultaneously. */ 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** colCnt = numColsA >> 2U; 3686 .loc 17 739 0 3687 00aa 029B ldr r3, [sp, #8] 3688 00ac 9908 lsrs r1, r3, #2 3689 00ae 03F00302 and r2, r3, #3 3690 00b2 5B00 lsls r3, r3, #1 3691 00b4 0993 str r3, [sp, #36] 3692 00b6 5300 lsls r3, r2, #1 3693 00b8 0593 str r3, [sp, #20] 3694 00ba 089B ldr r3, [sp, #32] 3695 00bc 0291 str r1, [sp, #8] 3696 .LVL543: 3697 00be 5B00 lsls r3, r3, #1 3698 00c0 0A93 str r3, [sp, #40] 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* matrix multiplication */ 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** while (colCnt > 0U) 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* read real and imag values from pSrcA and pSrcB buffer */ 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** inA1 = read_q15x2_ia ((q15_t **) &pInA); 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** inB1 = read_q15x2_ia ((q15_t **) &pInB); 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** inA2 = read_q15x2_ia ((q15_t **) &pInA); 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** inB2 = read_q15x2_ia ((q15_t **) &pInB); 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Multiply and Accumlates */ 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** sum = __SMLALD(inA1, inB1, sum); 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** sum = __SMLALD(inA2, inB2, sum); 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Decrement loop counter */ 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** colCnt--; 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* process remaining column samples */ 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** colCnt = numColsA % 0x4U; 3699 .loc 17 762 0 3700 00c2 0023 movs r3, #0 3701 00c4 0392 str r2, [sp, #12] 3702 .LVL544: 3703 00c6 4FEAC10B lsl fp, r1, #3 3704 00ca 0193 str r3, [sp, #4] 3705 .LVL545: 3706 .L359: 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 3707 .loc 17 727 0 3708 00cc DDF82C80 ldr r8, [sp, #44] 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 3709 .loc 17 693 0 ARM GAS /tmp/cc6NnxTV.s page 285 3710 00d0 DDF82090 ldr r9, [sp, #32] 3711 00d4 DDF818A0 ldr r10, [sp, #24] 3712 .LVL546: 3713 .L358: 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 3714 .loc 17 736 0 3715 00d8 049B ldr r3, [sp, #16] 3716 00da 019A ldr r2, [sp, #4] 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3717 .loc 17 742 0 3718 00dc 029C ldr r4, [sp, #8] 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 3719 .loc 17 736 0 3720 00de 03EB020E add lr, r3, r2 3721 .LVL547: 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3722 .loc 17 742 0 3723 00e2 002C cmp r4, #0 3724 00e4 4CD0 beq .L360 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 3725 .loc 17 733 0 3726 00e6 0025 movs r5, #0 3727 00e8 0026 movs r6, #0 3728 00ea CDF800B0 str fp, [sp] 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3729 .loc 17 742 0 3730 00ee 4046 mov r0, r8 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 3731 .loc 17 736 0 3732 00f0 7146 mov r1, lr 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 3733 .loc 17 733 0 3734 00f2 2A46 mov r2, r5 3735 00f4 3346 mov r3, r6 3736 00f6 F346 mov fp, lr 3737 .LVL548: 3738 .L355: 3739 .LBB227: 3740 .LBB228: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3741 .loc 7 928 0 3742 00f8 D1F800E0 ldr lr, [r1] @ unaligned 3743 .LVL549: 3744 .LBE228: 3745 .LBE227: 3746 .LBB229: 3747 .LBB230: 3748 00fc 0568 ldr r5, [r0] @ unaligned 3749 .LVL550: 3750 .LBE230: 3751 .LBE229: 3752 .LBB231: 3753 .LBB232: 3754 00fe 4F68 ldr r7, [r1, #4] @ unaligned 3755 .LVL551: 3756 .LBE232: 3757 .LBE231: ARM GAS /tmp/cc6NnxTV.s page 286 3758 .LBB233: 3759 .LBB234: 3760 0100 D0F804C0 ldr ip, [r0, #4] @ unaligned 3761 0104 0831 adds r1, r1, #8 3762 .LVL552: 3763 0106 0830 adds r0, r0, #8 3764 .LVL553: 3765 .LBE234: 3766 .LBE233: 3767 .LBB235: 3768 .LBB236: 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 3769 .loc 3 2014 0 3770 0108 1646 mov r6, r2 3771 .syntax unified 3772 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3773 010a CEFBC563 smlald r6, r3, lr, r5 3774 @ 0 "" 2 3775 .LVL554: 3776 .thumb 3777 .syntax unified 3778 .LBE236: 3779 .LBE235: 3780 .LBB237: 3781 .LBB238: 3782 010e 1D46 mov r5, r3 3783 .syntax unified 3784 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3785 0110 C7FBCC65 smlald r6, r5, r7, ip 3786 @ 0 "" 2 3787 .LVL555: 3788 .thumb 3789 .syntax unified 3790 .LBE238: 3791 .LBE237: 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3792 .loc 17 742 0 3793 0114 013C subs r4, r4, #1 3794 .LVL556: 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 3795 .loc 17 755 0 3796 0116 3246 mov r2, r6 3797 0118 2B46 mov r3, r5 3798 .LVL557: 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3799 .loc 17 742 0 3800 011a EDD1 bne .L355 3801 011c DE46 mov lr, fp 3802 011e DDF800B0 ldr fp, [sp] 3803 0122 3546 mov r5, r6 3804 0124 D844 add r8, r8, fp 3805 0126 1E46 mov r6, r3 3806 0128 DE44 add lr, lr, fp 3807 .LVL558: 3808 .L354: 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** while (colCnt > 0U) ARM GAS /tmp/cc6NnxTV.s page 287 3809 .loc 17 764 0 3810 012a 0399 ldr r1, [sp, #12] 3811 012c 71B1 cbz r1, .L356 3812 012e 4046 mov r0, r8 3813 0130 2A46 mov r2, r5 3814 0132 3346 mov r3, r6 3815 .LVL559: 3816 .L357: 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** sum += *pInA++ * *pInB++; 3817 .loc 17 767 0 3818 0134 3EF8025B ldrh r5, [lr], #2 3819 .LVL560: 3820 0138 30F8024B ldrh r4, [r0], #2 3821 .LVL561: 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3822 .loc 17 764 0 3823 013c 0139 subs r1, r1, #1 3824 .LVL562: 3825 .loc 17 767 0 3826 013e C5FB8423 smlalbb r2, r3, r5, r4 3827 .LVL563: 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 3828 .loc 17 764 0 3829 0142 F7D1 bne .L357 3830 0144 1E46 mov r6, r3 3831 0146 059B ldr r3, [sp, #20] 3832 0148 1546 mov r5, r2 3833 014a 9844 add r8, r8, r3 3834 .LVL564: 3835 .L356: 3836 .LBB239: 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Decrement loop counter */ 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** colCnt--; 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Saturate and store result in destination buffer */ 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** *px = (q15_t) (__SSAT((sum >> 15), 16)); 3837 .loc 17 774 0 3838 014c EA0B lsrs r2, r5, #15 3839 .LBE239: 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px++; 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Decrement column loop counter */ 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** col--; 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } while (col > 0U); 3840 .loc 17 780 0 3841 014e B9F10109 subs r9, r9, #1 3842 .LVL565: 3843 .LBB240: 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px++; 3844 .loc 17 774 0 3845 0152 42EA4642 orr r2, r2, r6, lsl #17 3846 .syntax unified ARM GAS /tmp/cc6NnxTV.s page 288 3847 @ 774 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c" 1 3848 0156 02F30F02 ssat r2, #16, r2 3849 @ 0 "" 2 3850 .LVL566: 3851 .thumb 3852 .syntax unified 3853 .LBE240: 3854 015a 2AF8022B strh r2, [r10], #2 @ movhi 3855 .LVL567: 3856 .loc 17 780 0 3857 015e BBD1 bne .L358 3858 0160 069B ldr r3, [sp, #24] 3859 0162 0A9A ldr r2, [sp, #40] 3860 .LVL568: 3861 0164 1344 add r3, r3, r2 3862 0166 0693 str r3, [sp, #24] 3863 .LVL569: 3864 0168 099A ldr r2, [sp, #36] 3865 016a 019B ldr r3, [sp, #4] 3866 016c 1344 add r3, r3, r2 3867 016e 0193 str r3, [sp, #4] 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** i = i + numColsA; 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Decrement row loop counter */ 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** row--; 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } while (row > 0U); 3868 .loc 17 787 0 3869 0170 079B ldr r3, [sp, #28] 3870 0172 013B subs r3, r3, #1 3871 .LVL570: 3872 0174 0793 str r3, [sp, #28] 3873 0176 A9D1 bne .L359 3874 .LVL571: 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInA = pSrcA->pData; /* Input data matrix pointer A of Q15 type * 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type * 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *pOut = pDst->pData; /* Output data matrix pointer */ 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** q15_t *px; /* Temporary output data matrix pointer */ 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */ 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** arm_status status; /* Status of matrix multiplication */ 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** (void)pState; 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Check for matrix mismatch condition */ 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** if ((pSrcA->numCols != pSrcB->numRows) || 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** (pSrcA->numRows != pDst->numRows) || 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** (pSrcB->numCols != pDst->numCols) ) ARM GAS /tmp/cc6NnxTV.s page 289 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** else 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB * 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* row loop */ 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** do 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Output pointer is set to starting address of the row being processed */ 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** px = pOut + i; 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* For every row wise process, column loop counter is to be initiated */ 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** col = numColsB; 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */ 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pIn2 = pSrcB->pData; 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* column loop */ 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** do 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Set the variable sum, that acts as accumulator, to zero */ 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** sum = 0; 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Initiate pointer pIn1 to point to starting address of pSrcA */ 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pIn1 = pInA; 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Matrix A columns number of MAC operations are to be performed */ 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** colCnt = numColsA; 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* matrix multiplication */ 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** while (colCnt > 0U) 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** { 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Perform multiply-accumulates */ 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** sum += (q31_t) * pIn1++ * *pIn2; 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pIn2 += numColsB; 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Decrement loop counter */ 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** colCnt--; 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Convert result from 34.30 to 1.15 format and store saturated value in destination buffer 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Saturate and store result in destination buffer */ 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** *px++ = (q15_t) __SSAT((sum >> 15), 16); 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Decrement column loop counter */ 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** col--; 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Update pointer pIn2 to point to starting address of next column */ 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pIn2 = pInB + (numColsB - col); ARM GAS /tmp/cc6NnxTV.s page 290 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } while (col > 0U); 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Update pointer pSrcA to point to starting address of next row */ 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** i = i + numColsB; 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** pInA = pInA + numColsA; 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Decrement row loop counter */ 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** row--; 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } while (row > 0U); 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** status = ARM_MATH_SUCCESS; 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** /* Return to application */ 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** return (status); 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** } 3875 .loc 17 887 0 3876 0178 1846 mov r0, r3 3877 017a 0DB0 add sp, sp, #52 3878 .LCFI47: 3879 .cfi_remember_state 3880 .cfi_def_cfa_offset 36 3881 @ sp needed 3882 017c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 3883 .LVL572: 3884 .L360: 3885 .LCFI48: 3886 .cfi_restore_state 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c **** 3887 .loc 17 733 0 3888 0180 0025 movs r5, #0 3889 0182 0026 movs r6, #0 3890 0184 D1E7 b .L354 3891 .cfi_endproc 3892 .LFE162: 3894 0186 00BF .section .text.arm_mat_mult_q31,"ax",%progbits 3895 .align 1 3896 .p2align 2,,3 3897 .global arm_mat_mult_q31 3898 .syntax unified 3899 .thumb 3900 .thumb_func 3901 .fpu fpv4-sp-d16 3903 arm_mat_mult_q31: 3904 .LFB163: 3905 .file 18 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Title: arm_mat_mult_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Description: Q31 matrix multiplication 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * $Date: 18. March 2019 ARM GAS /tmp/cc6NnxTV.s page 291 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** @addtogroup MatrixMult 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** @brief Q31 matrix multiplication. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** @param[in] pSrcA points to the first input matrix structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** @param[in] pSrcB points to the second input matrix structure 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** @param[out] pDst points to output matrix structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** @return execution status 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** The function is implemented using an internal 64-bit accumulator. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** The accumulator has a 2.62 format and maintains full precision of the intermedia 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** multiplication results but provides only a single guard bit. There is no saturat 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** on intermediate additions. Thus, if the accumulator overflows it wraps around an 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** distorts the result. The input signals should be scaled down to avoid intermedia 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** overflows. The input is thus scaled down by log2(numColsA) bits 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** to avoid overflows, as a total of numColsA additions are performed internally. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** @remark 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** Refer to \ref arm_mat_mult_fast_q31() for a faster but less precise implementati 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #if defined(ARM_MATH_MVEI) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #define MATRIX_DIM2 2 ARM GAS /tmp/cc6NnxTV.s page 292 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #define MATRIX_DIM3 3 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #define MATRIX_DIM4 4 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** __STATIC_INLINE arm_status arm_mat_mult_q31_2x2_mve( 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** const arm_matrix_instance_q31 * pSrcA, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** const arm_matrix_instance_q31 * pSrcB, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** arm_matrix_instance_q31 * pDst) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint32x4_t vecColBOffs; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA0 = pInA; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA1 = pInA0 + MATRIX_DIM2; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q63_t acc0, acc1; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31x4_t vecB, vecA0, vecA1; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* enable predication to disable half of vector elements */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** mve_pred16_t p0 = vctp32q(MATRIX_DIM2); 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecColBOffs = vidupq_u32((uint32_t)0, 1); 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecColBOffs = vecColBOffs * MATRIX_DIM2; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = pSrcB->pData; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* load 1st B column (partial load) */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* load A rows */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA0 = vldrwq_s32(pInA0); 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA1 = vldrwq_s32(pInA1); 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhq(vecA0, vecB); 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = vrmlaldavhq(vecA1, vecB); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = asrl(acc0, 23); 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = asrl(acc1, 23); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[0 * MATRIX_DIM2] = (q31_t) acc0; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[1 * MATRIX_DIM2] = (q31_t) acc1; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut++; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* move to next B column */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = pInB + 1; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhq(vecA0, vecB); 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = vrmlaldavhq(vecA1, vecB); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = asrl(acc0, 23); 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = asrl(acc1, 23); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[0 * MATRIX_DIM2] = (q31_t) acc0; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[1 * MATRIX_DIM2] = (q31_t) acc1; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Return to application 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ ARM GAS /tmp/cc6NnxTV.s page 293 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** return (ARM_MATH_SUCCESS); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** __STATIC_INLINE arm_status arm_mat_mult_q31_3x3_mve( 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** const arm_matrix_instance_q31 * pSrcA, 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** const arm_matrix_instance_q31 * pSrcB, 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** arm_matrix_instance_q31 * pDst) 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint32x4_t vecColBOffs; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA0 = pInA; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA1 = pInA0 + MATRIX_DIM3; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA2 = pInA1 + MATRIX_DIM3; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q63_t acc0, acc1, acc2; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31x4_t vecB, vecA; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* enable predication to disable last (4th) vector element */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** mve_pred16_t p0 = vctp32q(MATRIX_DIM3); 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecColBOffs = vidupq_u32((uint32_t)0, 1); 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecColBOffs = vecColBOffs * MATRIX_DIM3; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = pSrcB->pData; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA0); 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhq(vecA, vecB); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA1); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = vrmlaldavhq(vecA, vecB); 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA2); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = vrmlaldavhq(vecA, vecB); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = asrl(acc0, 23); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = asrl(acc1, 23); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = asrl(acc2, 23); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[0 * MATRIX_DIM3] = (q31_t) acc0; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[1 * MATRIX_DIM3] = (q31_t) acc1; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[2 * MATRIX_DIM3] = (q31_t) acc2; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut++; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* move to next B column */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = pInB + 1; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA0); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhq(vecA, vecB); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA1); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = vrmlaldavhq(vecA, vecB); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA2); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = vrmlaldavhq(vecA, vecB); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 294 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = asrl(acc0, 23); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = asrl(acc1, 23); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = asrl(acc2, 23); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[0 * MATRIX_DIM3] = (q31_t) acc0; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[1 * MATRIX_DIM3] = (q31_t) acc1; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[2 * MATRIX_DIM3] = (q31_t) acc2; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut++; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* move to next B column */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = pInB + 1; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA0); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhq(vecA, vecB); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA1); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = vrmlaldavhq(vecA, vecB); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA2); 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = vrmlaldavhq(vecA, vecB); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = asrl(acc0, 23); 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = asrl(acc1, 23); 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = asrl(acc2, 23); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[0 * MATRIX_DIM3] = (q31_t) acc0; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[1 * MATRIX_DIM3] = (q31_t) acc1; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[2 * MATRIX_DIM3] = (q31_t) acc2; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Return to application 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** return (ARM_MATH_SUCCESS); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** __STATIC_INLINE arm_status arm_mat_mult_q31_4x4_mve( 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** const arm_matrix_instance_q31 * pSrcA, 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** const arm_matrix_instance_q31 * pSrcB, 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** arm_matrix_instance_q31 * pDst) 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint32x4_t vecColBOffs; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA0 = pInA; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA1 = pInA0 + MATRIX_DIM4; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA2 = pInA1 + MATRIX_DIM4; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA3 = pInA2 + MATRIX_DIM4; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q63_t acc0, acc1, acc2, acc3; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31x4_t vecB, vecA; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecColBOffs = vidupq_u32((uint32_t)0, 4); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = pSrcB->pData; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA0); ARM GAS /tmp/cc6NnxTV.s page 295 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhq(vecA, vecB); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA1); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = vrmlaldavhq(vecA, vecB); 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA2); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = vrmlaldavhq(vecA, vecB); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA3); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc3 = vrmlaldavhq(vecA, vecB); 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = asrl(acc0, 23); 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = asrl(acc1, 23); 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = asrl(acc2, 23); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc3 = asrl(acc3, 23); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[0 * MATRIX_DIM4] = (q31_t) acc0; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[1 * MATRIX_DIM4] = (q31_t) acc1; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[2 * MATRIX_DIM4] = (q31_t) acc2; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[3 * MATRIX_DIM4] = (q31_t) acc3; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut++; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* move to next B column */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = pInB + 1; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA0); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhq(vecA, vecB); 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA1); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = vrmlaldavhq(vecA, vecB); 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA2); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = vrmlaldavhq(vecA, vecB); 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA3); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc3 = vrmlaldavhq(vecA, vecB); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = asrl(acc0, 23); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = asrl(acc1, 23); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = asrl(acc2, 23); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc3 = asrl(acc3, 23); 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[0 * MATRIX_DIM4] = (q31_t) acc0; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[1 * MATRIX_DIM4] = (q31_t) acc1; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[2 * MATRIX_DIM4] = (q31_t) acc2; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[3 * MATRIX_DIM4] = (q31_t) acc3; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut++; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* move to next B column */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = pInB + 1; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA0); 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhq(vecA, vecB); 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA1); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = vrmlaldavhq(vecA, vecB); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA2); 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = vrmlaldavhq(vecA, vecB); 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA3); ARM GAS /tmp/cc6NnxTV.s page 296 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc3 = vrmlaldavhq(vecA, vecB); 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = asrl(acc0, 23); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = asrl(acc1, 23); 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = asrl(acc2, 23); 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc3 = asrl(acc3, 23); 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[0 * MATRIX_DIM4] = (q31_t) acc0; 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[1 * MATRIX_DIM4] = (q31_t) acc1; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[2 * MATRIX_DIM4] = (q31_t) acc2; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[3 * MATRIX_DIM4] = (q31_t) acc3; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut++; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* move to next B column */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = pInB + 1; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs); 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA0); 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhq(vecA, vecB); 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA1); 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = vrmlaldavhq(vecA, vecB); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA2); 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = vrmlaldavhq(vecA, vecB); 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vldrwq_s32(pInA3); 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc3 = vrmlaldavhq(vecA, vecB); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = asrl(acc0, 23); 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = asrl(acc1, 23); 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = asrl(acc2, 23); 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc3 = asrl(acc3, 23); 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[0 * MATRIX_DIM4] = (q31_t) acc0; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[1 * MATRIX_DIM4] = (q31_t) acc1; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[2 * MATRIX_DIM4] = (q31_t) acc2; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[3 * MATRIX_DIM4] = (q31_t) acc3; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Return to application 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** return (ARM_MATH_SUCCESS); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** arm_status arm_mat_mult_q31( 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** const arm_matrix_instance_q31 * pSrcA, 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** const arm_matrix_instance_q31 * pSrcB, 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** arm_matrix_instance_q31 * pDst) 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t const *pInB = (q31_t const *)pSrcB->pData; /* input data matrix pointer B */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t const *pInA = (q31_t const *)pSrcA->pData; /* input data matrix pointer A */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *px; /* Temporary output data matrix pointer */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint16_t col, i = 0U, row = numRowsA, colCnt; /* loop counters */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** arm_status status; /* status of matrix multiplication */ ARM GAS /tmp/cc6NnxTV.s page 297 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint32x4_t vecOffs, vecColBOffs; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint32_t blkCnt, rowCnt; /* loop counters */ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Check for matrix mismatch condition */ 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** if ((pSrcA->numCols != pSrcB->numRows) || 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** (pSrcA->numRows != pDst->numRows) || 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** (pSrcB->numCols != pDst->numCols) ) 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** else 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* small squared matrix specialized routines */ 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** if(numRowsA == numColsB && numColsB == numColsA) { 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** if (numRowsA == 1) 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q63_t sum = (q63_t) *pInA * *pInB; 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pOut[0] = (q31_t)(sum >> 31); 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** return (ARM_MATH_SUCCESS); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** else if(numRowsA == 2) 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** return arm_mat_mult_q31_2x2_mve(pSrcA, pSrcB, pDst); 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** else if(numRowsA == 3) 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** return arm_mat_mult_q31_3x3_mve(pSrcA, pSrcB, pDst); 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** else if (numRowsA == 4) 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** return arm_mat_mult_q31_4x4_mve(pSrcA, pSrcB, pDst); 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecColBOffs = vidupq_u32((uint32_t)0, 1); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecColBOffs = vecColBOffs * (uint32_t) (numColsB); 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * row loop 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** rowCnt = row >> 2; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** while (rowCnt > 0U) 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Output pointer is set to starting address of the row being processed 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** px = pOut + i; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** i = i + 4 * numColsB; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * For every row wise process, the column loop counter is to be initiated 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** col = numColsB; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* ARM GAS /tmp/cc6NnxTV.s page 298 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * For every row wise process, the pInB pointer is set 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * to the starting address of the pSrcB data 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = (q31_t const *)pSrcB->pData; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * column loop 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** while (col > 0U) 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * generate 4 columns elements 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Matrix A columns number of MAC operations are to be performed 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** colCnt = numColsA; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t const *pInA0 = pInA; 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t const *pInA1 = pInA0 + numColsA; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t const *pInA2 = pInA1 + numColsA; 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t const *pInA3 = pInA2 + numColsA; 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q63_t acc0, acc1, acc2, acc3; 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = 0LL; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = 0LL; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = 0LL; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc3 = 0LL; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pSrcA0Vec = (q31_t const *) pInA0; 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pSrcA1Vec = (q31_t const *) pInA1; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pSrcA2Vec = (q31_t const *) pInA2; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pSrcA3Vec = (q31_t const *) pInA3; 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecOffs = vecColBOffs; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* process 1 x 4 block output */ 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** blkCnt = numColsA >> 2; 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** while (blkCnt > 0U) 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31x4_t vecB, vecA; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecOffs); 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* move Matrix B read offsets, 4 rows down */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecOffs = vecOffs + (uint32_t) (numColsB * 4); 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vld1q(pSrcA0Vec); pSrcA0Vec += 4; 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhaq(acc0, vecA, vecB); 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vld1q(pSrcA1Vec); pSrcA1Vec += 4; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = vrmlaldavhaq(acc1, vecA, vecB); 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vld1q(pSrcA2Vec); pSrcA2Vec += 4; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = vrmlaldavhaq(acc2, vecA, vecB); 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vld1q(pSrcA3Vec); pSrcA3Vec += 4; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc3 = vrmlaldavhaq(acc3, vecA, vecB); 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** blkCnt--; 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 299 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * tail 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * (will be merged thru tail predication) 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** blkCnt = numColsA & 3; 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** if (blkCnt > 0U) 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31x4_t vecB, vecA; 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0); 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** //vecOffs = vecOffs + (uint32_t) (numColsB * 4); 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vld1q(pSrcA0Vec); pSrcA0Vec += 4; 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhaq(acc0, vecA, vecB); 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vld1q(pSrcA1Vec); pSrcA1Vec += 4; 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = vrmlaldavhaq(acc1, vecA, vecB); 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vld1q(pSrcA2Vec); pSrcA2Vec += 4; 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = vrmlaldavhaq(acc2, vecA, vecB); 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vld1q(pSrcA3Vec); pSrcA3Vec += 4; 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc3 = vrmlaldavhaq(acc3, vecA, vecB); 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = asrl(acc0, 23); 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc1 = asrl(acc1, 23); 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc2 = asrl(acc2, 23); 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc3 = asrl(acc3, 23); 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** px[0] = (q31_t) acc0; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** px[1 * numColsB] = (q31_t) acc1; 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** px[2 * numColsB] = (q31_t) acc2; 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** px[3 * numColsB] = (q31_t) acc3; 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** px++; 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Decrement the column loop counter 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** col--; 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Update the pointer pInB to point to the starting address of the next column 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = (q31_t const *)pSrcB->pData + (numColsB - col); 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Update the pointer pInA to point to the starting address of the next row 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInA += (numColsA * 4); 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Decrement the row loop counter 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** rowCnt --; 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** rowCnt = row & 3; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** while (rowCnt > 0U) 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* ARM GAS /tmp/cc6NnxTV.s page 300 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Output pointer is set to starting address of the row being processed 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** px = pOut + i; 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** i = i + numColsB; 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * For every row wise process, the column loop counter is to be initiated 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** col = numColsB; 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * For every row wise process, the pInB pointer is set 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * to the starting address of the pSrcB data 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = (q31_t const *)pSrcB->pData; 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * column loop 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** while (col > 0U) 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * generate 4 columns elements 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Matrix A columns number of MAC operations are to be performed 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** colCnt = numColsA; 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t const *pSrcA0Vec; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t const *pInA0 = pInA; 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q63_t acc0; 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = 0LL; 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pSrcA0Vec = (q31_t const *) pInA0; 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecOffs = vecColBOffs; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* process 1 x 4 block output */ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** blkCnt = numColsA >> 2; 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** while (blkCnt > 0U) 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31x4_t vecB, vecA; 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset(pInB, vecOffs); 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* move Matrix B read offsets, 4 rows down */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecOffs = vecOffs + (uint32_t) (numColsB * 4); 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vld1q(pSrcA0Vec); pSrcA0Vec += 4; 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhaq(acc0, vecA, vecB); 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** blkCnt--; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * tail 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * (will be merged thru tail predication) 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ ARM GAS /tmp/cc6NnxTV.s page 301 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** blkCnt = numColsA & 3; 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** if (blkCnt > 0U) 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31x4_t vecB, vecA; 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0); 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** //vecOffs = vecOffs + (uint32_t) (numColsB * 4); 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** vecA = vld1q(pSrcA0Vec); 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pSrcA0Vec += 4; 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = vrmlaldavhaq(acc0, vecA, vecB); 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** acc0 = asrl(acc0, 23); 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** px[0] = (q31_t) acc0; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** px++; 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Decrement the column loop counter 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** col--; 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Update the pointer pInB to point to the starting address of the next column 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInB = (q31_t const *)pSrcB->pData + (numColsB - col); 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Update the pointer pInA to point to the starting address of the next row 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInA += numColsA; 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * Decrement the row loop counter 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** rowCnt--; 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** * set status as ARM_MATH_SUCCESS 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** status = ARM_MATH_SUCCESS; 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Return to application */ 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** return (status); 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #else 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** arm_status arm_mat_mult_q31( 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** const arm_matrix_instance_q31 * pSrcA, 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** const arm_matrix_instance_q31 * pSrcB, 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** arm_matrix_instance_q31 * pDst) 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 3906 .loc 18 632 0 ARM GAS /tmp/cc6NnxTV.s page 302 3907 .cfi_startproc 3908 @ args = 0, pretend = 0, frame = 8 3909 @ frame_needed = 0, uses_anonymous_args = 0 3910 .LVL573: 3911 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 3912 .LCFI49: 3913 .cfi_def_cfa_offset 36 3914 .cfi_offset 4, -36 3915 .cfi_offset 5, -32 3916 .cfi_offset 6, -28 3917 .cfi_offset 7, -24 3918 .cfi_offset 8, -20 3919 .cfi_offset 9, -16 3920 .cfi_offset 10, -12 3921 .cfi_offset 11, -8 3922 .cfi_offset 14, -4 3923 0004 0346 mov r3, r0 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInB = pSrcB->pData; /* Input data matrix pointer B */ 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pOut = pDst->pData; /* Output data matrix pointer */ 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *px; /* Temporary output data matrix pointer */ 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q63_t sum; /* Accumulator */ 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */ 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** arm_status status; /* Status of matrix multiplication */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Check for matrix mismatch condition */ 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** if ((pSrcA->numCols != pSrcB->numRows) || 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** (pSrcA->numRows != pDst->numRows) || 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** (pSrcB->numCols != pDst->numCols) ) 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** else 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB * 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* row loop */ 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** do 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Output pointer is set to starting address of row being processed */ 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** px = pOut + i; 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* For every row wise process, column loop counter is to be initiated */ 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** col = numColsB; 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */ 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pIn2 = pSrcB->pData; ARM GAS /tmp/cc6NnxTV.s page 303 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* column loop */ 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** do 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Set the variable sum, that acts as accumulator, to zero */ 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** sum = 0; 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Initialize pointer pIn1 to point to starting address of column being processed */ 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pIn1 = pInA; 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Loop unrolling: Compute 4 MACs at a time. */ 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** colCnt = numColsA >> 2U; 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* matrix multiplication */ 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** while (colCnt > 0U) 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Perform the multiply-accumulates */ 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** sum += (q63_t) *pIn1++ * *pIn2; 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pIn2 += numColsB; 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** sum += (q63_t) *pIn1++ * *pIn2; 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pIn2 += numColsB; 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** sum += (q63_t) *pIn1++ * *pIn2; 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pIn2 += numColsB; 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** sum += (q63_t) *pIn1++ * *pIn2; 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pIn2 += numColsB; 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Decrement loop counter */ 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** colCnt--; 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Loop unrolling: Compute remaining MACs */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** colCnt = numColsA % 0x4U; 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #else 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Initialize cntCnt with number of columns */ 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** colCnt = numColsA; 3924 .loc 18 716 0 3925 0006 4088 ldrh r0, [r0, #2] 3926 .LVL574: 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 3927 .loc 18 669 0 3928 0008 B1F802C0 ldrh ip, [r1, #2] 3929 000c D2F80490 ldr r9, [r2, #4] 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ 3930 .loc 18 633 0 3931 0010 D3F804A0 ldr r10, [r3, #4] 3932 .LVL575: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ 3933 .loc 18 634 0 ARM GAS /tmp/cc6NnxTV.s page 304 3934 0014 4A68 ldr r2, [r1, #4] 3935 .LVL576: 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** arm_status status; /* Status of matrix multiplication */ 3936 .loc 18 643 0 3937 0016 B3F800B0 ldrh fp, [r3] 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ 3938 .loc 18 632 0 3939 001a 83B0 sub sp, sp, #12 3940 .LCFI50: 3941 .cfi_def_cfa_offset 48 3942 .LVL577: 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** while (colCnt > 0U) 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Perform the multiply-accumulates */ 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** sum += (q63_t) *pIn1++ * *pIn2; 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pIn2 += numColsB; 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Decrement loop counter */ 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** colCnt--; 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Convert result from 2.62 to 1.31 format and store in destination buffer */ 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** *px++ = (q31_t) (sum >> 31); 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Decrement column loop counter */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** col--; 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Update pointer pIn2 to point to starting address of next column */ 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pIn2 = pInB + (numColsB - col); 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } while (col > 0U); 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Update pointer pInA to point to starting address of next row */ 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** i = i + numColsB; 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pInA = pInA + numColsA; 3943 .loc 18 745 0 3944 001c 8300 lsls r3, r0, #2 3945 .LVL578: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ 3946 .loc 18 634 0 3947 001e 0192 str r2, [sp, #4] 3948 .LVL579: 3949 .loc 18 745 0 3950 0020 0093 str r3, [sp] 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 3951 .loc 18 726 0 3952 0022 4FEA8C0C lsl ip, ip, #2 3953 .LVL580: 3954 .L382: 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 3955 .loc 18 672 0 3956 0026 DDF80480 ldr r8, [sp, #4] ARM GAS /tmp/cc6NnxTV.s page 305 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 3957 .loc 18 666 0 3958 002a CE46 mov lr, r9 3959 .LVL581: 3960 002c E144 add r9, r9, ip 3961 .LVL582: 3962 .L381: 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 3963 .loc 18 720 0 3964 002e F0B1 cbz r0, .L383 3965 0030 0246 mov r2, r0 3966 0032 4346 mov r3, r8 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 3967 .loc 18 681 0 3968 0034 5146 mov r1, r10 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 3969 .loc 18 678 0 3970 0036 0024 movs r4, #0 3971 0038 0025 movs r5, #0 3972 .LVL583: 3973 .L380: 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pIn2 += numColsB; 3974 .loc 18 725 0 3975 003a 1E68 ldr r6, [r3] 3976 003c 51F8047B ldr r7, [r1], #4 3977 .LVL584: 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 3978 .loc 18 720 0 3979 0040 013A subs r2, r2, #1 3980 .LVL585: 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 3981 .loc 18 726 0 3982 0042 6344 add r3, r3, ip 3983 .LVL586: 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** pIn2 += numColsB; 3984 .loc 18 725 0 3985 0044 C6FB0745 smlal r4, r5, r6, r7 3986 .LVL587: 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 3987 .loc 18 720 0 3988 0048 F7D1 bne .L380 3989 004a E30F lsrs r3, r4, #31 3990 .LVL588: 3991 004c 43EA4503 orr r3, r3, r5, lsl #1 3992 .LVL589: 3993 .L379: 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 3994 .loc 18 733 0 3995 0050 4EF8043B str r3, [lr], #4 3996 .LVL590: 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 3997 .loc 18 741 0 3998 0054 CE45 cmp lr, r9 3999 0056 08F10408 add r8, r8, #4 4000 .LVL591: 4001 005a E8D1 bne .L381 4002 .loc 18 745 0 ARM GAS /tmp/cc6NnxTV.s page 306 4003 005c 009B ldr r3, [sp] 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Decrement row loop counter */ 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** row--; 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } while (row > 0U); 4004 .loc 18 750 0 4005 005e BBF1010B subs fp, fp, #1 4006 .LVL592: 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 4007 .loc 18 745 0 4008 0062 9A44 add r10, r10, r3 4009 .LVL593: 4010 .loc 18 750 0 4011 0064 DFD1 bne .L382 4012 .LVL594: 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** status = ARM_MATH_SUCCESS; 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** /* Return to application */ 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** return (status); 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** } 4013 .loc 18 758 0 4014 0066 5846 mov r0, fp 4015 .LVL595: 4016 0068 03B0 add sp, sp, #12 4017 .LCFI51: 4018 .cfi_remember_state 4019 .cfi_def_cfa_offset 36 4020 @ sp needed 4021 006a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 4022 .LVL596: 4023 .L383: 4024 .LCFI52: 4025 .cfi_restore_state 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c **** { 4026 .loc 18 720 0 4027 006e 0346 mov r3, r0 4028 0070 EEE7 b .L379 4029 .cfi_endproc 4030 .LFE163: 4032 0072 00BF .section .text.arm_mat_scale_f32,"ax",%progbits 4033 .align 1 4034 .p2align 2,,3 4035 .global arm_mat_scale_f32 4036 .syntax unified 4037 .thumb 4038 .thumb_func 4039 .fpu fpv4-sp-d16 4041 arm_mat_scale_f32: 4042 .LFB164: 4043 .file 19 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * Title: arm_mat_scale_f32.c ARM GAS /tmp/cc6NnxTV.s page 307 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * Description: Multiplies a floating-point matrix by a scalar 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** @defgroup MatrixScale Matrix Scale 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** Multiplies a matrix by a scalar. This is accomplished by multiplying each element in the 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** matrix by the scalar. For example: 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix" 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** The function checks to make sure that the input and output matrices are of the same size. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** In the fixed-point Q15 and Q31 functions, scale is represented by 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** a fractional multiplication scaleFract and an arithmetic shift shift. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** The shift allows the gain of the scaling operation to exceed 1.0. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** The overall scale factor applied to the fixed-point data is 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c ****       scale = scaleFract * 2^shift.
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c ****
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** */ 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** @addtogroup MatrixScale 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** @{ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** @brief Floating-point matrix scaling. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** @param[in] pSrc points to input matrix ARM GAS /tmp/cc6NnxTV.s page 308 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** @param[in] scale scale factor to be applied 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** @param[out] pDst points to output matrix structure 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** @return execution status 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** arm_status arm_mat_scale_f32( 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** const arm_matrix_instance_f32 * pSrc, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32_t scale, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** arm_matrix_instance_f32 * pDst) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** arm_status status; /* status of matrix scaling */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Check for matrix mismatch condition */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** else 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32_t *pIn = pSrc->pData; /* input data matrix pointer */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** uint32_t numSamples; /* total number of elements in the matrix */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** uint32_t blkCnt; /* loop counters */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** f32x4_t vecIn, vecOut; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32_t const *pInVec; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** pInVec = (float32_t const *) pIn; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * Total number of samples in the input matrix 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** blkCnt = numSamples >> 2; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** while (blkCnt > 0U) 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * C(m,n) = A(m,n) * scale 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * Scaling and results are stored in the destination buffer. 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** vecIn = vld1q(pInVec); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** pInVec += 4; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** vecOut = vecIn * scale; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** vst1q(pOut, vecOut); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** pOut += 4; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * Decrement the blockSize loop counter 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** blkCnt--; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** * tail 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** */ ARM GAS /tmp/cc6NnxTV.s page 309 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** blkCnt = numSamples & 3; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** if (blkCnt > 0U) 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** vecIn = vld1q(pInVec); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** vecOut = vecIn * scale; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** vstrwq_p(pOut, vecOut, p0); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** status = ARM_MATH_SUCCESS; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Return to application */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** return (status); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #else 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #if defined(ARM_MATH_NEON_EXPERIMENTAL) 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** arm_status arm_mat_scale_f32( 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** const arm_matrix_instance_f32 * pSrc, 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32_t scale, 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** arm_matrix_instance_f32 * pDst) 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32_t *pIn = pSrc->pData; /* input data matrix pointer */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** uint32_t numSamples; /* total number of elements in the matrix */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** uint32_t blkCnt; /* loop counters */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** arm_status status; /* status of matrix scaling */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Check for matrix mismatch condition */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** else 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32x4_t vec1; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32x4_t res; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Total number of samples in the input matrix */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** blkCnt = numSamples >> 2; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Compute 4 outputs at a time. 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** while (blkCnt > 0U) 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* C(m,n) = A(m,n) * scale */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Scaling and results are stored in the destination buffer. */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** vec1 = vld1q_f32(pIn); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** res = vmulq_f32(vec1, vdupq_n_f32(scale)); ARM GAS /tmp/cc6NnxTV.s page 310 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** vst1q_f32(pOut, res); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* update pointers to process next sampels */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** pIn += 4U; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** pOut += 4U; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Decrement the numSamples loop counter */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** blkCnt--; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* If the numSamples is not a multiple of 4, compute any remaining output samples here. 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** ** No loop unrolling is used. */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** blkCnt = numSamples % 0x4U; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** while (blkCnt > 0U) 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* C(m,n) = A(m,n) * scale */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* The results are stored in the destination buffer. */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** *pOut++ = (*pIn++) * scale; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Decrement the loop counter */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** blkCnt--; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** status = ARM_MATH_SUCCESS; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Return to application */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** return (status); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #else 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** arm_status arm_mat_scale_f32( 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** const arm_matrix_instance_f32 * pSrc, 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32_t scale, 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** arm_matrix_instance_f32 * pDst) 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 4044 .loc 19 211 0 4045 .cfi_startproc 4046 @ args = 0, pretend = 0, frame = 0 4047 @ frame_needed = 0, uses_anonymous_args = 0 4048 @ link register save eliminated. 4049 .LVL597: 4050 0000 10B4 push {r4} 4051 .LCFI53: 4052 .cfi_def_cfa_offset 4 4053 .cfi_offset 4, -4 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32_t *pIn = pSrc->pData; /* Input data matrix pointer */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32_t *pOut = pDst->pData; /* Output data matrix pointer */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** uint32_t numSamples; /* Total number of elements in the matrix */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** uint32_t blkCnt; /* Loop counters */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** arm_status status; /* Status of matrix scaling */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Check for matrix mismatch condition */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** if ((pSrc->numRows != pDst->numRows) || ARM GAS /tmp/cc6NnxTV.s page 311 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** (pSrc->numCols != pDst->numCols) ) 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** else 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Total number of samples in input matrix */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; 4054 .loc 19 233 0 4055 0002 4388 ldrh r3, [r0, #2] 4056 0004 0488 ldrh r4, [r0] 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** uint32_t numSamples; /* Total number of elements in the matrix */ 4057 .loc 19 213 0 4058 0006 4968 ldr r1, [r1, #4] 4059 .LVL598: 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** float32_t *pIn = pSrc->pData; /* Input data matrix pointer */ 4060 .loc 19 212 0 4061 0008 4268 ldr r2, [r0, #4] 4062 .LVL599: 4063 .loc 19 233 0 4064 000a 03FB04F3 mul r3, r3, r4 4065 .LVL600: 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** blkCnt = numSamples >> 2U; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** while (blkCnt > 0U) 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* C(m,n) = A(m,n) * scale */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Scale and store result in destination buffer. */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** *pOut++ = (*pIn++) * scale; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** *pOut++ = (*pIn++) * scale; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** *pOut++ = (*pIn++) * scale; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** *pOut++ = (*pIn++) * scale; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Decrement loop counter */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** blkCnt--; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Loop unrolling: Compute remaining outputs */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** blkCnt = numSamples % 0x4U; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #else 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Initialize blkCnt with number of samples */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** blkCnt = numSamples; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** while (blkCnt > 0U) ARM GAS /tmp/cc6NnxTV.s page 312 4066 .loc 19 264 0 4067 000e 3BB1 cbz r3, .L389 4068 .LVL601: 4069 .L390: 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* C(m,n) = A(m,n) * scale */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Scale and store result in destination buffer. */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** *pOut++ = (*pIn++) * scale; 4070 .loc 19 269 0 4071 0010 F2EC017A vldmia.32 r2!, {s15} 4072 .LVL602: 4073 0014 67EE807A vmul.f32 s15, s15, s0 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 4074 .loc 19 264 0 4075 0018 013B subs r3, r3, #1 4076 .LVL603: 4077 .loc 19 269 0 4078 001a E1EC017A vstmia.32 r1!, {s15} 4079 .LVL604: 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** { 4080 .loc 19 264 0 4081 001e F7D1 bne .L390 4082 .L389: 4083 .LVL605: 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Decrement loop counter */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** blkCnt--; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** status = ARM_MATH_SUCCESS; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** /* Return to application */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** return (status); 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c **** } 4084 .loc 19 281 0 4085 0020 0020 movs r0, #0 4086 .LVL606: 4087 0022 5DF8044B ldr r4, [sp], #4 4088 .LCFI54: 4089 .cfi_restore 4 4090 .cfi_def_cfa_offset 0 4091 .LVL607: 4092 0026 7047 bx lr 4093 .cfi_endproc 4094 .LFE164: 4096 .section .text.arm_mat_scale_q15,"ax",%progbits 4097 .align 1 4098 .p2align 2,,3 4099 .global arm_mat_scale_q15 4100 .syntax unified 4101 .thumb 4102 .thumb_func 4103 .fpu fpv4-sp-d16 4105 arm_mat_scale_q15: ARM GAS /tmp/cc6NnxTV.s page 313 4106 .LFB165: 4107 .file 20 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * Title: arm_mat_scale_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * Description: Multiplies a Q15 matrix by a scalar 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** @addtogroup MatrixScale 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** @brief Q15 matrix scaling. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** @param[in] pSrc points to input matrix 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** @param[in] scaleFract fractional portion of the scale factor 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** @param[in] shift number of bits to shift the result by 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** @param[out] pDst points to output matrix structure 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** @return execution status 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** @par Scaling and Overflow Behavior 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** The input data *pSrc and scaleFract are in 1.15 format 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** These are multiplied to yield a 2.30 intermediate result and this is shifted wit 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** */ 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #if defined(ARM_MATH_MVEI) 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** arm_status arm_mat_scale_q15( ARM GAS /tmp/cc6NnxTV.s page 314 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** const arm_matrix_instance_q15 * pSrc, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** q15_t scaleFract, 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** int32_t shift, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** arm_matrix_instance_q15 * pDst) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** { 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** arm_status status; /* Status of matrix scaling */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** q15_t *pIn = pSrc->pData; /* input data matrix pointer */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** q15_t *pOut = pDst->pData; /* output data matrix pointer */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** uint32_t numSamples; /* total number of elements in the matrix */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** uint32_t blkCnt; /* loop counters */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** q15x8_t vecIn, vecOut; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** q15_t const *pInVec; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** int32_t totShift = shift + 1; /* shift to apply after scaling */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** pInVec = (q15_t const *) pIn; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Check for matrix mismatch condition */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** if ((pSrc->numRows != pDst->numRows) || 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** (pSrc->numCols != pDst->numCols) ) 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** { 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** } 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** else 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** { 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * Total number of samples in the input matrix 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** blkCnt = numSamples >> 3; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** while (blkCnt > 0U) 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** { 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * C(m,n) = A(m,n) * scale 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * Scaling and results are stored in the destination buffer. 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** vecIn = vld1q(pInVec); pInVec += 8; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* multiply input with scaler value */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** vecOut = vmulhq(vecIn, vdupq_n_s16(scaleFract)); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* apply shifting */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** vecOut = vqshlq_r(vecOut, totShift); 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** vst1q(pOut, vecOut); pOut += 8; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * Decrement the blockSize loop counter 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** blkCnt--; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** } 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * tail ARM GAS /tmp/cc6NnxTV.s page 315 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * (will be merged thru tail predication) 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** blkCnt = numSamples & 7; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** if (blkCnt > 0U) 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** { 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** vecIn = vld1q(pInVec); pInVec += 8; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** vecOut = vmulhq(vecIn, vdupq_n_s16(scaleFract)); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** vecOut = vqshlq_r(vecOut, totShift); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** vstrhq_p(pOut, vecOut, p0); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** } 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** status = ARM_MATH_SUCCESS; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** } 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Return to application */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** return (status); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** } 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #else 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** arm_status arm_mat_scale_q15( 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** const arm_matrix_instance_q15 * pSrc, 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** q15_t scaleFract, 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** int32_t shift, 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** arm_matrix_instance_q15 * pDst) 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** { 4108 .loc 20 138 0 4109 .cfi_startproc 4110 @ args = 0, pretend = 0, frame = 0 4111 @ frame_needed = 0, uses_anonymous_args = 0 4112 @ link register save eliminated. 4113 .LVL608: 4114 0000 F0B4 push {r4, r5, r6, r7} 4115 .LCFI55: 4116 .cfi_def_cfa_offset 16 4117 .cfi_offset 4, -16 4118 .cfi_offset 5, -12 4119 .cfi_offset 6, -8 4120 .cfi_offset 7, -4 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** q15_t *pIn = pSrc->pData; /* Input data matrix pointer */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** q15_t *pOut = pDst->pData; /* Output data matrix pointer */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** uint32_t numSamples; /* Total number of elements in the matrix */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** uint32_t blkCnt; /* Loop counter */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** arm_status status; /* Status of matrix scaling */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** int32_t kShift = 15 - shift; /* Total shift to apply after scaling */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** q31_t inA1, inA2; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** q31_t out1, out2, out3, out4; /* Temporary output variables */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** q15_t in1, in2, in3, in4; /* Temporary input variables */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #endif 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Check for matrix mismatch condition */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** if ((pSrc->numRows != pDst->numRows) || 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** (pSrc->numCols != pDst->numCols) ) ARM GAS /tmp/cc6NnxTV.s page 316 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** { 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** } 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** else 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** { 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Total number of samples in input matrix */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; 4121 .loc 20 167 0 4122 0002 0788 ldrh r7, [r0] 4123 0004 4488 ldrh r4, [r0, #2] 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** uint32_t numSamples; /* Total number of elements in the matrix */ 4124 .loc 20 140 0 4125 0006 5E68 ldr r6, [r3, #4] 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** q15_t *pIn = pSrc->pData; /* Input data matrix pointer */ 4126 .loc 20 139 0 4127 0008 4568 ldr r5, [r0, #4] 4128 .LVL609: 4129 .loc 20 167 0 4130 000a 04FB07F4 mul r4, r4, r7 4131 .LVL610: 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** blkCnt = numSamples >> 2U; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** while (blkCnt > 0U) 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** { 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* C(m,n) = A(m,n) * k */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #if defined (ARM_MATH_DSP) 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* read 2 times 2 samples at a time from source */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** inA1 = read_q15x2_ia ((q15_t **) &pIn); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** inA2 = read_q15x2_ia ((q15_t **) &pIn); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Scale inputs and store result in temporary variables 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** * in single cycle by packing the outputs */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** out2 = (q31_t) ((q15_t) (inA1 ) * scaleFract); 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** out4 = (q31_t) ((q15_t) (inA2 ) * scaleFract); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* apply shifting */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** out1 = out1 >> kShift; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** out2 = out2 >> kShift; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** out3 = out3 >> kShift; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** out4 = out4 >> kShift; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* saturate the output */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** in1 = (q15_t) (__SSAT(out1, 16)); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** in2 = (q15_t) (__SSAT(out2, 16)); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** in3 = (q15_t) (__SSAT(out3, 16)); 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** in4 = (q15_t) (__SSAT(out4, 16)); ARM GAS /tmp/cc6NnxTV.s page 317 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* store result to destination */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** write_q15x2_ia (&pOut, __PKHBT(in2, in1, 16)); 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** write_q15x2_ia (&pOut, __PKHBT(in4, in3, 16)); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #else 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16)); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16)); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16)); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16)); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #endif 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Decrement loop counter */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** blkCnt--; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** } 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Loop unrolling: Compute remaining outputs */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** blkCnt = numSamples % 0x4U; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #else 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Initialize blkCnt with number of samples */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** blkCnt = numSamples; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** while (blkCnt > 0U) 4132 .loc 20 227 0 4133 000e 6CB1 cbz r4, .L397 4134 0010 C2F10F02 rsb r2, r2, #15 4135 .LVL611: 4136 .L398: 4137 .LBB241: 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** { 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* C(m,n) = A(m,n) * k */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Scale, saturate and store result in destination buffer. */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16)); 4138 .loc 20 232 0 4139 0014 35F8023B ldrh r3, [r5], #2 4140 .LVL612: 4141 .LBE241: 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** { 4142 .loc 20 227 0 4143 0018 013C subs r4, r4, #1 4144 .LVL613: 4145 .LBB242: 4146 .loc 20 232 0 4147 001a 13FB01F3 smulbb r3, r3, r1 4148 001e 43FA02F3 asr r3, r3, r2 4149 .syntax unified 4150 @ 232 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c" 1 4151 0022 03F30F03 ssat r3, #16, r3 4152 @ 0 "" 2 4153 .LVL614: 4154 .thumb 4155 .syntax unified ARM GAS /tmp/cc6NnxTV.s page 318 4156 .LBE242: 4157 0026 26F8023B strh r3, [r6], #2 @ movhi 4158 .LVL615: 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** { 4159 .loc 20 227 0 4160 002a F3D1 bne .L398 4161 .LVL616: 4162 .L397: 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Decrement loop counter */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** blkCnt--; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** } 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** status = ARM_MATH_SUCCESS; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** } 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** /* Return to application */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** return (status); 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c **** } 4163 .loc 20 244 0 4164 002c 0020 movs r0, #0 4165 .LVL617: 4166 002e F0BC pop {r4, r5, r6, r7} 4167 .LCFI56: 4168 .cfi_restore 7 4169 .cfi_restore 6 4170 .cfi_restore 5 4171 .cfi_restore 4 4172 .cfi_def_cfa_offset 0 4173 .LVL618: 4174 0030 7047 bx lr 4175 .cfi_endproc 4176 .LFE165: 4178 0032 00BF .section .text.arm_mat_scale_q31,"ax",%progbits 4179 .align 1 4180 .p2align 2,,3 4181 .global arm_mat_scale_q31 4182 .syntax unified 4183 .thumb 4184 .thumb_func 4185 .fpu fpv4-sp-d16 4187 arm_mat_scale_q31: 4188 .LFB166: 4189 .file 21 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * Title: arm_mat_scale_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * Description: Multiplies a Q31 matrix by a scalar 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. ARM GAS /tmp/cc6NnxTV.s page 319 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** @addtogroup MatrixScale 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** @brief Q31 matrix scaling. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** @param[in] pSrc points to input matrix 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** @param[in] scaleFract fractional portion of the scale factor 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** @param[in] shift number of bits to shift the result by 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** @param[out] pDst points to output matrix structure 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** @return execution status 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** @par Scaling and Overflow Behavior 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** The input data *pSrc and scaleFract are in 1.31 format 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** These are multiplied to yield a 2.62 intermediate result which is shifted with s 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** */ 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** #if defined(ARM_MATH_MVEI) 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** arm_status arm_mat_scale_q31( 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** const arm_matrix_instance_q31 * pSrc, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** q31_t scaleFract, 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** int32_t shift, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** arm_matrix_instance_q31 * pDst) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** q31_t *pIn = pSrc->pData; /* input data matrix pointer */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** uint32_t numSamples; /* total number of elements in the matrix */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** uint32_t blkCnt; /* loop counters */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** q31x4_t vecIn, vecOut; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** q31_t const *pInVec; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** int32_t totShift = shift + 1; /* shift to apply after scaling */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** arm_status status; /* Status of matrix scaling */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 320 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** pInVec = (q31_t const *) pIn; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Check for matrix mismatch condition */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** if ((pSrc->numRows != pDst->numRows) || 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** (pSrc->numCols != pDst->numCols) ) 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** } 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** else 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * Total number of samples in the input matrix 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** blkCnt = numSamples >> 2; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** while (blkCnt > 0U) 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * C(m,n) = A(m,n) * scale 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * Scaling and results are stored in the destination buffer. 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** vecIn = vld1q(pInVec); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** pInVec += 4; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* multiply input with scaler value */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** vecOut = vmulhq(vecIn, vdupq_n_s32(scaleFract)); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* apply shifting */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** vecOut = vqshlq_r(vecOut, totShift); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** vst1q(pOut, vecOut); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** pOut += 4; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * Decrement the blockSize loop counter 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** blkCnt--; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** } 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** * tail 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** blkCnt = numSamples & 3; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** if (blkCnt > 0U) 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** vecIn = vld1q(pInVec); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** pInVec += 4; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** vecOut = vmulhq(vecIn, vdupq_n_s32(scaleFract)); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** vecOut = vqshlq_r(vecOut, totShift); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** vstrwq_p(pOut, vecOut, p0); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** } 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** status = ARM_MATH_SUCCESS; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** } 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 321 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Return to application */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** return (status); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** } 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** #else 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** arm_status arm_mat_scale_q31( 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** const arm_matrix_instance_q31 * pSrc, 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** q31_t scaleFract, 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** int32_t shift, 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** arm_matrix_instance_q31 * pDst) 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 4190 .loc 21 137 0 4191 .cfi_startproc 4192 @ args = 0, pretend = 0, frame = 0 4193 @ frame_needed = 0, uses_anonymous_args = 0 4194 .LVL619: 4195 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} 4196 .LCFI57: 4197 .cfi_def_cfa_offset 28 4198 .cfi_offset 4, -28 4199 .cfi_offset 5, -24 4200 .cfi_offset 6, -20 4201 .cfi_offset 7, -16 4202 .cfi_offset 8, -12 4203 .cfi_offset 9, -8 4204 .cfi_offset 14, -4 4205 .loc 21 137 0 4206 0004 8C46 mov ip, r1 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** q31_t *pIn = pSrc->pData; /* Input data matrix pointer */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** q31_t *pOut = pDst->pData; /* Output data matrix pointer */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** uint32_t numSamples; /* Total number of elements in the matrix */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** uint32_t blkCnt; /* Loop counter */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** arm_status status; /* Status of matrix scaling */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** int32_t kShift = shift + 1; /* Shift to apply after scaling */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** q31_t in, out; /* Temporary variabels */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Check for matrix mismatch condition */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** if ((pSrc->numRows != pDst->numRows) || 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** (pSrc->numCols != pDst->numCols) ) 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** } 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** else 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Total number of samples in input matrix */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; 4207 .loc 21 161 0 4208 0006 4488 ldrh r4, [r0, #2] 4209 0008 0188 ldrh r1, [r0] 4210 .LVL620: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** uint32_t numSamples; /* Total number of elements in the matrix */ ARM GAS /tmp/cc6NnxTV.s page 322 4211 .loc 21 139 0 4212 000a 5D68 ldr r5, [r3, #4] 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** q31_t *pIn = pSrc->pData; /* Input data matrix pointer */ 4213 .loc 21 138 0 4214 000c 4668 ldr r6, [r0, #4] 4215 .LVL621: 4216 .loc 21 161 0 4217 000e 04FB01F3 mul r3, r4, r1 4218 .LVL622: 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** blkCnt = numSamples >> 2U; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** while (blkCnt > 0U) 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* C(m,n) = A(m,n) * k */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Scale, saturate and store result in destination buffer. */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** in = *pIn++; /* read four inputs from source */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32; /* multiply input with scaler value */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = in << kShift; /* apply shifting */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** if (in != (out >> kShift)) /* saturate the results. */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** *pOut++ = out; /* Store result destination */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** in = *pIn++; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = in << kShift; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** if (in != (out >> kShift)) 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31); 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** *pOut++ = out; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** in = *pIn++; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = in << kShift; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** if (in != (out >> kShift)) 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** *pOut++ = out; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** in = *pIn++; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = in << kShift; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** if (in != (out >> kShift)) 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** *pOut++ = out; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Decrement loop counter */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** blkCnt--; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** } 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Loop unrolling: Compute remaining outputs */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** blkCnt = numSamples % 0x4U; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** #else 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** ARM GAS /tmp/cc6NnxTV.s page 323 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Initialize blkCnt with number of samples */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** blkCnt = numSamples; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** while (blkCnt > 0U) 4219 .loc 21 215 0 4220 0012 93B1 cbz r3, .L406 4221 0014 0132 adds r2, r2, #1 4222 .LVL623: 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* C(m,n) = A(m,n) * k */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Scale, saturate and store result in destination buffer. */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** in = *pIn++; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = in << kShift; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** if (in != (out >> kShift)) 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31); 4223 .loc 21 224 0 4224 0016 6FF0004E mvn lr, #-2147483648 4225 .LVL624: 4226 .L405: 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = in << kShift; 4227 .loc 21 221 0 4228 001a 56F8040B ldr r0, [r6], #4 4229 .LVL625: 4230 001e 8CFB0089 smull r8, r9, ip, r0 4231 .LVL626: 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** if (in != (out >> kShift)) 4232 .loc 21 222 0 4233 0022 09FA02F0 lsl r0, r9, r2 4234 .LVL627: 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31); 4235 .loc 21 223 0 4236 0026 40FA02F4 asr r4, r0, r2 4237 002a 4C45 cmp r4, r9 4238 .loc 21 224 0 4239 002c 8EEAE977 eor r7, lr, r9, asr #31 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31); 4240 .loc 21 223 0 4241 0030 06D0 beq .L407 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 4242 .loc 21 215 0 4243 0032 013B subs r3, r3, #1 4244 .LVL628: 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** *pOut++ = out; 4245 .loc 21 225 0 4246 0034 45F8047B str r7, [r5], #4 4247 .LVL629: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 4248 .loc 21 215 0 4249 0038 EFD1 bne .L405 4250 .LVL630: 4251 .L406: 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Decrement loop counter */ ARM GAS /tmp/cc6NnxTV.s page 324 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** blkCnt--; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** } 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** status = ARM_MATH_SUCCESS; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** } 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** /* Return to application */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** return (status); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** } 4252 .loc 21 237 0 4253 003a 0020 movs r0, #0 4254 003c BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} 4255 .LVL631: 4256 .L407: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 4257 .loc 21 215 0 4258 0040 013B subs r3, r3, #1 4259 .LVL632: 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** *pOut++ = out; 4260 .loc 21 225 0 4261 0042 45F8040B str r0, [r5], #4 4262 .LVL633: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c **** { 4263 .loc 21 215 0 4264 0046 E8D1 bne .L405 4265 .LVL634: 4266 .loc 21 237 0 4267 0048 0020 movs r0, #0 4268 .LVL635: 4269 004a BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} 4270 .cfi_endproc 4271 .LFE166: 4273 .section .text.arm_mat_sub_f32,"ax",%progbits 4274 .align 1 4275 .p2align 2,,3 4276 .global arm_mat_sub_f32 4277 .syntax unified 4278 .thumb 4279 .thumb_func 4280 .fpu fpv4-sp-d16 4282 arm_mat_sub_f32: 4283 .LFB167: 4284 .file 22 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * Title: arm_mat_sub_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * Description: Floating-point matrix subtraction 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * ARM GAS /tmp/cc6NnxTV.s page 325 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** @defgroup MatrixSub Matrix Subtraction 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** Subtract two matrices. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices" 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** The functions check to make sure that 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** pSrcA, pSrcB, and pDst have the same 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** number of rows and columns. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** */ 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** @addtogroup MatrixSub 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** @{ 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** */ 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** @brief Floating-point matrix subtraction. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** @param[in] pSrcA points to the first input matrix structure 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** @param[in] pSrcB points to the second input matrix structure 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** @param[out] pDst points to output matrix structure 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** @return execution status 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** arm_status arm_mat_sub_f32( 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** const arm_matrix_instance_f32 * pSrcA, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** const arm_matrix_instance_f32 * pSrcB, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** arm_matrix_instance_f32 * pDst) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** arm_status status; /* status of matrix subtraction */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** uint32_t numSamples; /* total number of elements in the matrix */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32_t *pDataA, *pDataB, *pDataDst; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** f32x4_t vecA, vecB, vecDst; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32_t const *pSrcAVec; ARM GAS /tmp/cc6NnxTV.s page 326 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32_t const *pSrcBVec; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** uint32_t blkCnt; /* loop counters */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** pDataA = pSrcA->pData; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** pDataB = pSrcB->pData; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** pDataDst = pDst->pData; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** pSrcAVec = (float32_t const *) pDataA; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** pSrcBVec = (float32_t const *) pDataB; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Check for matrix mismatch condition */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** if ((pSrcA->numRows != pSrcB->numRows) || 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** (pSrcA->numCols != pSrcB->numCols) || 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** else 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * Total number of samples in the input matrix 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** blkCnt = numSamples >> 2; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** while (blkCnt > 0U) 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* C(m,n) = A(m,n) + B(m,n) */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* sub and then store the results in the destination buffer. */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** vecA = vld1q(pSrcAVec); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** pSrcAVec += 4; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** vecB = vld1q(pSrcBVec); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** pSrcBVec += 4; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** vecDst = vsubq(vecA, vecB); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** vst1q(pDataDst, vecDst); 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** pDataDst += 4; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * Decrement the blockSize loop counter 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** blkCnt--; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * tail 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** * (will be merged thru tail predication) 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** blkCnt = numSamples & 3; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** if (blkCnt > 0U) 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** vecA = vld1q(pSrcAVec); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** vecB = vld1q(pSrcBVec); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** vecDst = vsubq_m(vecDst, vecA, vecB, p0); 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** vstrwq_p(pDataDst, vecDst, p0); 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** status = ARM_MATH_SUCCESS; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } ARM GAS /tmp/cc6NnxTV.s page 327 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Return to application */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** return (status); 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #else 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #if defined(ARM_MATH_NEON) 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** arm_status arm_mat_sub_f32( 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** const arm_matrix_instance_f32 * pSrcA, 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** const arm_matrix_instance_f32 * pSrcB, 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** arm_matrix_instance_f32 * pDst) 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** uint32_t numSamples; /* total number of elements in the matrix */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** uint32_t blkCnt; /* loop counters */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** arm_status status; /* status of matrix subtraction */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Check for matrix mismatch condition */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** if ((pSrcA->numRows != pSrcB->numRows) || 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** (pSrcA->numCols != pSrcB->numCols) || 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** else 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32x4_t vec1; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32x4_t vec2; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32x4_t res; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Total number of samples in the input matrix */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** blkCnt = numSamples >> 2U; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Compute 4 outputs at a time. 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** while (blkCnt > 0U) 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* C(m,n) = A(m,n) - B(m,n) */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Subtract and then store the results in the destination buffer. */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Read values from source A */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** vec1 = vld1q_f32(pIn1); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** vec2 = vld1q_f32(pIn2); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** res = vsubq_f32(vec1, vec2); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** vst1q_f32(pOut, res); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Update pointers to process next samples */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** pIn1 += 4U; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** pIn2 += 4U; ARM GAS /tmp/cc6NnxTV.s page 328 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** pOut += 4U; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Decrement the loop counter */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** blkCnt--; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* If the numSamples is not a multiple of 4, compute any remaining output samples here. 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** ** No loop unrolling is used. */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** blkCnt = numSamples % 0x4U; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** while (blkCnt > 0U) 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* C(m,n) = A(m,n) - B(m,n) */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Subtract and then store the results in the destination buffer. */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** *pOut++ = (*pIn1++) - (*pIn2++); 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Decrement the loop counter */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** blkCnt--; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** status = ARM_MATH_SUCCESS; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Return to application */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** return (status); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #else 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** arm_status arm_mat_sub_f32( 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** const arm_matrix_instance_f32 * pSrcA, 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** const arm_matrix_instance_f32 * pSrcB, 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** arm_matrix_instance_f32 * pDst) 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 4285 .loc 22 218 0 4286 .cfi_startproc 4287 @ args = 0, pretend = 0, frame = 0 4288 @ frame_needed = 0, uses_anonymous_args = 0 4289 @ link register save eliminated. 4290 .LVL636: 4291 0000 30B4 push {r4, r5} 4292 .LCFI58: 4293 .cfi_def_cfa_offset 8 4294 .cfi_offset 4, -8 4295 .cfi_offset 5, -4 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** uint32_t numSamples; /* total number of elements in the matrix */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** uint32_t blkCnt; /* loop counters */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** arm_status status; /* status of matrix subtraction */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Check for matrix mismatch condition */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** if ((pSrcA->numRows != pSrcB->numRows) || ARM GAS /tmp/cc6NnxTV.s page 329 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** (pSrcA->numCols != pSrcB->numCols) || 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** (pSrcA->numRows != pDst->numRows) || 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** (pSrcA->numCols != pDst->numCols) ) 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** else 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Total number of samples in input matrix */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 4296 .loc 22 244 0 4297 0002 4388 ldrh r3, [r0, #2] 4298 0004 0588 ldrh r5, [r0] 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 4299 .loc 22 220 0 4300 0006 4C68 ldr r4, [r1, #4] 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 4301 .loc 22 221 0 4302 0008 5168 ldr r1, [r2, #4] 4303 .LVL637: 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 4304 .loc 22 219 0 4305 000a 4268 ldr r2, [r0, #4] 4306 .LVL638: 4307 .loc 22 244 0 4308 000c 03FB05F3 mul r3, r3, r5 4309 .LVL639: 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** blkCnt = numSamples >> 2U; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** while (blkCnt > 0U) 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* C(m,n) = A(m,n) - B(m,n) */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Subtract and store result in destination buffer. */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** *pOut++ = (*pInA++) - (*pInB++); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** *pOut++ = (*pInA++) - (*pInB++); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** *pOut++ = (*pInA++) - (*pInB++); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** *pOut++ = (*pInA++) - (*pInB++); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Decrement loop counter */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** blkCnt--; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Loop unrolling: Compute remaining outputs */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** blkCnt = numSamples % 0x4U; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #else 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Initialize blkCnt with number of samples */ ARM GAS /tmp/cc6NnxTV.s page 330 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** blkCnt = numSamples; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** while (blkCnt > 0U) 4310 .loc 22 275 0 4311 0010 4BB1 cbz r3, .L412 4312 .LVL640: 4313 .L413: 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* C(m,n) = A(m,n) - B(m,n) */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Subtract and store result in destination buffer. */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** *pOut++ = (*pInA++) - (*pInB++); 4314 .loc 22 280 0 4315 0012 F2EC017A vldmia.32 r2!, {s15} 4316 .LVL641: 4317 0016 B4EC017A vldmia.32 r4!, {s14} 4318 .LVL642: 4319 001a 77EEC77A vsub.f32 s15, s15, s14 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 4320 .loc 22 275 0 4321 001e 013B subs r3, r3, #1 4322 .LVL643: 4323 .loc 22 280 0 4324 0020 E1EC017A vstmia.32 r1!, {s15} 4325 .LVL644: 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** { 4326 .loc 22 275 0 4327 0024 F5D1 bne .L413 4328 .L412: 4329 .LVL645: 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Decrement loop counter */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** blkCnt--; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** status = ARM_MATH_SUCCESS; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** /* Return to application */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** return (status); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c **** } 4330 .loc 22 292 0 4331 0026 0020 movs r0, #0 4332 .LVL646: 4333 0028 30BC pop {r4, r5} 4334 .LCFI59: 4335 .cfi_restore 5 4336 .cfi_restore 4 4337 .cfi_def_cfa_offset 0 4338 .LVL647: 4339 002a 7047 bx lr 4340 .cfi_endproc 4341 .LFE167: 4343 .section .text.arm_mat_sub_q15,"ax",%progbits ARM GAS /tmp/cc6NnxTV.s page 331 4344 .align 1 4345 .p2align 2,,3 4346 .global arm_mat_sub_q15 4347 .syntax unified 4348 .thumb 4349 .thumb_func 4350 .fpu fpv4-sp-d16 4352 arm_mat_sub_q15: 4353 .LFB168: 4354 .file 23 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * Title: arm_mat_sub_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * Description: Q15 Matrix subtraction 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** @addtogroup MatrixSub 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** @brief Q15 matrix subtraction. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** @param[in] pSrcA points to the first input matrix structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** @param[in] pSrcB points to the second input matrix structure 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** @param[out] pDst points to output matrix structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** @return execution status 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed ARM GAS /tmp/cc6NnxTV.s page 332 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** The function uses saturating arithmetic. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** */ 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #if defined(ARM_MATH_MVEI) 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** arm_status arm_mat_sub_q15( 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** const arm_matrix_instance_q15 * pSrcA, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** const arm_matrix_instance_q15 * pSrcB, 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** arm_matrix_instance_q15 * pDst) 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** { 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** uint32_t numSamples; /* total number of elements in the matrix */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** q15_t *pDataA, *pDataB, *pDataDst; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** q15x8_t vecA, vecB, vecDst; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** q15_t const *pSrcAVec; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** q15_t const *pSrcBVec; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** uint32_t blkCnt; /* loop counters */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** arm_status status; /* status of matrix subtraction */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** pDataA = pSrcA->pData; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** pDataB = pSrcB->pData; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** pDataDst = pDst->pData; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** pSrcAVec = (q15_t const *) pDataA; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** pSrcBVec = (q15_t const *) pDataB; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Check for matrix mismatch condition */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** if ((pSrcA->numRows != pSrcB->numRows) || 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** (pSrcA->numCols != pSrcB->numCols) || 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** (pSrcA->numRows != pDst->numRows) || 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** (pSrcA->numCols != pDst->numCols) ) 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** { 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** } 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** else 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** { 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * Total number of samples in the input matrix 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** blkCnt = numSamples >> 3; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** while (blkCnt > 0U) 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** { 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* C(m,n) = A(m,n) + B(m,n) */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* sub and then store the results in the destination buffer. */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** vecA = vld1q(pSrcAVec); pSrcAVec += 8; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** vecB = vld1q(pSrcBVec); pSrcBVec += 8; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** vecDst = vqsubq(vecA, vecB); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** vst1q(pDataDst, vecDst); pDataDst += 8; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * Decrement the blockSize loop counter ARM GAS /tmp/cc6NnxTV.s page 333 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** blkCnt--; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** } 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** * tail 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** blkCnt = numSamples & 7; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** if (blkCnt > 0U) 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** { 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** vecA = vld1q(pSrcAVec); pSrcAVec += 8; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** vecB = vld1q(pSrcBVec); pSrcBVec += 8; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** vecDst = vqsubq_m(vecDst, vecA, vecB, p0); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** vstrhq_p(pDataDst, vecDst, p0); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** } 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** status = ARM_MATH_SUCCESS; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** } 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Return to application */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** return (status); 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** } 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #else 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** arm_status arm_mat_sub_q15( 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** const arm_matrix_instance_q15 * pSrcA, 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** const arm_matrix_instance_q15 * pSrcB, 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** arm_matrix_instance_q15 * pDst) 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** { 4355 .loc 23 132 0 4356 .cfi_startproc 4357 @ args = 0, pretend = 0, frame = 0 4358 @ frame_needed = 0, uses_anonymous_args = 0 4359 @ link register save eliminated. 4360 .LVL648: 4361 0000 70B4 push {r4, r5, r6} 4362 .LCFI60: 4363 .cfi_def_cfa_offset 12 4364 .cfi_offset 4, -12 4365 .cfi_offset 5, -8 4366 .cfi_offset 6, -4 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** q15_t *pOut = pDst->pData; /* output data matrix pointer */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** uint32_t numSamples; /* total number of elements in the matrix */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** uint32_t blkCnt; /* loop counters */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** arm_status status; /* status of matrix subtraction */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Check for matrix mismatch condition */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** if ((pSrcA->numRows != pSrcB->numRows) || 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** (pSrcA->numCols != pSrcB->numCols) || 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** (pSrcA->numRows != pDst->numRows) || 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** (pSrcA->numCols != pDst->numCols) ) 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** { 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ ARM GAS /tmp/cc6NnxTV.s page 334 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** } 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** else 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** { 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Total number of samples in input matrix */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 4367 .loc 23 157 0 4368 0002 4388 ldrh r3, [r0, #2] 4369 0004 0688 ldrh r6, [r0] 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** q15_t *pOut = pDst->pData; /* output data matrix pointer */ 4370 .loc 23 134 0 4371 0006 4D68 ldr r5, [r1, #4] 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 4372 .loc 23 135 0 4373 0008 5468 ldr r4, [r2, #4] 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 4374 .loc 23 133 0 4375 000a 4168 ldr r1, [r0, #4] 4376 .LVL649: 4377 .loc 23 157 0 4378 000c 03FB06F6 mul r6, r3, r6 4379 .LVL650: 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** blkCnt = numSamples >> 2U; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** while (blkCnt > 0U) 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** { 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* C(m,n) = A(m,n) - B(m,n) */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Subtract, Saturate and store result in destination buffer. */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #if defined (ARM_MATH_DSP) 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia ((q15_t **) &pInA), read_q15x2_ia ((q15_t **) & 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia ((q15_t **) &pInA), read_q15x2_ia ((q15_t **) & 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #else 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #endif 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Decrement loop counter */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** blkCnt--; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** } 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Loop unrolling: Compute remaining outputs */ 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** blkCnt = numSamples % 0x4U; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #else 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Initialize blkCnt with number of samples */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** blkCnt = numSamples; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 335 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** while (blkCnt > 0U) 4380 .loc 23 193 0 4381 0010 4EB1 cbz r6, .L420 4382 .LVL651: 4383 .L421: 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** { 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* C(m,n) = A(m,n) - B(m,n) */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Subtract and store result in destination buffer. */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #if defined (ARM_MATH_DSP) 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++); 4384 .loc 23 199 0 4385 0012 31F9023B ldrsh r3, [r1], #2 4386 .LVL652: 4387 0016 35F9020B ldrsh r0, [r5], #2 4388 .LVL653: 4389 .LBB243: 4390 .LBB244: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4391 .loc 3 1779 0 4392 .syntax unified 4393 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4394 001a D3FA10F3 qsub16 r3, r3, r0 4395 @ 0 "" 2 4396 .LVL654: 4397 .thumb 4398 .syntax unified 4399 .LBE244: 4400 .LBE243: 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** { 4401 .loc 23 193 0 4402 001e 013E subs r6, r6, #1 4403 .LVL655: 4404 .loc 23 199 0 4405 0020 24F8023B strh r3, [r4], #2 @ movhi 4406 .LVL656: 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** { 4407 .loc 23 193 0 4408 0024 F5D1 bne .L421 4409 .L420: 4410 .LVL657: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #else 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** #endif 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Decrement loop counter */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** blkCnt--; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** } 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** status = ARM_MATH_SUCCESS; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** } 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** /* Return to application */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** return (status); ARM GAS /tmp/cc6NnxTV.s page 336 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c **** } 4411 .loc 23 214 0 4412 0026 0020 movs r0, #0 4413 0028 70BC pop {r4, r5, r6} 4414 .LCFI61: 4415 .cfi_restore 6 4416 .cfi_restore 5 4417 .cfi_restore 4 4418 .cfi_def_cfa_offset 0 4419 .LVL658: 4420 002a 7047 bx lr 4421 .cfi_endproc 4422 .LFE168: 4424 .section .text.arm_mat_sub_q31,"ax",%progbits 4425 .align 1 4426 .p2align 2,,3 4427 .global arm_mat_sub_q31 4428 .syntax unified 4429 .thumb 4430 .thumb_func 4431 .fpu fpv4-sp-d16 4433 arm_mat_sub_q31: 4434 .LFB169: 4435 .file 24 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * Title: arm_mat_sub_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * Description: Q31 matrix subtraction 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** */ ARM GAS /tmp/cc6NnxTV.s page 337 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** @addtogroup MatrixSub 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** @brief Q31 matrix subtraction. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** @param[in] pSrcA points to the first input matrix structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** @param[in] pSrcB points to the second input matrix structure 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** @param[out] pDst points to output matrix structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** @return execution status 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** @par Scaling and Overflow Behavior 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** The function uses saturating arithmetic. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** */ 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** #if defined(ARM_MATH_MVEI) 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** arm_status arm_mat_sub_q31( 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** const arm_matrix_instance_q31 * pSrcA, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** const arm_matrix_instance_q31 * pSrcB, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** arm_matrix_instance_q31 * pDst) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** { 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** uint32_t numSamples; /* total number of elements in the matrix */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** q31_t *pDataA, *pDataB, *pDataDst; 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** q31x4_t vecA, vecB, vecDst; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** q31_t const *pSrcAVec; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** q31_t const *pSrcBVec; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** uint32_t blkCnt; /* loop counters */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** arm_status status; /* status of matrix subtraction */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** pDataA = pSrcA->pData; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** pDataB = pSrcB->pData; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** pDataDst = pDst->pData; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** pSrcAVec = (q31_t const *) pDataA; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** pSrcBVec = (q31_t const *) pDataB; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Check for matrix mismatch condition */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** if ((pSrcA->numRows != pSrcB->numRows) || 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** (pSrcA->numCols != pSrcB->numCols) || 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** (pSrcA->numRows != pDst->numRows) || 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** (pSrcA->numCols != pDst->numCols) ) 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** } 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** else 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** { 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * Total number of samples in the input matrix ARM GAS /tmp/cc6NnxTV.s page 338 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** blkCnt = numSamples >> 2; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** while (blkCnt > 0U) 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** { 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* C(m,n) = A(m,n) + B(m,n) */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* sub and then store the results in the destination buffer. */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** vecA = vld1q(pSrcAVec); 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** pSrcAVec += 4; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** vecB = vld1q(pSrcBVec); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** pSrcBVec += 4; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** vecDst = vqsubq(vecA, vecB); 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** vst1q(pDataDst, vecDst); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** pDataDst += 4; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * Decrement the blockSize loop counter 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** blkCnt--; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** } 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** * tail 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** blkCnt = numSamples & 3; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** if (blkCnt > 0U) 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** { 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** vecA = vld1q(pSrcAVec); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** pSrcAVec += 4; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** vecB = vld1q(pSrcBVec); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** pSrcBVec += 4; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** vecDst = vqsubq_m(vecDst, vecA, vecB, p0); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** vstrwq_p(pDataDst, vecDst, p0); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** } 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** status = ARM_MATH_SUCCESS; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** } 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Return to application */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** return (status); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** } 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** #else 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** arm_status arm_mat_sub_q31( 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** const arm_matrix_instance_q31 * pSrcA, 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** const arm_matrix_instance_q31 * pSrcB, 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** arm_matrix_instance_q31 * pDst) 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** { 4436 .loc 24 136 0 4437 .cfi_startproc 4438 @ args = 0, pretend = 0, frame = 0 4439 @ frame_needed = 0, uses_anonymous_args = 0 4440 @ link register save eliminated. 4441 .LVL659: 4442 0000 70B4 push {r4, r5, r6} 4443 .LCFI62: 4444 .cfi_def_cfa_offset 12 4445 .cfi_offset 4, -12 4446 .cfi_offset 5, -8 ARM GAS /tmp/cc6NnxTV.s page 339 4447 .cfi_offset 6, -4 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** uint32_t numSamples; /* total number of elements in the matrix */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** uint32_t blkCnt; /* loop counters */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** arm_status status; /* status of matrix subtraction */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Check for matrix mismatch condition */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** if ((pSrcA->numRows != pSrcB->numRows) || 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** (pSrcA->numCols != pSrcB->numCols) || 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** (pSrcA->numRows != pDst->numRows) || 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** (pSrcA->numCols != pDst->numCols) ) 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** { 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** } 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** else 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** { 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Total number of samples in input matrix */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; 4448 .loc 24 162 0 4449 0002 4388 ldrh r3, [r0, #2] 4450 0004 0688 ldrh r6, [r0] 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 4451 .loc 24 138 0 4452 0006 4D68 ldr r5, [r1, #4] 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 4453 .loc 24 139 0 4454 0008 5468 ldr r4, [r2, #4] 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ 4455 .loc 24 137 0 4456 000a 4168 ldr r1, [r0, #4] 4457 .LVL660: 4458 .loc 24 162 0 4459 000c 03FB06F6 mul r6, r3, r6 4460 .LVL661: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** blkCnt = numSamples >> 2U; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** while (blkCnt > 0U) 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** { 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* C(m,n) = A(m,n) - B(m,n) */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Subtract, saturate and then store the results in the destination buffer. */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** *pOut++ = __QSUB(*pInA++, *pInB++); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** *pOut++ = __QSUB(*pInA++, *pInB++); ARM GAS /tmp/cc6NnxTV.s page 340 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** *pOut++ = __QSUB(*pInA++, *pInB++); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** *pOut++ = __QSUB(*pInA++, *pInB++); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Decrement loop counter */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** blkCnt--; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** } 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Loop unrolling: Compute remaining outputs */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** blkCnt = numSamples % 0x4U; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** #else 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Initialize blkCnt with number of samples */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** blkCnt = numSamples; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** while (blkCnt > 0U) 4461 .loc 24 196 0 4462 0010 4EB1 cbz r6, .L428 4463 .LVL662: 4464 .L429: 4465 .LBB245: 4466 .LBB246: 2125:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4467 .loc 3 2125 0 4468 0012 51F8043B ldr r3, [r1], #4 4469 .LVL663: 4470 0016 55F8040B ldr r0, [r5], #4 4471 .LVL664: 4472 .syntax unified 4473 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4474 001a 80FAA3F3 qsub r3, r3, r0 4475 @ 0 "" 2 4476 .LVL665: 4477 .thumb 4478 .syntax unified 4479 .LBE246: 4480 .LBE245: 4481 .loc 24 196 0 4482 001e 013E subs r6, r6, #1 4483 .LVL666: 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** { 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* C(m,n) = A(m,n) - B(m,n) */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Subtract, saturate and store result in destination buffer. */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** *pOut++ = __QSUB(*pInA++, *pInB++); 4484 .loc 24 201 0 4485 0020 44F8043B str r3, [r4], #4 4486 .LVL667: 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** { 4487 .loc 24 196 0 4488 0024 F5D1 bne .L429 4489 .L428: 4490 .LVL668: ARM GAS /tmp/cc6NnxTV.s page 341 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Decrement loop counter */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** blkCnt--; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** } 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** status = ARM_MATH_SUCCESS; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** } 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** /* Return to application */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** return (status); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c **** } 4491 .loc 24 213 0 4492 0026 0020 movs r0, #0 4493 0028 70BC pop {r4, r5, r6} 4494 .LCFI63: 4495 .cfi_restore 6 4496 .cfi_restore 5 4497 .cfi_restore 4 4498 .cfi_def_cfa_offset 0 4499 .LVL669: 4500 002a 7047 bx lr 4501 .cfi_endproc 4502 .LFE169: 4504 .section .text.arm_mat_trans_f32,"ax",%progbits 4505 .align 1 4506 .p2align 2,,3 4507 .global arm_mat_trans_f32 4508 .syntax unified 4509 .thumb 4510 .thumb_func 4511 .fpu fpv4-sp-d16 4513 arm_mat_trans_f32: 4514 .LFB170: 4515 .file 25 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * Title: arm_mat_trans_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * Description: Floating-point matrix transpose 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * Unless required by applicable law or agreed to in writing, software ARM GAS /tmp/cc6NnxTV.s page 342 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** @defgroup MatrixTrans Matrix Transpose 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** Tranposes a matrix. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** Transposing an M x N matrix flips it around the center diagonal and results in an numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** else 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** if (pDst->numRows == pDst->numCols) 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { ARM GAS /tmp/cc6NnxTV.s page 343 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** if (pDst->numCols == 2) 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** return arm_mat_trans_32bit_2x2_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** if (pDst->numCols == 3) 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** return arm_mat_trans_32bit_3x3_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** if (pDst->numCols == 4) 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** return arm_mat_trans_32bit_4x4_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** arm_mat_trans_32bit_generic_mve(pSrc->numRows, pSrc->numCols, (uint32_t *)pSrc->pData, (uint32_ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** status = ARM_MATH_SUCCESS; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Return to application */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** return (status); 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** #else 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** #if defined(ARM_MATH_NEON) 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** arm_status arm_mat_trans_f32( 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** const arm_matrix_instance_f32 * pSrc, 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** arm_matrix_instance_f32 * pDst) 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** float32_t *pIn = pSrc->pData; /* input data matrix pointer */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** float32_t *px; /* Temporary output data matrix pointer */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** uint16_t nRows = pSrc->numRows; /* number of rows */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** uint16_t nColumns = pSrc->numCols; /* number of columns */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** uint16_t blkCnt, rowCnt, i = 0U, row = nRows; /* loop counters */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** arm_status status; /* status of matrix transpose */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Check for matrix mismatch condition */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** else 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Matrix transpose by exchanging the rows with columns */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Row loop */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** rowCnt = row >> 2; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** while (rowCnt > 0U) 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** float32x4_t row0V,row1V,row2V,row3V; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** float32x4x2_t ra0,ra1,rb0,rb1; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** blkCnt = nColumns >> 2; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* The pointer px is set to starting address of the column being processed */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px = pOut + i; ARM GAS /tmp/cc6NnxTV.s page 344 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Compute 4 outputs at a time. 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** while (blkCnt > 0U) /* Column loop */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** row0V = vld1q_f32(pIn); 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** row1V = vld1q_f32(pIn + 1 * nColumns); 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** row2V = vld1q_f32(pIn + 2 * nColumns); 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** row3V = vld1q_f32(pIn + 3 * nColumns); 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** pIn += 4; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** ra0 = vzipq_f32(row0V,row2V); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** ra1 = vzipq_f32(row1V,row3V); 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** rb0 = vzipq_f32(ra0.val[0],ra1.val[0]); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** rb1 = vzipq_f32(ra0.val[1],ra1.val[1]); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** vst1q_f32(px,rb0.val[0]); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px += nRows; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** vst1q_f32(px,rb0.val[1]); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px += nRows; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** vst1q_f32(px,rb1.val[0]); 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px += nRows; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** vst1q_f32(px,rb1.val[1]); 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px += nRows; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Decrement the column loop counter */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** blkCnt--; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Perform matrix transpose for last 3 samples here. */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** blkCnt = nColumns % 0x4U; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** while (blkCnt > 0U) 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Read and store the input element in the destination */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** *px++ = *pIn; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** *px++ = *(pIn + 1 * nColumns); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** *px++ = *(pIn + 2 * nColumns); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** *px++ = *(pIn + 3 * nColumns); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px += (nRows - 4); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** pIn++; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Decrement the column loop counter */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** blkCnt--; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** i += 4; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** pIn += 3 * nColumns; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Decrement the row loop counter */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** rowCnt--; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 345 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } /* Row loop end */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** rowCnt = row & 3; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** while (rowCnt > 0U) 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** blkCnt = nColumns ; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* The pointer px is set to starting address of the column being processed */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px = pOut + i; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** while (blkCnt > 0U) 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Read and store the input element in the destination */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** *px = *pIn++; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Update the pointer px to point to the next row of the transposed matrix */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px += nRows; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Decrement the column loop counter */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** blkCnt--; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** i++; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** rowCnt -- ; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** status = ARM_MATH_SUCCESS; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Return to application */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** return (status); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** #else 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** arm_status arm_mat_trans_f32( 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** const arm_matrix_instance_f32 * pSrc, 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** arm_matrix_instance_f32 * pDst) 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 4516 .loc 25 229 0 4517 .cfi_startproc 4518 @ args = 0, pretend = 0, frame = 0 4519 @ frame_needed = 0, uses_anonymous_args = 0 4520 .LVL670: 4521 0000 F0B5 push {r4, r5, r6, r7, lr} 4522 .LCFI64: 4523 .cfi_def_cfa_offset 20 4524 .cfi_offset 4, -20 4525 .cfi_offset 5, -16 4526 .cfi_offset 6, -12 4527 .cfi_offset 7, -8 4528 .cfi_offset 14, -4 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** float32_t *pIn = pSrc->pData; /* input data matrix pointer */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** float32_t *pOut = pDst->pData; /* output data matrix pointer */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** float32_t *px; /* Temporary output data matrix pointer */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** uint16_t nRows = pSrc->numRows; /* number of rows */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** uint16_t nCols = pSrc->numCols; /* number of columns */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** uint32_t col, row = nRows, i = 0U; /* Loop counters */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** arm_status status; /* status of matrix transpose */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 346 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** #ifdef ARM_MATH_MATRIX_CHECK 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Check for matrix mismatch condition */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** if ((pSrc->numRows != pDst->numCols) || 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** (pSrc->numCols != pDst->numRows) ) 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** status = ARM_MATH_SIZE_MISMATCH; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** else 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Matrix transpose by exchanging the rows with columns */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* row loop */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** do 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Pointer px is set to starting address of column being processed */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px = pOut + i; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** col = nCols >> 2U; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** while (col > 0U) /* column loop */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Read and store input element in destination */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** *px = *pIn++; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Update pointer px to point to next row of transposed matrix */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px += nRows; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** *px = *pIn++; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px += nRows; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** *px = *pIn++; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px += nRows; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** *px = *pIn++; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px += nRows; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Decrement column loop counter */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** col--; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Loop unrolling: Compute remaining outputs */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** col = nCols % 0x4U; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** #else 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Initialize col with number of samples */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** col = nCols; 4529 .loc 25 290 0 4530 0002 4788 ldrh r7, [r0, #2] 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** float32_t *px; /* Temporary output data matrix pointer */ 4531 .loc 25 231 0 ARM GAS /tmp/cc6NnxTV.s page 347 4532 0004 4D68 ldr r5, [r1, #4] 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** arm_status status; /* status of matrix transpose */ 4533 .loc 25 235 0 4534 0006 0488 ldrh r4, [r0] 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** float32_t *pIn = pSrc->pData; /* input data matrix pointer */ 4535 .loc 25 230 0 4536 0008 4668 ldr r6, [r0, #4] 4537 .LVL671: 4538 000a 8FB1 cbz r7, .L436 4539 000c A400 lsls r4, r4, #2 4540 000e 05EB040E add lr, r5, r4 4541 0012 4FEA870C lsl ip, r7, #2 4542 .LVL672: 4543 .L438: 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 4544 .loc 25 257 0 4545 0016 2A46 mov r2, r5 4546 .LVL673: 4547 0018 3B46 mov r3, r7 4548 001a 3146 mov r1, r6 4549 .LVL674: 4550 .L437: 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** while (col > 0U) 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Read and store input element in destination */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** *px = *pIn++; 4551 .loc 25 297 0 4552 001c 51F8040B ldr r0, [r1], #4 @ float 4553 .LVL675: 4554 0020 1060 str r0, [r2] @ float 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 4555 .loc 25 294 0 4556 0022 013B subs r3, r3, #1 4557 .LVL676: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Update pointer px to point to next row of transposed matrix */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** px += nRows; 4558 .loc 25 300 0 4559 0024 2244 add r2, r2, r4 4560 .LVL677: 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** { 4561 .loc 25 294 0 4562 0026 F9D1 bne .L437 4563 0028 0435 adds r5, r5, #4 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Decrement column loop counter */ 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** col--; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** i++; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Decrement row loop counter */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** row--; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** ARM GAS /tmp/cc6NnxTV.s page 348 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } while (row > 0U); /* row loop end */ 4564 .loc 25 311 0 4565 002a 7545 cmp r5, lr 4566 002c 6644 add r6, r6, ip 4567 002e F2D1 bne .L438 4568 .LVL678: 4569 .L436: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Set status as ARM_MATH_SUCCESS */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** status = ARM_MATH_SUCCESS; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** /* Return to application */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** return (status); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c **** } 4570 .loc 25 319 0 4571 0030 0020 movs r0, #0 4572 0032 F0BD pop {r4, r5, r6, r7, pc} 4573 .cfi_endproc 4574 .LFE170: 4576 .section .text.arm_mat_trans_q15,"ax",%progbits 4577 .align 1 4578 .p2align 2,,3 4579 .global arm_mat_trans_q15 4580 .syntax unified 4581 .thumb 4582 .thumb_func 4583 .fpu fpv4-sp-d16 4585 arm_mat_trans_q15: 4586 .LFB171: 4587 .file 26 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * Title: arm_mat_trans_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * Description: Q15 matrix transpose 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * limitations under the License. ARM GAS /tmp/cc6NnxTV.s page 349 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** @addtogroup MatrixTrans 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** @brief Q15 matrix transpose. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** @param[in] pSrc points to input matrix 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** @param[out] pDst points to output matrix 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** @return execution status 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #if defined(ARM_MATH_MVEI) 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** __STATIC_INLINE arm_status arm_mat_trans_16bit_2x2(uint16_t * pDataSrc, uint16_t * pDataDest) 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDataDest[0] = pDataSrc[0]; 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDataDest[3] = pDataSrc[3]; 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDataDest[2] = pDataSrc[1]; 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDataDest[1] = pDataSrc[2]; 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** return (ARM_MATH_SUCCESS); 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** static arm_status arm_mat_trans_16bit_3x3_mve(uint16_t * pDataSrc, uint16_t * pDataDest) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** static const uint16_t stridesTr33[8] = { 0, 3, 6, 1, 4, 7, 2, 5 }; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16x8_t vecOffs1; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16x8_t vecIn1; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * | 0 1 2 | | 0 3 6 | 8 x 16 flattened version | 0 3 6 1 4 7 2 5 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * | 3 4 5 | => | 1 4 7 | => | 8 . . . . . . . 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * | 6 7 8 | | 2 5 8 | (row major) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vecOffs1 = vldrhq_u16((uint16_t const *) stridesTr33); 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vecIn1 = vldrhq_u16((uint16_t const *) pDataSrc); 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vstrhq_scatter_shifted_offset_u16(pDataDest, vecOffs1, vecIn1); 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDataDest[8] = pDataSrc[8]; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** return (ARM_MATH_SUCCESS); 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 350 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** static arm_status arm_mat_trans_16bit_4x4_mve(uint16_t * pDataSrc, uint16_t * pDataDest) 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** static const uint16_t stridesTr44_1[8] = { 0, 4, 8, 12, 1, 5, 9, 13 }; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** static const uint16_t stridesTr44_2[8] = { 2, 6, 10, 14, 3, 7, 11, 15 }; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16x8_t vecOffs1, vecOffs2; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16x8_t vecIn1, vecIn2; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16_t const * pDataSrcVec = (uint16_t const *) pDataSrc; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * 4x4 Matrix transposition 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * | 0 1 2 3 | | 0 4 8 12 | 8 x 16 flattened version 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * | 4 5 6 7 | => | 1 5 9 13 | => [0 4 8 12 1 5 9 13] 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * | 8 9 10 11 | | 2 6 10 14 | [2 6 10 14 3 7 11 15] 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * | 12 13 14 15 | | 3 7 11 15 | 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vecOffs1 = vldrhq_u16((uint16_t const *) stridesTr44_1); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vecOffs2 = vldrhq_u16((uint16_t const *) stridesTr44_2); 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vecIn1 = vldrhq_u16(pDataSrcVec); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDataSrcVec += 8; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vecIn2 = vldrhq_u16(pDataSrcVec); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vstrhq_scatter_shifted_offset_u16(pDataDest, vecOffs1, vecIn1); 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vstrhq_scatter_shifted_offset_u16(pDataDest, vecOffs2, vecIn2); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** return (ARM_MATH_SUCCESS); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** static arm_status arm_mat_trans_16bit_generic( 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16_t srcRows, 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16_t srcCols, 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16_t * pDataSrc, 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16_t * pDataDest) 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16x8_t vecOffs; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint32_t i; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint32_t blkCnt; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16_t const *pDataC; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16_t *pDataDestR; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16x8_t vecIn; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vecOffs = vidupq_u16((uint32_t)0, 1); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vecOffs = vecOffs * srcCols; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** i = srcCols; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** while(i > 0U) 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDataC = (uint16_t const *) pDataSrc; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDataDestR = pDataDest; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** blkCnt = srcRows >> 3; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** while (blkCnt > 0U) 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { ARM GAS /tmp/cc6NnxTV.s page 351 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vecIn = vldrhq_gather_shifted_offset_u16(pDataC, vecOffs); 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vstrhq_u16(pDataDestR, vecIn); 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDataDestR += 8; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDataC = pDataC + srcCols * 8; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * Decrement the blockSize loop counter 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** blkCnt--; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** * tail 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** blkCnt = srcRows & 7; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** if (blkCnt > 0U) 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vecIn = vldrhq_gather_shifted_offset_u16(pDataC, vecOffs); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** vstrhq_p_u16(pDataDestR, vecIn, p0); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDataSrc += 1; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDataDest += srcRows; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** i--; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** return (ARM_MATH_SUCCESS); 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** arm_status arm_mat_trans_q15( 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** const arm_matrix_instance_q15 * pSrc, 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** arm_matrix_instance_q15 * pDst) 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** arm_status status; /* status of matrix transpose */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Check for matrix mismatch condition */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** if ((pSrc->numRows != pDst->numCols) || 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** (pSrc->numCols != pDst->numRows) ) 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** else 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** if (pDst->numRows == pDst->numCols) 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** if (pDst->numCols == 1) 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pDst->pData[0] = pSrc->pData[0]; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** return(ARM_MATH_SUCCESS); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** if (pDst->numCols == 2) ARM GAS /tmp/cc6NnxTV.s page 352 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** return arm_mat_trans_16bit_2x2((uint16_t *)pSrc->pData, (uint16_t *)pDst->pData); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** if (pDst->numCols == 3) 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** return arm_mat_trans_16bit_3x3_mve((uint16_t *)pSrc->pData, (uint16_t *)pDst->pData); 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** if (pDst->numCols == 4) 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** return arm_mat_trans_16bit_4x4_mve((uint16_t *)pSrc->pData, (uint16_t *)pDst->pData); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** arm_mat_trans_16bit_generic(pSrc->numRows, pSrc->numCols, (uint16_t *)pSrc->pData, (uint16_t 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** status = ARM_MATH_SUCCESS; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Return to application */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** return (status); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #else 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** arm_status arm_mat_trans_q15( 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** const arm_matrix_instance_q15 * pSrc, 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** arm_matrix_instance_q15 * pDst) 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 4588 .loc 26 217 0 4589 .cfi_startproc 4590 @ args = 0, pretend = 0, frame = 0 4591 @ frame_needed = 0, uses_anonymous_args = 0 4592 .LVL679: 4593 0000 F0B5 push {r4, r5, r6, r7, lr} 4594 .LCFI65: 4595 .cfi_def_cfa_offset 20 4596 .cfi_offset 4, -20 4597 .cfi_offset 5, -16 4598 .cfi_offset 6, -12 4599 .cfi_offset 7, -8 4600 .cfi_offset 14, -4 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** q15_t *pIn = pSrc->pData; /* input data matrix pointer */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** q15_t *pOut = pDst->pData; /* output data matrix pointer */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16_t nRows = pSrc->numRows; /* number of rows */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16_t nCols = pSrc->numCols; /* number of columns */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint32_t col, row = nRows, i = 0U; /* Loop counters */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** arm_status status; /* status of matrix transpose */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** q31_t in; /* variable to hold temporary output */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #endif 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #ifdef ARM_MATH_MATRIX_CHECK 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Check for matrix mismatch condition */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** if ((pSrc->numRows != pDst->numCols) || 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** (pSrc->numCols != pDst->numRows) ) 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** status = ARM_MATH_SIZE_MISMATCH; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** else 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** ARM GAS /tmp/cc6NnxTV.s page 353 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Matrix transpose by exchanging the rows with columns */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* row loop */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** do 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Pointer pOut is set to starting address of column being processed */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pOut = pDst->pData + i; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** col = nCols >> 2U; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** while (col > 0U) /* column loop */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Read two elements from row */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** in = read_q15x2_ia ((q15_t **) &pIn); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Unpack and store one element in destination */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** *pOut = (q15_t) in; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #else 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Update pointer pOut to point to next row of transposed matrix */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pOut += nRows; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Unpack and store second element in destination */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #else 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** *pOut = (q15_t) in; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Update pointer pOut to point to next row of transposed matrix */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pOut += nRows; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Read two elements from row */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** in = read_q15x2_ia ((q15_t **) &pIn); 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Unpack and store one element in destination */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** *pOut = (q15_t) in; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #else 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Update pointer pOut to point to next row of transposed matrix */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pOut += nRows; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Unpack and store second element in destination */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #else 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** *pOut = (q15_t) in; ARM GAS /tmp/cc6NnxTV.s page 354 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Update pointer pOut to point to next row of transposed matrix */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pOut += nRows; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Decrement column loop counter */ 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** col--; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Loop unrolling: Compute remaining outputs */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** col = nCols % 0x4U; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #else 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Initialize col with number of samples */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** col = nCols; 4601 .loc 26 314 0 4602 0002 4788 ldrh r7, [r0, #2] 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** uint16_t nRows = pSrc->numRows; /* number of rows */ 4603 .loc 26 219 0 4604 0004 4D68 ldr r5, [r1, #4] 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** arm_status status; /* status of matrix transpose */ 4605 .loc 26 222 0 4606 0006 0488 ldrh r4, [r0] 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** q15_t *pIn = pSrc->pData; /* input data matrix pointer */ 4607 .loc 26 218 0 4608 0008 4668 ldr r6, [r0, #4] 4609 .LVL680: 4610 000a 8FB1 cbz r7, .L446 4611 000c 6400 lsls r4, r4, #1 4612 000e 05EB040E add lr, r5, r4 4613 0012 4FEA470C lsl ip, r7, #1 4614 .LVL681: 4615 .L448: 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 4616 .loc 26 248 0 4617 0016 2A46 mov r2, r5 4618 .LVL682: 4619 0018 3B46 mov r3, r7 4620 001a 3146 mov r1, r6 4621 .LVL683: 4622 .L447: 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** while (col > 0U) 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Read and store input element in destination */ 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** *pOut = *pIn++; 4623 .loc 26 321 0 4624 001c 31F9020B ldrsh r0, [r1], #2 4625 .LVL684: 4626 0020 1080 strh r0, [r2] @ movhi 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 4627 .loc 26 318 0 4628 0022 013B subs r3, r3, #1 4629 .LVL685: ARM GAS /tmp/cc6NnxTV.s page 355 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Update pointer pOut to point to next row of transposed matrix */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** pOut += nRows; 4630 .loc 26 324 0 4631 0024 2244 add r2, r2, r4 4632 .LVL686: 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** { 4633 .loc 26 318 0 4634 0026 F9D1 bne .L447 4635 0028 0235 adds r5, r5, #2 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Decrement column loop counter */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** col--; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** i++; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Decrement row loop counter */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** row--; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } while (row > 0U); /* row loop end */ 4636 .loc 26 335 0 4637 002a 7545 cmp r5, lr 4638 002c 6644 add r6, r6, ip 4639 002e F2D1 bne .L448 4640 .LVL687: 4641 .L446: 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Set status as ARM_MATH_SUCCESS */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** status = ARM_MATH_SUCCESS; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** /* Return to application */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** return (status); 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c **** } 4642 .loc 26 343 0 4643 0030 0020 movs r0, #0 4644 0032 F0BD pop {r4, r5, r6, r7, pc} 4645 .cfi_endproc 4646 .LFE171: 4648 .section .text.arm_mat_trans_q31,"ax",%progbits 4649 .align 1 4650 .p2align 2,,3 4651 .global arm_mat_trans_q31 4652 .syntax unified 4653 .thumb 4654 .thumb_func 4655 .fpu fpv4-sp-d16 4657 arm_mat_trans_q31: 4658 .LFB172: 4659 .file 27 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * Title: arm_mat_trans_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * Description: Q31 matrix transpose 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * $Date: 18. March 2019 ARM GAS /tmp/cc6NnxTV.s page 356 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** @ingroup groupMatrix 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** @addtogroup MatrixTrans 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** @brief Q31 matrix transpose. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** @param[in] pSrc points to input matrix 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** @param[out] pDst points to output matrix 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** @return execution status 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** #if defined(ARM_MATH_MVEI) 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** #include "arm_helium_utils.h" 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** arm_status arm_mat_trans_q31( 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** const arm_matrix_instance_q31 * pSrc, 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** arm_matrix_instance_q31 * pDst) 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** { 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** arm_status status; /* status of matrix transpose */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Check for matrix mismatch condition */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** if ((pSrc->numRows != pDst->numCols) || 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** (pSrc->numCols != pDst->numRows) ) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** { 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ ARM GAS /tmp/cc6NnxTV.s page 357 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** } 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** else 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** { 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** if (pDst->numRows == pDst->numCols) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** { 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** if (pDst->numCols == 2) 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** return arm_mat_trans_32bit_2x2_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** if (pDst->numCols == 3) 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** return arm_mat_trans_32bit_3x3_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** if (pDst->numCols == 4) 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** return arm_mat_trans_32bit_4x4_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** } 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** arm_mat_trans_32bit_generic_mve(pSrc->numRows, pSrc->numCols, (uint32_t *)pSrc->pData, (uint32_ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** status = ARM_MATH_SUCCESS; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** status = ARM_MATH_SUCCESS; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** } 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Return to application */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** return (status); 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** } 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** #else 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** arm_status arm_mat_trans_q31( 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** const arm_matrix_instance_q31 * pSrc, 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** arm_matrix_instance_q31 * pDst) 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** { 4660 .loc 27 96 0 4661 .cfi_startproc 4662 @ args = 0, pretend = 0, frame = 0 4663 @ frame_needed = 0, uses_anonymous_args = 0 4664 .LVL688: 4665 0000 F0B5 push {r4, r5, r6, r7, lr} 4666 .LCFI66: 4667 .cfi_def_cfa_offset 20 4668 .cfi_offset 4, -20 4669 .cfi_offset 5, -16 4670 .cfi_offset 6, -12 4671 .cfi_offset 7, -8 4672 .cfi_offset 14, -4 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** q31_t *pIn = pSrc->pData; /* input data matrix pointer */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** q31_t *pOut = pDst->pData; /* output data matrix pointer */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** q31_t *px; /* Temporary output data matrix pointer */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** uint16_t nRows = pSrc->numRows; /* number of rows */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** uint16_t nCols = pSrc->numCols; /* number of columns */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** uint32_t col, row = nRows, i = 0U; /* Loop counters */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** arm_status status; /* status of matrix transpose */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** #ifdef ARM_MATH_MATRIX_CHECK 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Check for matrix mismatch condition */ ARM GAS /tmp/cc6NnxTV.s page 358 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** if ((pSrc->numRows != pDst->numCols) || 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** (pSrc->numCols != pDst->numRows) ) 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** { 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Set status as ARM_MATH_SIZE_MISMATCH */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** status = ARM_MATH_SIZE_MISMATCH; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** } 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** else 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** { 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Matrix transpose by exchanging the rows with columns */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* row loop */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** do 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** { 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Pointer px is set to starting address of column being processed */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** px = pOut + i; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** col = nCols >> 2U; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** while (col > 0U) /* column loop */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** { 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Read and store input element in destination */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** *px = *pIn++; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Update pointer px to point to next row of transposed matrix */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** px += nRows; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** *px = *pIn++; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** px += nRows; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** *px = *pIn++; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** px += nRows; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** *px = *pIn++; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** px += nRows; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Decrement column loop counter */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** col--; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** } 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Loop unrolling: Compute remaining outputs */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** col = nCols % 0x4U; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** #else 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Initialize col with number of samples */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** col = nCols; 4673 .loc 27 157 0 4674 0002 4788 ldrh r7, [r0, #2] 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** q31_t *px; /* Temporary output data matrix pointer */ 4675 .loc 27 98 0 4676 0004 4D68 ldr r5, [r1, #4] 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** arm_status status; /* status of matrix transpose */ 4677 .loc 27 102 0 ARM GAS /tmp/cc6NnxTV.s page 359 4678 0006 0488 ldrh r4, [r0] 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** q31_t *pIn = pSrc->pData; /* input data matrix pointer */ 4679 .loc 27 97 0 4680 0008 4668 ldr r6, [r0, #4] 4681 .LVL689: 4682 000a 8FB1 cbz r7, .L456 4683 000c A400 lsls r4, r4, #2 4684 000e 05EB040E add lr, r5, r4 4685 0012 4FEA870C lsl ip, r7, #2 4686 .LVL690: 4687 .L458: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 4688 .loc 27 124 0 4689 0016 2A46 mov r2, r5 4690 .LVL691: 4691 0018 3B46 mov r3, r7 4692 001a 3146 mov r1, r6 4693 .LVL692: 4694 .L457: 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** while (col > 0U) 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** { 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Read and store input element in destination */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** *px = *pIn++; 4695 .loc 27 164 0 4696 001c 51F8040B ldr r0, [r1], #4 4697 .LVL693: 4698 0020 1060 str r0, [r2] 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** { 4699 .loc 27 161 0 4700 0022 013B subs r3, r3, #1 4701 .LVL694: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Update pointer px to point to next row of transposed matrix */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** px += nRows; 4702 .loc 27 167 0 4703 0024 2244 add r2, r2, r4 4704 .LVL695: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** { 4705 .loc 27 161 0 4706 0026 F9D1 bne .L457 4707 0028 0435 adds r5, r5, #4 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Decrement column loop counter */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** col--; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** } 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** i++; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Decrement row loop counter */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** row--; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** } while (row > 0U); /* row loop end */ 4708 .loc 27 178 0 4709 002a 7545 cmp r5, lr ARM GAS /tmp/cc6NnxTV.s page 360 4710 002c 6644 add r6, r6, ip 4711 002e F2D1 bne .L458 4712 .LVL696: 4713 .L456: 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Set status as ARM_MATH_SUCCESS */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** status = ARM_MATH_SUCCESS; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** } 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** /* Return to application */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** return (status); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c **** } 4714 .loc 27 186 0 4715 0030 0020 movs r0, #0 4716 0032 F0BD pop {r4, r5, r6, r7, pc} 4717 .cfi_endproc 4718 .LFE172: 4720 .text 4721 .Letext0: 4722 .file 28 "/usr/include/newlib/machine/_default_types.h" 4723 .file 29 "/usr/include/newlib/sys/_stdint.h" 4724 .file 30 "/usr/include/newlib/sys/lock.h" 4725 .file 31 "/usr/include/newlib/sys/_types.h" 4726 .file 32 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" 4727 .file 33 "/usr/include/newlib/sys/reent.h" 4728 .file 34 "/usr/include/newlib/math.h" 4729 .file 35 "" ARM GAS /tmp/cc6NnxTV.s page 361 DEFINED SYMBOLS *ABS*:0000000000000000 MatrixFunctions.c /tmp/cc6NnxTV.s:16 .text.arm_mat_add_f32:0000000000000000 $t /tmp/cc6NnxTV.s:24 .text.arm_mat_add_f32:0000000000000000 arm_mat_add_f32 /tmp/cc6NnxTV.s:86 .text.arm_mat_add_q15:0000000000000000 $t /tmp/cc6NnxTV.s:94 .text.arm_mat_add_q15:0000000000000000 arm_mat_add_q15 /tmp/cc6NnxTV.s:168 .text.arm_mat_add_q31:0000000000000000 $t /tmp/cc6NnxTV.s:176 .text.arm_mat_add_q31:0000000000000000 arm_mat_add_q31 /tmp/cc6NnxTV.s:248 .text.arm_mat_cmplx_mult_f32:0000000000000000 $t /tmp/cc6NnxTV.s:256 .text.arm_mat_cmplx_mult_f32:0000000000000000 arm_mat_cmplx_mult_f32 /tmp/cc6NnxTV.s:378 .text.arm_mat_cmplx_mult_f32:0000000000000088 $d /tmp/cc6NnxTV.s:383 .text.arm_mat_cmplx_mult_q15:0000000000000000 $t /tmp/cc6NnxTV.s:391 .text.arm_mat_cmplx_mult_q15:0000000000000000 arm_mat_cmplx_mult_q15 /tmp/cc6NnxTV.s:786 .text.arm_mat_cmplx_mult_q31:0000000000000000 $t /tmp/cc6NnxTV.s:794 .text.arm_mat_cmplx_mult_q31:0000000000000000 arm_mat_cmplx_mult_q31 /tmp/cc6NnxTV.s:1018 .text.arm_mat_init_f32:0000000000000000 $t /tmp/cc6NnxTV.s:1026 .text.arm_mat_init_f32:0000000000000000 arm_mat_init_f32 /tmp/cc6NnxTV.s:1047 .text.arm_mat_init_q15:0000000000000000 $t /tmp/cc6NnxTV.s:1055 .text.arm_mat_init_q15:0000000000000000 arm_mat_init_q15 /tmp/cc6NnxTV.s:1076 .text.arm_mat_init_q31:0000000000000000 $t /tmp/cc6NnxTV.s:1084 .text.arm_mat_init_q31:0000000000000000 arm_mat_init_q31 /tmp/cc6NnxTV.s:1105 .text.arm_mat_inverse_f32:0000000000000000 $t /tmp/cc6NnxTV.s:1113 .text.arm_mat_inverse_f32:0000000000000000 arm_mat_inverse_f32 /tmp/cc6NnxTV.s:1601 .text.arm_mat_inverse_f64:0000000000000000 $t /tmp/cc6NnxTV.s:1609 .text.arm_mat_inverse_f64:0000000000000000 arm_mat_inverse_f64 /tmp/cc6NnxTV.s:2139 .text.arm_mat_inverse_f64:00000000000002a0 $d /tmp/cc6NnxTV.s:2145 .text.arm_mat_inverse_f64:00000000000002ac $t /tmp/cc6NnxTV.s:2190 .text.arm_mat_mult_f32:0000000000000000 $t /tmp/cc6NnxTV.s:2198 .text.arm_mat_mult_f32:0000000000000000 arm_mat_mult_f32 /tmp/cc6NnxTV.s:2293 .text.arm_mat_mult_f32:0000000000000058 $d /tmp/cc6NnxTV.s:2298 .text.arm_mat_mult_fast_q15:0000000000000000 $t /tmp/cc6NnxTV.s:2306 .text.arm_mat_mult_fast_q15:0000000000000000 arm_mat_mult_fast_q15 /tmp/cc6NnxTV.s:3085 .text.arm_mat_mult_fast_q31:0000000000000000 $t /tmp/cc6NnxTV.s:3093 .text.arm_mat_mult_fast_q31:0000000000000000 arm_mat_mult_fast_q31 /tmp/cc6NnxTV.s:3515 .text.arm_mat_mult_q15:0000000000000000 $t /tmp/cc6NnxTV.s:3523 .text.arm_mat_mult_q15:0000000000000000 arm_mat_mult_q15 /tmp/cc6NnxTV.s:3895 .text.arm_mat_mult_q31:0000000000000000 $t /tmp/cc6NnxTV.s:3903 .text.arm_mat_mult_q31:0000000000000000 arm_mat_mult_q31 /tmp/cc6NnxTV.s:4033 .text.arm_mat_scale_f32:0000000000000000 $t /tmp/cc6NnxTV.s:4041 .text.arm_mat_scale_f32:0000000000000000 arm_mat_scale_f32 /tmp/cc6NnxTV.s:4097 .text.arm_mat_scale_q15:0000000000000000 $t /tmp/cc6NnxTV.s:4105 .text.arm_mat_scale_q15:0000000000000000 arm_mat_scale_q15 /tmp/cc6NnxTV.s:4179 .text.arm_mat_scale_q31:0000000000000000 $t /tmp/cc6NnxTV.s:4187 .text.arm_mat_scale_q31:0000000000000000 arm_mat_scale_q31 /tmp/cc6NnxTV.s:4274 .text.arm_mat_sub_f32:0000000000000000 $t /tmp/cc6NnxTV.s:4282 .text.arm_mat_sub_f32:0000000000000000 arm_mat_sub_f32 /tmp/cc6NnxTV.s:4344 .text.arm_mat_sub_q15:0000000000000000 $t /tmp/cc6NnxTV.s:4352 .text.arm_mat_sub_q15:0000000000000000 arm_mat_sub_q15 /tmp/cc6NnxTV.s:4425 .text.arm_mat_sub_q31:0000000000000000 $t /tmp/cc6NnxTV.s:4433 .text.arm_mat_sub_q31:0000000000000000 arm_mat_sub_q31 /tmp/cc6NnxTV.s:4505 .text.arm_mat_trans_f32:0000000000000000 $t /tmp/cc6NnxTV.s:4513 .text.arm_mat_trans_f32:0000000000000000 arm_mat_trans_f32 /tmp/cc6NnxTV.s:4577 .text.arm_mat_trans_q15:0000000000000000 $t /tmp/cc6NnxTV.s:4585 .text.arm_mat_trans_q15:0000000000000000 arm_mat_trans_q15 /tmp/cc6NnxTV.s:4649 .text.arm_mat_trans_q31:0000000000000000 $t /tmp/cc6NnxTV.s:4657 .text.arm_mat_trans_q31:0000000000000000 arm_mat_trans_q31 ARM GAS /tmp/cc6NnxTV.s page 362 UNDEFINED SYMBOLS memset __aeabi_dcmpeq __aeabi_ddiv __aeabi_dmul __aeabi_dsub